begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.2.1-dev4">
  12        Active development...
  13     </release>
  14     <release version="5.2.1-dev3" date="2018-01-23">
  15        CMSIS-NN: 1.0.0
  16         - Initial contribution of the bare metal Neural Network Library.
  17     </release>
  18     <release version="5.2.1-dev2">
  19        Updated company brand.
  20     </release>
  21     <release version="5.2.1-dev1">
  22       CMSIS-RTOS2:
  23         - RTX 5.3.0 (see revision history for details)
  24         - OS Tick API 1.0.1
  25     </release>
  26     <release version="5.2.0" date="2017-11-16">
  27       CMSIS-Core(M): 5.1.0 (see revision history for details)
  28         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  29         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  30       CMSIS-Core(A): 1.1.0 (see revision history for details)
  31         - Added compiler_iccarm.h.
  32         - Added additional access functions for physical timer.
  33       CMSIS-DAP: 1.2.0 (see revision history for details)
  34       CMSIS-DSP: 1.5.2 (see revision history for details)
  35       CMSIS-Driver 2.6.0(see revision history for details):
  36         - CAN Driver API V1.2.0
  37         - NAND Driver API V2.3.0
  38       CMSIS-RTOS:
  39         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  40       CMSIS-RTOS2:
  41         - API 2.1.2 (see revision history for details)
  42         - RTX 5.2.3 (see revision history for details)
  43       Devices:
  44         - Added GCC startup and linker script for Cortex-A9.
  45         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  46         - Added IAR startup code for Cortex-A9
  47     </release>
  48     <release version="5.1.1" date="2017-09-19">
  49       CMSIS-RTOS2:
  50       - RTX 5.2.1 (see revision history for details)
  51     </release>
  52     <release version="5.1.0" date="2017-08-04">
  53       CMSIS-Core(M): 5.0.2 (see revision history for details)
  54       - Changed Version Control macros to be core agnostic.
  55       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  56       CMSIS-Core(A): 1.0.0 (see revision history for details)
  57       - Initial release
  58       - IRQ Controller API 1.0.0
  59       CMSIS-Driver: 2.05 (see revision history for details)
  60       - All typedefs related to status have been made volatile.
  61       CMSIS-RTOS2:
  62       - API 2.1.1 (see revision history for details)
  63       - RTX 5.2.0 (see revision history for details)
  64       - OS Tick API 1.0.0
  65       CMSIS-DSP: 1.5.2 (see revision history for details)
  66       - Fixed GNU Compiler specific diagnostics.
  67       CMSIS-PACK: 1.5.0 (see revision history for details)
  68       - added System Description File (*.SDF) Format
  69       CMSIS-Zone: 0.0.1 (Preview)
  70       - Initial specification draft
  71     </release>
  72     <release version="5.0.1" date="2017-02-03">
  73       Package Description:
  74       - added taxonomy for Cclass RTOS
  75       CMSIS-RTOS2:
  76       - API 2.1   (see revision history for details)
  77       - RTX 5.1.0 (see revision history for details)
  78       CMSIS-Core: 5.0.1 (see revision history for details)
  79       - Added __PACKED_STRUCT macro
  80       - Added uVisior support
  81       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  82       - Updated template for secure main function (main_s.c)
  83       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  84       CMSIS-DSP: 1.5.1 (see revision history for details)
  85       - added ARMv8M DSP libraries.
  86       CMSIS-PACK:1.4.9 (see revision history for details)
  87       - added Pack Index File specification and schema file
  88     </release>
  89     <release version="5.0.0" date="2016-11-11">
  90       Changed open source license to Apache 2.0
  91       CMSIS_Core:
  92        - Added support for Cortex-M23 and Cortex-M33.
  93        - Added ARMv8-M device configurations for mainline and baseline.
  94        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  95        - Added cmsis_compiler.h to unify compiler behaviour.
  96        - Updated function SCB_EnableICache (for Cortex-M7).
  97        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  98       CMSIS-RTOS:
  99         - bug fix in RTX 4.82 (see revision history for details)
 100       CMSIS-RTOS2:
 101         - new API including compatibility layer to CMSIS-RTOS
 102         - reference implementation based on RTX5
 103         - supports all Cortex-M variants including TrustZone for ARMv8-M
 104       CMSIS-SVD:
 105        - reworked SVD format documentation
 106        - removed SVD file database documentation as SVD files are distributed in packs
 107        - updated SVDConv for Win32 and Linux
 108       CMSIS-DSP:
 109        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 110        - Added DSP libraries build projects to CMSIS pack.
 111     </release>
 112     <release version="4.5.0" date="2015-10-28">
 113       - CMSIS-Core     4.30.0  (see revision history for details)
 114       - CMSIS-DAP      1.1.0   (unchanged)
 115       - CMSIS-Driver   2.04.0  (see revision history for details)
 116       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 117       - CMSIS-PACK     1.4.1   (see revision history for details)
 118       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 119       - CMSIS-SVD      1.3.1   (see revision history for details)
 120     </release>
 121     <release version="4.4.0" date="2015-09-11">
 122       - CMSIS-Core     4.20   (see revision history for details)
 123       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 124       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 125       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 126       - CMSIS-RTOS
 127         -- API         1.02   (unchanged)
 128         -- RTX         4.79   (see revision history for details)
 129       - CMSIS-SVD      1.3.0  (see revision history for details)
 130       - CMSIS-DAP      1.1.0  (extended with SWO support)
 131     </release>
 132     <release version="4.3.0" date="2015-03-20">
 133       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 134       - CMSIS-DSP      1.4.5  (see revision history for details)
 135       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 136       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 137       - CMSIS-RTOS
 138         -- API         1.02   (unchanged)
 139         -- RTX         4.78   (see revision history for details)
 140       - CMSIS-SVD      1.2    (unchanged)
 141     </release>
 142     <release version="4.2.0" date="2014-09-24">
 143       Adding Cortex-M7 support
 144       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 145       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 146       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 147       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 148       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 149     </release>
 150     <release version="4.1.1" date="2014-06-30">
 151       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 152     </release>
 153     <release version="4.1.0" date="2014-06-12">
 154       - CMSIS-Driver   2.02  (incompatible update)
 155       - CMSIS-Pack     1.3   (see revision history for details)
 156       - CMSIS-DSP      1.4.2 (unchanged)
 157       - CMSIS-Core     3.30  (unchanged)
 158       - CMSIS-RTOS RTX 4.74  (unchanged)
 159       - CMSIS-RTOS API 1.02  (unchanged)
 160       - CMSIS-SVD      1.10  (unchanged)
 161       PACK:
 162       - removed G++ specific files from PACK
 163       - added Component Startup variant "C Startup"
 164       - added Pack Checking Utility
 165       - updated conditions to reflect tool-chain dependency
 166       - added Taxonomy for Graphics
 167       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 168     </release>
 169     <release version="4.0.0">
 170       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 171       - CMSIS-Pack     1.1   Preliminary
 172       - CMSIS-DSP      1.4.2 (see revision history for details)
 173       - CMSIS-Core     3.30  (see revision history for details)
 174       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 175       - CMSIS-RTOS API 1.02  (unchanged)
 176       - CMSIS-SVD      1.10  (unchanged)
 177     </release>
 178     <release version="3.20.4">
 179       - CMSIS-RTOS 4.74 (see revision history for details)
 180       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 181     </release>
 182     <release version="3.20.3">
 183       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 184       - CMSIS-RTOS 4.73 (see revision history for details)
 185     </release>
 186     <release version="3.20.2">
 187       - CMSIS-Pack documentation has been added
 188       - CMSIS-Drivers header and documentation have been added to PACK
 189       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 190     </release>
 191     <release version="3.20.1">
 192       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 193       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 194     </release>
 195     <release version="3.20.0">
 196       The software portions that are deployed in the application program are now under a BSD license which allows usage
 197       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 198       The individual components have been update as listed below:
 199       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 200       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 201       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 202       - CMSIS-SVD is unchanged.
 203     </release>
 204   </releases>
 205
 206   <taxonomy>
 207     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 208     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 209     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 210     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 211     <description Cclass="File System">File Drive Support and File System</description>
 212     <description Cclass="Graphics">Graphical User Interface</description>
 213     <description Cclass="Network">Network Stack using Internet Protocols</description>
 214     <description Cclass="USB">Universal Serial Bus Stack</description>
 215     <description Cclass="Compiler">Compiler Software Extensions</description>
 216     <description Cclass="RTOS">Real-time Operating System</description>
 217   </taxonomy>
 218
 219   <devices>
 220     <!-- ******************************  Cortex-M0  ****************************** -->
 221     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 222       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 223       <description>
 224 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 225 - simple, easy-to-use programmers model
 226 - highly efficient ultra-low power operation
 227 - excellent code density
 228 - deterministic, high-performance interrupt handling
 229 - upward compatibility with the rest of the Cortex-M processor family.
 230       </description>
 231       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 232       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 233       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 234       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 235
 236       <device Dname="ARMCM0">
 237         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 238         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 239       </device>
 240     </family>
 241
 242     <!-- ******************************  Cortex-M0P  ****************************** -->
 243     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 244       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 245       <description>
 246 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 247 - simple, easy-to-use programmers model
 248 - highly efficient ultra-low power operation
 249 - excellent code density
 250 - deterministic, high-performance interrupt handling
 251 - upward compatibility with the rest of the Cortex-M processor family.
 252       </description>
 253       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 254       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 255       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 256       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 257
 258       <device Dname="ARMCM0P">
 259         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 260         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 261       </device>
 262
 263       <device Dname="ARMCM0P_MPU">
 264         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 265         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 266       </device>
 267     </family>
 268
 269     <!-- ******************************  Cortex-M3  ****************************** -->
 270     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 271       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 272       <description>
 273 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 274 - simple, easy-to-use programmers model
 275 - highly efficient ultra-low power operation
 276 - excellent code density
 277 - deterministic, high-performance interrupt handling
 278 - upward compatibility with the rest of the Cortex-M processor family.
 279       </description>
 280       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 281       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 282       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 283       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 284
 285       <device Dname="ARMCM3">
 286         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 287         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 288       </device>
 289     </family>
 290
 291     <!-- ******************************  Cortex-M4  ****************************** -->
 292     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 293       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 294       <description>
 295 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 296 - simple, easy-to-use programmers model
 297 - highly efficient ultra-low power operation
 298 - excellent code density
 299 - deterministic, high-performance interrupt handling
 300 - upward compatibility with the rest of the Cortex-M processor family.
 301       </description>
 302       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 303       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 304       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 305       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 306
 307       <device Dname="ARMCM4">
 308         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 309         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 310       </device>
 311
 312       <device Dname="ARMCM4_FP">
 313         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 314         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 315       </device>
 316     </family>
 317
 318     <!-- ******************************  Cortex-M7  ****************************** -->
 319     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 320       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 321       <description>
 322 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 323 - simple, easy-to-use programmers model
 324 - highly efficient ultra-low power operation
 325 - excellent code density
 326 - deterministic, high-performance interrupt handling
 327 - upward compatibility with the rest of the Cortex-M processor family.
 328       </description>
 329       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 330       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 331       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 332       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 333
 334       <device Dname="ARMCM7">
 335         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 336         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 337       </device>
 338
 339       <device Dname="ARMCM7_SP">
 340         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 341         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 342       </device>
 343
 344       <device Dname="ARMCM7_DP">
 345         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 346         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 347       </device>
 348     </family>
 349
 350     <!-- ******************************  Cortex-M23  ********************** -->
 351     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 352       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 353       <description>
 354 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 355 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 356 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 357       </description>
 358       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 359       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 360       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 361       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 362       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 363       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 364
 365       <device Dname="ARMCM23">
 366         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 367         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 368       </device>
 369
 370       <device Dname="ARMCM23_TZ">
 371         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 372         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 373       </device>
 374     </family>
 375
 376     <!-- ******************************  Cortex-M33  ****************************** -->
 377     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 378       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 379       <description>
 380 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 381 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 382       </description>
 383       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 384       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 385       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 386       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 387       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 388       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 389
 390       <device Dname="ARMCM33">
 391         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 392         <description>
 393           no DSP Instructions, no Floating Point Unit, no TrustZone
 394         </description>
 395         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 396       </device>
 397
 398       <device Dname="ARMCM33_TZ">
 399         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 400         <description>
 401           no DSP Instructions, no Floating Point Unit, TrustZone
 402         </description>
 403         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 404       </device>
 405
 406       <device Dname="ARMCM33_DSP_FP">
 407         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 408         <description>
 409           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 410         </description>
 411         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 412       </device>
 413
 414       <device Dname="ARMCM33_DSP_FP_TZ">
 415         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 416         <description>
 417           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 418         </description>
 419         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 420       </device>
 421     </family>
 422
 423     <!-- ******************************  ARMSC000  ****************************** -->
 424     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 425       <description>
 426 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 427 - simple, easy-to-use programmers model
 428 - highly efficient ultra-low power operation
 429 - excellent code density
 430 - deterministic, high-performance interrupt handling
 431       </description>
 432       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 433       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 434       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 435       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 436
 437       <device Dname="ARMSC000">
 438         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 439         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 440       </device>
 441     </family>
 442
 443     <!-- ******************************  ARMSC300  ****************************** -->
 444     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 445       <description>
 446 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 447 - simple, easy-to-use programmers model
 448 - highly efficient ultra-low power operation
 449 - excellent code density
 450 - deterministic, high-performance interrupt handling
 451       </description>
 452       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 453       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 454       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 455       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 456
 457       <device Dname="ARMSC300">
 458         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 459         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 460       </device>
 461     </family>
 462
 463     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 464     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 465       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 466       <description>
 467 Armv8-M Baseline based device with TrustZone
 468       </description>
 469       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 470       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 471       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 472       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 473       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 474       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 475
 476       <device Dname="ARMv8MBL">
 477         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 478         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 479       </device>
 480     </family>
 481
 482     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 483     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 484       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 485       <description>
 486 Armv8-M Mainline based device with TrustZone
 487       </description>
 488       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 489       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 490       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 491       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 492       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 493       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 494
 495       <device Dname="ARMv8MML">
 496         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 497         <description>
 498           no DSP Instructions, no Floating Point Unit, TrustZone
 499         </description>
 500         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 501       </device>
 502
 503       <device Dname="ARMv8MML_DSP">
 504         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 505         <description>
 506           DSP Instructions, no Floating Point Unit, TrustZone
 507         </description>
 508         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 509       </device>
 510
 511       <device Dname="ARMv8MML_SP">
 512         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 513         <description>
 514           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 515         </description>
 516         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 517       </device>
 518
 519       <device Dname="ARMv8MML_DSP_SP">
 520         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 521         <description>
 522           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 523         </description>
 524         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 525       </device>
 526
 527       <device Dname="ARMv8MML_DP">
 528         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 529         <description>
 530           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 531         </description>
 532         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 533       </device>
 534
 535       <device Dname="ARMv8MML_DSP_DP">
 536         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 537         <description>
 538           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 539         </description>
 540         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 541       </device>
 542     </family>
 543
 544     <!-- ******************************  Cortex-A5  ****************************** -->
 545     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 546       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 547       <description>
 548 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 549 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 550 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 551       </description>
 552
 553       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 554       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 555
 556       <device Dname="ARMCA5">
 557         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 558         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 559       </device>
 560     </family>
 561
 562     <!-- ******************************  Cortex-A7  ****************************** -->
 563     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 564       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 565       <description>
 566 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 567 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 568 an optional integrated GIC, and an optional L2 cache controller.
 569       </description>
 570
 571       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 572       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 573
 574       <device Dname="ARMCA7">
 575         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 576         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 577       </device>
 578     </family>
 579
 580     <!-- ******************************  Cortex-A9  ****************************** -->
 581     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 582       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 583       <description>
 584 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 585 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 586 and 8-bit Java bytecodes in Jazelle state.
 587       </description>
 588
 589       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 590       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 591
 592       <device Dname="ARMCA9">
 593         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 594         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 595       </device>
 596     </family>
 597   </devices>
 598
 599
 600   <apis>
 601     <!-- CMSIS Device API -->
 602     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 603       <description>Device interrupt controller interface</description>
 604       <files>
 605         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 606       </files>
 607     </api>
 608     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 609       <description>RTOS Kernel system tick timer interface</description>
 610       <files>
 611         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 612       </files>
 613     </api>
 614     <!-- CMSIS-RTOS API -->
 615     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 616       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 617       <files>
 618         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 619       </files>
 620     </api>
 621     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.2" exclusive="1">
 622       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 623       <files>
 624         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 625         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 626       </files>
 627     </api>
 628     <!-- CMSIS Driver API -->
 629     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 630       <description>USART Driver API for Cortex-M</description>
 631       <files>
 632         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 633         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 634       </files>
 635     </api>
 636     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 637       <description>SPI Driver API for Cortex-M</description>
 638       <files>
 639         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 640         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 641       </files>
 642     </api>
 643     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 644       <description>SAI Driver API for Cortex-M</description>
 645       <files>
 646         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 647         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 648       </files>
 649     </api>
 650     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 651       <description>I2C Driver API for Cortex-M</description>
 652       <files>
 653         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 654         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 655       </files>
 656     </api>
 657     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 658       <description>CAN Driver API for Cortex-M</description>
 659       <files>
 660         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 661         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 662       </files>
 663     </api>
 664     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 665       <description>Flash Driver API for Cortex-M</description>
 666       <files>
 667         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 668         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 669       </files>
 670     </api>
 671     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 672       <description>MCI Driver API for Cortex-M</description>
 673       <files>
 674         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 675         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 676       </files>
 677     </api>
 678     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 679       <description>NAND Flash Driver API for Cortex-M</description>
 680       <files>
 681         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 682         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 683       </files>
 684     </api>
 685     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 686       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 687       <files>
 688         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 689         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 690         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 691       </files>
 692     </api>
 693     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 694       <description>Ethernet MAC Driver API for Cortex-M</description>
 695       <files>
 696         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 697         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 698       </files>
 699     </api>
 700     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 701       <description>Ethernet PHY Driver API for Cortex-M</description>
 702       <files>
 703         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 704         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 705       </files>
 706     </api>
 707     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 708       <description>USB Device Driver API for Cortex-M</description>
 709       <files>
 710         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 711         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 712       </files>
 713     </api>
 714     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 715       <description>USB Host Driver API for Cortex-M</description>
 716       <files>
 717         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 718         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 719       </files>
 720     </api>
 721   </apis>
 722
 723   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 724   <conditions>
 725     <!-- compiler -->
 726     <condition id="ARMCC6">
 727       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 728       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 729     </condition>
 730     <condition id="ARMCC5">
 731       <require Tcompiler="ARMCC" Toptions="AC5"/>
 732     </condition>
 733     <condition id="ARMCC">
 734       <require Tcompiler="ARMCC"/>
 735     </condition>
 736     <condition id="GCC">
 737       <require Tcompiler="GCC"/>
 738     </condition>
 739     <condition id="IAR">
 740       <require Tcompiler="IAR"/>
 741     </condition>
 742     <condition id="ARMCC GCC">
 743       <accept Tcompiler="ARMCC"/>
 744       <accept Tcompiler="GCC"/>
 745     </condition>
 746     <condition id="ARMCC GCC IAR">
 747       <accept Tcompiler="ARMCC"/>
 748       <accept Tcompiler="GCC"/>
 749       <accept Tcompiler="IAR"/>
 750     </condition>
 751
 752     <!-- Arm architecture -->
 753     <condition id="ARMv6-M Device">
 754       <description>Armv6-M architecture based device</description>
 755       <accept Dcore="Cortex-M0"/>
 756       <accept Dcore="Cortex-M0+"/>
 757       <accept Dcore="SC000"/>
 758     </condition>
 759     <condition id="ARMv7-M Device">
 760       <description>Armv7-M architecture based device</description>
 761       <accept Dcore="Cortex-M3"/>
 762       <accept Dcore="Cortex-M4"/>
 763       <accept Dcore="Cortex-M7"/>
 764       <accept Dcore="SC300"/>
 765     </condition>
 766     <condition id="ARMv8-M Device">
 767       <description>Armv8-M architecture based device</description>
 768       <accept Dcore="ARMV8MBL"/>
 769       <accept Dcore="ARMV8MML"/>
 770       <accept Dcore="Cortex-M23"/>
 771       <accept Dcore="Cortex-M33"/>
 772     </condition>
 773     <condition id="ARMv8-M TZ Device">
 774       <description>Armv8-M architecture based device with TrustZone</description>
 775       <require condition="ARMv8-M Device"/>
 776       <require Dtz="TZ"/>
 777     </condition>
 778     <condition id="ARMv6_7-M Device">
 779       <description>Armv6_7-M architecture based device</description>
 780       <accept condition="ARMv6-M Device"/>
 781       <accept condition="ARMv7-M Device"/>
 782     </condition>
 783     <condition id="ARMv6_7_8-M Device">
 784       <description>Armv6_7_8-M architecture based device</description>
 785       <accept condition="ARMv6-M Device"/>
 786       <accept condition="ARMv7-M Device"/>
 787       <accept condition="ARMv8-M Device"/>
 788     </condition>
 789     <condition id="ARMv7-A Device">
 790       <description>Armv7-A architecture based device</description>
 791       <accept Dcore="Cortex-A5"/>
 792       <accept Dcore="Cortex-A7"/>
 793       <accept Dcore="Cortex-A9"/>
 794     </condition>
 795
 796     <!-- ARM core -->
 797     <condition id="CM0">
 798       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 799       <accept Dcore="Cortex-M0"/>
 800       <accept Dcore="Cortex-M0+"/>
 801       <accept Dcore="SC000"/>
 802     </condition>
 803     <condition id="CM3">
 804       <description>Cortex-M3 or SC300 processor based device</description>
 805       <accept Dcore="Cortex-M3"/>
 806       <accept Dcore="SC300"/>
 807     </condition>
 808     <condition id="CM4">
 809       <description>Cortex-M4 processor based device</description>
 810       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 811     </condition>
 812     <condition id="CM4_FP">
 813       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 814       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 815       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 816       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 817     </condition>
 818     <condition id="CM7">
 819       <description>Cortex-M7 processor based device</description>
 820       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 821     </condition>
 822     <condition id="CM7_FP">
 823       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 824       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 825       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 826     </condition>
 827     <condition id="CM7_SP">
 828       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 829       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 830     </condition>
 831     <condition id="CM7_DP">
 832       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 833       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 834     </condition>
 835     <condition id="CM23">
 836       <description>Cortex-M23 processor based device</description>
 837       <require Dcore="Cortex-M23"/>
 838     </condition>
 839     <condition id="CM33">
 840       <description>Cortex-M33 processor based device</description>
 841       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 842     </condition>
 843     <condition id="CM33_FP">
 844       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 845       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 846     </condition>
 847     <condition id="ARMv8MBL">
 848       <description>Armv8-M Baseline processor based device</description>
 849       <require Dcore="ARMV8MBL"/>
 850     </condition>
 851     <condition id="ARMv8MML">
 852       <description>Armv8-M Mainline processor based device</description>
 853       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 854     </condition>
 855     <condition id="ARMv8MML_FP">
 856       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
 857       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 858       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 859     </condition>
 860
 861     <condition id="CM33_NODSP_NOFPU">
 862       <description>CM33, no DSP, no FPU</description>
 863       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 864     </condition>
 865     <condition id="CM33_DSP_NOFPU">
 866       <description>CM33, DSP, no FPU</description>
 867       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 868     </condition>
 869     <condition id="CM33_NODSP_SP">
 870       <description>CM33, no DSP, SP FPU</description>
 871       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 872     </condition>
 873     <condition id="CM33_DSP_SP">
 874       <description>CM33, DSP, SP FPU</description>
 875       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 876     </condition>
 877
 878     <condition id="ARMv8MML_NODSP_NOFPU">
 879       <description>Armv8-M Mainline, no DSP, no FPU</description>
 880       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 881     </condition>
 882     <condition id="ARMv8MML_DSP_NOFPU">
 883       <description>Armv8-M Mainline, DSP, no FPU</description>
 884       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 885     </condition>
 886     <condition id="ARMv8MML_NODSP_SP">
 887       <description>Armv8-M Mainline, no DSP, SP FPU</description>
 888       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 889     </condition>
 890     <condition id="ARMv8MML_DSP_SP">
 891       <description>Armv8-M Mainline, DSP, SP FPU</description>
 892       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 893     </condition>
 894
 895     <condition id="CA5_CA9">
 896       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 897       <accept Dcore="Cortex-A5"/>
 898       <accept Dcore="Cortex-A9"/>
 899     </condition>
 900
 901     <condition id="CA7">
 902       <description>Cortex-A7 processor based device</description>
 903       <accept Dcore="Cortex-A7"/>
 904     </condition>
 905
 906     <!-- ARMCC compiler -->
 907     <condition id="CA_ARMCC5">
 908       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
 909       <require condition="ARMv7-A Device"/>
 910       <require condition="ARMCC5"/>
 911     </condition>
 912     <condition id="CA_ARMCC6">
 913       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
 914       <require condition="ARMv7-A Device"/>
 915       <require condition="ARMCC6"/>
 916     </condition>
 917
 918     <condition id="CM0_ARMCC">
 919       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
 920       <require condition="CM0"/>
 921       <require Tcompiler="ARMCC"/>
 922     </condition>
 923     <condition id="CM0_LE_ARMCC">
 924       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
 925       <require condition="CM0_ARMCC"/>
 926       <require Dendian="Little-endian"/>
 927     </condition>
 928     <condition id="CM0_BE_ARMCC">
 929       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
 930       <require condition="CM0_ARMCC"/>
 931       <require Dendian="Big-endian"/>
 932     </condition>
 933
 934     <condition id="CM3_ARMCC">
 935       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
 936       <require condition="CM3"/>
 937       <require Tcompiler="ARMCC"/>
 938     </condition>
 939     <condition id="CM3_LE_ARMCC">
 940       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
 941       <require condition="CM3_ARMCC"/>
 942       <require Dendian="Little-endian"/>
 943     </condition>
 944     <condition id="CM3_BE_ARMCC">
 945       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
 946       <require condition="CM3_ARMCC"/>
 947       <require Dendian="Big-endian"/>
 948     </condition>
 949
 950     <condition id="CM4_ARMCC">
 951       <description>Cortex-M4 processor based device for the Arm Compiler</description>
 952       <require condition="CM4"/>
 953       <require Tcompiler="ARMCC"/>
 954     </condition>
 955     <condition id="CM4_LE_ARMCC">
 956       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
 957       <require condition="CM4_ARMCC"/>
 958       <require Dendian="Little-endian"/>
 959     </condition>
 960     <condition id="CM4_BE_ARMCC">
 961       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
 962       <require condition="CM4_ARMCC"/>
 963       <require Dendian="Big-endian"/>
 964     </condition>
 965
 966     <condition id="CM4_FP_ARMCC">
 967       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
 968       <require condition="CM4_FP"/>
 969       <require Tcompiler="ARMCC"/>
 970     </condition>
 971     <condition id="CM4_FP_LE_ARMCC">
 972       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
 973       <require condition="CM4_FP_ARMCC"/>
 974       <require Dendian="Little-endian"/>
 975     </condition>
 976     <condition id="CM4_FP_BE_ARMCC">
 977       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
 978       <require condition="CM4_FP_ARMCC"/>
 979       <require Dendian="Big-endian"/>
 980     </condition>
 981
 982     <condition id="CM7_ARMCC">
 983       <description>Cortex-M7 processor based device for the Arm Compiler</description>
 984       <require condition="CM7"/>
 985       <require Tcompiler="ARMCC"/>
 986     </condition>
 987     <condition id="CM7_LE_ARMCC">
 988       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
 989       <require condition="CM7_ARMCC"/>
 990       <require Dendian="Little-endian"/>
 991     </condition>
 992     <condition id="CM7_BE_ARMCC">
 993       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
 994       <require condition="CM7_ARMCC"/>
 995       <require Dendian="Big-endian"/>
 996     </condition>
 997
 998     <condition id="CM7_FP_ARMCC">
 999       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1000       <require condition="CM7_FP"/>
1001       <require Tcompiler="ARMCC"/>
1002     </condition>
1003     <condition id="CM7_FP_LE_ARMCC">
1004       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1005       <require condition="CM7_FP_ARMCC"/>
1006       <require Dendian="Little-endian"/>
1007     </condition>
1008     <condition id="CM7_FP_BE_ARMCC">
1009       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1010       <require condition="CM7_FP_ARMCC"/>
1011       <require Dendian="Big-endian"/>
1012     </condition>
1013
1014     <condition id="CM7_SP_ARMCC">
1015       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1016       <require condition="CM7_SP"/>
1017       <require Tcompiler="ARMCC"/>
1018     </condition>
1019     <condition id="CM7_SP_LE_ARMCC">
1020       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1021       <require condition="CM7_SP_ARMCC"/>
1022       <require Dendian="Little-endian"/>
1023     </condition>
1024     <condition id="CM7_SP_BE_ARMCC">
1025       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1026       <require condition="CM7_SP_ARMCC"/>
1027       <require Dendian="Big-endian"/>
1028     </condition>
1029
1030     <condition id="CM7_DP_ARMCC">
1031       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1032       <require condition="CM7_DP"/>
1033       <require Tcompiler="ARMCC"/>
1034     </condition>
1035     <condition id="CM7_DP_LE_ARMCC">
1036       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1037       <require condition="CM7_DP_ARMCC"/>
1038       <require Dendian="Little-endian"/>
1039     </condition>
1040     <condition id="CM7_DP_BE_ARMCC">
1041       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1042       <require condition="CM7_DP_ARMCC"/>
1043       <require Dendian="Big-endian"/>
1044     </condition>
1045
1046     <condition id="CM23_ARMCC">
1047       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1048       <require condition="CM23"/>
1049       <require Tcompiler="ARMCC"/>
1050     </condition>
1051     <condition id="CM23_LE_ARMCC">
1052       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1053       <require condition="CM23_ARMCC"/>
1054       <require Dendian="Little-endian"/>
1055     </condition>
1056     <condition id="CM23_BE_ARMCC">
1057       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1058       <require condition="CM23_ARMCC"/>
1059       <require Dendian="Big-endian"/>
1060     </condition>
1061
1062     <condition id="CM33_ARMCC">
1063       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1064       <require condition="CM33"/>
1065       <require Tcompiler="ARMCC"/>
1066     </condition>
1067     <condition id="CM33_LE_ARMCC">
1068       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1069       <require condition="CM33_ARMCC"/>
1070       <require Dendian="Little-endian"/>
1071     </condition>
1072     <condition id="CM33_BE_ARMCC">
1073       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1074       <require condition="CM33_ARMCC"/>
1075       <require Dendian="Big-endian"/>
1076     </condition>
1077
1078     <condition id="CM33_FP_ARMCC">
1079       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1080       <require condition="CM33_FP"/>
1081       <require Tcompiler="ARMCC"/>
1082     </condition>
1083     <condition id="CM33_FP_LE_ARMCC">
1084       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1085       <require condition="CM33_FP_ARMCC"/>
1086       <require Dendian="Little-endian"/>
1087     </condition>
1088     <condition id="CM33_FP_BE_ARMCC">
1089       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1090       <require condition="CM33_FP_ARMCC"/>
1091       <require Dendian="Big-endian"/>
1092     </condition>
1093
1094     <condition id="CM33_NODSP_NOFPU_ARMCC">
1095       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1096       <require condition="CM33_NODSP_NOFPU"/>
1097       <require Tcompiler="ARMCC"/>
1098     </condition>
1099     <condition id="CM33_DSP_NOFPU_ARMCC">
1100       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1101       <require condition="CM33_DSP_NOFPU"/>
1102       <require Tcompiler="ARMCC"/>
1103     </condition>
1104     <condition id="CM33_NODSP_SP_ARMCC">
1105       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1106       <require condition="CM33_NODSP_SP"/>
1107       <require Tcompiler="ARMCC"/>
1108     </condition>
1109     <condition id="CM33_DSP_SP_ARMCC">
1110       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1111       <require condition="CM33_DSP_SP"/>
1112       <require Tcompiler="ARMCC"/>
1113     </condition>
1114     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1115       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1116       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1117       <require Dendian="Little-endian"/>
1118     </condition>
1119     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1120       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1121       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1122       <require Dendian="Little-endian"/>
1123     </condition>
1124     <condition id="CM33_NODSP_SP_LE_ARMCC">
1125       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1126       <require condition="CM33_NODSP_SP_ARMCC"/>
1127       <require Dendian="Little-endian"/>
1128     </condition>
1129     <condition id="CM33_DSP_SP_LE_ARMCC">
1130       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1131       <require condition="CM33_DSP_SP_ARMCC"/>
1132       <require Dendian="Little-endian"/>
1133     </condition>
1134
1135     <condition id="ARMv8MBL_ARMCC">
1136       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1137       <require condition="ARMv8MBL"/>
1138       <require Tcompiler="ARMCC"/>
1139     </condition>
1140     <condition id="ARMv8MBL_LE_ARMCC">
1141       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1142       <require condition="ARMv8MBL_ARMCC"/>
1143       <require Dendian="Little-endian"/>
1144     </condition>
1145     <condition id="ARMv8MBL_BE_ARMCC">
1146       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1147       <require condition="ARMv8MBL_ARMCC"/>
1148       <require Dendian="Big-endian"/>
1149     </condition>
1150
1151     <condition id="ARMv8MML_ARMCC">
1152       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1153       <require condition="ARMv8MML"/>
1154       <require Tcompiler="ARMCC"/>
1155     </condition>
1156     <condition id="ARMv8MML_LE_ARMCC">
1157       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1158       <require condition="ARMv8MML_ARMCC"/>
1159       <require Dendian="Little-endian"/>
1160     </condition>
1161     <condition id="ARMv8MML_BE_ARMCC">
1162       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1163       <require condition="ARMv8MML_ARMCC"/>
1164       <require Dendian="Big-endian"/>
1165     </condition>
1166
1167     <condition id="ARMv8MML_FP_ARMCC">
1168       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1169       <require condition="ARMv8MML_FP"/>
1170       <require Tcompiler="ARMCC"/>
1171     </condition>
1172     <condition id="ARMv8MML_FP_LE_ARMCC">
1173       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1174       <require condition="ARMv8MML_FP_ARMCC"/>
1175       <require Dendian="Little-endian"/>
1176     </condition>
1177     <condition id="ARMv8MML_FP_BE_ARMCC">
1178       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1179       <require condition="ARMv8MML_FP_ARMCC"/>
1180       <require Dendian="Big-endian"/>
1181     </condition>
1182
1183     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1184       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1185       <require condition="ARMv8MML_NODSP_NOFPU"/>
1186       <require Tcompiler="ARMCC"/>
1187     </condition>
1188     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1189       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1190       <require condition="ARMv8MML_DSP_NOFPU"/>
1191       <require Tcompiler="ARMCC"/>
1192     </condition>
1193     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1194       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1195       <require condition="ARMv8MML_NODSP_SP"/>
1196       <require Tcompiler="ARMCC"/>
1197     </condition>
1198     <condition id="ARMv8MML_DSP_SP_ARMCC">
1199       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1200       <require condition="ARMv8MML_DSP_SP"/>
1201       <require Tcompiler="ARMCC"/>
1202     </condition>
1203     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1204       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1205       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1206       <require Dendian="Little-endian"/>
1207     </condition>
1208     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1209       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1210       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1211       <require Dendian="Little-endian"/>
1212     </condition>
1213     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1214       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1215       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1216       <require Dendian="Little-endian"/>
1217     </condition>
1218     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1219       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1220       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1221       <require Dendian="Little-endian"/>
1222     </condition>
1223
1224     <!-- GCC compiler -->
1225     <condition id="CA_GCC">
1226       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1227       <require condition="ARMv7-A Device"/>
1228       <require Tcompiler="GCC"/>
1229     </condition>
1230
1231     <condition id="CM0_GCC">
1232       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1233       <require condition="CM0"/>
1234       <require Tcompiler="GCC"/>
1235     </condition>
1236     <condition id="CM0_LE_GCC">
1237       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1238       <require condition="CM0_GCC"/>
1239       <require Dendian="Little-endian"/>
1240     </condition>
1241     <condition id="CM0_BE_GCC">
1242       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1243       <require condition="CM0_GCC"/>
1244       <require Dendian="Big-endian"/>
1245     </condition>
1246
1247     <condition id="CM3_GCC">
1248       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1249       <require condition="CM3"/>
1250       <require Tcompiler="GCC"/>
1251     </condition>
1252     <condition id="CM3_LE_GCC">
1253       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1254       <require condition="CM3_GCC"/>
1255       <require Dendian="Little-endian"/>
1256     </condition>
1257     <condition id="CM3_BE_GCC">
1258       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1259       <require condition="CM3_GCC"/>
1260       <require Dendian="Big-endian"/>
1261     </condition>
1262
1263     <condition id="CM4_GCC">
1264       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1265       <require condition="CM4"/>
1266       <require Tcompiler="GCC"/>
1267     </condition>
1268     <condition id="CM4_LE_GCC">
1269       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1270       <require condition="CM4_GCC"/>
1271       <require Dendian="Little-endian"/>
1272     </condition>
1273     <condition id="CM4_BE_GCC">
1274       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1275       <require condition="CM4_GCC"/>
1276       <require Dendian="Big-endian"/>
1277     </condition>
1278
1279     <condition id="CM4_FP_GCC">
1280       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1281       <require condition="CM4_FP"/>
1282       <require Tcompiler="GCC"/>
1283     </condition>
1284     <condition id="CM4_FP_LE_GCC">
1285       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1286       <require condition="CM4_FP_GCC"/>
1287       <require Dendian="Little-endian"/>
1288     </condition>
1289     <condition id="CM4_FP_BE_GCC">
1290       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1291       <require condition="CM4_FP_GCC"/>
1292       <require Dendian="Big-endian"/>
1293     </condition>
1294
1295     <condition id="CM7_GCC">
1296       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1297       <require condition="CM7"/>
1298       <require Tcompiler="GCC"/>
1299     </condition>
1300     <condition id="CM7_LE_GCC">
1301       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1302       <require condition="CM7_GCC"/>
1303       <require Dendian="Little-endian"/>
1304     </condition>
1305     <condition id="CM7_BE_GCC">
1306       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1307       <require condition="CM7_GCC"/>
1308       <require Dendian="Big-endian"/>
1309     </condition>
1310
1311     <condition id="CM7_FP_GCC">
1312       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1313       <require condition="CM7_FP"/>
1314       <require Tcompiler="GCC"/>
1315     </condition>
1316     <condition id="CM7_FP_LE_GCC">
1317       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1318       <require condition="CM7_FP_GCC"/>
1319       <require Dendian="Little-endian"/>
1320     </condition>
1321     <condition id="CM7_FP_BE_GCC">
1322       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1323       <require condition="CM7_FP_GCC"/>
1324       <require Dendian="Big-endian"/>
1325     </condition>
1326
1327     <condition id="CM7_SP_GCC">
1328       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1329       <require condition="CM7_SP"/>
1330       <require Tcompiler="GCC"/>
1331     </condition>
1332     <condition id="CM7_SP_LE_GCC">
1333       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1334       <require condition="CM7_SP_GCC"/>
1335       <require Dendian="Little-endian"/>
1336     </condition>
1337     <condition id="CM7_SP_BE_GCC">
1338       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1339       <require condition="CM7_SP_GCC"/>
1340       <require Dendian="Big-endian"/>
1341     </condition>
1342
1343     <condition id="CM7_DP_GCC">
1344       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1345       <require condition="CM7_DP"/>
1346       <require Tcompiler="GCC"/>
1347     </condition>
1348     <condition id="CM7_DP_LE_GCC">
1349       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1350       <require condition="CM7_DP_GCC"/>
1351       <require Dendian="Little-endian"/>
1352     </condition>
1353     <condition id="CM7_DP_BE_GCC">
1354       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1355       <require condition="CM7_DP_GCC"/>
1356       <require Dendian="Big-endian"/>
1357     </condition>
1358
1359     <condition id="CM23_GCC">
1360       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1361       <require condition="CM23"/>
1362       <require Tcompiler="GCC"/>
1363     </condition>
1364     <condition id="CM23_LE_GCC">
1365       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1366       <require condition="CM23_GCC"/>
1367       <require Dendian="Little-endian"/>
1368     </condition>
1369     <condition id="CM23_BE_GCC">
1370       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1371       <require condition="CM23_GCC"/>
1372       <require Dendian="Big-endian"/>
1373     </condition>
1374
1375     <condition id="CM33_GCC">
1376       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1377       <require condition="CM33"/>
1378       <require Tcompiler="GCC"/>
1379     </condition>
1380     <condition id="CM33_LE_GCC">
1381       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1382       <require condition="CM33_GCC"/>
1383       <require Dendian="Little-endian"/>
1384     </condition>
1385     <condition id="CM33_BE_GCC">
1386       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1387       <require condition="CM33_GCC"/>
1388       <require Dendian="Big-endian"/>
1389     </condition>
1390
1391     <condition id="CM33_FP_GCC">
1392       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1393       <require condition="CM33_FP"/>
1394       <require Tcompiler="GCC"/>
1395     </condition>
1396     <condition id="CM33_FP_LE_GCC">
1397       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1398       <require condition="CM33_FP_GCC"/>
1399       <require Dendian="Little-endian"/>
1400     </condition>
1401     <condition id="CM33_FP_BE_GCC">
1402       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1403       <require condition="CM33_FP_GCC"/>
1404       <require Dendian="Big-endian"/>
1405     </condition>
1406
1407     <condition id="CM33_NODSP_NOFPU_GCC">
1408       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1409       <require condition="CM33_NODSP_NOFPU"/>
1410       <require Tcompiler="GCC"/>
1411     </condition>
1412     <condition id="CM33_DSP_NOFPU_GCC">
1413       <description>CM33, DSP, no FPU, GCC Compiler</description>
1414       <require condition="CM33_DSP_NOFPU"/>
1415       <require Tcompiler="GCC"/>
1416     </condition>
1417     <condition id="CM33_NODSP_SP_GCC">
1418       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1419       <require condition="CM33_NODSP_SP"/>
1420       <require Tcompiler="GCC"/>
1421     </condition>
1422     <condition id="CM33_DSP_SP_GCC">
1423       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1424       <require condition="CM33_DSP_SP"/>
1425       <require Tcompiler="GCC"/>
1426     </condition>
1427     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1428       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1429       <require condition="CM33_NODSP_NOFPU_GCC"/>
1430       <require Dendian="Little-endian"/>
1431     </condition>
1432     <condition id="CM33_DSP_NOFPU_LE_GCC">
1433       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1434       <require condition="CM33_DSP_NOFPU_GCC"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437     <condition id="CM33_NODSP_SP_LE_GCC">
1438       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1439       <require condition="CM33_NODSP_SP_GCC"/>
1440       <require Dendian="Little-endian"/>
1441     </condition>
1442     <condition id="CM33_DSP_SP_LE_GCC">
1443       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1444       <require condition="CM33_DSP_SP_GCC"/>
1445       <require Dendian="Little-endian"/>
1446     </condition>
1447
1448     <condition id="ARMv8MBL_GCC">
1449       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1450       <require condition="ARMv8MBL"/>
1451       <require Tcompiler="GCC"/>
1452     </condition>
1453     <condition id="ARMv8MBL_LE_GCC">
1454       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1455       <require condition="ARMv8MBL_GCC"/>
1456       <require Dendian="Little-endian"/>
1457     </condition>
1458     <condition id="ARMv8MBL_BE_GCC">
1459       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1460       <require condition="ARMv8MBL_GCC"/>
1461       <require Dendian="Big-endian"/>
1462     </condition>
1463
1464     <condition id="ARMv8MML_GCC">
1465       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1466       <require condition="ARMv8MML"/>
1467       <require Tcompiler="GCC"/>
1468     </condition>
1469     <condition id="ARMv8MML_LE_GCC">
1470       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1471       <require condition="ARMv8MML_GCC"/>
1472       <require Dendian="Little-endian"/>
1473     </condition>
1474     <condition id="ARMv8MML_BE_GCC">
1475       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1476       <require condition="ARMv8MML_GCC"/>
1477       <require Dendian="Big-endian"/>
1478     </condition>
1479
1480     <condition id="ARMv8MML_FP_GCC">
1481       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1482       <require condition="ARMv8MML_FP"/>
1483       <require Tcompiler="GCC"/>
1484     </condition>
1485     <condition id="ARMv8MML_FP_LE_GCC">
1486       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1487       <require condition="ARMv8MML_FP_GCC"/>
1488       <require Dendian="Little-endian"/>
1489     </condition>
1490     <condition id="ARMv8MML_FP_BE_GCC">
1491       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1492       <require condition="ARMv8MML_FP_GCC"/>
1493       <require Dendian="Big-endian"/>
1494     </condition>
1495
1496     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1497       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1498       <require condition="ARMv8MML_NODSP_NOFPU"/>
1499       <require Tcompiler="GCC"/>
1500     </condition>
1501     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1502       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1503       <require condition="ARMv8MML_DSP_NOFPU"/>
1504       <require Tcompiler="GCC"/>
1505     </condition>
1506     <condition id="ARMv8MML_NODSP_SP_GCC">
1507       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1508       <require condition="ARMv8MML_NODSP_SP"/>
1509       <require Tcompiler="GCC"/>
1510     </condition>
1511     <condition id="ARMv8MML_DSP_SP_GCC">
1512       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1513       <require condition="ARMv8MML_DSP_SP"/>
1514       <require Tcompiler="GCC"/>
1515     </condition>
1516     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1517       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1518       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1519       <require Dendian="Little-endian"/>
1520     </condition>
1521     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1522       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1523       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1527       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1528       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1529       <require Dendian="Little-endian"/>
1530     </condition>
1531     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1532       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1533       <require condition="ARMv8MML_DSP_SP_GCC"/>
1534       <require Dendian="Little-endian"/>
1535     </condition>
1536
1537     <!-- IAR compiler -->
1538     <condition id="CA_IAR">
1539       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1540       <require condition="ARMv7-A Device"/>
1541       <require Tcompiler="IAR"/>
1542     </condition>
1543
1544     <condition id="CM0_IAR">
1545       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1546       <require condition="CM0"/>
1547       <require Tcompiler="IAR"/>
1548     </condition>
1549     <condition id="CM0_LE_IAR">
1550       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1551       <require condition="CM0_IAR"/>
1552       <require Dendian="Little-endian"/>
1553     </condition>
1554     <condition id="CM0_BE_IAR">
1555       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1556       <require condition="CM0_IAR"/>
1557       <require Dendian="Big-endian"/>
1558     </condition>
1559
1560     <condition id="CM3_IAR">
1561       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1562       <require condition="CM3"/>
1563       <require Tcompiler="IAR"/>
1564     </condition>
1565     <condition id="CM3_LE_IAR">
1566       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1567       <require condition="CM3_IAR"/>
1568       <require Dendian="Little-endian"/>
1569     </condition>
1570     <condition id="CM3_BE_IAR">
1571       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1572       <require condition="CM3_IAR"/>
1573       <require Dendian="Big-endian"/>
1574     </condition>
1575
1576     <condition id="CM4_IAR">
1577       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1578       <require condition="CM4"/>
1579       <require Tcompiler="IAR"/>
1580     </condition>
1581     <condition id="CM4_LE_IAR">
1582       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1583       <require condition="CM4_IAR"/>
1584       <require Dendian="Little-endian"/>
1585     </condition>
1586     <condition id="CM4_BE_IAR">
1587       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1588       <require condition="CM4_IAR"/>
1589       <require Dendian="Big-endian"/>
1590     </condition>
1591
1592     <condition id="CM4_FP_IAR">
1593       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1594       <require condition="CM4_FP"/>
1595       <require Tcompiler="IAR"/>
1596     </condition>
1597     <condition id="CM4_FP_LE_IAR">
1598       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1599       <require condition="CM4_FP_IAR"/>
1600       <require Dendian="Little-endian"/>
1601     </condition>
1602     <condition id="CM4_FP_BE_IAR">
1603       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1604       <require condition="CM4_FP_IAR"/>
1605       <require Dendian="Big-endian"/>
1606     </condition>
1607
1608     <condition id="CM7_IAR">
1609       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1610       <require condition="CM7"/>
1611       <require Tcompiler="IAR"/>
1612     </condition>
1613     <condition id="CM7_LE_IAR">
1614       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1615       <require condition="CM7_IAR"/>
1616       <require Dendian="Little-endian"/>
1617     </condition>
1618     <condition id="CM7_BE_IAR">
1619       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1620       <require condition="CM7_IAR"/>
1621       <require Dendian="Big-endian"/>
1622     </condition>
1623
1624     <condition id="CM7_FP_IAR">
1625       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1626       <require condition="CM7_FP"/>
1627       <require Tcompiler="IAR"/>
1628     </condition>
1629     <condition id="CM7_FP_LE_IAR">
1630       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1631       <require condition="CM7_FP_IAR"/>
1632       <require Dendian="Little-endian"/>
1633     </condition>
1634     <condition id="CM7_FP_BE_IAR">
1635       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1636       <require condition="CM7_FP_IAR"/>
1637       <require Dendian="Big-endian"/>
1638     </condition>
1639
1640     <condition id="CM7_SP_IAR">
1641       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1642       <require condition="CM7_SP"/>
1643       <require Tcompiler="IAR"/>
1644     </condition>
1645     <condition id="CM7_SP_LE_IAR">
1646       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1647       <require condition="CM7_SP_IAR"/>
1648       <require Dendian="Little-endian"/>
1649     </condition>
1650     <condition id="CM7_SP_BE_IAR">
1651       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1652       <require condition="CM7_SP_IAR"/>
1653       <require Dendian="Big-endian"/>
1654     </condition>
1655
1656     <condition id="CM7_DP_IAR">
1657       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1658       <require condition="CM7_DP"/>
1659       <require Tcompiler="IAR"/>
1660     </condition>
1661     <condition id="CM7_DP_LE_IAR">
1662       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1663       <require condition="CM7_DP_IAR"/>
1664       <require Dendian="Little-endian"/>
1665     </condition>
1666     <condition id="CM7_DP_BE_IAR">
1667       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1668       <require condition="CM7_DP_IAR"/>
1669       <require Dendian="Big-endian"/>
1670     </condition>
1671
1672     <condition id="CM23_IAR">
1673       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1674       <require condition="CM23"/>
1675       <require Tcompiler="IAR"/>
1676     </condition>
1677     <condition id="CM23_LE_IAR">
1678       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1679       <require condition="CM23_IAR"/>
1680       <require Dendian="Little-endian"/>
1681     </condition>
1682     <condition id="CM23_BE_IAR">
1683       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1684       <require condition="CM23_IAR"/>
1685       <require Dendian="Big-endian"/>
1686     </condition>
1687
1688     <condition id="CM33_IAR">
1689       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1690       <require condition="CM33"/>
1691       <require Tcompiler="IAR"/>
1692     </condition>
1693     <condition id="CM33_LE_IAR">
1694       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1695       <require condition="CM33_IAR"/>
1696       <require Dendian="Little-endian"/>
1697     </condition>
1698     <condition id="CM33_BE_IAR">
1699       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1700       <require condition="CM33_IAR"/>
1701       <require Dendian="Big-endian"/>
1702     </condition>
1703
1704     <condition id="CM33_FP_IAR">
1705       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1706       <require condition="CM33_FP"/>
1707       <require Tcompiler="IAR"/>
1708     </condition>
1709     <condition id="CM33_FP_LE_IAR">
1710       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1711       <require condition="CM33_FP_IAR"/>
1712       <require Dendian="Little-endian"/>
1713     </condition>
1714     <condition id="CM33_FP_BE_IAR">
1715       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1716       <require condition="CM33_FP_IAR"/>
1717       <require Dendian="Big-endian"/>
1718     </condition>
1719
1720     <condition id="CM33_NODSP_NOFPU_IAR">
1721       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1722       <require condition="CM33_NODSP_NOFPU"/>
1723       <require Tcompiler="IAR"/>
1724     </condition>
1725     <condition id="CM33_DSP_NOFPU_IAR">
1726       <description>CM33, DSP, no FPU, IAR Compiler</description>
1727       <require condition="CM33_DSP_NOFPU"/>
1728       <require Tcompiler="IAR"/>
1729     </condition>
1730     <condition id="CM33_NODSP_SP_IAR">
1731       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1732       <require condition="CM33_NODSP_SP"/>
1733       <require Tcompiler="IAR"/>
1734     </condition>
1735     <condition id="CM33_DSP_SP_IAR">
1736       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1737       <require condition="CM33_DSP_SP"/>
1738       <require Tcompiler="IAR"/>
1739     </condition>
1740     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1741       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1742       <require condition="CM33_NODSP_NOFPU_IAR"/>
1743       <require Dendian="Little-endian"/>
1744     </condition>
1745     <condition id="CM33_DSP_NOFPU_LE_IAR">
1746       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1747       <require condition="CM33_DSP_NOFPU_IAR"/>
1748       <require Dendian="Little-endian"/>
1749     </condition>
1750     <condition id="CM33_NODSP_SP_LE_IAR">
1751       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1752       <require condition="CM33_NODSP_SP_IAR"/>
1753       <require Dendian="Little-endian"/>
1754     </condition>
1755     <condition id="CM33_DSP_SP_LE_IAR">
1756       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1757       <require condition="CM33_DSP_SP_IAR"/>
1758       <require Dendian="Little-endian"/>
1759     </condition>
1760
1761     <condition id="ARMv8MBL_IAR">
1762       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1763       <require condition="ARMv8MBL"/>
1764       <require Tcompiler="IAR"/>
1765     </condition>
1766     <condition id="ARMv8MBL_LE_IAR">
1767       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1768       <require condition="ARMv8MBL_IAR"/>
1769       <require Dendian="Little-endian"/>
1770     </condition>
1771     <condition id="ARMv8MBL_BE_IAR">
1772       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1773       <require condition="ARMv8MBL_IAR"/>
1774       <require Dendian="Big-endian"/>
1775     </condition>
1776
1777     <condition id="ARMv8MML_IAR">
1778       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1779       <require condition="ARMv8MML"/>
1780       <require Tcompiler="IAR"/>
1781     </condition>
1782     <condition id="ARMv8MML_LE_IAR">
1783       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1784       <require condition="ARMv8MML_IAR"/>
1785       <require Dendian="Little-endian"/>
1786     </condition>
1787     <condition id="ARMv8MML_BE_IAR">
1788       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1789       <require condition="ARMv8MML_IAR"/>
1790       <require Dendian="Big-endian"/>
1791     </condition>
1792
1793     <condition id="ARMv8MML_FP_IAR">
1794       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1795       <require condition="ARMv8MML_FP"/>
1796       <require Tcompiler="IAR"/>
1797     </condition>
1798     <condition id="ARMv8MML_FP_LE_IAR">
1799       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1800       <require condition="ARMv8MML_FP_IAR"/>
1801       <require Dendian="Little-endian"/>
1802     </condition>
1803     <condition id="ARMv8MML_FP_BE_IAR">
1804       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1805       <require condition="ARMv8MML_FP_IAR"/>
1806       <require Dendian="Big-endian"/>
1807     </condition>
1808
1809     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1810       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
1811       <require condition="ARMv8MML_NODSP_NOFPU"/>
1812       <require Tcompiler="IAR"/>
1813     </condition>
1814     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1815       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
1816       <require condition="ARMv8MML_DSP_NOFPU"/>
1817       <require Tcompiler="IAR"/>
1818     </condition>
1819     <condition id="ARMv8MML_NODSP_SP_IAR">
1820       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
1821       <require condition="ARMv8MML_NODSP_SP"/>
1822       <require Tcompiler="IAR"/>
1823     </condition>
1824     <condition id="ARMv8MML_DSP_SP_IAR">
1825       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
1826       <require condition="ARMv8MML_DSP_SP"/>
1827       <require Tcompiler="IAR"/>
1828     </condition>
1829     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1830       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
1831       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1832       <require Dendian="Little-endian"/>
1833     </condition>
1834     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1835       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
1836       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1837       <require Dendian="Little-endian"/>
1838     </condition>
1839     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1840       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
1841       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1842       <require Dendian="Little-endian"/>
1843     </condition>
1844     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1845       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
1846       <require condition="ARMv8MML_DSP_SP_IAR"/>
1847       <require Dendian="Little-endian"/>
1848     </condition>
1849
1850     <!-- conditions selecting single devices and CMSIS Core -->
1851     <!-- used for component startup, GCC version is used for C-Startup -->
1852     <condition id="ARMCM0 CMSIS">
1853       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1854       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1855       <require Cclass="CMSIS" Cgroup="CORE"/>
1856     </condition>
1857     <condition id="ARMCM0 CMSIS GCC">
1858       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1859       <require condition="ARMCM0 CMSIS"/>
1860       <require condition="GCC"/>
1861     </condition>
1862
1863     <condition id="ARMCM0+ CMSIS">
1864       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1865       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1866       <require Cclass="CMSIS" Cgroup="CORE"/>
1867     </condition>
1868     <condition id="ARMCM0+ CMSIS GCC">
1869       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1870       <require condition="ARMCM0+ CMSIS"/>
1871       <require condition="GCC"/>
1872     </condition>
1873
1874     <condition id="ARMCM3 CMSIS">
1875       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1876       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1877       <require Cclass="CMSIS" Cgroup="CORE"/>
1878     </condition>
1879     <condition id="ARMCM3 CMSIS GCC">
1880       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1881       <require condition="ARMCM3 CMSIS"/>
1882       <require condition="GCC"/>
1883     </condition>
1884
1885     <condition id="ARMCM4 CMSIS">
1886       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1887       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1888       <require Cclass="CMSIS" Cgroup="CORE"/>
1889     </condition>
1890     <condition id="ARMCM4 CMSIS GCC">
1891       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1892       <require condition="ARMCM4 CMSIS"/>
1893       <require condition="GCC"/>
1894     </condition>
1895
1896     <condition id="ARMCM7 CMSIS">
1897       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1898       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1899       <require Cclass="CMSIS" Cgroup="CORE"/>
1900     </condition>
1901     <condition id="ARMCM7 CMSIS GCC">
1902       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1903       <require condition="ARMCM7 CMSIS"/>
1904       <require condition="GCC"/>
1905     </condition>
1906
1907     <condition id="ARMCM23 CMSIS">
1908       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1909       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1910       <require Cclass="CMSIS" Cgroup="CORE"/>
1911     </condition>
1912     <condition id="ARMCM23 CMSIS GCC">
1913       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1914       <require condition="ARMCM23 CMSIS"/>
1915       <require condition="GCC"/>
1916     </condition>
1917
1918     <condition id="ARMCM33 CMSIS">
1919       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1920       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1921       <require Cclass="CMSIS" Cgroup="CORE"/>
1922     </condition>
1923     <condition id="ARMCM33 CMSIS GCC">
1924       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1925       <require condition="ARMCM33 CMSIS"/>
1926       <require condition="GCC"/>
1927     </condition>
1928
1929     <condition id="ARMSC000 CMSIS">
1930       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1931       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1932       <require Cclass="CMSIS" Cgroup="CORE"/>
1933     </condition>
1934     <condition id="ARMSC000 CMSIS GCC">
1935       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
1936       <require condition="ARMSC000 CMSIS"/>
1937       <require condition="GCC"/>
1938     </condition>
1939
1940     <condition id="ARMSC300 CMSIS">
1941       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1942       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1943       <require Cclass="CMSIS" Cgroup="CORE"/>
1944     </condition>
1945     <condition id="ARMSC300 CMSIS GCC">
1946       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
1947       <require condition="ARMSC300 CMSIS"/>
1948       <require condition="GCC"/>
1949     </condition>
1950
1951     <condition id="ARMv8MBL CMSIS">
1952       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1953       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1954       <require Cclass="CMSIS" Cgroup="CORE"/>
1955     </condition>
1956     <condition id="ARMv8MBL CMSIS GCC">
1957       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
1958       <require condition="ARMv8MBL CMSIS"/>
1959       <require condition="GCC"/>
1960     </condition>
1961
1962     <condition id="ARMv8MML CMSIS">
1963       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1964       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1965       <require Cclass="CMSIS" Cgroup="CORE"/>
1966     </condition>
1967     <condition id="ARMv8MML CMSIS GCC">
1968       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
1969       <require condition="ARMv8MML CMSIS"/>
1970       <require condition="GCC"/>
1971     </condition>
1972
1973     <condition id="ARMCA5 CMSIS">
1974       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
1975       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1976       <require Cclass="CMSIS" Cgroup="CORE"/>
1977     </condition>
1978
1979     <condition id="ARMCA7 CMSIS">
1980       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
1981       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1982       <require Cclass="CMSIS" Cgroup="CORE"/>
1983     </condition>
1984
1985     <condition id="ARMCA9 CMSIS">
1986       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
1987       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1988       <require Cclass="CMSIS" Cgroup="CORE"/>
1989     </condition>
1990
1991     <!-- CMSIS DSP -->
1992     <condition id="CMSIS DSP">
1993       <description>Components required for DSP</description>
1994       <require condition="ARMv6_7_8-M Device"/>
1995       <require condition="ARMCC GCC"/>
1996       <require Cclass="CMSIS" Cgroup="CORE"/>
1997     </condition>
1998
1999     <!-- CMSIS NN -->
2000     <condition id="CMSIS NN">
2001       <description>Components required for NN</description>
2002       <require condition="CMSIS DSP"/>
2003     </condition>
2004
2005     <!-- RTOS RTX -->
2006     <condition id="RTOS RTX">
2007       <description>Components required for RTOS RTX</description>
2008       <require condition="ARMv6_7-M Device"/>
2009       <require condition="ARMCC GCC IAR"/>
2010       <require Cclass="Device" Cgroup="Startup"/>
2011       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2012     </condition>
2013     <condition id="RTOS RTX IFX">
2014       <description>Components required for RTOS RTX IFX</description>
2015       <require condition="ARMv6_7-M Device"/>
2016       <require condition="ARMCC GCC IAR"/>
2017       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2018       <require Cclass="Device" Cgroup="Startup"/>
2019       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2020     </condition>
2021     <condition id="RTOS RTX5">
2022       <description>Components required for RTOS RTX5</description>
2023       <require condition="ARMv6_7_8-M Device"/>
2024       <require condition="ARMCC GCC IAR"/>
2025       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2026     </condition>
2027     <condition id="RTOS2 RTX5">
2028       <description>Components required for RTOS2 RTX5</description>
2029       <require condition="ARMv6_7_8-M Device"/>
2030       <require condition="ARMCC GCC IAR"/>
2031       <require Cclass="CMSIS"  Cgroup="CORE"/>
2032       <require Cclass="Device" Cgroup="Startup"/>
2033     </condition>
2034     <condition id="RTOS2 RTX5 v7-A">
2035       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2036       <require condition="ARMv7-A Device"/>
2037       <require condition="ARMCC GCC IAR"/>
2038       <require Cclass="CMSIS"  Cgroup="CORE"/>
2039       <require Cclass="Device" Cgroup="Startup"/>
2040       <require Cclass="Device" Cgroup="OS Tick"/>
2041       <require Cclass="Device" Cgroup="IRQ Controller"/>
2042     </condition>
2043     <condition id="RTOS2 RTX5 Lib">
2044       <description>Components required for RTOS2 RTX5 Library</description>
2045       <require condition="ARMv6_7_8-M Device"/>
2046       <require condition="ARMCC GCC IAR"/>
2047       <require Cclass="CMSIS"  Cgroup="CORE"/>
2048       <require Cclass="Device" Cgroup="Startup"/>
2049     </condition>
2050     <condition id="RTOS2 RTX5 NS">
2051       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2052       <require condition="ARMv8-M TZ Device"/>
2053       <require condition="ARMCC GCC IAR"/>
2054       <require Cclass="CMSIS"  Cgroup="CORE"/>
2055       <require Cclass="Device" Cgroup="Startup"/>
2056     </condition>
2057
2058     <!-- OS Tick -->
2059     <condition id="OS Tick PTIM">
2060       <description>Components required for OS Tick Private Timer</description>
2061       <require condition="CA5_CA9"/>
2062       <require Cclass="Device" Cgroup="IRQ Controller"/>
2063     </condition>
2064
2065     <condition id="OS Tick GTIM">
2066       <description>Components required for OS Tick Generic Physical Timer</description>
2067       <require condition="CA7"/>
2068       <require Cclass="Device" Cgroup="IRQ Controller"/>
2069     </condition>
2070
2071   </conditions>
2072
2073   <components>
2074     <!-- CMSIS-Core component -->
2075     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2"  condition="ARMv6_7_8-M Device" >
2076       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2077       <files>
2078         <!-- CPU independent -->
2079         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2080         <file category="include" name="CMSIS/Include/"/>
2081         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2082         <!-- Code template -->
2083         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2084         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2085       </files>
2086     </component>
2087
2088     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.1"  condition="ARMv7-A Device" >
2089       <description>CMSIS-CORE for Cortex-A</description>
2090       <files>
2091         <!-- CPU independent -->
2092         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2093         <file category="include" name="CMSIS/Core_A/Include/"/>
2094       </files>
2095     </component>
2096
2097     <!-- CMSIS-Startup components -->
2098     <!-- Cortex-M0 -->
2099     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2100       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2101       <files>
2102         <!-- include folder / device header file -->
2103         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2104         <!-- startup / system file -->
2105         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2106         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2107         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2108         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2109         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2110       </files>
2111     </component>
2112     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2113       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2114       <files>
2115         <!-- include folder / device header file -->
2116         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2117         <!-- startup / system file -->
2118         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2119         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2120         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2121       </files>
2122     </component>
2123
2124     <!-- Cortex-M0+ -->
2125     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2126       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2127       <files>
2128         <!-- include folder / device header file -->
2129         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2130         <!-- startup / system file -->
2131         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2132         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2133         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2134         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2135         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2136       </files>
2137     </component>
2138     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2139       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2140       <files>
2141         <!-- include folder / device header file -->
2142         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2143         <!-- startup / system file -->
2144         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2145         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2146         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2147       </files>
2148     </component>
2149
2150     <!-- Cortex-M3 -->
2151     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2152       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2153       <files>
2154         <!-- include folder / device header file -->
2155         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2156         <!-- startup / system file -->
2157         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2158         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2159         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2160         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2161         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2162       </files>
2163     </component>
2164     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2165       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2166       <files>
2167         <!-- include folder / device header file -->
2168         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2169         <!-- startup / system file -->
2170         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2171         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2172         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2173       </files>
2174     </component>
2175
2176     <!-- Cortex-M4 -->
2177     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2178       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2179       <files>
2180         <!-- include folder / device header file -->
2181         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2182         <!-- startup / system file -->
2183         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2184         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2185         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2186         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2187         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2188       </files>
2189     </component>
2190     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2191       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2192       <files>
2193         <!-- include folder / device header file -->
2194         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2195         <!-- startup / system file -->
2196         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2197         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2198         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2199       </files>
2200     </component>
2201
2202     <!-- Cortex-M7 -->
2203     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2204       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2205       <files>
2206         <!-- include folder / device header file -->
2207         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2208         <!-- startup / system file -->
2209         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2210         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2211         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2212         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2213         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2214       </files>
2215     </component>
2216     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2217       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2218       <files>
2219         <!-- include folder / device header file -->
2220         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2221         <!-- startup / system file -->
2222         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2223         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2224         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2225       </files>
2226     </component>
2227
2228     <!-- Cortex-M23 -->
2229     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2230       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2231       <files>
2232         <!-- include folder / device header file -->
2233         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2234         <!-- startup / system file -->
2235         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2236         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2237         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2238         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2239         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2240         <!-- SAU configuration -->
2241         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2242       </files>
2243     </component>
2244     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2245       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2246       <files>
2247         <!-- include folder / device header file -->
2248         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2249         <!-- startup / system file -->
2250         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2251         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2252         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2253         <!-- SAU configuration -->
2254         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2255       </files>
2256     </component>
2257
2258     <!-- Cortex-M33 -->
2259     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2260       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2261       <files>
2262         <!-- include folder / device header file -->
2263         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2264         <!-- startup / system file -->
2265         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2266         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2267         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2268         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2269         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2270         <!-- SAU configuration -->
2271         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2272       </files>
2273     </component>
2274     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2275       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2276       <files>
2277         <!-- include folder / device header file -->
2278         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2279         <!-- startup / system file -->
2280         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2281         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2282         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2283         <!-- SAU configuration -->
2284         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2285       </files>
2286     </component>
2287
2288     <!-- Cortex-SC000 -->
2289     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2290       <description>System and Startup for Generic Arm SC000 device</description>
2291       <files>
2292         <!-- include folder / device header file -->
2293         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2294         <!-- startup / system file -->
2295         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2296         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2297         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2298         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2299         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2300       </files>
2301     </component>
2302     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2303       <description>System and Startup for Generic Arm SC000 device</description>
2304       <files>
2305         <!-- include folder / device header file -->
2306         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2307         <!-- startup / system file -->
2308         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2309         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2310         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2311       </files>
2312     </component>
2313
2314     <!-- Cortex-SC300 -->
2315     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2316       <description>System and Startup for Generic Arm SC300 device</description>
2317       <files>
2318         <!-- include folder / device header file -->
2319         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2320         <!-- startup / system file -->
2321         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2322         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2323         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2324         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2325         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2326       </files>
2327     </component>
2328     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2329       <description>System and Startup for Generic Arm SC300 device</description>
2330       <files>
2331         <!-- include folder / device header file -->
2332         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2333         <!-- startup / system file -->
2334         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2335         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2336         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2337       </files>
2338     </component>
2339
2340     <!-- ARMv8MBL -->
2341     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2342       <description>System and Startup for Generic Armv8-M Baseline device</description>
2343       <files>
2344         <!-- include folder / device header file -->
2345         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2346         <!-- startup / system file -->
2347         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2348         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2349         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2350         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2351         <!-- SAU configuration -->
2352         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2353       </files>
2354     </component>
2355     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2356       <description>System and Startup for Generic Armv8-M Baseline device</description>
2357       <files>
2358         <!-- include folder / device header file -->
2359         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2360         <!-- startup / system file -->
2361         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2362         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2363         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2364         <!-- SAU configuration -->
2365         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2366       </files>
2367     </component>
2368
2369     <!-- ARMv8MML -->
2370     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2371       <description>System and Startup for Generic Armv8-M Mainline device</description>
2372       <files>
2373         <!-- include folder / device header file -->
2374         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2375         <!-- startup / system file -->
2376         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2377         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2378         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2379         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2380         <!-- SAU configuration -->
2381         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2382       </files>
2383     </component>
2384     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2385       <description>System and Startup for Generic Armv8-M Mainline device</description>
2386       <files>
2387         <!-- include folder / device header file -->
2388         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2389         <!-- startup / system file -->
2390         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2391         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2392         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2393         <!-- SAU configuration -->
2394         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2395       </files>
2396     </component>
2397
2398     <!-- Cortex-A5 -->
2399     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2400       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2401       <files>
2402         <!-- include folder / device header file -->
2403         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2404         <!-- startup / system / mmu files -->
2405         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2406         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2407         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2408         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2409         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2410         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2411         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2412         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2413         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2414         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2415         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2416         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2417
2418       </files>
2419     </component>
2420
2421     <!-- Cortex-A7 -->
2422     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2423       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2424       <files>
2425         <!-- include folder / device header file -->
2426         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2427         <!-- startup / system / mmu files -->
2428         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2429         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2430         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2431         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2432         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2433         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2434         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2435         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2436         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2437         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2438         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2439         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2440       </files>
2441     </component>
2442
2443     <!-- Cortex-A9 -->
2444     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2445       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2446       <files>
2447         <!-- include folder / device header file -->
2448         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2449         <!-- startup / system / mmu files -->
2450         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2451         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2452         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2453         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2454         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2455         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2456         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2457         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2458         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2459         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2460         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2461         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2462       </files>
2463     </component>
2464
2465     <!-- IRQ Controller -->
2466     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2467       <description>IRQ Controller implementation using GIC</description>
2468       <files>
2469         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2470       </files>
2471     </component>
2472
2473     <!-- OS Tick -->
2474     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick PTIM">
2475       <description>OS Tick implementation using Private Timer</description>
2476       <files>
2477         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2478       </files>
2479     </component>
2480
2481     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2482       <description>OS Tick implementation using Generic Physical Timer</description>
2483       <files>
2484         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2485       </files>
2486     </component>
2487
2488     <!-- CMSIS-DSP component -->
2489     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2490       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2491       <files>
2492         <!-- CPU independent -->
2493         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2494         <file category="header" name="CMSIS/Include/arm_math.h"/>
2495
2496         <!-- CPU and Compiler dependent -->
2497         <!-- ARMCC -->
2498         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2499         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2500         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2501         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2502         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2503         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2504         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2505         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2506         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2507         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2508         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2509         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2510         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2511         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2512
2513         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2514         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2515         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2516         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2517         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2518         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2519         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2520         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2521         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2522         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2523         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2524         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2525
2526         <!-- GCC -->
2527         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2528         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2529         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2530         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2531         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2532         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2533         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2534
2535         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2536         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2537         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2538         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2539         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2540         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2541         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2542         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2543         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2544         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2545         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2546         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2547
2548       </files>
2549     </component>
2550
2551     <!-- CMSIS-NN component -->
2552     <component Cclass="CMSIS" Cgroup="NN" Cversion="1.0.0" condition="CMSIS NN">
2553       <description>CMSIS-NN Neural Network Library</description>
2554       <files>
2555         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2556         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2557
2558         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2559         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2560         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2561         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2562
2563         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2564         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2565         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2566         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2567         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2568         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2569         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2570         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2571         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2572         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2573         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2574
2575         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2576         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2577         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2578         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2579         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2580         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2581
2582         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2583         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2584         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2585
2586         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2587
2588         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2589         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2590       </files>
2591     </component>
2592
2593     <!-- CMSIS-RTOS Keil RTX component -->
2594     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2595       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2596       <RTE_Components_h>
2597         <!-- the following content goes into file 'RTE_Components.h' -->
2598         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2599         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2600       </RTE_Components_h>
2601       <files>
2602         <!-- CPU independent -->
2603         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2604         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2605         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2606
2607         <!-- RTX templates -->
2608         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2609         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2610         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2611         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2612         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2613         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2614         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2615         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2616         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2617         <!-- tool-chain specific template file -->
2618         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2619         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2620         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2621
2622         <!-- CPU and Compiler dependent -->
2623         <!-- ARMCC -->
2624         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2625         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2626         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2627         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2628         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2629         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2630         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2631         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2632         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2633         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2634         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2635         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2636         <!-- GCC -->
2637         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2638         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2639         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2640         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2641         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2642         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2643         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2644         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2645         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2646         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2647         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2648         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2649         <!-- IAR -->
2650         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2651         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2652         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2653         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2654         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2655         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2656         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2657         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2658         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2659         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2660         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2661         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2662       </files>
2663     </component>
2664     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2665     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2666       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2667       <RTE_Components_h>
2668         <!-- the following content goes into file 'RTE_Components.h' -->
2669         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2670         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2671       </RTE_Components_h>
2672       <files>
2673         <!-- CPU independent -->
2674         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2675         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2676         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2677
2678         <!-- RTX templates -->
2679         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2680         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2681         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2682         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2683         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2684         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2685         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2686         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2687         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2688         <!-- tool-chain specific template file -->
2689         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2690         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2691         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2692
2693         <!-- CPU and Compiler dependent -->
2694         <!-- ARMCC -->
2695         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2696         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2697         <!-- GCC -->
2698         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2699         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2700         <!-- IAR -->
2701       </files>
2702     </component>
2703
2704     <!-- CMSIS-RTOS Keil RTX5 component -->
2705     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.3.0" Capiversion="1.0.0" condition="RTOS RTX5">
2706       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2707       <RTE_Components_h>
2708         <!-- the following content goes into file 'RTE_Components.h' -->
2709         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2710         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2711       </RTE_Components_h>
2712       <files>
2713         <!-- RTX header file -->
2714         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2715         <!-- RTX compatibility module for API V1 -->
2716         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2717       </files>
2718     </component>
2719
2720     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2721     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 Lib">
2722       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
2723       <RTE_Components_h>
2724         <!-- the following content goes into file 'RTE_Components.h' -->
2725         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2726         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2727       </RTE_Components_h>
2728       <files>
2729         <!-- RTX documentation -->
2730         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2731
2732         <!-- RTX header files -->
2733         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2734
2735         <!-- RTX configuration -->
2736         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2737         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2738
2739         <!-- RTX templates -->
2740         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2741         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2742         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2743         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2744         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2745         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2746         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2747         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2748         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2749         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2750
2751         <!-- RTX library configuration -->
2752         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2753
2754         <!-- RTX libraries (CPU and Compiler dependent) -->
2755         <!-- ARMCC -->
2756         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2757         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2758         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2759         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2760         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2761         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2762         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2763         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2764         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2765         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2766         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2767         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2768         <!-- GCC -->
2769         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2770         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2771         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2772         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2773         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2774         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2775         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2776         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2777         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2778         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2779         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2780         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2781         <!-- IAR -->
2782         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2783         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2784         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2785         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2786         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2787         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2788       </files>
2789     </component>
2790     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2791       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
2792       <RTE_Components_h>
2793         <!-- the following content goes into file 'RTE_Components.h' -->
2794         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2795         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2796         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2797       </RTE_Components_h>
2798       <files>
2799         <!-- RTX documentation -->
2800         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2801
2802         <!-- RTX header files -->
2803         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2804
2805         <!-- RTX configuration -->
2806         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2807         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2808
2809         <!-- RTX templates -->
2810         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2811         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2812         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2813         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2814         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2815         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2816         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2817         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2818         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2819         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2820
2821         <!-- RTX library configuration -->
2822         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2823
2824         <!-- RTX libraries (CPU and Compiler dependent) -->
2825         <!-- ARMCC -->
2826         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2827         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2828         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2829         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2830         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2831         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2832         <!-- GCC -->
2833         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2834         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2835         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2836         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2837         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2838         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2839       </files>
2840     </component>
2841     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5">
2842       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
2843       <RTE_Components_h>
2844         <!-- the following content goes into file 'RTE_Components.h' -->
2845         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2846         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2847         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2848       </RTE_Components_h>
2849       <files>
2850         <!-- RTX documentation -->
2851         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2852
2853         <!-- RTX header files -->
2854         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2855
2856         <!-- RTX configuration -->
2857         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2858         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2859
2860         <!-- RTX templates -->
2861         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2862         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2863         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2864         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2865         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2866         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2867         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2868         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2869         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2870         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2871
2872         <!-- RTX sources (core) -->
2873         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2874         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2875         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2876         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2877         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2878         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2879         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2880         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2881         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2882         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2883         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2884         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2885         <!-- RTX sources (library configuration) -->
2886         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2887         <!-- RTX sources (handlers ARMCC) -->
2888         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2889         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2890         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2891         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2892         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2893         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2894         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2895         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2896         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2897         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2898         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2899         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2900         <!-- RTX sources (handlers GCC) -->
2901         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2902         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2903         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2904         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2905         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2906         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2907         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2908         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2909         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2910         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2911         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2912         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2913         <!-- RTX sources (handlers IAR) -->
2914         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2915         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2916         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2917         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2918         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2919         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2920         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
2921         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
2922         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
2923         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
2924         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
2925         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
2926         <!-- OS Tick (SysTick) -->
2927         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2928       </files>
2929     </component>
2930     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 v7-A">
2931       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
2932       <RTE_Components_h>
2933         <!-- the following content goes into file 'RTE_Components.h' -->
2934         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2935         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2936         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2937       </RTE_Components_h>
2938       <files>
2939         <!-- RTX documentation -->
2940         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2941
2942         <!-- RTX header files -->
2943         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2944
2945         <!-- RTX configuration -->
2946         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2947         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2948
2949         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2950
2951         <!-- RTX templates -->
2952         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2953         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2954         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2955         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2956         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2957         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2958         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2959         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2960         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2961         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2962
2963         <!-- RTX sources (core) -->
2964         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2965         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2966         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2967         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2968         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2969         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2970         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2971         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2972         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2973         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2974         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2975         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2976         <!-- RTX sources (library configuration) -->
2977         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2978         <!-- RTX sources (handlers ARMCC) -->
2979         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2980         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2981         <!-- RTX sources (handlers GCC) -->
2982         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2983         <!-- RTX sources (handlers IAR) -->
2984         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2985       </files>
2986     </component>
2987     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2988       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
2989       <RTE_Components_h>
2990         <!-- the following content goes into file 'RTE_Components.h' -->
2991         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2992         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2993         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2994         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2995       </RTE_Components_h>
2996       <files>
2997         <!-- RTX documentation -->
2998         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2999
3000         <!-- RTX header files -->
3001         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3002
3003         <!-- RTX configuration -->
3004         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
3005         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3006
3007         <!-- RTX templates -->
3008         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3009         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3010         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3011         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3012         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3013         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3014         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3015         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3016         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3017         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3018
3019         <!-- RTX sources (core) -->
3020         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3021         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3022         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3023         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3024         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3025         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3026         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3027         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3028         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3029         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3030         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3031         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3032         <!-- RTX sources (library configuration) -->
3033         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3034         <!-- RTX sources (ARMCC handlers) -->
3035         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3036         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3037         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3038         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3039         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3040         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3041         <!-- RTX sources (GCC handlers) -->
3042         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3043         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3044         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3045         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3046         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3047         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3048         <!-- RTX sources (IAR handlers) -->
3049         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3050         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3051         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3052         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3053         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3054         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3055         <!-- OS Tick (SysTick) -->
3056         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3057       </files>
3058     </component>
3059
3060   </components>
3061
3062   <boards>
3063     <board name="uVision Simulator" vendor="Keil">
3064       <description>uVision Simulator</description>
3065       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3066       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3067       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3068       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3069       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3070       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3071       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3072       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3073       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3074       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3075       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3076       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3077       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3078       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3079       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3080       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3081       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3082       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3083       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3084     </board>
3085
3086     <board name="Fixed Virtual Platform" vendor="ARM">
3087       <description>Fixed Virtual Platform</description>
3088       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3089       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3090       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3091     </board>
3092   </boards>
3093
3094   <examples>
3095     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
3096       <description>DSP_Lib Class Marks example</description>
3097       <board name="uVision Simulator" vendor="Keil"/>
3098       <project>
3099         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3100       </project>
3101       <attributes>
3102         <component Cclass="CMSIS" Cgroup="CORE"/>
3103         <component Cclass="CMSIS" Cgroup="DSP"/>
3104         <component Cclass="Device" Cgroup="Startup"/>
3105         <category>Getting Started</category>
3106       </attributes>
3107     </example>
3108
3109     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
3110       <description>DSP_Lib Convolution example</description>
3111       <board name="uVision Simulator" vendor="Keil"/>
3112       <project>
3113         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3114       </project>
3115       <attributes>
3116         <component Cclass="CMSIS" Cgroup="CORE"/>
3117         <component Cclass="CMSIS" Cgroup="DSP"/>
3118         <component Cclass="Device" Cgroup="Startup"/>
3119         <category>Getting Started</category>
3120       </attributes>
3121     </example>
3122
3123     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
3124       <description>DSP_Lib Dotproduct example</description>
3125       <board name="uVision Simulator" vendor="Keil"/>
3126       <project>
3127         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3128       </project>
3129       <attributes>
3130         <component Cclass="CMSIS" Cgroup="CORE"/>
3131         <component Cclass="CMSIS" Cgroup="DSP"/>
3132         <component Cclass="Device" Cgroup="Startup"/>
3133         <category>Getting Started</category>
3134       </attributes>
3135     </example>
3136
3137     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
3138       <description>DSP_Lib FFT Bin example</description>
3139       <board name="uVision Simulator" vendor="Keil"/>
3140       <project>
3141         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3142       </project>
3143       <attributes>
3144         <component Cclass="CMSIS" Cgroup="CORE"/>
3145         <component Cclass="CMSIS" Cgroup="DSP"/>
3146         <component Cclass="Device" Cgroup="Startup"/>
3147         <category>Getting Started</category>
3148       </attributes>
3149     </example>
3150
3151     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
3152       <description>DSP_Lib FIR example</description>
3153       <board name="uVision Simulator" vendor="Keil"/>
3154       <project>
3155         <environment name="uv" load="arm_fir_example.uvprojx"/>
3156       </project>
3157       <attributes>
3158         <component Cclass="CMSIS" Cgroup="CORE"/>
3159         <component Cclass="CMSIS" Cgroup="DSP"/>
3160         <component Cclass="Device" Cgroup="Startup"/>
3161         <category>Getting Started</category>
3162       </attributes>
3163     </example>
3164
3165     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
3166       <description>DSP_Lib Graphic Equalizer example</description>
3167       <board name="uVision Simulator" vendor="Keil"/>
3168       <project>
3169         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3170       </project>
3171       <attributes>
3172         <component Cclass="CMSIS" Cgroup="CORE"/>
3173         <component Cclass="CMSIS" Cgroup="DSP"/>
3174         <component Cclass="Device" Cgroup="Startup"/>
3175         <category>Getting Started</category>
3176       </attributes>
3177     </example>
3178
3179     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
3180       <description>DSP_Lib Linear Interpolation example</description>
3181       <board name="uVision Simulator" vendor="Keil"/>
3182       <project>
3183         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3184       </project>
3185       <attributes>
3186         <component Cclass="CMSIS" Cgroup="CORE"/>
3187         <component Cclass="CMSIS" Cgroup="DSP"/>
3188         <component Cclass="Device" Cgroup="Startup"/>
3189         <category>Getting Started</category>
3190       </attributes>
3191     </example>
3192
3193     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
3194       <description>DSP_Lib Matrix example</description>
3195       <board name="uVision Simulator" vendor="Keil"/>
3196       <project>
3197         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3198       </project>
3199       <attributes>
3200         <component Cclass="CMSIS" Cgroup="CORE"/>
3201         <component Cclass="CMSIS" Cgroup="DSP"/>
3202         <component Cclass="Device" Cgroup="Startup"/>
3203         <category>Getting Started</category>
3204       </attributes>
3205     </example>
3206
3207     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
3208       <description>DSP_Lib Signal Convergence example</description>
3209       <board name="uVision Simulator" vendor="Keil"/>
3210       <project>
3211         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3212       </project>
3213       <attributes>
3214         <component Cclass="CMSIS" Cgroup="CORE"/>
3215         <component Cclass="CMSIS" Cgroup="DSP"/>
3216         <component Cclass="Device" Cgroup="Startup"/>
3217         <category>Getting Started</category>
3218       </attributes>
3219     </example>
3220
3221     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
3222       <description>DSP_Lib Sinus/Cosinus example</description>
3223       <board name="uVision Simulator" vendor="Keil"/>
3224       <project>
3225         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3226       </project>
3227       <attributes>
3228         <component Cclass="CMSIS" Cgroup="CORE"/>
3229         <component Cclass="CMSIS" Cgroup="DSP"/>
3230         <component Cclass="Device" Cgroup="Startup"/>
3231         <category>Getting Started</category>
3232       </attributes>
3233     </example>
3234
3235     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
3236       <description>DSP_Lib Variance example</description>
3237       <board name="uVision Simulator" vendor="Keil"/>
3238       <project>
3239         <environment name="uv" load="arm_variance_example.uvprojx"/>
3240       </project>
3241       <attributes>
3242         <component Cclass="CMSIS" Cgroup="CORE"/>
3243         <component Cclass="CMSIS" Cgroup="DSP"/>
3244         <component Cclass="Device" Cgroup="Startup"/>
3245         <category>Getting Started</category>
3246       </attributes>
3247     </example>
3248
3249     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3250       <description>Neural Network CIFAR10 example</description>
3251       <board name="uVision Simulator" vendor="Keil"/>
3252       <project>
3253         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3254       </project>
3255       <attributes>
3256         <component Cclass="CMSIS" Cgroup="CORE"/>
3257         <component Cclass="CMSIS" Cgroup="DSP"/>
3258         <component Cclass="CMSIS" Cgroup="NN"/>
3259         <component Cclass="Device" Cgroup="Startup"/>
3260         <category>Getting Started</category>
3261       </attributes>
3262     </example>
3263
3264     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3265       <description>Neural Network GRU example</description>
3266       <board name="uVision Simulator" vendor="Keil"/>
3267       <project>
3268         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3269       </project>
3270       <attributes>
3271         <component Cclass="CMSIS" Cgroup="CORE"/>
3272         <component Cclass="CMSIS" Cgroup="DSP"/>
3273         <component Cclass="CMSIS" Cgroup="NN"/>
3274         <component Cclass="Device" Cgroup="Startup"/>
3275         <category>Getting Started</category>
3276       </attributes>
3277     </example>
3278
3279     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3280       <description>CMSIS-RTOS2 Blinky example</description>
3281       <board name="uVision Simulator" vendor="Keil"/>
3282       <project>
3283         <environment name="uv" load="Blinky.uvprojx"/>
3284       </project>
3285       <attributes>
3286         <component Cclass="CMSIS" Cgroup="CORE"/>
3287         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3288         <component Cclass="Device" Cgroup="Startup"/>
3289         <category>Getting Started</category>
3290       </attributes>
3291     </example>
3292
3293     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3294       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3295       <board name="uVision Simulator" vendor="Keil"/>
3296       <project>
3297         <environment name="uv" load="Blinky.uvprojx"/>
3298       </project>
3299       <attributes>
3300         <component Cclass="CMSIS" Cgroup="CORE"/>
3301         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3302         <component Cclass="Device" Cgroup="Startup"/>
3303         <category>Getting Started</category>
3304       </attributes>
3305     </example>
3306
3307     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3308       <description>CMSIS-RTOS2 Message Queue Example</description>
3309       <board name="uVision Simulator" vendor="Keil"/>
3310       <project>
3311         <environment name="uv" load="MsqQueue.uvprojx"/>
3312       </project>
3313       <attributes>
3314         <component Cclass="CMSIS" Cgroup="CORE"/>
3315         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3316         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3317         <component Cclass="Device" Cgroup="Startup"/>
3318         <category>Getting Started</category>
3319       </attributes>
3320     </example>
3321
3322     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3323       <description>CMSIS-RTOS2 Memory Pool Example</description>
3324       <board name="Fixed Virtual Platform" vendor="ARM"/>
3325       <project>
3326         <environment name="uv" load="MemPool.uvprojx"/>
3327       </project>
3328       <attributes>
3329         <component Cclass="CMSIS" Cgroup="CORE"/>
3330         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3331         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3332         <component Cclass="Device" Cgroup="Startup"/>
3333         <category>Getting Started</category>
3334       </attributes>
3335     </example>
3336
3337     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3338       <description>Bare-metal secure/non-secure example without RTOS</description>
3339       <board name="uVision Simulator" vendor="Keil"/>
3340       <project>
3341         <environment name="uv" load="NoRTOS.uvmpw"/>
3342       </project>
3343       <attributes>
3344         <component Cclass="CMSIS" Cgroup="CORE"/>
3345         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3346         <component Cclass="Device" Cgroup="Startup"/>
3347         <category>Getting Started</category>
3348       </attributes>
3349     </example>
3350
3351     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3352       <description>Secure/non-secure RTOS example with thread context management</description>
3353       <board name="uVision Simulator" vendor="Keil"/>
3354       <project>
3355         <environment name="uv" load="RTOS.uvmpw"/>
3356       </project>
3357       <attributes>
3358         <component Cclass="CMSIS" Cgroup="CORE"/>
3359         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3360         <component Cclass="Device" Cgroup="Startup"/>
3361         <category>Getting Started</category>
3362       </attributes>
3363     </example>
3364
3365     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3366       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3367       <board name="uVision Simulator" vendor="Keil"/>
3368       <project>
3369         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3370       </project>
3371       <attributes>
3372         <component Cclass="CMSIS" Cgroup="CORE"/>
3373         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3374         <component Cclass="Device" Cgroup="Startup"/>
3375         <category>Getting Started</category>
3376       </attributes>
3377     </example>
3378
3379   </examples>
3380
3381 </package>