begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.2.0-rc1">
  12       CMSIS-Core(M): 5.1.0 (see revision history for details)
  13         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  14         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  15       CMSIS-Core(A): 1.1.0 (see revision history for details)
  16         - Added compiler_iccarm.h.
  17         - Added additional access functions for physical timer.
  18       CMSIS-DAP: 1.2.0 (see revision history for details)
  19       CMSIS-DSP: 1.5.2 (see revision history for details)
  20       CMSIS-Driver:
  21         - CAN Driver API V1.2.0
  22       CMSIS-RTOS:
  23         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  24       CMSIS-RTOS2:
  25         - API 2.1.2 (see revision history for details)
  26         - RTX 5.2.3 (see revision history for details)
  27       Devices:
  28         - Added GCC startup and linker script for Cortex-A9.
  29         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  30         - Added IAR startup code for Cortex-A9
  31     </release>
  32     <release version="5.1.2-dev3">
  33       Active development...
  34       CMSIS-Core(A): 1.0.1 (see revision history for details)
  35         - Added compiler_iccarm.h.
  36         - Added additional access functions for physical timer.
  37       CMSIS-RTOS2:
  38         - API 2.1.2 (see revision history for details)
  39       CMSIS-RTOS2:
  40         - RTX 5.2.3 (see revision history for details)
  41       Devices:
  42         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  43         - Added IAR startup code for Cortex-A9
  44     </release>
  45     <release version="5.1.2-dev2">
  46       CMSIS-Core(M): 5.0.3 (see revision history for details)
  47         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  48       CMSIS-RTOS2:
  49         - RTX 5.2.2 (see revision history for details)
  50     </release>
  51     <release version="5.1.2-dev1">
  52       Devices:
  53       - added GCC startup and linker script for Cortex-A9
  54       CMSIS-Core(M): 5.0.3 (see revision history for details)
  55       - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  56       - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  57       CMSIS-Core(A): 1.0.1 (see revision history for details)
  58       CMSIS-Driver:
  59       - CAN Driver API V1.2.0
  60       CMSIS-RTOS:
  61       - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata
  62       CMSIS-RTOS2:
  63       - RTX 5.2.1 (see revision history for details)
  64       - Message Queue Example
  65       - Memory Pool Example
  66     </release>
  67     <release version="5.1.1" date="2017-09-19">
  68       CMSIS-RTOS2:
  69       - RTX 5.2.1 (see revision history for details)
  70     </release>
  71     <release version="5.1.0" date="2017-08-04">
  72       CMSIS-Core(M): 5.0.2 (see revision history for details)
  73       - Changed Version Control macros to be core agnostic.
  74       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  75       CMSIS-Core(A): 1.0.0 (see revision history for details)
  76       - Initial release
  77       - IRQ Controller API 1.0.0
  78       CMSIS-Driver: 2.05 (see revision history for details)
  79       - All typedefs related to status have been made volatile.
  80       CMSIS-RTOS2:
  81       - API 2.1.1 (see revision history for details)
  82       - RTX 5.2.0 (see revision history for details)
  83       - OS Tick API 1.0.0
  84       CMSIS-DSP: 1.5.2 (see revision history for details)
  85       - Fixed GNU Compiler specific diagnostics.
  86       CMSIS-PACK: 1.5.0 (see revision history for details)
  87       - added System Description File (*.SDF) Format
  88       CMSIS-Zone: 0.0.1 (Preview)
  89       - Initial specification draft
  90     </release>
  91     <release version="5.0.1" date="2017-02-03">
  92       Package Description:
  93       - added taxonomy for Cclass RTOS
  94       CMSIS-RTOS2:
  95       - API 2.1   (see revision history for details)
  96       - RTX 5.1.0 (see revision history for details)
  97       CMSIS-Core: 5.0.1 (see revision history for details)
  98       - Added __PACKED_STRUCT macro
  99       - Added uVisior support
 100       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 101       - Updated template for secure main function (main_s.c)
 102       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 103       CMSIS-DSP: 1.5.1 (see revision history for details)
 104       - added ARMv8M DSP libraries.
 105       CMSIS-PACK:1.4.9 (see revision history for details)
 106       - added Pack Index File specification and schema file
 107     </release>
 108     <release version="5.0.0" date="2016-11-11">
 109       Changed open source license to Apache 2.0
 110       CMSIS_Core:
 111        - Added support for Cortex-M23 and Cortex-M33.
 112        - Added ARMv8-M device configurations for mainline and baseline.
 113        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 114        - Added cmsis_compiler.h to unify compiler behaviour.
 115        - Updated function SCB_EnableICache (for Cortex-M7).
 116        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 117       CMSIS-RTOS:
 118         - bug fix in RTX 4.82 (see revision history for details)
 119       CMSIS-RTOS2:
 120         - new API including compatibility layer to CMSIS-RTOS
 121         - reference implementation based on RTX5
 122         - supports all Cortex-M variants including TrustZone for ARMv8-M
 123       CMSIS-SVD:
 124        - reworked SVD format documentation
 125        - removed SVD file database documentation as SVD files are distributed in packs
 126        - updated SVDConv for Win32 and Linux
 127       CMSIS-DSP:
 128        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 129        - Added DSP libraries build projects to CMSIS pack.
 130     </release>
 131     <release version="4.5.0" date="2015-10-28">
 132       - CMSIS-Core     4.30.0  (see revision history for details)
 133       - CMSIS-DAP      1.1.0   (unchanged)
 134       - CMSIS-Driver   2.04.0  (see revision history for details)
 135       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 136       - CMSIS-PACK     1.4.1   (see revision history for details)
 137       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 138       - CMSIS-SVD      1.3.1   (see revision history for details)
 139     </release>
 140     <release version="4.4.0" date="2015-09-11">
 141       - CMSIS-Core     4.20   (see revision history for details)
 142       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 143       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 144       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 145       - CMSIS-RTOS
 146         -- API         1.02   (unchanged)
 147         -- RTX         4.79   (see revision history for details)
 148       - CMSIS-SVD      1.3.0  (see revision history for details)
 149       - CMSIS-DAP      1.1.0  (extended with SWO support)
 150     </release>
 151     <release version="4.3.0" date="2015-03-20">
 152       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 153       - CMSIS-DSP      1.4.5  (see revision history for details)
 154       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 155       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 156       - CMSIS-RTOS
 157         -- API         1.02   (unchanged)
 158         -- RTX         4.78   (see revision history for details)
 159       - CMSIS-SVD      1.2    (unchanged)
 160     </release>
 161     <release version="4.2.0" date="2014-09-24">
 162       Adding Cortex-M7 support
 163       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 164       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 165       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 166       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 167       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 168     </release>
 169     <release version="4.1.1" date="2014-06-30">
 170       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 171     </release>
 172     <release version="4.1.0" date="2014-06-12">
 173       - CMSIS-Driver   2.02  (incompatible update)
 174       - CMSIS-Pack     1.3   (see revision history for details)
 175       - CMSIS-DSP      1.4.2 (unchanged)
 176       - CMSIS-Core     3.30  (unchanged)
 177       - CMSIS-RTOS RTX 4.74  (unchanged)
 178       - CMSIS-RTOS API 1.02  (unchanged)
 179       - CMSIS-SVD      1.10  (unchanged)
 180       PACK:
 181       - removed G++ specific files from PACK
 182       - added Component Startup variant "C Startup"
 183       - added Pack Checking Utility
 184       - updated conditions to reflect tool-chain dependency
 185       - added Taxonomy for Graphics
 186       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 187     </release>
 188     <release version="4.0.0">
 189       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 190       - CMSIS-Pack     1.1   Preliminary
 191       - CMSIS-DSP      1.4.2 (see revision history for details)
 192       - CMSIS-Core     3.30  (see revision history for details)
 193       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 194       - CMSIS-RTOS API 1.02  (unchanged)
 195       - CMSIS-SVD      1.10  (unchanged)
 196     </release>
 197     <release version="3.20.4">
 198       - CMSIS-RTOS 4.74 (see revision history for details)
 199       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 200     </release>
 201     <release version="3.20.3">
 202       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 203       - CMSIS-RTOS 4.73 (see revision history for details)
 204     </release>
 205     <release version="3.20.2">
 206       - CMSIS-Pack documentation has been added
 207       - CMSIS-Drivers header and documentation have been added to PACK
 208       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 209     </release>
 210     <release version="3.20.1">
 211       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 212       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 213     </release>
 214     <release version="3.20.0">
 215       The software portions that are deployed in the application program are now under a BSD license which allows usage
 216       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 217       The individual components have been update as listed below:
 218       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 219       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 220       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 221       - CMSIS-SVD is unchanged.
 222     </release>
 223   </releases>
 224
 225   <taxonomy>
 226     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 227     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 228     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 229     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 230     <description Cclass="File System">File Drive Support and File System</description>
 231     <description Cclass="Graphics">Graphical User Interface</description>
 232     <description Cclass="Network">Network Stack using Internet Protocols</description>
 233     <description Cclass="USB">Universal Serial Bus Stack</description>
 234     <description Cclass="Compiler">Compiler Software Extensions</description>
 235     <description Cclass="RTOS">Real-time Operating System</description>
 236   </taxonomy>
 237
 238   <devices>
 239     <!-- ******************************  Cortex-M0  ****************************** -->
 240     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 241       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 242       <description>
 243 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 244 - simple, easy-to-use programmers model
 245 - highly efficient ultra-low power operation
 246 - excellent code density
 247 - deterministic, high-performance interrupt handling
 248 - upward compatibility with the rest of the Cortex-M processor family.
 249       </description>
 250       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 251       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 252       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 253       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 254
 255       <device Dname="ARMCM0">
 256         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 257         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 258       </device>
 259     </family>
 260
 261     <!-- ******************************  Cortex-M0P  ****************************** -->
 262     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 263       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 264       <description>
 265 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 266 - simple, easy-to-use programmers model
 267 - highly efficient ultra-low power operation
 268 - excellent code density
 269 - deterministic, high-performance interrupt handling
 270 - upward compatibility with the rest of the Cortex-M processor family.
 271       </description>
 272       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 273       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 274       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 275       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 276
 277       <device Dname="ARMCM0P">
 278         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 279         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 280       </device>
 281
 282       <device Dname="ARMCM0P_MPU">
 283         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 284         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 285       </device>
 286     </family>
 287
 288     <!-- ******************************  Cortex-M3  ****************************** -->
 289     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 290       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 291       <description>
 292 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 293 - simple, easy-to-use programmers model
 294 - highly efficient ultra-low power operation
 295 - excellent code density
 296 - deterministic, high-performance interrupt handling
 297 - upward compatibility with the rest of the Cortex-M processor family.
 298       </description>
 299       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 300       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 301       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 302       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 303
 304       <device Dname="ARMCM3">
 305         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 306         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 307       </device>
 308     </family>
 309
 310     <!-- ******************************  Cortex-M4  ****************************** -->
 311     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 312       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 313       <description>
 314 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 315 - simple, easy-to-use programmers model
 316 - highly efficient ultra-low power operation
 317 - excellent code density
 318 - deterministic, high-performance interrupt handling
 319 - upward compatibility with the rest of the Cortex-M processor family.
 320       </description>
 321       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 322       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 323       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 324       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 325
 326       <device Dname="ARMCM4">
 327         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 328         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 329       </device>
 330
 331       <device Dname="ARMCM4_FP">
 332         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 333         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 334       </device>
 335     </family>
 336
 337     <!-- ******************************  Cortex-M7  ****************************** -->
 338     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 339       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 340       <description>
 341 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 342 - simple, easy-to-use programmers model
 343 - highly efficient ultra-low power operation
 344 - excellent code density
 345 - deterministic, high-performance interrupt handling
 346 - upward compatibility with the rest of the Cortex-M processor family.
 347       </description>
 348       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 349       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 350       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 351       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 352
 353       <device Dname="ARMCM7">
 354         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 355         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 356       </device>
 357
 358       <device Dname="ARMCM7_SP">
 359         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 360         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 361       </device>
 362
 363       <device Dname="ARMCM7_DP">
 364         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 365         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 366       </device>
 367     </family>
 368
 369     <!-- ******************************  Cortex-M23  ********************** -->
 370     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 371       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 372       <description>
 373 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 374 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 375 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 376       </description>
 377       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 378       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 379       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 380       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 381       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 382       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 383
 384       <device Dname="ARMCM23">
 385         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 386         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 387       </device>
 388
 389       <device Dname="ARMCM23_TZ">
 390         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 391         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 392       </device>
 393     </family>
 394
 395     <!-- ******************************  Cortex-M33  ****************************** -->
 396     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 397       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 398       <description>
 399 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 400 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 401       </description>
 402       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 403       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 404       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 405       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 406       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 407       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 408
 409       <device Dname="ARMCM33">
 410         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 411         <description>
 412           no DSP Instructions, no Floating Point Unit, no TrustZone
 413         </description>
 414         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 415       </device>
 416
 417       <device Dname="ARMCM33_TZ">
 418         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 419         <description>
 420           no DSP Instructions, no Floating Point Unit, TrustZone
 421         </description>
 422         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 423       </device>
 424
 425       <device Dname="ARMCM33_DSP_FP">
 426         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 427         <description>
 428           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 429         </description>
 430         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 431       </device>
 432
 433       <device Dname="ARMCM33_DSP_FP_TZ">
 434         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 435         <description>
 436           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 437         </description>
 438         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 439       </device>
 440     </family>
 441
 442     <!-- ******************************  ARMSC000  ****************************** -->
 443     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 444       <description>
 445 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 446 - simple, easy-to-use programmers model
 447 - highly efficient ultra-low power operation
 448 - excellent code density
 449 - deterministic, high-performance interrupt handling
 450       </description>
 451       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 452       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 453       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 454       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 455
 456       <device Dname="ARMSC000">
 457         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 458         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 459       </device>
 460     </family>
 461
 462     <!-- ******************************  ARMSC300  ****************************** -->
 463     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 464       <description>
 465 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 466 - simple, easy-to-use programmers model
 467 - highly efficient ultra-low power operation
 468 - excellent code density
 469 - deterministic, high-performance interrupt handling
 470       </description>
 471       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 472       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 473       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 474       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 475
 476       <device Dname="ARMSC300">
 477         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 478         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 479       </device>
 480     </family>
 481
 482     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 483     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 484       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 485       <description>
 486 ARMv8-M Baseline based device with TrustZone
 487       </description>
 488       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 489       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 490       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 491       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 492       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 493       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 494
 495       <device Dname="ARMv8MBL">
 496         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 497         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 498       </device>
 499     </family>
 500
 501     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 502     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 503       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 504       <description>
 505 ARMv8-M Mainline based device with TrustZone
 506       </description>
 507       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 508       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 509       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 510       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 511       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 512       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 513
 514       <device Dname="ARMv8MML">
 515         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 516         <description>
 517           no DSP Instructions, no Floating Point Unit, TrustZone
 518         </description>
 519         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 520       </device>
 521
 522       <device Dname="ARMv8MML_DSP">
 523         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 524         <description>
 525           DSP Instructions, no Floating Point Unit, TrustZone
 526         </description>
 527         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 528       </device>
 529
 530       <device Dname="ARMv8MML_SP">
 531         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 532         <description>
 533           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 534         </description>
 535         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 536       </device>
 537
 538       <device Dname="ARMv8MML_DSP_SP">
 539         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 540         <description>
 541           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 542         </description>
 543         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 544       </device>
 545
 546       <device Dname="ARMv8MML_DP">
 547         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 548         <description>
 549           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 550         </description>
 551         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 552       </device>
 553
 554       <device Dname="ARMv8MML_DSP_DP">
 555         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 556         <description>
 557           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 558         </description>
 559         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 560       </device>
 561     </family>
 562
 563     <!-- ******************************  Cortex-A5  ****************************** -->
 564     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 565       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 566       <description>
 567 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 568 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 569 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 570       </description>
 571
 572       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 573       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 574
 575       <device Dname="ARMCA5">
 576         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 577         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 578       </device>
 579     </family>
 580
 581     <!-- ******************************  Cortex-A7  ****************************** -->
 582     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 583       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 584       <description>
 585 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 586 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 587 an optional integrated GIC, and an optional L2 cache controller.
 588       </description>
 589
 590       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 591       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 592
 593       <device Dname="ARMCA7">
 594         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 595         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 596       </device>
 597     </family>
 598
 599     <!-- ******************************  Cortex-A9  ****************************** -->
 600     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 601       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 602       <description>
 603 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 604 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 605 and 8-bit Java bytecodes in Jazelle state.
 606       </description>
 607
 608       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 609       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 610
 611       <device Dname="ARMCA9">
 612         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 613         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 614       </device>
 615     </family>
 616   </devices>
 617
 618
 619   <apis>
 620     <!-- CMSIS Device API -->
 621     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 622       <description>Device interrupt controller interface</description>
 623       <files>
 624         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 625       </files>
 626     </api>
 627     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
 628       <description>RTOS Kernel system tick timer interface</description>
 629       <files>
 630         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 631       </files>
 632     </api>
 633     <!-- CMSIS-RTOS API -->
 634     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 635       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 636       <files>
 637         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 638       </files>
 639     </api>
 640     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.2" exclusive="1">
 641       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 642       <files>
 643         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 644         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 645       </files>
 646     </api>
 647     <!-- CMSIS Driver API -->
 648     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 649       <description>USART Driver API for Cortex-M</description>
 650       <files>
 651         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 652         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 653       </files>
 654     </api>
 655     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 656       <description>SPI Driver API for Cortex-M</description>
 657       <files>
 658         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 659         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 660       </files>
 661     </api>
 662     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 663       <description>SAI Driver API for Cortex-M</description>
 664       <files>
 665         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 666         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 667       </files>
 668     </api>
 669     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 670       <description>I2C Driver API for Cortex-M</description>
 671       <files>
 672         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 673         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 674       </files>
 675     </api>
 676     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 677       <description>CAN Driver API for Cortex-M</description>
 678       <files>
 679         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 680         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 681       </files>
 682     </api>
 683     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 684       <description>Flash Driver API for Cortex-M</description>
 685       <files>
 686         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 687         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 688       </files>
 689     </api>
 690     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 691       <description>MCI Driver API for Cortex-M</description>
 692       <files>
 693         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 694         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 695       </files>
 696     </api>
 697     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 698       <description>NAND Flash Driver API for Cortex-M</description>
 699       <files>
 700         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 701         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 702       </files>
 703     </api>
 704     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 705       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 706       <files>
 707         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 708         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 709         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 710       </files>
 711     </api>
 712     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 713       <description>Ethernet MAC Driver API for Cortex-M</description>
 714       <files>
 715         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 716         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 717       </files>
 718     </api>
 719     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 720       <description>Ethernet PHY Driver API for Cortex-M</description>
 721       <files>
 722         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 723         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 724       </files>
 725     </api>
 726     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 727       <description>USB Device Driver API for Cortex-M</description>
 728       <files>
 729         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 730         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 731       </files>
 732     </api>
 733     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 734       <description>USB Host Driver API for Cortex-M</description>
 735       <files>
 736         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 737         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 738       </files>
 739     </api>
 740   </apis>
 741
 742   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 743   <conditions>
 744     <!-- compiler -->
 745     <condition id="ARMCC6">
 746       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 747       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 748     </condition>
 749     <condition id="ARMCC5">
 750       <require Tcompiler="ARMCC" Toptions="AC5"/>
 751     </condition>
 752     <condition id="ARMCC">
 753       <require Tcompiler="ARMCC"/>
 754     </condition>
 755     <condition id="GCC">
 756       <require Tcompiler="GCC"/>
 757     </condition>
 758     <condition id="IAR">
 759       <require Tcompiler="IAR"/>
 760     </condition>
 761     <condition id="ARMCC GCC">
 762       <accept Tcompiler="ARMCC"/>
 763       <accept Tcompiler="GCC"/>
 764     </condition>
 765     <condition id="ARMCC GCC IAR">
 766       <accept Tcompiler="ARMCC"/>
 767       <accept Tcompiler="GCC"/>
 768       <accept Tcompiler="IAR"/>
 769     </condition>
 770
 771     <!-- ARM architecture -->
 772     <condition id="ARMv6-M Device">
 773       <description>ARMv6-M architecture based device</description>
 774       <accept Dcore="Cortex-M0"/>
 775       <accept Dcore="Cortex-M0+"/>
 776       <accept Dcore="SC000"/>
 777     </condition>
 778     <condition id="ARMv7-M Device">
 779       <description>ARMv7-M architecture based device</description>
 780       <accept Dcore="Cortex-M3"/>
 781       <accept Dcore="Cortex-M4"/>
 782       <accept Dcore="Cortex-M7"/>
 783       <accept Dcore="SC300"/>
 784     </condition>
 785     <condition id="ARMv8-M Device">
 786       <description>ARMv8-M architecture based device</description>
 787       <accept Dcore="ARMV8MBL"/>
 788       <accept Dcore="ARMV8MML"/>
 789       <accept Dcore="Cortex-M23"/>
 790       <accept Dcore="Cortex-M33"/>
 791     </condition>
 792     <condition id="ARMv8-M TZ Device">
 793       <description>ARMv8-M architecture based device with TrustZone</description>
 794       <require condition="ARMv8-M Device"/>
 795       <require Dtz="TZ"/>
 796     </condition>
 797     <condition id="ARMv6_7-M Device">
 798       <description>ARMv6_7-M architecture based device</description>
 799       <accept condition="ARMv6-M Device"/>
 800       <accept condition="ARMv7-M Device"/>
 801     </condition>
 802     <condition id="ARMv6_7_8-M Device">
 803       <description>ARMv6_7_8-M architecture based device</description>
 804       <accept condition="ARMv6-M Device"/>
 805       <accept condition="ARMv7-M Device"/>
 806       <accept condition="ARMv8-M Device"/>
 807     </condition>
 808     <condition id="ARMv7-A Device">
 809       <description>ARMv7-A architecture based device</description>
 810       <accept Dcore="Cortex-A5"/>
 811       <accept Dcore="Cortex-A7"/>
 812       <accept Dcore="Cortex-A9"/>
 813     </condition>
 814
 815     <!-- ARM core -->
 816     <condition id="CM0">
 817       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 818       <accept Dcore="Cortex-M0"/>
 819       <accept Dcore="Cortex-M0+"/>
 820       <accept Dcore="SC000"/>
 821     </condition>
 822     <condition id="CM3">
 823       <description>Cortex-M3 or SC300 processor based device</description>
 824       <accept Dcore="Cortex-M3"/>
 825       <accept Dcore="SC300"/>
 826     </condition>
 827     <condition id="CM4">
 828       <description>Cortex-M4 processor based device</description>
 829       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 830     </condition>
 831     <condition id="CM4_FP">
 832       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 833       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 834       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 835       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 836     </condition>
 837     <condition id="CM7">
 838       <description>Cortex-M7 processor based device</description>
 839       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 840     </condition>
 841     <condition id="CM7_FP">
 842       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 843       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 844       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 845     </condition>
 846     <condition id="CM7_SP">
 847       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 848       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 849     </condition>
 850     <condition id="CM7_DP">
 851       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 852       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 853     </condition>
 854     <condition id="CM23">
 855       <description>Cortex-M23 processor based device</description>
 856       <require Dcore="Cortex-M23"/>
 857     </condition>
 858     <condition id="CM33">
 859       <description>Cortex-M33 processor based device</description>
 860       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 861     </condition>
 862     <condition id="CM33_FP">
 863       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 864       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 865     </condition>
 866     <condition id="ARMv8MBL">
 867       <description>ARMv8-M Baseline processor based device</description>
 868       <require Dcore="ARMV8MBL"/>
 869     </condition>
 870     <condition id="ARMv8MML">
 871       <description>ARMv8-M Mainline processor based device</description>
 872       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 873     </condition>
 874     <condition id="ARMv8MML_FP">
 875       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 876       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 877       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 878     </condition>
 879
 880     <condition id="CM33_NODSP_NOFPU">
 881       <description>CM33, no DSP, no FPU</description>
 882       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 883     </condition>
 884     <condition id="CM33_DSP_NOFPU">
 885       <description>CM33, DSP, no FPU</description>
 886       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 887     </condition>
 888     <condition id="CM33_NODSP_SP">
 889       <description>CM33, no DSP, SP FPU</description>
 890       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 891     </condition>
 892     <condition id="CM33_DSP_SP">
 893       <description>CM33, DSP, SP FPU</description>
 894       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 895     </condition>
 896
 897     <condition id="ARMv8MML_NODSP_NOFPU">
 898       <description>ARMv8MML, no DSP, no FPU</description>
 899       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 900     </condition>
 901     <condition id="ARMv8MML_DSP_NOFPU">
 902       <description>ARMv8MML, DSP, no FPU</description>
 903       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 904     </condition>
 905     <condition id="ARMv8MML_NODSP_SP">
 906       <description>ARMv8MML, no DSP, SP FPU</description>
 907       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 908     </condition>
 909     <condition id="ARMv8MML_DSP_SP">
 910       <description>ARMv8MML, DSP, SP FPU</description>
 911       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 912     </condition>
 913
 914     <condition id="CA5_CA9">
 915       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 916       <accept Dcore="Cortex-A5"/>
 917       <accept Dcore="Cortex-A9"/>
 918     </condition>
 919
 920     <condition id="CA7">
 921       <description>Cortex-A7 processor based device</description>
 922       <accept Dcore="Cortex-A7"/>
 923     </condition>
 924
 925     <!-- ARMCC compiler -->
 926     <condition id="CA_ARMCC5">
 927       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 928       <require condition="ARMv7-A Device"/>
 929       <require condition="ARMCC5"/>
 930     </condition>
 931     <condition id="CA_ARMCC6">
 932       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 933       <require condition="ARMv7-A Device"/>
 934       <require condition="ARMCC6"/>
 935     </condition>
 936
 937     <condition id="CM0_ARMCC">
 938       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 939       <require condition="CM0"/>
 940       <require Tcompiler="ARMCC"/>
 941     </condition>
 942     <condition id="CM0_LE_ARMCC">
 943       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 944       <require condition="CM0_ARMCC"/>
 945       <require Dendian="Little-endian"/>
 946     </condition>
 947     <condition id="CM0_BE_ARMCC">
 948       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 949       <require condition="CM0_ARMCC"/>
 950       <require Dendian="Big-endian"/>
 951     </condition>
 952
 953     <condition id="CM3_ARMCC">
 954       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 955       <require condition="CM3"/>
 956       <require Tcompiler="ARMCC"/>
 957     </condition>
 958     <condition id="CM3_LE_ARMCC">
 959       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 960       <require condition="CM3_ARMCC"/>
 961       <require Dendian="Little-endian"/>
 962     </condition>
 963     <condition id="CM3_BE_ARMCC">
 964       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 965       <require condition="CM3_ARMCC"/>
 966       <require Dendian="Big-endian"/>
 967     </condition>
 968
 969     <condition id="CM4_ARMCC">
 970       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 971       <require condition="CM4"/>
 972       <require Tcompiler="ARMCC"/>
 973     </condition>
 974     <condition id="CM4_LE_ARMCC">
 975       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 976       <require condition="CM4_ARMCC"/>
 977       <require Dendian="Little-endian"/>
 978     </condition>
 979     <condition id="CM4_BE_ARMCC">
 980       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 981       <require condition="CM4_ARMCC"/>
 982       <require Dendian="Big-endian"/>
 983     </condition>
 984
 985     <condition id="CM4_FP_ARMCC">
 986       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 987       <require condition="CM4_FP"/>
 988       <require Tcompiler="ARMCC"/>
 989     </condition>
 990     <condition id="CM4_FP_LE_ARMCC">
 991       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 992       <require condition="CM4_FP_ARMCC"/>
 993       <require Dendian="Little-endian"/>
 994     </condition>
 995     <condition id="CM4_FP_BE_ARMCC">
 996       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 997       <require condition="CM4_FP_ARMCC"/>
 998       <require Dendian="Big-endian"/>
 999     </condition>
1000
1001     <condition id="CM7_ARMCC">
1002       <description>Cortex-M7 processor based device for the ARM Compiler</description>
1003       <require condition="CM7"/>
1004       <require Tcompiler="ARMCC"/>
1005     </condition>
1006     <condition id="CM7_LE_ARMCC">
1007       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
1008       <require condition="CM7_ARMCC"/>
1009       <require Dendian="Little-endian"/>
1010     </condition>
1011     <condition id="CM7_BE_ARMCC">
1012       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
1013       <require condition="CM7_ARMCC"/>
1014       <require Dendian="Big-endian"/>
1015     </condition>
1016
1017     <condition id="CM7_FP_ARMCC">
1018       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
1019       <require condition="CM7_FP"/>
1020       <require Tcompiler="ARMCC"/>
1021     </condition>
1022     <condition id="CM7_FP_LE_ARMCC">
1023       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1024       <require condition="CM7_FP_ARMCC"/>
1025       <require Dendian="Little-endian"/>
1026     </condition>
1027     <condition id="CM7_FP_BE_ARMCC">
1028       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1029       <require condition="CM7_FP_ARMCC"/>
1030       <require Dendian="Big-endian"/>
1031     </condition>
1032
1033     <condition id="CM7_SP_ARMCC">
1034       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1035       <require condition="CM7_SP"/>
1036       <require Tcompiler="ARMCC"/>
1037     </condition>
1038     <condition id="CM7_SP_LE_ARMCC">
1039       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1040       <require condition="CM7_SP_ARMCC"/>
1041       <require Dendian="Little-endian"/>
1042     </condition>
1043     <condition id="CM7_SP_BE_ARMCC">
1044       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1045       <require condition="CM7_SP_ARMCC"/>
1046       <require Dendian="Big-endian"/>
1047     </condition>
1048
1049     <condition id="CM7_DP_ARMCC">
1050       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1051       <require condition="CM7_DP"/>
1052       <require Tcompiler="ARMCC"/>
1053     </condition>
1054     <condition id="CM7_DP_LE_ARMCC">
1055       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1056       <require condition="CM7_DP_ARMCC"/>
1057       <require Dendian="Little-endian"/>
1058     </condition>
1059     <condition id="CM7_DP_BE_ARMCC">
1060       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1061       <require condition="CM7_DP_ARMCC"/>
1062       <require Dendian="Big-endian"/>
1063     </condition>
1064
1065     <condition id="CM23_ARMCC">
1066       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1067       <require condition="CM23"/>
1068       <require Tcompiler="ARMCC"/>
1069     </condition>
1070     <condition id="CM23_LE_ARMCC">
1071       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1072       <require condition="CM23_ARMCC"/>
1073       <require Dendian="Little-endian"/>
1074     </condition>
1075     <condition id="CM23_BE_ARMCC">
1076       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1077       <require condition="CM23_ARMCC"/>
1078       <require Dendian="Big-endian"/>
1079     </condition>
1080
1081     <condition id="CM33_ARMCC">
1082       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1083       <require condition="CM33"/>
1084       <require Tcompiler="ARMCC"/>
1085     </condition>
1086     <condition id="CM33_LE_ARMCC">
1087       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1088       <require condition="CM33_ARMCC"/>
1089       <require Dendian="Little-endian"/>
1090     </condition>
1091     <condition id="CM33_BE_ARMCC">
1092       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1093       <require condition="CM33_ARMCC"/>
1094       <require Dendian="Big-endian"/>
1095     </condition>
1096
1097     <condition id="CM33_FP_ARMCC">
1098       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1099       <require condition="CM33_FP"/>
1100       <require Tcompiler="ARMCC"/>
1101     </condition>
1102     <condition id="CM33_FP_LE_ARMCC">
1103       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1104       <require condition="CM33_FP_ARMCC"/>
1105       <require Dendian="Little-endian"/>
1106     </condition>
1107     <condition id="CM33_FP_BE_ARMCC">
1108       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1109       <require condition="CM33_FP_ARMCC"/>
1110       <require Dendian="Big-endian"/>
1111     </condition>
1112
1113     <condition id="CM33_NODSP_NOFPU_ARMCC">
1114       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1115       <require condition="CM33_NODSP_NOFPU"/>
1116       <require Tcompiler="ARMCC"/>
1117     </condition>
1118     <condition id="CM33_DSP_NOFPU_ARMCC">
1119       <description>CM33, DSP, no FPU, ARM Compiler</description>
1120       <require condition="CM33_DSP_NOFPU"/>
1121       <require Tcompiler="ARMCC"/>
1122     </condition>
1123     <condition id="CM33_NODSP_SP_ARMCC">
1124       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1125       <require condition="CM33_NODSP_SP"/>
1126       <require Tcompiler="ARMCC"/>
1127     </condition>
1128     <condition id="CM33_DSP_SP_ARMCC">
1129       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1130       <require condition="CM33_DSP_SP"/>
1131       <require Tcompiler="ARMCC"/>
1132     </condition>
1133     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1134       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1135       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1136       <require Dendian="Little-endian"/>
1137     </condition>
1138     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1139       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1140       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1141       <require Dendian="Little-endian"/>
1142     </condition>
1143     <condition id="CM33_NODSP_SP_LE_ARMCC">
1144       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1145       <require condition="CM33_NODSP_SP_ARMCC"/>
1146       <require Dendian="Little-endian"/>
1147     </condition>
1148     <condition id="CM33_DSP_SP_LE_ARMCC">
1149       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1150       <require condition="CM33_DSP_SP_ARMCC"/>
1151       <require Dendian="Little-endian"/>
1152     </condition>
1153
1154     <condition id="ARMv8MBL_ARMCC">
1155       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1156       <require condition="ARMv8MBL"/>
1157       <require Tcompiler="ARMCC"/>
1158     </condition>
1159     <condition id="ARMv8MBL_LE_ARMCC">
1160       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1161       <require condition="ARMv8MBL_ARMCC"/>
1162       <require Dendian="Little-endian"/>
1163     </condition>
1164     <condition id="ARMv8MBL_BE_ARMCC">
1165       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1166       <require condition="ARMv8MBL_ARMCC"/>
1167       <require Dendian="Big-endian"/>
1168     </condition>
1169
1170     <condition id="ARMv8MML_ARMCC">
1171       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1172       <require condition="ARMv8MML"/>
1173       <require Tcompiler="ARMCC"/>
1174     </condition>
1175     <condition id="ARMv8MML_LE_ARMCC">
1176       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1177       <require condition="ARMv8MML_ARMCC"/>
1178       <require Dendian="Little-endian"/>
1179     </condition>
1180     <condition id="ARMv8MML_BE_ARMCC">
1181       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1182       <require condition="ARMv8MML_ARMCC"/>
1183       <require Dendian="Big-endian"/>
1184     </condition>
1185
1186     <condition id="ARMv8MML_FP_ARMCC">
1187       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1188       <require condition="ARMv8MML_FP"/>
1189       <require Tcompiler="ARMCC"/>
1190     </condition>
1191     <condition id="ARMv8MML_FP_LE_ARMCC">
1192       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1193       <require condition="ARMv8MML_FP_ARMCC"/>
1194       <require Dendian="Little-endian"/>
1195     </condition>
1196     <condition id="ARMv8MML_FP_BE_ARMCC">
1197       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1198       <require condition="ARMv8MML_FP_ARMCC"/>
1199       <require Dendian="Big-endian"/>
1200     </condition>
1201
1202     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1203       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1204       <require condition="ARMv8MML_NODSP_NOFPU"/>
1205       <require Tcompiler="ARMCC"/>
1206     </condition>
1207     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1208       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1209       <require condition="ARMv8MML_DSP_NOFPU"/>
1210       <require Tcompiler="ARMCC"/>
1211     </condition>
1212     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1213       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1214       <require condition="ARMv8MML_NODSP_SP"/>
1215       <require Tcompiler="ARMCC"/>
1216     </condition>
1217     <condition id="ARMv8MML_DSP_SP_ARMCC">
1218       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1219       <require condition="ARMv8MML_DSP_SP"/>
1220       <require Tcompiler="ARMCC"/>
1221     </condition>
1222     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1223       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1224       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1225       <require Dendian="Little-endian"/>
1226     </condition>
1227     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1228       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1229       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1230       <require Dendian="Little-endian"/>
1231     </condition>
1232     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1233       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1234       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1235       <require Dendian="Little-endian"/>
1236     </condition>
1237     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1238       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1239       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1240       <require Dendian="Little-endian"/>
1241     </condition>
1242
1243     <!-- GCC compiler -->
1244     <condition id="CA_GCC">
1245       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1246       <require condition="ARMv7-A Device"/>
1247       <require Tcompiler="GCC"/>
1248     </condition>
1249
1250     <condition id="CM0_GCC">
1251       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1252       <require condition="CM0"/>
1253       <require Tcompiler="GCC"/>
1254     </condition>
1255     <condition id="CM0_LE_GCC">
1256       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1257       <require condition="CM0_GCC"/>
1258       <require Dendian="Little-endian"/>
1259     </condition>
1260     <condition id="CM0_BE_GCC">
1261       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1262       <require condition="CM0_GCC"/>
1263       <require Dendian="Big-endian"/>
1264     </condition>
1265
1266     <condition id="CM3_GCC">
1267       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1268       <require condition="CM3"/>
1269       <require Tcompiler="GCC"/>
1270     </condition>
1271     <condition id="CM3_LE_GCC">
1272       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1273       <require condition="CM3_GCC"/>
1274       <require Dendian="Little-endian"/>
1275     </condition>
1276     <condition id="CM3_BE_GCC">
1277       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1278       <require condition="CM3_GCC"/>
1279       <require Dendian="Big-endian"/>
1280     </condition>
1281
1282     <condition id="CM4_GCC">
1283       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1284       <require condition="CM4"/>
1285       <require Tcompiler="GCC"/>
1286     </condition>
1287     <condition id="CM4_LE_GCC">
1288       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1289       <require condition="CM4_GCC"/>
1290       <require Dendian="Little-endian"/>
1291     </condition>
1292     <condition id="CM4_BE_GCC">
1293       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1294       <require condition="CM4_GCC"/>
1295       <require Dendian="Big-endian"/>
1296     </condition>
1297
1298     <condition id="CM4_FP_GCC">
1299       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1300       <require condition="CM4_FP"/>
1301       <require Tcompiler="GCC"/>
1302     </condition>
1303     <condition id="CM4_FP_LE_GCC">
1304       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1305       <require condition="CM4_FP_GCC"/>
1306       <require Dendian="Little-endian"/>
1307     </condition>
1308     <condition id="CM4_FP_BE_GCC">
1309       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1310       <require condition="CM4_FP_GCC"/>
1311       <require Dendian="Big-endian"/>
1312     </condition>
1313
1314     <condition id="CM7_GCC">
1315       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1316       <require condition="CM7"/>
1317       <require Tcompiler="GCC"/>
1318     </condition>
1319     <condition id="CM7_LE_GCC">
1320       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1321       <require condition="CM7_GCC"/>
1322       <require Dendian="Little-endian"/>
1323     </condition>
1324     <condition id="CM7_BE_GCC">
1325       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1326       <require condition="CM7_GCC"/>
1327       <require Dendian="Big-endian"/>
1328     </condition>
1329
1330     <condition id="CM7_FP_GCC">
1331       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1332       <require condition="CM7_FP"/>
1333       <require Tcompiler="GCC"/>
1334     </condition>
1335     <condition id="CM7_FP_LE_GCC">
1336       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1337       <require condition="CM7_FP_GCC"/>
1338       <require Dendian="Little-endian"/>
1339     </condition>
1340     <condition id="CM7_FP_BE_GCC">
1341       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1342       <require condition="CM7_FP_GCC"/>
1343       <require Dendian="Big-endian"/>
1344     </condition>
1345
1346     <condition id="CM7_SP_GCC">
1347       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1348       <require condition="CM7_SP"/>
1349       <require Tcompiler="GCC"/>
1350     </condition>
1351     <condition id="CM7_SP_LE_GCC">
1352       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1353       <require condition="CM7_SP_GCC"/>
1354       <require Dendian="Little-endian"/>
1355     </condition>
1356     <condition id="CM7_SP_BE_GCC">
1357       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1358       <require condition="CM7_SP_GCC"/>
1359       <require Dendian="Big-endian"/>
1360     </condition>
1361
1362     <condition id="CM7_DP_GCC">
1363       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1364       <require condition="CM7_DP"/>
1365       <require Tcompiler="GCC"/>
1366     </condition>
1367     <condition id="CM7_DP_LE_GCC">
1368       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1369       <require condition="CM7_DP_GCC"/>
1370       <require Dendian="Little-endian"/>
1371     </condition>
1372     <condition id="CM7_DP_BE_GCC">
1373       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1374       <require condition="CM7_DP_GCC"/>
1375       <require Dendian="Big-endian"/>
1376     </condition>
1377
1378     <condition id="CM23_GCC">
1379       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1380       <require condition="CM23"/>
1381       <require Tcompiler="GCC"/>
1382     </condition>
1383     <condition id="CM23_LE_GCC">
1384       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1385       <require condition="CM23_GCC"/>
1386       <require Dendian="Little-endian"/>
1387     </condition>
1388     <condition id="CM23_BE_GCC">
1389       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1390       <require condition="CM23_GCC"/>
1391       <require Dendian="Big-endian"/>
1392     </condition>
1393
1394     <condition id="CM33_GCC">
1395       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1396       <require condition="CM33"/>
1397       <require Tcompiler="GCC"/>
1398     </condition>
1399     <condition id="CM33_LE_GCC">
1400       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1401       <require condition="CM33_GCC"/>
1402       <require Dendian="Little-endian"/>
1403     </condition>
1404     <condition id="CM33_BE_GCC">
1405       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1406       <require condition="CM33_GCC"/>
1407       <require Dendian="Big-endian"/>
1408     </condition>
1409
1410     <condition id="CM33_FP_GCC">
1411       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1412       <require condition="CM33_FP"/>
1413       <require Tcompiler="GCC"/>
1414     </condition>
1415     <condition id="CM33_FP_LE_GCC">
1416       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1417       <require condition="CM33_FP_GCC"/>
1418       <require Dendian="Little-endian"/>
1419     </condition>
1420     <condition id="CM33_FP_BE_GCC">
1421       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1422       <require condition="CM33_FP_GCC"/>
1423       <require Dendian="Big-endian"/>
1424     </condition>
1425
1426     <condition id="CM33_NODSP_NOFPU_GCC">
1427       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1428       <require condition="CM33_NODSP_NOFPU"/>
1429       <require Tcompiler="GCC"/>
1430     </condition>
1431     <condition id="CM33_DSP_NOFPU_GCC">
1432       <description>CM33, DSP, no FPU, GCC Compiler</description>
1433       <require condition="CM33_DSP_NOFPU"/>
1434       <require Tcompiler="GCC"/>
1435     </condition>
1436     <condition id="CM33_NODSP_SP_GCC">
1437       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1438       <require condition="CM33_NODSP_SP"/>
1439       <require Tcompiler="GCC"/>
1440     </condition>
1441     <condition id="CM33_DSP_SP_GCC">
1442       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1443       <require condition="CM33_DSP_SP"/>
1444       <require Tcompiler="GCC"/>
1445     </condition>
1446     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1447       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1448       <require condition="CM33_NODSP_NOFPU_GCC"/>
1449       <require Dendian="Little-endian"/>
1450     </condition>
1451     <condition id="CM33_DSP_NOFPU_LE_GCC">
1452       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1453       <require condition="CM33_DSP_NOFPU_GCC"/>
1454       <require Dendian="Little-endian"/>
1455     </condition>
1456     <condition id="CM33_NODSP_SP_LE_GCC">
1457       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1458       <require condition="CM33_NODSP_SP_GCC"/>
1459       <require Dendian="Little-endian"/>
1460     </condition>
1461     <condition id="CM33_DSP_SP_LE_GCC">
1462       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1463       <require condition="CM33_DSP_SP_GCC"/>
1464       <require Dendian="Little-endian"/>
1465     </condition>
1466
1467     <condition id="ARMv8MBL_GCC">
1468       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1469       <require condition="ARMv8MBL"/>
1470       <require Tcompiler="GCC"/>
1471     </condition>
1472     <condition id="ARMv8MBL_LE_GCC">
1473       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1474       <require condition="ARMv8MBL_GCC"/>
1475       <require Dendian="Little-endian"/>
1476     </condition>
1477     <condition id="ARMv8MBL_BE_GCC">
1478       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1479       <require condition="ARMv8MBL_GCC"/>
1480       <require Dendian="Big-endian"/>
1481     </condition>
1482
1483     <condition id="ARMv8MML_GCC">
1484       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1485       <require condition="ARMv8MML"/>
1486       <require Tcompiler="GCC"/>
1487     </condition>
1488     <condition id="ARMv8MML_LE_GCC">
1489       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1490       <require condition="ARMv8MML_GCC"/>
1491       <require Dendian="Little-endian"/>
1492     </condition>
1493     <condition id="ARMv8MML_BE_GCC">
1494       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1495       <require condition="ARMv8MML_GCC"/>
1496       <require Dendian="Big-endian"/>
1497     </condition>
1498
1499     <condition id="ARMv8MML_FP_GCC">
1500       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1501       <require condition="ARMv8MML_FP"/>
1502       <require Tcompiler="GCC"/>
1503     </condition>
1504     <condition id="ARMv8MML_FP_LE_GCC">
1505       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1506       <require condition="ARMv8MML_FP_GCC"/>
1507       <require Dendian="Little-endian"/>
1508     </condition>
1509     <condition id="ARMv8MML_FP_BE_GCC">
1510       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1511       <require condition="ARMv8MML_FP_GCC"/>
1512       <require Dendian="Big-endian"/>
1513     </condition>
1514
1515     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1516       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1517       <require condition="ARMv8MML_NODSP_NOFPU"/>
1518       <require Tcompiler="GCC"/>
1519     </condition>
1520     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1521       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1522       <require condition="ARMv8MML_DSP_NOFPU"/>
1523       <require Tcompiler="GCC"/>
1524     </condition>
1525     <condition id="ARMv8MML_NODSP_SP_GCC">
1526       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1527       <require condition="ARMv8MML_NODSP_SP"/>
1528       <require Tcompiler="GCC"/>
1529     </condition>
1530     <condition id="ARMv8MML_DSP_SP_GCC">
1531       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1532       <require condition="ARMv8MML_DSP_SP"/>
1533       <require Tcompiler="GCC"/>
1534     </condition>
1535     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1536       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1537       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1538       <require Dendian="Little-endian"/>
1539     </condition>
1540     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1541       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1542       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1543       <require Dendian="Little-endian"/>
1544     </condition>
1545     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1546       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1547       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1548       <require Dendian="Little-endian"/>
1549     </condition>
1550     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1551       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1552       <require condition="ARMv8MML_DSP_SP_GCC"/>
1553       <require Dendian="Little-endian"/>
1554     </condition>
1555
1556     <!-- IAR compiler -->
1557     <condition id="CA_IAR">
1558       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1559       <require condition="ARMv7-A Device"/>
1560       <require Tcompiler="IAR"/>
1561     </condition>
1562
1563     <condition id="CM0_IAR">
1564       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1565       <require condition="CM0"/>
1566       <require Tcompiler="IAR"/>
1567     </condition>
1568     <condition id="CM0_LE_IAR">
1569       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1570       <require condition="CM0_IAR"/>
1571       <require Dendian="Little-endian"/>
1572     </condition>
1573     <condition id="CM0_BE_IAR">
1574       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1575       <require condition="CM0_IAR"/>
1576       <require Dendian="Big-endian"/>
1577     </condition>
1578
1579     <condition id="CM3_IAR">
1580       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1581       <require condition="CM3"/>
1582       <require Tcompiler="IAR"/>
1583     </condition>
1584     <condition id="CM3_LE_IAR">
1585       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1586       <require condition="CM3_IAR"/>
1587       <require Dendian="Little-endian"/>
1588     </condition>
1589     <condition id="CM3_BE_IAR">
1590       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1591       <require condition="CM3_IAR"/>
1592       <require Dendian="Big-endian"/>
1593     </condition>
1594
1595     <condition id="CM4_IAR">
1596       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1597       <require condition="CM4"/>
1598       <require Tcompiler="IAR"/>
1599     </condition>
1600     <condition id="CM4_LE_IAR">
1601       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1602       <require condition="CM4_IAR"/>
1603       <require Dendian="Little-endian"/>
1604     </condition>
1605     <condition id="CM4_BE_IAR">
1606       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1607       <require condition="CM4_IAR"/>
1608       <require Dendian="Big-endian"/>
1609     </condition>
1610
1611     <condition id="CM4_FP_IAR">
1612       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1613       <require condition="CM4_FP"/>
1614       <require Tcompiler="IAR"/>
1615     </condition>
1616     <condition id="CM4_FP_LE_IAR">
1617       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1618       <require condition="CM4_FP_IAR"/>
1619       <require Dendian="Little-endian"/>
1620     </condition>
1621     <condition id="CM4_FP_BE_IAR">
1622       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1623       <require condition="CM4_FP_IAR"/>
1624       <require Dendian="Big-endian"/>
1625     </condition>
1626
1627     <condition id="CM7_IAR">
1628       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1629       <require condition="CM7"/>
1630       <require Tcompiler="IAR"/>
1631     </condition>
1632     <condition id="CM7_LE_IAR">
1633       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1634       <require condition="CM7_IAR"/>
1635       <require Dendian="Little-endian"/>
1636     </condition>
1637     <condition id="CM7_BE_IAR">
1638       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1639       <require condition="CM7_IAR"/>
1640       <require Dendian="Big-endian"/>
1641     </condition>
1642
1643     <condition id="CM7_FP_IAR">
1644       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1645       <require condition="CM7_FP"/>
1646       <require Tcompiler="IAR"/>
1647     </condition>
1648     <condition id="CM7_FP_LE_IAR">
1649       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1650       <require condition="CM7_FP_IAR"/>
1651       <require Dendian="Little-endian"/>
1652     </condition>
1653     <condition id="CM7_FP_BE_IAR">
1654       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1655       <require condition="CM7_FP_IAR"/>
1656       <require Dendian="Big-endian"/>
1657     </condition>
1658
1659     <condition id="CM7_SP_IAR">
1660       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1661       <require condition="CM7_SP"/>
1662       <require Tcompiler="IAR"/>
1663     </condition>
1664     <condition id="CM7_SP_LE_IAR">
1665       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1666       <require condition="CM7_SP_IAR"/>
1667       <require Dendian="Little-endian"/>
1668     </condition>
1669     <condition id="CM7_SP_BE_IAR">
1670       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1671       <require condition="CM7_SP_IAR"/>
1672       <require Dendian="Big-endian"/>
1673     </condition>
1674
1675     <condition id="CM7_DP_IAR">
1676       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1677       <require condition="CM7_DP"/>
1678       <require Tcompiler="IAR"/>
1679     </condition>
1680     <condition id="CM7_DP_LE_IAR">
1681       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1682       <require condition="CM7_DP_IAR"/>
1683       <require Dendian="Little-endian"/>
1684     </condition>
1685     <condition id="CM7_DP_BE_IAR">
1686       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1687       <require condition="CM7_DP_IAR"/>
1688       <require Dendian="Big-endian"/>
1689     </condition>
1690
1691     <condition id="CM23_IAR">
1692       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1693       <require condition="CM23"/>
1694       <require Tcompiler="IAR"/>
1695     </condition>
1696     <condition id="CM23_LE_IAR">
1697       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1698       <require condition="CM23_IAR"/>
1699       <require Dendian="Little-endian"/>
1700     </condition>
1701     <condition id="CM23_BE_IAR">
1702       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1703       <require condition="CM23_IAR"/>
1704       <require Dendian="Big-endian"/>
1705     </condition>
1706
1707     <condition id="CM33_IAR">
1708       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1709       <require condition="CM33"/>
1710       <require Tcompiler="IAR"/>
1711     </condition>
1712     <condition id="CM33_LE_IAR">
1713       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1714       <require condition="CM33_IAR"/>
1715       <require Dendian="Little-endian"/>
1716     </condition>
1717     <condition id="CM33_BE_IAR">
1718       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1719       <require condition="CM33_IAR"/>
1720       <require Dendian="Big-endian"/>
1721     </condition>
1722
1723     <condition id="CM33_FP_IAR">
1724       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1725       <require condition="CM33_FP"/>
1726       <require Tcompiler="IAR"/>
1727     </condition>
1728     <condition id="CM33_FP_LE_IAR">
1729       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1730       <require condition="CM33_FP_IAR"/>
1731       <require Dendian="Little-endian"/>
1732     </condition>
1733     <condition id="CM33_FP_BE_IAR">
1734       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1735       <require condition="CM33_FP_IAR"/>
1736       <require Dendian="Big-endian"/>
1737     </condition>
1738
1739     <condition id="CM33_NODSP_NOFPU_IAR">
1740       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1741       <require condition="CM33_NODSP_NOFPU"/>
1742       <require Tcompiler="IAR"/>
1743     </condition>
1744     <condition id="CM33_DSP_NOFPU_IAR">
1745       <description>CM33, DSP, no FPU, IAR Compiler</description>
1746       <require condition="CM33_DSP_NOFPU"/>
1747       <require Tcompiler="IAR"/>
1748     </condition>
1749     <condition id="CM33_NODSP_SP_IAR">
1750       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1751       <require condition="CM33_NODSP_SP"/>
1752       <require Tcompiler="IAR"/>
1753     </condition>
1754     <condition id="CM33_DSP_SP_IAR">
1755       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1756       <require condition="CM33_DSP_SP"/>
1757       <require Tcompiler="IAR"/>
1758     </condition>
1759     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1760       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1761       <require condition="CM33_NODSP_NOFPU_IAR"/>
1762       <require Dendian="Little-endian"/>
1763     </condition>
1764     <condition id="CM33_DSP_NOFPU_LE_IAR">
1765       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1766       <require condition="CM33_DSP_NOFPU_IAR"/>
1767       <require Dendian="Little-endian"/>
1768     </condition>
1769     <condition id="CM33_NODSP_SP_LE_IAR">
1770       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1771       <require condition="CM33_NODSP_SP_IAR"/>
1772       <require Dendian="Little-endian"/>
1773     </condition>
1774     <condition id="CM33_DSP_SP_LE_IAR">
1775       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1776       <require condition="CM33_DSP_SP_IAR"/>
1777       <require Dendian="Little-endian"/>
1778     </condition>
1779
1780     <condition id="ARMv8MBL_IAR">
1781       <description>ARMv8-M Baseline processor based device for the IAR Compiler</description>
1782       <require condition="ARMv8MBL"/>
1783       <require Tcompiler="IAR"/>
1784     </condition>
1785     <condition id="ARMv8MBL_LE_IAR">
1786       <description>ARMv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1787       <require condition="ARMv8MBL_IAR"/>
1788       <require Dendian="Little-endian"/>
1789     </condition>
1790     <condition id="ARMv8MBL_BE_IAR">
1791       <description>ARMv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1792       <require condition="ARMv8MBL_IAR"/>
1793       <require Dendian="Big-endian"/>
1794     </condition>
1795
1796     <condition id="ARMv8MML_IAR">
1797       <description>ARMv8-M Mainline processor based device for the IAR Compiler</description>
1798       <require condition="ARMv8MML"/>
1799       <require Tcompiler="IAR"/>
1800     </condition>
1801     <condition id="ARMv8MML_LE_IAR">
1802       <description>ARMv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1803       <require condition="ARMv8MML_IAR"/>
1804       <require Dendian="Little-endian"/>
1805     </condition>
1806     <condition id="ARMv8MML_BE_IAR">
1807       <description>ARMv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1808       <require condition="ARMv8MML_IAR"/>
1809       <require Dendian="Big-endian"/>
1810     </condition>
1811
1812     <condition id="ARMv8MML_FP_IAR">
1813       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1814       <require condition="ARMv8MML_FP"/>
1815       <require Tcompiler="IAR"/>
1816     </condition>
1817     <condition id="ARMv8MML_FP_LE_IAR">
1818       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1819       <require condition="ARMv8MML_FP_IAR"/>
1820       <require Dendian="Little-endian"/>
1821     </condition>
1822     <condition id="ARMv8MML_FP_BE_IAR">
1823       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1824       <require condition="ARMv8MML_FP_IAR"/>
1825       <require Dendian="Big-endian"/>
1826     </condition>
1827
1828     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1829       <description>ARMv8MML, no DSP, no FPU, IAR Compiler</description>
1830       <require condition="ARMv8MML_NODSP_NOFPU"/>
1831       <require Tcompiler="IAR"/>
1832     </condition>
1833     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1834       <description>ARMv8MML, DSP, no FPU, IAR Compiler</description>
1835       <require condition="ARMv8MML_DSP_NOFPU"/>
1836       <require Tcompiler="IAR"/>
1837     </condition>
1838     <condition id="ARMv8MML_NODSP_SP_IAR">
1839       <description>ARMv8MML, no DSP, SP FPU, IAR Compiler</description>
1840       <require condition="ARMv8MML_NODSP_SP"/>
1841       <require Tcompiler="IAR"/>
1842     </condition>
1843     <condition id="ARMv8MML_DSP_SP_IAR">
1844       <description>ARMv8MML, DSP, SP FPU, IAR Compiler</description>
1845       <require condition="ARMv8MML_DSP_SP"/>
1846       <require Tcompiler="IAR"/>
1847     </condition>
1848     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1849       <description>ARMv8MML, little endian, no DSP, no FPU, IAR Compiler</description>
1850       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1851       <require Dendian="Little-endian"/>
1852     </condition>
1853     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1854       <description>ARMv8MML, little endian, DSP, no FPU, IAR Compiler</description>
1855       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1856       <require Dendian="Little-endian"/>
1857     </condition>
1858     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1859       <description>ARMv8MML, little endian, no DSP, SP FPU, IAR Compiler</description>
1860       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1861       <require Dendian="Little-endian"/>
1862     </condition>
1863     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1864       <description>ARMv8MML, little endian, DSP, SP FPU, IAR Compiler</description>
1865       <require condition="ARMv8MML_DSP_SP_IAR"/>
1866       <require Dendian="Little-endian"/>
1867     </condition>
1868
1869     <!-- conditions selecting single devices and CMSIS Core -->
1870     <!-- used for component startup, GCC version is used for C-Startup -->
1871     <condition id="ARMCM0 CMSIS">
1872       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1873       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1874       <require Cclass="CMSIS" Cgroup="CORE"/>
1875     </condition>
1876     <condition id="ARMCM0 CMSIS GCC">
1877       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1878       <require condition="ARMCM0 CMSIS"/>
1879       <require condition="GCC"/>
1880     </condition>
1881
1882     <condition id="ARMCM0+ CMSIS">
1883       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1884       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1885       <require Cclass="CMSIS" Cgroup="CORE"/>
1886     </condition>
1887     <condition id="ARMCM0+ CMSIS GCC">
1888       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1889       <require condition="ARMCM0+ CMSIS"/>
1890       <require condition="GCC"/>
1891     </condition>
1892
1893     <condition id="ARMCM3 CMSIS">
1894       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1895       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1896       <require Cclass="CMSIS" Cgroup="CORE"/>
1897     </condition>
1898     <condition id="ARMCM3 CMSIS GCC">
1899       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1900       <require condition="ARMCM3 CMSIS"/>
1901       <require condition="GCC"/>
1902     </condition>
1903
1904     <condition id="ARMCM4 CMSIS">
1905       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1906       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1907       <require Cclass="CMSIS" Cgroup="CORE"/>
1908     </condition>
1909     <condition id="ARMCM4 CMSIS GCC">
1910       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1911       <require condition="ARMCM4 CMSIS"/>
1912       <require condition="GCC"/>
1913     </condition>
1914
1915     <condition id="ARMCM7 CMSIS">
1916       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1917       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1918       <require Cclass="CMSIS" Cgroup="CORE"/>
1919     </condition>
1920     <condition id="ARMCM7 CMSIS GCC">
1921       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1922       <require condition="ARMCM7 CMSIS"/>
1923       <require condition="GCC"/>
1924     </condition>
1925
1926     <condition id="ARMCM23 CMSIS">
1927       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1928       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1929       <require Cclass="CMSIS" Cgroup="CORE"/>
1930     </condition>
1931     <condition id="ARMCM23 CMSIS GCC">
1932       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1933       <require condition="ARMCM23 CMSIS"/>
1934       <require condition="GCC"/>
1935     </condition>
1936
1937     <condition id="ARMCM33 CMSIS">
1938       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1939       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1940       <require Cclass="CMSIS" Cgroup="CORE"/>
1941     </condition>
1942     <condition id="ARMCM33 CMSIS GCC">
1943       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1944       <require condition="ARMCM33 CMSIS"/>
1945       <require condition="GCC"/>
1946     </condition>
1947
1948     <condition id="ARMSC000 CMSIS">
1949       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1950       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1951       <require Cclass="CMSIS" Cgroup="CORE"/>
1952     </condition>
1953     <condition id="ARMSC000 CMSIS GCC">
1954       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1955       <require condition="ARMSC000 CMSIS"/>
1956       <require condition="GCC"/>
1957     </condition>
1958
1959     <condition id="ARMSC300 CMSIS">
1960       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1961       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1962       <require Cclass="CMSIS" Cgroup="CORE"/>
1963     </condition>
1964     <condition id="ARMSC300 CMSIS GCC">
1965       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1966       <require condition="ARMSC300 CMSIS"/>
1967       <require condition="GCC"/>
1968     </condition>
1969
1970     <condition id="ARMv8MBL CMSIS">
1971       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1972       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1973       <require Cclass="CMSIS" Cgroup="CORE"/>
1974     </condition>
1975     <condition id="ARMv8MBL CMSIS GCC">
1976       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1977       <require condition="ARMv8MBL CMSIS"/>
1978       <require condition="GCC"/>
1979     </condition>
1980
1981     <condition id="ARMv8MML CMSIS">
1982       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1983       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1984       <require Cclass="CMSIS" Cgroup="CORE"/>
1985     </condition>
1986     <condition id="ARMv8MML CMSIS GCC">
1987       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1988       <require condition="ARMv8MML CMSIS"/>
1989       <require condition="GCC"/>
1990     </condition>
1991
1992     <condition id="ARMCA5 CMSIS">
1993       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1994       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1995       <require Cclass="CMSIS" Cgroup="CORE"/>
1996     </condition>
1997
1998     <condition id="ARMCA7 CMSIS">
1999       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
2000       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2001       <require Cclass="CMSIS" Cgroup="CORE"/>
2002     </condition>
2003
2004     <condition id="ARMCA9 CMSIS">
2005       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
2006       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2007       <require Cclass="CMSIS" Cgroup="CORE"/>
2008     </condition>
2009
2010     <!-- CMSIS DSP -->
2011     <condition id="CMSIS DSP">
2012       <description>Components required for DSP</description>
2013       <require condition="ARMv6_7_8-M Device"/>
2014       <require condition="ARMCC GCC"/>
2015       <require Cclass="CMSIS" Cgroup="CORE"/>
2016     </condition>
2017
2018     <!-- RTOS RTX -->
2019     <condition id="RTOS RTX">
2020       <description>Components required for RTOS RTX</description>
2021       <require condition="ARMv6_7-M Device"/>
2022       <require condition="ARMCC GCC IAR"/>
2023       <require Cclass="Device" Cgroup="Startup"/>
2024       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2025     </condition>
2026     <condition id="RTOS RTX IFX">
2027       <description>Components required for RTOS RTX IFX</description>
2028       <require condition="ARMv6_7-M Device"/>
2029       <require condition="ARMCC GCC IAR"/>
2030       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2031       <require Cclass="Device" Cgroup="Startup"/>
2032       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2033     </condition>
2034     <condition id="RTOS RTX5">
2035       <description>Components required for RTOS RTX5</description>
2036       <require condition="ARMv6_7_8-M Device"/>
2037       <require condition="ARMCC GCC IAR"/>
2038       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2039     </condition>
2040     <condition id="RTOS2 RTX5">
2041       <description>Components required for RTOS2 RTX5</description>
2042       <require condition="ARMv6_7_8-M Device"/>
2043       <require condition="ARMCC GCC IAR"/>
2044       <require Cclass="CMSIS"  Cgroup="CORE"/>
2045       <require Cclass="Device" Cgroup="Startup"/>
2046     </condition>
2047     <condition id="RTOS2 RTX5 v7-A">
2048       <description>Components required for RTOS2 RTX5 v7-A</description>
2049       <require condition="ARMv7-A Device"/>
2050       <require condition="ARMCC GCC IAR"/>
2051       <require Cclass="CMSIS"  Cgroup="CORE"/>
2052       <require Cclass="Device" Cgroup="Startup"/>
2053       <require Cclass="Device" Cgroup="OS Tick"/>
2054       <require Cclass="Device" Cgroup="IRQ Controller"/>
2055     </condition>
2056     <condition id="RTOS2 RTX5 Lib">
2057       <description>Components required for RTOS2 RTX5 Library</description>
2058       <require condition="ARMv6_7_8-M Device"/>
2059       <require condition="ARMCC GCC IAR"/>
2060       <require Cclass="CMSIS"  Cgroup="CORE"/>
2061       <require Cclass="Device" Cgroup="Startup"/>
2062     </condition>
2063     <condition id="RTOS2 RTX5 NS">
2064       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2065       <require condition="ARMv8-M TZ Device"/>
2066       <require condition="ARMCC GCC IAR"/>
2067       <require Cclass="CMSIS"  Cgroup="CORE"/>
2068       <require Cclass="Device" Cgroup="Startup"/>
2069     </condition>
2070
2071     <!-- OS Tick -->
2072     <condition id="OS Tick PTIM">
2073       <description>Components required for OS Tick Private Timer</description>
2074       <require condition="CA5_CA9"/>
2075       <require Cclass="Device" Cgroup="IRQ Controller"/>
2076     </condition>
2077
2078     <condition id="OS Tick GTIM">
2079       <description>Components required for OS Tick Generic Physical Timer</description>
2080       <require condition="CA7"/>
2081       <require Cclass="Device" Cgroup="IRQ Controller"/>
2082     </condition>
2083
2084   </conditions>
2085
2086   <components>
2087     <!-- CMSIS-Core component -->
2088     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2"  condition="ARMv6_7_8-M Device" >
2089       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2090       <files>
2091         <!-- CPU independent -->
2092         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2093         <file category="include" name="CMSIS/Include/"/>
2094         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2095         <!-- Code template -->
2096         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2097         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2098       </files>
2099     </component>
2100
2101     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.1"  condition="ARMv7-A Device" >
2102       <description>CMSIS-CORE for Cortex-A</description>
2103       <files>
2104         <!-- CPU independent -->
2105         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2106         <file category="include" name="CMSIS/Core_A/Include/"/>
2107       </files>
2108     </component>
2109
2110     <!-- CMSIS-Startup components -->
2111     <!-- Cortex-M0 -->
2112     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2113       <description>System and Startup for Generic ARM Cortex-M0 device</description>
2114       <files>
2115         <!-- include folder / device header file -->
2116         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2117         <!-- startup / system file -->
2118         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2119         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2120         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2121         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2122         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2123       </files>
2124     </component>
2125     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2126       <description>System and Startup for Generic ARM Cortex-M0 device</description>
2127       <files>
2128         <!-- include folder / device header file -->
2129         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2130         <!-- startup / system file -->
2131         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2132         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2133         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2134       </files>
2135     </component>
2136
2137     <!-- Cortex-M0+ -->
2138     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2139       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
2140       <files>
2141         <!-- include folder / device header file -->
2142         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2143         <!-- startup / system file -->
2144         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2145         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2146         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2147         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2148         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2149       </files>
2150     </component>
2151     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2152       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
2153       <files>
2154         <!-- include folder / device header file -->
2155         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2156         <!-- startup / system file -->
2157         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2158         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2159         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2160       </files>
2161     </component>
2162
2163     <!-- Cortex-M3 -->
2164     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2165       <description>System and Startup for Generic ARM Cortex-M3 device</description>
2166       <files>
2167         <!-- include folder / device header file -->
2168         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2169         <!-- startup / system file -->
2170         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2171         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2172         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2173         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2174         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2175       </files>
2176     </component>
2177     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2178       <description>System and Startup for Generic ARM Cortex-M3 device</description>
2179       <files>
2180         <!-- include folder / device header file -->
2181         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2182         <!-- startup / system file -->
2183         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2184         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2185         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2186       </files>
2187     </component>
2188
2189     <!-- Cortex-M4 -->
2190     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2191       <description>System and Startup for Generic ARM Cortex-M4 device</description>
2192       <files>
2193         <!-- include folder / device header file -->
2194         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2195         <!-- startup / system file -->
2196         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2197         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2198         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2199         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2200         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2201       </files>
2202     </component>
2203     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2204       <description>System and Startup for Generic ARM Cortex-M4 device</description>
2205       <files>
2206         <!-- include folder / device header file -->
2207         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2208         <!-- startup / system file -->
2209         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2210         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2211         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2212       </files>
2213     </component>
2214
2215     <!-- Cortex-M7 -->
2216     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2217       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2218       <files>
2219         <!-- include folder / device header file -->
2220         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2221         <!-- startup / system file -->
2222         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2223         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2224         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2225         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2226         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2227       </files>
2228     </component>
2229     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2230       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2231       <files>
2232         <!-- include folder / device header file -->
2233         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2234         <!-- startup / system file -->
2235         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2236         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2237         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2238       </files>
2239     </component>
2240
2241     <!-- Cortex-M23 -->
2242     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2243       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2244       <files>
2245         <!-- include folder / device header file -->
2246         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2247         <!-- startup / system file -->
2248         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2249         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2250         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2251         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2252         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2253         <!-- SAU configuration -->
2254         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2255       </files>
2256     </component>
2257     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2258       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2259       <files>
2260         <!-- include folder / device header file -->
2261         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2262         <!-- startup / system file -->
2263         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2264         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2265         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2266         <!-- SAU configuration -->
2267         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2268       </files>
2269     </component>
2270
2271     <!-- Cortex-M33 -->
2272     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2273       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2274       <files>
2275         <!-- include folder / device header file -->
2276         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2277         <!-- startup / system file -->
2278         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2279         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2280         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2281         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2282         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2283         <!-- SAU configuration -->
2284         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2285       </files>
2286     </component>
2287     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2288       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2289       <files>
2290         <!-- include folder / device header file -->
2291         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2292         <!-- startup / system file -->
2293         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2294         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2295         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2296         <!-- SAU configuration -->
2297         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2298       </files>
2299     </component>
2300
2301     <!-- Cortex-SC000 -->
2302     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2303       <description>System and Startup for Generic ARM SC000 device</description>
2304       <files>
2305         <!-- include folder / device header file -->
2306         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2307         <!-- startup / system file -->
2308         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2309         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2310         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2311         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2312         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2313       </files>
2314     </component>
2315     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2316       <description>System and Startup for Generic ARM SC000 device</description>
2317       <files>
2318         <!-- include folder / device header file -->
2319         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2320         <!-- startup / system file -->
2321         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2322         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2323         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2324       </files>
2325     </component>
2326
2327     <!-- Cortex-SC300 -->
2328     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2329       <description>System and Startup for Generic ARM SC300 device</description>
2330       <files>
2331         <!-- include folder / device header file -->
2332         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2333         <!-- startup / system file -->
2334         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2335         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2336         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2337         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2338         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2339       </files>
2340     </component>
2341     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2342       <description>System and Startup for Generic ARM SC300 device</description>
2343       <files>
2344         <!-- include folder / device header file -->
2345         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2346         <!-- startup / system file -->
2347         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2348         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2349         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2350       </files>
2351     </component>
2352
2353     <!-- ARMv8MBL -->
2354     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2355       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2356       <files>
2357         <!-- include folder / device header file -->
2358         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2359         <!-- startup / system file -->
2360         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2361         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2362         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2363         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2364         <!-- SAU configuration -->
2365         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2366       </files>
2367     </component>
2368     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2369       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2370       <files>
2371         <!-- include folder / device header file -->
2372         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2373         <!-- startup / system file -->
2374         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2375         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2376         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2377         <!-- SAU configuration -->
2378         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2379       </files>
2380     </component>
2381
2382     <!-- ARMv8MML -->
2383     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2384       <description>System and Startup for Generic ARM ARMv8MML device</description>
2385       <files>
2386         <!-- include folder / device header file -->
2387         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2388         <!-- startup / system file -->
2389         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2390         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2391         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2392         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2393         <!-- SAU configuration -->
2394         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2395       </files>
2396     </component>
2397     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2398       <description>System and Startup for Generic ARM ARMv8MML device</description>
2399       <files>
2400         <!-- include folder / device header file -->
2401         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2402         <!-- startup / system file -->
2403         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2404         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2405         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2406         <!-- SAU configuration -->
2407         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2408       </files>
2409     </component>
2410
2411     <!-- Cortex-A5 -->
2412     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2413       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2414       <files>
2415         <!-- include folder / device header file -->
2416         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2417         <!-- startup / system / mmu files -->
2418         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2419         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2420         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2421         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2422         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2423         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2424         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2425         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2426         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2427         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2428         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2429         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2430
2431       </files>
2432     </component>
2433
2434     <!-- Cortex-A7 -->
2435     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2436       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2437       <files>
2438         <!-- include folder / device header file -->
2439         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2440         <!-- startup / system / mmu files -->
2441         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2442         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2443         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2444         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2445         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2446         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2447         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2448         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2449         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2450         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2451         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2452         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2453       </files>
2454     </component>
2455
2456     <!-- Cortex-A9 -->
2457     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2458       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2459       <files>
2460         <!-- include folder / device header file -->
2461         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2462         <!-- startup / system / mmu files -->
2463         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2464         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2465         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2466         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2467         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2468         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2469         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2470         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2471         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2472         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2473         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2474         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2475       </files>
2476     </component>
2477
2478     <!-- IRQ Controller -->
2479     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2480       <description>IRQ Controller implementation using GIC</description>
2481       <files>
2482         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2483       </files>
2484     </component>
2485
2486     <!-- OS Tick -->
2487     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
2488       <description>OS Tick implementation using Private Timer</description>
2489       <files>
2490         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2491       </files>
2492     </component>
2493
2494     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2495       <description>OS Tick implementation using Generic Physical Timer</description>
2496       <files>
2497         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2498       </files>
2499     </component>
2500
2501     <!-- CMSIS-DSP component -->
2502     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2503       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2504       <files>
2505         <!-- CPU independent -->
2506         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2507         <file category="header" name="CMSIS/Include/arm_math.h"/>
2508
2509         <!-- CPU and Compiler dependent -->
2510         <!-- ARMCC -->
2511         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2512         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2513         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2514         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2515         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2516         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2517         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2518         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2519         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2520         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2521         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2522         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2523         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2524         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2525
2526         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2527         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2528         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2529         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2530         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2531         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2532         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2533         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2534         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2535         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2536         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2537         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2538
2539         <!-- GCC -->
2540         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2541         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2542         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2543         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2544         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2545         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2546         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2547
2548         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2549         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2550         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2551         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2552         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2553         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2554         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2555         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2556         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2557         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2558         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2559         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2560
2561       </files>
2562     </component>
2563
2564     <!-- CMSIS-RTOS Keil RTX component -->
2565     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2566       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2567       <RTE_Components_h>
2568         <!-- the following content goes into file 'RTE_Components.h' -->
2569         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2570         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2571       </RTE_Components_h>
2572       <files>
2573         <!-- CPU independent -->
2574         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2575         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2576         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2577
2578         <!-- RTX templates -->
2579         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2580         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2581         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2582         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2583         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2584         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2585         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2586         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2587         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2588         <!-- tool-chain specific template file -->
2589         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2590         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2591         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2592
2593         <!-- CPU and Compiler dependent -->
2594         <!-- ARMCC -->
2595         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2596         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2597         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2598         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2599         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2600         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2601         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2602         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2603         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2604         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2605         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2606         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2607         <!-- GCC -->
2608         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2609         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2610         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2611         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2612         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2613         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2614         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2615         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2616         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2617         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2618         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2619         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2620         <!-- IAR -->
2621         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2622         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2623         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2624         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2625         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2626         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2627         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2628         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2629         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2630         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2631         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2632         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2633       </files>
2634     </component>
2635     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2636     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2637       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2638       <RTE_Components_h>
2639         <!-- the following content goes into file 'RTE_Components.h' -->
2640         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2641         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2642       </RTE_Components_h>
2643       <files>
2644         <!-- CPU independent -->
2645         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2646         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2647         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2648
2649         <!-- RTX templates -->
2650         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2651         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2652         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2653         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2654         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2655         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2656         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2657         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2658         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2659         <!-- tool-chain specific template file -->
2660         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2661         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2662         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2663
2664         <!-- CPU and Compiler dependent -->
2665         <!-- ARMCC -->
2666         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2667         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2668         <!-- GCC -->
2669         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2670         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2671         <!-- IAR -->
2672       </files>
2673     </component>
2674
2675     <!-- CMSIS-RTOS Keil RTX5 component -->
2676     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.3" Capiversion="1.0.0" condition="RTOS RTX5">
2677       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2678       <RTE_Components_h>
2679         <!-- the following content goes into file 'RTE_Components.h' -->
2680         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2681         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2682       </RTE_Components_h>
2683       <files>
2684         <!-- RTX header file -->
2685         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2686         <!-- RTX compatibility module for API V1 -->
2687         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2688       </files>
2689     </component>
2690
2691     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2692     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 Lib">
2693       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2694       <RTE_Components_h>
2695         <!-- the following content goes into file 'RTE_Components.h' -->
2696         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2697         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2698       </RTE_Components_h>
2699       <files>
2700         <!-- RTX documentation -->
2701         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2702
2703         <!-- RTX header files -->
2704         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2705
2706         <!-- RTX configuration -->
2707         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2708         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2709
2710         <!-- RTX templates -->
2711         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2712         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2713         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2714         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2715         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2716         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2717         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2718         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2719         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2720         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2721
2722         <!-- RTX library configuration -->
2723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2724
2725         <!-- RTX libraries (CPU and Compiler dependent) -->
2726         <!-- ARMCC -->
2727         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2728         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2729         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2730         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2731         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2732         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2733         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2734         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2735         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2736         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2737         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2738         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2739         <!-- GCC -->
2740         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2741         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2742         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2743         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2744         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2745         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2746         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2747         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2748         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2749         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2750         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2751         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2752         <!-- IAR -->
2753         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2754         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2755         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2756         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2757         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2758         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2759       </files>
2760     </component>
2761     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2762       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2763       <RTE_Components_h>
2764         <!-- the following content goes into file 'RTE_Components.h' -->
2765         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2766         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2767         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2768       </RTE_Components_h>
2769       <files>
2770         <!-- RTX documentation -->
2771         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2772
2773         <!-- RTX header files -->
2774         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2775
2776         <!-- RTX configuration -->
2777         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2778         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2779
2780         <!-- RTX templates -->
2781         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2782         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2783         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2784         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2785         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2786         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2787         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2788         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2789         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2790         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2791
2792         <!-- RTX library configuration -->
2793         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2794
2795         <!-- RTX libraries (CPU and Compiler dependent) -->
2796         <!-- ARMCC -->
2797         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2798         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2799         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2800         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2801         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2802         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2803         <!-- GCC -->
2804         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2805         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2806         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2807         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2808         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2809         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2810       </files>
2811     </component>
2812     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5">
2813       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2814       <RTE_Components_h>
2815         <!-- the following content goes into file 'RTE_Components.h' -->
2816         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2817         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2818         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2819       </RTE_Components_h>
2820       <files>
2821         <!-- RTX documentation -->
2822         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2823
2824         <!-- RTX header files -->
2825         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2826
2827         <!-- RTX configuration -->
2828         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2829         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2830
2831         <!-- RTX templates -->
2832         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2833         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2834         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2835         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2836         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2837         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2838         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2839         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2840         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2841         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2842
2843         <!-- RTX sources (core) -->
2844         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2845         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2846         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2847         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2848         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2849         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2850         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2851         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2852         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2853         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2854         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2855         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2856         <!-- RTX sources (library configuration) -->
2857         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2858         <!-- RTX sources (handlers ARMCC) -->
2859         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2860         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2861         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2862         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2863         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2864         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2865         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2866         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2867         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2868         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2869         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2870         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2871         <!-- RTX sources (handlers GCC) -->
2872         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2873         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2874         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2875         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2876         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2877         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2878         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2879         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2880         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2881         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2882         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2883         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2884         <!-- RTX sources (handlers IAR) -->
2885         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2886         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2887         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2888         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2889         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2890         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2891         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
2892         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
2893         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
2894         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
2895         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
2896         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
2897         <!-- OS Tick (SysTick) -->
2898         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2899       </files>
2900     </component>
2901     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 v7-A">
2902       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2903       <RTE_Components_h>
2904         <!-- the following content goes into file 'RTE_Components.h' -->
2905         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2906         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2907         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2908       </RTE_Components_h>
2909       <files>
2910         <!-- RTX documentation -->
2911         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2912
2913         <!-- RTX header files -->
2914         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2915
2916         <!-- RTX configuration -->
2917         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2918         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2919
2920         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2921
2922         <!-- RTX templates -->
2923         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2924         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2925         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2926         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2927         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2928         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2929         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2930         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2931         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2932         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2933
2934         <!-- RTX sources (core) -->
2935         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2936         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2937         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2938         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2939         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2940         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2941         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2942         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2943         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2944         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2945         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2946         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2947         <!-- RTX sources (library configuration) -->
2948         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2949         <!-- RTX sources (handlers ARMCC) -->
2950         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2951         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2952         <!-- RTX sources (handlers GCC) -->
2953         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2954         <!-- RTX sources (handlers IAR) -->
2955         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2956       </files>
2957     </component>
2958     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2959       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2960       <RTE_Components_h>
2961         <!-- the following content goes into file 'RTE_Components.h' -->
2962         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2963         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2964         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2965         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2966       </RTE_Components_h>
2967       <files>
2968         <!-- RTX documentation -->
2969         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2970
2971         <!-- RTX header files -->
2972         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2973
2974         <!-- RTX configuration -->
2975         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2976         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2977
2978         <!-- RTX templates -->
2979         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2980         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2981         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2982         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2983         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2984         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2985         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2986         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2987         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2988         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2989
2990         <!-- RTX sources (core) -->
2991         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2992         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2993         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2994         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2995         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2996         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2997         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2998         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2999         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3000         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3001         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3002         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3003         <!-- RTX sources (library configuration) -->
3004         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3005         <!-- RTX sources (ARMCC handlers) -->
3006         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3007         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3008         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3009         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3010         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3011         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3012         <!-- RTX sources (GCC handlers) -->
3013         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3014         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3015         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3016         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3017         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3018         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3019         <!-- RTX sources (IAR handlers) -->
3020         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3021         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3022         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3023         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3024         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3025         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3026         <!-- OS Tick (SysTick) -->
3027         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3028       </files>
3029     </component>
3030
3031   </components>
3032
3033   <boards>
3034     <board name="uVision Simulator" vendor="Keil">
3035       <description>uVision Simulator</description>
3036       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3037       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3038       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3039       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3040       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3041       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3042       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3043       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3044       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3045       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3046       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3047       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3048       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3049       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3050       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3051       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3052       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3053       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3054       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3055     </board>
3056
3057     <board name="Fixed Virtual Platform" vendor="ARM">
3058       <description>Fixed Virtual Platform</description>
3059       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3060       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3061       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3062     </board>
3063   </boards>
3064
3065   <examples>
3066     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
3067       <description>DSP_Lib Class Marks example</description>
3068       <board name="uVision Simulator" vendor="Keil"/>
3069       <project>
3070         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3071       </project>
3072       <attributes>
3073         <component Cclass="CMSIS" Cgroup="CORE"/>
3074         <component Cclass="CMSIS" Cgroup="DSP"/>
3075         <component Cclass="Device" Cgroup="Startup"/>
3076         <category>Getting Started</category>
3077       </attributes>
3078     </example>
3079
3080     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
3081       <description>DSP_Lib Convolution example</description>
3082       <board name="uVision Simulator" vendor="Keil"/>
3083       <project>
3084         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3085       </project>
3086       <attributes>
3087         <component Cclass="CMSIS" Cgroup="CORE"/>
3088         <component Cclass="CMSIS" Cgroup="DSP"/>
3089         <component Cclass="Device" Cgroup="Startup"/>
3090         <category>Getting Started</category>
3091       </attributes>
3092     </example>
3093
3094     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
3095       <description>DSP_Lib Dotproduct example</description>
3096       <board name="uVision Simulator" vendor="Keil"/>
3097       <project>
3098         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3099       </project>
3100       <attributes>
3101         <component Cclass="CMSIS" Cgroup="CORE"/>
3102         <component Cclass="CMSIS" Cgroup="DSP"/>
3103         <component Cclass="Device" Cgroup="Startup"/>
3104         <category>Getting Started</category>
3105       </attributes>
3106     </example>
3107
3108     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
3109       <description>DSP_Lib FFT Bin example</description>
3110       <board name="uVision Simulator" vendor="Keil"/>
3111       <project>
3112         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3113       </project>
3114       <attributes>
3115         <component Cclass="CMSIS" Cgroup="CORE"/>
3116         <component Cclass="CMSIS" Cgroup="DSP"/>
3117         <component Cclass="Device" Cgroup="Startup"/>
3118         <category>Getting Started</category>
3119       </attributes>
3120     </example>
3121
3122     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
3123       <description>DSP_Lib FIR example</description>
3124       <board name="uVision Simulator" vendor="Keil"/>
3125       <project>
3126         <environment name="uv" load="arm_fir_example.uvprojx"/>
3127       </project>
3128       <attributes>
3129         <component Cclass="CMSIS" Cgroup="CORE"/>
3130         <component Cclass="CMSIS" Cgroup="DSP"/>
3131         <component Cclass="Device" Cgroup="Startup"/>
3132         <category>Getting Started</category>
3133       </attributes>
3134     </example>
3135
3136     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
3137       <description>DSP_Lib Graphic Equalizer example</description>
3138       <board name="uVision Simulator" vendor="Keil"/>
3139       <project>
3140         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3141       </project>
3142       <attributes>
3143         <component Cclass="CMSIS" Cgroup="CORE"/>
3144         <component Cclass="CMSIS" Cgroup="DSP"/>
3145         <component Cclass="Device" Cgroup="Startup"/>
3146         <category>Getting Started</category>
3147       </attributes>
3148     </example>
3149
3150     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
3151       <description>DSP_Lib Linear Interpolation example</description>
3152       <board name="uVision Simulator" vendor="Keil"/>
3153       <project>
3154         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3155       </project>
3156       <attributes>
3157         <component Cclass="CMSIS" Cgroup="CORE"/>
3158         <component Cclass="CMSIS" Cgroup="DSP"/>
3159         <component Cclass="Device" Cgroup="Startup"/>
3160         <category>Getting Started</category>
3161       </attributes>
3162     </example>
3163
3164     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
3165       <description>DSP_Lib Matrix example</description>
3166       <board name="uVision Simulator" vendor="Keil"/>
3167       <project>
3168         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3169       </project>
3170       <attributes>
3171         <component Cclass="CMSIS" Cgroup="CORE"/>
3172         <component Cclass="CMSIS" Cgroup="DSP"/>
3173         <component Cclass="Device" Cgroup="Startup"/>
3174         <category>Getting Started</category>
3175       </attributes>
3176     </example>
3177
3178     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
3179       <description>DSP_Lib Signal Convergence example</description>
3180       <board name="uVision Simulator" vendor="Keil"/>
3181       <project>
3182         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3183       </project>
3184       <attributes>
3185         <component Cclass="CMSIS" Cgroup="CORE"/>
3186         <component Cclass="CMSIS" Cgroup="DSP"/>
3187         <component Cclass="Device" Cgroup="Startup"/>
3188         <category>Getting Started</category>
3189       </attributes>
3190     </example>
3191
3192     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
3193       <description>DSP_Lib Sinus/Cosinus example</description>
3194       <board name="uVision Simulator" vendor="Keil"/>
3195       <project>
3196         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3197       </project>
3198       <attributes>
3199         <component Cclass="CMSIS" Cgroup="CORE"/>
3200         <component Cclass="CMSIS" Cgroup="DSP"/>
3201         <component Cclass="Device" Cgroup="Startup"/>
3202         <category>Getting Started</category>
3203       </attributes>
3204     </example>
3205
3206     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
3207       <description>DSP_Lib Variance example</description>
3208       <board name="uVision Simulator" vendor="Keil"/>
3209       <project>
3210         <environment name="uv" load="arm_variance_example.uvprojx"/>
3211       </project>
3212       <attributes>
3213         <component Cclass="CMSIS" Cgroup="CORE"/>
3214         <component Cclass="CMSIS" Cgroup="DSP"/>
3215         <component Cclass="Device" Cgroup="Startup"/>
3216         <category>Getting Started</category>
3217       </attributes>
3218     </example>
3219
3220     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3221       <description>CMSIS-RTOS2 Blinky example</description>
3222       <board name="uVision Simulator" vendor="Keil"/>
3223       <project>
3224         <environment name="uv" load="Blinky.uvprojx"/>
3225       </project>
3226       <attributes>
3227         <component Cclass="CMSIS" Cgroup="CORE"/>
3228         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3229         <component Cclass="Device" Cgroup="Startup"/>
3230         <category>Getting Started</category>
3231       </attributes>
3232     </example>
3233
3234     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3235       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3236       <board name="uVision Simulator" vendor="Keil"/>
3237       <project>
3238         <environment name="uv" load="Blinky.uvprojx"/>
3239       </project>
3240       <attributes>
3241         <component Cclass="CMSIS" Cgroup="CORE"/>
3242         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3243         <component Cclass="Device" Cgroup="Startup"/>
3244         <category>Getting Started</category>
3245       </attributes>
3246     </example>
3247
3248     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3249       <description>CMSIS-RTOS2 Message Queue Example</description>
3250       <board name="uVision Simulator" vendor="Keil"/>
3251       <project>
3252         <environment name="uv" load="MsqQueue.uvprojx"/>
3253       </project>
3254       <attributes>
3255         <component Cclass="CMSIS" Cgroup="CORE"/>
3256         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3257         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3258         <component Cclass="Device" Cgroup="Startup"/>
3259         <category>Getting Started</category>
3260       </attributes>
3261     </example>
3262
3263     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3264       <description>CMSIS-RTOS2 Memory Pool Example</description>
3265       <board name="Fixed Virtual Platform" vendor="ARM"/>
3266       <project>
3267         <environment name="uv" load="MemPool.uvprojx"/>
3268       </project>
3269       <attributes>
3270         <component Cclass="CMSIS" Cgroup="CORE"/>
3271         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3272         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3273         <component Cclass="Device" Cgroup="Startup"/>
3274         <category>Getting Started</category>
3275       </attributes>
3276     </example>
3277
3278     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3279       <description>Bare-metal secure/non-secure example without RTOS</description>
3280       <board name="uVision Simulator" vendor="Keil"/>
3281       <project>
3282         <environment name="uv" load="NoRTOS.uvmpw"/>
3283       </project>
3284       <attributes>
3285         <component Cclass="CMSIS" Cgroup="CORE"/>
3286         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3287         <component Cclass="Device" Cgroup="Startup"/>
3288         <category>Getting Started</category>
3289       </attributes>
3290     </example>
3291
3292     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3293       <description>Secure/non-secure RTOS example with thread context management</description>
3294       <board name="uVision Simulator" vendor="Keil"/>
3295       <project>
3296         <environment name="uv" load="RTOS.uvmpw"/>
3297       </project>
3298       <attributes>
3299         <component Cclass="CMSIS" Cgroup="CORE"/>
3300         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3301         <component Cclass="Device" Cgroup="Startup"/>
3302         <category>Getting Started</category>
3303       </attributes>
3304     </example>
3305
3306     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3307       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3308       <board name="uVision Simulator" vendor="Keil"/>
3309       <project>
3310         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3311       </project>
3312       <attributes>
3313         <component Cclass="CMSIS" Cgroup="CORE"/>
3314         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3315         <component Cclass="Device" Cgroup="Startup"/>
3316         <category>Getting Started</category>
3317       </attributes>
3318     </example>
3319
3320   </examples>
3321
3322 </package>