begriffs open source - cmsis/blob - main/Core_A/group__CMSIS__CPSR__BITS.html

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  43    <div id="projectname">CMSIS-Core (Cortex-A)
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  52    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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 126 <div class="header">
 127   <div class="summary">
 128 <a href="#define-members">Macros</a>  </div>
 129   <div class="headertitle"><div class="title">CPSR Bits<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a> &raquo; <a class="el" href="group__CMSIS__CPSR.html">Current Program Status Register (CPSR)</a></div></div></div>
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 131 <div class="contents">
 132
 133 <p>Bit position and mask macros.
 134 <a href="#details">More...</a></p>
 135 <table class="memberdecls">
 136 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
 137 Macros</h2></td></tr>
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 142 <tr class="memdesc:ga6c4a636a3b5ec71e0f2eb021ac353544"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: N Mask.  <br /></td></tr>
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 148 <tr class="memdesc:gab091112988009fb8360b01c79d993f67"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: Z Mask.  <br /></td></tr>
 149 <tr class="separator:gab091112988009fb8360b01c79d993f67"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 151 <tr class="memdesc:ga8565df3cf054dc09506e1c0ea4790131"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: C Position.  <br /></td></tr>
 152 <tr class="separator:ga8565df3cf054dc09506e1c0ea4790131"><td class="memSeparator" colspan="2">&#160;</td></tr>
 153 <tr class="memitem:ga3bc30b14b9b0bf113600eb882304244c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga3bc30b14b9b0bf113600eb882304244c">CPSR_C_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga8565df3cf054dc09506e1c0ea4790131">CPSR_C_Pos</a>)</td></tr>
 154 <tr class="memdesc:ga3bc30b14b9b0bf113600eb882304244c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: C Mask.  <br /></td></tr>
 155 <tr class="separator:ga3bc30b14b9b0bf113600eb882304244c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 157 <tr class="memdesc:ga5685fa5745113b4ff61181ee439bc2a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: V Position.  <br /></td></tr>
 158 <tr class="separator:ga5685fa5745113b4ff61181ee439bc2a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 159 <tr class="memitem:ga9b9fe5c1da5e922cbff18215b70b4252"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga9b9fe5c1da5e922cbff18215b70b4252">CPSR_V_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga5685fa5745113b4ff61181ee439bc2a5">CPSR_V_Pos</a>)</td></tr>
 160 <tr class="memdesc:ga9b9fe5c1da5e922cbff18215b70b4252"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: V Mask.  <br /></td></tr>
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 164 <tr class="separator:ga84c8427c30fdce15f7191bd4f93d7ab7"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 166 <tr class="memdesc:gaba36b1ac0438594afdc6eef220d2e146"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: Q Mask.  <br /></td></tr>
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 169 <tr class="memdesc:ga450f3fff0642431fd3478a04b70c3d87"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: IT0 Position.  <br /></td></tr>
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 172 <tr class="memdesc:ga128366788d0f94d52fbe4610162c97e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: IT0 Mask.  <br /></td></tr>
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 175 <tr class="memdesc:ga6b49ddfb770143a51aa682b56be2e990"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: J Position.  <br /></td></tr>
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 178 <tr class="memdesc:ga6b52a05ec2e95ade71b65090f19285c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: J Mask.  <br /></td></tr>
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 181 <tr class="memdesc:ga37aa76465f6c6055395790e74169d760"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: GE Position.  <br /></td></tr>
 182 <tr class="separator:ga37aa76465f6c6055395790e74169d760"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 184 <tr class="memdesc:ga9a3a6a87437892954cb37662ff27521a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: GE Mask.  <br /></td></tr>
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 187 <tr class="memdesc:gaa2ab21d87052b439c06f058fb65036a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: IT1 Position.  <br /></td></tr>
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 190 <tr class="memdesc:ga791263c8a9707795b5824dae5485cd39"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: IT1 Mask.  <br /></td></tr>
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 193 <tr class="memdesc:ga6a5e065d9ea93489105c3d62c1d3c08f"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: E Position.  <br /></td></tr>
 194 <tr class="separator:ga6a5e065d9ea93489105c3d62c1d3c08f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 195 <tr class="memitem:ga6661712dd33a50ce4a42e13bf72aa35b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga6661712dd33a50ce4a42e13bf72aa35b">CPSR_E_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga6a5e065d9ea93489105c3d62c1d3c08f">CPSR_E_Pos</a>)</td></tr>
 196 <tr class="memdesc:ga6661712dd33a50ce4a42e13bf72aa35b"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: E Mask.  <br /></td></tr>
 197 <tr class="separator:ga6661712dd33a50ce4a42e13bf72aa35b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 198 <tr class="memitem:ga6f8aa35ca07825d6b4498ae6e2ab616b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga6f8aa35ca07825d6b4498ae6e2ab616b">CPSR_A_Pos</a>&#160;&#160;&#160;8U</td></tr>
 199 <tr class="memdesc:ga6f8aa35ca07825d6b4498ae6e2ab616b"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: A Position.  <br /></td></tr>
 200 <tr class="separator:ga6f8aa35ca07825d6b4498ae6e2ab616b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 201 <tr class="memitem:ga002803fa282333e0ead5c9b4cf748cb1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga002803fa282333e0ead5c9b4cf748cb1">CPSR_A_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga6f8aa35ca07825d6b4498ae6e2ab616b">CPSR_A_Pos</a>)</td></tr>
 202 <tr class="memdesc:ga002803fa282333e0ead5c9b4cf748cb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: A Mask.  <br /></td></tr>
 203 <tr class="separator:ga002803fa282333e0ead5c9b4cf748cb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 204 <tr class="memitem:gad1d9be2f731f5400fc87076ce3495e59"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gad1d9be2f731f5400fc87076ce3495e59">CPSR_I_Pos</a>&#160;&#160;&#160;7U</td></tr>
 205 <tr class="memdesc:gad1d9be2f731f5400fc87076ce3495e59"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: I Position.  <br /></td></tr>
 206 <tr class="separator:gad1d9be2f731f5400fc87076ce3495e59"><td class="memSeparator" colspan="2">&#160;</td></tr>
 207 <tr class="memitem:gad9abe93ba1179e254a70e325cb1a5834"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gad9abe93ba1179e254a70e325cb1a5834">CPSR_I_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gad1d9be2f731f5400fc87076ce3495e59">CPSR_I_Pos</a>)</td></tr>
 208 <tr class="memdesc:gad9abe93ba1179e254a70e325cb1a5834"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: I Mask.  <br /></td></tr>
 209 <tr class="separator:gad9abe93ba1179e254a70e325cb1a5834"><td class="memSeparator" colspan="2">&#160;</td></tr>
 210 <tr class="memitem:ga5e9868fdea8e65374b25ddd2fde1bf62"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga5e9868fdea8e65374b25ddd2fde1bf62">CPSR_F_Pos</a>&#160;&#160;&#160;6U</td></tr>
 211 <tr class="memdesc:ga5e9868fdea8e65374b25ddd2fde1bf62"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: F Position.  <br /></td></tr>
 212 <tr class="separator:ga5e9868fdea8e65374b25ddd2fde1bf62"><td class="memSeparator" colspan="2">&#160;</td></tr>
 213 <tr class="memitem:ga4df09481ffd9dfb17823a8e9895b1566"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga4df09481ffd9dfb17823a8e9895b1566">CPSR_F_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga5e9868fdea8e65374b25ddd2fde1bf62">CPSR_F_Pos</a>)</td></tr>
 214 <tr class="memdesc:ga4df09481ffd9dfb17823a8e9895b1566"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: F Mask.  <br /></td></tr>
 215 <tr class="separator:ga4df09481ffd9dfb17823a8e9895b1566"><td class="memSeparator" colspan="2">&#160;</td></tr>
 216 <tr class="memitem:gaa1134ff3e774b1354a43227b798a707c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gaa1134ff3e774b1354a43227b798a707c">CPSR_T_Pos</a>&#160;&#160;&#160;5U</td></tr>
 217 <tr class="memdesc:gaa1134ff3e774b1354a43227b798a707c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: T Position.  <br /></td></tr>
 218 <tr class="separator:gaa1134ff3e774b1354a43227b798a707c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 219 <tr class="memitem:ga23ed422711cbd2f9a5dcbe6c05b2a720"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga23ed422711cbd2f9a5dcbe6c05b2a720">CPSR_T_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gaa1134ff3e774b1354a43227b798a707c">CPSR_T_Pos</a>)</td></tr>
 220 <tr class="memdesc:ga23ed422711cbd2f9a5dcbe6c05b2a720"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: T Mask.  <br /></td></tr>
 221 <tr class="separator:ga23ed422711cbd2f9a5dcbe6c05b2a720"><td class="memSeparator" colspan="2">&#160;</td></tr>
 222 <tr class="memitem:ga4e9e49c9a75cf3e7d696fc77de7d44d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga4e9e49c9a75cf3e7d696fc77de7d44d1">CPSR_M_Pos</a>&#160;&#160;&#160;0U</td></tr>
 223 <tr class="memdesc:ga4e9e49c9a75cf3e7d696fc77de7d44d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Position.  <br /></td></tr>
 224 <tr class="separator:ga4e9e49c9a75cf3e7d696fc77de7d44d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 225 <tr class="memitem:gadce47959b814f70f802a139250daa04c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gadce47959b814f70f802a139250daa04c">CPSR_M_Msk</a>&#160;&#160;&#160;(0x1FUL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga4e9e49c9a75cf3e7d696fc77de7d44d1">CPSR_M_Pos</a>)</td></tr>
 226 <tr class="memdesc:gadce47959b814f70f802a139250daa04c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Mask.  <br /></td></tr>
 227 <tr class="separator:gadce47959b814f70f802a139250daa04c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 228 </table>
 229 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 230 <p>Bit position and mask macros. </p>
 231 <h2 class="groupheader">Macro Definition Documentation</h2>
 232 <a id="ga002803fa282333e0ead5c9b4cf748cb1" name="ga002803fa282333e0ead5c9b4cf748cb1"></a>
 233 <h2 class="memtitle"><span class="permalink"><a href="#ga002803fa282333e0ead5c9b4cf748cb1">&#9670;&#160;</a></span>CPSR_A_Msk</h2>
 234
 235 <div class="memitem">
 236 <div class="memproto">
 237       <table class="memname">
 238         <tr>
 239           <td class="memname">#define CPSR_A_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga6f8aa35ca07825d6b4498ae6e2ab616b">CPSR_A_Pos</a>)</td>
 240         </tr>
 241       </table>
 242 </div><div class="memdoc">
 243
 244 <p>CPSR: A Mask. </p>
 245
 246 </div>
 247 </div>
 248 <a id="ga6f8aa35ca07825d6b4498ae6e2ab616b" name="ga6f8aa35ca07825d6b4498ae6e2ab616b"></a>
 249 <h2 class="memtitle"><span class="permalink"><a href="#ga6f8aa35ca07825d6b4498ae6e2ab616b">&#9670;&#160;</a></span>CPSR_A_Pos</h2>
 250
 251 <div class="memitem">
 252 <div class="memproto">
 253       <table class="memname">
 254         <tr>
 255           <td class="memname">#define CPSR_A_Pos&#160;&#160;&#160;8U</td>
 256         </tr>
 257       </table>
 258 </div><div class="memdoc">
 259
 260 <p>CPSR: A Position. </p>
 261
 262 </div>
 263 </div>
 264 <a id="ga3bc30b14b9b0bf113600eb882304244c" name="ga3bc30b14b9b0bf113600eb882304244c"></a>
 265 <h2 class="memtitle"><span class="permalink"><a href="#ga3bc30b14b9b0bf113600eb882304244c">&#9670;&#160;</a></span>CPSR_C_Msk</h2>
 266
 267 <div class="memitem">
 268 <div class="memproto">
 269       <table class="memname">
 270         <tr>
 271           <td class="memname">#define CPSR_C_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga8565df3cf054dc09506e1c0ea4790131">CPSR_C_Pos</a>)</td>
 272         </tr>
 273       </table>
 274 </div><div class="memdoc">
 275
 276 <p>CPSR: C Mask. </p>
 277
 278 </div>
 279 </div>
 280 <a id="ga8565df3cf054dc09506e1c0ea4790131" name="ga8565df3cf054dc09506e1c0ea4790131"></a>
 281 <h2 class="memtitle"><span class="permalink"><a href="#ga8565df3cf054dc09506e1c0ea4790131">&#9670;&#160;</a></span>CPSR_C_Pos</h2>
 282
 283 <div class="memitem">
 284 <div class="memproto">
 285       <table class="memname">
 286         <tr>
 287           <td class="memname">#define CPSR_C_Pos&#160;&#160;&#160;29U</td>
 288         </tr>
 289       </table>
 290 </div><div class="memdoc">
 291
 292 <p>CPSR: C Position. </p>
 293
 294 </div>
 295 </div>
 296 <a id="ga6661712dd33a50ce4a42e13bf72aa35b" name="ga6661712dd33a50ce4a42e13bf72aa35b"></a>
 297 <h2 class="memtitle"><span class="permalink"><a href="#ga6661712dd33a50ce4a42e13bf72aa35b">&#9670;&#160;</a></span>CPSR_E_Msk</h2>
 298
 299 <div class="memitem">
 300 <div class="memproto">
 301       <table class="memname">
 302         <tr>
 303           <td class="memname">#define CPSR_E_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga6a5e065d9ea93489105c3d62c1d3c08f">CPSR_E_Pos</a>)</td>
 304         </tr>
 305       </table>
 306 </div><div class="memdoc">
 307
 308 <p>CPSR: E Mask. </p>
 309
 310 </div>
 311 </div>
 312 <a id="ga6a5e065d9ea93489105c3d62c1d3c08f" name="ga6a5e065d9ea93489105c3d62c1d3c08f"></a>
 313 <h2 class="memtitle"><span class="permalink"><a href="#ga6a5e065d9ea93489105c3d62c1d3c08f">&#9670;&#160;</a></span>CPSR_E_Pos</h2>
 314
 315 <div class="memitem">
 316 <div class="memproto">
 317       <table class="memname">
 318         <tr>
 319           <td class="memname">#define CPSR_E_Pos&#160;&#160;&#160;9U</td>
 320         </tr>
 321       </table>
 322 </div><div class="memdoc">
 323
 324 <p>CPSR: E Position. </p>
 325
 326 </div>
 327 </div>
 328 <a id="ga4df09481ffd9dfb17823a8e9895b1566" name="ga4df09481ffd9dfb17823a8e9895b1566"></a>
 329 <h2 class="memtitle"><span class="permalink"><a href="#ga4df09481ffd9dfb17823a8e9895b1566">&#9670;&#160;</a></span>CPSR_F_Msk</h2>
 330
 331 <div class="memitem">
 332 <div class="memproto">
 333       <table class="memname">
 334         <tr>
 335           <td class="memname">#define CPSR_F_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga5e9868fdea8e65374b25ddd2fde1bf62">CPSR_F_Pos</a>)</td>
 336         </tr>
 337       </table>
 338 </div><div class="memdoc">
 339
 340 <p>CPSR: F Mask. </p>
 341
 342 </div>
 343 </div>
 344 <a id="ga5e9868fdea8e65374b25ddd2fde1bf62" name="ga5e9868fdea8e65374b25ddd2fde1bf62"></a>
 345 <h2 class="memtitle"><span class="permalink"><a href="#ga5e9868fdea8e65374b25ddd2fde1bf62">&#9670;&#160;</a></span>CPSR_F_Pos</h2>
 346
 347 <div class="memitem">
 348 <div class="memproto">
 349       <table class="memname">
 350         <tr>
 351           <td class="memname">#define CPSR_F_Pos&#160;&#160;&#160;6U</td>
 352         </tr>
 353       </table>
 354 </div><div class="memdoc">
 355
 356 <p>CPSR: F Position. </p>
 357
 358 </div>
 359 </div>
 360 <a id="ga9a3a6a87437892954cb37662ff27521a" name="ga9a3a6a87437892954cb37662ff27521a"></a>
 361 <h2 class="memtitle"><span class="permalink"><a href="#ga9a3a6a87437892954cb37662ff27521a">&#9670;&#160;</a></span>CPSR_GE_Msk</h2>
 362
 363 <div class="memitem">
 364 <div class="memproto">
 365       <table class="memname">
 366         <tr>
 367           <td class="memname">#define CPSR_GE_Msk&#160;&#160;&#160;(0xFUL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga37aa76465f6c6055395790e74169d760">CPSR_GE_Pos</a>)</td>
 368         </tr>
 369       </table>
 370 </div><div class="memdoc">
 371
 372 <p>CPSR: GE Mask. </p>
 373
 374 </div>
 375 </div>
 376 <a id="ga37aa76465f6c6055395790e74169d760" name="ga37aa76465f6c6055395790e74169d760"></a>
 377 <h2 class="memtitle"><span class="permalink"><a href="#ga37aa76465f6c6055395790e74169d760">&#9670;&#160;</a></span>CPSR_GE_Pos</h2>
 378
 379 <div class="memitem">
 380 <div class="memproto">
 381       <table class="memname">
 382         <tr>
 383           <td class="memname">#define CPSR_GE_Pos&#160;&#160;&#160;16U</td>
 384         </tr>
 385       </table>
 386 </div><div class="memdoc">
 387
 388 <p>CPSR: GE Position. </p>
 389
 390 </div>
 391 </div>
 392 <a id="gad9abe93ba1179e254a70e325cb1a5834" name="gad9abe93ba1179e254a70e325cb1a5834"></a>
 393 <h2 class="memtitle"><span class="permalink"><a href="#gad9abe93ba1179e254a70e325cb1a5834">&#9670;&#160;</a></span>CPSR_I_Msk</h2>
 394
 395 <div class="memitem">
 396 <div class="memproto">
 397       <table class="memname">
 398         <tr>
 399           <td class="memname">#define CPSR_I_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gad1d9be2f731f5400fc87076ce3495e59">CPSR_I_Pos</a>)</td>
 400         </tr>
 401       </table>
 402 </div><div class="memdoc">
 403
 404 <p>CPSR: I Mask. </p>
 405
 406 </div>
 407 </div>
 408 <a id="gad1d9be2f731f5400fc87076ce3495e59" name="gad1d9be2f731f5400fc87076ce3495e59"></a>
 409 <h2 class="memtitle"><span class="permalink"><a href="#gad1d9be2f731f5400fc87076ce3495e59">&#9670;&#160;</a></span>CPSR_I_Pos</h2>
 410
 411 <div class="memitem">
 412 <div class="memproto">
 413       <table class="memname">
 414         <tr>
 415           <td class="memname">#define CPSR_I_Pos&#160;&#160;&#160;7U</td>
 416         </tr>
 417       </table>
 418 </div><div class="memdoc">
 419
 420 <p>CPSR: I Position. </p>
 421
 422 </div>
 423 </div>
 424 <a id="ga128366788d0f94d52fbe4610162c97e5" name="ga128366788d0f94d52fbe4610162c97e5"></a>
 425 <h2 class="memtitle"><span class="permalink"><a href="#ga128366788d0f94d52fbe4610162c97e5">&#9670;&#160;</a></span>CPSR_IT0_Msk</h2>
 426
 427 <div class="memitem">
 428 <div class="memproto">
 429       <table class="memname">
 430         <tr>
 431           <td class="memname">#define CPSR_IT0_Msk&#160;&#160;&#160;(3UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga450f3fff0642431fd3478a04b70c3d87">CPSR_IT0_Pos</a>)</td>
 432         </tr>
 433       </table>
 434 </div><div class="memdoc">
 435
 436 <p>CPSR: IT0 Mask. </p>
 437
 438 </div>
 439 </div>
 440 <a id="ga450f3fff0642431fd3478a04b70c3d87" name="ga450f3fff0642431fd3478a04b70c3d87"></a>
 441 <h2 class="memtitle"><span class="permalink"><a href="#ga450f3fff0642431fd3478a04b70c3d87">&#9670;&#160;</a></span>CPSR_IT0_Pos</h2>
 442
 443 <div class="memitem">
 444 <div class="memproto">
 445       <table class="memname">
 446         <tr>
 447           <td class="memname">#define CPSR_IT0_Pos&#160;&#160;&#160;25U</td>
 448         </tr>
 449       </table>
 450 </div><div class="memdoc">
 451
 452 <p>CPSR: IT0 Position. </p>
 453
 454 </div>
 455 </div>
 456 <a id="ga791263c8a9707795b5824dae5485cd39" name="ga791263c8a9707795b5824dae5485cd39"></a>
 457 <h2 class="memtitle"><span class="permalink"><a href="#ga791263c8a9707795b5824dae5485cd39">&#9670;&#160;</a></span>CPSR_IT1_Msk</h2>
 458
 459 <div class="memitem">
 460 <div class="memproto">
 461       <table class="memname">
 462         <tr>
 463           <td class="memname">#define CPSR_IT1_Msk&#160;&#160;&#160;(0x3FUL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gaa2ab21d87052b439c06f058fb65036a5">CPSR_IT1_Pos</a>)</td>
 464         </tr>
 465       </table>
 466 </div><div class="memdoc">
 467
 468 <p>CPSR: IT1 Mask. </p>
 469
 470 </div>
 471 </div>
 472 <a id="gaa2ab21d87052b439c06f058fb65036a5" name="gaa2ab21d87052b439c06f058fb65036a5"></a>
 473 <h2 class="memtitle"><span class="permalink"><a href="#gaa2ab21d87052b439c06f058fb65036a5">&#9670;&#160;</a></span>CPSR_IT1_Pos</h2>
 474
 475 <div class="memitem">
 476 <div class="memproto">
 477       <table class="memname">
 478         <tr>
 479           <td class="memname">#define CPSR_IT1_Pos&#160;&#160;&#160;10U</td>
 480         </tr>
 481       </table>
 482 </div><div class="memdoc">
 483
 484 <p>CPSR: IT1 Position. </p>
 485
 486 </div>
 487 </div>
 488 <a id="ga6b52a05ec2e95ade71b65090f19285c2" name="ga6b52a05ec2e95ade71b65090f19285c2"></a>
 489 <h2 class="memtitle"><span class="permalink"><a href="#ga6b52a05ec2e95ade71b65090f19285c2">&#9670;&#160;</a></span>CPSR_J_Msk</h2>
 490
 491 <div class="memitem">
 492 <div class="memproto">
 493       <table class="memname">
 494         <tr>
 495           <td class="memname">#define CPSR_J_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga6b49ddfb770143a51aa682b56be2e990">CPSR_J_Pos</a>)</td>
 496         </tr>
 497       </table>
 498 </div><div class="memdoc">
 499
 500 <p>CPSR: J Mask. </p>
 501
 502 </div>
 503 </div>
 504 <a id="ga6b49ddfb770143a51aa682b56be2e990" name="ga6b49ddfb770143a51aa682b56be2e990"></a>
 505 <h2 class="memtitle"><span class="permalink"><a href="#ga6b49ddfb770143a51aa682b56be2e990">&#9670;&#160;</a></span>CPSR_J_Pos</h2>
 506
 507 <div class="memitem">
 508 <div class="memproto">
 509       <table class="memname">
 510         <tr>
 511           <td class="memname">#define CPSR_J_Pos&#160;&#160;&#160;24U</td>
 512         </tr>
 513       </table>
 514 </div><div class="memdoc">
 515
 516 <p>CPSR: J Position. </p>
 517
 518 </div>
 519 </div>
 520 <a id="gadce47959b814f70f802a139250daa04c" name="gadce47959b814f70f802a139250daa04c"></a>
 521 <h2 class="memtitle"><span class="permalink"><a href="#gadce47959b814f70f802a139250daa04c">&#9670;&#160;</a></span>CPSR_M_Msk</h2>
 522
 523 <div class="memitem">
 524 <div class="memproto">
 525       <table class="memname">
 526         <tr>
 527           <td class="memname">#define CPSR_M_Msk&#160;&#160;&#160;(0x1FUL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga4e9e49c9a75cf3e7d696fc77de7d44d1">CPSR_M_Pos</a>)</td>
 528         </tr>
 529       </table>
 530 </div><div class="memdoc">
 531
 532 <p>CPSR: M Mask. </p>
 533
 534 </div>
 535 </div>
 536 <a id="ga4e9e49c9a75cf3e7d696fc77de7d44d1" name="ga4e9e49c9a75cf3e7d696fc77de7d44d1"></a>
 537 <h2 class="memtitle"><span class="permalink"><a href="#ga4e9e49c9a75cf3e7d696fc77de7d44d1">&#9670;&#160;</a></span>CPSR_M_Pos</h2>
 538
 539 <div class="memitem">
 540 <div class="memproto">
 541       <table class="memname">
 542         <tr>
 543           <td class="memname">#define CPSR_M_Pos&#160;&#160;&#160;0U</td>
 544         </tr>
 545       </table>
 546 </div><div class="memdoc">
 547
 548 <p>CPSR: M Position. </p>
 549
 550 </div>
 551 </div>
 552 <a id="ga6c4a636a3b5ec71e0f2eb021ac353544" name="ga6c4a636a3b5ec71e0f2eb021ac353544"></a>
 553 <h2 class="memtitle"><span class="permalink"><a href="#ga6c4a636a3b5ec71e0f2eb021ac353544">&#9670;&#160;</a></span>CPSR_N_Msk</h2>
 554
 555 <div class="memitem">
 556 <div class="memproto">
 557       <table class="memname">
 558         <tr>
 559           <td class="memname">#define CPSR_N_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gaaedc00ebe496885524daac4190742f84">CPSR_N_Pos</a>)</td>
 560         </tr>
 561       </table>
 562 </div><div class="memdoc">
 563
 564 <p>CPSR: N Mask. </p>
 565
 566 </div>
 567 </div>
 568 <a id="gaaedc00ebe496885524daac4190742f84" name="gaaedc00ebe496885524daac4190742f84"></a>
 569 <h2 class="memtitle"><span class="permalink"><a href="#gaaedc00ebe496885524daac4190742f84">&#9670;&#160;</a></span>CPSR_N_Pos</h2>
 570
 571 <div class="memitem">
 572 <div class="memproto">
 573       <table class="memname">
 574         <tr>
 575           <td class="memname">#define CPSR_N_Pos&#160;&#160;&#160;31U</td>
 576         </tr>
 577       </table>
 578 </div><div class="memdoc">
 579
 580 <p>CPSR: N Position. </p>
 581
 582 </div>
 583 </div>
 584 <a id="gaba36b1ac0438594afdc6eef220d2e146" name="gaba36b1ac0438594afdc6eef220d2e146"></a>
 585 <h2 class="memtitle"><span class="permalink"><a href="#gaba36b1ac0438594afdc6eef220d2e146">&#9670;&#160;</a></span>CPSR_Q_Msk</h2>
 586
 587 <div class="memitem">
 588 <div class="memproto">
 589       <table class="memname">
 590         <tr>
 591           <td class="memname">#define CPSR_Q_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga84c8427c30fdce15f7191bd4f93d7ab7">CPSR_Q_Pos</a>)</td>
 592         </tr>
 593       </table>
 594 </div><div class="memdoc">
 595
 596 <p>CPSR: Q Mask. </p>
 597
 598 </div>
 599 </div>
 600 <a id="ga84c8427c30fdce15f7191bd4f93d7ab7" name="ga84c8427c30fdce15f7191bd4f93d7ab7"></a>
 601 <h2 class="memtitle"><span class="permalink"><a href="#ga84c8427c30fdce15f7191bd4f93d7ab7">&#9670;&#160;</a></span>CPSR_Q_Pos</h2>
 602
 603 <div class="memitem">
 604 <div class="memproto">
 605       <table class="memname">
 606         <tr>
 607           <td class="memname">#define CPSR_Q_Pos&#160;&#160;&#160;27U</td>
 608         </tr>
 609       </table>
 610 </div><div class="memdoc">
 611
 612 <p>CPSR: Q Position. </p>
 613
 614 </div>
 615 </div>
 616 <a id="ga23ed422711cbd2f9a5dcbe6c05b2a720" name="ga23ed422711cbd2f9a5dcbe6c05b2a720"></a>
 617 <h2 class="memtitle"><span class="permalink"><a href="#ga23ed422711cbd2f9a5dcbe6c05b2a720">&#9670;&#160;</a></span>CPSR_T_Msk</h2>
 618
 619 <div class="memitem">
 620 <div class="memproto">
 621       <table class="memname">
 622         <tr>
 623           <td class="memname">#define CPSR_T_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gaa1134ff3e774b1354a43227b798a707c">CPSR_T_Pos</a>)</td>
 624         </tr>
 625       </table>
 626 </div><div class="memdoc">
 627
 628 <p>CPSR: T Mask. </p>
 629
 630 </div>
 631 </div>
 632 <a id="gaa1134ff3e774b1354a43227b798a707c" name="gaa1134ff3e774b1354a43227b798a707c"></a>
 633 <h2 class="memtitle"><span class="permalink"><a href="#gaa1134ff3e774b1354a43227b798a707c">&#9670;&#160;</a></span>CPSR_T_Pos</h2>
 634
 635 <div class="memitem">
 636 <div class="memproto">
 637       <table class="memname">
 638         <tr>
 639           <td class="memname">#define CPSR_T_Pos&#160;&#160;&#160;5U</td>
 640         </tr>
 641       </table>
 642 </div><div class="memdoc">
 643
 644 <p>CPSR: T Position. </p>
 645
 646 </div>
 647 </div>
 648 <a id="ga9b9fe5c1da5e922cbff18215b70b4252" name="ga9b9fe5c1da5e922cbff18215b70b4252"></a>
 649 <h2 class="memtitle"><span class="permalink"><a href="#ga9b9fe5c1da5e922cbff18215b70b4252">&#9670;&#160;</a></span>CPSR_V_Msk</h2>
 650
 651 <div class="memitem">
 652 <div class="memproto">
 653       <table class="memname">
 654         <tr>
 655           <td class="memname">#define CPSR_V_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga5685fa5745113b4ff61181ee439bc2a5">CPSR_V_Pos</a>)</td>
 656         </tr>
 657       </table>
 658 </div><div class="memdoc">
 659
 660 <p>CPSR: V Mask. </p>
 661
 662 </div>
 663 </div>
 664 <a id="ga5685fa5745113b4ff61181ee439bc2a5" name="ga5685fa5745113b4ff61181ee439bc2a5"></a>
 665 <h2 class="memtitle"><span class="permalink"><a href="#ga5685fa5745113b4ff61181ee439bc2a5">&#9670;&#160;</a></span>CPSR_V_Pos</h2>
 666
 667 <div class="memitem">
 668 <div class="memproto">
 669       <table class="memname">
 670         <tr>
 671           <td class="memname">#define CPSR_V_Pos&#160;&#160;&#160;28U</td>
 672         </tr>
 673       </table>
 674 </div><div class="memdoc">
 675
 676 <p>CPSR: V Position. </p>
 677
 678 </div>
 679 </div>
 680 <a id="gab091112988009fb8360b01c79d993f67" name="gab091112988009fb8360b01c79d993f67"></a>
 681 <h2 class="memtitle"><span class="permalink"><a href="#gab091112988009fb8360b01c79d993f67">&#9670;&#160;</a></span>CPSR_Z_Msk</h2>
 682
 683 <div class="memitem">
 684 <div class="memproto">
 685       <table class="memname">
 686         <tr>
 687           <td class="memname">#define CPSR_Z_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga18e9f21fcda9d385d23a4de0ef860cd4">CPSR_Z_Pos</a>)</td>
 688         </tr>
 689       </table>
 690 </div><div class="memdoc">
 691
 692 <p>CPSR: Z Mask. </p>
 693
 694 </div>
 695 </div>
 696 <a id="ga18e9f21fcda9d385d23a4de0ef860cd4" name="ga18e9f21fcda9d385d23a4de0ef860cd4"></a>
 697 <h2 class="memtitle"><span class="permalink"><a href="#ga18e9f21fcda9d385d23a4de0ef860cd4">&#9670;&#160;</a></span>CPSR_Z_Pos</h2>
 698
 699 <div class="memitem">
 700 <div class="memproto">
 701       <table class="memname">
 702         <tr>
 703           <td class="memname">#define CPSR_Z_Pos&#160;&#160;&#160;30U</td>
 704         </tr>
 705       </table>
 706 </div><div class="memdoc">
 707
 708 <p>CPSR: Z Position. </p>
 709
 710 </div>
 711 </div>
 712 </div><!-- contents -->
 713 </div><!-- doc-content -->
 714 <!-- start footer part -->
 715 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
 716   <ul>
 717     <li class="footer">
 718       <script type="text/javascript">
 719         <!--
 720         writeFooter.call(this);
 721         //-->
 722       </script>
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 727 </html>