begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.7.7" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="https://raw.githubusercontent.com/Open-CMSIS-Pack/Open-CMSIS-Pack-Spec/v1.7.7/schema/PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Common Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>https://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.9.1">
  12       Active development ...
  13       CMSIS-Core(M): 5.7.0
  14        - Added new compiler macros.
  15       CMSIS-DSP: Moved into separate pack!
  16       CMSIS-NN: Moved into separate pack!
  17       CMSIS-RTOS2: 2.2.0 (see revision history for details)
  18         - RTX 5.7.0 (see revision history for details)
  19       CMSIS-DAP: 2.1.2 (see revision history for details)
  20        - Fix DAP_Transfer handling when transfer fails
  21     </release>
  22     <release version="5.9.0" date="2022-05-02">
  23       CMSIS-Core(M): 5.6.0
  24        - Arm Cortex-M85 cpu support
  25        - Arm China STAR-MC1 cpu support
  26        - Updated system_ARMCM55.c
  27       CMSIS-DSP: 1.10.0 (see revision history for details)
  28       CMSIS-NN: 3.1.0 (see revision history for details)
  29        - Support for int16 convolution and fully connected for reference implementation
  30        - Support for DSP extension optimization for int16 convolution and fully connected
  31        - Support dilation for int8 convolution
  32        - Support dilation for int8 depthwise convolution
  33        - Support for int16 depthwise conv for reference implementation including dilation
  34        - Support for int16 average and max pooling for reference implementation
  35        - Support for elementwise add and mul int16 scalar version
  36        - Support for softmax int16 scalar version
  37        - Support for SVDF with 8 bit state tensor
  38       CMSIS-RTOS2: 2.1.3 (unchanged)
  39         - RTX 5.5.4 (see revision history for details)
  40       CMSIS-Pack: deprecated (moved to Open-CMSIS-Pack)
  41       CMSIS-SVD: 1.3.9 (see revision history for details)
  42       CMSIS-DAP: 2.1.1 (see revision history for details)
  43        - Allow default clock frequency to use fast clock mode
  44       Devices
  45        - Support for Cortex-M85
  46       Utilities
  47         - SVDConv 3.3.42
  48         - PackChk 1.3.95
  49     </release>
  50     <release version="5.8.0" date="2021-06-24">
  51       CMSIS-Core(M): 5.5.0 (see revision history for details)
  52         - Updated GCC LinkerDescription, GCC Assembler startup
  53         - Added Armv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  54         - Changed C-Startup to default Startup.
  55         - Updated Armv8-M Assembler startup to use GAS syntax
  56           Note: Updating existing projects may need manual user interaction!
  57       CMSIS-Core(A): 1.2.1 (see revision history for details)
  58         - Bugfixes for Cortex-A32
  59       CMSIS-DAP: 2.1.0 (see revision history for details)
  60         - Enhanced DAP_Info
  61         - Added extra UART support
  62       CMSIS-DSP: 1.9.0 (see revision history for details)
  63         - Purged pre-built libs from Git
  64         - Enhanced support for f16 datatype
  65         - Fixed couple of GCC issues
  66       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  67         - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  68         - Added optimization for SVDF kernel
  69         - Improved MVE performance for fully Connected and max pool operator
  70         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  71         - Expanded existing unit test suite along with support for FVP
  72         - Removed Examples folder
  73       CMSIS-RTOS2:
  74         - RTX 5.5.3 (see revision history for details)
  75           - CVE-2021-27431 vulnerability mitigation.
  76           - Enhanced stack overrun checking.
  77           - Various bug fixes and improvements.
  78       CMSIS-Pack: 1.7.2 (see revision history for details)
  79         - Support for Microchip XC32 compiler
  80         - Support for Custom Datapath Extension
  81     </release>
  82     <release version="5.7.0" date="2020-04-09">
  83       CMSIS-Build: 0.9.0 (beta)
  84         - Draft for CMSIS Project description (CPRJ)
  85       CMSIS-Core(M): 5.4.0 (see revision history for details)
  86         - Cortex-M55 cpu support
  87         - Enhanced MVE support for Armv8.1-MML
  88         - Fixed device config define checks.
  89         - L1 Cache functions for Armv7-M and later
  90       CMSIS-Core(A): 1.2.0 (see revision history for details)
  91         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  92         - Added missing DSP intrinsics
  93         - Reworked assembly intrinsics: volatile, barriers and clobber
  94       CMSIS-DSP: 1.8.0 (see revision history for details)
  95         - Added new functions and function groups
  96         - Added MVE support
  97       CMSIS-NN: 1.3.0 (see revision history for details)
  98         - Added MVE support
  99         - Further optimizations for kernels using DSP extension
 100       CMSIS-RTOS2:
 101         - RTX 5.5.2 (see revision history for details)
 102       CMSIS-Driver: 2.8.0
 103         - Added VIO API 0.1.0 (Preview)
 104         - removed volatile from status related typedefs in APIs
 105         - enhanced WiFi Interface API with support for polling Socket Receive/Send
 106       CMSIS-Pack: 1.6.3 (see revision history for details)
 107         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
 108       Devices:
 109         - ARMCM55 device
 110         - ARMv81MML startup code recognizing __MVE_USED macro
 111         - Refactored vector table references for all Cortex-M devices
 112         - Reworked ARMCM* C-StartUp files.
 113         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
 114       Utilities:
 115         Attention: Linux binaries moved to Linux64 folder!
 116         - SVDConv 3.3.35
 117         - PackChk 1.3.89
 118     </release>
 119     <release version="5.6.0" date="2019-07-10">
 120       CMSIS-Core(M): 5.3.0 (see revision history for details)
 121         - Added provisions for compiler-independent C startup code.
 122       CMSIS-Core(A): 1.1.4 (see revision history for details)
 123         - Fixed __FPU_Enable.
 124       CMSIS-DSP: 1.7.0 (see revision history for details)
 125         - New Neon versions of f32 functions
 126         - Python wrapper
 127         - Preliminary cmake build
 128         - Compilation flags for FFTs
 129         - Changes to arm_math.h
 130       CMSIS-NN: 1.2.0 (see revision history for details)
 131         - New function for depthwise convolution with asymmetric quantization.
 132         - New support functions for requantization.
 133       CMSIS-RTOS:
 134         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
 135       CMSIS-RTOS2:
 136         - RTX 5.5.1 (see revision history for details)
 137       CMSIS-Driver: 2.7.1
 138         - WiFi Interface API 1.0.0
 139       Devices:
 140         - Generalized C startup code for all Cortex-M family devices.
 141         - Updated Cortex-A default memory regions and MMU configurations
 142         - Moved Cortex-A memory and system config files to avoid include path issues
 143     </release>
 144     <release version="5.5.1" date="2019-03-20">
 145       The following folders are deprecated
 146         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 147
 148       CMSIS-Core(M): 5.2.1 (see revision history for details)
 149         - Fixed compilation issue in cmsis_armclang_ltm.h
 150     </release>
 151     <release version="5.5.0" date="2019-03-18">
 152       The following folders have been removed:
 153         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 154         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 155       The following folders are deprecated
 156         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 157
 158       CMSIS-Core(M): 5.2.0 (see revision history for details)
 159         - Reworked Stack/Heap configuration for ARM startup files.
 160         - Added Cortex-M35P device support.
 161         - Added generic Armv8.1-M Mainline device support.
 162       CMSIS-Core(A): 1.1.3 (see revision history for details)
 163       CMSIS-DSP: 1.6.0 (see revision history for details)
 164         - reworked DSP library source files
 165         - reworked DSP library documentation
 166         - Changed DSP folder structure
 167         - moved DSP libraries to folder ./DSP/Lib
 168         - ARM DSP Libraries are built with ARMCLANG
 169         - Added DSP Libraries Source variant
 170       CMSIS-RTOS2:
 171         - RTX 5.5.0 (see revision history for details)
 172       CMSIS-Driver: 2.7.0
 173         - Added WiFi Interface API 1.0.0-beta
 174         - Added components for project specific driver implementations
 175       CMSIS-Pack: 1.6.0 (see revision history for details)
 176       Devices:
 177         - Added Cortex-M35P and ARMv81MML device templates.
 178         - Fixed C-Startup Code for GCC (aligned with other compilers)
 179       Utilities:
 180         - SVDConv 3.3.25
 181         - PackChk 1.3.82
 182     </release>
 183     <release version="5.4.0" date="2018-08-01">
 184       Aligned pack structure with repository.
 185       The following folders are deprecated:
 186         - CMSIS/Include/
 187         - CMSIS/DSP_Lib/
 188
 189       CMSIS-Core(M): 5.1.2 (see revision history for details)
 190         - Added Cortex-M1 support (beta).
 191       CMSIS-Core(A): 1.1.2 (see revision history for details)
 192       CMSIS-NN: 1.1.0
 193         - Added new math functions.
 194       CMSIS-RTOS2:
 195         - API 2.1.3 (see revision history for details)
 196         - RTX 5.4.0 (see revision history for details)
 197           * Updated exception handling on Cortex-A
 198       CMSIS-Driver:
 199         - Flash Driver API V2.2.0
 200       Utilities:
 201         - SVDConv 3.3.21
 202         - PackChk 1.3.71
 203     </release>
 204     <release version="5.3.0" date="2018-02-22">
 205       Updated Arm company brand.
 206       CMSIS-Core(M): 5.1.1 (see revision history for details)
 207       CMSIS-Core(A): 1.1.1 (see revision history for details)
 208       CMSIS-DAP: 2.0.0 (see revision history for details)
 209       CMSIS-NN: 1.0.0
 210         - Initial contribution of the bare metal Neural Network Library.
 211       CMSIS-RTOS2:
 212         - RTX 5.3.0 (see revision history for details)
 213         - OS Tick API 1.0.1
 214     </release>
 215     <release version="5.2.0" date="2017-11-16">
 216       CMSIS-Core(M): 5.1.0 (see revision history for details)
 217         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 218         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 219       CMSIS-Core(A): 1.1.0 (see revision history for details)
 220         - Added compiler_iccarm.h.
 221         - Added additional access functions for physical timer.
 222       CMSIS-DAP: 1.2.0 (see revision history for details)
 223       CMSIS-DSP: 1.5.2 (see revision history for details)
 224       CMSIS-Driver: 2.6.0 (see revision history for details)
 225         - CAN Driver API V1.2.0
 226         - NAND Driver API V2.3.0
 227       CMSIS-RTOS:
 228         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 229       CMSIS-RTOS2:
 230         - API 2.1.2 (see revision history for details)
 231         - RTX 5.2.3 (see revision history for details)
 232       Devices:
 233         - Added GCC startup and linker script for Cortex-A9.
 234         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 235         - Added IAR startup code for Cortex-A9
 236     </release>
 237     <release version="5.1.1" date="2017-09-19">
 238       CMSIS-RTOS2:
 239       - RTX 5.2.1 (see revision history for details)
 240     </release>
 241     <release version="5.1.0" date="2017-08-04">
 242       CMSIS-Core(M): 5.0.2 (see revision history for details)
 243       - Changed Version Control macros to be core agnostic.
 244       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 245       CMSIS-Core(A): 1.0.0 (see revision history for details)
 246       - Initial release
 247       - IRQ Controller API 1.0.0
 248       CMSIS-Driver: 2.05 (see revision history for details)
 249       - All typedefs related to status have been made volatile.
 250       CMSIS-RTOS2:
 251       - API 2.1.1 (see revision history for details)
 252       - RTX 5.2.0 (see revision history for details)
 253       - OS Tick API 1.0.0
 254       CMSIS-DSP: 1.5.2 (see revision history for details)
 255       - Fixed GNU Compiler specific diagnostics.
 256       CMSIS-Pack: 1.5.0 (see revision history for details)
 257       - added System Description File (*.SDF) Format
 258       CMSIS-Zone: 0.0.1 (Preview)
 259       - Initial specification draft
 260     </release>
 261     <release version="5.0.1" date="2017-02-03">
 262       Package Description:
 263       - added taxonomy for Cclass RTOS
 264       CMSIS-RTOS2:
 265       - API 2.1   (see revision history for details)
 266       - RTX 5.1.0 (see revision history for details)
 267       CMSIS-Core: 5.0.1 (see revision history for details)
 268       - Added __PACKED_STRUCT macro
 269       - Added uVisior support
 270       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 271       - Updated template for secure main function (main_s.c)
 272       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 273       CMSIS-DSP: 1.5.1 (see revision history for details)
 274       - added ARMv8M DSP libraries.
 275       CMSIS-Pack:1.4.9 (see revision history for details)
 276       - added Pack Index File specification and schema file
 277     </release>
 278     <release version="5.0.0" date="2016-11-11">
 279       Changed open source license to Apache 2.0
 280       CMSIS_Core:
 281        - Added support for Cortex-M23 and Cortex-M33.
 282        - Added ARMv8-M device configurations for mainline and baseline.
 283        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 284        - Added cmsis_compiler.h to unify compiler behaviour.
 285        - Updated function SCB_EnableICache (for Cortex-M7).
 286        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 287       CMSIS-RTOS:
 288         - bug fix in RTX 4.82 (see revision history for details)
 289       CMSIS-RTOS2:
 290         - new API including compatibility layer to CMSIS-RTOS
 291         - reference implementation based on RTX5
 292         - supports all Cortex-M variants including TrustZone for ARMv8-M
 293       CMSIS-SVD:
 294        - reworked SVD format documentation
 295        - removed SVD file database documentation as SVD files are distributed in packs
 296        - updated SVDConv for Win32 and Linux
 297       CMSIS-DSP:
 298        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 299        - Added DSP libraries build projects to CMSIS pack.
 300     </release>
 301     <release version="4.5.0" date="2015-10-28">
 302       - CMSIS-Core     4.30.0  (see revision history for details)
 303       - CMSIS-DAP      1.1.0   (unchanged)
 304       - CMSIS-Driver   2.04.0  (see revision history for details)
 305       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 306       - CMSIS-Pack     1.4.1   (see revision history for details)
 307       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 308       - CMSIS-SVD      1.3.1   (see revision history for details)
 309     </release>
 310     <release version="4.4.0" date="2015-09-11">
 311       - CMSIS-Core     4.20   (see revision history for details)
 312       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 313       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 314       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 315       - CMSIS-RTOS
 316         -- API         1.02   (unchanged)
 317         -- RTX         4.79   (see revision history for details)
 318       - CMSIS-SVD      1.3.0  (see revision history for details)
 319       - CMSIS-DAP      1.1.0  (extended with SWO support)
 320     </release>
 321     <release version="4.3.0" date="2015-03-20">
 322       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 323       - CMSIS-DSP      1.4.5  (see revision history for details)
 324       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 325       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 326       - CMSIS-RTOS
 327         -- API         1.02   (unchanged)
 328         -- RTX         4.78   (see revision history for details)
 329       - CMSIS-SVD      1.2    (unchanged)
 330     </release>
 331     <release version="4.2.0" date="2014-09-24">
 332       Adding Cortex-M7 support
 333       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 334       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 335       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 336       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 337       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 338     </release>
 339     <release version="4.1.1" date="2014-06-30">
 340       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 341     </release>
 342     <release version="4.1.0" date="2014-06-12">
 343       - CMSIS-Driver   2.02  (incompatible update)
 344       - CMSIS-Pack     1.3   (see revision history for details)
 345       - CMSIS-DSP      1.4.2 (unchanged)
 346       - CMSIS-Core     3.30  (unchanged)
 347       - CMSIS-RTOS RTX 4.74  (unchanged)
 348       - CMSIS-RTOS API 1.02  (unchanged)
 349       - CMSIS-SVD      1.10  (unchanged)
 350       PACK:
 351       - removed G++ specific files from PACK
 352       - added Component Startup variant "C Startup"
 353       - added Pack Checking Utility
 354       - updated conditions to reflect tool-chain dependency
 355       - added Taxonomy for Graphics
 356       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 357     </release>
 358     <!-- release version="4.0.0">
 359       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 360       - CMSIS-Pack     1.1   Preliminary
 361       - CMSIS-DSP      1.4.2 (see revision history for details)
 362       - CMSIS-Core     3.30  (see revision history for details)
 363       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 364       - CMSIS-RTOS API 1.02  (unchanged)
 365       - CMSIS-SVD      1.10  (unchanged)
 366     </release -->
 367     <release version="3.20.4" date="2014-02-20">
 368       - CMSIS-RTOS 4.74 (see revision history for details)
 369       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 370     </release>
 371     <!-- release version="3.20.3">
 372       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 373       - CMSIS-RTOS 4.73 (see revision history for details)
 374     </release -->
 375     <!-- release version="3.20.2">
 376       - CMSIS-Pack documentation has been added
 377       - CMSIS-Drivers header and documentation have been added to PACK
 378       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 379     </release -->
 380     <!-- release version="3.20.1">
 381       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 382       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 383     </release -->
 384     <!-- release version="3.20.0">
 385       The software portions that are deployed in the application program are now under a BSD license which allows usage
 386       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 387       The individual components have been update as listed below:
 388       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 389       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 390       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 391       - CMSIS-SVD is unchanged.
 392     </release -->
 393   </releases>
 394
 395   <taxonomy>
 396     <description Cclass="Audio">Software components for audio processing</description>
 397     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 398     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 399     <description Cclass="Compiler">Compiler Software Extensions</description>
 400     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 401     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 402     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 403     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 404     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 405     <description Cclass="File System">File Drive Support and File System</description>
 406     <description Cclass="IoT Client">IoT cloud client connector</description>
 407     <description Cclass="IoT Service">IoT specific services</description>
 408     <description Cclass="IoT Utility">IoT specific software utility</description>
 409     <description Cclass="Graphics">Graphical User Interface</description>
 410     <description Cclass="Network">Network Stack using Internet Protocols</description>
 411     <description Cclass="RTOS">Real-time Operating System</description>
 412     <description Cclass="Security">Encryption for secure communication or storage</description>
 413     <description Cclass="USB">Universal Serial Bus Stack</description>
 414     <description Cclass="Utility">Generic software utility components</description>
 415   </taxonomy>
 416
 417   <devices>
 418     <!-- ******************************  Cortex-M0  ****************************** -->
 419     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 420       <book name="https://developer.arm.com/documentation/dui0497" title="Cortex-M0 Processor Devices Generic Users Guide"/>
 421       <description>
 422 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 423 - simple, easy-to-use programmers model
 424 - highly efficient ultra-low power operation
 425 - excellent code density
 426 - deterministic, high-performance interrupt handling
 427 - upward compatibility with the rest of the Cortex-M processor family.
 428       </description>
 429       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 430       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 431       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 432       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 433
 434       <device Dname="ARMCM0">
 435         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 436         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 437       </device>
 438     </family>
 439
 440     <!-- ******************************  Cortex-M0P  ****************************** -->
 441     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 442       <book name="https://developer.arm.com/documentation/dui0662" title="Cortex-M0+ Processor Devices Generic Users Guide"/>
 443       <description>
 444 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 445 - simple, easy-to-use programmers model
 446 - highly efficient ultra-low power operation
 447 - excellent code density
 448 - deterministic, high-performance interrupt handling
 449 - upward compatibility with the rest of the Cortex-M processor family.
 450       </description>
 451       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 452       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 453       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 454       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 455
 456       <device Dname="ARMCM0P">
 457         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 458         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 459       </device>
 460
 461       <device Dname="ARMCM0P_MPU">
 462         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 463         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 464       </device>
 465     </family>
 466
 467     <!-- ******************************  Cortex-M1  ****************************** -->
 468     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 469       <!--book name="https://developer.arm.com/documentation/dui0497" title="Cortex-M0 Processor Devices Generic Users Guide"/-->
 470       <description>
 471 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 472 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 473       </description>
 474       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 475       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 476       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 477       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 478
 479       <device Dname="ARMCM1">
 480         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 481         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 482       </device>
 483     </family>
 484
 485     <!-- ******************************  Cortex-M3  ****************************** -->
 486     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 487       <book name="https://developer.arm.com/documentation/dui0552" title="Cortex-M3 Processor Devices Generic Users Guide"/>
 488       <description>
 489 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 490 - simple, easy-to-use programmers model
 491 - highly efficient ultra-low power operation
 492 - excellent code density
 493 - deterministic, high-performance interrupt handling
 494 - upward compatibility with the rest of the Cortex-M processor family.
 495       </description>
 496       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 497       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 498       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 499       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 500
 501       <device Dname="ARMCM3">
 502         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 503         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 504       </device>
 505     </family>
 506
 507     <!-- ******************************  Cortex-M4  ****************************** -->
 508     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 509       <book name="https://developer.arm.com/documentation/dui0553" title="Cortex-M4 Processor Devices Generic Users Guide"/>
 510       <description>
 511 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 512 - simple, easy-to-use programmers model
 513 - highly efficient ultra-low power operation
 514 - excellent code density
 515 - deterministic, high-performance interrupt handling
 516 - upward compatibility with the rest of the Cortex-M processor family.
 517       </description>
 518       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 519       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 520       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 521       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 522
 523       <device Dname="ARMCM4">
 524         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 525         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 526       </device>
 527
 528       <device Dname="ARMCM4_FP">
 529         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 530         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 531       </device>
 532     </family>
 533
 534     <!-- ******************************  Cortex-M7  ****************************** -->
 535     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 536       <book name="https://developer.arm.com/documentation/dui0646" title="Cortex-M7 Processor Devices Generic Users Guide"/>
 537       <description>
 538 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 539 - simple, easy-to-use programmers model
 540 - highly efficient ultra-low power operation
 541 - excellent code density
 542 - deterministic, high-performance interrupt handling
 543 - upward compatibility with the rest of the Cortex-M processor family.
 544       </description>
 545       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 546       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 547       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 548       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 549
 550       <device Dname="ARMCM7">
 551         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 552         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 553       </device>
 554
 555       <device Dname="ARMCM7_SP">
 556         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 557         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 558       </device>
 559
 560       <device Dname="ARMCM7_DP">
 561         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 562         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 563       </device>
 564     </family>
 565
 566     <!-- ******************************  Cortex-M23  ********************** -->
 567     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 568       <book name="https://developer.arm.com/documentation/dui1095"       title="Cortex-M23 Processor Devices Generic Users Guide"/>
 569       <description>
 570 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 571 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 572 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 573       </description>
 574       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 575       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 576       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 577       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 578       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 579       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 580
 581       <device Dname="ARMCM23">
 582         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 583         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 584       </device>
 585
 586       <device Dname="ARMCM23_TZ">
 587         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 588         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 589       </device>
 590     </family>
 591
 592     <!-- ******************************  Cortex-M33  ****************************** -->
 593     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 594       <book name="https://developer.arm.com/documentation/100235"       title="Cortex-M33 Processor Devices Generic Users Guide"/>
 595       <description>
 596 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 597 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 598       </description>
 599       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 600       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 601       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 602       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 603       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 604       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 605
 606       <device Dname="ARMCM33">
 607         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 608         <description>
 609           no DSP Instructions, no Floating Point Unit, no TrustZone
 610         </description>
 611         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 612       </device>
 613
 614       <device Dname="ARMCM33_TZ">
 615         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 616         <description>
 617           no DSP Instructions, no Floating Point Unit, TrustZone
 618         </description>
 619         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 620       </device>
 621
 622       <device Dname="ARMCM33_DSP_FP">
 623         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 624         <description>
 625           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 626         </description>
 627         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 628       </device>
 629
 630       <device Dname="ARMCM33_DSP_FP_TZ">
 631         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 632         <description>
 633           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 634         </description>
 635         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 636       </device>
 637     </family>
 638
 639     <!-- ******************************  Cortex-M35P  ****************************** -->
 640     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 641       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 642       <description>
 643 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 644 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 645       </description>
 646
 647       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 648       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 649       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 650       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 651       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 652       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 653
 654       <device Dname="ARMCM35P">
 655         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 656         <description>
 657           no DSP Instructions, no Floating Point Unit, no TrustZone
 658         </description>
 659         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 660       </device>
 661
 662       <device Dname="ARMCM35P_TZ">
 663         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 664         <description>
 665           no DSP Instructions, no Floating Point Unit, TrustZone
 666         </description>
 667         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 668       </device>
 669
 670       <device Dname="ARMCM35P_DSP_FP">
 671         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 672         <description>
 673           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 674         </description>
 675         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 676       </device>
 677
 678       <device Dname="ARMCM35P_DSP_FP_TZ">
 679         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 680         <description>
 681           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 682         </description>
 683         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 684       </device>
 685     </family>
 686
 687     <!-- ******************************  Cortex-M55  ****************************** -->
 688     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 689       <book name="https://developer.arm.com/documentation/101273"       title="Cortex-M55 Processor Devices Generic Users Guide"/>
 690       <description>
 691 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 692 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 693 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 694       </description>
 695
 696       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 697       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 698       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 699       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 700       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 701       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 702
 703       <device Dname="ARMCM55">
 704         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 705         <description>
 706           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 707         </description>
 708         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 709       </device>
 710     </family>
 711
 712     <!-- ******************************  Cortex-M85  ****************************** -->
 713     <family Dfamily="ARM Cortex M85" Dvendor="ARM:82">
 714       <book name="https://developer.arm.com/documentation/1019283"       title="Cortex-M85 Processor Devices Generic Users Guide"/>
 715       <description>
 716 The Arm Cortex-M85 processor is a fully synthesizable high-performance microcontroller class processor that implements the Armv8.1-M Mainline architecture which includes support for the M-profile Vector Extension (MVE).
 717 The processor also supports previous Armv8-M architectural features.
 718 The design is focused on compute applications such as Digital Signal Processing (DSP) and machine learning.
 719 The Arm Cortex-M85 processor is energy efficient and achieves high compute performance across scalar and vector operations while maintaining low power consumption.
 720       </description>
 721
 722       <!-- debug svd="Device/ARM/SVD/ARMCM85.svd"/ SVD files do not contain any peripheral -->
 723       <memory name="ROM_NS" access="rxn"  start="0x00000000" size="0x00200000" startup="1" default="1" alias="ROM_S"/>
 724       <memory name="RAM_NS" access="rwxn" start="0x20000000" size="0x00020000" init   ="0" default="1" alias="RAM_S"/>
 725       <memory name="ROM_S"  access="rxn"  start="0x10000000" size="0x00200000" startup="1" default="1"/>
 726       <memory name="RAM_S"  access="rwxn" start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 727       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 728
 729       <device Dname="ARMCM85">
 730         <processor Dcore="Cortex-M85" DcoreVersion="r0p0" Dpacbti="PACBTI" Dmpu="MPU" Dfpu="DP_FPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 731         <description>
 732           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone, PACBTI
 733         </description>
 734         <compile header="Device/ARM/ARMCM85/Include/ARMCM85.h" define="ARMCM85"/>
 735       </device>
 736     </family>
 737
 738     <!-- ******************************  ARMSC000  ****************************** -->
 739     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 740       <description>
 741 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 742 - simple, easy-to-use programmers model
 743 - highly efficient ultra-low power operation
 744 - excellent code density
 745 - deterministic, high-performance interrupt handling
 746       </description>
 747       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 748       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 749       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 750       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 751
 752       <device Dname="ARMSC000">
 753         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 754         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 755       </device>
 756     </family>
 757
 758     <!-- ******************************  ARMSC300  ****************************** -->
 759     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 760       <description>
 761 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 762 - simple, easy-to-use programmers model
 763 - highly efficient ultra-low power operation
 764 - excellent code density
 765 - deterministic, high-performance interrupt handling
 766       </description>
 767       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 768       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 769       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 770       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 771
 772       <device Dname="ARMSC300">
 773         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 774         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 775       </device>
 776     </family>
 777
 778     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 779     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 780       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 781       <description>
 782 Armv8-M Baseline based device with TrustZone
 783       </description>
 784       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 785       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 786       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 787       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 788       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 789       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 790
 791       <device Dname="ARMv8MBL">
 792         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 793         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 794       </device>
 795     </family>
 796
 797     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 798     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 799       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 800       <description>
 801 Armv8-M Mainline based device with TrustZone
 802       </description>
 803       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 804       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 805       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 806       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 807       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 808       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 809
 810       <device Dname="ARMv8MML">
 811         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 812         <description>
 813           no DSP Instructions, no Floating Point Unit, TrustZone
 814         </description>
 815         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 816       </device>
 817
 818       <device Dname="ARMv8MML_DSP">
 819         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 820         <description>
 821           DSP Instructions, no Floating Point Unit, TrustZone
 822         </description>
 823         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 824       </device>
 825
 826       <device Dname="ARMv8MML_SP">
 827         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 828         <description>
 829           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 830         </description>
 831         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 832       </device>
 833
 834       <device Dname="ARMv8MML_DSP_SP">
 835         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 836         <description>
 837           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 838         </description>
 839         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 840       </device>
 841
 842       <device Dname="ARMv8MML_DP">
 843         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 844         <description>
 845           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 846         </description>
 847         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 848       </device>
 849
 850       <device Dname="ARMv8MML_DSP_DP">
 851         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 852         <description>
 853           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 854         </description>
 855         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 856       </device>
 857     </family>
 858
 859     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 860     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 861       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 862       <description>
 863 Armv8.1-M Mainline based device with TrustZone and MVE
 864       </description>
 865       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 866       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 867       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 868       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 869       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 870       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 871
 872
 873       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 874         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 875         <description>
 876           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 877         </description>
 878         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 879       </device>
 880     </family>
 881
 882     <!-- ******************************  Cortex-A5  ****************************** -->
 883     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 884       <book name="https://developer.arm.com/documentation/ddi0433" title="Cortex-A5 Technical Reference Manual"/>
 885       <description>
 886 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 887 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 888 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 889       </description>
 890
 891       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 892       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 893       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 894       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 895
 896       <device Dname="ARMCA5">
 897         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 898         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 899       </device>
 900     </family>
 901
 902     <!-- ******************************  Cortex-A7  ****************************** -->
 903     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 904       <book name="https://developer.arm.com/documentation/ddi0464" title="Cortex-A7 MPCore Technical Reference Manual"/>
 905       <description>
 906 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 907 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 908 an optional integrated GIC, and an optional L2 cache controller.
 909       </description>
 910
 911       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 912       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 913       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 914       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 915
 916       <device Dname="ARMCA7">
 917         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 918         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 919       </device>
 920     </family>
 921
 922     <!-- ******************************  Cortex-A9  ****************************** -->
 923     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 924       <book name="https://developer.arm.com/documentation/100511" title="Cortex-A9 Technical Reference Manual"/>
 925       <description>
 926 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 927 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 928 and 8-bit Java bytecodes in Jazelle state.
 929       </description>
 930
 931       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 932       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 933       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 934       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 935
 936       <device Dname="ARMCA9">
 937         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 938         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 939       </device>
 940     </family>
 941   </devices>
 942
 943
 944   <apis>
 945     <!-- CMSIS Device API -->
 946     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 947       <description>Device interrupt controller interface</description>
 948       <files>
 949         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 950       </files>
 951     </api>
 952     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 953       <description>RTOS Kernel system tick timer interface</description>
 954       <files>
 955         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 956       </files>
 957     </api>
 958     <!-- CMSIS-RTOS API -->
 959     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 960       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 961       <files>
 962         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 963       </files>
 964     </api>
 965     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.2.0" exclusive="1">
 966       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 967       <files>
 968         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 969         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 970       </files>
 971     </api>
 972     <!-- CMSIS Driver API -->
 973     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 974       <description>USART Driver API for Cortex-M</description>
 975       <files>
 976         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 977         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 978       </files>
 979     </api>
 980     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 981       <description>SPI Driver API for Cortex-M</description>
 982       <files>
 983         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 984         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 985       </files>
 986     </api>
 987     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 988       <description>SAI Driver API for Cortex-M</description>
 989       <files>
 990         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 991         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 992       </files>
 993     </api>
 994     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 995       <description>I2C Driver API for Cortex-M</description>
 996       <files>
 997         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 998         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 999       </files>
1000     </api>
1001     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
1002       <description>CAN Driver API for Cortex-M</description>
1003       <files>
1004         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
1005         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
1006       </files>
1007     </api>
1008     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
1009       <description>Flash Driver API for Cortex-M</description>
1010       <files>
1011         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
1012         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
1013       </files>
1014     </api>
1015     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
1016       <description>MCI Driver API for Cortex-M</description>
1017       <files>
1018         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
1019         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
1020       </files>
1021     </api>
1022     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
1023       <description>NAND Flash Driver API for Cortex-M</description>
1024       <files>
1025         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
1026         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
1027       </files>
1028     </api>
1029     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
1030       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
1031       <files>
1032         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
1033         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
1034         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
1035       </files>
1036     </api>
1037     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
1038       <description>Ethernet MAC Driver API for Cortex-M</description>
1039       <files>
1040         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
1041         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
1042       </files>
1043     </api>
1044     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
1045       <description>Ethernet PHY Driver API for Cortex-M</description>
1046       <files>
1047         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
1048         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
1049       </files>
1050     </api>
1051     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
1052       <description>USB Device Driver API for Cortex-M</description>
1053       <files>
1054         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
1055         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
1056       </files>
1057     </api>
1058     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
1059       <description>USB Host Driver API for Cortex-M</description>
1060       <files>
1061         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
1062         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
1063       </files>
1064     </api>
1065     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
1066       <description>WiFi driver</description>
1067       <files>
1068         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
1069         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
1070       </files>
1071     </api>
1072     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
1073       <description>Virtual I/O</description>
1074       <files>
1075         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1076         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1077         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1078       </files>
1079     </api>
1080   </apis>
1081
1082   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1083   <conditions>
1084     <!-- compiler -->
1085     <condition id="ARMCC6">
1086       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1087       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1088     </condition>
1089     <condition id="ARMCC5">
1090       <require Tcompiler="ARMCC" Toptions="AC5"/>
1091     </condition>
1092     <condition id="ARMCC">
1093       <require Tcompiler="ARMCC"/>
1094     </condition>
1095     <condition id="GCC">
1096       <require Tcompiler="GCC"/>
1097     </condition>
1098     <condition id="IAR">
1099       <require Tcompiler="IAR"/>
1100     </condition>
1101     <condition id="ARMCC GCC">
1102       <accept Tcompiler="ARMCC"/>
1103       <accept Tcompiler="GCC"/>
1104     </condition>
1105     <condition id="ARMCC GCC IAR">
1106       <accept Tcompiler="ARMCC"/>
1107       <accept Tcompiler="GCC"/>
1108       <accept Tcompiler="IAR"/>
1109     </condition>
1110
1111     <!-- Arm architecture -->
1112     <condition id="ARMv6-M Device">
1113       <description>Armv6-M architecture based device</description>
1114       <accept Dcore="Cortex-M0"/>
1115       <accept Dcore="Cortex-M1"/>
1116       <accept Dcore="Cortex-M0+"/>
1117       <accept Dcore="SC000"/>
1118     </condition>
1119     <condition id="ARMv7-M Device">
1120       <description>Armv7-M architecture based device</description>
1121       <accept Dcore="Cortex-M3"/>
1122       <accept Dcore="Cortex-M4"/>
1123       <accept Dcore="Cortex-M7"/>
1124       <accept Dcore="SC300"/>
1125     </condition>
1126     <condition id="ARMv8-MBL Device">
1127       <description>Armv8-M base line architecture based device</description>
1128       <accept Dcore="ARMV8MBL"/>
1129       <accept Dcore="Cortex-M23"/>
1130     </condition>
1131     <condition id="ARMv8-MML Device">
1132       <description>Armv8-M main line architecture based device</description>
1133       <accept Dcore="ARMV8MML"/>
1134       <accept Dcore="Cortex-M33"/>
1135       <accept Dcore="Cortex-M35P"/>
1136       <accept Dcore="Star-MC1"/>
1137     </condition>
1138     <condition id="ARMv81-MML Device">
1139       <description>Armv8.1-M main line architecture based device</description>
1140       <accept Dcore="ARMV81MML"/>
1141       <accept Dcore="Cortex-M55"/>
1142       <accept Dcore="Cortex-M85"/>
1143     </condition>
1144     <condition id="ARMv8x-MML Device">
1145       <description>Armv8-M/Armv8.1-M architecture based device</description>
1146       <accept condition="ARMv8-MML Device"/>
1147       <accept condition="ARMv81-MML Device"/>
1148     </condition>
1149     <condition id="ARMv8-M Device">
1150       <description>Armv8-M architecture based device</description>
1151       <accept condition="ARMv8-MBL Device"/>
1152       <accept condition="ARMv8-MML Device"/>
1153       <accept condition="ARMv81-MML Device"/>
1154     </condition>
1155     <condition id="ARMv6_7-M Device">
1156       <description>Armv6_7-M architecture based device</description>
1157       <accept condition="ARMv6-M Device"/>
1158       <accept condition="ARMv7-M Device"/>
1159     </condition>
1160     <condition id="ARMv6_7_8-M Device">
1161       <description>Armv6_7_8-M architecture based device</description>
1162       <accept condition="ARMv6-M Device"/>
1163       <accept condition="ARMv7-M Device"/>
1164       <accept condition="ARMv8-M Device"/>
1165     </condition>
1166     <condition id="ARMv7-A Device">
1167       <description>Armv7-A architecture based device</description>
1168       <accept Dcore="Cortex-A5"/>
1169       <accept Dcore="Cortex-A7"/>
1170       <accept Dcore="Cortex-A9"/>
1171     </condition>
1172
1173     <condition id="TrustZone">
1174       <description>TrustZone</description>
1175       <require Dtz="TZ"/>
1176     </condition>
1177     <condition id="TZ Secure">
1178       <description>TrustZone (Secure)</description>
1179       <require Dtz="TZ"/>
1180       <require Dsecure="Secure"/>
1181     </condition>
1182     <condition id="TZ Non-secure">
1183       <description>TrustZone (Non-secure)</description>
1184       <require Dtz="TZ"/>
1185       <require Dsecure="Non-secure"/>
1186     </condition>
1187
1188     <!-- Startup -->
1189     <condition id="Startup ARMCC6 Secure">
1190       <description>Startup files for Arm Compiler 6 targeting TrustZone secure mode</description>
1191       <require condition="ARMCC6"/>
1192       <require condition="TZ Secure"/>
1193     </condition>
1194     <condition id="Startup ARMCC6 Unsecure">
1195       <description>Startup files for Arm Compiler 6 targeting non-TrustZone or TrustZone non-secure mode</description>
1196       <require condition="ARMCC6"/>
1197       <deny condition="TZ Secure"/>
1198     </condition>
1199
1200     <!-- CMSIS-Core -->
1201     <condition id="ARMCM0 CMSIS">
1202       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1203       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1204       <require Cclass="CMSIS" Cgroup="CORE"/>
1205     </condition>
1206
1207     <condition id="ARMCM0+ CMSIS">
1208       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1209       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1210       <require Cclass="CMSIS" Cgroup="CORE"/>
1211     </condition>
1212
1213     <condition id="ARMCM1 CMSIS">
1214       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
1215       <require Dvendor="ARM:82" Dname="ARMCM1"/>
1216       <require Cclass="CMSIS" Cgroup="CORE"/>
1217     </condition>
1218
1219     <condition id="ARMCM3 CMSIS">
1220       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1221       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1222       <require Cclass="CMSIS" Cgroup="CORE"/>
1223     </condition>
1224
1225     <condition id="ARMCM4 CMSIS">
1226       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1227       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1228       <require Cclass="CMSIS" Cgroup="CORE"/>
1229     </condition>
1230
1231     <condition id="ARMCM7 CMSIS">
1232       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1233       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1234       <require Cclass="CMSIS" Cgroup="CORE"/>
1235     </condition>
1236
1237     <condition id="ARMCM23 CMSIS">
1238       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1239       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1240       <require Cclass="CMSIS" Cgroup="CORE"/>
1241     </condition>
1242
1243     <condition id="ARMCM33 CMSIS">
1244       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1245       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1246       <require Cclass="CMSIS" Cgroup="CORE"/>
1247     </condition>
1248
1249     <condition id="ARMCM35P CMSIS">
1250       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
1251       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
1252       <require Cclass="CMSIS" Cgroup="CORE"/>
1253     </condition>
1254
1255     <condition id="ARMCM55 CMSIS">
1256       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
1257       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
1258       <require Cclass="CMSIS" Cgroup="CORE"/>
1259     </condition>
1260
1261     <condition id="ARMCM85 CMSIS">
1262       <description>Generic Arm Cortex-M85 device startup and depends on CMSIS Core</description>
1263       <require Dvendor="ARM:82" Dname="ARMCM85*"/>
1264       <require Cclass="CMSIS" Cgroup="CORE"/>
1265     </condition>
1266
1267     <condition id="ARMSC000 CMSIS">
1268       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1269       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1270       <require Cclass="CMSIS" Cgroup="CORE"/>
1271     </condition>
1272
1273     <condition id="ARMSC300 CMSIS">
1274       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1275       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1276       <require Cclass="CMSIS" Cgroup="CORE"/>
1277     </condition>
1278
1279     <condition id="ARMv8MBL CMSIS">
1280       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1281       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1282       <require Cclass="CMSIS" Cgroup="CORE"/>
1283     </condition>
1284
1285     <condition id="ARMv8MML CMSIS">
1286       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1287       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1288       <require Cclass="CMSIS" Cgroup="CORE"/>
1289     </condition>
1290
1291     <condition id="ARMv81MML CMSIS">
1292       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
1293       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1294       <require Cclass="CMSIS" Cgroup="CORE"/>
1295     </condition>
1296
1297     <condition id="ARMCA5 CMSIS">
1298       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
1299       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1300       <require Cclass="CMSIS" Cgroup="CORE"/>
1301     </condition>
1302
1303     <condition id="ARMCA7 CMSIS">
1304       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
1305       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1306       <require Cclass="CMSIS" Cgroup="CORE"/>
1307     </condition>
1308
1309     <condition id="ARMCA9 CMSIS">
1310       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
1311       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1312       <require Cclass="CMSIS" Cgroup="CORE"/>
1313     </condition>
1314
1315     <!-- RTOS RTX -->
1316     <condition id="RTOS RTX">
1317       <description>Components required for RTOS RTX</description>
1318       <require condition="ARMv6_7-M Device"/>
1319       <require condition="ARMCC GCC IAR"/>
1320       <require Cclass="Device" Cgroup="Startup"/>
1321       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1322     </condition>
1323     <condition id="RTOS RTX IFX">
1324       <description>Components required for RTOS RTX IFX</description>
1325       <require condition="ARMv6_7-M Device"/>
1326       <require condition="ARMCC GCC IAR"/>
1327       <require Dvendor="Infineon:7" Dname="XMC4*"/>
1328       <require Cclass="Device" Cgroup="Startup"/>
1329       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1330     </condition>
1331     <condition id="RTOS RTX5">
1332       <description>Components required for RTOS RTX5</description>
1333       <require condition="ARMv6_7_8-M Device"/>
1334       <require condition="ARMCC GCC IAR"/>
1335       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1336     </condition>
1337     <condition id="RTOS2 RTX5">
1338       <description>Components required for RTOS2 RTX5</description>
1339       <require condition="ARMv6_7_8-M Device"/>
1340       <deny    condition="TZ Non-secure"/>
1341       <require condition="ARMCC GCC IAR"/>
1342       <require Cclass="CMSIS"  Cgroup="CORE"/>
1343       <require Cclass="Device" Cgroup="Startup"/>
1344     </condition>
1345     <condition id="RTOS2 RTX5 v7-A">
1346       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
1347       <require condition="ARMv7-A Device"/>
1348       <require condition="ARMCC GCC IAR"/>
1349       <require Cclass="CMSIS"  Cgroup="CORE"/>
1350       <require Cclass="Device" Cgroup="Startup"/>
1351       <require Cclass="Device" Cgroup="OS Tick"/>
1352       <require Cclass="Device" Cgroup="IRQ Controller"/>
1353     </condition>
1354     <condition id="RTOS2 RTX5 NS">
1355       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1356       <require condition="ARMv8-M Device"/>
1357       <require condition="TZ Non-secure"/>
1358       <require condition="ARMCC GCC IAR"/>
1359       <require Cclass="CMSIS"  Cgroup="CORE"/>
1360       <require Cclass="Device" Cgroup="Startup"/>
1361     </condition>
1362
1363     <condition id="ARMCC ARMv6-M LE">
1364         <description>Arm Compiler for Armv6-M architecture (little endian)</description>
1365         <require condition="ARMCC"/>
1366         <require condition="ARMv6-M Device"/>
1367         <require Dendian="Little-endian"/>
1368     </condition>
1369     <condition id="ARMCC ARMv6-M BE">
1370         <description>Arm Compiler for Armv6-M architecture (big endian)</description>
1371         <require condition="ARMCC"/>
1372         <require condition="ARMv6-M Device"/>
1373         <require Dendian="Big-endian"/>
1374     </condition>
1375     <condition id="ARMCC ARMv7-M NOFP LE">
1376         <description>Arm Compiler for Armv7-M architecture without FPU (little endian)</description>
1377         <require condition="ARMCC"/>
1378         <require condition="ARMv7-M Device"/>
1379         <require Dendian="Little-endian"/>
1380         <require Dfpu="NO_FPU"/>
1381     </condition>
1382     <condition id="ARMCC ARMv7-M NOFP BE">
1383         <description>Arm Compiler for Armv7-M architecture without FPU (big endian)</description>
1384         <require condition="ARMCC"/>
1385         <require condition="ARMv7-M Device"/>
1386         <require Dendian="Big-endian"/>
1387         <require Dfpu="NO_FPU"/>
1388     </condition>
1389     <condition id="ARMCC ARMv7-M FP LE">
1390         <description>Arm Compiler for Armv7-M architecture with FPU (little endian)</description>
1391         <require condition="ARMCC"/>
1392         <require condition="ARMv7-M Device"/>
1393         <require Dendian="Little-endian"/>
1394         <accept Dfpu="SP_FPU"/>
1395         <accept Dfpu="DP_FPU"/>
1396     </condition>
1397     <condition id="ARMCC ARMv7-M FP BE">
1398         <description>Arm Compiler for Armv7-M architecture with FPU (big endian)</description>
1399         <require condition="ARMCC"/>
1400         <require condition="ARMv7-M Device"/>
1401         <require Dendian="Big-endian"/>
1402         <accept Dfpu="SP_FPU"/>
1403         <accept Dfpu="DP_FPU"/>
1404     </condition>
1405     <condition id="ARMCC ARMv8-MBL LE">
1406         <description>Arm Compiler for Armv8-M base line architecture (little endian)</description>
1407         <require condition="ARMCC"/>
1408         <require condition="ARMv8-MBL Device"/>
1409         <require Dendian="Little-endian"/>
1410     </condition>
1411     <condition id="ARMCC ARMv8-MML NOFP LE">
1412         <description>Arm Compiler for Armv8-M/Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1413         <require condition="ARMCC"/>
1414         <require condition="ARMv8x-MML Device"/>
1415         <require Dendian="Little-endian"/>
1416         <require Dfpu="NO_FPU"/>
1417         <require Dmve="NO_MVE"/>
1418     </condition>
1419      <condition id="ARMCC ARMv8-MML FP LE">
1420         <description>Arm Compiler for Armv8-M/Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1421         <require condition="ARMCC"/>
1422         <require condition="ARMv8x-MML Device"/>
1423         <require Dendian="Little-endian"/>
1424         <accept Dfpu="SP_FPU"/>
1425         <accept Dfpu="DP_FPU"/>
1426         <accept Dmve="MVE"/>
1427         <accept Dmve="FP_MVE"/>
1428     </condition>
1429
1430     <condition id="GCC ARMv6-M LE">
1431         <description>GNU Compiler for Armv6-M architecture (little endian)</description>
1432         <require condition="GCC"/>
1433         <require condition="ARMv6-M Device"/>
1434         <require Dendian="Little-endian"/>
1435     </condition>
1436     <condition id="GCC ARMv6-M BE">
1437         <description>GNU Compiler for Armv6-M architecture (big endian)</description>
1438         <require condition="GCC"/>
1439         <require condition="ARMv6-M Device"/>
1440         <require Dendian="Big-endian"/>
1441     </condition>
1442     <condition id="GCC ARMv7-M NOFP LE">
1443         <description>GNU Compiler for Armv7-M architecture without FPU (little endian)</description>
1444         <require condition="GCC"/>
1445         <require condition="ARMv7-M Device"/>
1446         <require Dendian="Little-endian"/>
1447         <require Dfpu="NO_FPU"/>
1448     </condition>
1449     <condition id="GCC ARMv7-M NOFP BE">
1450         <description>GNU Compiler for Armv7-M architecture without FPU (big endian)</description>
1451         <require condition="GCC"/>
1452         <require condition="ARMv7-M Device"/>
1453         <require Dendian="Big-endian"/>
1454         <require Dfpu="NO_FPU"/>
1455     </condition>
1456     <condition id="GCC ARMv7-M FP LE">
1457         <description>GNU Compiler for Armv7-M architecture with FPU (little endian)</description>
1458         <require condition="GCC"/>
1459         <require condition="ARMv7-M Device"/>
1460         <require Dendian="Little-endian"/>
1461         <accept Dfpu="SP_FPU"/>
1462         <accept Dfpu="DP_FPU"/>
1463     </condition>
1464     <condition id="GCC ARMv7-M FP BE">
1465         <description>GNU Compiler for Armv7-M architecture with FPU (big endian)</description>
1466         <require condition="GCC"/>
1467         <require condition="ARMv7-M Device"/>
1468         <require Dendian="Big-endian"/>
1469         <accept Dfpu="SP_FPU"/>
1470         <accept Dfpu="DP_FPU"/>
1471     </condition>
1472     <condition id="GCC ARMv8-MBL LE">
1473         <description>GNU Compiler for Armv8-M base line architecture (little endian)</description>
1474         <require condition="GCC"/>
1475         <require condition="ARMv8-MBL Device"/>
1476         <require Dendian="Little-endian"/>
1477     </condition>
1478     <condition id="GCC ARMv8-MML NOFP LE">
1479         <description>GNU Compiler for Armv8-M/Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1480         <require condition="GCC"/>
1481         <require condition="ARMv8x-MML Device"/>
1482         <require Dendian="Little-endian"/>
1483         <require Dfpu="NO_FPU"/>
1484         <require Dmve="NO_MVE"/>
1485     </condition>
1486      <condition id="GCC ARMv8-MML FP LE">
1487         <description>GNU Compiler for Armv8-M/Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1488         <require condition="GCC"/>
1489         <require condition="ARMv8x-MML Device"/>
1490         <require Dendian="Little-endian"/>
1491         <accept Dfpu="SP_FPU"/>
1492         <accept Dfpu="DP_FPU"/>
1493         <accept Dmve="MVE"/>
1494         <accept Dmve="FP_MVE"/>
1495     </condition>
1496
1497     <condition id="IARCC ARMv6-M LE">
1498         <description>IAR Compiler for Armv6-M architecture (little endian)</description>
1499         <require condition="IAR"/>
1500         <require condition="ARMv6-M Device"/>
1501         <require Dendian="Little-endian"/>
1502     </condition>
1503     <condition id="IARCC ARMv6-M BE">
1504         <description>IAR Compiler for Armv6-M architecture (big endian)</description>
1505         <require condition="IAR"/>
1506         <require condition="ARMv6-M Device"/>
1507         <require Dendian="Big-endian"/>
1508     </condition>
1509     <condition id="IARCC ARMv7-M NOFP LE">
1510         <description>IAR Compiler for Armv7-M architecture without FPU (little endian)</description>
1511         <require condition="IAR"/>
1512         <require condition="ARMv7-M Device"/>
1513         <require Dendian="Little-endian"/>
1514         <require Dfpu="NO_FPU"/>
1515     </condition>
1516     <condition id="IARCC ARMv7-M NOFP BE">
1517         <description>IAR Compiler for Armv7-M architecture without FPU (big endian)</description>
1518         <require condition="IAR"/>
1519         <require condition="ARMv7-M Device"/>
1520         <require Dendian="Big-endian"/>
1521         <require Dfpu="NO_FPU"/>
1522     </condition>
1523     <condition id="IARCC ARMv7-M FP LE">
1524         <description>IAR Compiler for Armv7-M architecture with FPU (little endian)</description>
1525         <require condition="IAR"/>
1526         <require condition="ARMv7-M Device"/>
1527         <require Dendian="Little-endian"/>
1528         <accept Dfpu="SP_FPU"/>
1529         <accept Dfpu="DP_FPU"/>
1530     </condition>
1531     <condition id="IARCC ARMv7-M FP BE">
1532         <description>IAR Compiler for Armv7-M architecture with FPU (big endian)</description>
1533         <require condition="IAR"/>
1534         <require condition="ARMv7-M Device"/>
1535         <require Dendian="Big-endian"/>
1536         <accept Dfpu="SP_FPU"/>
1537         <accept Dfpu="DP_FPU"/>
1538     </condition>
1539     <condition id="IARCC ARMv8-MBL LE">
1540         <description>IAR Compiler for Armv8-M base line architecture (little endian)</description>
1541         <require condition="IAR"/>
1542         <require condition="ARMv8-MBL Device"/>
1543         <require Dendian="Little-endian"/>
1544     </condition>
1545     <condition id="IARCC ARMv8-MML NOFP LE">
1546         <description>IAR Compiler for Armv8-M main line architecture without FPU (little endian)</description>
1547         <require condition="IAR"/>
1548         <require condition="ARMv8-MML Device"/>
1549         <require Dendian="Little-endian"/>
1550         <require Dfpu="NO_FPU"/>
1551     </condition>
1552     <condition id="IARCC ARMv8-MML FP LE">
1553         <description>IAR Compiler for Armv8-M main line architecture with FPU (little endian)</description>
1554         <require condition="IAR"/>
1555         <require condition="ARMv8-MML Device"/>
1556         <require Dendian="Little-endian"/>
1557         <accept Dfpu="SP_FPU"/>
1558         <accept Dfpu="DP_FPU"/>
1559     </condition>
1560     <condition id="IARCC ARMv81-MML NOFP LE">
1561         <description>IAR Compiler for Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1562         <require condition="IAR"/>
1563         <require condition="ARMv81-MML Device"/>
1564         <require Dendian="Little-endian"/>
1565         <require Dfpu="NO_FPU"/>
1566         <require Dmve="NO_MVE"/>
1567     </condition>
1568      <condition id="IARCC ARMv81-MML FP LE">
1569         <description>IAR Compiler for Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1570         <require condition="IAR"/>
1571         <require condition="ARMv81-MML Device"/>
1572         <require Dendian="Little-endian"/>
1573         <accept Dfpu="SP_FPU"/>
1574         <accept Dfpu="DP_FPU"/>
1575         <accept Dmve="MVE"/>
1576         <accept Dmve="FP_MVE"/>
1577     </condition>
1578
1579     <condition id="ARMASM ARMv6-M">
1580         <description>Arm Assembler for Armv6-M architecture</description>
1581         <require condition="ARMCC5"/>
1582         <require condition="ARMv6-M Device"/>
1583     </condition>
1584     <condition id="GNUASM ARMv6-M">
1585         <description>GNU Assembler for Armv6-M architecture</description>
1586         <accept condition="ARMCC6"/>
1587         <accept condition="GCC"/>
1588         <require condition="ARMv6-M Device"/>
1589     </condition>
1590     <condition id="IARASM ARMv6-M">
1591         <description>IAR Assembler for Armv6-M architecture</description>
1592         <require condition="IAR"/>
1593         <require condition="ARMv6-M Device"/>
1594     </condition>
1595
1596     <condition id="ARMASM ARMv7-M">
1597         <description>Arm Assembler for Armv7-M architecture</description>
1598         <require condition="ARMCC5"/>
1599         <require condition="ARMv7-M Device"/>
1600     </condition>
1601     <condition id="GNUASM ARMv7-M">
1602         <description>GNU Assembler for Armv7-M architecture</description>
1603         <accept condition="ARMCC6"/>
1604         <accept condition="GCC"/>
1605         <require condition="ARMv7-M Device"/>
1606     </condition>
1607     <condition id="IARASM ARMv7-M">
1608         <description>IAR Assembler for Armv7-M architecture</description>
1609         <require condition="IAR"/>
1610         <require condition="ARMv7-M Device"/>
1611     </condition>
1612
1613     <condition id="GNUASM ARMv8-MBL">
1614         <description>GNU Assembler for Armv8-M base line architecture</description>
1615         <require condition="ARMCC GCC"/>
1616         <require condition="ARMv8-MBL Device"/>
1617     </condition>
1618     <condition id="GNUASM ARMv8-MML">
1619         <description>GNU Assembler for Armv8-M/Armv8.1-M main line architecture</description>
1620         <require condition="ARMCC GCC"/>
1621         <require condition="ARMv8x-MML Device"/>
1622     </condition>
1623     <condition id="IARASM ARMv8-MBL">
1624         <description>IAR Assembler for Armv8-M base line architecture</description>
1625         <require condition="IAR"/>
1626         <require condition="ARMv8-MBL Device"/>
1627     </condition>
1628     <condition id="IARASM ARMv8-MML">
1629         <description>IAR Assembler for Armv8-M main line architecture</description>
1630         <require condition="IAR"/>
1631         <require condition="ARMv8x-MML Device"/>
1632     </condition>
1633
1634     <condition id="ARMASM ARMv7-A">
1635         <description>Arm Assembler for Armv7-A architecture</description>
1636         <require condition="ARMCC5"/>
1637         <require condition="ARMv7-A Device"/>
1638     </condition>
1639     <condition id="GNUASM ARMv7-A">
1640         <description>GNU Assembler for Armv7-A architecture</description>
1641         <accept condition="ARMCC6"/>
1642         <accept condition="GCC"/>
1643         <require condition="ARMv7-A Device"/>
1644     </condition>
1645     <condition id="IARASM ARMv7-A">
1646         <description>IAR Assembler for Armv7-A architecture</description>
1647         <require condition="IAR"/>
1648         <require condition="ARMv7-A Device"/>
1649     </condition>
1650
1651     <!-- OS Tick -->
1652     <condition id="OS Tick PTIM">
1653       <description>Components required for OS Tick Private Timer</description>
1654       <accept Dcore="Cortex-A5"/>
1655       <accept Dcore="Cortex-A9"/>
1656       <require Cclass="Device" Cgroup="IRQ Controller"/>
1657     </condition>
1658
1659     <condition id="OS Tick GTIM">
1660       <description>Components required for OS Tick Generic Physical Timer</description>
1661       <accept Dcore="Cortex-A7"/>
1662       <require Cclass="Device" Cgroup="IRQ Controller"/>
1663     </condition>
1664
1665   </conditions>
1666
1667   <components>
1668     <!-- CMSIS-Core component -->
1669     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.7.0"  condition="ARMv6_7_8-M Device" >
1670       <description>CMSIS-CORE for Cortex-M, SC000, SC300, Star-MC1, ARMv8-M, ARMv8.1-M</description>
1671       <files>
1672         <!-- CPU independent -->
1673         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1674         <file category="include" name="CMSIS/Core/Include/"/>
1675         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
1676         <!-- Code template -->
1677         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
1678         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1679       </files>
1680     </component>
1681
1682     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.1"  condition="ARMv7-A Device" >
1683       <description>CMSIS-CORE for Cortex-A</description>
1684       <files>
1685         <!-- CPU independent -->
1686         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1687         <file category="include" name="CMSIS/Core_A/Include/"/>
1688       </files>
1689     </component>
1690
1691     <!-- CMSIS-Startup components -->
1692     <!-- Cortex-M0 -->
1693     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
1694       <description>System and Startup for Generic Arm Cortex-M0 device</description>
1695       <files>
1696         <!-- include folder / device header file -->
1697         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1698         <!-- startup / system file -->
1699         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
1700         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1701         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1702         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1703         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1704       </files>
1705     </component>
1706     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
1707       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
1708       <files>
1709         <!-- include folder / device header file -->
1710         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1711         <!-- startup / system file -->
1712         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
1713         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.2.0" attr="config" condition="GCC"/>
1714         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1715         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1716         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1717       </files>
1718     </component>
1719
1720     <!-- Cortex-M0+ -->
1721     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
1722       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
1723       <files>
1724         <!-- include folder / device header file -->
1725         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1726         <!-- startup / system file -->
1727         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
1728         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1729         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1730         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
1731         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1732       </files>
1733     </component>
1734     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM0+ CMSIS">
1735       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
1736       <files>
1737         <!-- include folder / device header file -->
1738         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1739         <!-- startup / system file -->
1740         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
1741         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.2.0" attr="config" condition="GCC"/>
1742         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
1743         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1744         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1745       </files>
1746     </component>
1747
1748     <!-- Cortex-M1 -->
1749     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
1750       <description>System and Startup for Generic Arm Cortex-M1 device</description>
1751       <files>
1752         <!-- include folder / device header file -->
1753         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
1754         <!-- startup / system file -->
1755         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
1756         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1757         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1758         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1759         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
1760       </files>
1761     </component>
1762     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
1763       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
1764       <files>
1765         <!-- include folder / device header file -->
1766         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
1767         <!-- startup / system file -->
1768         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
1769         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.2.0" attr="config" condition="GCC"/>
1770         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1771         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
1772         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
1773       </files>
1774     </component>
1775
1776     <!-- Cortex-M3 -->
1777     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
1778       <description>System and Startup for Generic Arm Cortex-M3 device</description>
1779       <files>
1780         <!-- include folder / device header file -->
1781         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1782         <!-- startup / system file -->
1783         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
1784         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1785         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1786         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1787         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
1788       </files>
1789     </component>
1790     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
1791       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
1792       <files>
1793         <!-- include folder / device header file -->
1794         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1795         <!-- startup / system file -->
1796         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
1797         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.2.0" attr="config" condition="GCC"/>
1798         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1799         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1800         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
1801       </files>
1802     </component>
1803
1804     <!-- Cortex-M4 -->
1805     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
1806       <description>System and Startup for Generic Arm Cortex-M4 device</description>
1807       <files>
1808         <!-- include folder / device header file -->
1809         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1810         <!-- startup / system file -->
1811         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
1812         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1813         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1814         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1815        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
1816       </files>
1817     </component>
1818     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
1819       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
1820       <files>
1821         <!-- include folder / device header file -->
1822         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1823         <!-- startup / system file -->
1824         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
1825         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.2.0" attr="config" condition="GCC"/>
1826         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1827         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1828         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
1829       </files>
1830     </component>
1831
1832     <!-- Cortex-M7 -->
1833     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
1834       <description>System and Startup for Generic Arm Cortex-M7 device</description>
1835       <files>
1836         <!-- include folder / device header file -->
1837         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1838         <!-- startup / system file -->
1839         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
1840         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1841         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1842         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1843         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
1844       </files>
1845     </component>
1846     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
1847       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
1848       <files>
1849         <!-- include folder / device header file -->
1850         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1851         <!-- startup / system file -->
1852         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
1853         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.2.0" attr="config" condition="GCC"/>
1854         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1855         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1856         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
1857       </files>
1858     </component>
1859
1860     <!-- Cortex-M23 -->
1861     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
1862       <description>System and Startup for Generic Arm Cortex-M23 device</description>
1863       <files>
1864         <!-- include folder / device header file -->
1865         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1866         <!-- startup / system file -->
1867         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
1868         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1869         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1870         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1871         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
1872         <!-- SAU configuration -->
1873         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1874       </files>
1875     </component>
1876     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
1877       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
1878       <files>
1879         <!-- include folder / device header file -->
1880         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1881         <!-- startup / system file -->
1882         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1883         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1884         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1885         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
1886         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1887         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
1888         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
1889         <!-- SAU configuration -->
1890         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1891       </files>
1892     </component>
1893
1894     <!-- Cortex-M33 -->
1895     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
1896       <description>System and Startup for Generic Arm Cortex-M33 device</description>
1897       <files>
1898         <!-- include folder / device header file -->
1899         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1900         <!-- startup / system file -->
1901         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
1902         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1903         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1904         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1905         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
1906         <!-- SAU configuration -->
1907         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
1908       </files>
1909     </component>
1910     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
1911       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
1912       <files>
1913         <!-- include folder / device header file -->
1914         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1915         <!-- startup / system file -->
1916         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1917         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1918         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1919         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.3.0" attr="config" condition="GCC"/>
1920         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1921         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
1922         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
1923         <!-- SAU configuration -->
1924         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
1925       </files>
1926     </component>
1927
1928     <!-- Cortex-M35P -->
1929     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
1930       <description>System and Startup for Generic Arm Cortex-M35P device</description>
1931       <files>
1932         <!-- include folder / device header file -->
1933         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
1934         <!-- startup / system file -->
1935         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
1936         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1937         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1938         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
1939         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
1940         <!-- SAU configuration -->
1941         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1942       </files>
1943     </component>
1944     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
1945       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
1946       <files>
1947         <!-- include folder / device header file -->
1948         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
1949         <!-- startup / system file -->
1950         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1951         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1952         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1953         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.3.0" attr="config" condition="GCC"/>
1954         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
1955         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
1956         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
1957         <!-- SAU configuration -->
1958         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1959       </files>
1960     </component>
1961
1962     <!-- Cortex-M55 -->
1963     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
1964       <description>System and Startup for Generic Cortex-M55 device</description>
1965       <files>
1966         <!-- include folder / device header file -->
1967         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
1968         <!-- startup / system file -->
1969         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
1970         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1971         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1972         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1973         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.1.0" attr="config"/>
1974         <!-- SAU configuration -->
1975         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1976       </files>
1977     </component>
1978
1979     <!-- Cortex-M85 -->
1980     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM85 CMSIS" isDefaultVariant="true">
1981       <description>System and Startup for Generic Cortex-M85 device</description>
1982       <files>
1983         <!-- include folder / device header file -->
1984         <file category="include"      name="Device/ARM/ARMCM85/Include/"/>
1985         <!-- startup / system file -->
1986         <file category="sourceC"      name="Device/ARM/ARMCM85/Source/startup_ARMCM85.c"             version="1.0.0" attr="config"/>
1987         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/ARM/ARMCM85_ac6_s.sct"         version="1.0.0" attr="config" condition="Startup ARMCC6 Secure"/>
1988         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/ARM/ARMCM85_ac6.sct"           version="1.0.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1989         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1990         <file category="sourceC"      name="Device/ARM/ARMCM85/Source/system_ARMCM85.c"              version="1.0.0" attr="config"/>
1991         <!-- SAU configuration -->
1992         <file category="header"       name="Device/ARM/ARMCM85/Include/Template/partition_ARMCM85.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1993       </files>
1994     </component>
1995
1996     <!-- Cortex-SC000 -->
1997     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
1998       <description>System and Startup for Generic Arm SC000 device</description>
1999       <files>
2000         <!-- include folder / device header file -->
2001         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2002         <!-- startup / system file -->
2003         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2004         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2005         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2006         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2007         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2008       </files>
2009     </component>
2010     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2011       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2012       <files>
2013         <!-- include folder / device header file -->
2014         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2015         <!-- startup / system file -->
2016         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2017         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.2.0" attr="config" condition="GCC"/>
2018         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2019         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2020         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2021       </files>
2022     </component>
2023
2024     <!-- Cortex-SC300 -->
2025     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2026       <description>System and Startup for Generic Arm SC300 device</description>
2027       <files>
2028         <!-- include folder / device header file -->
2029         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2030         <!-- startup / system file -->
2031         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2032         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2033         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2034         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2035         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2036       </files>
2037     </component>
2038     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2039       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2040       <files>
2041         <!-- include folder / device header file -->
2042         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2043         <!-- startup / system file -->
2044         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2045         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.2.0" attr="config" condition="GCC"/>
2046         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2047         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2048         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2049       </files>
2050     </component>
2051
2052     <!-- ARMv8MBL -->
2053     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2054       <description>System and Startup for Generic Armv8-M Baseline device</description>
2055       <files>
2056         <!-- include folder / device header file -->
2057         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2058         <!-- startup / system file -->
2059         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2060         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2061         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2062         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2063         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2064         <!-- SAU configuration -->
2065         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2066       </files>
2067     </component>
2068     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2069       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2070       <files>
2071         <!-- include folder / device header file -->
2072         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2073         <!-- startup / system file -->
2074         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2075         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2076         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2077         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2078         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2079         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2080         <!-- SAU configuration -->
2081         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2082       </files>
2083     </component>
2084
2085     <!-- ARMv8MML -->
2086     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2087       <description>System and Startup for Generic Armv8-M Mainline device</description>
2088       <files>
2089         <!-- include folder / device header file -->
2090         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2091         <!-- startup / system file -->
2092         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2093         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2094         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2095         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2096         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2097         <!-- SAU configuration -->
2098         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2099       </files>
2100     </component>
2101     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2102       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2103       <files>
2104         <!-- include folder / device header file -->
2105         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2106         <!-- startup / system file -->
2107         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2108         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2109         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2110         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.3.0" attr="config" condition="GCC"/>
2111         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2112         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2113         <!-- SAU configuration -->
2114         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2115       </files>
2116     </component>
2117
2118     <!-- ARMv81MML -->
2119     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2120       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2121       <files>
2122         <!-- include folder / device header file -->
2123         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2124         <!-- startup / system file -->
2125         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2126         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2127         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2128         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2129         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2130         <!-- SAU configuration -->
2131         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2132       </files>
2133     </component>
2134
2135     <!-- Cortex-A5 -->
2136     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA5 CMSIS">
2137       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2138       <files>
2139         <!-- include folder / device header file -->
2140         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2141         <!-- startup / system / mmu files -->
2142         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2143         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2144         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2145         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2146         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.1" attr="config" condition="GCC"/>
2147         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2148         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2149         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2150         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2151         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2152         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2153         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2154
2155       </files>
2156     </component>
2157
2158     <!-- Cortex-A7 -->
2159     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA7 CMSIS">
2160       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2161       <files>
2162         <!-- include folder / device header file -->
2163         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2164         <!-- startup / system / mmu files -->
2165         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2166         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2167         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2168         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2169         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.1" attr="config" condition="GCC"/>
2170         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2171         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2172         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2173         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2174         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2175         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2176         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2177       </files>
2178     </component>
2179
2180     <!-- Cortex-A9 -->
2181     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.2" condition="ARMCA9 CMSIS">
2182       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2183       <files>
2184         <!-- include folder / device header file -->
2185         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2186         <!-- startup / system / mmu files -->
2187         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2188         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2189         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2190         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2191         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.1" attr="config" condition="GCC"/>
2192         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2193         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2194         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2195         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2196         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2197         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2198         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2199       </files>
2200     </component>
2201
2202     <!-- IRQ Controller -->
2203     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.2.0" condition="ARMv7-A Device">
2204       <description>IRQ Controller implementation using GIC</description>
2205       <files>
2206         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2207       </files>
2208     </component>
2209
2210     <!-- OS Tick -->
2211     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2212       <description>OS Tick implementation using Private Timer</description>
2213       <files>
2214         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2215       </files>
2216     </component>
2217
2218     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2219       <description>OS Tick implementation using Generic Physical Timer</description>
2220       <files>
2221         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2222       </files>
2223     </component>
2224
2225     <!-- CMSIS-RTOS Keil RTX component -->
2226     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2227       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2228       <RTE_Components_h>
2229         <!-- the following content goes into file 'RTE_Components.h' -->
2230         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2231         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2232       </RTE_Components_h>
2233       <files>
2234         <!-- CPU independent -->
2235         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2236         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2237         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2238
2239         <!-- RTX templates -->
2240         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2241         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2242         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2243         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2244         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2245         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2246         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2247         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2248         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2249         <!-- tool-chain specific template file -->
2250         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2251         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2252         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2253
2254         <!-- CPU and Compiler dependent -->
2255         <!-- ARMCC -->
2256         <file category="library" condition="ARMCC ARMv6-M LE"      name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2257         <file category="library" condition="ARMCC ARMv6-M BE"      name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2258         <file category="library" condition="ARMCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2259         <file category="library" condition="ARMCC ARMv7-M NOFP BE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2260         <file category="library" condition="ARMCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2261         <file category="library" condition="ARMCC ARMv7-M FP BE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2262         <!-- GCC -->
2263         <file category="library" condition="GCC ARMv6-M LE"        name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2264         <file category="library" condition="GCC ARMv6-M BE"        name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2265         <file category="library" condition="GCC ARMv7-M NOFP LE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2266         <file category="library" condition="GCC ARMv7-M NOFP BE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2267         <file category="library" condition="GCC ARMv7-M FP LE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2268         <file category="library" condition="GCC ARMv7-M FP BE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2269         <!-- IAR -->
2270         <file category="library" condition="IARCC ARMv6-M LE"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2271         <file category="library" condition="IARCC ARMv6-M BE"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2272         <file category="library" condition="IARCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2273         <file category="library" condition="IARCC ARMv7-M NOFP BE" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2274         <file category="library" condition="IARCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2275         <file category="library" condition="IARCC ARMv7-M FP BE"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2276       </files>
2277     </component>
2278     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2279     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2280       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2281       <RTE_Components_h>
2282         <!-- the following content goes into file 'RTE_Components.h' -->
2283         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2284         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2285       </RTE_Components_h>
2286       <files>
2287         <!-- CPU independent -->
2288         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2289         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2290         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2291
2292         <!-- RTX templates -->
2293         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2294         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2295         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2296         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2297         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2298         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2299         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2300         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2301         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2302         <!-- tool-chain specific template file -->
2303         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2304         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2305         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2306
2307         <!-- CPU and Compiler dependent -->
2308         <!-- ARMCC -->
2309         <file category="library" condition="ARMCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2310         <file category="library" condition="ARMCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2311         <!-- GCC -->
2312         <file category="library" condition="GCC ARMv7-M NOFP LE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2313         <file category="library" condition="GCC ARMv7-M FP LE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2314         <!-- IAR -->
2315       </files>
2316     </component>
2317
2318     <!-- CMSIS-RTOS Keil RTX5 component -->
2319     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.7.0" Capiversion="1.0.0" condition="RTOS RTX5">
2320       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2321       <RTE_Components_h>
2322         <!-- the following content goes into file 'RTE_Components.h' -->
2323         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2324         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2325       </RTE_Components_h>
2326       <files>
2327         <!-- RTX header file -->
2328         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2329         <!-- RTX compatibility module for API V1 -->
2330         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2331       </files>
2332     </component>
2333
2334     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2335     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.7.0" Capiversion="2.2.0" condition="RTOS2 RTX5">
2336       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
2337       <RTE_Components_h>
2338         <!-- the following content goes into file 'RTE_Components.h' -->
2339         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2340         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2341       </RTE_Components_h>
2342       <files>
2343         <!-- RTX documentation -->
2344         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2345
2346         <!-- RTX header files -->
2347         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2348
2349         <!-- RTX configuration -->
2350         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.6.0"/>
2351         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.2.0"/>
2352
2353         <!-- RTX templates -->
2354         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2355         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2356         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2357         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2358         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2359         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2360         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2361         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2362         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2363         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2364
2365         <!-- RTX library configuration -->
2366         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2367
2368         <!-- RTX libraries (CPU and Compiler dependent) -->
2369         <!-- ARMCC -->
2370         <file category="library" condition="ARMCC ARMv6-M LE"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2371         <file category="library" condition="ARMCC ARMv7-M NOFP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2372         <file category="library" condition="ARMCC ARMv7-M FP LE"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2373         <file category="library" condition="ARMCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2374         <file category="library" condition="ARMCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2375         <file category="library" condition="ARMCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2376         <!-- GCC -->
2377         <file category="library" condition="GCC ARMv6-M LE"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2378         <file category="library" condition="GCC ARMv7-M NOFP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2379         <file category="library" condition="GCC ARMv7-M FP LE"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2380         <file category="library" condition="GCC ARMv8-MBL LE"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2381         <file category="library" condition="GCC ARMv8-MML NOFP LE"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2382         <file category="library" condition="GCC ARMv8-MML FP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2383         <!-- IAR -->
2384         <file category="library" condition="IARCC ARMv6-M LE"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2385         <file category="library" condition="IARCC ARMv7-M NOFP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2386         <file category="library" condition="IARCC ARMv7-M FP LE"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2387         <file category="library" condition="IARCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
2388         <file category="library" condition="IARCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
2389         <file category="library" condition="IARCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
2390         <file category="library" condition="IARCC ARMv81-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MM.a"    src="CMSIS/RTOS2/RTX/Source"/>
2391         <file category="library" condition="IARCC ARMv81-MML FP LE"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMF.a"   src="CMSIS/RTOS2/RTX/Source"/>
2392       </files>
2393     </component>
2394     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.7.0" Capiversion="2.2.0" condition="RTOS2 RTX5 NS">
2395       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
2396       <RTE_Components_h>
2397         <!-- the following content goes into file 'RTE_Components.h' -->
2398         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2399         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2400         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2401       </RTE_Components_h>
2402       <files>
2403         <!-- RTX documentation -->
2404         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2405
2406         <!-- RTX header files -->
2407         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2408
2409         <!-- RTX configuration -->
2410         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.6.0"/>
2411         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.2.0"/>
2412
2413         <!-- RTX templates -->
2414         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2415         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2416         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2417         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2418         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2419         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2420         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2421         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2422         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2423         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2424
2425         <!-- RTX library configuration -->
2426         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2427
2428         <!-- RTX libraries (CPU and Compiler dependent) -->
2429         <!-- ARMCC -->
2430         <file category="library" condition="ARMCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2431         <file category="library" condition="ARMCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2432         <file category="library" condition="ARMCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2433         <!-- GCC -->
2434         <file category="library" condition="GCC ARMv8-MBL LE"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2435         <file category="library" condition="GCC ARMv8-MML NOFP LE"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2436         <file category="library" condition="GCC ARMv8-MML FP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2437         <!-- IAR -->
2438         <file category="library" condition="IARCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
2439         <file category="library" condition="IARCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
2440         <file category="library" condition="IARCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
2441         <file category="library" condition="IARCC ARMv81-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMN.a"    src="CMSIS/RTOS2/RTX/Source"/>
2442         <file category="library" condition="IARCC ARMv81-MML FP LE"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMFN.a"   src="CMSIS/RTOS2/RTX/Source"/>
2443       </files>
2444     </component>
2445     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.7.0" Capiversion="2.2.0" condition="RTOS2 RTX5">
2446       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
2447       <RTE_Components_h>
2448         <!-- the following content goes into file 'RTE_Components.h' -->
2449         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2450         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2451         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2452       </RTE_Components_h>
2453       <files>
2454         <!-- RTX documentation -->
2455         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2456
2457         <!-- RTX header files -->
2458         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2459
2460         <!-- RTX configuration -->
2461         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.6.0"/>
2462         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.2.0"/>
2463
2464         <!-- RTX templates -->
2465         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2466         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2467         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2468         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2469         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2470         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2471         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2472         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2473         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2474         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2475
2476         <!-- RTX sources (core) -->
2477         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2478         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2479         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2480         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2481         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2482         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2483         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2484         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2485         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2486         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2487         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2488         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2489         <!-- RTX sources (library configuration) -->
2490         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2491         <!-- RTX sources (handlers ARMASM) -->
2492         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="ARMASM ARMv6-M"/>
2493         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="ARMASM ARMv7-M"/>
2494         <!-- RTX sources (handlers GAS) -->
2495         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="GNUASM ARMv6-M"/>
2496         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="GNUASM ARMv7-M"/>
2497         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="GNUASM ARMv8-MBL"/>
2498         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="GNUASM ARMv8-MML"/>
2499         <!-- RTX sources (handlers IAR) -->
2500         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="IARASM ARMv6-M"/>
2501         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="IARASM ARMv7-M"/>
2502         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="IARASM ARMv8-MBL"/>
2503         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="IARASM ARMv8-MML"/>
2504         <!-- OS Tick (SysTick) -->
2505         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2506       </files>
2507     </component>
2508     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.7.0" Capiversion="2.2.0" condition="RTOS2 RTX5 v7-A">
2509       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
2510       <RTE_Components_h>
2511         <!-- the following content goes into file 'RTE_Components.h' -->
2512         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2513         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2514         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2515       </RTE_Components_h>
2516       <files>
2517         <!-- RTX documentation -->
2518         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2519
2520         <!-- RTX header files -->
2521         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2522
2523         <!-- RTX configuration -->
2524         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.6.0"/>
2525         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.2.0"/>
2526
2527         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2528
2529         <!-- RTX templates -->
2530         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2531         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2532         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2533         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2534         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2535         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2536         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2537         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2538         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2539         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2540
2541         <!-- RTX sources (core) -->
2542         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2543         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2544         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2545         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2546         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2547         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2548         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2549         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2550         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2551         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2552         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2553         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2554         <!-- RTX sources (library configuration) -->
2555         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2556         <!-- RTX sources (handlers ARMASM) -->
2557         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="ARMASM ARMv7-A"/>
2558         <!-- RTX sources (handlers GAS) -->
2559         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="GNUASM ARMv7-A"/>
2560         <!-- RTX sources (handlers IAR) -->
2561         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="IARASM ARMv7-A"/>
2562       </files>
2563     </component>
2564     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.7.0" Capiversion="2.2.0" condition="RTOS2 RTX5 NS">
2565       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
2566       <RTE_Components_h>
2567         <!-- the following content goes into file 'RTE_Components.h' -->
2568         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2569         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2570         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2571         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2572       </RTE_Components_h>
2573       <files>
2574         <!-- RTX documentation -->
2575         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2576
2577         <!-- RTX header files -->
2578         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2579
2580         <!-- RTX configuration -->
2581         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.6.0"/>
2582         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.2.0"/>
2583
2584         <!-- RTX templates -->
2585         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2586         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2587         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2588         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2589         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2590         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2591         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2592         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2593         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2594         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2595
2596         <!-- RTX sources (core) -->
2597         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2598         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2599         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2600         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2601         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2602         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2603         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2604         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2605         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2606         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2607         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2608         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2609         <!-- RTX sources (library configuration) -->
2610         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2611         <!-- RTX sources (GAS handlers) -->
2612         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="GNUASM ARMv8-MBL"/>
2613         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="GNUASM ARMv8-MML"/>
2614         <!-- RTX sources (IAR handlers) -->
2615         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="IARASM ARMv8-MBL"/>
2616         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="IARASM ARMv8-MML"/>
2617         <!-- OS Tick (SysTick) -->
2618         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2619       </files>
2620     </component>
2621
2622     <!-- CMSIS-Driver Custom components -->
2623     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2624       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
2625       <files>
2626         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
2627         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
2628       </files>
2629     </component>
2630     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2631       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
2632       <files>
2633         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
2634         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
2635       </files>
2636     </component>
2637     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
2638       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
2639       <files>
2640         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
2641         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
2642       </files>
2643     </component>
2644     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2645       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
2646       <files>
2647         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
2648         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
2649       </files>
2650     </component>
2651     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
2652       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
2653       <files>
2654         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
2655         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
2656       </files>
2657     </component>
2658     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2659       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
2660       <files>
2661         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
2662         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
2663       </files>
2664     </component>
2665     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2666       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
2667       <files>
2668         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
2669         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
2670       </files>
2671     </component>
2672     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2673       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
2674       <files>
2675         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
2676         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
2677       </files>
2678     </component>
2679     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2680       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
2681       <files>
2682         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
2683         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
2684         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
2685         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
2686       </files>
2687     </component>
2688     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2689       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
2690       <files>
2691         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
2692         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
2693       </files>
2694     </component>
2695     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2696       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
2697       <files>
2698         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
2699         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
2700       </files>
2701     </component>
2702     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2703       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
2704       <files>
2705         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
2706         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
2707       </files>
2708     </component>
2709     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2710       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
2711       <files>
2712         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
2713         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
2714       </files>
2715     </component>
2716     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
2717       <description>Access to #include Driver_WiFi.h file</description>
2718       <files>
2719         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
2720         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
2721       </files>
2722     </component>
2723
2724     <!-- VIO components -->
2725     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
2726       <description>Virtual I/O custom implementation template</description>
2727       <files>
2728         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
2729       </files>
2730     </component>
2731     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
2732       <description>Virtual I/O implementation using memory only</description>
2733       <files>
2734         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
2735       </files>
2736     </component>
2737
2738   </components>
2739
2740   <boards>
2741     <board name="uVision Simulator" vendor="Keil">
2742       <description>uVision Simulator</description>
2743       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2744       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2745       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
2746       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
2747       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2748       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2749       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2750       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2751       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2752       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2753       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2754       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2755       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2756       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2757       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
2758       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2759       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2760       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2761       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2762       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2763       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2764       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
2765       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
2766       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
2767       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
2768       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
2769     </board>
2770
2771     <board name="EWARM Simulator" vendor="IAR">
2772       <description>EWARM Simulator</description>
2773       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2774       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2775       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
2776       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
2777       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2778       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2779       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2780       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2781       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2782       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2783       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2784       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2785       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2786       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2787       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
2788       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2789       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2790       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2791       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2792       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2793       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2794       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
2795       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
2796       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
2797       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
2798       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
2799     </board>
2800   </boards>
2801
2802   <examples>
2803     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2804       <description>CMSIS-RTOS2 Blinky example</description>
2805       <board name="uVision Simulator" vendor="Keil"/>
2806       <project>
2807         <environment name="uv" load="Blinky.uvprojx"/>
2808       </project>
2809       <attributes>
2810         <component Cclass="CMSIS" Cgroup="CORE"/>
2811         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2812         <component Cclass="Device" Cgroup="Startup"/>
2813         <category>Getting Started</category>
2814       </attributes>
2815     </example>
2816
2817     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2818       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2819       <board name="uVision Simulator" vendor="Keil"/>
2820       <project>
2821         <environment name="uv" load="Blinky.uvprojx"/>
2822       </project>
2823       <attributes>
2824         <component Cclass="CMSIS" Cgroup="CORE"/>
2825         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2826         <component Cclass="Device" Cgroup="Startup"/>
2827         <category>Getting Started</category>
2828       </attributes>
2829     </example>
2830
2831     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
2832       <description>CMSIS-RTOS2 Message Queue Example</description>
2833       <board name="uVision Simulator" vendor="Keil"/>
2834       <project>
2835         <environment name="uv" load="MsqQueue.uvprojx"/>
2836       </project>
2837       <attributes>
2838         <component Cclass="CMSIS" Cgroup="CORE"/>
2839         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2840         <component Cclass="Compiler" Cgroup="EventRecorder"/>
2841         <component Cclass="Device" Cgroup="Startup"/>
2842         <category>Getting Started</category>
2843       </attributes>
2844     </example>
2845
2846     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
2847       <description>CMSIS-RTOS2 Memory Pool Example</description>
2848       <board name="uVision Simulator" vendor="Keil"/>
2849       <project>
2850         <environment name="uv" load="MemPool.uvprojx"/>
2851       </project>
2852       <attributes>
2853         <component Cclass="CMSIS" Cgroup="CORE"/>
2854         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2855         <component Cclass="Compiler" Cgroup="EventRecorder"/>
2856         <component Cclass="Device" Cgroup="Startup"/>
2857         <category>Getting Started</category>
2858       </attributes>
2859     </example>
2860
2861     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2862       <description>Bare-metal secure/non-secure example without RTOS</description>
2863       <board name="uVision Simulator" vendor="Keil"/>
2864       <project>
2865         <environment name="uv" load="NoRTOS.uvmpw"/>
2866       </project>
2867       <attributes>
2868         <component Cclass="CMSIS" Cgroup="CORE"/>
2869         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2870         <component Cclass="Device" Cgroup="Startup"/>
2871         <category>Getting Started</category>
2872       </attributes>
2873     </example>
2874
2875     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2876       <description>Secure/non-secure RTOS example with thread context management</description>
2877       <board name="uVision Simulator" vendor="Keil"/>
2878       <project>
2879         <environment name="uv" load="RTOS.uvmpw"/>
2880       </project>
2881       <attributes>
2882         <component Cclass="CMSIS" Cgroup="CORE"/>
2883         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2884         <component Cclass="Device" Cgroup="Startup"/>
2885         <category>Getting Started</category>
2886       </attributes>
2887     </example>
2888
2889     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2890       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2891       <board name="uVision Simulator" vendor="Keil"/>
2892       <project>
2893         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2894       </project>
2895       <attributes>
2896         <component Cclass="CMSIS" Cgroup="CORE"/>
2897         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2898         <component Cclass="Device" Cgroup="Startup"/>
2899         <category>Getting Started</category>
2900       </attributes>
2901     </example>
2902
2903     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
2904       <description>CMSIS-RTOS2 Blinky example</description>
2905       <board name="EWARM Simulator" vendor="IAR"/>
2906       <project>
2907         <environment name="iar" load="Blinky/Blinky.ewp"/>
2908       </project>
2909       <attributes>
2910         <component Cclass="CMSIS" Cgroup="CORE"/>
2911         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2912         <component Cclass="Device" Cgroup="Startup"/>
2913         <category>Getting Started</category>
2914       </attributes>
2915     </example>
2916
2917     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
2918       <description>CMSIS-RTOS2 Message Queue Example</description>
2919       <board name="EWARM Simulator" vendor="IAR"/>
2920       <project>
2921         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
2922       </project>
2923       <attributes>
2924         <component Cclass="CMSIS" Cgroup="CORE"/>
2925         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2926         <component Cclass="Device" Cgroup="Startup"/>
2927         <category>Getting Started</category>
2928       </attributes>
2929     </example>
2930
2931   </examples>
2932
2933 </package>