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131 <div class="headertitle"><div class="title">Driver_NAND.h File Reference</div></div>
133 <div class="contents">
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135 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
136 Data Structures</h2></td></tr>
137 <tr class="memitem:structARM__NAND__ECC__INFO"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__interface__gr.html#structARM__NAND__ECC__INFO">ARM_NAND_ECC_INFO</a></td></tr>
138 <tr class="memdesc:structARM__NAND__ECC__INFO"><td class="mdescLeft"> </td><td class="mdescRight">NAND ECC (Error Correction Code) Information. <a href="group__nand__interface__gr.html#structARM__NAND__ECC__INFO">More...</a><br /></td></tr>
139 <tr class="separator:structARM__NAND__ECC__INFO"><td class="memSeparator" colspan="2"> </td></tr>
140 <tr class="memitem:structARM__NAND__STATUS"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__interface__gr.html#structARM__NAND__STATUS">ARM_NAND_STATUS</a></td></tr>
141 <tr class="memdesc:structARM__NAND__STATUS"><td class="mdescLeft"> </td><td class="mdescRight">NAND Status. <a href="group__nand__interface__gr.html#structARM__NAND__STATUS">More...</a><br /></td></tr>
142 <tr class="separator:structARM__NAND__STATUS"><td class="memSeparator" colspan="2"> </td></tr>
143 <tr class="memitem:structARM__NAND__CAPABILITIES"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__interface__gr.html#structARM__NAND__CAPABILITIES">ARM_NAND_CAPABILITIES</a></td></tr>
144 <tr class="memdesc:structARM__NAND__CAPABILITIES"><td class="mdescLeft"> </td><td class="mdescRight">NAND Driver Capabilities. <a href="group__nand__interface__gr.html#structARM__NAND__CAPABILITIES">More...</a><br /></td></tr>
145 <tr class="separator:structARM__NAND__CAPABILITIES"><td class="memSeparator" colspan="2"> </td></tr>
146 <tr class="memitem:structARM__DRIVER__NAND"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__interface__gr.html#structARM__DRIVER__NAND">ARM_DRIVER_NAND</a></td></tr>
147 <tr class="memdesc:structARM__DRIVER__NAND"><td class="mdescLeft"> </td><td class="mdescRight">Access structure of the NAND Driver. <a href="group__nand__interface__gr.html#structARM__DRIVER__NAND">More...</a><br /></td></tr>
148 <tr class="separator:structARM__DRIVER__NAND"><td class="memSeparator" colspan="2"> </td></tr>
149 </table><table class="memberdecls">
150 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
151 Macros</h2></td></tr>
152 <tr class="memitem:a121ff96c31275cef4bb7e86007665e1c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a121ff96c31275cef4bb7e86007665e1c">ARM_NAND_API_VERSION</a>   <a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,4) /* API version */</td></tr>
153 <tr class="separator:a121ff96c31275cef4bb7e86007665e1c"><td class="memSeparator" colspan="2"> </td></tr>
154 <tr class="memitem:a72c7c93880689c3ce6d799afe6a8dd87"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a72c7c93880689c3ce6d799afe6a8dd87">_ARM_Driver_NAND_</a>(n)   Driver_NAND##n</td></tr>
155 <tr class="separator:a72c7c93880689c3ce6d799afe6a8dd87"><td class="memSeparator" colspan="2"> </td></tr>
156 <tr class="memitem:aa0dd88065962a6e23fd82eb86fec27a7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aa0dd88065962a6e23fd82eb86fec27a7">ARM_Driver_NAND_</a>(n)   <a class="el" href="Driver__NAND_8h.html#a72c7c93880689c3ce6d799afe6a8dd87">_ARM_Driver_NAND_</a>(n)</td></tr>
157 <tr class="separator:aa0dd88065962a6e23fd82eb86fec27a7"><td class="memSeparator" colspan="2"> </td></tr>
158 <tr class="memitem:a848a27ec9ebf0a13a82a1d9760f39d90"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a848a27ec9ebf0a13a82a1d9760f39d90">ARM_NAND_POWER_VCC_Pos</a>   0</td></tr>
159 <tr class="separator:a848a27ec9ebf0a13a82a1d9760f39d90"><td class="memSeparator" colspan="2"> </td></tr>
160 <tr class="memitem:ad898ef5cd4ffe3b6b09d69e224aa0912"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ad898ef5cd4ffe3b6b09d69e224aa0912">ARM_NAND_POWER_VCC_Msk</a>   (0x07UL << <a class="el" href="Driver__NAND_8h.html#a848a27ec9ebf0a13a82a1d9760f39d90">ARM_NAND_POWER_VCC_Pos</a>)</td></tr>
161 <tr class="separator:ad898ef5cd4ffe3b6b09d69e224aa0912"><td class="memSeparator" colspan="2"> </td></tr>
162 <tr class="memitem:a323c320a6195b78c2c79f5c6e85f02e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a323c320a6195b78c2c79f5c6e85f02e1">ARM_NAND_POWER_VCC_OFF</a>   (0x01UL << <a class="el" href="Driver__NAND_8h.html#a848a27ec9ebf0a13a82a1d9760f39d90">ARM_NAND_POWER_VCC_Pos</a>)</td></tr>
163 <tr class="memdesc:a323c320a6195b78c2c79f5c6e85f02e1"><td class="mdescLeft"> </td><td class="mdescRight">VCC Power off. <br /></td></tr>
164 <tr class="separator:a323c320a6195b78c2c79f5c6e85f02e1"><td class="memSeparator" colspan="2"> </td></tr>
165 <tr class="memitem:ad15355d67bc239ff49cceac69c2024b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ad15355d67bc239ff49cceac69c2024b3">ARM_NAND_POWER_VCC_3V3</a>   (0x02UL << <a class="el" href="Driver__NAND_8h.html#a848a27ec9ebf0a13a82a1d9760f39d90">ARM_NAND_POWER_VCC_Pos</a>)</td></tr>
166 <tr class="memdesc:ad15355d67bc239ff49cceac69c2024b3"><td class="mdescLeft"> </td><td class="mdescRight">VCC = 3.3V. <br /></td></tr>
167 <tr class="separator:ad15355d67bc239ff49cceac69c2024b3"><td class="memSeparator" colspan="2"> </td></tr>
168 <tr class="memitem:aa7b9d5a71125b745caba5c1d7aff6385"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aa7b9d5a71125b745caba5c1d7aff6385">ARM_NAND_POWER_VCC_1V8</a>   (0x03UL << <a class="el" href="Driver__NAND_8h.html#a848a27ec9ebf0a13a82a1d9760f39d90">ARM_NAND_POWER_VCC_Pos</a>)</td></tr>
169 <tr class="memdesc:aa7b9d5a71125b745caba5c1d7aff6385"><td class="mdescLeft"> </td><td class="mdescRight">VCC = 1.8V. <br /></td></tr>
170 <tr class="separator:aa7b9d5a71125b745caba5c1d7aff6385"><td class="memSeparator" colspan="2"> </td></tr>
171 <tr class="memitem:ac38023b94cd8a68295d48a1019a386e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ac38023b94cd8a68295d48a1019a386e0">ARM_NAND_POWER_VCCQ_Pos</a>   3</td></tr>
172 <tr class="separator:ac38023b94cd8a68295d48a1019a386e0"><td class="memSeparator" colspan="2"> </td></tr>
173 <tr class="memitem:a7a453227301d7c08d09b22dc8afafbe7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a7a453227301d7c08d09b22dc8afafbe7">ARM_NAND_POWER_VCCQ_Msk</a>   (0x07UL << <a class="el" href="Driver__NAND_8h.html#ac38023b94cd8a68295d48a1019a386e0">ARM_NAND_POWER_VCCQ_Pos</a>)</td></tr>
174 <tr class="separator:a7a453227301d7c08d09b22dc8afafbe7"><td class="memSeparator" colspan="2"> </td></tr>
175 <tr class="memitem:aca7679e8269ee986559f4218816937c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aca7679e8269ee986559f4218816937c3">ARM_NAND_POWER_VCCQ_OFF</a>   (0x01UL << <a class="el" href="Driver__NAND_8h.html#ac38023b94cd8a68295d48a1019a386e0">ARM_NAND_POWER_VCCQ_Pos</a>)</td></tr>
176 <tr class="memdesc:aca7679e8269ee986559f4218816937c3"><td class="mdescLeft"> </td><td class="mdescRight">VCCQ I/O Power off. <br /></td></tr>
177 <tr class="separator:aca7679e8269ee986559f4218816937c3"><td class="memSeparator" colspan="2"> </td></tr>
178 <tr class="memitem:a6d5a8a33a0fdaaff2e57e1ac53c984c2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a6d5a8a33a0fdaaff2e57e1ac53c984c2">ARM_NAND_POWER_VCCQ_3V3</a>   (0x02UL << <a class="el" href="Driver__NAND_8h.html#ac38023b94cd8a68295d48a1019a386e0">ARM_NAND_POWER_VCCQ_Pos</a>)</td></tr>
179 <tr class="memdesc:a6d5a8a33a0fdaaff2e57e1ac53c984c2"><td class="mdescLeft"> </td><td class="mdescRight">VCCQ = 3.3V. <br /></td></tr>
180 <tr class="separator:a6d5a8a33a0fdaaff2e57e1ac53c984c2"><td class="memSeparator" colspan="2"> </td></tr>
181 <tr class="memitem:a653d9b4d7bee173beb49d8fec0469476"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a653d9b4d7bee173beb49d8fec0469476">ARM_NAND_POWER_VCCQ_1V8</a>   (0x03UL << <a class="el" href="Driver__NAND_8h.html#ac38023b94cd8a68295d48a1019a386e0">ARM_NAND_POWER_VCCQ_Pos</a>)</td></tr>
182 <tr class="memdesc:a653d9b4d7bee173beb49d8fec0469476"><td class="mdescLeft"> </td><td class="mdescRight">VCCQ = 1.8V. <br /></td></tr>
183 <tr class="separator:a653d9b4d7bee173beb49d8fec0469476"><td class="memSeparator" colspan="2"> </td></tr>
184 <tr class="memitem:ae2d278901881ffc73d3e0b48717b22f0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ae2d278901881ffc73d3e0b48717b22f0">ARM_NAND_POWER_VPP_OFF</a>   (1UL << 6)</td></tr>
185 <tr class="memdesc:ae2d278901881ffc73d3e0b48717b22f0"><td class="mdescLeft"> </td><td class="mdescRight">VPP off. <br /></td></tr>
186 <tr class="separator:ae2d278901881ffc73d3e0b48717b22f0"><td class="memSeparator" colspan="2"> </td></tr>
187 <tr class="memitem:aeb0d50e30bbcd8ab59c3b78db634aad5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aeb0d50e30bbcd8ab59c3b78db634aad5">ARM_NAND_POWER_VPP_ON</a>   (1UL << 7)</td></tr>
188 <tr class="memdesc:aeb0d50e30bbcd8ab59c3b78db634aad5"><td class="mdescLeft"> </td><td class="mdescRight">VPP on. <br /></td></tr>
189 <tr class="separator:aeb0d50e30bbcd8ab59c3b78db634aad5"><td class="memSeparator" colspan="2"> </td></tr>
190 <tr class="memitem:a9b063c3078e86b50d4aa892518b2e2d8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a9b063c3078e86b50d4aa892518b2e2d8">ARM_NAND_BUS_MODE</a>   (0x01UL)</td></tr>
191 <tr class="memdesc:a9b063c3078e86b50d4aa892518b2e2d8"><td class="mdescLeft"> </td><td class="mdescRight">Set Bus Mode as specified with arg. <br /></td></tr>
192 <tr class="separator:a9b063c3078e86b50d4aa892518b2e2d8"><td class="memSeparator" colspan="2"> </td></tr>
193 <tr class="memitem:a2d3356f5b47871c465ae7136a2c533f4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a2d3356f5b47871c465ae7136a2c533f4">ARM_NAND_BUS_DATA_WIDTH</a>   (0x02UL)</td></tr>
194 <tr class="memdesc:a2d3356f5b47871c465ae7136a2c533f4"><td class="mdescLeft"> </td><td class="mdescRight">Set Bus Data Width as specified with arg. <br /></td></tr>
195 <tr class="separator:a2d3356f5b47871c465ae7136a2c533f4"><td class="memSeparator" colspan="2"> </td></tr>
196 <tr class="memitem:a5d1d46198404fe115b013bdae7af2a2f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a5d1d46198404fe115b013bdae7af2a2f">ARM_NAND_DRIVER_STRENGTH</a>   (0x03UL)</td></tr>
197 <tr class="memdesc:a5d1d46198404fe115b013bdae7af2a2f"><td class="mdescLeft"> </td><td class="mdescRight">Set Driver Strength as specified with arg. <br /></td></tr>
198 <tr class="separator:a5d1d46198404fe115b013bdae7af2a2f"><td class="memSeparator" colspan="2"> </td></tr>
199 <tr class="memitem:a1bffc9f341e704ee0e845d86a2989921"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a1bffc9f341e704ee0e845d86a2989921">ARM_NAND_DEVICE_READY_EVENT</a>   (0x04UL)</td></tr>
200 <tr class="memdesc:a1bffc9f341e704ee0e845d86a2989921"><td class="mdescLeft"> </td><td class="mdescRight">Generate <a class="el" href="group__NAND__events.html#gae0be7e1b41188def905de0a1568d442d">ARM_NAND_EVENT_DEVICE_READY</a>; arg: 0=disabled (default), 1=enabled. <br /></td></tr>
201 <tr class="separator:a1bffc9f341e704ee0e845d86a2989921"><td class="memSeparator" colspan="2"> </td></tr>
202 <tr class="memitem:aab6dea1b565aeb53e360876a4e50783c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aab6dea1b565aeb53e360876a4e50783c">ARM_NAND_DRIVER_READY_EVENT</a>   (0x05UL)</td></tr>
203 <tr class="memdesc:aab6dea1b565aeb53e360876a4e50783c"><td class="mdescLeft"> </td><td class="mdescRight">Generate <a class="el" href="group__NAND__events.html#ga7b390a906db42c5ea4db38e0e85bb9e9">ARM_NAND_EVENT_DRIVER_READY</a>; arg: 0=disabled (default), 1=enabled. <br /></td></tr>
204 <tr class="separator:aab6dea1b565aeb53e360876a4e50783c"><td class="memSeparator" colspan="2"> </td></tr>
205 <tr class="memitem:a372fc9b9cc1315046ceaffd6fd99e12c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a372fc9b9cc1315046ceaffd6fd99e12c">ARM_NAND_BUS_INTERFACE_Pos</a>   4</td></tr>
206 <tr class="separator:a372fc9b9cc1315046ceaffd6fd99e12c"><td class="memSeparator" colspan="2"> </td></tr>
207 <tr class="memitem:aea213eb1ba9c67beb6216a630d81b91f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aea213eb1ba9c67beb6216a630d81b91f">ARM_NAND_BUS_INTERFACE_Msk</a>   (0x03UL << <a class="el" href="Driver__NAND_8h.html#a372fc9b9cc1315046ceaffd6fd99e12c">ARM_NAND_BUS_INTERFACE_Pos</a>)</td></tr>
208 <tr class="separator:aea213eb1ba9c67beb6216a630d81b91f"><td class="memSeparator" colspan="2"> </td></tr>
209 <tr class="memitem:gac7743aeb6411b97f9fc6a24b556f4963"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gac7743aeb6411b97f9fc6a24b556f4963">ARM_NAND_BUS_SDR</a>   (0x00UL << <a class="el" href="Driver__NAND_8h.html#a372fc9b9cc1315046ceaffd6fd99e12c">ARM_NAND_BUS_INTERFACE_Pos</a>)</td></tr>
210 <tr class="memdesc:gac7743aeb6411b97f9fc6a24b556f4963"><td class="mdescLeft"> </td><td class="mdescRight">Data Interface: SDR (Single Data Rate) - Traditional interface (default) <br /></td></tr>
211 <tr class="separator:gac7743aeb6411b97f9fc6a24b556f4963"><td class="memSeparator" colspan="2"> </td></tr>
212 <tr class="memitem:ga82b8261b3d0d85881535adada318a7df"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga82b8261b3d0d85881535adada318a7df">ARM_NAND_BUS_DDR</a>   (0x01UL << <a class="el" href="Driver__NAND_8h.html#a372fc9b9cc1315046ceaffd6fd99e12c">ARM_NAND_BUS_INTERFACE_Pos</a>)</td></tr>
213 <tr class="memdesc:ga82b8261b3d0d85881535adada318a7df"><td class="mdescLeft"> </td><td class="mdescRight">Data Interface: NV-DDR (Double Data Rate) <br /></td></tr>
214 <tr class="separator:ga82b8261b3d0d85881535adada318a7df"><td class="memSeparator" colspan="2"> </td></tr>
215 <tr class="memitem:ga13c102201d6021db184a2f068656c518"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga13c102201d6021db184a2f068656c518">ARM_NAND_BUS_DDR2</a>   (0x02UL << <a class="el" href="Driver__NAND_8h.html#a372fc9b9cc1315046ceaffd6fd99e12c">ARM_NAND_BUS_INTERFACE_Pos</a>)</td></tr>
216 <tr class="memdesc:ga13c102201d6021db184a2f068656c518"><td class="mdescLeft"> </td><td class="mdescRight">Data Interface: NV-DDR2 (Double Data Rate) <br /></td></tr>
217 <tr class="separator:ga13c102201d6021db184a2f068656c518"><td class="memSeparator" colspan="2"> </td></tr>
218 <tr class="memitem:acc98e42d23656734c7f9a8a5421842d6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>   0</td></tr>
219 <tr class="separator:acc98e42d23656734c7f9a8a5421842d6"><td class="memSeparator" colspan="2"> </td></tr>
220 <tr class="memitem:a57f6c319265b00878661656103abe660"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a57f6c319265b00878661656103abe660">ARM_NAND_BUS_TIMING_MODE_Msk</a>   (0x0FUL << <a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>)</td></tr>
221 <tr class="separator:a57f6c319265b00878661656103abe660"><td class="memSeparator" colspan="2"> </td></tr>
222 <tr class="memitem:ga971e574ac412bbba445055e9afc384ba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga971e574ac412bbba445055e9afc384ba">ARM_NAND_BUS_TIMING_MODE_0</a>   (0x00UL << <a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>)</td></tr>
223 <tr class="memdesc:ga971e574ac412bbba445055e9afc384ba"><td class="mdescLeft"> </td><td class="mdescRight">Timing Mode 0 (default) <br /></td></tr>
224 <tr class="separator:ga971e574ac412bbba445055e9afc384ba"><td class="memSeparator" colspan="2"> </td></tr>
225 <tr class="memitem:ga475a339e929eca46e11bc8a7b330aa45"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga475a339e929eca46e11bc8a7b330aa45">ARM_NAND_BUS_TIMING_MODE_1</a>   (0x01UL << <a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>)</td></tr>
226 <tr class="memdesc:ga475a339e929eca46e11bc8a7b330aa45"><td class="mdescLeft"> </td><td class="mdescRight">Timing Mode 1. <br /></td></tr>
227 <tr class="separator:ga475a339e929eca46e11bc8a7b330aa45"><td class="memSeparator" colspan="2"> </td></tr>
228 <tr class="memitem:gaed6154fb03b5516faf0bfd11d7a46309"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gaed6154fb03b5516faf0bfd11d7a46309">ARM_NAND_BUS_TIMING_MODE_2</a>   (0x02UL << <a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>)</td></tr>
229 <tr class="memdesc:gaed6154fb03b5516faf0bfd11d7a46309"><td class="mdescLeft"> </td><td class="mdescRight">Timing Mode 2. <br /></td></tr>
230 <tr class="separator:gaed6154fb03b5516faf0bfd11d7a46309"><td class="memSeparator" colspan="2"> </td></tr>
231 <tr class="memitem:gacbc4e07e1af6ef0e4c656428e81464a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gacbc4e07e1af6ef0e4c656428e81464a9">ARM_NAND_BUS_TIMING_MODE_3</a>   (0x03UL << <a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>)</td></tr>
232 <tr class="memdesc:gacbc4e07e1af6ef0e4c656428e81464a9"><td class="mdescLeft"> </td><td class="mdescRight">Timing Mode 3. <br /></td></tr>
233 <tr class="separator:gacbc4e07e1af6ef0e4c656428e81464a9"><td class="memSeparator" colspan="2"> </td></tr>
234 <tr class="memitem:ga709d51a5215cd23ce2d85aec57141456"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga709d51a5215cd23ce2d85aec57141456">ARM_NAND_BUS_TIMING_MODE_4</a>   (0x04UL << <a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>)</td></tr>
235 <tr class="memdesc:ga709d51a5215cd23ce2d85aec57141456"><td class="mdescLeft"> </td><td class="mdescRight">Timing Mode 4 (SDR EDO capable) <br /></td></tr>
236 <tr class="separator:ga709d51a5215cd23ce2d85aec57141456"><td class="memSeparator" colspan="2"> </td></tr>
237 <tr class="memitem:gaee3cad14ce2b8b9af69149bf74597791"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gaee3cad14ce2b8b9af69149bf74597791">ARM_NAND_BUS_TIMING_MODE_5</a>   (0x05UL << <a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>)</td></tr>
238 <tr class="memdesc:gaee3cad14ce2b8b9af69149bf74597791"><td class="mdescLeft"> </td><td class="mdescRight">Timing Mode 5 (SDR EDO capable) <br /></td></tr>
239 <tr class="separator:gaee3cad14ce2b8b9af69149bf74597791"><td class="memSeparator" colspan="2"> </td></tr>
240 <tr class="memitem:ga4a3524e0eba994b3a66e06cde877f0f6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga4a3524e0eba994b3a66e06cde877f0f6">ARM_NAND_BUS_TIMING_MODE_6</a>   (0x06UL << <a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>)</td></tr>
241 <tr class="memdesc:ga4a3524e0eba994b3a66e06cde877f0f6"><td class="mdescLeft"> </td><td class="mdescRight">Timing Mode 6 (NV-DDR2 only) <br /></td></tr>
242 <tr class="separator:ga4a3524e0eba994b3a66e06cde877f0f6"><td class="memSeparator" colspan="2"> </td></tr>
243 <tr class="memitem:gaa63d75f5f2b48a7345a066d58de1bd23"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gaa63d75f5f2b48a7345a066d58de1bd23">ARM_NAND_BUS_TIMING_MODE_7</a>   (0x07UL << <a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>)</td></tr>
244 <tr class="memdesc:gaa63d75f5f2b48a7345a066d58de1bd23"><td class="mdescLeft"> </td><td class="mdescRight">Timing Mode 7 (NV-DDR2 only) <br /></td></tr>
245 <tr class="separator:gaa63d75f5f2b48a7345a066d58de1bd23"><td class="memSeparator" colspan="2"> </td></tr>
246 <tr class="memitem:a57b282c0818c87b79ea4f11d03cc4f3c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a57b282c0818c87b79ea4f11d03cc4f3c">ARM_NAND_BUS_DDR2_DO_WCYC_Pos</a>   8</td></tr>
247 <tr class="separator:a57b282c0818c87b79ea4f11d03cc4f3c"><td class="memSeparator" colspan="2"> </td></tr>
248 <tr class="memitem:ad30dfdbdc50a7ff72a5bb173c5f549dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ad30dfdbdc50a7ff72a5bb173c5f549dc">ARM_NAND_BUS_DDR2_DO_WCYC_Msk</a>   (0x0FUL << <a class="el" href="Driver__NAND_8h.html#a57b282c0818c87b79ea4f11d03cc4f3c">ARM_NAND_BUS_DDR2_DO_WCYC_Pos</a>)</td></tr>
249 <tr class="separator:ad30dfdbdc50a7ff72a5bb173c5f549dc"><td class="memSeparator" colspan="2"> </td></tr>
250 <tr class="memitem:ga77348df5f5c2c96bcaeec60b6da02c1b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga77348df5f5c2c96bcaeec60b6da02c1b">ARM_NAND_BUS_DDR2_DO_WCYC_0</a>   (0x00UL << <a class="el" href="Driver__NAND_8h.html#a57b282c0818c87b79ea4f11d03cc4f3c">ARM_NAND_BUS_DDR2_DO_WCYC_Pos</a>)</td></tr>
251 <tr class="memdesc:ga77348df5f5c2c96bcaeec60b6da02c1b"><td class="mdescLeft"> </td><td class="mdescRight">DDR2 Data Output Warm-up cycles: 0 (default) <br /></td></tr>
252 <tr class="separator:ga77348df5f5c2c96bcaeec60b6da02c1b"><td class="memSeparator" colspan="2"> </td></tr>
253 <tr class="memitem:ga5839be0b4b2eb930ec039a3403b5e89e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga5839be0b4b2eb930ec039a3403b5e89e">ARM_NAND_BUS_DDR2_DO_WCYC_1</a>   (0x01UL << <a class="el" href="Driver__NAND_8h.html#a57b282c0818c87b79ea4f11d03cc4f3c">ARM_NAND_BUS_DDR2_DO_WCYC_Pos</a>)</td></tr>
254 <tr class="memdesc:ga5839be0b4b2eb930ec039a3403b5e89e"><td class="mdescLeft"> </td><td class="mdescRight">DDR2 Data Output Warm-up cycles: 1. <br /></td></tr>
255 <tr class="separator:ga5839be0b4b2eb930ec039a3403b5e89e"><td class="memSeparator" colspan="2"> </td></tr>
256 <tr class="memitem:ga10a1ef3be69bfa7e6cc657bee751a077"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga10a1ef3be69bfa7e6cc657bee751a077">ARM_NAND_BUS_DDR2_DO_WCYC_2</a>   (0x02UL << <a class="el" href="Driver__NAND_8h.html#a57b282c0818c87b79ea4f11d03cc4f3c">ARM_NAND_BUS_DDR2_DO_WCYC_Pos</a>)</td></tr>
257 <tr class="memdesc:ga10a1ef3be69bfa7e6cc657bee751a077"><td class="mdescLeft"> </td><td class="mdescRight">DDR2 Data Output Warm-up cycles: 2. <br /></td></tr>
258 <tr class="separator:ga10a1ef3be69bfa7e6cc657bee751a077"><td class="memSeparator" colspan="2"> </td></tr>
259 <tr class="memitem:ga7f9e8416c4a4e20c4a04323e39f2100d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga7f9e8416c4a4e20c4a04323e39f2100d">ARM_NAND_BUS_DDR2_DO_WCYC_4</a>   (0x03UL << <a class="el" href="Driver__NAND_8h.html#a57b282c0818c87b79ea4f11d03cc4f3c">ARM_NAND_BUS_DDR2_DO_WCYC_Pos</a>)</td></tr>
260 <tr class="memdesc:ga7f9e8416c4a4e20c4a04323e39f2100d"><td class="mdescLeft"> </td><td class="mdescRight">DDR2 Data Output Warm-up cycles: 4. <br /></td></tr>
261 <tr class="separator:ga7f9e8416c4a4e20c4a04323e39f2100d"><td class="memSeparator" colspan="2"> </td></tr>
262 <tr class="memitem:aa80b898cdf665aa14ff0e181e4ff31f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aa80b898cdf665aa14ff0e181e4ff31f1">ARM_NAND_BUS_DDR2_DI_WCYC_Pos</a>   12</td></tr>
263 <tr class="separator:aa80b898cdf665aa14ff0e181e4ff31f1"><td class="memSeparator" colspan="2"> </td></tr>
264 <tr class="memitem:ad9ab38101de68a1bc186f5687f63f7c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ad9ab38101de68a1bc186f5687f63f7c3">ARM_NAND_BUS_DDR2_DI_WCYC_Msk</a>   (0x0FUL << <a class="el" href="Driver__NAND_8h.html#aa80b898cdf665aa14ff0e181e4ff31f1">ARM_NAND_BUS_DDR2_DI_WCYC_Pos</a>)</td></tr>
265 <tr class="separator:ad9ab38101de68a1bc186f5687f63f7c3"><td class="memSeparator" colspan="2"> </td></tr>
266 <tr class="memitem:gaeee1853dea5e96cb19d2596cc0e70169"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gaeee1853dea5e96cb19d2596cc0e70169">ARM_NAND_BUS_DDR2_DI_WCYC_0</a>   (0x00UL << <a class="el" href="Driver__NAND_8h.html#aa80b898cdf665aa14ff0e181e4ff31f1">ARM_NAND_BUS_DDR2_DI_WCYC_Pos</a>)</td></tr>
267 <tr class="memdesc:gaeee1853dea5e96cb19d2596cc0e70169"><td class="mdescLeft"> </td><td class="mdescRight">DDR2 Data Input Warm-up cycles: 0 (default) <br /></td></tr>
268 <tr class="separator:gaeee1853dea5e96cb19d2596cc0e70169"><td class="memSeparator" colspan="2"> </td></tr>
269 <tr class="memitem:ga42560a1f046e20cc4956276156c4ce25"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga42560a1f046e20cc4956276156c4ce25">ARM_NAND_BUS_DDR2_DI_WCYC_1</a>   (0x01UL << <a class="el" href="Driver__NAND_8h.html#aa80b898cdf665aa14ff0e181e4ff31f1">ARM_NAND_BUS_DDR2_DI_WCYC_Pos</a>)</td></tr>
270 <tr class="memdesc:ga42560a1f046e20cc4956276156c4ce25"><td class="mdescLeft"> </td><td class="mdescRight">DDR2 Data Input Warm-up cycles: 1. <br /></td></tr>
271 <tr class="separator:ga42560a1f046e20cc4956276156c4ce25"><td class="memSeparator" colspan="2"> </td></tr>
272 <tr class="memitem:gaad2e7807292d84a5070143626f5c2756"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gaad2e7807292d84a5070143626f5c2756">ARM_NAND_BUS_DDR2_DI_WCYC_2</a>   (0x02UL << <a class="el" href="Driver__NAND_8h.html#aa80b898cdf665aa14ff0e181e4ff31f1">ARM_NAND_BUS_DDR2_DI_WCYC_Pos</a>)</td></tr>
273 <tr class="memdesc:gaad2e7807292d84a5070143626f5c2756"><td class="mdescLeft"> </td><td class="mdescRight">DDR2 Data Input Warm-up cycles: 2. <br /></td></tr>
274 <tr class="separator:gaad2e7807292d84a5070143626f5c2756"><td class="memSeparator" colspan="2"> </td></tr>
275 <tr class="memitem:ga3ebb54a1ae971cd34f3c8fc9ff3ab6d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga3ebb54a1ae971cd34f3c8fc9ff3ab6d5">ARM_NAND_BUS_DDR2_DI_WCYC_4</a>   (0x03UL << <a class="el" href="Driver__NAND_8h.html#aa80b898cdf665aa14ff0e181e4ff31f1">ARM_NAND_BUS_DDR2_DI_WCYC_Pos</a>)</td></tr>
276 <tr class="memdesc:ga3ebb54a1ae971cd34f3c8fc9ff3ab6d5"><td class="mdescLeft"> </td><td class="mdescRight">DDR2 Data Input Warm-up cycles: 4. <br /></td></tr>
277 <tr class="separator:ga3ebb54a1ae971cd34f3c8fc9ff3ab6d5"><td class="memSeparator" colspan="2"> </td></tr>
278 <tr class="memitem:ga465ae06a6e097959620346304182e273"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga465ae06a6e097959620346304182e273">ARM_NAND_BUS_DDR2_VEN</a>   (1UL << 16)</td></tr>
279 <tr class="memdesc:ga465ae06a6e097959620346304182e273"><td class="mdescLeft"> </td><td class="mdescRight">DDR2 Enable external VREFQ as reference. <br /></td></tr>
280 <tr class="separator:ga465ae06a6e097959620346304182e273"><td class="memSeparator" colspan="2"> </td></tr>
281 <tr class="memitem:gad38354e4a34adbf881afc7f89ff06e89"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gad38354e4a34adbf881afc7f89ff06e89">ARM_NAND_BUS_DDR2_CMPD</a>   (1UL << 17)</td></tr>
282 <tr class="memdesc:gad38354e4a34adbf881afc7f89ff06e89"><td class="mdescLeft"> </td><td class="mdescRight">DDR2 Enable complementary DQS (DQS_c) signal. <br /></td></tr>
283 <tr class="separator:gad38354e4a34adbf881afc7f89ff06e89"><td class="memSeparator" colspan="2"> </td></tr>
284 <tr class="memitem:ga8a2d599082b9fe56cee1c6454bb3c6a1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga8a2d599082b9fe56cee1c6454bb3c6a1">ARM_NAND_BUS_DDR2_CMPR</a>   (1UL << 18)</td></tr>
285 <tr class="memdesc:ga8a2d599082b9fe56cee1c6454bb3c6a1"><td class="mdescLeft"> </td><td class="mdescRight">DDR2 Enable complementary RE_n (RE_c) signal. <br /></td></tr>
286 <tr class="separator:ga8a2d599082b9fe56cee1c6454bb3c6a1"><td class="memSeparator" colspan="2"> </td></tr>
287 <tr class="memitem:ga578051cc193ae0b7125aec8007071d21"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__data__bus__width__codes.html#ga578051cc193ae0b7125aec8007071d21">ARM_NAND_BUS_DATA_WIDTH_8</a>   (0x00UL)</td></tr>
288 <tr class="memdesc:ga578051cc193ae0b7125aec8007071d21"><td class="mdescLeft"> </td><td class="mdescRight">Bus Data Width: 8 bit (default) <br /></td></tr>
289 <tr class="separator:ga578051cc193ae0b7125aec8007071d21"><td class="memSeparator" colspan="2"> </td></tr>
290 <tr class="memitem:ga49e0e3a946a4d9f26dbd5b32ccc3b2f3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__data__bus__width__codes.html#ga49e0e3a946a4d9f26dbd5b32ccc3b2f3">ARM_NAND_BUS_DATA_WIDTH_16</a>   (0x01UL)</td></tr>
291 <tr class="memdesc:ga49e0e3a946a4d9f26dbd5b32ccc3b2f3"><td class="mdescLeft"> </td><td class="mdescRight">Bus Data Width: 16 bit. <br /></td></tr>
292 <tr class="separator:ga49e0e3a946a4d9f26dbd5b32ccc3b2f3"><td class="memSeparator" colspan="2"> </td></tr>
293 <tr class="memitem:ga942e20df12022f3bbd0e9a558ec1c7a0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__strength__codes.html#ga942e20df12022f3bbd0e9a558ec1c7a0">ARM_NAND_DRIVER_STRENGTH_18</a>   (0x00UL)</td></tr>
294 <tr class="memdesc:ga942e20df12022f3bbd0e9a558ec1c7a0"><td class="mdescLeft"> </td><td class="mdescRight">Driver Strength 2.0x = 18 Ohms. <br /></td></tr>
295 <tr class="separator:ga942e20df12022f3bbd0e9a558ec1c7a0"><td class="memSeparator" colspan="2"> </td></tr>
296 <tr class="memitem:ga17188e039f5f87c581033327399a057d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__strength__codes.html#ga17188e039f5f87c581033327399a057d">ARM_NAND_DRIVER_STRENGTH_25</a>   (0x01UL)</td></tr>
297 <tr class="memdesc:ga17188e039f5f87c581033327399a057d"><td class="mdescLeft"> </td><td class="mdescRight">Driver Strength 1.4x = 25 Ohms. <br /></td></tr>
298 <tr class="separator:ga17188e039f5f87c581033327399a057d"><td class="memSeparator" colspan="2"> </td></tr>
299 <tr class="memitem:ga33562a66a5bf328eea82b2f1893a7874"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__strength__codes.html#ga33562a66a5bf328eea82b2f1893a7874">ARM_NAND_DRIVER_STRENGTH_35</a>   (0x02UL)</td></tr>
300 <tr class="memdesc:ga33562a66a5bf328eea82b2f1893a7874"><td class="mdescLeft"> </td><td class="mdescRight">Driver Strength 1.0x = 35 Ohms (default) <br /></td></tr>
301 <tr class="separator:ga33562a66a5bf328eea82b2f1893a7874"><td class="memSeparator" colspan="2"> </td></tr>
302 <tr class="memitem:gaa502e2c995447037d266f939faa43223"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__strength__codes.html#gaa502e2c995447037d266f939faa43223">ARM_NAND_DRIVER_STRENGTH_50</a>   (0x03UL)</td></tr>
303 <tr class="memdesc:gaa502e2c995447037d266f939faa43223"><td class="mdescLeft"> </td><td class="mdescRight">Driver Strength 0.7x = 50 Ohms. <br /></td></tr>
304 <tr class="separator:gaa502e2c995447037d266f939faa43223"><td class="memSeparator" colspan="2"> </td></tr>
305 <tr class="memitem:a7944be4f63c439d5d64053ad9476407b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a7944be4f63c439d5d64053ad9476407b">ARM_NAND_ECC_INDEX_Pos</a>   0</td></tr>
306 <tr class="separator:a7944be4f63c439d5d64053ad9476407b"><td class="memSeparator" colspan="2"> </td></tr>
307 <tr class="memitem:a656537439264ab495c86e4c36051a3c1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a656537439264ab495c86e4c36051a3c1">ARM_NAND_ECC_INDEX_Msk</a>   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#a7944be4f63c439d5d64053ad9476407b">ARM_NAND_ECC_INDEX_Pos</a>)</td></tr>
308 <tr class="separator:a656537439264ab495c86e4c36051a3c1"><td class="memSeparator" colspan="2"> </td></tr>
309 <tr class="memitem:gac2eb4475f12a443209165d29fe200030"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__ecc__codes.html#gac2eb4475f12a443209165d29fe200030">ARM_NAND_ECC</a>(n)   ((n) & <a class="el" href="Driver__NAND_8h.html#a656537439264ab495c86e4c36051a3c1">ARM_NAND_ECC_INDEX_Msk</a>)</td></tr>
310 <tr class="memdesc:gac2eb4475f12a443209165d29fe200030"><td class="mdescLeft"> </td><td class="mdescRight">Select ECC. <br /></td></tr>
311 <tr class="separator:gac2eb4475f12a443209165d29fe200030"><td class="memSeparator" colspan="2"> </td></tr>
312 <tr class="memitem:ga15c79a12200c16f953936635f930df1d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__ecc__codes.html#ga15c79a12200c16f953936635f930df1d">ARM_NAND_ECC0</a>   (1UL << 8)</td></tr>
313 <tr class="memdesc:ga15c79a12200c16f953936635f930df1d"><td class="mdescLeft"> </td><td class="mdescRight">Use ECC0 of selected ECC. <br /></td></tr>
314 <tr class="separator:ga15c79a12200c16f953936635f930df1d"><td class="memSeparator" colspan="2"> </td></tr>
315 <tr class="memitem:gaee653288a88318ee33d1db81baa69bbc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__ecc__codes.html#gaee653288a88318ee33d1db81baa69bbc">ARM_NAND_ECC1</a>   (1UL << 9)</td></tr>
316 <tr class="memdesc:gaee653288a88318ee33d1db81baa69bbc"><td class="mdescLeft"> </td><td class="mdescRight">Use ECC1 of selected ECC. <br /></td></tr>
317 <tr class="separator:gaee653288a88318ee33d1db81baa69bbc"><td class="memSeparator" colspan="2"> </td></tr>
318 <tr class="memitem:af40631ba62411e0ac06c3a945d608581"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#af40631ba62411e0ac06c3a945d608581">ARM_NAND_DRIVER_DONE_EVENT</a>   (1UL << 16)</td></tr>
319 <tr class="memdesc:af40631ba62411e0ac06c3a945d608581"><td class="mdescLeft"> </td><td class="mdescRight">Generate <a class="el" href="group__NAND__events.html#gac774a334871789d24107b843d1ebd00c">ARM_NAND_EVENT_DRIVER_DONE</a>. <br /></td></tr>
320 <tr class="separator:af40631ba62411e0ac06c3a945d608581"><td class="memSeparator" colspan="2"> </td></tr>
321 <tr class="memitem:gaef90c96cd4f2309044d7d438c6b0930a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#gaef90c96cd4f2309044d7d438c6b0930a">ARM_NAND_CODE_SEND_CMD1</a>   (1UL << 17)</td></tr>
322 <tr class="memdesc:gaef90c96cd4f2309044d7d438c6b0930a"><td class="mdescLeft"> </td><td class="mdescRight">Send Command 1. <br /></td></tr>
323 <tr class="separator:gaef90c96cd4f2309044d7d438c6b0930a"><td class="memSeparator" colspan="2"> </td></tr>
324 <tr class="memitem:ga891bcba60ebb1195ec80c00c9bec748a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga891bcba60ebb1195ec80c00c9bec748a">ARM_NAND_CODE_SEND_ADDR_COL1</a>   (1UL << 18)</td></tr>
325 <tr class="memdesc:ga891bcba60ebb1195ec80c00c9bec748a"><td class="mdescLeft"> </td><td class="mdescRight">Send Column Address 1. <br /></td></tr>
326 <tr class="separator:ga891bcba60ebb1195ec80c00c9bec748a"><td class="memSeparator" colspan="2"> </td></tr>
327 <tr class="memitem:ga62a3f6ddcfb9ee317655bbec9e09bc10"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga62a3f6ddcfb9ee317655bbec9e09bc10">ARM_NAND_CODE_SEND_ADDR_COL2</a>   (1UL << 19)</td></tr>
328 <tr class="memdesc:ga62a3f6ddcfb9ee317655bbec9e09bc10"><td class="mdescLeft"> </td><td class="mdescRight">Send Column Address 2. <br /></td></tr>
329 <tr class="separator:ga62a3f6ddcfb9ee317655bbec9e09bc10"><td class="memSeparator" colspan="2"> </td></tr>
330 <tr class="memitem:gadc001e69d1e81dc28a542237c6fe11ff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#gadc001e69d1e81dc28a542237c6fe11ff">ARM_NAND_CODE_SEND_ADDR_ROW1</a>   (1UL << 20)</td></tr>
331 <tr class="memdesc:gadc001e69d1e81dc28a542237c6fe11ff"><td class="mdescLeft"> </td><td class="mdescRight">Send Row Address 1. <br /></td></tr>
332 <tr class="separator:gadc001e69d1e81dc28a542237c6fe11ff"><td class="memSeparator" colspan="2"> </td></tr>
333 <tr class="memitem:ga5e55628cb59f5d7d35c529f04ebfcd10"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga5e55628cb59f5d7d35c529f04ebfcd10">ARM_NAND_CODE_SEND_ADDR_ROW2</a>   (1UL << 21)</td></tr>
334 <tr class="memdesc:ga5e55628cb59f5d7d35c529f04ebfcd10"><td class="mdescLeft"> </td><td class="mdescRight">Send Row Address 2. <br /></td></tr>
335 <tr class="separator:ga5e55628cb59f5d7d35c529f04ebfcd10"><td class="memSeparator" colspan="2"> </td></tr>
336 <tr class="memitem:gaeb5d1be9c13b7ad2ad246d5db10cd419"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#gaeb5d1be9c13b7ad2ad246d5db10cd419">ARM_NAND_CODE_SEND_ADDR_ROW3</a>   (1UL << 22)</td></tr>
337 <tr class="memdesc:gaeb5d1be9c13b7ad2ad246d5db10cd419"><td class="mdescLeft"> </td><td class="mdescRight">Send Row Address 3. <br /></td></tr>
338 <tr class="separator:gaeb5d1be9c13b7ad2ad246d5db10cd419"><td class="memSeparator" colspan="2"> </td></tr>
339 <tr class="memitem:ga959522c98183036da32984dd5e07979b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga959522c98183036da32984dd5e07979b">ARM_NAND_CODE_INC_ADDR_ROW</a>   (1UL << 23)</td></tr>
340 <tr class="memdesc:ga959522c98183036da32984dd5e07979b"><td class="mdescLeft"> </td><td class="mdescRight">Auto-increment Row Address. <br /></td></tr>
341 <tr class="separator:ga959522c98183036da32984dd5e07979b"><td class="memSeparator" colspan="2"> </td></tr>
342 <tr class="memitem:ga1b40fc5fbf22dc4fa8130f5836e30d12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga1b40fc5fbf22dc4fa8130f5836e30d12">ARM_NAND_CODE_WRITE_DATA</a>   (1UL << 24)</td></tr>
343 <tr class="memdesc:ga1b40fc5fbf22dc4fa8130f5836e30d12"><td class="mdescLeft"> </td><td class="mdescRight">Write Data. <br /></td></tr>
344 <tr class="separator:ga1b40fc5fbf22dc4fa8130f5836e30d12"><td class="memSeparator" colspan="2"> </td></tr>
345 <tr class="memitem:gacffafbbbca74f7ffa4cd3bb6b067c4ef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#gacffafbbbca74f7ffa4cd3bb6b067c4ef">ARM_NAND_CODE_SEND_CMD2</a>   (1UL << 25)</td></tr>
346 <tr class="memdesc:gacffafbbbca74f7ffa4cd3bb6b067c4ef"><td class="mdescLeft"> </td><td class="mdescRight">Send Command 2. <br /></td></tr>
347 <tr class="separator:gacffafbbbca74f7ffa4cd3bb6b067c4ef"><td class="memSeparator" colspan="2"> </td></tr>
348 <tr class="memitem:ga0f4a8b1e97656e09f1c383852f290a37"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga0f4a8b1e97656e09f1c383852f290a37">ARM_NAND_CODE_WAIT_BUSY</a>   (1UL << 26)</td></tr>
349 <tr class="memdesc:ga0f4a8b1e97656e09f1c383852f290a37"><td class="mdescLeft"> </td><td class="mdescRight">Wait while R/Bn busy. <br /></td></tr>
350 <tr class="separator:ga0f4a8b1e97656e09f1c383852f290a37"><td class="memSeparator" colspan="2"> </td></tr>
351 <tr class="memitem:gab524d840ab57c720ce8560144651dc9d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#gab524d840ab57c720ce8560144651dc9d">ARM_NAND_CODE_READ_DATA</a>   (1UL << 27)</td></tr>
352 <tr class="memdesc:gab524d840ab57c720ce8560144651dc9d"><td class="mdescLeft"> </td><td class="mdescRight">Read Data. <br /></td></tr>
353 <tr class="separator:gab524d840ab57c720ce8560144651dc9d"><td class="memSeparator" colspan="2"> </td></tr>
354 <tr class="memitem:ga20f96743ab77bda14ba391dc0c3cdba5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga20f96743ab77bda14ba391dc0c3cdba5">ARM_NAND_CODE_SEND_CMD3</a>   (1UL << 28)</td></tr>
355 <tr class="memdesc:ga20f96743ab77bda14ba391dc0c3cdba5"><td class="mdescLeft"> </td><td class="mdescRight">Send Command 3. <br /></td></tr>
356 <tr class="separator:ga20f96743ab77bda14ba391dc0c3cdba5"><td class="memSeparator" colspan="2"> </td></tr>
357 <tr class="memitem:ga2250f6a532d2c0834bfdc618761ddc86"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga2250f6a532d2c0834bfdc618761ddc86">ARM_NAND_CODE_READ_STATUS</a>   (1UL << 29)</td></tr>
358 <tr class="memdesc:ga2250f6a532d2c0834bfdc618761ddc86"><td class="mdescLeft"> </td><td class="mdescRight">Read Status byte and check FAIL bit (bit 0) <br /></td></tr>
359 <tr class="separator:ga2250f6a532d2c0834bfdc618761ddc86"><td class="memSeparator" colspan="2"> </td></tr>
360 <tr class="memitem:ae34722cf52938f50bf117780a742b6f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ae34722cf52938f50bf117780a742b6f1">ARM_NAND_CODE_CMD1_Pos</a>   0</td></tr>
361 <tr class="separator:ae34722cf52938f50bf117780a742b6f1"><td class="memSeparator" colspan="2"> </td></tr>
362 <tr class="memitem:ac65db62329bb943592afdb523e4aadca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ac65db62329bb943592afdb523e4aadca">ARM_NAND_CODE_CMD1_Msk</a>   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#ae34722cf52938f50bf117780a742b6f1">ARM_NAND_CODE_CMD1_Pos</a>)</td></tr>
363 <tr class="separator:ac65db62329bb943592afdb523e4aadca"><td class="memSeparator" colspan="2"> </td></tr>
364 <tr class="memitem:aeebe274650e7d0c02b478318759972e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aeebe274650e7d0c02b478318759972e5">ARM_NAND_CODE_CMD2_Pos</a>   8</td></tr>
365 <tr class="separator:aeebe274650e7d0c02b478318759972e5"><td class="memSeparator" colspan="2"> </td></tr>
366 <tr class="memitem:a0f963016c81be2ddf7a09d983de226a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a0f963016c81be2ddf7a09d983de226a9">ARM_NAND_CODE_CMD2_Msk</a>   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#aeebe274650e7d0c02b478318759972e5">ARM_NAND_CODE_CMD2_Pos</a>)</td></tr>
367 <tr class="separator:a0f963016c81be2ddf7a09d983de226a9"><td class="memSeparator" colspan="2"> </td></tr>
368 <tr class="memitem:aa0b87b819cf3c94f32e3ef18dcfd1c6c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aa0b87b819cf3c94f32e3ef18dcfd1c6c">ARM_NAND_CODE_CMD3_Pos</a>   16</td></tr>
369 <tr class="separator:aa0b87b819cf3c94f32e3ef18dcfd1c6c"><td class="memSeparator" colspan="2"> </td></tr>
370 <tr class="memitem:a16d474e55d0f6ea6efc3cc5436493b22"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a16d474e55d0f6ea6efc3cc5436493b22">ARM_NAND_CODE_CMD3_Msk</a>   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#aa0b87b819cf3c94f32e3ef18dcfd1c6c">ARM_NAND_CODE_CMD3_Pos</a>)</td></tr>
371 <tr class="separator:a16d474e55d0f6ea6efc3cc5436493b22"><td class="memSeparator" colspan="2"> </td></tr>
372 <tr class="memitem:ab8b06772e2b6c5930319b17bbb806133"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ab8b06772e2b6c5930319b17bbb806133">ARM_NAND_CODE_ADDR_COL1_Pos</a>   0</td></tr>
373 <tr class="separator:ab8b06772e2b6c5930319b17bbb806133"><td class="memSeparator" colspan="2"> </td></tr>
374 <tr class="memitem:a0951de69f3836c1ab229ec60b3996fcc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a0951de69f3836c1ab229ec60b3996fcc">ARM_NAND_CODE_ADDR_COL1_Msk</a>   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#ab8b06772e2b6c5930319b17bbb806133">ARM_NAND_CODE_ADDR_COL1_Pos</a>)</td></tr>
375 <tr class="separator:a0951de69f3836c1ab229ec60b3996fcc"><td class="memSeparator" colspan="2"> </td></tr>
376 <tr class="memitem:a1c4b9e7f44f77ebf665af8860a3c7528"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a1c4b9e7f44f77ebf665af8860a3c7528">ARM_NAND_CODE_ADDR_COL2_Pos</a>   8</td></tr>
377 <tr class="separator:a1c4b9e7f44f77ebf665af8860a3c7528"><td class="memSeparator" colspan="2"> </td></tr>
378 <tr class="memitem:a6126261e7c53713cee04aeae839d330e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a6126261e7c53713cee04aeae839d330e">ARM_NAND_CODE_ADDR_COL2_Msk</a>   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#a1c4b9e7f44f77ebf665af8860a3c7528">ARM_NAND_CODE_ADDR_COL2_Pos</a>)</td></tr>
379 <tr class="separator:a6126261e7c53713cee04aeae839d330e"><td class="memSeparator" colspan="2"> </td></tr>
380 <tr class="memitem:a8b75efa00810fcf23fb0f12e7f62d338"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a8b75efa00810fcf23fb0f12e7f62d338">ARM_NAND_CODE_ADDR_ROW1_Pos</a>   0</td></tr>
381 <tr class="separator:a8b75efa00810fcf23fb0f12e7f62d338"><td class="memSeparator" colspan="2"> </td></tr>
382 <tr class="memitem:ac24600be47e725ab1ad4193fd84daf80"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ac24600be47e725ab1ad4193fd84daf80">ARM_NAND_CODE_ADDR_ROW1_Msk</a>   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#a8b75efa00810fcf23fb0f12e7f62d338">ARM_NAND_CODE_ADDR_ROW1_Pos</a>)</td></tr>
383 <tr class="separator:ac24600be47e725ab1ad4193fd84daf80"><td class="memSeparator" colspan="2"> </td></tr>
384 <tr class="memitem:a326e135c57b38c78ae88cea121722a30"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a326e135c57b38c78ae88cea121722a30">ARM_NAND_CODE_ADDR_ROW2_Pos</a>   8</td></tr>
385 <tr class="separator:a326e135c57b38c78ae88cea121722a30"><td class="memSeparator" colspan="2"> </td></tr>
386 <tr class="memitem:ae17a3f9b9fd70a88f9f9f38dd2c17951"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ae17a3f9b9fd70a88f9f9f38dd2c17951">ARM_NAND_CODE_ADDR_ROW2_Msk</a>   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#a326e135c57b38c78ae88cea121722a30">ARM_NAND_CODE_ADDR_ROW2_Pos</a>)</td></tr>
387 <tr class="separator:ae17a3f9b9fd70a88f9f9f38dd2c17951"><td class="memSeparator" colspan="2"> </td></tr>
388 <tr class="memitem:a6873f7aedfe81efa8ca21dc85cbb384c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a6873f7aedfe81efa8ca21dc85cbb384c">ARM_NAND_CODE_ADDR_ROW3_Pos</a>   16</td></tr>
389 <tr class="separator:a6873f7aedfe81efa8ca21dc85cbb384c"><td class="memSeparator" colspan="2"> </td></tr>
390 <tr class="memitem:acf1ecacc2b225877c9cfe4f15dafc03c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#acf1ecacc2b225877c9cfe4f15dafc03c">ARM_NAND_CODE_ADDR_ROW3_Msk</a>   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#a6873f7aedfe81efa8ca21dc85cbb384c">ARM_NAND_CODE_ADDR_ROW3_Pos</a>)</td></tr>
391 <tr class="separator:acf1ecacc2b225877c9cfe4f15dafc03c"><td class="memSeparator" colspan="2"> </td></tr>
392 <tr class="memitem:gafebec6ac091750a47b1d59bc843c15b0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__execution__status.html#gafebec6ac091750a47b1d59bc843c15b0">ARM_NAND_ERROR_ECC</a>   (<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 1)</td></tr>
393 <tr class="memdesc:gafebec6ac091750a47b1d59bc843c15b0"><td class="mdescLeft"> </td><td class="mdescRight">ECC generation/correction failed. <br /></td></tr>
394 <tr class="separator:gafebec6ac091750a47b1d59bc843c15b0"><td class="memSeparator" colspan="2"> </td></tr>
395 <tr class="memitem:gae0be7e1b41188def905de0a1568d442d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__NAND__events.html#gae0be7e1b41188def905de0a1568d442d">ARM_NAND_EVENT_DEVICE_READY</a>   (1UL << 0)</td></tr>
396 <tr class="memdesc:gae0be7e1b41188def905de0a1568d442d"><td class="mdescLeft"> </td><td class="mdescRight">Device Ready: R/Bn rising edge. <br /></td></tr>
397 <tr class="separator:gae0be7e1b41188def905de0a1568d442d"><td class="memSeparator" colspan="2"> </td></tr>
398 <tr class="memitem:ga7b390a906db42c5ea4db38e0e85bb9e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__NAND__events.html#ga7b390a906db42c5ea4db38e0e85bb9e9">ARM_NAND_EVENT_DRIVER_READY</a>   (1UL << 1)</td></tr>
399 <tr class="memdesc:ga7b390a906db42c5ea4db38e0e85bb9e9"><td class="mdescLeft"> </td><td class="mdescRight">Driver Ready. <br /></td></tr>
400 <tr class="separator:ga7b390a906db42c5ea4db38e0e85bb9e9"><td class="memSeparator" colspan="2"> </td></tr>
401 <tr class="memitem:gac774a334871789d24107b843d1ebd00c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__NAND__events.html#gac774a334871789d24107b843d1ebd00c">ARM_NAND_EVENT_DRIVER_DONE</a>   (1UL << 2)</td></tr>
402 <tr class="memdesc:gac774a334871789d24107b843d1ebd00c"><td class="mdescLeft"> </td><td class="mdescRight">Driver operation done. <br /></td></tr>
403 <tr class="separator:gac774a334871789d24107b843d1ebd00c"><td class="memSeparator" colspan="2"> </td></tr>
404 <tr class="memitem:a7bee0c32528ab991c0c064f895f80664"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a7bee0c32528ab991c0c064f895f80664">ARM_NAND_EVENT_ECC_ERROR</a>   (1UL << 3)</td></tr>
405 <tr class="memdesc:a7bee0c32528ab991c0c064f895f80664"><td class="mdescLeft"> </td><td class="mdescRight">ECC could not correct data. <br /></td></tr>
406 <tr class="separator:a7bee0c32528ab991c0c064f895f80664"><td class="memSeparator" colspan="2"> </td></tr>
407 </table><table class="memberdecls">
408 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="typedef-members" name="typedef-members"></a>
409 Typedefs</h2></td></tr>
410 <tr class="memitem:ga09f4cf2f2df0bb690bce38b13d77e50f"><td class="memItemLeft" align="right" valign="top">typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__interface__gr.html#ga09f4cf2f2df0bb690bce38b13d77e50f">ARM_NAND_SignalEvent_t</a>) (uint32_t dev_num, uint32_t event)</td></tr>
411 <tr class="memdesc:ga09f4cf2f2df0bb690bce38b13d77e50f"><td class="mdescLeft"> </td><td class="mdescRight">Pointer to <a class="el" href="group__nand__interface__gr.html#gaf4ce80b0fd6717de7ddfb1cfaf7dd754">ARM_NAND_SignalEvent</a> : Signal NAND Event. <br /></td></tr>
412 <tr class="separator:ga09f4cf2f2df0bb690bce38b13d77e50f"><td class="memSeparator" colspan="2"> </td></tr>
414 <h2 class="groupheader">Macro Definition Documentation</h2>
415 <a id="a121ff96c31275cef4bb7e86007665e1c" name="a121ff96c31275cef4bb7e86007665e1c"></a>
416 <h2 class="memtitle"><span class="permalink"><a href="#a121ff96c31275cef4bb7e86007665e1c">◆ </a></span>ARM_NAND_API_VERSION</h2>
418 <div class="memitem">
419 <div class="memproto">
420 <table class="memname">
422 <td class="memname">#define ARM_NAND_API_VERSION   <a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,4) /* API version */</td>
425 </div><div class="memdoc">
429 <a id="a72c7c93880689c3ce6d799afe6a8dd87" name="a72c7c93880689c3ce6d799afe6a8dd87"></a>
430 <h2 class="memtitle"><span class="permalink"><a href="#a72c7c93880689c3ce6d799afe6a8dd87">◆ </a></span>_ARM_Driver_NAND_</h2>
432 <div class="memitem">
433 <div class="memproto">
434 <table class="memname">
436 <td class="memname">#define _ARM_Driver_NAND_</td>
438 <td class="paramtype"> </td>
439 <td class="paramname">n</td><td>)</td>
440 <td>   Driver_NAND##n</td>
443 </div><div class="memdoc">
447 <a id="aa0dd88065962a6e23fd82eb86fec27a7" name="aa0dd88065962a6e23fd82eb86fec27a7"></a>
448 <h2 class="memtitle"><span class="permalink"><a href="#aa0dd88065962a6e23fd82eb86fec27a7">◆ </a></span>ARM_Driver_NAND_</h2>
450 <div class="memitem">
451 <div class="memproto">
452 <table class="memname">
454 <td class="memname">#define ARM_Driver_NAND_</td>
456 <td class="paramtype"> </td>
457 <td class="paramname">n</td><td>)</td>
458 <td>   <a class="el" href="Driver__NAND_8h.html#a72c7c93880689c3ce6d799afe6a8dd87">_ARM_Driver_NAND_</a>(n)</td>
461 </div><div class="memdoc">
465 <a id="a848a27ec9ebf0a13a82a1d9760f39d90" name="a848a27ec9ebf0a13a82a1d9760f39d90"></a>
466 <h2 class="memtitle"><span class="permalink"><a href="#a848a27ec9ebf0a13a82a1d9760f39d90">◆ </a></span>ARM_NAND_POWER_VCC_Pos</h2>
468 <div class="memitem">
469 <div class="memproto">
470 <table class="memname">
472 <td class="memname">#define ARM_NAND_POWER_VCC_Pos   0</td>
475 </div><div class="memdoc">
479 <a id="ad898ef5cd4ffe3b6b09d69e224aa0912" name="ad898ef5cd4ffe3b6b09d69e224aa0912"></a>
480 <h2 class="memtitle"><span class="permalink"><a href="#ad898ef5cd4ffe3b6b09d69e224aa0912">◆ </a></span>ARM_NAND_POWER_VCC_Msk</h2>
482 <div class="memitem">
483 <div class="memproto">
484 <table class="memname">
486 <td class="memname">#define ARM_NAND_POWER_VCC_Msk   (0x07UL << <a class="el" href="Driver__NAND_8h.html#a848a27ec9ebf0a13a82a1d9760f39d90">ARM_NAND_POWER_VCC_Pos</a>)</td>
489 </div><div class="memdoc">
493 <a id="a323c320a6195b78c2c79f5c6e85f02e1" name="a323c320a6195b78c2c79f5c6e85f02e1"></a>
494 <h2 class="memtitle"><span class="permalink"><a href="#a323c320a6195b78c2c79f5c6e85f02e1">◆ </a></span>ARM_NAND_POWER_VCC_OFF</h2>
496 <div class="memitem">
497 <div class="memproto">
498 <table class="memname">
500 <td class="memname">#define ARM_NAND_POWER_VCC_OFF   (0x01UL << <a class="el" href="Driver__NAND_8h.html#a848a27ec9ebf0a13a82a1d9760f39d90">ARM_NAND_POWER_VCC_Pos</a>)</td>
503 </div><div class="memdoc">
505 <p>VCC Power off. </p>
509 <a id="ad15355d67bc239ff49cceac69c2024b3" name="ad15355d67bc239ff49cceac69c2024b3"></a>
510 <h2 class="memtitle"><span class="permalink"><a href="#ad15355d67bc239ff49cceac69c2024b3">◆ </a></span>ARM_NAND_POWER_VCC_3V3</h2>
512 <div class="memitem">
513 <div class="memproto">
514 <table class="memname">
516 <td class="memname">#define ARM_NAND_POWER_VCC_3V3   (0x02UL << <a class="el" href="Driver__NAND_8h.html#a848a27ec9ebf0a13a82a1d9760f39d90">ARM_NAND_POWER_VCC_Pos</a>)</td>
519 </div><div class="memdoc">
525 <a id="aa7b9d5a71125b745caba5c1d7aff6385" name="aa7b9d5a71125b745caba5c1d7aff6385"></a>
526 <h2 class="memtitle"><span class="permalink"><a href="#aa7b9d5a71125b745caba5c1d7aff6385">◆ </a></span>ARM_NAND_POWER_VCC_1V8</h2>
528 <div class="memitem">
529 <div class="memproto">
530 <table class="memname">
532 <td class="memname">#define ARM_NAND_POWER_VCC_1V8   (0x03UL << <a class="el" href="Driver__NAND_8h.html#a848a27ec9ebf0a13a82a1d9760f39d90">ARM_NAND_POWER_VCC_Pos</a>)</td>
535 </div><div class="memdoc">
541 <a id="ac38023b94cd8a68295d48a1019a386e0" name="ac38023b94cd8a68295d48a1019a386e0"></a>
542 <h2 class="memtitle"><span class="permalink"><a href="#ac38023b94cd8a68295d48a1019a386e0">◆ </a></span>ARM_NAND_POWER_VCCQ_Pos</h2>
544 <div class="memitem">
545 <div class="memproto">
546 <table class="memname">
548 <td class="memname">#define ARM_NAND_POWER_VCCQ_Pos   3</td>
551 </div><div class="memdoc">
555 <a id="a7a453227301d7c08d09b22dc8afafbe7" name="a7a453227301d7c08d09b22dc8afafbe7"></a>
556 <h2 class="memtitle"><span class="permalink"><a href="#a7a453227301d7c08d09b22dc8afafbe7">◆ </a></span>ARM_NAND_POWER_VCCQ_Msk</h2>
558 <div class="memitem">
559 <div class="memproto">
560 <table class="memname">
562 <td class="memname">#define ARM_NAND_POWER_VCCQ_Msk   (0x07UL << <a class="el" href="Driver__NAND_8h.html#ac38023b94cd8a68295d48a1019a386e0">ARM_NAND_POWER_VCCQ_Pos</a>)</td>
565 </div><div class="memdoc">
569 <a id="aca7679e8269ee986559f4218816937c3" name="aca7679e8269ee986559f4218816937c3"></a>
570 <h2 class="memtitle"><span class="permalink"><a href="#aca7679e8269ee986559f4218816937c3">◆ </a></span>ARM_NAND_POWER_VCCQ_OFF</h2>
572 <div class="memitem">
573 <div class="memproto">
574 <table class="memname">
576 <td class="memname">#define ARM_NAND_POWER_VCCQ_OFF   (0x01UL << <a class="el" href="Driver__NAND_8h.html#ac38023b94cd8a68295d48a1019a386e0">ARM_NAND_POWER_VCCQ_Pos</a>)</td>
579 </div><div class="memdoc">
581 <p>VCCQ I/O Power off. </p>
585 <a id="a6d5a8a33a0fdaaff2e57e1ac53c984c2" name="a6d5a8a33a0fdaaff2e57e1ac53c984c2"></a>
586 <h2 class="memtitle"><span class="permalink"><a href="#a6d5a8a33a0fdaaff2e57e1ac53c984c2">◆ </a></span>ARM_NAND_POWER_VCCQ_3V3</h2>
588 <div class="memitem">
589 <div class="memproto">
590 <table class="memname">
592 <td class="memname">#define ARM_NAND_POWER_VCCQ_3V3   (0x02UL << <a class="el" href="Driver__NAND_8h.html#ac38023b94cd8a68295d48a1019a386e0">ARM_NAND_POWER_VCCQ_Pos</a>)</td>
595 </div><div class="memdoc">
601 <a id="a653d9b4d7bee173beb49d8fec0469476" name="a653d9b4d7bee173beb49d8fec0469476"></a>
602 <h2 class="memtitle"><span class="permalink"><a href="#a653d9b4d7bee173beb49d8fec0469476">◆ </a></span>ARM_NAND_POWER_VCCQ_1V8</h2>
604 <div class="memitem">
605 <div class="memproto">
606 <table class="memname">
608 <td class="memname">#define ARM_NAND_POWER_VCCQ_1V8   (0x03UL << <a class="el" href="Driver__NAND_8h.html#ac38023b94cd8a68295d48a1019a386e0">ARM_NAND_POWER_VCCQ_Pos</a>)</td>
611 </div><div class="memdoc">
617 <a id="ae2d278901881ffc73d3e0b48717b22f0" name="ae2d278901881ffc73d3e0b48717b22f0"></a>
618 <h2 class="memtitle"><span class="permalink"><a href="#ae2d278901881ffc73d3e0b48717b22f0">◆ </a></span>ARM_NAND_POWER_VPP_OFF</h2>
620 <div class="memitem">
621 <div class="memproto">
622 <table class="memname">
624 <td class="memname">#define ARM_NAND_POWER_VPP_OFF   (1UL << 6)</td>
627 </div><div class="memdoc">
633 <a id="aeb0d50e30bbcd8ab59c3b78db634aad5" name="aeb0d50e30bbcd8ab59c3b78db634aad5"></a>
634 <h2 class="memtitle"><span class="permalink"><a href="#aeb0d50e30bbcd8ab59c3b78db634aad5">◆ </a></span>ARM_NAND_POWER_VPP_ON</h2>
636 <div class="memitem">
637 <div class="memproto">
638 <table class="memname">
640 <td class="memname">#define ARM_NAND_POWER_VPP_ON   (1UL << 7)</td>
643 </div><div class="memdoc">
649 <a id="a9b063c3078e86b50d4aa892518b2e2d8" name="a9b063c3078e86b50d4aa892518b2e2d8"></a>
650 <h2 class="memtitle"><span class="permalink"><a href="#a9b063c3078e86b50d4aa892518b2e2d8">◆ </a></span>ARM_NAND_BUS_MODE</h2>
652 <div class="memitem">
653 <div class="memproto">
654 <table class="memname">
656 <td class="memname">#define ARM_NAND_BUS_MODE   (0x01UL)</td>
659 </div><div class="memdoc">
661 <p>Set Bus Mode as specified with arg. </p>
665 <a id="a2d3356f5b47871c465ae7136a2c533f4" name="a2d3356f5b47871c465ae7136a2c533f4"></a>
666 <h2 class="memtitle"><span class="permalink"><a href="#a2d3356f5b47871c465ae7136a2c533f4">◆ </a></span>ARM_NAND_BUS_DATA_WIDTH</h2>
668 <div class="memitem">
669 <div class="memproto">
670 <table class="memname">
672 <td class="memname">#define ARM_NAND_BUS_DATA_WIDTH   (0x02UL)</td>
675 </div><div class="memdoc">
677 <p>Set Bus Data Width as specified with arg. </p>
681 <a id="a5d1d46198404fe115b013bdae7af2a2f" name="a5d1d46198404fe115b013bdae7af2a2f"></a>
682 <h2 class="memtitle"><span class="permalink"><a href="#a5d1d46198404fe115b013bdae7af2a2f">◆ </a></span>ARM_NAND_DRIVER_STRENGTH</h2>
684 <div class="memitem">
685 <div class="memproto">
686 <table class="memname">
688 <td class="memname">#define ARM_NAND_DRIVER_STRENGTH   (0x03UL)</td>
691 </div><div class="memdoc">
693 <p>Set Driver Strength as specified with arg. </p>
697 <a id="a1bffc9f341e704ee0e845d86a2989921" name="a1bffc9f341e704ee0e845d86a2989921"></a>
698 <h2 class="memtitle"><span class="permalink"><a href="#a1bffc9f341e704ee0e845d86a2989921">◆ </a></span>ARM_NAND_DEVICE_READY_EVENT</h2>
700 <div class="memitem">
701 <div class="memproto">
702 <table class="memname">
704 <td class="memname">#define ARM_NAND_DEVICE_READY_EVENT   (0x04UL)</td>
707 </div><div class="memdoc">
709 <p>Generate <a class="el" href="group__NAND__events.html#gae0be7e1b41188def905de0a1568d442d">ARM_NAND_EVENT_DEVICE_READY</a>; arg: 0=disabled (default), 1=enabled. </p>
713 <a id="aab6dea1b565aeb53e360876a4e50783c" name="aab6dea1b565aeb53e360876a4e50783c"></a>
714 <h2 class="memtitle"><span class="permalink"><a href="#aab6dea1b565aeb53e360876a4e50783c">◆ </a></span>ARM_NAND_DRIVER_READY_EVENT</h2>
716 <div class="memitem">
717 <div class="memproto">
718 <table class="memname">
720 <td class="memname">#define ARM_NAND_DRIVER_READY_EVENT   (0x05UL)</td>
723 </div><div class="memdoc">
725 <p>Generate <a class="el" href="group__NAND__events.html#ga7b390a906db42c5ea4db38e0e85bb9e9">ARM_NAND_EVENT_DRIVER_READY</a>; arg: 0=disabled (default), 1=enabled. </p>
729 <a id="a372fc9b9cc1315046ceaffd6fd99e12c" name="a372fc9b9cc1315046ceaffd6fd99e12c"></a>
730 <h2 class="memtitle"><span class="permalink"><a href="#a372fc9b9cc1315046ceaffd6fd99e12c">◆ </a></span>ARM_NAND_BUS_INTERFACE_Pos</h2>
732 <div class="memitem">
733 <div class="memproto">
734 <table class="memname">
736 <td class="memname">#define ARM_NAND_BUS_INTERFACE_Pos   4</td>
739 </div><div class="memdoc">
743 <a id="aea213eb1ba9c67beb6216a630d81b91f" name="aea213eb1ba9c67beb6216a630d81b91f"></a>
744 <h2 class="memtitle"><span class="permalink"><a href="#aea213eb1ba9c67beb6216a630d81b91f">◆ </a></span>ARM_NAND_BUS_INTERFACE_Msk</h2>
746 <div class="memitem">
747 <div class="memproto">
748 <table class="memname">
750 <td class="memname">#define ARM_NAND_BUS_INTERFACE_Msk   (0x03UL << <a class="el" href="Driver__NAND_8h.html#a372fc9b9cc1315046ceaffd6fd99e12c">ARM_NAND_BUS_INTERFACE_Pos</a>)</td>
753 </div><div class="memdoc">
757 <a id="acc98e42d23656734c7f9a8a5421842d6" name="acc98e42d23656734c7f9a8a5421842d6"></a>
758 <h2 class="memtitle"><span class="permalink"><a href="#acc98e42d23656734c7f9a8a5421842d6">◆ </a></span>ARM_NAND_BUS_TIMING_MODE_Pos</h2>
760 <div class="memitem">
761 <div class="memproto">
762 <table class="memname">
764 <td class="memname">#define ARM_NAND_BUS_TIMING_MODE_Pos   0</td>
767 </div><div class="memdoc">
771 <a id="a57f6c319265b00878661656103abe660" name="a57f6c319265b00878661656103abe660"></a>
772 <h2 class="memtitle"><span class="permalink"><a href="#a57f6c319265b00878661656103abe660">◆ </a></span>ARM_NAND_BUS_TIMING_MODE_Msk</h2>
774 <div class="memitem">
775 <div class="memproto">
776 <table class="memname">
778 <td class="memname">#define ARM_NAND_BUS_TIMING_MODE_Msk   (0x0FUL << <a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>)</td>
781 </div><div class="memdoc">
785 <a id="a57b282c0818c87b79ea4f11d03cc4f3c" name="a57b282c0818c87b79ea4f11d03cc4f3c"></a>
786 <h2 class="memtitle"><span class="permalink"><a href="#a57b282c0818c87b79ea4f11d03cc4f3c">◆ </a></span>ARM_NAND_BUS_DDR2_DO_WCYC_Pos</h2>
788 <div class="memitem">
789 <div class="memproto">
790 <table class="memname">
792 <td class="memname">#define ARM_NAND_BUS_DDR2_DO_WCYC_Pos   8</td>
795 </div><div class="memdoc">
799 <a id="ad30dfdbdc50a7ff72a5bb173c5f549dc" name="ad30dfdbdc50a7ff72a5bb173c5f549dc"></a>
800 <h2 class="memtitle"><span class="permalink"><a href="#ad30dfdbdc50a7ff72a5bb173c5f549dc">◆ </a></span>ARM_NAND_BUS_DDR2_DO_WCYC_Msk</h2>
802 <div class="memitem">
803 <div class="memproto">
804 <table class="memname">
806 <td class="memname">#define ARM_NAND_BUS_DDR2_DO_WCYC_Msk   (0x0FUL << <a class="el" href="Driver__NAND_8h.html#a57b282c0818c87b79ea4f11d03cc4f3c">ARM_NAND_BUS_DDR2_DO_WCYC_Pos</a>)</td>
809 </div><div class="memdoc">
813 <a id="aa80b898cdf665aa14ff0e181e4ff31f1" name="aa80b898cdf665aa14ff0e181e4ff31f1"></a>
814 <h2 class="memtitle"><span class="permalink"><a href="#aa80b898cdf665aa14ff0e181e4ff31f1">◆ </a></span>ARM_NAND_BUS_DDR2_DI_WCYC_Pos</h2>
816 <div class="memitem">
817 <div class="memproto">
818 <table class="memname">
820 <td class="memname">#define ARM_NAND_BUS_DDR2_DI_WCYC_Pos   12</td>
823 </div><div class="memdoc">
827 <a id="ad9ab38101de68a1bc186f5687f63f7c3" name="ad9ab38101de68a1bc186f5687f63f7c3"></a>
828 <h2 class="memtitle"><span class="permalink"><a href="#ad9ab38101de68a1bc186f5687f63f7c3">◆ </a></span>ARM_NAND_BUS_DDR2_DI_WCYC_Msk</h2>
830 <div class="memitem">
831 <div class="memproto">
832 <table class="memname">
834 <td class="memname">#define ARM_NAND_BUS_DDR2_DI_WCYC_Msk   (0x0FUL << <a class="el" href="Driver__NAND_8h.html#aa80b898cdf665aa14ff0e181e4ff31f1">ARM_NAND_BUS_DDR2_DI_WCYC_Pos</a>)</td>
837 </div><div class="memdoc">
841 <a id="a7944be4f63c439d5d64053ad9476407b" name="a7944be4f63c439d5d64053ad9476407b"></a>
842 <h2 class="memtitle"><span class="permalink"><a href="#a7944be4f63c439d5d64053ad9476407b">◆ </a></span>ARM_NAND_ECC_INDEX_Pos</h2>
844 <div class="memitem">
845 <div class="memproto">
846 <table class="memname">
848 <td class="memname">#define ARM_NAND_ECC_INDEX_Pos   0</td>
851 </div><div class="memdoc">
855 <a id="a656537439264ab495c86e4c36051a3c1" name="a656537439264ab495c86e4c36051a3c1"></a>
856 <h2 class="memtitle"><span class="permalink"><a href="#a656537439264ab495c86e4c36051a3c1">◆ </a></span>ARM_NAND_ECC_INDEX_Msk</h2>
858 <div class="memitem">
859 <div class="memproto">
860 <table class="memname">
862 <td class="memname">#define ARM_NAND_ECC_INDEX_Msk   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#a7944be4f63c439d5d64053ad9476407b">ARM_NAND_ECC_INDEX_Pos</a>)</td>
865 </div><div class="memdoc">
869 <a id="af40631ba62411e0ac06c3a945d608581" name="af40631ba62411e0ac06c3a945d608581"></a>
870 <h2 class="memtitle"><span class="permalink"><a href="#af40631ba62411e0ac06c3a945d608581">◆ </a></span>ARM_NAND_DRIVER_DONE_EVENT</h2>
872 <div class="memitem">
873 <div class="memproto">
874 <table class="memname">
876 <td class="memname">#define ARM_NAND_DRIVER_DONE_EVENT   (1UL << 16)</td>
879 </div><div class="memdoc">
881 <p>Generate <a class="el" href="group__NAND__events.html#gac774a334871789d24107b843d1ebd00c">ARM_NAND_EVENT_DRIVER_DONE</a>. </p>
885 <a id="ae34722cf52938f50bf117780a742b6f1" name="ae34722cf52938f50bf117780a742b6f1"></a>
886 <h2 class="memtitle"><span class="permalink"><a href="#ae34722cf52938f50bf117780a742b6f1">◆ </a></span>ARM_NAND_CODE_CMD1_Pos</h2>
888 <div class="memitem">
889 <div class="memproto">
890 <table class="memname">
892 <td class="memname">#define ARM_NAND_CODE_CMD1_Pos   0</td>
895 </div><div class="memdoc">
899 <a id="ac65db62329bb943592afdb523e4aadca" name="ac65db62329bb943592afdb523e4aadca"></a>
900 <h2 class="memtitle"><span class="permalink"><a href="#ac65db62329bb943592afdb523e4aadca">◆ </a></span>ARM_NAND_CODE_CMD1_Msk</h2>
902 <div class="memitem">
903 <div class="memproto">
904 <table class="memname">
906 <td class="memname">#define ARM_NAND_CODE_CMD1_Msk   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#ae34722cf52938f50bf117780a742b6f1">ARM_NAND_CODE_CMD1_Pos</a>)</td>
909 </div><div class="memdoc">
913 <a id="aeebe274650e7d0c02b478318759972e5" name="aeebe274650e7d0c02b478318759972e5"></a>
914 <h2 class="memtitle"><span class="permalink"><a href="#aeebe274650e7d0c02b478318759972e5">◆ </a></span>ARM_NAND_CODE_CMD2_Pos</h2>
916 <div class="memitem">
917 <div class="memproto">
918 <table class="memname">
920 <td class="memname">#define ARM_NAND_CODE_CMD2_Pos   8</td>
923 </div><div class="memdoc">
927 <a id="a0f963016c81be2ddf7a09d983de226a9" name="a0f963016c81be2ddf7a09d983de226a9"></a>
928 <h2 class="memtitle"><span class="permalink"><a href="#a0f963016c81be2ddf7a09d983de226a9">◆ </a></span>ARM_NAND_CODE_CMD2_Msk</h2>
930 <div class="memitem">
931 <div class="memproto">
932 <table class="memname">
934 <td class="memname">#define ARM_NAND_CODE_CMD2_Msk   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#aeebe274650e7d0c02b478318759972e5">ARM_NAND_CODE_CMD2_Pos</a>)</td>
937 </div><div class="memdoc">
941 <a id="aa0b87b819cf3c94f32e3ef18dcfd1c6c" name="aa0b87b819cf3c94f32e3ef18dcfd1c6c"></a>
942 <h2 class="memtitle"><span class="permalink"><a href="#aa0b87b819cf3c94f32e3ef18dcfd1c6c">◆ </a></span>ARM_NAND_CODE_CMD3_Pos</h2>
944 <div class="memitem">
945 <div class="memproto">
946 <table class="memname">
948 <td class="memname">#define ARM_NAND_CODE_CMD3_Pos   16</td>
951 </div><div class="memdoc">
955 <a id="a16d474e55d0f6ea6efc3cc5436493b22" name="a16d474e55d0f6ea6efc3cc5436493b22"></a>
956 <h2 class="memtitle"><span class="permalink"><a href="#a16d474e55d0f6ea6efc3cc5436493b22">◆ </a></span>ARM_NAND_CODE_CMD3_Msk</h2>
958 <div class="memitem">
959 <div class="memproto">
960 <table class="memname">
962 <td class="memname">#define ARM_NAND_CODE_CMD3_Msk   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#aa0b87b819cf3c94f32e3ef18dcfd1c6c">ARM_NAND_CODE_CMD3_Pos</a>)</td>
965 </div><div class="memdoc">
969 <a id="ab8b06772e2b6c5930319b17bbb806133" name="ab8b06772e2b6c5930319b17bbb806133"></a>
970 <h2 class="memtitle"><span class="permalink"><a href="#ab8b06772e2b6c5930319b17bbb806133">◆ </a></span>ARM_NAND_CODE_ADDR_COL1_Pos</h2>
972 <div class="memitem">
973 <div class="memproto">
974 <table class="memname">
976 <td class="memname">#define ARM_NAND_CODE_ADDR_COL1_Pos   0</td>
979 </div><div class="memdoc">
983 <a id="a0951de69f3836c1ab229ec60b3996fcc" name="a0951de69f3836c1ab229ec60b3996fcc"></a>
984 <h2 class="memtitle"><span class="permalink"><a href="#a0951de69f3836c1ab229ec60b3996fcc">◆ </a></span>ARM_NAND_CODE_ADDR_COL1_Msk</h2>
986 <div class="memitem">
987 <div class="memproto">
988 <table class="memname">
990 <td class="memname">#define ARM_NAND_CODE_ADDR_COL1_Msk   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#ab8b06772e2b6c5930319b17bbb806133">ARM_NAND_CODE_ADDR_COL1_Pos</a>)</td>
993 </div><div class="memdoc">
997 <a id="a1c4b9e7f44f77ebf665af8860a3c7528" name="a1c4b9e7f44f77ebf665af8860a3c7528"></a>
998 <h2 class="memtitle"><span class="permalink"><a href="#a1c4b9e7f44f77ebf665af8860a3c7528">◆ </a></span>ARM_NAND_CODE_ADDR_COL2_Pos</h2>
1000 <div class="memitem">
1001 <div class="memproto">
1002 <table class="memname">
1004 <td class="memname">#define ARM_NAND_CODE_ADDR_COL2_Pos   8</td>
1007 </div><div class="memdoc">
1011 <a id="a6126261e7c53713cee04aeae839d330e" name="a6126261e7c53713cee04aeae839d330e"></a>
1012 <h2 class="memtitle"><span class="permalink"><a href="#a6126261e7c53713cee04aeae839d330e">◆ </a></span>ARM_NAND_CODE_ADDR_COL2_Msk</h2>
1014 <div class="memitem">
1015 <div class="memproto">
1016 <table class="memname">
1018 <td class="memname">#define ARM_NAND_CODE_ADDR_COL2_Msk   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#a1c4b9e7f44f77ebf665af8860a3c7528">ARM_NAND_CODE_ADDR_COL2_Pos</a>)</td>
1021 </div><div class="memdoc">
1025 <a id="a8b75efa00810fcf23fb0f12e7f62d338" name="a8b75efa00810fcf23fb0f12e7f62d338"></a>
1026 <h2 class="memtitle"><span class="permalink"><a href="#a8b75efa00810fcf23fb0f12e7f62d338">◆ </a></span>ARM_NAND_CODE_ADDR_ROW1_Pos</h2>
1028 <div class="memitem">
1029 <div class="memproto">
1030 <table class="memname">
1032 <td class="memname">#define ARM_NAND_CODE_ADDR_ROW1_Pos   0</td>
1035 </div><div class="memdoc">
1039 <a id="ac24600be47e725ab1ad4193fd84daf80" name="ac24600be47e725ab1ad4193fd84daf80"></a>
1040 <h2 class="memtitle"><span class="permalink"><a href="#ac24600be47e725ab1ad4193fd84daf80">◆ </a></span>ARM_NAND_CODE_ADDR_ROW1_Msk</h2>
1042 <div class="memitem">
1043 <div class="memproto">
1044 <table class="memname">
1046 <td class="memname">#define ARM_NAND_CODE_ADDR_ROW1_Msk   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#a8b75efa00810fcf23fb0f12e7f62d338">ARM_NAND_CODE_ADDR_ROW1_Pos</a>)</td>
1049 </div><div class="memdoc">
1053 <a id="a326e135c57b38c78ae88cea121722a30" name="a326e135c57b38c78ae88cea121722a30"></a>
1054 <h2 class="memtitle"><span class="permalink"><a href="#a326e135c57b38c78ae88cea121722a30">◆ </a></span>ARM_NAND_CODE_ADDR_ROW2_Pos</h2>
1056 <div class="memitem">
1057 <div class="memproto">
1058 <table class="memname">
1060 <td class="memname">#define ARM_NAND_CODE_ADDR_ROW2_Pos   8</td>
1063 </div><div class="memdoc">
1067 <a id="ae17a3f9b9fd70a88f9f9f38dd2c17951" name="ae17a3f9b9fd70a88f9f9f38dd2c17951"></a>
1068 <h2 class="memtitle"><span class="permalink"><a href="#ae17a3f9b9fd70a88f9f9f38dd2c17951">◆ </a></span>ARM_NAND_CODE_ADDR_ROW2_Msk</h2>
1070 <div class="memitem">
1071 <div class="memproto">
1072 <table class="memname">
1074 <td class="memname">#define ARM_NAND_CODE_ADDR_ROW2_Msk   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#a326e135c57b38c78ae88cea121722a30">ARM_NAND_CODE_ADDR_ROW2_Pos</a>)</td>
1077 </div><div class="memdoc">
1081 <a id="a6873f7aedfe81efa8ca21dc85cbb384c" name="a6873f7aedfe81efa8ca21dc85cbb384c"></a>
1082 <h2 class="memtitle"><span class="permalink"><a href="#a6873f7aedfe81efa8ca21dc85cbb384c">◆ </a></span>ARM_NAND_CODE_ADDR_ROW3_Pos</h2>
1084 <div class="memitem">
1085 <div class="memproto">
1086 <table class="memname">
1088 <td class="memname">#define ARM_NAND_CODE_ADDR_ROW3_Pos   16</td>
1091 </div><div class="memdoc">
1095 <a id="acf1ecacc2b225877c9cfe4f15dafc03c" name="acf1ecacc2b225877c9cfe4f15dafc03c"></a>
1096 <h2 class="memtitle"><span class="permalink"><a href="#acf1ecacc2b225877c9cfe4f15dafc03c">◆ </a></span>ARM_NAND_CODE_ADDR_ROW3_Msk</h2>
1098 <div class="memitem">
1099 <div class="memproto">
1100 <table class="memname">
1102 <td class="memname">#define ARM_NAND_CODE_ADDR_ROW3_Msk   (0xFFUL << <a class="el" href="Driver__NAND_8h.html#a6873f7aedfe81efa8ca21dc85cbb384c">ARM_NAND_CODE_ADDR_ROW3_Pos</a>)</td>
1105 </div><div class="memdoc">
1109 <a id="a7bee0c32528ab991c0c064f895f80664" name="a7bee0c32528ab991c0c064f895f80664"></a>
1110 <h2 class="memtitle"><span class="permalink"><a href="#a7bee0c32528ab991c0c064f895f80664">◆ </a></span>ARM_NAND_EVENT_ECC_ERROR</h2>
1112 <div class="memitem">
1113 <div class="memproto">
1114 <table class="memname">
1116 <td class="memname">#define ARM_NAND_EVENT_ECC_ERROR   (1UL << 3)</td>
1119 </div><div class="memdoc">
1121 <p>ECC could not correct data. </p>
1125 </div><!-- contents -->
1126 </div><!-- doc-content -->
1127 <!-- start footer part -->
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1130 <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__NAND_8h.html">Driver_NAND.h</a></li>
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