begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.8.0">
  12       Active development ...
  13       CMSIS-Core(M):
  14         - Updated GCC LinkerDescription, GCC Assembler startup
  15        - Added ARMv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  16        - Changed C-Startup to default Startup.
  17       CMSIS-DSP:
  18        - Purged pre-built libs from Git
  19       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  20        - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  21        - Added optimization for SVDF kernel
  22        - Improved MVE performance for fully Connected and max pool operator
  23        - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  24        - Expanded existing unit test suite along with support for FVP
  25       CMSIS-RTOS:
  26        - RTX4: Purged pre-built libs from Git
  27       CMSIS-RTOS2:
  28         - RTX5: Purged pre-built libs from Git
  29         - RTX 5.5.3 (see revision history for details)
  30     </release>
  31     <release version="5.7.0" date="2020-04-09">
  32       CMSIS-Build: 0.9.0 (beta)
  33         - Draft for CMSIS Project description (CPRJ)
  34       CMSIS-Core(M): 5.4.0 (see revision history for details)
  35         - Cortex-M55 cpu support
  36         - Enhanced MVE support for Armv8.1-MML
  37         - Fixed device config define checks.
  38         - L1 Cache functions for Armv7-M and later
  39       CMSIS-Core(A): 1.2.0 (see revision history for details)
  40         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  41         - Added missing DSP intrinsics
  42         - Reworked assembly intrinsics: volatile, barriers and clobber
  43       CMSIS-DSP: 1.8.0 (see revision history for details)
  44         - Added new functions and function groups
  45         - Added MVE support
  46       CMSIS-NN: 1.3.0 (see revision history for details)
  47         - Added MVE support
  48         - Further optimizations for kernels using DSP extension
  49       CMSIS-RTOS2:
  50         - RTX 5.5.2 (see revision history for details)
  51       CMSIS-Driver: 2.8.0
  52         - Added VIO API 0.1.0 (Preview)
  53         - removed volatile from status related typedefs in APIs
  54         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  55       CMSIS-Pack: 1.6.3 (see revision history for details)
  56         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  57       Devices:
  58         - ARMCM55 device
  59         - ARMv81MML startup code recognizing __MVE_USED macro
  60         - Refactored vector table references for all Cortex-M devices
  61         - Reworked ARMCM* C-StartUp files.
  62         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  63       Utilities:
  64         Attention: Linux binaries moved to Linux64 folder!
  65         - SVDConv 3.3.35
  66         - PackChk 1.3.89
  67     </release>
  68     <release version="5.6.0" date="2019-07-10">
  69       CMSIS-Core(M): 5.3.0 (see revision history for details)
  70         - Added provisions for compiler-independent C startup code.
  71       CMSIS-Core(A): 1.1.4 (see revision history for details)
  72         - Fixed __FPU_Enable.
  73       CMSIS-DSP: 1.7.0 (see revision history for details)
  74         - New Neon versions of f32 functions
  75         - Python wrapper
  76         - Preliminary cmake build
  77         - Compilation flags for FFTs
  78         - Changes to arm_math.h
  79       CMSIS-NN: 1.2.0 (see revision history for details)
  80         - New function for depthwise convolution with asymmetric quantization.
  81         - New support functions for requantization.
  82       CMSIS-RTOS:
  83         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  84       CMSIS-RTOS2:
  85         - RTX 5.5.1 (see revision history for details)
  86       CMSIS-Driver: 2.7.1
  87         - WiFi Interface API 1.0.0
  88       Devices:
  89         - Generalized C startup code for all Cortex-M family devices.
  90         - Updated Cortex-A default memory regions and MMU configurations
  91         - Moved Cortex-A memory and system config files to avoid include path issues
  92     </release>
  93     <release version="5.5.1" date="2019-03-20">
  94       The following folders are deprecated
  95         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  96
  97       CMSIS-Core(M): 5.2.1 (see revision history for details)
  98         - Fixed compilation issue in cmsis_armclang_ltm.h
  99     </release>
 100     <release version="5.5.0" date="2019-03-18">
 101       The following folders have been removed:
 102         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 103         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 104       The following folders are deprecated
 105         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 106
 107       CMSIS-Core(M): 5.2.0 (see revision history for details)
 108         - Reworked Stack/Heap configuration for ARM startup files.
 109         - Added Cortex-M35P device support.
 110         - Added generic Armv8.1-M Mainline device support.
 111       CMSIS-Core(A): 1.1.3 (see revision history for details)
 112       CMSIS-DSP: 1.6.0 (see revision history for details)
 113         - reworked DSP library source files
 114         - reworked DSP library documentation
 115         - Changed DSP folder structure
 116         - moved DSP libraries to folder ./DSP/Lib
 117         - ARM DSP Libraries are built with ARMCLANG
 118         - Added DSP Libraries Source variant
 119       CMSIS-RTOS2:
 120         - RTX 5.5.0 (see revision history for details)
 121       CMSIS-Driver: 2.7.0
 122         - Added WiFi Interface API 1.0.0-beta
 123         - Added components for project specific driver implementations
 124       CMSIS-Pack: 1.6.0 (see revision history for details)
 125       Devices:
 126         - Added Cortex-M35P and ARMv81MML device templates.
 127         - Fixed C-Startup Code for GCC (aligned with other compilers)
 128       Utilities:
 129         - SVDConv 3.3.25
 130         - PackChk 1.3.82
 131     </release>
 132     <release version="5.4.0" date="2018-08-01">
 133       Aligned pack structure with repository.
 134       The following folders are deprecated:
 135         - CMSIS/Include/
 136         - CMSIS/DSP_Lib/
 137
 138       CMSIS-Core(M): 5.1.2 (see revision history for details)
 139         - Added Cortex-M1 support (beta).
 140       CMSIS-Core(A): 1.1.2 (see revision history for details)
 141       CMSIS-NN: 1.1.0
 142         - Added new math functions.
 143       CMSIS-RTOS2:
 144         - API 2.1.3 (see revision history for details)
 145         - RTX 5.4.0 (see revision history for details)
 146           * Updated exception handling on Cortex-A
 147       CMSIS-Driver:
 148         - Flash Driver API V2.2.0
 149       Utilities:
 150         - SVDConv 3.3.21
 151         - PackChk 1.3.71
 152     </release>
 153     <release version="5.3.0" date="2018-02-22">
 154       Updated Arm company brand.
 155       CMSIS-Core(M): 5.1.1 (see revision history for details)
 156       CMSIS-Core(A): 1.1.1 (see revision history for details)
 157       CMSIS-DAP: 2.0.0 (see revision history for details)
 158       CMSIS-NN: 1.0.0
 159         - Initial contribution of the bare metal Neural Network Library.
 160       CMSIS-RTOS2:
 161         - RTX 5.3.0 (see revision history for details)
 162         - OS Tick API 1.0.1
 163     </release>
 164     <release version="5.2.0" date="2017-11-16">
 165       CMSIS-Core(M): 5.1.0 (see revision history for details)
 166         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 167         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 168       CMSIS-Core(A): 1.1.0 (see revision history for details)
 169         - Added compiler_iccarm.h.
 170         - Added additional access functions for physical timer.
 171       CMSIS-DAP: 1.2.0 (see revision history for details)
 172       CMSIS-DSP: 1.5.2 (see revision history for details)
 173       CMSIS-Driver: 2.6.0 (see revision history for details)
 174         - CAN Driver API V1.2.0
 175         - NAND Driver API V2.3.0
 176       CMSIS-RTOS:
 177         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 178       CMSIS-RTOS2:
 179         - API 2.1.2 (see revision history for details)
 180         - RTX 5.2.3 (see revision history for details)
 181       Devices:
 182         - Added GCC startup and linker script for Cortex-A9.
 183         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 184         - Added IAR startup code for Cortex-A9
 185     </release>
 186     <release version="5.1.1" date="2017-09-19">
 187       CMSIS-RTOS2:
 188       - RTX 5.2.1 (see revision history for details)
 189     </release>
 190     <release version="5.1.0" date="2017-08-04">
 191       CMSIS-Core(M): 5.0.2 (see revision history for details)
 192       - Changed Version Control macros to be core agnostic.
 193       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 194       CMSIS-Core(A): 1.0.0 (see revision history for details)
 195       - Initial release
 196       - IRQ Controller API 1.0.0
 197       CMSIS-Driver: 2.05 (see revision history for details)
 198       - All typedefs related to status have been made volatile.
 199       CMSIS-RTOS2:
 200       - API 2.1.1 (see revision history for details)
 201       - RTX 5.2.0 (see revision history for details)
 202       - OS Tick API 1.0.0
 203       CMSIS-DSP: 1.5.2 (see revision history for details)
 204       - Fixed GNU Compiler specific diagnostics.
 205       CMSIS-Pack: 1.5.0 (see revision history for details)
 206       - added System Description File (*.SDF) Format
 207       CMSIS-Zone: 0.0.1 (Preview)
 208       - Initial specification draft
 209     </release>
 210     <release version="5.0.1" date="2017-02-03">
 211       Package Description:
 212       - added taxonomy for Cclass RTOS
 213       CMSIS-RTOS2:
 214       - API 2.1   (see revision history for details)
 215       - RTX 5.1.0 (see revision history for details)
 216       CMSIS-Core: 5.0.1 (see revision history for details)
 217       - Added __PACKED_STRUCT macro
 218       - Added uVisior support
 219       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 220       - Updated template for secure main function (main_s.c)
 221       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 222       CMSIS-DSP: 1.5.1 (see revision history for details)
 223       - added ARMv8M DSP libraries.
 224       CMSIS-Pack:1.4.9 (see revision history for details)
 225       - added Pack Index File specification and schema file
 226     </release>
 227     <release version="5.0.0" date="2016-11-11">
 228       Changed open source license to Apache 2.0
 229       CMSIS_Core:
 230        - Added support for Cortex-M23 and Cortex-M33.
 231        - Added ARMv8-M device configurations for mainline and baseline.
 232        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 233        - Added cmsis_compiler.h to unify compiler behaviour.
 234        - Updated function SCB_EnableICache (for Cortex-M7).
 235        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 236       CMSIS-RTOS:
 237         - bug fix in RTX 4.82 (see revision history for details)
 238       CMSIS-RTOS2:
 239         - new API including compatibility layer to CMSIS-RTOS
 240         - reference implementation based on RTX5
 241         - supports all Cortex-M variants including TrustZone for ARMv8-M
 242       CMSIS-SVD:
 243        - reworked SVD format documentation
 244        - removed SVD file database documentation as SVD files are distributed in packs
 245        - updated SVDConv for Win32 and Linux
 246       CMSIS-DSP:
 247        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 248        - Added DSP libraries build projects to CMSIS pack.
 249     </release>
 250     <release version="4.5.0" date="2015-10-28">
 251       - CMSIS-Core     4.30.0  (see revision history for details)
 252       - CMSIS-DAP      1.1.0   (unchanged)
 253       - CMSIS-Driver   2.04.0  (see revision history for details)
 254       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 255       - CMSIS-Pack     1.4.1   (see revision history for details)
 256       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 257       - CMSIS-SVD      1.3.1   (see revision history for details)
 258     </release>
 259     <release version="4.4.0" date="2015-09-11">
 260       - CMSIS-Core     4.20   (see revision history for details)
 261       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 262       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 263       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 264       - CMSIS-RTOS
 265         -- API         1.02   (unchanged)
 266         -- RTX         4.79   (see revision history for details)
 267       - CMSIS-SVD      1.3.0  (see revision history for details)
 268       - CMSIS-DAP      1.1.0  (extended with SWO support)
 269     </release>
 270     <release version="4.3.0" date="2015-03-20">
 271       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 272       - CMSIS-DSP      1.4.5  (see revision history for details)
 273       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 274       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 275       - CMSIS-RTOS
 276         -- API         1.02   (unchanged)
 277         -- RTX         4.78   (see revision history for details)
 278       - CMSIS-SVD      1.2    (unchanged)
 279     </release>
 280     <release version="4.2.0" date="2014-09-24">
 281       Adding Cortex-M7 support
 282       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 283       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 284       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 285       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 286       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 287     </release>
 288     <release version="4.1.1" date="2014-06-30">
 289       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 290     </release>
 291     <release version="4.1.0" date="2014-06-12">
 292       - CMSIS-Driver   2.02  (incompatible update)
 293       - CMSIS-Pack     1.3   (see revision history for details)
 294       - CMSIS-DSP      1.4.2 (unchanged)
 295       - CMSIS-Core     3.30  (unchanged)
 296       - CMSIS-RTOS RTX 4.74  (unchanged)
 297       - CMSIS-RTOS API 1.02  (unchanged)
 298       - CMSIS-SVD      1.10  (unchanged)
 299       PACK:
 300       - removed G++ specific files from PACK
 301       - added Component Startup variant "C Startup"
 302       - added Pack Checking Utility
 303       - updated conditions to reflect tool-chain dependency
 304       - added Taxonomy for Graphics
 305       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 306     </release>
 307     <!-- release version="4.0.0">
 308       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 309       - CMSIS-Pack     1.1   Preliminary
 310       - CMSIS-DSP      1.4.2 (see revision history for details)
 311       - CMSIS-Core     3.30  (see revision history for details)
 312       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 313       - CMSIS-RTOS API 1.02  (unchanged)
 314       - CMSIS-SVD      1.10  (unchanged)
 315     </release -->
 316     <release version="3.20.4" date="2014-02-20">
 317       - CMSIS-RTOS 4.74 (see revision history for details)
 318       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 319     </release>
 320     <!-- release version="3.20.3">
 321       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 322       - CMSIS-RTOS 4.73 (see revision history for details)
 323     </release -->
 324     <!-- release version="3.20.2">
 325       - CMSIS-Pack documentation has been added
 326       - CMSIS-Drivers header and documentation have been added to PACK
 327       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 328     </release -->
 329     <!-- release version="3.20.1">
 330       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 331       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 332     </release -->
 333     <!-- release version="3.20.0">
 334       The software portions that are deployed in the application program are now under a BSD license which allows usage
 335       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 336       The individual components have been update as listed below:
 337       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 338       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 339       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 340       - CMSIS-SVD is unchanged.
 341     </release -->
 342   </releases>
 343
 344   <taxonomy>
 345     <description Cclass="Audio">Software components for audio processing</description>
 346     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 347     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 348     <description Cclass="Compiler">Compiler Software Extensions</description>
 349     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 350     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 351     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 352     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 353     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 354     <description Cclass="File System">File Drive Support and File System</description>
 355     <description Cclass="IoT Client">IoT cloud client connector</description>
 356     <description Cclass="IoT Service">IoT specific services</description>
 357     <description Cclass="IoT Utility">IoT specific software utility</description>
 358     <description Cclass="Graphics">Graphical User Interface</description>
 359     <description Cclass="Network">Network Stack using Internet Protocols</description>
 360     <description Cclass="RTOS">Real-time Operating System</description>
 361     <description Cclass="Security">Encryption for secure communication or storage</description>
 362     <description Cclass="USB">Universal Serial Bus Stack</description>
 363     <description Cclass="Utility">Generic software utility components</description>
 364   </taxonomy>
 365
 366   <devices>
 367     <!-- ******************************  Cortex-M0  ****************************** -->
 368     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 369       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 370       <description>
 371 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 372 - simple, easy-to-use programmers model
 373 - highly efficient ultra-low power operation
 374 - excellent code density
 375 - deterministic, high-performance interrupt handling
 376 - upward compatibility with the rest of the Cortex-M processor family.
 377       </description>
 378       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 379       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 380       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 381       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 382
 383       <device Dname="ARMCM0">
 384         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 385         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 386       </device>
 387     </family>
 388
 389     <!-- ******************************  Cortex-M0P  ****************************** -->
 390     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 391       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 392       <description>
 393 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 394 - simple, easy-to-use programmers model
 395 - highly efficient ultra-low power operation
 396 - excellent code density
 397 - deterministic, high-performance interrupt handling
 398 - upward compatibility with the rest of the Cortex-M processor family.
 399       </description>
 400       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 401       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 402       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 403       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 404
 405       <device Dname="ARMCM0P">
 406         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 407         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 408       </device>
 409
 410       <device Dname="ARMCM0P_MPU">
 411         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 412         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 413       </device>
 414     </family>
 415
 416     <!-- ******************************  Cortex-M1  ****************************** -->
 417     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 418       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 419       <description>
 420 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 421 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 422       </description>
 423       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 424       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 425       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 426       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 427
 428       <device Dname="ARMCM1">
 429         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 430         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 431       </device>
 432     </family>
 433
 434     <!-- ******************************  Cortex-M3  ****************************** -->
 435     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 436       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 437       <description>
 438 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 439 - simple, easy-to-use programmers model
 440 - highly efficient ultra-low power operation
 441 - excellent code density
 442 - deterministic, high-performance interrupt handling
 443 - upward compatibility with the rest of the Cortex-M processor family.
 444       </description>
 445       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 446       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 447       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 448       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 449
 450       <device Dname="ARMCM3">
 451         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 452         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 453       </device>
 454     </family>
 455
 456     <!-- ******************************  Cortex-M4  ****************************** -->
 457     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 458       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 459       <description>
 460 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 461 - simple, easy-to-use programmers model
 462 - highly efficient ultra-low power operation
 463 - excellent code density
 464 - deterministic, high-performance interrupt handling
 465 - upward compatibility with the rest of the Cortex-M processor family.
 466       </description>
 467       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 468       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 469       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 470       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 471
 472       <device Dname="ARMCM4">
 473         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 474         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 475       </device>
 476
 477       <device Dname="ARMCM4_FP">
 478         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 479         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 480       </device>
 481     </family>
 482
 483     <!-- ******************************  Cortex-M7  ****************************** -->
 484     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 485       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 486       <description>
 487 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 488 - simple, easy-to-use programmers model
 489 - highly efficient ultra-low power operation
 490 - excellent code density
 491 - deterministic, high-performance interrupt handling
 492 - upward compatibility with the rest of the Cortex-M processor family.
 493       </description>
 494       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 495       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 496       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 497       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 498
 499       <device Dname="ARMCM7">
 500         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 501         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 502       </device>
 503
 504       <device Dname="ARMCM7_SP">
 505         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 506         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 507       </device>
 508
 509       <device Dname="ARMCM7_DP">
 510         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 511         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 512       </device>
 513     </family>
 514
 515     <!-- ******************************  Cortex-M23  ********************** -->
 516     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 517       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 518       <description>
 519 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 520 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 521 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 522       </description>
 523       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 524       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 525       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 526       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 527       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 528       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 529
 530       <device Dname="ARMCM23">
 531         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 532         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 533       </device>
 534
 535       <device Dname="ARMCM23_TZ">
 536         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 537         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 538       </device>
 539     </family>
 540
 541     <!-- ******************************  Cortex-M33  ****************************** -->
 542     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 543       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 544       <description>
 545 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 546 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 547       </description>
 548       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 549       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 550       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 551       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 552       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 553       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 554
 555       <device Dname="ARMCM33">
 556         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 557         <description>
 558           no DSP Instructions, no Floating Point Unit, no TrustZone
 559         </description>
 560         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 561       </device>
 562
 563       <device Dname="ARMCM33_TZ">
 564         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 565         <description>
 566           no DSP Instructions, no Floating Point Unit, TrustZone
 567         </description>
 568         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 569       </device>
 570
 571       <device Dname="ARMCM33_DSP_FP">
 572         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 573         <description>
 574           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 575         </description>
 576         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 577       </device>
 578
 579       <device Dname="ARMCM33_DSP_FP_TZ">
 580         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 581         <description>
 582           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 583         </description>
 584         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 585       </device>
 586     </family>
 587
 588     <!-- ******************************  Cortex-M35P  ****************************** -->
 589     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 590       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 591       <description>
 592 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 593 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 594       </description>
 595
 596       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 597       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 598       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 599       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 600       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 601       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 602
 603       <device Dname="ARMCM35P">
 604         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 605         <description>
 606           no DSP Instructions, no Floating Point Unit, no TrustZone
 607         </description>
 608         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 609       </device>
 610
 611       <device Dname="ARMCM35P_TZ">
 612         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 613         <description>
 614           no DSP Instructions, no Floating Point Unit, TrustZone
 615         </description>
 616         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 617       </device>
 618
 619       <device Dname="ARMCM35P_DSP_FP">
 620         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 621         <description>
 622           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 623         </description>
 624         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 625       </device>
 626
 627       <device Dname="ARMCM35P_DSP_FP_TZ">
 628         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 629         <description>
 630           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 631         </description>
 632         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 633       </device>
 634     </family>
 635
 636     <!-- ******************************  Cortex-M55  ****************************** -->
 637     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 638       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 639       <description>
 640 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 641 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 642 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 643       </description>
 644
 645       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 646       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 647       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 648       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 649       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 650       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 651
 652       <device Dname="ARMCM55">
 653         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 654         <description>
 655           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 656         </description>
 657         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 658       </device>
 659     </family>
 660
 661     <!-- ******************************  ARMSC000  ****************************** -->
 662     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 663       <description>
 664 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 665 - simple, easy-to-use programmers model
 666 - highly efficient ultra-low power operation
 667 - excellent code density
 668 - deterministic, high-performance interrupt handling
 669       </description>
 670       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 671       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 672       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 673       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 674
 675       <device Dname="ARMSC000">
 676         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 677         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 678       </device>
 679     </family>
 680
 681     <!-- ******************************  ARMSC300  ****************************** -->
 682     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 683       <description>
 684 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 685 - simple, easy-to-use programmers model
 686 - highly efficient ultra-low power operation
 687 - excellent code density
 688 - deterministic, high-performance interrupt handling
 689       </description>
 690       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 691       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 692       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 693       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 694
 695       <device Dname="ARMSC300">
 696         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 697         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 698       </device>
 699     </family>
 700
 701     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 702     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 703       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 704       <description>
 705 Armv8-M Baseline based device with TrustZone
 706       </description>
 707       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 708       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 709       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 710       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 711       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 712       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 713
 714       <device Dname="ARMv8MBL">
 715         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 716         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 717       </device>
 718     </family>
 719
 720     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 721     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 722       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 723       <description>
 724 Armv8-M Mainline based device with TrustZone
 725       </description>
 726       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 727       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 728       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 729       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 730       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 731       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 732
 733       <device Dname="ARMv8MML">
 734         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 735         <description>
 736           no DSP Instructions, no Floating Point Unit, TrustZone
 737         </description>
 738         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 739       </device>
 740
 741       <device Dname="ARMv8MML_DSP">
 742         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 743         <description>
 744           DSP Instructions, no Floating Point Unit, TrustZone
 745         </description>
 746         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 747       </device>
 748
 749       <device Dname="ARMv8MML_SP">
 750         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 751         <description>
 752           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 753         </description>
 754         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 755       </device>
 756
 757       <device Dname="ARMv8MML_DSP_SP">
 758         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 759         <description>
 760           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 761         </description>
 762         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 763       </device>
 764
 765       <device Dname="ARMv8MML_DP">
 766         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 767         <description>
 768           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 769         </description>
 770         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 771       </device>
 772
 773       <device Dname="ARMv8MML_DSP_DP">
 774         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 775         <description>
 776           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 777         </description>
 778         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 779       </device>
 780     </family>
 781
 782     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 783     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 784       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 785       <description>
 786 Armv8.1-M Mainline based device with TrustZone and MVE
 787       </description>
 788       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 789       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 790       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 791       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 792       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 793       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 794
 795
 796       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 797         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 798         <description>
 799           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 800         </description>
 801         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 802       </device>
 803     </family>
 804
 805     <!-- ******************************  Cortex-A5  ****************************** -->
 806     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 807       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 808       <description>
 809 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 810 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 811 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 812       </description>
 813
 814       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 815       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 816       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 817       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 818
 819       <device Dname="ARMCA5">
 820         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 821         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 822       </device>
 823     </family>
 824
 825     <!-- ******************************  Cortex-A7  ****************************** -->
 826     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 827       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 828       <description>
 829 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 830 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 831 an optional integrated GIC, and an optional L2 cache controller.
 832       </description>
 833
 834       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 835       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 836       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 837       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 838
 839       <device Dname="ARMCA7">
 840         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 841         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 842       </device>
 843     </family>
 844
 845     <!-- ******************************  Cortex-A9  ****************************** -->
 846     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 847       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 848       <description>
 849 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 850 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 851 and 8-bit Java bytecodes in Jazelle state.
 852       </description>
 853
 854       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 855       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 856       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 857       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 858
 859       <device Dname="ARMCA9">
 860         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 861         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 862       </device>
 863     </family>
 864   </devices>
 865
 866
 867   <apis>
 868     <!-- CMSIS Device API -->
 869     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 870       <description>Device interrupt controller interface</description>
 871       <files>
 872         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 873       </files>
 874     </api>
 875     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 876       <description>RTOS Kernel system tick timer interface</description>
 877       <files>
 878         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 879       </files>
 880     </api>
 881     <!-- CMSIS-RTOS API -->
 882     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 883       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 884       <files>
 885         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 886       </files>
 887     </api>
 888     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 889       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 890       <files>
 891         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 892         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 893       </files>
 894     </api>
 895     <!-- CMSIS Driver API -->
 896     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 897       <description>USART Driver API for Cortex-M</description>
 898       <files>
 899         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 900         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 901       </files>
 902     </api>
 903     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 904       <description>SPI Driver API for Cortex-M</description>
 905       <files>
 906         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 907         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 908       </files>
 909     </api>
 910     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 911       <description>SAI Driver API for Cortex-M</description>
 912       <files>
 913         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 914         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 915       </files>
 916     </api>
 917     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 918       <description>I2C Driver API for Cortex-M</description>
 919       <files>
 920         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 921         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 922       </files>
 923     </api>
 924     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 925       <description>CAN Driver API for Cortex-M</description>
 926       <files>
 927         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 928         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 929       </files>
 930     </api>
 931     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 932       <description>Flash Driver API for Cortex-M</description>
 933       <files>
 934         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 935         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 936       </files>
 937     </api>
 938     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 939       <description>MCI Driver API for Cortex-M</description>
 940       <files>
 941         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 942         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 943       </files>
 944     </api>
 945     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 946       <description>NAND Flash Driver API for Cortex-M</description>
 947       <files>
 948         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 949         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 950       </files>
 951     </api>
 952     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 953       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 954       <files>
 955         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 956         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 957         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 958       </files>
 959     </api>
 960     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 961       <description>Ethernet MAC Driver API for Cortex-M</description>
 962       <files>
 963         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 964         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 965       </files>
 966     </api>
 967     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 968       <description>Ethernet PHY Driver API for Cortex-M</description>
 969       <files>
 970         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 971         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 972       </files>
 973     </api>
 974     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 975       <description>USB Device Driver API for Cortex-M</description>
 976       <files>
 977         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 978         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 979       </files>
 980     </api>
 981     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 982       <description>USB Host Driver API for Cortex-M</description>
 983       <files>
 984         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 985         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 986       </files>
 987     </api>
 988     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 989       <description>WiFi driver</description>
 990       <files>
 991         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 992         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 993       </files>
 994     </api>
 995     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
 996       <description>Virtual I/O</description>
 997       <files>
 998         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
 999         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1000         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1001       </files>
1002     </api>
1003   </apis>
1004
1005   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1006   <conditions>
1007     <!-- compiler -->
1008     <condition id="ARMCC6">
1009       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1010       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1011     </condition>
1012     <condition id="ARMCC5">
1013       <require Tcompiler="ARMCC" Toptions="AC5"/>
1014     </condition>
1015     <condition id="ARMCC">
1016       <require Tcompiler="ARMCC"/>
1017     </condition>
1018     <condition id="GCC">
1019       <require Tcompiler="GCC"/>
1020     </condition>
1021     <condition id="IAR">
1022       <require Tcompiler="IAR"/>
1023     </condition>
1024     <condition id="ARMCC GCC">
1025       <accept Tcompiler="ARMCC"/>
1026       <accept Tcompiler="GCC"/>
1027     </condition>
1028     <condition id="ARMCC GCC IAR">
1029       <accept Tcompiler="ARMCC"/>
1030       <accept Tcompiler="GCC"/>
1031       <accept Tcompiler="IAR"/>
1032     </condition>
1033
1034     <!-- Arm architecture -->
1035     <condition id="ARMv6-M Device">
1036       <description>Armv6-M architecture based device</description>
1037       <accept Dcore="Cortex-M0"/>
1038       <accept Dcore="Cortex-M1"/>
1039       <accept Dcore="Cortex-M0+"/>
1040       <accept Dcore="SC000"/>
1041     </condition>
1042     <condition id="ARMv7-M Device">
1043       <description>Armv7-M architecture based device</description>
1044       <accept Dcore="Cortex-M3"/>
1045       <accept Dcore="Cortex-M4"/>
1046       <accept Dcore="Cortex-M7"/>
1047       <accept Dcore="SC300"/>
1048     </condition>
1049     <condition id="ARMv8-M Device">
1050       <description>Armv8-M architecture based device</description>
1051       <accept Dcore="ARMV8MBL"/>
1052       <accept Dcore="ARMV8MML"/>
1053       <accept Dcore="ARMV81MML"/>
1054       <accept Dcore="Cortex-M23"/>
1055       <accept Dcore="Cortex-M33"/>
1056       <accept Dcore="Cortex-M35P"/>
1057       <accept Dcore="Cortex-M55"/>
1058     </condition>
1059     <condition id="ARMv6_7-M Device">
1060       <description>Armv6_7-M architecture based device</description>
1061       <accept condition="ARMv6-M Device"/>
1062       <accept condition="ARMv7-M Device"/>
1063     </condition>
1064     <condition id="ARMv6_7_8-M Device">
1065       <description>Armv6_7_8-M architecture based device</description>
1066       <accept condition="ARMv6-M Device"/>
1067       <accept condition="ARMv7-M Device"/>
1068       <accept condition="ARMv8-M Device"/>
1069     </condition>
1070     <condition id="ARMv7-A Device">
1071       <description>Armv7-A architecture based device</description>
1072       <accept Dcore="Cortex-A5"/>
1073       <accept Dcore="Cortex-A7"/>
1074       <accept Dcore="Cortex-A9"/>
1075     </condition>
1076
1077     <condition id="TrustZone">
1078       <description>TrustZone</description>
1079       <require Dtz="TZ"/>
1080     </condition>
1081     <condition id="TZ Secure">
1082       <description>TrustZone (Secure)</description>
1083       <require Dtz="TZ"/>
1084       <require Dsecure="Secure"/>
1085     </condition>
1086     <condition id="TZ Non-secure">
1087       <description>TrustZone (Non-secure)</description>
1088       <require Dtz="TZ"/>
1089       <accept Dsecure="Non-secure"/>
1090       <accept Dsecure="TZ-disabled"/>
1091     </condition>
1092     <condition id="TZ Unavailable">
1093       <description>TrustZone not available</description>
1094       <deny Dtz="TZ"/>
1095     </condition>
1096
1097     <!-- ARM core -->
1098     <condition id="CM0">
1099       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1100       <accept Dcore="Cortex-M0"/>
1101       <accept Dcore="Cortex-M0+"/>
1102       <accept Dcore="SC000"/>
1103     </condition>
1104     <condition id="CM1">
1105       <description>Cortex-M1</description>
1106       <require Dcore="Cortex-M1"/>
1107     </condition>
1108     <condition id="CM3">
1109       <description>Cortex-M3 or SC300 processor based device</description>
1110       <accept Dcore="Cortex-M3"/>
1111       <accept Dcore="SC300"/>
1112     </condition>
1113     <condition id="CM4">
1114       <description>Cortex-M4 processor based device</description>
1115       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1116     </condition>
1117     <condition id="CM4_FP">
1118       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1119       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1120       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1121       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1122     </condition>
1123     <condition id="CM7">
1124       <description>Cortex-M7 processor based device</description>
1125       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1126     </condition>
1127     <condition id="CM7_FP">
1128       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1129       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1130       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1131     </condition>
1132     <condition id="CM23">
1133       <description>Cortex-M23 processor based device</description>
1134       <require Dcore="Cortex-M23"/>
1135     </condition>
1136     <condition id="CM33">
1137       <description>Cortex-M33 processor based device</description>
1138       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1139     </condition>
1140     <condition id="CM33_FP">
1141       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1142       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1143     </condition>
1144     <condition id="CM35P">
1145       <description>Cortex-M35P processor based device</description>
1146       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1147     </condition>
1148     <condition id="CM35P_FP">
1149       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1150       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1151     </condition>
1152     <condition id="ARMv8MBL">
1153       <description>Armv8-M Baseline processor based device</description>
1154       <require Dcore="ARMV8MBL"/>
1155     </condition>
1156     <condition id="ARMv8MML">
1157       <description>Armv8-M Mainline processor based device</description>
1158       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1159     </condition>
1160     <condition id="ARMv8MML_FP">
1161       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1162       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1163       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1164     </condition>
1165
1166     <condition id="CM55_NOFPU_NOMVE">
1167       <description>Cortex-M55, no FPU, no MVE</description>
1168       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1169     </condition>
1170     <condition id="CM55_NOFPU_MVE">
1171       <description>Cortex-M55, no FPU, MVE</description>
1172       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1173       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1174     </condition>
1175     <condition id="CM55_FPU">
1176       <description>Cortex-M55, FPU</description>
1177       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1178       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1179     </condition>
1180
1181     <condition id="CA5_CA9">
1182       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1183       <accept Dcore="Cortex-A5"/>
1184       <accept Dcore="Cortex-A9"/>
1185     </condition>
1186
1187     <condition id="CA7">
1188       <description>Cortex-A7 processor based device</description>
1189       <accept Dcore="Cortex-A7"/>
1190     </condition>
1191
1192     <!-- ARMCC compiler -->
1193     <condition id="CA_ARMCC5">
1194       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1195       <require condition="ARMv7-A Device"/>
1196       <require condition="ARMCC5"/>
1197     </condition>
1198     <condition id="CA_ARMCC6">
1199       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1200       <require condition="ARMv7-A Device"/>
1201       <require condition="ARMCC6"/>
1202     </condition>
1203
1204     <condition id="CM0_ARMCC">
1205       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1206       <require condition="CM0"/>
1207       <require Tcompiler="ARMCC"/>
1208     </condition>
1209     <condition id="CM0_LE_ARMCC">
1210       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1211       <require condition="CM0_ARMCC"/>
1212       <require Dendian="Little-endian"/>
1213     </condition>
1214     <condition id="CM0_BE_ARMCC">
1215       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1216       <require condition="CM0_ARMCC"/>
1217       <require Dendian="Big-endian"/>
1218     </condition>
1219
1220     <condition id="CM1_ARMCC">
1221       <description>Cortex-M1 based device for the Arm Compiler</description>
1222       <require condition="CM1"/>
1223       <require Tcompiler="ARMCC"/>
1224     </condition>
1225     <condition id="CM1_LE_ARMCC">
1226       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1227       <require condition="CM1_ARMCC"/>
1228       <require Dendian="Little-endian"/>
1229     </condition>
1230     <condition id="CM1_BE_ARMCC">
1231       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1232       <require condition="CM1_ARMCC"/>
1233       <require Dendian="Big-endian"/>
1234     </condition>
1235
1236     <condition id="CM3_ARMCC">
1237       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1238       <require condition="CM3"/>
1239       <require Tcompiler="ARMCC"/>
1240     </condition>
1241     <condition id="CM3_LE_ARMCC">
1242       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1243       <require condition="CM3_ARMCC"/>
1244       <require Dendian="Little-endian"/>
1245     </condition>
1246     <condition id="CM3_BE_ARMCC">
1247       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1248       <require condition="CM3_ARMCC"/>
1249       <require Dendian="Big-endian"/>
1250     </condition>
1251
1252     <condition id="CM4_ARMCC">
1253       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1254       <require condition="CM4"/>
1255       <require Tcompiler="ARMCC"/>
1256     </condition>
1257     <condition id="CM4_LE_ARMCC">
1258       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1259       <require condition="CM4_ARMCC"/>
1260       <require Dendian="Little-endian"/>
1261     </condition>
1262     <condition id="CM4_BE_ARMCC">
1263       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1264       <require condition="CM4_ARMCC"/>
1265       <require Dendian="Big-endian"/>
1266     </condition>
1267
1268     <condition id="CM4_FP_ARMCC">
1269       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1270       <require condition="CM4_FP"/>
1271       <require Tcompiler="ARMCC"/>
1272     </condition>
1273     <condition id="CM4_FP_LE_ARMCC">
1274       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1275       <require condition="CM4_FP_ARMCC"/>
1276       <require Dendian="Little-endian"/>
1277     </condition>
1278     <condition id="CM4_FP_BE_ARMCC">
1279       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1280       <require condition="CM4_FP_ARMCC"/>
1281       <require Dendian="Big-endian"/>
1282     </condition>
1283
1284     <condition id="CM7_ARMCC">
1285       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1286       <require condition="CM7"/>
1287       <require Tcompiler="ARMCC"/>
1288     </condition>
1289     <condition id="CM7_LE_ARMCC">
1290       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1291       <require condition="CM7_ARMCC"/>
1292       <require Dendian="Little-endian"/>
1293     </condition>
1294     <condition id="CM7_BE_ARMCC">
1295       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1296       <require condition="CM7_ARMCC"/>
1297       <require Dendian="Big-endian"/>
1298     </condition>
1299
1300     <condition id="CM7_FP_ARMCC">
1301       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1302       <require condition="CM7_FP"/>
1303       <require Tcompiler="ARMCC"/>
1304     </condition>
1305     <condition id="CM7_FP_LE_ARMCC">
1306       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1307       <require condition="CM7_FP_ARMCC"/>
1308       <require Dendian="Little-endian"/>
1309     </condition>
1310     <condition id="CM7_FP_BE_ARMCC">
1311       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1312       <require condition="CM7_FP_ARMCC"/>
1313       <require Dendian="Big-endian"/>
1314     </condition>
1315
1316     <condition id="CM23_ARMCC">
1317       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1318       <require condition="CM23"/>
1319       <require Tcompiler="ARMCC"/>
1320     </condition>
1321     <condition id="CM23_LE_ARMCC">
1322       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1323       <require condition="CM23_ARMCC"/>
1324       <require Dendian="Little-endian"/>
1325     </condition>
1326
1327     <condition id="CM33_ARMCC">
1328       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1329       <require condition="CM33"/>
1330       <require Tcompiler="ARMCC"/>
1331     </condition>
1332     <condition id="CM33_LE_ARMCC">
1333       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1334       <require condition="CM33_ARMCC"/>
1335       <require Dendian="Little-endian"/>
1336     </condition>
1337
1338     <condition id="CM33_FP_ARMCC">
1339       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1340       <require condition="CM33_FP"/>
1341       <require Tcompiler="ARMCC"/>
1342     </condition>
1343     <condition id="CM33_FP_LE_ARMCC">
1344       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1345       <require condition="CM33_FP_ARMCC"/>
1346       <require Dendian="Little-endian"/>
1347     </condition>
1348
1349     <condition id="CM35P_ARMCC">
1350       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1351       <require condition="CM35P"/>
1352       <require Tcompiler="ARMCC"/>
1353     </condition>
1354     <condition id="CM35P_LE_ARMCC">
1355       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1356       <require condition="CM35P_ARMCC"/>
1357       <require Dendian="Little-endian"/>
1358     </condition>
1359
1360     <condition id="CM35P_FP_ARMCC">
1361       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1362       <require condition="CM35P_FP"/>
1363       <require Tcompiler="ARMCC"/>
1364     </condition>
1365     <condition id="CM35P_FP_LE_ARMCC">
1366       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1367       <require condition="CM35P_FP_ARMCC"/>
1368       <require Dendian="Little-endian"/>
1369     </condition>
1370
1371     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1372       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1373       <require condition="CM55_NOFPU_NOMVE"/>
1374       <require Tcompiler="ARMCC"/>
1375     </condition>
1376     <condition id="CM55_NOFPU_MVE_ARMCC">
1377       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1378       <require condition="CM55_NOFPU_MVE"/>
1379       <require Tcompiler="ARMCC"/>
1380     </condition>
1381     <condition id="CM55_FPU_ARMCC">
1382       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1383       <require condition="CM55_FPU"/>
1384       <require Tcompiler="ARMCC"/>
1385     </condition>
1386     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1387       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1388       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1389       <require Dendian="Little-endian"/>
1390     </condition>
1391     <condition id="CM55_FPU_LE_ARMCC">
1392       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1393       <require condition="CM55_FPU_ARMCC"/>
1394       <require Dendian="Little-endian"/>
1395     </condition>
1396
1397     <condition id="ARMv8MBL_ARMCC">
1398       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1399       <require condition="ARMv8MBL"/>
1400       <require Tcompiler="ARMCC"/>
1401     </condition>
1402     <condition id="ARMv8MBL_LE_ARMCC">
1403       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1404       <require condition="ARMv8MBL_ARMCC"/>
1405       <require Dendian="Little-endian"/>
1406     </condition>
1407
1408     <condition id="ARMv8MML_ARMCC">
1409       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1410       <require condition="ARMv8MML"/>
1411       <require Tcompiler="ARMCC"/>
1412     </condition>
1413     <condition id="ARMv8MML_LE_ARMCC">
1414       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1415       <require condition="ARMv8MML_ARMCC"/>
1416       <require Dendian="Little-endian"/>
1417     </condition>
1418
1419     <condition id="ARMv8MML_FP_ARMCC">
1420       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1421       <require condition="ARMv8MML_FP"/>
1422       <require Tcompiler="ARMCC"/>
1423     </condition>
1424     <condition id="ARMv8MML_FP_LE_ARMCC">
1425       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1426       <require condition="ARMv8MML_FP_ARMCC"/>
1427       <require Dendian="Little-endian"/>
1428     </condition>
1429
1430     <condition id="TZ Secure ARMCC6">
1431       <description>TrustZone (Secure), Arm Compiler</description>
1432       <require condition="TZ Secure"/>
1433       <require condition="ARMCC6"/>
1434     </condition>
1435     <condition id="TZ Non-secure ARMCC6">
1436       <description>TrustZone (Non-secure), Arm Compiler</description>
1437       <require condition="TZ Non-secure"/>
1438       <require condition="ARMCC6"/>
1439     </condition>
1440     <condition id="TZ Unavailable ARMCC6">
1441       <description>TrustZone not available, Arm Compiler</description>
1442       <require condition="TZ Unavailable"/>
1443       <require condition="ARMCC6"/>
1444     </condition>
1445
1446     <!-- GCC compiler -->
1447     <condition id="CA_GCC">
1448       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1449       <require condition="ARMv7-A Device"/>
1450       <require Tcompiler="GCC"/>
1451     </condition>
1452
1453     <condition id="CM0_GCC">
1454       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1455       <require condition="CM0"/>
1456       <require Tcompiler="GCC"/>
1457     </condition>
1458     <condition id="CM0_LE_GCC">
1459       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1460       <require condition="CM0_GCC"/>
1461       <require Dendian="Little-endian"/>
1462     </condition>
1463     <condition id="CM0_BE_GCC">
1464       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1465       <require condition="CM0_GCC"/>
1466       <require Dendian="Big-endian"/>
1467     </condition>
1468
1469     <condition id="CM1_GCC">
1470       <description>Cortex-M1 based device for the GCC Compiler</description>
1471       <require condition="CM1"/>
1472       <require Tcompiler="GCC"/>
1473     </condition>
1474     <condition id="CM1_LE_GCC">
1475       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1476       <require condition="CM1_GCC"/>
1477       <require Dendian="Little-endian"/>
1478     </condition>
1479     <condition id="CM1_BE_GCC">
1480       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1481       <require condition="CM1_GCC"/>
1482       <require Dendian="Big-endian"/>
1483     </condition>
1484
1485     <condition id="CM3_GCC">
1486       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1487       <require condition="CM3"/>
1488       <require Tcompiler="GCC"/>
1489     </condition>
1490     <condition id="CM3_LE_GCC">
1491       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1492       <require condition="CM3_GCC"/>
1493       <require Dendian="Little-endian"/>
1494     </condition>
1495     <condition id="CM3_BE_GCC">
1496       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1497       <require condition="CM3_GCC"/>
1498       <require Dendian="Big-endian"/>
1499     </condition>
1500
1501     <condition id="CM4_GCC">
1502       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1503       <require condition="CM4"/>
1504       <require Tcompiler="GCC"/>
1505     </condition>
1506     <condition id="CM4_LE_GCC">
1507       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1508       <require condition="CM4_GCC"/>
1509       <require Dendian="Little-endian"/>
1510     </condition>
1511     <condition id="CM4_BE_GCC">
1512       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1513       <require condition="CM4_GCC"/>
1514       <require Dendian="Big-endian"/>
1515     </condition>
1516
1517     <condition id="CM4_FP_GCC">
1518       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1519       <require condition="CM4_FP"/>
1520       <require Tcompiler="GCC"/>
1521     </condition>
1522     <condition id="CM4_FP_LE_GCC">
1523       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1524       <require condition="CM4_FP_GCC"/>
1525       <require Dendian="Little-endian"/>
1526     </condition>
1527     <condition id="CM4_FP_BE_GCC">
1528       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1529       <require condition="CM4_FP_GCC"/>
1530       <require Dendian="Big-endian"/>
1531     </condition>
1532
1533     <condition id="CM7_GCC">
1534       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1535       <require condition="CM7"/>
1536       <require Tcompiler="GCC"/>
1537     </condition>
1538     <condition id="CM7_LE_GCC">
1539       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1540       <require condition="CM7_GCC"/>
1541       <require Dendian="Little-endian"/>
1542     </condition>
1543     <condition id="CM7_BE_GCC">
1544       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1545       <require condition="CM7_GCC"/>
1546       <require Dendian="Big-endian"/>
1547     </condition>
1548
1549     <condition id="CM7_FP_GCC">
1550       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1551       <require condition="CM7_FP"/>
1552       <require Tcompiler="GCC"/>
1553     </condition>
1554     <condition id="CM7_FP_LE_GCC">
1555       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1556       <require condition="CM7_FP_GCC"/>
1557       <require Dendian="Little-endian"/>
1558     </condition>
1559     <condition id="CM7_FP_BE_GCC">
1560       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1561       <require condition="CM7_FP_GCC"/>
1562       <require Dendian="Big-endian"/>
1563     </condition>
1564
1565     <condition id="CM23_GCC">
1566       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1567       <require condition="CM23"/>
1568       <require Tcompiler="GCC"/>
1569     </condition>
1570     <condition id="CM23_LE_GCC">
1571       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1572       <require condition="CM23_GCC"/>
1573       <require Dendian="Little-endian"/>
1574     </condition>
1575
1576     <condition id="CM33_GCC">
1577       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1578       <require condition="CM33"/>
1579       <require Tcompiler="GCC"/>
1580     </condition>
1581     <condition id="CM33_LE_GCC">
1582       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1583       <require condition="CM33_GCC"/>
1584       <require Dendian="Little-endian"/>
1585     </condition>
1586
1587     <condition id="CM33_FP_GCC">
1588       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1589       <require condition="CM33_FP"/>
1590       <require Tcompiler="GCC"/>
1591     </condition>
1592     <condition id="CM33_FP_LE_GCC">
1593       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1594       <require condition="CM33_FP_GCC"/>
1595       <require Dendian="Little-endian"/>
1596     </condition>
1597
1598     <condition id="CM35P_GCC">
1599       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1600       <require condition="CM35P"/>
1601       <require Tcompiler="GCC"/>
1602     </condition>
1603     <condition id="CM35P_LE_GCC">
1604       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1605       <require condition="CM35P_GCC"/>
1606       <require Dendian="Little-endian"/>
1607     </condition>
1608
1609     <condition id="CM35P_FP_GCC">
1610       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1611       <require condition="CM35P_FP"/>
1612       <require Tcompiler="GCC"/>
1613     </condition>
1614     <condition id="CM35P_FP_LE_GCC">
1615       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1616       <require condition="CM35P_FP_GCC"/>
1617       <require Dendian="Little-endian"/>
1618     </condition>
1619
1620     <condition id="CM55_NOFPU_NOMVE_GCC">
1621       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1622       <require condition="CM55_NOFPU_NOMVE"/>
1623       <require Tcompiler="GCC"/>
1624     </condition>
1625     <condition id="CM55_NOFPU_MVE_GCC">
1626       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1627       <require condition="CM55_NOFPU_MVE"/>
1628       <require Tcompiler="GCC"/>
1629     </condition>
1630     <condition id="CM55_FPU_GCC">
1631       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1632       <require condition="CM55_FPU"/>
1633       <require Tcompiler="GCC"/>
1634     </condition>
1635     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1636       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1637       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1638       <require Dendian="Little-endian"/>
1639     </condition>
1640     <condition id="CM55_FPU_LE_GCC">
1641       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1642       <require condition="CM55_FPU_GCC"/>
1643       <require Dendian="Little-endian"/>
1644     </condition>
1645
1646     <condition id="ARMv8MBL_GCC">
1647       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1648       <require condition="ARMv8MBL"/>
1649       <require Tcompiler="GCC"/>
1650     </condition>
1651     <condition id="ARMv8MBL_LE_GCC">
1652       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1653       <require condition="ARMv8MBL_GCC"/>
1654       <require Dendian="Little-endian"/>
1655     </condition>
1656
1657     <condition id="ARMv8MML_GCC">
1658       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1659       <require condition="ARMv8MML"/>
1660       <require Tcompiler="GCC"/>
1661     </condition>
1662     <condition id="ARMv8MML_LE_GCC">
1663       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1664       <require condition="ARMv8MML_GCC"/>
1665       <require Dendian="Little-endian"/>
1666     </condition>
1667
1668     <condition id="ARMv8MML_FP_GCC">
1669       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1670       <require condition="ARMv8MML_FP"/>
1671       <require Tcompiler="GCC"/>
1672     </condition>
1673     <condition id="ARMv8MML_FP_LE_GCC">
1674       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1675       <require condition="ARMv8MML_FP_GCC"/>
1676       <require Dendian="Little-endian"/>
1677     </condition>
1678
1679     <!-- IAR compiler -->
1680     <condition id="CA_IAR">
1681       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1682       <require condition="ARMv7-A Device"/>
1683       <require Tcompiler="IAR"/>
1684     </condition>
1685
1686     <condition id="CM0_IAR">
1687       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1688       <require condition="CM0"/>
1689       <require Tcompiler="IAR"/>
1690     </condition>
1691     <condition id="CM0_LE_IAR">
1692       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1693       <require condition="CM0_IAR"/>
1694       <require Dendian="Little-endian"/>
1695     </condition>
1696     <condition id="CM0_BE_IAR">
1697       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1698       <require condition="CM0_IAR"/>
1699       <require Dendian="Big-endian"/>
1700     </condition>
1701
1702     <condition id="CM1_IAR">
1703       <description>Cortex-M1 based device for the IAR Compiler</description>
1704       <require condition="CM1"/>
1705       <require Tcompiler="IAR"/>
1706     </condition>
1707     <condition id="CM1_LE_IAR">
1708       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1709       <require condition="CM1_IAR"/>
1710       <require Dendian="Little-endian"/>
1711     </condition>
1712     <condition id="CM1_BE_IAR">
1713       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1714       <require condition="CM1_IAR"/>
1715       <require Dendian="Big-endian"/>
1716     </condition>
1717
1718     <condition id="CM3_IAR">
1719       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1720       <require condition="CM3"/>
1721       <require Tcompiler="IAR"/>
1722     </condition>
1723     <condition id="CM3_LE_IAR">
1724       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1725       <require condition="CM3_IAR"/>
1726       <require Dendian="Little-endian"/>
1727     </condition>
1728     <condition id="CM3_BE_IAR">
1729       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1730       <require condition="CM3_IAR"/>
1731       <require Dendian="Big-endian"/>
1732     </condition>
1733
1734     <condition id="CM4_IAR">
1735       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1736       <require condition="CM4"/>
1737       <require Tcompiler="IAR"/>
1738     </condition>
1739     <condition id="CM4_LE_IAR">
1740       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1741       <require condition="CM4_IAR"/>
1742       <require Dendian="Little-endian"/>
1743     </condition>
1744     <condition id="CM4_BE_IAR">
1745       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1746       <require condition="CM4_IAR"/>
1747       <require Dendian="Big-endian"/>
1748     </condition>
1749
1750     <condition id="CM4_FP_IAR">
1751       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1752       <require condition="CM4_FP"/>
1753       <require Tcompiler="IAR"/>
1754     </condition>
1755     <condition id="CM4_FP_LE_IAR">
1756       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1757       <require condition="CM4_FP_IAR"/>
1758       <require Dendian="Little-endian"/>
1759     </condition>
1760     <condition id="CM4_FP_BE_IAR">
1761       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1762       <require condition="CM4_FP_IAR"/>
1763       <require Dendian="Big-endian"/>
1764     </condition>
1765
1766     <condition id="CM7_IAR">
1767       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1768       <require condition="CM7"/>
1769       <require Tcompiler="IAR"/>
1770     </condition>
1771     <condition id="CM7_LE_IAR">
1772       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1773       <require condition="CM7_IAR"/>
1774       <require Dendian="Little-endian"/>
1775     </condition>
1776     <condition id="CM7_BE_IAR">
1777       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1778       <require condition="CM7_IAR"/>
1779       <require Dendian="Big-endian"/>
1780     </condition>
1781
1782     <condition id="CM7_FP_IAR">
1783       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1784       <require condition="CM7_FP"/>
1785       <require Tcompiler="IAR"/>
1786     </condition>
1787     <condition id="CM7_FP_LE_IAR">
1788       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1789       <require condition="CM7_FP_IAR"/>
1790       <require Dendian="Little-endian"/>
1791     </condition>
1792     <condition id="CM7_FP_BE_IAR">
1793       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1794       <require condition="CM7_FP_IAR"/>
1795       <require Dendian="Big-endian"/>
1796     </condition>
1797
1798     <condition id="CM23_IAR">
1799       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1800       <require condition="CM23"/>
1801       <require Tcompiler="IAR"/>
1802     </condition>
1803     <condition id="CM23_LE_IAR">
1804       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1805       <require condition="CM23_IAR"/>
1806       <require Dendian="Little-endian"/>
1807     </condition>
1808
1809     <condition id="CM33_IAR">
1810       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1811       <require condition="CM33"/>
1812       <require Tcompiler="IAR"/>
1813     </condition>
1814     <condition id="CM33_LE_IAR">
1815       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1816       <require condition="CM33_IAR"/>
1817       <require Dendian="Little-endian"/>
1818     </condition>
1819
1820     <condition id="CM33_FP_IAR">
1821       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1822       <require condition="CM33_FP"/>
1823       <require Tcompiler="IAR"/>
1824     </condition>
1825     <condition id="CM33_FP_LE_IAR">
1826       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1827       <require condition="CM33_FP_IAR"/>
1828       <require Dendian="Little-endian"/>
1829     </condition>
1830
1831     <condition id="CM35P_IAR">
1832       <description>Cortex-M35P processor based device for the IAR Compiler</description>
1833       <require condition="CM35P"/>
1834       <require Tcompiler="IAR"/>
1835     </condition>
1836     <condition id="CM35P_LE_IAR">
1837       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
1838       <require condition="CM35P_IAR"/>
1839       <require Dendian="Little-endian"/>
1840     </condition>
1841
1842     <condition id="CM35P_FP_IAR">
1843       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
1844       <require condition="CM35P_FP"/>
1845       <require Tcompiler="IAR"/>
1846     </condition>
1847     <condition id="CM35P_FP_LE_IAR">
1848       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1849       <require condition="CM35P_FP_IAR"/>
1850       <require Dendian="Little-endian"/>
1851     </condition>
1852
1853     <condition id="CM55_NOFPU_NOMVE_IAR">
1854       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
1855       <require condition="CM55_NOFPU_NOMVE"/>
1856       <require Tcompiler="IAR"/>
1857     </condition>
1858     <condition id="CM55_NOFPU_MVE_IAR">
1859       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
1860       <require condition="CM55_NOFPU_MVE"/>
1861       <require Tcompiler="IAR"/>
1862     </condition>
1863     <condition id="CM55_FPU_IAR">
1864       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
1865       <require condition="CM55_FPU"/>
1866       <require Tcompiler="IAR"/>
1867     </condition>
1868     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
1869       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
1870       <require condition="CM55_NOFPU_NOMVE_IAR"/>
1871       <require Dendian="Little-endian"/>
1872     </condition>
1873     <condition id="CM55_FPU_LE_IAR">
1874       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
1875       <require condition="CM55_FPU_IAR"/>
1876       <require Dendian="Little-endian"/>
1877     </condition>
1878
1879     <condition id="ARMv8MBL_IAR">
1880       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1881       <require condition="ARMv8MBL"/>
1882       <require Tcompiler="IAR"/>
1883     </condition>
1884     <condition id="ARMv8MBL_LE_IAR">
1885       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1886       <require condition="ARMv8MBL_IAR"/>
1887       <require Dendian="Little-endian"/>
1888     </condition>
1889
1890     <condition id="ARMv8MML_IAR">
1891       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1892       <require condition="ARMv8MML"/>
1893       <require Tcompiler="IAR"/>
1894     </condition>
1895     <condition id="ARMv8MML_LE_IAR">
1896       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1897       <require condition="ARMv8MML_IAR"/>
1898       <require Dendian="Little-endian"/>
1899     </condition>
1900
1901     <condition id="ARMv8MML_FP_IAR">
1902       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1903       <require condition="ARMv8MML_FP"/>
1904       <require Tcompiler="IAR"/>
1905     </condition>
1906     <condition id="ARMv8MML_FP_LE_IAR">
1907       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1908       <require condition="ARMv8MML_FP_IAR"/>
1909       <require Dendian="Little-endian"/>
1910     </condition>
1911
1912     <!-- conditions selecting single devices and CMSIS Core -->
1913     <condition id="ARMCM0 CMSIS">
1914       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1915       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1916       <require Cclass="CMSIS" Cgroup="CORE"/>
1917     </condition>
1918
1919     <condition id="ARMCM0+ CMSIS">
1920       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1921       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1922       <require Cclass="CMSIS" Cgroup="CORE"/>
1923     </condition>
1924
1925     <condition id="ARMCM1 CMSIS">
1926       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
1927       <require Dvendor="ARM:82" Dname="ARMCM1"/>
1928       <require Cclass="CMSIS" Cgroup="CORE"/>
1929     </condition>
1930
1931     <condition id="ARMCM3 CMSIS">
1932       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1933       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1934       <require Cclass="CMSIS" Cgroup="CORE"/>
1935     </condition>
1936
1937     <condition id="ARMCM4 CMSIS">
1938       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1939       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1940       <require Cclass="CMSIS" Cgroup="CORE"/>
1941     </condition>
1942
1943     <condition id="ARMCM7 CMSIS">
1944       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1945       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1946       <require Cclass="CMSIS" Cgroup="CORE"/>
1947     </condition>
1948
1949     <condition id="ARMCM23 CMSIS">
1950       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1951       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1952       <require Cclass="CMSIS" Cgroup="CORE"/>
1953     </condition>
1954
1955     <condition id="ARMCM33 CMSIS">
1956       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1957       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1958       <require Cclass="CMSIS" Cgroup="CORE"/>
1959     </condition>
1960
1961     <condition id="ARMCM35P CMSIS">
1962       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
1963       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
1964       <require Cclass="CMSIS" Cgroup="CORE"/>
1965     </condition>
1966
1967     <condition id="ARMCM55 CMSIS">
1968       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
1969       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
1970       <require Cclass="CMSIS" Cgroup="CORE"/>
1971     </condition>
1972
1973     <condition id="ARMSC000 CMSIS">
1974       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1975       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1976       <require Cclass="CMSIS" Cgroup="CORE"/>
1977     </condition>
1978
1979     <condition id="ARMSC300 CMSIS">
1980       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1981       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1982       <require Cclass="CMSIS" Cgroup="CORE"/>
1983     </condition>
1984
1985     <condition id="ARMv8MBL CMSIS">
1986       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1987       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1988       <require Cclass="CMSIS" Cgroup="CORE"/>
1989     </condition>
1990
1991     <condition id="ARMv8MML CMSIS">
1992       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1993       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1994       <require Cclass="CMSIS" Cgroup="CORE"/>
1995     </condition>
1996
1997     <condition id="ARMv81MML CMSIS">
1998       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
1999       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2000       <require Cclass="CMSIS" Cgroup="CORE"/>
2001     </condition>
2002
2003     <condition id="ARMCA5 CMSIS">
2004       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2005       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2006       <require Cclass="CMSIS" Cgroup="CORE"/>
2007     </condition>
2008
2009     <condition id="ARMCA7 CMSIS">
2010       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2011       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2012       <require Cclass="CMSIS" Cgroup="CORE"/>
2013     </condition>
2014
2015     <condition id="ARMCA9 CMSIS">
2016       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2017       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2018       <require Cclass="CMSIS" Cgroup="CORE"/>
2019     </condition>
2020
2021     <!-- CMSIS DSP -->
2022     <condition id="CMSIS DSP">
2023       <description>Components required for DSP</description>
2024       <require condition="ARMv6_7_8-M Device"/>
2025       <require condition="ARMCC GCC IAR"/>
2026       <require Cclass="CMSIS" Cgroup="CORE"/>
2027     </condition>
2028
2029     <!-- CMSIS NN -->
2030     <condition id="CMSIS NN">
2031       <description>Components required for NN</description>
2032       <require Cclass="CMSIS" Cgroup="DSP"/>
2033     </condition>
2034
2035     <!-- RTOS RTX -->
2036     <condition id="RTOS RTX">
2037       <description>Components required for RTOS RTX</description>
2038       <require condition="ARMv6_7-M Device"/>
2039       <require condition="ARMCC GCC IAR"/>
2040       <require Cclass="Device" Cgroup="Startup"/>
2041       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2042     </condition>
2043     <condition id="RTOS RTX IFX">
2044       <description>Components required for RTOS RTX IFX</description>
2045       <require condition="ARMv6_7-M Device"/>
2046       <require condition="ARMCC GCC IAR"/>
2047       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2048       <require Cclass="Device" Cgroup="Startup"/>
2049       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2050     </condition>
2051     <condition id="RTOS RTX5">
2052       <description>Components required for RTOS RTX5</description>
2053       <require condition="ARMv6_7_8-M Device"/>
2054       <require condition="ARMCC GCC IAR"/>
2055       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2056     </condition>
2057     <condition id="RTOS2 RTX5">
2058       <description>Components required for RTOS2 RTX5</description>
2059       <require condition="ARMv6_7_8-M Device"/>
2060       <require condition="ARMCC GCC IAR"/>
2061       <require Cclass="CMSIS"  Cgroup="CORE"/>
2062       <require Cclass="Device" Cgroup="Startup"/>
2063     </condition>
2064     <condition id="RTOS2 RTX5 v7-A">
2065       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2066       <require condition="ARMv7-A Device"/>
2067       <require condition="ARMCC GCC IAR"/>
2068       <require Cclass="CMSIS"  Cgroup="CORE"/>
2069       <require Cclass="Device" Cgroup="Startup"/>
2070       <require Cclass="Device" Cgroup="OS Tick"/>
2071       <require Cclass="Device" Cgroup="IRQ Controller"/>
2072     </condition>
2073     <condition id="RTOS2 RTX5 NS">
2074       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2075       <require condition="ARMv8-M Device"/>
2076       <require condition="TZ Non-secure"/>
2077       <require condition="ARMCC GCC IAR"/>
2078       <require Cclass="CMSIS"  Cgroup="CORE"/>
2079       <require Cclass="Device" Cgroup="Startup"/>
2080     </condition>
2081
2082     <!-- OS Tick -->
2083     <condition id="OS Tick PTIM">
2084       <description>Components required for OS Tick Private Timer</description>
2085       <require condition="CA5_CA9"/>
2086       <require Cclass="Device" Cgroup="IRQ Controller"/>
2087     </condition>
2088
2089     <condition id="OS Tick GTIM">
2090       <description>Components required for OS Tick Generic Physical Timer</description>
2091       <require condition="CA7"/>
2092       <require Cclass="Device" Cgroup="IRQ Controller"/>
2093     </condition>
2094
2095   </conditions>
2096
2097   <components>
2098     <!-- CMSIS-Core component -->
2099     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2100       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2101       <files>
2102         <!-- CPU independent -->
2103         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2104         <file category="include" name="CMSIS/Core/Include/"/>
2105         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2106         <!-- Code template -->
2107         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2108         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2109       </files>
2110     </component>
2111
2112     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.0"  condition="ARMv7-A Device" >
2113       <description>CMSIS-CORE for Cortex-A</description>
2114       <files>
2115         <!-- CPU independent -->
2116         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2117         <file category="include" name="CMSIS/Core_A/Include/"/>
2118       </files>
2119     </component>
2120
2121     <!-- CMSIS-Startup components -->
2122     <!-- Cortex-M0 -->
2123     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
2124       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2125       <files>
2126         <!-- include folder / device header file -->
2127         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2128         <!-- startup / system file -->
2129         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2130         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2131         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2132         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2133         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2134       </files>
2135     </component>
2136     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2137       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2138       <files>
2139         <!-- include folder / device header file -->
2140         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2141         <!-- startup / system file -->
2142         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2143         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.1.0" attr="config" condition="GCC"/>
2144         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2145         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2146         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2147       </files>
2148     </component>
2149
2150     <!-- Cortex-M0+ -->
2151     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
2152       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2153       <files>
2154         <!-- include folder / device header file -->
2155         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2156         <!-- startup / system file -->
2157         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2158         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2159         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2160         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2161         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2162       </files>
2163     </component>
2164     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2165       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2166       <files>
2167         <!-- include folder / device header file -->
2168         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2169         <!-- startup / system file -->
2170         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2171         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.1.0" attr="config" condition="GCC"/>
2172         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2173         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2174         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2175       </files>
2176     </component>
2177
2178     <!-- Cortex-M1 -->
2179     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
2180       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2181       <files>
2182         <!-- include folder / device header file -->
2183         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2184         <!-- startup / system file -->
2185         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2186         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2187         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2188         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2189         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2190       </files>
2191     </component>
2192     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2193       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2194       <files>
2195         <!-- include folder / device header file -->
2196         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2197         <!-- startup / system file -->
2198         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2199         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.1.0" attr="config" condition="GCC"/>
2200         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2201         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2202         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2203       </files>
2204     </component>
2205
2206     <!-- Cortex-M3 -->
2207     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
2208       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2209       <files>
2210         <!-- include folder / device header file -->
2211         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2212         <!-- startup / system file -->
2213         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2214         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2215         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2216         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2217         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2218       </files>
2219     </component>
2220     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2221       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2222       <files>
2223         <!-- include folder / device header file -->
2224         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2225         <!-- startup / system file -->
2226         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2227         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.1.0" attr="config" condition="GCC"/>
2228         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2229         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2230         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2231       </files>
2232     </component>
2233
2234     <!-- Cortex-M4 -->
2235     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
2236       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2237       <files>
2238         <!-- include folder / device header file -->
2239         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2240         <!-- startup / system file -->
2241         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2242         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2243         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2244         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2245        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2246       </files>
2247     </component>
2248     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2249       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2250       <files>
2251         <!-- include folder / device header file -->
2252         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2253         <!-- startup / system file -->
2254         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2255         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.1.0" attr="config" condition="GCC"/>
2256         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2257         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2258         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2259       </files>
2260     </component>
2261
2262     <!-- Cortex-M7 -->
2263     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
2264       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2265       <files>
2266         <!-- include folder / device header file -->
2267         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2268         <!-- startup / system file -->
2269         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2270         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2271         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2272         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2273         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2274       </files>
2275     </component>
2276     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2277       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2278       <files>
2279         <!-- include folder / device header file -->
2280         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2281         <!-- startup / system file -->
2282         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2283         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.1.0" attr="config" condition="GCC"/>
2284         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2285         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2286         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2287       </files>
2288     </component>
2289
2290     <!-- Cortex-M23 -->
2291     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
2292       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2293       <files>
2294         <!-- include folder / device header file -->
2295         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2296         <!-- startup / system file -->
2297         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
2298         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2299         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2300         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2301         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2302         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2303         <!-- SAU configuration -->
2304         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2305       </files>
2306     </component>
2307     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
2308       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2309       <files>
2310         <!-- include folder / device header file -->
2311         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2312         <!-- startup / system file -->
2313         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2314         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2315         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2316         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2317         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
2318         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2319         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
2320         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2321         <!-- SAU configuration -->
2322         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2323       </files>
2324     </component>
2325
2326     <!-- Cortex-M33 -->
2327     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
2328       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2329       <files>
2330         <!-- include folder / device header file -->
2331         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2332         <!-- startup / system file -->
2333         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
2334         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2335         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2336         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2337         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2338         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2339         <!-- SAU configuration -->
2340         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2341       </files>
2342     </component>
2343     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
2344       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2345       <files>
2346         <!-- include folder / device header file -->
2347         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2348         <!-- startup / system file -->
2349         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2350         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2351         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2352         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2353         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.2.0" attr="config" condition="GCC"/>
2354         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2355         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
2356         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2357         <!-- SAU configuration -->
2358         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2359       </files>
2360     </component>
2361
2362     <!-- Cortex-M35P -->
2363     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
2364       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2365       <files>
2366         <!-- include folder / device header file -->
2367         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2368         <!-- startup / system file -->
2369         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
2370         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2371         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2372         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2373         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2374         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2375         <!-- SAU configuration -->
2376         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2377       </files>
2378     </component>
2379     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
2380       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2381       <files>
2382         <!-- include folder / device header file -->
2383         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2384         <!-- startup / system file -->
2385         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2386         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2387         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2388         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2389         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.2.0" attr="config" condition="GCC"/>
2390         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2391         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
2392         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2393         <!-- SAU configuration -->
2394         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2395       </files>
2396     </component>
2397
2398     <!-- Cortex-M55 -->
2399     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
2400       <description>System and Startup for Generic Cortex-M55 device</description>
2401       <files>
2402         <!-- include folder / device header file -->
2403         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2404         <!-- startup / system file -->
2405         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
2406         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2407         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2408         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2409         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2410         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.0" attr="config"/>
2411         <!-- SAU configuration -->
2412         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2413       </files>
2414     </component>
2415
2416     <!-- Cortex-SC000 -->
2417     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2418       <description>System and Startup for Generic Arm SC000 device</description>
2419       <files>
2420         <!-- include folder / device header file -->
2421         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2422         <!-- startup / system file -->
2423         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2424         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2425         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2426         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2427         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2428       </files>
2429     </component>
2430     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2431       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2432       <files>
2433         <!-- include folder / device header file -->
2434         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2435         <!-- startup / system file -->
2436         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2437         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.1.0" attr="config" condition="GCC"/>
2438         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2439         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2440         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2441       </files>
2442     </component>
2443
2444     <!-- Cortex-SC300 -->
2445     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2446       <description>System and Startup for Generic Arm SC300 device</description>
2447       <files>
2448         <!-- include folder / device header file -->
2449         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2450         <!-- startup / system file -->
2451         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2452         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2453         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2454         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2455         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2456       </files>
2457     </component>
2458     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2459       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2460       <files>
2461         <!-- include folder / device header file -->
2462         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2463         <!-- startup / system file -->
2464         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2465         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.1.0" attr="config" condition="GCC"/>
2466         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2467         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2468         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2469       </files>
2470     </component>
2471
2472     <!-- ARMv8MBL -->
2473     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2474       <description>System and Startup for Generic Armv8-M Baseline device</description>
2475       <files>
2476         <!-- include folder / device header file -->
2477         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2478         <!-- startup / system file -->
2479         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2480         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2481         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2482         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2483         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2484         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2485         <!-- SAU configuration -->
2486         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2487       </files>
2488     </component>
2489     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2490       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2491       <files>
2492         <!-- include folder / device header file -->
2493         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2494         <!-- startup / system file -->
2495         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2496         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2497         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2498         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2499         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2500         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2501         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2502         <!-- SAU configuration -->
2503         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2504       </files>
2505     </component>
2506
2507     <!-- ARMv8MML -->
2508     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2509       <description>System and Startup for Generic Armv8-M Mainline device</description>
2510       <files>
2511         <!-- include folder / device header file -->
2512         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2513         <!-- startup / system file -->
2514         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2515         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2516         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2517         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2518         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2519         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2520         <!-- SAU configuration -->
2521         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2522       </files>
2523     </component>
2524     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2525       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2526       <files>
2527         <!-- include folder / device header file -->
2528         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2529         <!-- startup / system file -->
2530         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2531         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2532         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2533         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2534         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.2.0" attr="config" condition="GCC"/>
2535         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2536         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2537         <!-- SAU configuration -->
2538         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2539       </files>
2540     </component>
2541
2542     <!-- ARMv81MML -->
2543     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2544       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2545       <files>
2546         <!-- include folder / device header file -->
2547         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2548         <!-- startup / system file -->
2549         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2550         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2551         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2552         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2553         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2554         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2555         <!-- SAU configuration -->
2556         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2557       </files>
2558     </component>
2559
2560     <!-- Cortex-A5 -->
2561     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2562       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2563       <files>
2564         <!-- include folder / device header file -->
2565         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2566         <!-- startup / system / mmu files -->
2567         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2568         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2569         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2570         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2571         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2572         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2573         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2574         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2575         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2576         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2577         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2578         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2579
2580       </files>
2581     </component>
2582
2583     <!-- Cortex-A7 -->
2584     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2585       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2586       <files>
2587         <!-- include folder / device header file -->
2588         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2589         <!-- startup / system / mmu files -->
2590         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2591         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2592         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2593         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2594         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2595         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2596         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2597         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2598         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2599         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2600         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2601         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2602       </files>
2603     </component>
2604
2605     <!-- Cortex-A9 -->
2606     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2607       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2608       <files>
2609         <!-- include folder / device header file -->
2610         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2611         <!-- startup / system / mmu files -->
2612         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2613         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2614         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2615         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2616         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2617         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2618         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2619         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2620         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2621         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2622         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2623         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2624       </files>
2625     </component>
2626
2627     <!-- IRQ Controller -->
2628     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2629       <description>IRQ Controller implementation using GIC</description>
2630       <files>
2631         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2632       </files>
2633     </component>
2634
2635     <!-- OS Tick -->
2636     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2637       <description>OS Tick implementation using Private Timer</description>
2638       <files>
2639         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2640       </files>
2641     </component>
2642
2643     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2644       <description>OS Tick implementation using Generic Physical Timer</description>
2645       <files>
2646         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2647       </files>
2648     </component>
2649
2650     <!-- CMSIS-DSP component -->
2651     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.9.0-dev" isDefaultVariant="true" condition="CMSIS DSP">
2652       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2653       <files>
2654         <!-- CPU independent -->
2655         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
2656         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
2657         <file category="header"   name="CMSIS/DSP/Include/arm_math_f16.h"/>
2658         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables.h"/>
2659         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables_f16.h"/>
2660         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs.h"/>
2661         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs_f16.h"/>
2662
2663         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
2664         <file category="include"  name="CMSIS/DSP/Include/"/>
2665
2666         <!-- DSP sources (core) -->
2667         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
2668
2669         <file category="source"   name="CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c"/>
2670
2671         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
2672         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
2673         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
2674         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
2675         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
2676         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
2677         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
2678         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
2679         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
2680         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
2681         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
2682         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
2683
2684         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c"/>
2685
2686         <!-- DSP sources F16 versions -->
2687         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c"/>
2688         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c"/>
2689         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c"/>
2690         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTablesF16.c"/>
2691         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c"/>
2692         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c"/>
2693         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c"/>
2694         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c"/>
2695         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c"/>
2696         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c"/>
2697         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c"/>
2698         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c"/>
2699         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c"/>
2700
2701         <!-- Compute Library for Cortex-A -->
2702         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
2703         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
2704       </files>
2705     </component>
2706
2707     <!-- CMSIS-NN component -->
2708     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.4.0" condition="CMSIS NN">
2709       <description>CMSIS-NN Neural Network Library</description>
2710       <files>
2711         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2712         <file category="header" name="CMSIS/NN/Include/arm_nn_types.h"/>
2713         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2714         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
2715         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
2716
2717         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2718         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2719         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2720         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
2721         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
2722         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
2723         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
2724         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2725         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c"/>
2726         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2727         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2728         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
2729         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
2730         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
2731         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
2732         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
2733         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
2734         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2735         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2736         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
2737         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c"/>
2738         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2739         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2740         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
2741         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2742         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2743         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
2744         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
2745         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
2746         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
2747         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c"/>
2748         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
2749         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
2750         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2751         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
2752         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
2753         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
2754         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2755         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2756         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2757         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2758         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
2759         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2760         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2761         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
2762         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c"/>
2763         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
2764         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
2765         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
2766         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c"/>
2767         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
2768         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
2769         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2770         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c"/>
2771         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2772         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
2773         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2774         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
2775         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
2776         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2777         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2778         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2779         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2780         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2781         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2782         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2783         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
2784         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
2785         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2786         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
2787       </files>
2788     </component>
2789
2790     <!-- CMSIS-RTOS Keil RTX component -->
2791     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2792       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2793       <RTE_Components_h>
2794         <!-- the following content goes into file 'RTE_Components.h' -->
2795         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2796         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2797       </RTE_Components_h>
2798       <files>
2799         <!-- CPU independent -->
2800         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2801         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2802         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2803
2804         <!-- RTX templates -->
2805         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2806         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2807         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2808         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2809         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2810         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2811         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2812         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2813         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2814         <!-- tool-chain specific template file -->
2815         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2816         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2817         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2818
2819         <!-- CPU and Compiler dependent -->
2820         <!-- ARMCC -->
2821         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2822         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2823         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2824         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2825         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2826         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2827         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2828         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2829         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2830         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2831         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2832         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2833         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2834         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2835         <!-- GCC -->
2836         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2837         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2838         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2839         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2840         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2841         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2842         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2843         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2844         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2845         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2846         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2847         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2848         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2849         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2850         <!-- IAR -->
2851         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2852         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2853         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2854         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2855         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2856         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2857         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2858         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2859         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2860         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2861         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2862         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2863         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2864         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2865       </files>
2866     </component>
2867     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2868     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2869       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2870       <RTE_Components_h>
2871         <!-- the following content goes into file 'RTE_Components.h' -->
2872         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2873         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2874       </RTE_Components_h>
2875       <files>
2876         <!-- CPU independent -->
2877         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2878         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2879         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2880
2881         <!-- RTX templates -->
2882         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2883         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2884         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2885         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2886         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2887         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2888         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2889         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2890         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2891         <!-- tool-chain specific template file -->
2892         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2893         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2894         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2895
2896         <!-- CPU and Compiler dependent -->
2897         <!-- ARMCC -->
2898         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2899         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2900         <!-- GCC -->
2901         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2902         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2903         <!-- IAR -->
2904       </files>
2905     </component>
2906
2907     <!-- CMSIS-RTOS Keil RTX5 component -->
2908     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.3" Capiversion="1.0.0" condition="RTOS RTX5">
2909       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2910       <RTE_Components_h>
2911         <!-- the following content goes into file 'RTE_Components.h' -->
2912         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2913         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2914       </RTE_Components_h>
2915       <files>
2916         <!-- RTX header file -->
2917         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2918         <!-- RTX compatibility module for API V1 -->
2919         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2920       </files>
2921     </component>
2922
2923     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2924     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
2925       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
2926       <RTE_Components_h>
2927         <!-- the following content goes into file 'RTE_Components.h' -->
2928         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2929         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2930       </RTE_Components_h>
2931       <files>
2932         <!-- RTX documentation -->
2933         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2934
2935         <!-- RTX header files -->
2936         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2937
2938         <!-- RTX configuration -->
2939         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
2940         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2941
2942         <!-- RTX templates -->
2943         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2944         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2945         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2946         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2947         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2948         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2949         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2950         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2951         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2952         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2953
2954         <!-- RTX library configuration -->
2955         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2956
2957         <!-- RTX libraries (CPU and Compiler dependent) -->
2958         <!-- ARMCC -->
2959         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2960         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2961         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2962         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2963         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2964         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2965         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2966         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2967         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2968         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2969         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2970         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2971         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2972         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2973         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2974         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2975         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2976         <!-- GCC -->
2977         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2978         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2979         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2980         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2981         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2982         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2983         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2984         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2985         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2986         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2987         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2988         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2989         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2990         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2991         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2992         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2993         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2994         <!-- IAR -->
2995         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2996         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2997         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2998         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2999         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3000         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3001         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3002         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3003         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3004         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3005         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3006         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3007         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3008         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3009         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3010         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3011         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3012       </files>
3013     </component>
3014     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3015       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3016       <RTE_Components_h>
3017         <!-- the following content goes into file 'RTE_Components.h' -->
3018         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3019         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3020         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3021       </RTE_Components_h>
3022       <files>
3023         <!-- RTX documentation -->
3024         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3025
3026         <!-- RTX header files -->
3027         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3028
3029         <!-- RTX configuration -->
3030         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3031         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3032
3033         <!-- RTX templates -->
3034         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3035         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3036         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3037         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3038         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3039         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3040         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3041         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3042         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3043         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3044
3045         <!-- RTX library configuration -->
3046         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3047
3048         <!-- RTX libraries (CPU and Compiler dependent) -->
3049         <!-- ARMCC -->
3050         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3051         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3052         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3053         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3054         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3055         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3056         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3057         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3058         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3059         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3060         <!-- GCC -->
3061         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3062         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3063         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3064         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3065         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3066         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3067         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3068         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3069         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3070         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3071         <!-- IAR -->
3072         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3073         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3074         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3075         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3076         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3077         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3078         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3079         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3080         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3081         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3082       </files>
3083     </component>
3084     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
3085       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3086       <RTE_Components_h>
3087         <!-- the following content goes into file 'RTE_Components.h' -->
3088         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3089         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3090         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3091       </RTE_Components_h>
3092       <files>
3093         <!-- RTX documentation -->
3094         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3095
3096         <!-- RTX header files -->
3097         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3098
3099         <!-- RTX configuration -->
3100         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3101         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3102
3103         <!-- RTX templates -->
3104         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3105         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3106         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3107         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3108         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3109         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3110         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3111         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3112         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3113         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3114
3115         <!-- RTX sources (core) -->
3116         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3117         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3118         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3119         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3120         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3121         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3122         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3123         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3124         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3125         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3126         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3127         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3128         <!-- RTX sources (library configuration) -->
3129         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3130         <!-- RTX sources (handlers ARMCC) -->
3131         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM0_ARMCC"/>
3132         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM1_ARMCC"/>
3133         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM3_ARMCC"/>
3134         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_ARMCC"/>
3135         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_FP_ARMCC"/>
3136         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_ARMCC"/>
3137         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_FP_ARMCC"/>
3138         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
3139         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
3140         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
3141         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_ARMCC"/>
3142         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_FP_ARMCC"/>
3143         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3144         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3145         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3146         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
3147         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
3148         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
3149         <!-- RTX sources (handlers GCC) -->
3150         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_GCC"/>
3151         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_GCC"/>
3152         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_GCC"/>
3153         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_GCC"/>
3154         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_GCC"/>
3155         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_GCC"/>
3156         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_GCC"/>
3157         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3158         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3159         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3160         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3161         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3162         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3163         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3164         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3165         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3166         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3167         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3168         <!-- RTX sources (handlers IAR) -->
3169         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM0_IAR"/>
3170         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM1_IAR"/>
3171         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM3_IAR"/>
3172         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_IAR"/>
3173         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_FP_IAR"/>
3174         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_IAR"/>
3175         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_FP_IAR"/>
3176         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3177         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3178         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3179         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3180         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3181         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3182         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3183         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3184         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3185         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3186         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3187         <!-- OS Tick (SysTick) -->
3188         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3189       </files>
3190     </component>
3191     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3192       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3193       <RTE_Components_h>
3194         <!-- the following content goes into file 'RTE_Components.h' -->
3195         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3196         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3197         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3198       </RTE_Components_h>
3199       <files>
3200         <!-- RTX documentation -->
3201         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3202
3203         <!-- RTX header files -->
3204         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3205
3206         <!-- RTX configuration -->
3207         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3208         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3209
3210         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3211
3212         <!-- RTX templates -->
3213         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3214         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3215         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3216         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3217         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3218         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3219         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3220         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3221         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3222         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3223
3224         <!-- RTX sources (core) -->
3225         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3227         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3229         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3230         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3231         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3232         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3233         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3234         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3235         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3236         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3237         <!-- RTX sources (library configuration) -->
3238         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3239         <!-- RTX sources (handlers ARMCC) -->
3240         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="CA_ARMCC5"/>
3241         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_ARMCC6"/>
3242         <!-- RTX sources (handlers GCC) -->
3243         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_GCC"/>
3244         <!-- RTX sources (handlers IAR) -->
3245         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="CA_IAR"/>
3246       </files>
3247     </component>
3248     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3249       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3250       <RTE_Components_h>
3251         <!-- the following content goes into file 'RTE_Components.h' -->
3252         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3253         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3254         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3255         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3256       </RTE_Components_h>
3257       <files>
3258         <!-- RTX documentation -->
3259         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3260
3261         <!-- RTX header files -->
3262         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3263
3264         <!-- RTX configuration -->
3265         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3266         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3267
3268         <!-- RTX templates -->
3269         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3270         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3271         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3272         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3273         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3274         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3275         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3276         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3277         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3278         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3279
3280         <!-- RTX sources (core) -->
3281         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3282         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3283         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3284         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3285         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3286         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3287         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3288         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3289         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3290         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3291         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3292         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3293         <!-- RTX sources (library configuration) -->
3294         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3295         <!-- RTX sources (ARMCC handlers) -->
3296         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
3297         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
3298         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
3299         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_ARMCC"/>
3300         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_FP_ARMCC"/>
3301         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_ARMCC"/>
3302         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_ARMCC"/>
3303         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_ARMCC"/>
3304         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
3305         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
3306         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
3307         <!-- RTX sources (GCC handlers) -->
3308         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3309         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3310         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_FP_GCC"/>
3311         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3312         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_FP_GCC"/>
3313         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_GCC"/>
3314         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_GCC"/>
3315         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_GCC"/>
3316         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3317         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3318         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_FP_GCC"/>
3319         <!-- RTX sources (IAR handlers) -->
3320         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="CM23_IAR"/>
3321         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_IAR"/>
3322         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_FP_IAR"/>
3323         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_IAR"/>
3324         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_FP_IAR"/>
3325         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3326         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_MVE_IAR"/>
3327         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_FPU_IAR"/>
3328         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="ARMv8MBL_IAR"/>
3329         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_IAR"/>
3330         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_FP_IAR"/>
3331         <!-- OS Tick (SysTick) -->
3332         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3333       </files>
3334     </component>
3335
3336     <!-- CMSIS-Driver Custom components -->
3337     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3338       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3339       <files>
3340         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3341         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3342       </files>
3343     </component>
3344     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3345       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3346       <files>
3347         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3348         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3349       </files>
3350     </component>
3351     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3352       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3353       <files>
3354         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3355         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3356       </files>
3357     </component>
3358     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3359       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3360       <files>
3361         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3362         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3363       </files>
3364     </component>
3365     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3366       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3367       <files>
3368         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3369         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3370       </files>
3371     </component>
3372     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3373       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3374       <files>
3375         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3376         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3377       </files>
3378     </component>
3379     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3380       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3381       <files>
3382         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3383         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3384       </files>
3385     </component>
3386     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3387       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3388       <files>
3389         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3390         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3391       </files>
3392     </component>
3393     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3394       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3395       <files>
3396         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3397         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3398         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3399         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3400       </files>
3401     </component>
3402     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3403       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3404       <files>
3405         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3406         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3407       </files>
3408     </component>
3409     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3410       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3411       <files>
3412         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3413         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3414       </files>
3415     </component>
3416     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3417       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3418       <files>
3419         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3420         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3421       </files>
3422     </component>
3423     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3424       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3425       <files>
3426         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3427         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3428       </files>
3429     </component>
3430     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3431       <description>Access to #include Driver_WiFi.h file</description>
3432       <files>
3433         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3434         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3435       </files>
3436     </component>
3437
3438     <!-- VIO components -->
3439     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3440       <description>Virtual I/O custom implementation template</description>
3441       <files>
3442         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3443       </files>
3444     </component>
3445     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3446       <description>Virtual I/O implementation using memory only</description>
3447       <files>
3448         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3449       </files>
3450     </component>
3451
3452   </components>
3453
3454   <boards>
3455     <board name="uVision Simulator" vendor="Keil">
3456       <description>uVision Simulator</description>
3457       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3458       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3459       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3460       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3461       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3462       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3463       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3464       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3465       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3466       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3467       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3468       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3469       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3470       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3471       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3472       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3473       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3474       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3475       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3476       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3477       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3478       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3479       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3480       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3481       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3482       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3483     </board>
3484
3485     <board name="EWARM Simulator" vendor="IAR">
3486       <description>EWARM Simulator</description>
3487       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3488       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3489       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3490       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3491       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3492       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3493       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3494       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3495       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3496       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3497       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3498       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3499       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3500       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3501       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3502       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3503       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3504       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3505       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3506       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3507       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3508       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3509       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3510       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3511       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3512       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3513     </board>
3514   </boards>
3515
3516   <examples>
3517     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
3518       <description>DSP_Lib Bayes example</description>
3519       <board name="uVision Simulator" vendor="Keil"/>
3520       <project>
3521         <environment name="uv" load="arm_bayes_example.uvprojx"/>
3522       </project>
3523       <attributes>
3524         <component Cclass="CMSIS" Cgroup="CORE"/>
3525         <component Cclass="CMSIS" Cgroup="DSP"/>
3526         <component Cclass="Device" Cgroup="Startup"/>
3527         <category>Getting Started</category>
3528       </attributes>
3529     </example>
3530
3531     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3532       <description>DSP_Lib Class Marks example</description>
3533       <board name="uVision Simulator" vendor="Keil"/>
3534       <project>
3535         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3536       </project>
3537       <attributes>
3538         <component Cclass="CMSIS" Cgroup="CORE"/>
3539         <component Cclass="CMSIS" Cgroup="DSP"/>
3540         <component Cclass="Device" Cgroup="Startup"/>
3541         <category>Getting Started</category>
3542       </attributes>
3543     </example>
3544
3545     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3546       <description>DSP_Lib Convolution example</description>
3547       <board name="uVision Simulator" vendor="Keil"/>
3548       <project>
3549         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3550       </project>
3551       <attributes>
3552         <component Cclass="CMSIS" Cgroup="CORE"/>
3553         <component Cclass="CMSIS" Cgroup="DSP"/>
3554         <component Cclass="Device" Cgroup="Startup"/>
3555         <category>Getting Started</category>
3556       </attributes>
3557     </example>
3558
3559     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3560       <description>DSP_Lib Dotproduct example</description>
3561       <board name="uVision Simulator" vendor="Keil"/>
3562       <project>
3563         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3564       </project>
3565       <attributes>
3566         <component Cclass="CMSIS" Cgroup="CORE"/>
3567         <component Cclass="CMSIS" Cgroup="DSP"/>
3568         <component Cclass="Device" Cgroup="Startup"/>
3569         <category>Getting Started</category>
3570       </attributes>
3571     </example>
3572
3573     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3574       <description>DSP_Lib FFT Bin example</description>
3575       <board name="uVision Simulator" vendor="Keil"/>
3576       <project>
3577         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3578       </project>
3579       <attributes>
3580         <component Cclass="CMSIS" Cgroup="CORE"/>
3581         <component Cclass="CMSIS" Cgroup="DSP"/>
3582         <component Cclass="Device" Cgroup="Startup"/>
3583         <category>Getting Started</category>
3584       </attributes>
3585     </example>
3586
3587     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3588       <description>DSP_Lib FIR example</description>
3589       <board name="uVision Simulator" vendor="Keil"/>
3590       <project>
3591         <environment name="uv" load="arm_fir_example.uvprojx"/>
3592       </project>
3593       <attributes>
3594         <component Cclass="CMSIS" Cgroup="CORE"/>
3595         <component Cclass="CMSIS" Cgroup="DSP"/>
3596         <component Cclass="Device" Cgroup="Startup"/>
3597         <category>Getting Started</category>
3598       </attributes>
3599     </example>
3600
3601     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3602       <description>DSP_Lib Graphic Equalizer example</description>
3603       <board name="uVision Simulator" vendor="Keil"/>
3604       <project>
3605         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3606       </project>
3607       <attributes>
3608         <component Cclass="CMSIS" Cgroup="CORE"/>
3609         <component Cclass="CMSIS" Cgroup="DSP"/>
3610         <component Cclass="Device" Cgroup="Startup"/>
3611         <category>Getting Started</category>
3612       </attributes>
3613     </example>
3614
3615     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3616       <description>DSP_Lib Linear Interpolation example</description>
3617       <board name="uVision Simulator" vendor="Keil"/>
3618       <project>
3619         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3620       </project>
3621       <attributes>
3622         <component Cclass="CMSIS" Cgroup="CORE"/>
3623         <component Cclass="CMSIS" Cgroup="DSP"/>
3624         <component Cclass="Device" Cgroup="Startup"/>
3625         <category>Getting Started</category>
3626       </attributes>
3627     </example>
3628
3629     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3630       <description>DSP_Lib Matrix example</description>
3631       <board name="uVision Simulator" vendor="Keil"/>
3632       <project>
3633         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3634       </project>
3635       <attributes>
3636         <component Cclass="CMSIS" Cgroup="CORE"/>
3637         <component Cclass="CMSIS" Cgroup="DSP"/>
3638         <component Cclass="Device" Cgroup="Startup"/>
3639         <category>Getting Started</category>
3640       </attributes>
3641     </example>
3642
3643     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3644       <description>DSP_Lib Signal Convergence example</description>
3645       <board name="uVision Simulator" vendor="Keil"/>
3646       <project>
3647         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3648       </project>
3649       <attributes>
3650         <component Cclass="CMSIS" Cgroup="CORE"/>
3651         <component Cclass="CMSIS" Cgroup="DSP"/>
3652         <component Cclass="Device" Cgroup="Startup"/>
3653         <category>Getting Started</category>
3654       </attributes>
3655     </example>
3656
3657     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3658       <description>DSP_Lib Sinus/Cosinus example</description>
3659       <board name="uVision Simulator" vendor="Keil"/>
3660       <project>
3661         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3662       </project>
3663       <attributes>
3664         <component Cclass="CMSIS" Cgroup="CORE"/>
3665         <component Cclass="CMSIS" Cgroup="DSP"/>
3666         <component Cclass="Device" Cgroup="Startup"/>
3667         <category>Getting Started</category>
3668       </attributes>
3669     </example>
3670
3671     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
3672       <description>DSP_Lib SVM example</description>
3673       <board name="uVision Simulator" vendor="Keil"/>
3674       <project>
3675         <environment name="uv" load="arm_svm_example.uvprojx"/>
3676       </project>
3677       <attributes>
3678         <component Cclass="CMSIS" Cgroup="CORE"/>
3679         <component Cclass="CMSIS" Cgroup="DSP"/>
3680         <component Cclass="Device" Cgroup="Startup"/>
3681         <category>Getting Started</category>
3682       </attributes>
3683     </example>
3684
3685     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3686       <description>DSP_Lib Variance example</description>
3687       <board name="uVision Simulator" vendor="Keil"/>
3688       <project>
3689         <environment name="uv" load="arm_variance_example.uvprojx"/>
3690       </project>
3691       <attributes>
3692         <component Cclass="CMSIS" Cgroup="CORE"/>
3693         <component Cclass="CMSIS" Cgroup="DSP"/>
3694         <component Cclass="Device" Cgroup="Startup"/>
3695         <category>Getting Started</category>
3696       </attributes>
3697     </example>
3698
3699     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3700       <description>Neural Network CIFAR10 example</description>
3701       <board name="uVision Simulator" vendor="Keil"/>
3702       <project>
3703         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3704       </project>
3705       <attributes>
3706         <component Cclass="CMSIS" Cgroup="CORE"/>
3707         <component Cclass="CMSIS" Cgroup="DSP"/>
3708         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3709         <component Cclass="Device" Cgroup="Startup"/>
3710         <category>Getting Started</category>
3711       </attributes>
3712     </example>
3713
3714     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
3715       <description>Neural Network CIFAR10 example</description>
3716       <board name="EWARM Simulator" vendor="IAR"/>
3717       <project>
3718         <environment name="iar" load="NN-example-cifar10.ewp"/>
3719       </project>
3720       <attributes>
3721         <component Cclass="CMSIS" Cgroup="CORE"/>
3722         <component Cclass="CMSIS" Cgroup="DSP"/>
3723         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3724         <component Cclass="Device" Cgroup="Startup"/>
3725         <category>Getting Started</category>
3726       </attributes>
3727     </example>
3728
3729     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3730       <description>Neural Network GRU example</description>
3731       <board name="uVision Simulator" vendor="Keil"/>
3732       <project>
3733         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3734       </project>
3735       <attributes>
3736         <component Cclass="CMSIS" Cgroup="CORE"/>
3737         <component Cclass="CMSIS" Cgroup="DSP"/>
3738         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3739         <component Cclass="Device" Cgroup="Startup"/>
3740         <category>Getting Started</category>
3741       </attributes>
3742     </example>
3743
3744     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
3745       <description>Neural Network GRU example</description>
3746       <board name="EWARM Simulator" vendor="IAR"/>
3747       <project>
3748         <environment name="iar" load="NN-example-gru.ewp"/>
3749       </project>
3750       <attributes>
3751         <component Cclass="CMSIS" Cgroup="CORE"/>
3752         <component Cclass="CMSIS" Cgroup="DSP"/>
3753         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3754         <component Cclass="Device" Cgroup="Startup"/>
3755         <category>Getting Started</category>
3756       </attributes>
3757     </example>
3758
3759     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3760       <description>CMSIS-RTOS2 Blinky example</description>
3761       <board name="uVision Simulator" vendor="Keil"/>
3762       <project>
3763         <environment name="uv" load="Blinky.uvprojx"/>
3764       </project>
3765       <attributes>
3766         <component Cclass="CMSIS" Cgroup="CORE"/>
3767         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3768         <component Cclass="Device" Cgroup="Startup"/>
3769         <category>Getting Started</category>
3770       </attributes>
3771     </example>
3772
3773     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3774       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3775       <board name="uVision Simulator" vendor="Keil"/>
3776       <project>
3777         <environment name="uv" load="Blinky.uvprojx"/>
3778       </project>
3779       <attributes>
3780         <component Cclass="CMSIS" Cgroup="CORE"/>
3781         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3782         <component Cclass="Device" Cgroup="Startup"/>
3783         <category>Getting Started</category>
3784       </attributes>
3785     </example>
3786
3787     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3788       <description>CMSIS-RTOS2 Message Queue Example</description>
3789       <board name="uVision Simulator" vendor="Keil"/>
3790       <project>
3791         <environment name="uv" load="MsqQueue.uvprojx"/>
3792       </project>
3793       <attributes>
3794         <component Cclass="CMSIS" Cgroup="CORE"/>
3795         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3796         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3797         <component Cclass="Device" Cgroup="Startup"/>
3798         <category>Getting Started</category>
3799       </attributes>
3800     </example>
3801
3802     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3803       <description>CMSIS-RTOS2 Memory Pool Example</description>
3804       <board name="uVision Simulator" vendor="Keil"/>
3805       <project>
3806         <environment name="uv" load="MemPool.uvprojx"/>
3807       </project>
3808       <attributes>
3809         <component Cclass="CMSIS" Cgroup="CORE"/>
3810         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3811         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3812         <component Cclass="Device" Cgroup="Startup"/>
3813         <category>Getting Started</category>
3814       </attributes>
3815     </example>
3816
3817     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3818       <description>Bare-metal secure/non-secure example without RTOS</description>
3819       <board name="uVision Simulator" vendor="Keil"/>
3820       <project>
3821         <environment name="uv" load="NoRTOS.uvmpw"/>
3822       </project>
3823       <attributes>
3824         <component Cclass="CMSIS" Cgroup="CORE"/>
3825         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3826         <component Cclass="Device" Cgroup="Startup"/>
3827         <category>Getting Started</category>
3828       </attributes>
3829     </example>
3830
3831     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3832       <description>Secure/non-secure RTOS example with thread context management</description>
3833       <board name="uVision Simulator" vendor="Keil"/>
3834       <project>
3835         <environment name="uv" load="RTOS.uvmpw"/>
3836       </project>
3837       <attributes>
3838         <component Cclass="CMSIS" Cgroup="CORE"/>
3839         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3840         <component Cclass="Device" Cgroup="Startup"/>
3841         <category>Getting Started</category>
3842       </attributes>
3843     </example>
3844
3845     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3846       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3847       <board name="uVision Simulator" vendor="Keil"/>
3848       <project>
3849         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3850       </project>
3851       <attributes>
3852         <component Cclass="CMSIS" Cgroup="CORE"/>
3853         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3854         <component Cclass="Device" Cgroup="Startup"/>
3855         <category>Getting Started</category>
3856       </attributes>
3857     </example>
3858
3859     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
3860       <description>CMSIS-RTOS2 Blinky example</description>
3861       <board name="EWARM Simulator" vendor="IAR"/>
3862       <project>
3863         <environment name="iar" load="Blinky/Blinky.ewp"/>
3864       </project>
3865       <attributes>
3866         <component Cclass="CMSIS" Cgroup="CORE"/>
3867         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3868         <component Cclass="Device" Cgroup="Startup"/>
3869         <category>Getting Started</category>
3870       </attributes>
3871     </example>
3872
3873     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
3874       <description>CMSIS-RTOS2 Message Queue Example</description>
3875       <board name="EWARM Simulator" vendor="IAR"/>
3876       <project>
3877         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
3878       </project>
3879       <attributes>
3880         <component Cclass="CMSIS" Cgroup="CORE"/>
3881         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3882         <component Cclass="Device" Cgroup="Startup"/>
3883         <category>Getting Started</category>
3884       </attributes>
3885     </example>
3886
3887   </examples>
3888
3889 </package>