begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.2-dev1">
  12       CMSIS CORE_A:
  13       - Added Cortex-A core support, ARMCC specific:
  14         - Core specific register definitions
  15         - Generic Interrupt Controller functions
  16         - Generic Timer functions
  17         - L1 and L2 Cache functions
  18         - MMU functions
  19       - Added ARMCA5, ARMCA7 and ARMCA9 devices
  20       - Added Startup, System and MMU configuration files
  21     </release>
  22     <release version="5.0.2-dev0">
  23       CMSIS-Core: 5.0.2 (see revision history for details)
  24       - Added macros __UNALIGNED_UINT16_READ, __UNALIGNED_UINT16_WRITE
  25       - Added macros __UNALIGNED_UINT32_READ, __UNALIGNED_UINT32_WRITE
  26       - Set macro __UNALIGNED_UINT32 to deprecated
  27     </release>
  28     <release version="5.0.1" date="2017-02-03">
  29       Package Description:
  30       - added taxonomy for Cclass RTOS
  31       CMSIS-RTOS2:
  32       - API 2.1   (see revision history for details)
  33       - RTX 5.1.0 (see revision history for details)
  34       CMSIS-Core: 5.0.1 (see revision history for details)
  35       - Added __PACKED_STRUCT macro
  36       - Added uVisior support
  37       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  38       - Updated template for secure main function (main_s.c)
  39       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  40       CMSIS-DSP: 1.5.1 (see revision history for details)
  41       - added ARMv8M DSP libraries.
  42       CMSIS-PACK:1.4.9 (see revision history for details)
  43       - added Pack Index File specification and schema file
  44     </release>
  45     <release version="5.0.0" date="2016-11-11">
  46       Changed open source license to Apache 2.0
  47       CMSIS_Core:
  48        - Added support for Cortex-M23 and Cortex-M33.
  49        - Added ARMv8-M device configurations for mainline and baseline.
  50        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  51        - Added cmsis_compiler.h to unify compiler behaviour.
  52        - Updated function SCB_EnableICache (for Cortex-M7).
  53        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  54       CMSIS-RTOS:
  55         - bug fix in RTX 4.82 (see revision history for details)
  56       CMSIS-RTOS2:
  57         - new API including compatibility layer to CMSIS-RTOS
  58         - reference implementation based on RTX5
  59         - supports all Cortex-M variants including TrustZone for ARMv8-M
  60       CMSIS-SVD:
  61        - reworked SVD format documentation
  62        - removed SVD file database documentation as SVD files are distributed in packs
  63        - updated SVDConv for Win32 and Linux
  64       CMSIS-DSP:
  65        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  66        - Added DSP libraries build projects to CMSIS pack.
  67     </release>
  68     <release version="4.5.0" date="2015-10-28">
  69       - CMSIS-Core     4.30.0  (see revision history for details)
  70       - CMSIS-DAP      1.1.0   (unchanged)
  71       - CMSIS-Driver   2.04.0  (see revision history for details)
  72       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  73       - CMSIS-PACK     1.4.1   (see revision history for details)
  74       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  75       - CMSIS-SVD      1.3.1   (see revision history for details)
  76     </release>
  77     <release version="4.4.0" date="2015-09-11">
  78       - CMSIS-Core     4.20   (see revision history for details)
  79       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  80       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  81       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  82       - CMSIS-RTOS
  83         -- API         1.02   (unchanged)
  84         -- RTX         4.79   (see revision history for details)
  85       - CMSIS-SVD      1.3.0  (see revision history for details)
  86       - CMSIS-DAP      1.1.0  (extended with SWO support)
  87     </release>
  88     <release version="4.3.0" date="2015-03-20">
  89       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  90       - CMSIS-DSP      1.4.5  (see revision history for details)
  91       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  92       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  93       - CMSIS-RTOS
  94         -- API         1.02   (unchanged)
  95         -- RTX         4.78   (see revision history for details)
  96       - CMSIS-SVD      1.2    (unchanged)
  97     </release>
  98     <release version="4.2.0" date="2014-09-24">
  99       Adding Cortex-M7 support
 100       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 101       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 102       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 103       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 104       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 105     </release>
 106     <release version="4.1.1" date="2014-06-30">
 107       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 108     </release>
 109     <release version="4.1.0" date="2014-06-12">
 110       - CMSIS-Driver   2.02  (incompatible update)
 111       - CMSIS-Pack     1.3   (see revision history for details)
 112       - CMSIS-DSP      1.4.2 (unchanged)
 113       - CMSIS-Core     3.30  (unchanged)
 114       - CMSIS-RTOS RTX 4.74  (unchanged)
 115       - CMSIS-RTOS API 1.02  (unchanged)
 116       - CMSIS-SVD      1.10  (unchanged)
 117       PACK:
 118       - removed G++ specific files from PACK
 119       - added Component Startup variant "C Startup"
 120       - added Pack Checking Utility
 121       - updated conditions to reflect tool-chain dependency
 122       - added Taxonomy for Graphics
 123       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 124     </release>
 125     <release version="4.0.0">
 126       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 127       - CMSIS-Pack     1.1   Preliminary
 128       - CMSIS-DSP      1.4.2 (see revision history for details)
 129       - CMSIS-Core     3.30  (see revision history for details)
 130       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 131       - CMSIS-RTOS API 1.02  (unchanged)
 132       - CMSIS-SVD      1.10  (unchanged)
 133     </release>
 134     <release version="3.20.4">
 135       - CMSIS-RTOS 4.74 (see revision history for details)
 136       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 137     </release>
 138     <release version="3.20.3">
 139       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 140       - CMSIS-RTOS 4.73 (see revision history for details)
 141     </release>
 142     <release version="3.20.2">
 143       - CMSIS-Pack documentation has been added
 144       - CMSIS-Drivers header and documentation have been added to PACK
 145       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 146     </release>
 147     <release version="3.20.1">
 148       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 149       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 150     </release>
 151     <release version="3.20.0">
 152       The software portions that are deployed in the application program are now under a BSD license which allows usage
 153       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 154       The individual components have been update as listed below:
 155       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 156       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 157       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 158       - CMSIS-SVD is unchanged.
 159     </release>
 160   </releases>
 161
 162   <taxonomy>
 163     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 164     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 165     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 166     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 167     <description Cclass="File System">File Drive Support and File System</description>
 168     <description Cclass="Graphics">Graphical User Interface</description>
 169     <description Cclass="Network">Network Stack using Internet Protocols</description>
 170     <description Cclass="USB">Universal Serial Bus Stack</description>
 171     <description Cclass="Compiler">Compiler Software Extensions</description>
 172     <description Cclass="RTOS">Real-time Operating System</description>
 173   </taxonomy>
 174
 175   <devices>
 176     <!-- ******************************  Cortex-M0  ****************************** -->
 177     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 178       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 179       <description>
 180 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 181 - simple, easy-to-use programmers model
 182 - highly efficient ultra-low power operation
 183 - excellent code density
 184 - deterministic, high-performance interrupt handling
 185 - upward compatibility with the rest of the Cortex-M processor family.
 186       </description>
 187       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 188       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 189       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 190       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 191
 192       <device Dname="ARMCM0">
 193         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 194         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 195       </device>
 196     </family>
 197
 198     <!-- ******************************  Cortex-M0P  ****************************** -->
 199     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 200       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 201       <description>
 202 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 203 - simple, easy-to-use programmers model
 204 - highly efficient ultra-low power operation
 205 - excellent code density
 206 - deterministic, high-performance interrupt handling
 207 - upward compatibility with the rest of the Cortex-M processor family.
 208       </description>
 209       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 210       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 211       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 212       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 213
 214       <device Dname="ARMCM0P">
 215         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 216         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 217       </device>
 218     </family>
 219
 220     <!-- ******************************  Cortex-M3  ****************************** -->
 221     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 222       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 223       <description>
 224 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 225 - simple, easy-to-use programmers model
 226 - highly efficient ultra-low power operation
 227 - excellent code density
 228 - deterministic, high-performance interrupt handling
 229 - upward compatibility with the rest of the Cortex-M processor family.
 230       </description>
 231       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 232       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 233       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 234       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 235
 236       <device Dname="ARMCM3">
 237         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 238         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 239       </device>
 240     </family>
 241
 242     <!-- ******************************  Cortex-M4  ****************************** -->
 243     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 244       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 245       <description>
 246 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 247 - simple, easy-to-use programmers model
 248 - highly efficient ultra-low power operation
 249 - excellent code density
 250 - deterministic, high-performance interrupt handling
 251 - upward compatibility with the rest of the Cortex-M processor family.
 252       </description>
 253       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 254       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 255       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 256       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 257
 258       <device Dname="ARMCM4">
 259         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 260         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 261       </device>
 262
 263       <device Dname="ARMCM4_FP">
 264         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 265         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 266       </device>
 267     </family>
 268
 269     <!-- ******************************  Cortex-M7  ****************************** -->
 270     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 271       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 272       <description>
 273 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 274 - simple, easy-to-use programmers model
 275 - highly efficient ultra-low power operation
 276 - excellent code density
 277 - deterministic, high-performance interrupt handling
 278 - upward compatibility with the rest of the Cortex-M processor family.
 279       </description>
 280       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 281       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 282       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 283       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 284
 285       <device Dname="ARMCM7">
 286         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 287         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 288       </device>
 289
 290       <device Dname="ARMCM7_SP">
 291         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 292         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 293       </device>
 294
 295       <device Dname="ARMCM7_DP">
 296         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 297         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 298       </device>
 299     </family>
 300
 301     <!-- ******************************  Cortex-M23  ********************** -->
 302     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 303       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 304       <description>
 305 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 306 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 307 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 308       </description>
 309       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 310       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 311       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 312       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 313       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 314       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 315
 316       <device Dname="ARMCM23">
 317         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 318         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 319       </device>
 320
 321       <device Dname="ARMCM23_TZ">
 322         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 323         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 324       </device>
 325     </family>
 326
 327     <!-- ******************************  Cortex-M33  ****************************** -->
 328     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 329       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 330       <description>
 331 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 332 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 333       </description>
 334       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 335       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 336       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 337       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 338       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 339       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 340
 341       <device Dname="ARMCM33">
 342         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 343         <description>
 344           no DSP Instructions, no Floating Point Unit, no TrustZone
 345         </description>
 346         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 347       </device>
 348
 349       <device Dname="ARMCM33_TZ">
 350         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 351         <description>
 352           no DSP Instructions, no Floating Point Unit, TrustZone
 353         </description>
 354         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 355       </device>
 356
 357       <device Dname="ARMCM33_DSP_FP">
 358         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 359         <description>
 360           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 361         </description>
 362         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 363       </device>
 364
 365       <device Dname="ARMCM33_DSP_FP_TZ">
 366         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 367         <description>
 368           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 369         </description>
 370         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 371       </device>
 372     </family>
 373
 374     <!-- ******************************  ARMSC000  ****************************** -->
 375     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 376       <description>
 377 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 378 - simple, easy-to-use programmers model
 379 - highly efficient ultra-low power operation
 380 - excellent code density
 381 - deterministic, high-performance interrupt handling
 382       </description>
 383       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 384       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 385       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 386       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 387
 388       <device Dname="ARMSC000">
 389         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 390         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 391       </device>
 392     </family>
 393
 394     <!-- ******************************  ARMSC300  ****************************** -->
 395     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 396       <description>
 397 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 398 - simple, easy-to-use programmers model
 399 - highly efficient ultra-low power operation
 400 - excellent code density
 401 - deterministic, high-performance interrupt handling
 402       </description>
 403       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 404       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 405       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 406       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 407
 408       <device Dname="ARMSC300">
 409         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 410         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 411       </device>
 412     </family>
 413
 414     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 415     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 416       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 417       <description>
 418 ARMv8-M Baseline based device with TrustZone
 419       </description>
 420       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 421       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 422       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 423       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 424       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 425       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 426
 427       <device Dname="ARMv8MBL">
 428         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 429         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 430       </device>
 431     </family>
 432
 433     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 434     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 435       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 436       <description>
 437 ARMv8-M Mainline based device with TrustZone
 438       </description>
 439       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 440       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 441       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 442       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 443       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 444       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 445
 446       <device Dname="ARMv8MML">
 447         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 448         <description>
 449           no DSP Instructions, no Floating Point Unit, TrustZone
 450         </description>
 451         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 452       </device>
 453
 454       <device Dname="ARMv8MML_DSP">
 455         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 456         <description>
 457           DSP Instructions, no Floating Point Unit, TrustZone
 458         </description>
 459         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 460       </device>
 461
 462       <device Dname="ARMv8MML_SP">
 463         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 464         <description>
 465           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 466         </description>
 467         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 468       </device>
 469
 470       <device Dname="ARMv8MML_DSP_SP">
 471         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 472         <description>
 473           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 474         </description>
 475         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 476       </device>
 477
 478       <device Dname="ARMv8MML_DP">
 479         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 480         <description>
 481           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 482         </description>
 483         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 484       </device>
 485
 486       <device Dname="ARMv8MML_DSP_DP">
 487         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 488         <description>
 489           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 490         </description>
 491         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 492       </device>
 493     </family>
 494
 495     <!-- ******************************  Cortex-A5  ****************************** -->
 496     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 497       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 498       <description>
 499 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 500 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 501 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 502       </description>
 503
 504       <device Dname="ARMCA5">
 505         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 506         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 507       </device>
 508     </family>
 509
 510     <!-- ******************************  Cortex-A7  ****************************** -->
 511     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 512       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 513       <description>
 514 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 515 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 516 an optional integrated GIC, and an optional L2 cache controller.
 517       </description>
 518
 519       <device Dname="ARMCA7">
 520         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 521         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 522       </device>
 523     </family>
 524
 525     <!-- ******************************  Cortex-A9  ****************************** -->
 526     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 527       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 528       <description>
 529 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 530 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 531 and 8-bit Java bytecodes in Jazelle state.
 532       </description>
 533
 534       <device Dname="ARMCA9">
 535         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 536         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 537       </device>
 538     </family>
 539   </devices>
 540
 541
 542   <apis>
 543     <!-- CMSIS-RTOS API -->
 544     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 545       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 546       <files>
 547         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 548       </files>
 549     </api>
 550     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.0" exclusive="1">
 551       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 552       <files>
 553         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 554         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 555       </files>
 556     </api>
 557     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 558       <description>USART Driver API for Cortex-M</description>
 559       <files>
 560         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 561         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 562       </files>
 563     </api>
 564     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 565       <description>SPI Driver API for Cortex-M</description>
 566       <files>
 567         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 568         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 569       </files>
 570     </api>
 571     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 572       <description>SAI Driver API for Cortex-M</description>
 573       <files>
 574         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 575         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 576       </files>
 577     </api>
 578     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 579       <description>I2C Driver API for Cortex-M</description>
 580       <files>
 581         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 582         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 583       </files>
 584     </api>
 585     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
 586       <description>CAN Driver API for Cortex-M</description>
 587       <files>
 588         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 589         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 590       </files>
 591     </api>
 592     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 593       <description>Flash Driver API for Cortex-M</description>
 594       <files>
 595         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 596         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 597       </files>
 598     </api>
 599     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 600       <description>MCI Driver API for Cortex-M</description>
 601       <files>
 602         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 603         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 604       </files>
 605     </api>
 606     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 607       <description>NAND Flash Driver API for Cortex-M</description>
 608       <files>
 609         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 610         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 611       </files>
 612     </api>
 613     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 614       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 615       <files>
 616         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 617         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 618         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 619       </files>
 620     </api>
 621     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 622       <description>Ethernet MAC Driver API for Cortex-M</description>
 623       <files>
 624         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 625         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 626       </files>
 627     </api>
 628     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 629       <description>Ethernet PHY Driver API for Cortex-M</description>
 630       <files>
 631         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 632         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 633       </files>
 634     </api>
 635     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 636       <description>USB Device Driver API for Cortex-M</description>
 637       <files>
 638         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 639         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 640       </files>
 641     </api>
 642     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 643       <description>USB Host Driver API for Cortex-M</description>
 644       <files>
 645         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 646         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 647       </files>
 648     </api>
 649   </apis>
 650
 651   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 652   <conditions>
 653     <!-- compiler -->
 654     <condition id="ARMCC">
 655       <require Tcompiler="ARMCC"/>
 656     </condition>
 657     <condition id="GCC">
 658       <require Tcompiler="GCC"/>
 659     </condition>
 660     <condition id="IAR">
 661       <require Tcompiler="IAR"/>
 662     </condition>
 663     <condition id="ARMCC GCC">
 664       <accept Tcompiler="ARMCC"/>
 665       <accept Tcompiler="GCC"/>
 666     </condition>
 667     <condition id="ARMCC GCC IAR">
 668       <accept Tcompiler="ARMCC"/>
 669       <accept Tcompiler="GCC"/>
 670       <accept Tcompiler="IAR"/>
 671     </condition>
 672
 673     <!-- ARM architecture -->
 674     <condition id="ARMv6-M Device">
 675       <description>ARMv6-M architecture based device</description>
 676       <accept Dcore="Cortex-M0"/>
 677       <accept Dcore="Cortex-M0+"/>
 678       <accept Dcore="SC000"/>
 679     </condition>
 680     <condition id="ARMv7-M Device">
 681       <description>ARMv7-M architecture based device</description>
 682       <accept Dcore="Cortex-M3"/>
 683       <accept Dcore="Cortex-M4"/>
 684       <accept Dcore="Cortex-M7"/>
 685       <accept Dcore="SC300"/>
 686     </condition>
 687     <condition id="ARMv8-M Device">
 688       <description>ARMv8-M architecture based device</description>
 689       <accept Dcore="ARMV8MBL"/>
 690       <accept Dcore="ARMV8MML"/>
 691       <accept Dcore="Cortex-M23"/>
 692       <accept Dcore="Cortex-M33"/>
 693     </condition>
 694     <condition id="ARMv8-M TZ Device">
 695       <description>ARMv8-M architecture based device with TrustZone</description>
 696       <require condition="ARMv8-M Device"/>
 697       <require Dtz="TZ"/>
 698     </condition>
 699     <condition id="ARMv6_7-M Device">
 700       <description>ARMv6_7-M architecture based device</description>
 701       <accept condition="ARMv6-M Device"/>
 702       <accept condition="ARMv7-M Device"/>
 703     </condition>
 704     <condition id="ARMv6_7_8-M Device">
 705       <description>ARMv6_7_8-M architecture based device</description>
 706       <accept condition="ARMv6-M Device"/>
 707       <accept condition="ARMv7-M Device"/>
 708       <accept condition="ARMv8-M Device"/>
 709     </condition>
 710     <condition id="ARMv7-A Device">
 711       <description>ARMv7-A architecture based device</description>
 712       <accept Dcore="Cortex-A5"/>
 713       <accept Dcore="Cortex-A7"/>
 714       <accept Dcore="Cortex-A9"/>
 715     </condition>
 716
 717     <!-- ARM core -->
 718     <condition id="CM0">
 719       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 720       <accept Dcore="Cortex-M0"/>
 721       <accept Dcore="Cortex-M0+"/>
 722       <accept Dcore="SC000"/>
 723     </condition>
 724     <condition id="CM3">
 725       <description>Cortex-M3 or SC300 processor based device</description>
 726       <accept Dcore="Cortex-M3"/>
 727       <accept Dcore="SC300"/>
 728     </condition>
 729     <condition id="CM4">
 730       <description>Cortex-M4 processor based device</description>
 731       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 732     </condition>
 733     <condition id="CM4_FP">
 734       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 735       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 736     </condition>
 737     <condition id="CM7">
 738       <description>Cortex-M7 processor based device</description>
 739       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 740     </condition>
 741     <condition id="CM7_FP">
 742       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 743       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 744       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 745     </condition>
 746     <condition id="CM7_SP">
 747       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 748       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 749     </condition>
 750     <condition id="CM7_DP">
 751       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 752       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 753     </condition>
 754     <condition id="CM23">
 755       <description>Cortex-M23 processor based device</description>
 756       <require Dcore="Cortex-M23"/>
 757     </condition>
 758     <condition id="CM33">
 759       <description>Cortex-M33 processor based device</description>
 760       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 761     </condition>
 762     <condition id="CM33_FP">
 763       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 764       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 765     </condition>
 766     <condition id="ARMv8MBL">
 767       <description>ARMv8-M Baseline processor based device</description>
 768       <require Dcore="ARMV8MBL"/>
 769     </condition>
 770     <condition id="ARMv8MML">
 771       <description>ARMv8-M Mainline processor based device</description>
 772       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 773     </condition>
 774     <condition id="ARMv8MML_FP">
 775       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 776       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 777       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 778     </condition>
 779
 780     <condition id="CM33_NODSP_NOFPU">
 781       <description>CM33, no DSP, no FPU</description>
 782       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 783     </condition>
 784     <condition id="CM33_DSP_NOFPU">
 785       <description>CM33, DSP, no FPU</description>
 786       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 787     </condition>
 788     <condition id="CM33_NODSP_SP">
 789       <description>CM33, no DSP, SP FPU</description>
 790       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 791     </condition>
 792     <condition id="CM33_DSP_SP">
 793       <description>CM33, DSP, SP FPU</description>
 794       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 795     </condition>
 796
 797     <condition id="ARMv8MML_NODSP_NOFPU">
 798       <description>ARMv8MML, no DSP, no FPU</description>
 799       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 800     </condition>
 801     <condition id="ARMv8MML_DSP_NOFPU">
 802       <description>ARMv8MML, DSP, no FPU</description>
 803       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 804     </condition>
 805     <condition id="ARMv8MML_NODSP_SP">
 806       <description>ARMv8MML, no DSP, SP FPU</description>
 807       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 808     </condition>
 809     <condition id="ARMv8MML_DSP_SP">
 810       <description>ARMv8MML, DSP, SP FPU</description>
 811       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 812     </condition>
 813
 814     <!-- ARMCC compiler -->
 815     <condition id="CM0_ARMCC">
 816       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 817       <require condition="CM0"/>
 818       <require Tcompiler="ARMCC"/>
 819     </condition>
 820     <condition id="CM0_LE_ARMCC">
 821       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 822       <require condition="CM0_ARMCC"/>
 823       <require Dendian="Little-endian"/>
 824     </condition>
 825     <condition id="CM0_BE_ARMCC">
 826       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 827       <require condition="CM0_ARMCC"/>
 828       <require Dendian="Big-endian"/>
 829     </condition>
 830
 831     <condition id="CM3_ARMCC">
 832       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 833       <require condition="CM3"/>
 834       <require Tcompiler="ARMCC"/>
 835     </condition>
 836     <condition id="CM3_LE_ARMCC">
 837       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 838       <require condition="CM3_ARMCC"/>
 839       <require Dendian="Little-endian"/>
 840     </condition>
 841     <condition id="CM3_BE_ARMCC">
 842       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 843       <require condition="CM3_ARMCC"/>
 844       <require Dendian="Big-endian"/>
 845     </condition>
 846
 847     <condition id="CM4_ARMCC">
 848       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 849       <require condition="CM4"/>
 850       <require Tcompiler="ARMCC"/>
 851     </condition>
 852     <condition id="CM4_LE_ARMCC">
 853       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 854       <require condition="CM4_ARMCC"/>
 855       <require Dendian="Little-endian"/>
 856     </condition>
 857     <condition id="CM4_BE_ARMCC">
 858       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 859       <require condition="CM4_ARMCC"/>
 860       <require Dendian="Big-endian"/>
 861     </condition>
 862
 863     <condition id="CM4_FP_ARMCC">
 864       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 865       <require condition="CM4_FP"/>
 866       <require Tcompiler="ARMCC"/>
 867     </condition>
 868     <condition id="CM4_FP_LE_ARMCC">
 869       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 870       <require condition="CM4_FP_ARMCC"/>
 871       <require Dendian="Little-endian"/>
 872     </condition>
 873     <condition id="CM4_FP_BE_ARMCC">
 874       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 875       <require condition="CM4_FP_ARMCC"/>
 876       <require Dendian="Big-endian"/>
 877     </condition>
 878
 879     <!-- XMC 4000 Series devices from Infineon require a special library -->
 880     <condition id="CM4_LE_ARMCC_STD">
 881       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 882       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 883       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 884       <require Tcompiler="ARMCC"/>
 885     </condition>
 886     <condition id="CM4_LE_ARMCC_IFX">
 887       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 888       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 889       <require Tcompiler="ARMCC"/>
 890     </condition>
 891     <condition id="CM4_FP_LE_ARMCC_STD">
 892       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 893       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 894       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 895       <require Tcompiler="ARMCC"/>
 896     </condition>
 897     <condition id="CM4_FP_LE_ARMCC_IFX">
 898       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 899       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 900       <require Tcompiler="ARMCC"/>
 901     </condition>
 902
 903     <condition id="CM7_ARMCC">
 904       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 905       <require condition="CM7"/>
 906       <require Tcompiler="ARMCC"/>
 907     </condition>
 908     <condition id="CM7_LE_ARMCC">
 909       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 910       <require condition="CM7_ARMCC"/>
 911       <require Dendian="Little-endian"/>
 912     </condition>
 913     <condition id="CM7_BE_ARMCC">
 914       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 915       <require condition="CM7_ARMCC"/>
 916       <require Dendian="Big-endian"/>
 917     </condition>
 918
 919     <condition id="CM7_FP_ARMCC">
 920       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 921       <require condition="CM7_FP"/>
 922       <require Tcompiler="ARMCC"/>
 923     </condition>
 924     <condition id="CM7_FP_LE_ARMCC">
 925       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 926       <require condition="CM7_FP_ARMCC"/>
 927       <require Dendian="Little-endian"/>
 928     </condition>
 929     <condition id="CM7_FP_BE_ARMCC">
 930       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 931       <require condition="CM7_FP_ARMCC"/>
 932       <require Dendian="Big-endian"/>
 933     </condition>
 934
 935     <condition id="CM7_SP_ARMCC">
 936       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 937       <require condition="CM7_SP"/>
 938       <require Tcompiler="ARMCC"/>
 939     </condition>
 940     <condition id="CM7_SP_LE_ARMCC">
 941       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 942       <require condition="CM7_SP_ARMCC"/>
 943       <require Dendian="Little-endian"/>
 944     </condition>
 945     <condition id="CM7_SP_BE_ARMCC">
 946       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 947       <require condition="CM7_SP_ARMCC"/>
 948       <require Dendian="Big-endian"/>
 949     </condition>
 950
 951     <condition id="CM7_DP_ARMCC">
 952       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 953       <require condition="CM7_DP"/>
 954       <require Tcompiler="ARMCC"/>
 955     </condition>
 956     <condition id="CM7_DP_LE_ARMCC">
 957       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 958       <require condition="CM7_DP_ARMCC"/>
 959       <require Dendian="Little-endian"/>
 960     </condition>
 961     <condition id="CM7_DP_BE_ARMCC">
 962       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 963       <require condition="CM7_DP_ARMCC"/>
 964       <require Dendian="Big-endian"/>
 965     </condition>
 966
 967     <condition id="CM23_ARMCC">
 968       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 969       <require condition="CM23"/>
 970       <require Tcompiler="ARMCC"/>
 971     </condition>
 972     <condition id="CM23_LE_ARMCC">
 973       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 974       <require condition="CM23_ARMCC"/>
 975       <require Dendian="Little-endian"/>
 976     </condition>
 977     <condition id="CM23_BE_ARMCC">
 978       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 979       <require condition="CM23_ARMCC"/>
 980       <require Dendian="Big-endian"/>
 981     </condition>
 982
 983     <condition id="CM33_ARMCC">
 984       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 985       <require condition="CM33"/>
 986       <require Tcompiler="ARMCC"/>
 987     </condition>
 988     <condition id="CM33_LE_ARMCC">
 989       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 990       <require condition="CM33_ARMCC"/>
 991       <require Dendian="Little-endian"/>
 992     </condition>
 993     <condition id="CM33_BE_ARMCC">
 994       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 995       <require condition="CM33_ARMCC"/>
 996       <require Dendian="Big-endian"/>
 997     </condition>
 998
 999     <condition id="CM33_FP_ARMCC">
1000       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1001       <require condition="CM33_FP"/>
1002       <require Tcompiler="ARMCC"/>
1003     </condition>
1004     <condition id="CM33_FP_LE_ARMCC">
1005       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1006       <require condition="CM33_FP_ARMCC"/>
1007       <require Dendian="Little-endian"/>
1008     </condition>
1009     <condition id="CM33_FP_BE_ARMCC">
1010       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1011       <require condition="CM33_FP_ARMCC"/>
1012       <require Dendian="Big-endian"/>
1013     </condition>
1014
1015     <condition id="CM33_NODSP_NOFPU_ARMCC">
1016       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1017       <require condition="CM33_NODSP_NOFPU"/>
1018       <require Tcompiler="ARMCC"/>
1019     </condition>
1020     <condition id="CM33_DSP_NOFPU_ARMCC">
1021       <description>CM33, DSP, no FPU, ARM Compiler</description>
1022       <require condition="CM33_DSP_NOFPU"/>
1023       <require Tcompiler="ARMCC"/>
1024     </condition>
1025     <condition id="CM33_NODSP_SP_ARMCC">
1026       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1027       <require condition="CM33_NODSP_SP"/>
1028       <require Tcompiler="ARMCC"/>
1029     </condition>
1030     <condition id="CM33_DSP_SP_ARMCC">
1031       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1032       <require condition="CM33_DSP_SP"/>
1033       <require Tcompiler="ARMCC"/>
1034     </condition>
1035     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1036       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1037       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1038       <require Dendian="Little-endian"/>
1039     </condition>
1040     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1041       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1042       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1043       <require Dendian="Little-endian"/>
1044     </condition>
1045     <condition id="CM33_NODSP_SP_LE_ARMCC">
1046       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1047       <require condition="CM33_NODSP_SP_ARMCC"/>
1048       <require Dendian="Little-endian"/>
1049     </condition>
1050     <condition id="CM33_DSP_SP_LE_ARMCC">
1051       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1052       <require condition="CM33_DSP_SP_ARMCC"/>
1053       <require Dendian="Little-endian"/>
1054     </condition>
1055
1056     <condition id="ARMv8MBL_ARMCC">
1057       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1058       <require condition="ARMv8MBL"/>
1059       <require Tcompiler="ARMCC"/>
1060     </condition>
1061     <condition id="ARMv8MBL_LE_ARMCC">
1062       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1063       <require condition="ARMv8MBL_ARMCC"/>
1064       <require Dendian="Little-endian"/>
1065     </condition>
1066     <condition id="ARMv8MBL_BE_ARMCC">
1067       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1068       <require condition="ARMv8MBL_ARMCC"/>
1069       <require Dendian="Big-endian"/>
1070     </condition>
1071
1072     <condition id="ARMv8MML_ARMCC">
1073       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1074       <require condition="ARMv8MML"/>
1075       <require Tcompiler="ARMCC"/>
1076     </condition>
1077     <condition id="ARMv8MML_LE_ARMCC">
1078       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1079       <require condition="ARMv8MML_ARMCC"/>
1080       <require Dendian="Little-endian"/>
1081     </condition>
1082     <condition id="ARMv8MML_BE_ARMCC">
1083       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1084       <require condition="ARMv8MML_ARMCC"/>
1085       <require Dendian="Big-endian"/>
1086     </condition>
1087
1088     <condition id="ARMv8MML_FP_ARMCC">
1089       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1090       <require condition="ARMv8MML_FP"/>
1091       <require Tcompiler="ARMCC"/>
1092     </condition>
1093     <condition id="ARMv8MML_FP_LE_ARMCC">
1094       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1095       <require condition="ARMv8MML_FP_ARMCC"/>
1096       <require Dendian="Little-endian"/>
1097     </condition>
1098     <condition id="ARMv8MML_FP_BE_ARMCC">
1099       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1100       <require condition="ARMv8MML_FP_ARMCC"/>
1101       <require Dendian="Big-endian"/>
1102     </condition>
1103
1104     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1105       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1106       <require condition="ARMv8MML_NODSP_NOFPU"/>
1107       <require Tcompiler="ARMCC"/>
1108     </condition>
1109     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1110       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1111       <require condition="ARMv8MML_DSP_NOFPU"/>
1112       <require Tcompiler="ARMCC"/>
1113     </condition>
1114     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1115       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1116       <require condition="ARMv8MML_NODSP_SP"/>
1117       <require Tcompiler="ARMCC"/>
1118     </condition>
1119     <condition id="ARMv8MML_DSP_SP_ARMCC">
1120       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1121       <require condition="ARMv8MML_DSP_SP"/>
1122       <require Tcompiler="ARMCC"/>
1123     </condition>
1124     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1125       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1126       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1127       <require Dendian="Little-endian"/>
1128     </condition>
1129     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1130       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1131       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1132       <require Dendian="Little-endian"/>
1133     </condition>
1134     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1135       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1136       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1137       <require Dendian="Little-endian"/>
1138     </condition>
1139     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1140       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1141       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1142       <require Dendian="Little-endian"/>
1143     </condition>
1144
1145     <!-- GCC compiler -->
1146     <condition id="CM0_GCC">
1147       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1148       <require condition="CM0"/>
1149       <require Tcompiler="GCC"/>
1150     </condition>
1151     <condition id="CM0_LE_GCC">
1152       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1153       <require condition="CM0_GCC"/>
1154       <require Dendian="Little-endian"/>
1155     </condition>
1156     <condition id="CM0_BE_GCC">
1157       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1158       <require condition="CM0_GCC"/>
1159       <require Dendian="Big-endian"/>
1160     </condition>
1161
1162     <condition id="CM3_GCC">
1163       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1164       <require condition="CM3"/>
1165       <require Tcompiler="GCC"/>
1166     </condition>
1167     <condition id="CM3_LE_GCC">
1168       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1169       <require condition="CM3_GCC"/>
1170       <require Dendian="Little-endian"/>
1171     </condition>
1172     <condition id="CM3_BE_GCC">
1173       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1174       <require condition="CM3_GCC"/>
1175       <require Dendian="Big-endian"/>
1176     </condition>
1177
1178     <condition id="CM4_GCC">
1179       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1180       <require condition="CM4"/>
1181       <require Tcompiler="GCC"/>
1182     </condition>
1183     <condition id="CM4_LE_GCC">
1184       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1185       <require condition="CM4_GCC"/>
1186       <require Dendian="Little-endian"/>
1187     </condition>
1188     <condition id="CM4_BE_GCC">
1189       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1190       <require condition="CM4_GCC"/>
1191       <require Dendian="Big-endian"/>
1192     </condition>
1193
1194     <condition id="CM4_FP_GCC">
1195       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1196       <require condition="CM4_FP"/>
1197       <require Tcompiler="GCC"/>
1198     </condition>
1199     <condition id="CM4_FP_LE_GCC">
1200       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1201       <require condition="CM4_FP_GCC"/>
1202       <require Dendian="Little-endian"/>
1203     </condition>
1204     <condition id="CM4_FP_BE_GCC">
1205       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1206       <require condition="CM4_FP_GCC"/>
1207       <require Dendian="Big-endian"/>
1208     </condition>
1209
1210     <!-- XMC 4000 Series devices from Infineon require a special library -->
1211     <condition id="CM4_LE_GCC_STD">
1212       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1213       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1214       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1215       <require Tcompiler="GCC"/>
1216     </condition>
1217     <condition id="CM4_LE_GCC_IFX">
1218       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1219       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1220       <require Tcompiler="GCC"/>
1221     </condition>
1222     <condition id="CM4_FP_LE_GCC_STD">
1223       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1224       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1225       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1226       <require Tcompiler="GCC"/>
1227     </condition>
1228     <condition id="CM4_FP_LE_GCC_IFX">
1229       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1230       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1231       <require Tcompiler="GCC"/>
1232     </condition>
1233
1234     <condition id="CM7_GCC">
1235       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1236       <require condition="CM7"/>
1237       <require Tcompiler="GCC"/>
1238     </condition>
1239     <condition id="CM7_LE_GCC">
1240       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1241       <require condition="CM7_GCC"/>
1242       <require Dendian="Little-endian"/>
1243     </condition>
1244     <condition id="CM7_BE_GCC">
1245       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1246       <require condition="CM7_GCC"/>
1247       <require Dendian="Big-endian"/>
1248     </condition>
1249
1250     <condition id="CM7_FP_GCC">
1251       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1252       <require condition="CM7_FP"/>
1253       <require Tcompiler="GCC"/>
1254     </condition>
1255     <condition id="CM7_FP_LE_GCC">
1256       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1257       <require condition="CM7_FP_GCC"/>
1258       <require Dendian="Little-endian"/>
1259     </condition>
1260     <condition id="CM7_FP_BE_GCC">
1261       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1262       <require condition="CM7_FP_GCC"/>
1263       <require Dendian="Big-endian"/>
1264     </condition>
1265
1266     <condition id="CM7_SP_GCC">
1267       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1268       <require condition="CM7_SP"/>
1269       <require Tcompiler="GCC"/>
1270     </condition>
1271     <condition id="CM7_SP_LE_GCC">
1272       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1273       <require condition="CM7_SP_GCC"/>
1274       <require Dendian="Little-endian"/>
1275     </condition>
1276     <condition id="CM7_SP_BE_GCC">
1277       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1278       <require condition="CM7_SP_GCC"/>
1279       <require Dendian="Big-endian"/>
1280     </condition>
1281
1282     <condition id="CM7_DP_GCC">
1283       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1284       <require condition="CM7_DP"/>
1285       <require Tcompiler="GCC"/>
1286     </condition>
1287     <condition id="CM7_DP_LE_GCC">
1288       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1289       <require condition="CM7_DP_GCC"/>
1290       <require Dendian="Little-endian"/>
1291     </condition>
1292     <condition id="CM7_DP_BE_GCC">
1293       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1294       <require condition="CM7_DP_GCC"/>
1295       <require Dendian="Big-endian"/>
1296     </condition>
1297
1298     <condition id="CM23_GCC">
1299       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1300       <require condition="CM23"/>
1301       <require Tcompiler="GCC"/>
1302     </condition>
1303     <condition id="CM23_LE_GCC">
1304       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1305       <require condition="CM23_GCC"/>
1306       <require Dendian="Little-endian"/>
1307     </condition>
1308     <condition id="CM23_BE_GCC">
1309       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1310       <require condition="CM23_GCC"/>
1311       <require Dendian="Big-endian"/>
1312     </condition>
1313
1314     <condition id="CM33_GCC">
1315       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1316       <require condition="CM33"/>
1317       <require Tcompiler="GCC"/>
1318     </condition>
1319     <condition id="CM33_LE_GCC">
1320       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1321       <require condition="CM33_GCC"/>
1322       <require Dendian="Little-endian"/>
1323     </condition>
1324     <condition id="CM33_BE_GCC">
1325       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1326       <require condition="CM33_GCC"/>
1327       <require Dendian="Big-endian"/>
1328     </condition>
1329
1330     <condition id="CM33_FP_GCC">
1331       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1332       <require condition="CM33_FP"/>
1333       <require Tcompiler="GCC"/>
1334     </condition>
1335     <condition id="CM33_FP_LE_GCC">
1336       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1337       <require condition="CM33_FP_GCC"/>
1338       <require Dendian="Little-endian"/>
1339     </condition>
1340     <condition id="CM33_FP_BE_GCC">
1341       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1342       <require condition="CM33_FP_GCC"/>
1343       <require Dendian="Big-endian"/>
1344     </condition>
1345
1346     <condition id="CM33_NODSP_NOFPU_GCC">
1347       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1348       <require condition="CM33_NODSP_NOFPU"/>
1349       <require Tcompiler="GCC"/>
1350     </condition>
1351     <condition id="CM33_DSP_NOFPU_GCC">
1352       <description>CM33, DSP, no FPU, GCC Compiler</description>
1353       <require condition="CM33_DSP_NOFPU"/>
1354       <require Tcompiler="GCC"/>
1355     </condition>
1356     <condition id="CM33_NODSP_SP_GCC">
1357       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1358       <require condition="CM33_NODSP_SP"/>
1359       <require Tcompiler="GCC"/>
1360     </condition>
1361     <condition id="CM33_DSP_SP_GCC">
1362       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1363       <require condition="CM33_DSP_SP"/>
1364       <require Tcompiler="GCC"/>
1365     </condition>
1366     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1367       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1368       <require condition="CM33_NODSP_NOFPU_GCC"/>
1369       <require Dendian="Little-endian"/>
1370     </condition>
1371     <condition id="CM33_DSP_NOFPU_LE_GCC">
1372       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1373       <require condition="CM33_DSP_NOFPU_GCC"/>
1374       <require Dendian="Little-endian"/>
1375     </condition>
1376     <condition id="CM33_NODSP_SP_LE_GCC">
1377       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1378       <require condition="CM33_NODSP_SP_GCC"/>
1379       <require Dendian="Little-endian"/>
1380     </condition>
1381     <condition id="CM33_DSP_SP_LE_GCC">
1382       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1383       <require condition="CM33_DSP_SP_GCC"/>
1384       <require Dendian="Little-endian"/>
1385     </condition>
1386
1387     <condition id="ARMv8MBL_GCC">
1388       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1389       <require condition="ARMv8MBL"/>
1390       <require Tcompiler="GCC"/>
1391     </condition>
1392     <condition id="ARMv8MBL_LE_GCC">
1393       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1394       <require condition="ARMv8MBL_GCC"/>
1395       <require Dendian="Little-endian"/>
1396     </condition>
1397     <condition id="ARMv8MBL_BE_GCC">
1398       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1399       <require condition="ARMv8MBL_GCC"/>
1400       <require Dendian="Big-endian"/>
1401     </condition>
1402
1403     <condition id="ARMv8MML_GCC">
1404       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1405       <require condition="ARMv8MML"/>
1406       <require Tcompiler="GCC"/>
1407     </condition>
1408     <condition id="ARMv8MML_LE_GCC">
1409       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1410       <require condition="ARMv8MML_GCC"/>
1411       <require Dendian="Little-endian"/>
1412     </condition>
1413     <condition id="ARMv8MML_BE_GCC">
1414       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1415       <require condition="ARMv8MML_GCC"/>
1416       <require Dendian="Big-endian"/>
1417     </condition>
1418
1419     <condition id="ARMv8MML_FP_GCC">
1420       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1421       <require condition="ARMv8MML_FP"/>
1422       <require Tcompiler="GCC"/>
1423     </condition>
1424     <condition id="ARMv8MML_FP_LE_GCC">
1425       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1426       <require condition="ARMv8MML_FP_GCC"/>
1427       <require Dendian="Little-endian"/>
1428     </condition>
1429     <condition id="ARMv8MML_FP_BE_GCC">
1430       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1431       <require condition="ARMv8MML_FP_GCC"/>
1432       <require Dendian="Big-endian"/>
1433     </condition>
1434
1435     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1436       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1437       <require condition="ARMv8MML_NODSP_NOFPU"/>
1438       <require Tcompiler="GCC"/>
1439     </condition>
1440     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1441       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1442       <require condition="ARMv8MML_DSP_NOFPU"/>
1443       <require Tcompiler="GCC"/>
1444     </condition>
1445     <condition id="ARMv8MML_NODSP_SP_GCC">
1446       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1447       <require condition="ARMv8MML_NODSP_SP"/>
1448       <require Tcompiler="GCC"/>
1449     </condition>
1450     <condition id="ARMv8MML_DSP_SP_GCC">
1451       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1452       <require condition="ARMv8MML_DSP_SP"/>
1453       <require Tcompiler="GCC"/>
1454     </condition>
1455     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1456       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1457       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1458       <require Dendian="Little-endian"/>
1459     </condition>
1460     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1461       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1462       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1463       <require Dendian="Little-endian"/>
1464     </condition>
1465     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1466       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1467       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1468       <require Dendian="Little-endian"/>
1469     </condition>
1470     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1471       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1472       <require condition="ARMv8MML_DSP_SP_GCC"/>
1473       <require Dendian="Little-endian"/>
1474     </condition>
1475
1476     <!-- IAR compiler -->
1477     <condition id="CM0_IAR">
1478       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1479       <require condition="CM0"/>
1480       <require Tcompiler="IAR"/>
1481     </condition>
1482     <condition id="CM0_LE_IAR">
1483       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1484       <require condition="CM0_IAR"/>
1485       <require Dendian="Little-endian"/>
1486     </condition>
1487     <condition id="CM0_BE_IAR">
1488       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1489       <require condition="CM0_IAR"/>
1490       <require Dendian="Big-endian"/>
1491     </condition>
1492
1493     <condition id="CM3_IAR">
1494       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1495       <require condition="CM3"/>
1496       <require Tcompiler="IAR"/>
1497     </condition>
1498     <condition id="CM3_LE_IAR">
1499       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1500       <require condition="CM3_IAR"/>
1501       <require Dendian="Little-endian"/>
1502     </condition>
1503     <condition id="CM3_BE_IAR">
1504       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1505       <require condition="CM3_IAR"/>
1506       <require Dendian="Big-endian"/>
1507     </condition>
1508
1509     <condition id="CM4_IAR">
1510       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1511       <require condition="CM4"/>
1512       <require Tcompiler="IAR"/>
1513     </condition>
1514     <condition id="CM4_LE_IAR">
1515       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1516       <require condition="CM4_IAR"/>
1517       <require Dendian="Little-endian"/>
1518     </condition>
1519     <condition id="CM4_BE_IAR">
1520       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1521       <require condition="CM4_IAR"/>
1522       <require Dendian="Big-endian"/>
1523     </condition>
1524
1525     <condition id="CM4_FP_IAR">
1526       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1527       <require condition="CM4_FP"/>
1528       <require Tcompiler="IAR"/>
1529     </condition>
1530     <condition id="CM4_FP_LE_IAR">
1531       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1532       <require condition="CM4_FP_IAR"/>
1533       <require Dendian="Little-endian"/>
1534     </condition>
1535     <condition id="CM4_FP_BE_IAR">
1536       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1537       <require condition="CM4_FP_IAR"/>
1538       <require Dendian="Big-endian"/>
1539     </condition>
1540
1541     <condition id="CM7_IAR">
1542       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1543       <require condition="CM7"/>
1544       <require Tcompiler="IAR"/>
1545     </condition>
1546     <condition id="CM7_LE_IAR">
1547       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1548       <require condition="CM7_IAR"/>
1549       <require Dendian="Little-endian"/>
1550     </condition>
1551     <condition id="CM7_BE_IAR">
1552       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1553       <require condition="CM7_IAR"/>
1554       <require Dendian="Big-endian"/>
1555     </condition>
1556
1557     <condition id="CM7_FP_IAR">
1558       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1559       <require condition="CM7_FP"/>
1560       <require Tcompiler="IAR"/>
1561     </condition>
1562     <condition id="CM7_FP_LE_IAR">
1563       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1564       <require condition="CM7_FP_IAR"/>
1565       <require Dendian="Little-endian"/>
1566     </condition>
1567     <condition id="CM7_FP_BE_IAR">
1568       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1569       <require condition="CM7_FP_IAR"/>
1570       <require Dendian="Big-endian"/>
1571     </condition>
1572
1573     <condition id="CM7_SP_IAR">
1574       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1575       <require condition="CM7_SP"/>
1576       <require Tcompiler="IAR"/>
1577     </condition>
1578     <condition id="CM7_SP_LE_IAR">
1579       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1580       <require condition="CM7_SP_IAR"/>
1581       <require Dendian="Little-endian"/>
1582     </condition>
1583     <condition id="CM7_SP_BE_IAR">
1584       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1585       <require condition="CM7_SP_IAR"/>
1586       <require Dendian="Big-endian"/>
1587     </condition>
1588
1589     <condition id="CM7_DP_IAR">
1590       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1591       <require condition="CM7_DP"/>
1592       <require Tcompiler="IAR"/>
1593     </condition>
1594     <condition id="CM7_DP_LE_IAR">
1595       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1596       <require condition="CM7_DP_IAR"/>
1597       <require Dendian="Little-endian"/>
1598     </condition>
1599     <condition id="CM7_DP_BE_IAR">
1600       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1601       <require condition="CM7_DP_IAR"/>
1602       <require Dendian="Big-endian"/>
1603     </condition>
1604
1605     <!-- conditions selecting single devices and CMSIS Core -->
1606     <!-- used for component startup, GCC version is used for C-Startup -->
1607     <condition id="ARMCM0 CMSIS">
1608       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1609       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1610       <require Cclass="CMSIS" Cgroup="CORE"/>
1611     </condition>
1612     <condition id="ARMCM0 CMSIS GCC">
1613       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1614       <require condition="ARMCM0 CMSIS"/>
1615       <require condition="GCC"/>
1616     </condition>
1617
1618     <condition id="ARMCM0+ CMSIS">
1619       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1620       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1621       <require Cclass="CMSIS" Cgroup="CORE"/>
1622     </condition>
1623     <condition id="ARMCM0+ CMSIS GCC">
1624       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1625       <require condition="ARMCM0+ CMSIS"/>
1626       <require condition="GCC"/>
1627     </condition>
1628
1629     <condition id="ARMCM3 CMSIS">
1630       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1631       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1632       <require Cclass="CMSIS" Cgroup="CORE"/>
1633     </condition>
1634     <condition id="ARMCM3 CMSIS GCC">
1635       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1636       <require condition="ARMCM3 CMSIS"/>
1637       <require condition="GCC"/>
1638     </condition>
1639
1640     <condition id="ARMCM4 CMSIS">
1641       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1642       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1643       <require Cclass="CMSIS" Cgroup="CORE"/>
1644     </condition>
1645     <condition id="ARMCM4 CMSIS GCC">
1646       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1647       <require condition="ARMCM4 CMSIS"/>
1648       <require condition="GCC"/>
1649     </condition>
1650
1651     <condition id="ARMCM7 CMSIS">
1652       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1653       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1654       <require Cclass="CMSIS" Cgroup="CORE"/>
1655     </condition>
1656     <condition id="ARMCM7 CMSIS GCC">
1657       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1658       <require condition="ARMCM7 CMSIS"/>
1659       <require condition="GCC"/>
1660     </condition>
1661
1662     <condition id="ARMCM23 CMSIS">
1663       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1664       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1665       <require Cclass="CMSIS" Cgroup="CORE"/>
1666     </condition>
1667     <condition id="ARMCM23 CMSIS GCC">
1668       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1669       <require condition="ARMCM23 CMSIS"/>
1670       <require condition="GCC"/>
1671     </condition>
1672
1673     <condition id="ARMCM33 CMSIS">
1674       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1675       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1676       <require Cclass="CMSIS" Cgroup="CORE"/>
1677     </condition>
1678     <condition id="ARMCM33 CMSIS GCC">
1679       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1680       <require condition="ARMCM33 CMSIS"/>
1681       <require condition="GCC"/>
1682     </condition>
1683
1684     <condition id="ARMSC000 CMSIS">
1685       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1686       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1687       <require Cclass="CMSIS" Cgroup="CORE"/>
1688     </condition>
1689     <condition id="ARMSC000 CMSIS GCC">
1690       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1691       <require condition="ARMSC000 CMSIS"/>
1692       <require condition="GCC"/>
1693     </condition>
1694
1695     <condition id="ARMSC300 CMSIS">
1696       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1697       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1698       <require Cclass="CMSIS" Cgroup="CORE"/>
1699     </condition>
1700     <condition id="ARMSC300 CMSIS GCC">
1701       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1702       <require condition="ARMSC300 CMSIS"/>
1703       <require condition="GCC"/>
1704     </condition>
1705
1706     <condition id="ARMv8MBL CMSIS">
1707       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1708       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1709       <require Cclass="CMSIS" Cgroup="CORE"/>
1710     </condition>
1711     <condition id="ARMv8MBL CMSIS GCC">
1712       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1713       <require condition="ARMv8MBL CMSIS"/>
1714       <require condition="GCC"/>
1715     </condition>
1716
1717     <condition id="ARMv8MML CMSIS">
1718       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1719       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1720       <require Cclass="CMSIS" Cgroup="CORE"/>
1721     </condition>
1722     <condition id="ARMv8MML CMSIS GCC">
1723       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1724       <require condition="ARMv8MML CMSIS"/>
1725       <require condition="GCC"/>
1726     </condition>
1727
1728     <condition id="ARMCA5 CMSIS">
1729       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1730       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1731       <require Cclass="CMSIS" Cgroup="CORE"/>
1732     </condition>
1733
1734     <condition id="ARMCA7 CMSIS">
1735       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1736       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1737       <require Cclass="CMSIS" Cgroup="CORE"/>
1738     </condition>
1739
1740     <condition id="ARMCA9 CMSIS">
1741       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1742       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1743       <require Cclass="CMSIS" Cgroup="CORE"/>
1744     </condition>
1745
1746     <!-- CMSIS DSP -->
1747     <condition id="CMSIS DSP">
1748       <description>Components required for DSP</description>
1749       <require condition="ARMv6_7_8-M Device"/>
1750       <require condition="ARMCC GCC"/>
1751       <require Cclass="CMSIS" Cgroup="CORE"/>
1752     </condition>
1753
1754     <!-- RTOS RTX -->
1755     <condition id="RTOS RTX">
1756       <description>Components required for RTOS RTX</description>
1757       <require condition="ARMv6_7-M Device"/>
1758       <require condition="ARMCC GCC IAR"/>
1759       <require Cclass="Device" Cgroup="Startup"/>
1760       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1761     </condition>
1762     <condition id="RTOS RTX5">
1763       <description>Components required for RTOS RTX5</description>
1764       <require condition="ARMv6_7_8-M Device"/>
1765       <require condition="ARMCC GCC IAR"/>
1766       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1767     </condition>
1768     <condition id="RTOS2 RTX5">
1769       <description>Components required for RTOS2 RTX5</description>
1770       <require condition="ARMv6_7_8-M Device"/>
1771       <require condition="ARMCC GCC IAR"/>
1772       <require Cclass="CMSIS"  Cgroup="CORE"/>
1773       <require Cclass="Device" Cgroup="Startup"/>
1774     </condition>
1775     <condition id="RTOS2 RTX5 NS">
1776       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1777       <require condition="ARMv8-M TZ Device"/>
1778       <require condition="ARMCC GCC"/>
1779       <require Cclass="CMSIS"  Cgroup="CORE"/>
1780       <require Cclass="Device" Cgroup="Startup"/>
1781     </condition>
1782
1783   </conditions>
1784
1785   <components>
1786     <!-- CMSIS-Core component -->
1787     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.1"  condition="ARMv6_7_8-M Device" >
1788       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1789       <files>
1790         <!-- CPU independent -->
1791         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1792         <file category="include" name="CMSIS/Include/"/>
1793         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1794         <!-- Code template -->
1795         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1796         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1797       </files>
1798     </component>
1799
1800     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0"  condition="ARMv7-A Device" >
1801       <description>CMSIS-CORE for Cortex-A</description>
1802       <files>
1803         <!-- CPU independent -->
1804         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1805         <file category="include" name="CMSIS/Core_A/Include/"/>
1806       </files>
1807     </component>
1808
1809     <!-- CMSIS-Startup components -->
1810     <!-- Cortex-M0 -->
1811     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1812       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1813       <files>
1814         <!-- include folder / device header file -->
1815         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1816         <!-- startup / system file -->
1817         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1818         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1819         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1820         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1821         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1822       </files>
1823     </component>
1824     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1825       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1826       <files>
1827         <!-- include folder / device header file -->
1828         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1829         <!-- startup / system file -->
1830         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1831         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1832         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1833       </files>
1834     </component>
1835
1836     <!-- Cortex-M0+ -->
1837     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1838       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1839       <files>
1840         <!-- include folder / device header file -->
1841         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1842         <!-- startup / system file -->
1843         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1844         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1845         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1846         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1847         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1848       </files>
1849     </component>
1850     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1851       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1852       <files>
1853         <!-- include folder / device header file -->
1854         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1855         <!-- startup / system file -->
1856         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1857         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1858         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1859       </files>
1860     </component>
1861
1862     <!-- Cortex-M3 -->
1863     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1864       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1865       <files>
1866         <!-- include folder / device header file -->
1867         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1868         <!-- startup / system file -->
1869         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1870         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1871         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1872         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1873         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1874       </files>
1875     </component>
1876     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1877       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1878       <files>
1879         <!-- include folder / device header file -->
1880         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1881         <!-- startup / system file -->
1882         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1883         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1884         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1885       </files>
1886     </component>
1887
1888     <!-- Cortex-M4 -->
1889     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1890       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1891       <files>
1892         <!-- include folder / device header file -->
1893         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1894         <!-- startup / system file -->
1895         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1896         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1897         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1898         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1899         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1900       </files>
1901     </component>
1902     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1903       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1904       <files>
1905         <!-- include folder / device header file -->
1906         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1907         <!-- startup / system file -->
1908         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1909         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1910         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1911       </files>
1912     </component>
1913
1914     <!-- Cortex-M7 -->
1915     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1916       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1917       <files>
1918         <!-- include folder / device header file -->
1919         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1920         <!-- startup / system file -->
1921         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1922         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1923         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1924         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1925         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1926       </files>
1927     </component>
1928     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1929       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1930       <files>
1931         <!-- include folder / device header file -->
1932         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1933         <!-- startup / system file -->
1934         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1935         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1936         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1937       </files>
1938     </component>
1939
1940     <!-- Cortex-M23 -->
1941     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1942       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1943       <files>
1944         <!-- include folder / device header file -->
1945         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1946         <!-- startup / system file -->
1947         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1948         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1949         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1950         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1951         <!-- SAU configuration -->
1952         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1953       </files>
1954     </component>
1955     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1956       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1957       <files>
1958         <!-- include folder / device header file -->
1959         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1960         <!-- startup / system file -->
1961         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1962         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1963         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1964         <!-- SAU configuration -->
1965         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1966       </files>
1967     </component>
1968
1969     <!-- Cortex-M33 -->
1970     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
1971       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1972       <files>
1973         <!-- include folder / device header file -->
1974         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1975         <!-- startup / system file -->
1976         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
1977         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
1978         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1979         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
1980         <!-- SAU configuration -->
1981         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1982       </files>
1983     </component>
1984     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
1985       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1986       <files>
1987         <!-- include folder / device header file -->
1988         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1989         <!-- startup / system file -->
1990         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
1991         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1992         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
1993         <!-- SAU configuration -->
1994         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1995       </files>
1996     </component>
1997
1998     <!-- Cortex-SC000 -->
1999     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2000       <description>System and Startup for Generic ARM SC000 device</description>
2001       <files>
2002         <!-- include folder / device header file -->
2003         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2004         <!-- startup / system file -->
2005         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2006         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2007         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2008         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2009         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2010       </files>
2011     </component>
2012     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2013       <description>System and Startup for Generic ARM SC000 device</description>
2014       <files>
2015         <!-- include folder / device header file -->
2016         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2017         <!-- startup / system file -->
2018         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2019         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2020         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2021       </files>
2022     </component>
2023
2024     <!-- Cortex-SC300 -->
2025     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2026       <description>System and Startup for Generic ARM SC300 device</description>
2027       <files>
2028         <!-- include folder / device header file -->
2029         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2030         <!-- startup / system file -->
2031         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2032         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2033         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2034         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2035         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2036       </files>
2037     </component>
2038     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2039       <description>System and Startup for Generic ARM SC300 device</description>
2040       <files>
2041         <!-- include folder / device header file -->
2042         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2043         <!-- startup / system file -->
2044         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2045         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2046         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2047       </files>
2048     </component>
2049
2050     <!-- ARMv8MBL -->
2051     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2052       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2053       <files>
2054         <!-- include folder / device header file -->
2055         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2056         <!-- startup / system file -->
2057         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2058         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2059         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2060         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2061         <!-- SAU configuration -->
2062         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2063       </files>
2064     </component>
2065     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2066       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2067       <files>
2068         <!-- include folder / device header file -->
2069         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2070         <!-- startup / system file -->
2071         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2072         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2073         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2074         <!-- SAU configuration -->
2075         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2076       </files>
2077     </component>
2078
2079     <!-- ARMv8MML -->
2080     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2081       <description>System and Startup for Generic ARM ARMv8MML device</description>
2082       <files>
2083         <!-- include folder / device header file -->
2084         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2085         <!-- startup / system file -->
2086         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2087         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2088         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2089         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2090         <!-- SAU configuration -->
2091         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2092       </files>
2093     </component>
2094     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2095       <description>System and Startup for Generic ARM ARMv8MML device</description>
2096       <files>
2097         <!-- include folder / device header file -->
2098         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2099         <!-- startup / system file -->
2100         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2101         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2102         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2103         <!-- SAU configuration -->
2104         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2105       </files>
2106     </component>
2107
2108     <!-- Cortex-A5 -->
2109     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2110       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2111       <files>
2112         <!-- include folder / device header file -->
2113         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2114         <!-- startup / system / mmu files -->
2115         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/ARM/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC"/>
2116         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2117         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2118         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2119         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2120         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/ARM/ARMCA5.sct"       version="1.0.0" attr="config"/>
2121       </files>
2122     </component>
2123
2124     <!-- Cortex-A7 -->
2125     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2126       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2127       <files>
2128         <!-- include folder / device header file -->
2129         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2130         <!-- startup / system / mmu files -->
2131         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/ARM/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC"/>
2132         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2133         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2134         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2135         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2136         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/ARM/ARMCA7.sct"       version="1.0.0" attr="config"/>
2137       </files>
2138     </component>
2139
2140     <!-- Cortex-A9 -->
2141     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA9 CMSIS">
2142       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2143       <files>
2144         <!-- include folder / device header file -->
2145         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2146         <!-- startup / system / mmu files -->
2147         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/ARM/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC"/>
2148         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2149         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2150         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2151         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2152         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/ARM/ARMCA9.sct"       version="1.0.0" attr="config"/>
2153       </files>
2154     </component>
2155
2156     <!-- CMSIS-DSP component -->
2157     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
2158       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2159       <files>
2160         <!-- CPU independent -->
2161         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2162         <file category="header" name="CMSIS/Include/arm_math.h"/>
2163
2164         <!-- CPU and Compiler dependent -->
2165         <!-- ARMCC -->
2166         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2167         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2168         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2169         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2170         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2171         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2172         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2173         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2174         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2175         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2176         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2177         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2178         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2179         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2180
2181         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2182         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2183         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2184         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2185         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2186         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2187         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2188         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2189         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2190         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2191         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2192         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2193
2194         <!-- GCC -->
2195         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2196         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2197         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2198         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2199         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2200         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2201         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2202
2203         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2204         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2205         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2206         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2207         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2208         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2209         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2210         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2211         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2212         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2213         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2214         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2215
2216       </files>
2217     </component>
2218
2219     <!-- CMSIS-RTOS Keil RTX component -->
2220     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
2221       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2222       <RTE_Components_h>
2223         <!-- the following content goes into file 'RTE_Components.h' -->
2224         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2225         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2226       </RTE_Components_h>
2227       <files>
2228         <!-- CPU independent -->
2229         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2230         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2231         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2232
2233         <!-- RTX templates -->
2234         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2235         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2236         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2237         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2238         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2239         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2240         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2241         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2242         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2243         <!-- tool-chain specific template file -->
2244         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2245         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2246         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2247
2248         <!-- CPU and Compiler dependent -->
2249         <!-- ARMCC -->
2250         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2251         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2252         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2253         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2254         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2255         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2256         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2257         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2258         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2259         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2260         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2261         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2262         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2263         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2264         <!-- GCC -->
2265         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2266         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2267         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2268         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2269         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2270         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2271         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2272         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2273         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2274         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2275         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2276         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2277         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2278         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2279         <!-- IAR -->
2280         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2281         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2282         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2283         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2284         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2285         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2286         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2287         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2288         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2289         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2290         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2291         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2292       </files>
2293     </component>
2294
2295     <!-- CMSIS-RTOS Keil RTX5 component -->
2296     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.1.0" Capiversion="1.0.0" condition="RTOS RTX5">
2297       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2298       <RTE_Components_h>
2299         <!-- the following content goes into file 'RTE_Components.h' -->
2300         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2301         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2302       </RTE_Components_h>
2303       <files>
2304         <!-- RTX header file -->
2305         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2306         <!-- RTX compatibility module for API V1 -->
2307         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2308       </files>
2309     </component>
2310
2311     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2312     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5">
2313       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2314       <RTE_Components_h>
2315         <!-- the following content goes into file 'RTE_Components.h' -->
2316         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2317         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2318       </RTE_Components_h>
2319       <files>
2320         <!-- RTX documentation -->
2321         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2322
2323         <!-- RTX header files -->
2324         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2325
2326         <!-- RTX configuration -->
2327         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2328         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2329
2330         <!-- RTX templates -->
2331         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2332         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2333         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2334         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2335         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2336         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2337         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2338         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2339         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="2.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2340         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2341
2342         <!-- RTX library configuration -->
2343         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2344
2345         <!-- RTX libraries (CPU and Compiler dependent) -->
2346         <!-- ARMCC -->
2347         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2348         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2349         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2350         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2351         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2352         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2353         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2354         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2355         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2356         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2357         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2358         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2359         <!-- GCC -->
2360         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2361         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2362         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2363         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2364         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2365         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2366         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2367         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2368         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2369         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2370         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2371         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2372         <!-- IAR -->
2373         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2374         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2375         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2376         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2377         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2378         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2379       </files>
2380     </component>
2381     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2382       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2383       <RTE_Components_h>
2384         <!-- the following content goes into file 'RTE_Components.h' -->
2385         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2386         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2387         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2388       </RTE_Components_h>
2389       <files>
2390         <!-- RTX documentation -->
2391         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2392
2393         <!-- RTX header files -->
2394         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2395
2396         <!-- RTX configuration -->
2397         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2398         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2399
2400         <!-- RTX templates -->
2401         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2402         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2403         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2404         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2405         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2406         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2407         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2408         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2409         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2410
2411         <!-- RTX library configuration -->
2412         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2413
2414         <!-- RTX libraries (CPU and Compiler dependent) -->
2415         <!-- ARMCC -->
2416         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2417         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2418         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2419         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2420         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2421         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2422         <!-- GCC -->
2423         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2424         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2425         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2426         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2427         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2428         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2429       </files>
2430     </component>
2431     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5">
2432       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2433       <RTE_Components_h>
2434         <!-- the following content goes into file 'RTE_Components.h' -->
2435         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2436         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2437         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2438       </RTE_Components_h>
2439       <files>
2440         <!-- RTX documentation -->
2441         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2442
2443         <!-- RTX header files -->
2444         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2445
2446         <!-- RTX configuration -->
2447         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2448         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2449
2450         <!-- RTX templates -->
2451         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2452         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2453         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2454         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2455         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2456         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2457         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2458         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2459         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2460
2461         <!-- RTX sources (core) -->
2462         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2463         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2464         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2465         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2466         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2467         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2468         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2469         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2470         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2471         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2472         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2473         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2474         <!-- RTX sources (library configuration) -->
2475         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2476         <!-- RTX sources (handlers ARMCC) -->
2477         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2478         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2479         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2480         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2481         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2482         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2483         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2484         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2485         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2486         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2487         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2488         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2489         <!-- RTX sources (handlers GCC) -->
2490         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2491         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2492         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2493         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2494         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2495         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2496         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2497         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2498         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2499         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2500         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2501         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2502         <!-- RTX sources (handlers IAR) -->
2503         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2504         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2505         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2506         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2507         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2508         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2509       </files>
2510     </component>
2511     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2512       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2513       <RTE_Components_h>
2514         <!-- the following content goes into file 'RTE_Components.h' -->
2515         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2516         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2517         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2518         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2519       </RTE_Components_h>
2520       <files>
2521         <!-- RTX documentation -->
2522         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2523
2524         <!-- RTX header files -->
2525         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2526
2527         <!-- RTX configuration -->
2528         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2529         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2530
2531         <!-- RTX templates -->
2532         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2533         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2534         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2535         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2536         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2537         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2538         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2539         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2540         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2541
2542         <!-- RTX sources (core) -->
2543         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2544         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2545         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2546         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2547         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2548         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2549         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2550         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2551         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2552         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2553         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2554         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2555         <!-- RTX sources (library configuration) -->
2556         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2557         <!-- RTX sources (ARMCC handlers) -->
2558         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2559         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2560         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2561         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2562         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2563         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2564         <!-- RTX sources (GCC handlers) -->
2565         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2566         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2567         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2568         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2569         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2570         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2571       </files>
2572     </component>
2573
2574   </components>
2575
2576   <boards>
2577     <board name="uVision Simulator" vendor="Keil">
2578       <description>uVision Simulator</description>
2579       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2580       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2581       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2582       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2583       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2584       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2585       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2586       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2587       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2588       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2589       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2590       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2591       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2592       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2593       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2594       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2595       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2596       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2597    </board>
2598   </boards>
2599
2600   <examples>
2601     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2602       <description>DSP_Lib Class Marks example</description>
2603       <board name="uVision Simulator" vendor="Keil"/>
2604       <project>
2605         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2606       </project>
2607       <attributes>
2608         <component Cclass="CMSIS" Cgroup="CORE"/>
2609         <component Cclass="CMSIS" Cgroup="DSP"/>
2610         <component Cclass="Device" Cgroup="Startup"/>
2611         <category>Getting Started</category>
2612       </attributes>
2613     </example>
2614
2615     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2616       <description>DSP_Lib Convolution example</description>
2617       <board name="uVision Simulator" vendor="Keil"/>
2618       <project>
2619         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2620       </project>
2621       <attributes>
2622         <component Cclass="CMSIS" Cgroup="CORE"/>
2623         <component Cclass="CMSIS" Cgroup="DSP"/>
2624         <component Cclass="Device" Cgroup="Startup"/>
2625         <category>Getting Started</category>
2626       </attributes>
2627     </example>
2628
2629     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2630       <description>DSP_Lib Dotproduct example</description>
2631       <board name="uVision Simulator" vendor="Keil"/>
2632       <project>
2633         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2634       </project>
2635       <attributes>
2636         <component Cclass="CMSIS" Cgroup="CORE"/>
2637         <component Cclass="CMSIS" Cgroup="DSP"/>
2638         <component Cclass="Device" Cgroup="Startup"/>
2639         <category>Getting Started</category>
2640       </attributes>
2641     </example>
2642
2643     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2644       <description>DSP_Lib FFT Bin example</description>
2645       <board name="uVision Simulator" vendor="Keil"/>
2646       <project>
2647         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2648       </project>
2649       <attributes>
2650         <component Cclass="CMSIS" Cgroup="CORE"/>
2651         <component Cclass="CMSIS" Cgroup="DSP"/>
2652         <component Cclass="Device" Cgroup="Startup"/>
2653         <category>Getting Started</category>
2654       </attributes>
2655     </example>
2656
2657     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2658       <description>DSP_Lib FIR example</description>
2659       <board name="uVision Simulator" vendor="Keil"/>
2660       <project>
2661         <environment name="uv" load="arm_fir_example.uvprojx"/>
2662       </project>
2663       <attributes>
2664         <component Cclass="CMSIS" Cgroup="CORE"/>
2665         <component Cclass="CMSIS" Cgroup="DSP"/>
2666         <component Cclass="Device" Cgroup="Startup"/>
2667         <category>Getting Started</category>
2668       </attributes>
2669     </example>
2670
2671     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2672       <description>DSP_Lib Graphic Equalizer example</description>
2673       <board name="uVision Simulator" vendor="Keil"/>
2674       <project>
2675         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2676       </project>
2677       <attributes>
2678         <component Cclass="CMSIS" Cgroup="CORE"/>
2679         <component Cclass="CMSIS" Cgroup="DSP"/>
2680         <component Cclass="Device" Cgroup="Startup"/>
2681         <category>Getting Started</category>
2682       </attributes>
2683     </example>
2684
2685     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2686       <description>DSP_Lib Linear Interpolation example</description>
2687       <board name="uVision Simulator" vendor="Keil"/>
2688       <project>
2689         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2690       </project>
2691       <attributes>
2692         <component Cclass="CMSIS" Cgroup="CORE"/>
2693         <component Cclass="CMSIS" Cgroup="DSP"/>
2694         <component Cclass="Device" Cgroup="Startup"/>
2695         <category>Getting Started</category>
2696       </attributes>
2697     </example>
2698
2699     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2700       <description>DSP_Lib Matrix example</description>
2701       <board name="uVision Simulator" vendor="Keil"/>
2702       <project>
2703         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2704       </project>
2705       <attributes>
2706         <component Cclass="CMSIS" Cgroup="CORE"/>
2707         <component Cclass="CMSIS" Cgroup="DSP"/>
2708         <component Cclass="Device" Cgroup="Startup"/>
2709         <category>Getting Started</category>
2710       </attributes>
2711     </example>
2712
2713     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2714       <description>DSP_Lib Signal Convergence example</description>
2715       <board name="uVision Simulator" vendor="Keil"/>
2716       <project>
2717         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2718       </project>
2719       <attributes>
2720         <component Cclass="CMSIS" Cgroup="CORE"/>
2721         <component Cclass="CMSIS" Cgroup="DSP"/>
2722         <component Cclass="Device" Cgroup="Startup"/>
2723         <category>Getting Started</category>
2724       </attributes>
2725     </example>
2726
2727     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2728       <description>DSP_Lib Sinus/Cosinus example</description>
2729       <board name="uVision Simulator" vendor="Keil"/>
2730       <project>
2731         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2732       </project>
2733       <attributes>
2734         <component Cclass="CMSIS" Cgroup="CORE"/>
2735         <component Cclass="CMSIS" Cgroup="DSP"/>
2736         <component Cclass="Device" Cgroup="Startup"/>
2737         <category>Getting Started</category>
2738       </attributes>
2739     </example>
2740
2741     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2742       <description>DSP_Lib Variance example</description>
2743       <board name="uVision Simulator" vendor="Keil"/>
2744       <project>
2745         <environment name="uv" load="arm_variance_example.uvprojx"/>
2746       </project>
2747       <attributes>
2748         <component Cclass="CMSIS" Cgroup="CORE"/>
2749         <component Cclass="CMSIS" Cgroup="DSP"/>
2750         <component Cclass="Device" Cgroup="Startup"/>
2751         <category>Getting Started</category>
2752       </attributes>
2753     </example>
2754
2755     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2756       <description>CMSIS-RTOS2 Blinky example</description>
2757       <board name="uVision Simulator" vendor="Keil"/>
2758       <project>
2759         <environment name="uv" load="Blinky.uvprojx"/>
2760       </project>
2761       <attributes>
2762         <component Cclass="CMSIS" Cgroup="CORE"/>
2763         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2764         <component Cclass="Device" Cgroup="Startup"/>
2765         <category>Getting Started</category>
2766       </attributes>
2767     </example>
2768
2769     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2770       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2771       <board name="uVision Simulator" vendor="Keil"/>
2772       <project>
2773         <environment name="uv" load="Blinky.uvprojx"/>
2774       </project>
2775       <attributes>
2776         <component Cclass="CMSIS" Cgroup="CORE"/>
2777         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2778         <component Cclass="Device" Cgroup="Startup"/>
2779         <category>Getting Started</category>
2780       </attributes>
2781     </example>
2782
2783     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2784       <description>Bare-metal secure/non-secure example without RTOS</description>
2785       <board name="uVision Simulator" vendor="Keil"/>
2786       <project>
2787         <environment name="uv" load="NoRTOS.uvmpw"/>
2788       </project>
2789       <attributes>
2790         <component Cclass="CMSIS" Cgroup="CORE"/>
2791         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2792         <component Cclass="Device" Cgroup="Startup"/>
2793         <category>Getting Started</category>
2794       </attributes>
2795     </example>
2796
2797     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2798       <description>Secure/non-secure RTOS example with thread context management</description>
2799       <board name="uVision Simulator" vendor="Keil"/>
2800       <project>
2801         <environment name="uv" load="RTOS.uvmpw"/>
2802       </project>
2803       <attributes>
2804         <component Cclass="CMSIS" Cgroup="CORE"/>
2805         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2806         <component Cclass="Device" Cgroup="Startup"/>
2807         <category>Getting Started</category>
2808       </attributes>
2809     </example>
2810
2811     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2812       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2813       <board name="uVision Simulator" vendor="Keil"/>
2814       <project>
2815         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2816       </project>
2817       <attributes>
2818         <component Cclass="CMSIS" Cgroup="CORE"/>
2819         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2820         <component Cclass="Device" Cgroup="Startup"/>
2821         <category>Getting Started</category>
2822       </attributes>
2823     </example>
2824
2825   </examples>
2826
2827 </package>