begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.7.7" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="https://raw.githubusercontent.com/Open-CMSIS-Pack/Open-CMSIS-Pack-Spec/v1.7.7/schema/PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Common Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>https://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.9.1">
  12       Active development ...
  13       CMSIS-DSP: Moved into separate pack!
  14       CMSIS-NN: 4.0.0 (see revision history for details)
  15        - Changed return types of all API's
  16        - Support for int16 average pooling DSP implementation
  17        - Support for DSP extension optimization for int16 depthwise_conv
  18        - Support for MVEI extension optimization for int16 depthwise_conv
  19        - Support for MVEI extension optimization for int16 max pooling
  20     </release>
  21     <release version="5.9.0" date="2022-05-02">
  22       CMSIS-Core(M): 5.6.0
  23        - Arm Cortex-M85 cpu support
  24        - Arm China STAR-MC1 cpu support
  25        - Updated system_ARMCM55.c
  26       CMSIS-DSP: 1.10.0 (see revision history for details)
  27       CMSIS-NN: 3.1.0 (see revision history for details)
  28        - Support for int16 convolution and fully connected for reference implementation
  29        - Support for DSP extension optimization for int16 convolution and fully connected
  30        - Support dilation for int8 convolution
  31        - Support dilation for int8 depthwise convolution
  32        - Support for int16 depthwise conv for reference implementation including dilation
  33        - Support for int16 average and max pooling for reference implementation
  34        - Support for elementwise add and mul int16 scalar version
  35        - Support for softmax int16 scalar version
  36        - Support for SVDF with 8 bit state tensor
  37       CMSIS-RTOS2: 2.1.3 (unchanged)
  38         - RTX 5.5.4 (see revision history for details)
  39       CMSIS-Pack: deprecated (moved to Open-CMSIS-Pack)
  40       CMSIS-SVD: 1.3.9 (see revision history for details)
  41       CMSIS-DAP: 2.1.1 (see revision history for details)
  42        - Allow default clock frequency to use fast clock mode
  43       Devices
  44        - Support for Cortex-M85
  45       Utilities
  46         - SVDConv 3.3.42
  47         - PackChk 1.3.95
  48     </release>
  49     <release version="5.8.0" date="2021-06-24">
  50       CMSIS-Core(M): 5.5.0 (see revision history for details)
  51         - Updated GCC LinkerDescription, GCC Assembler startup
  52         - Added Armv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  53         - Changed C-Startup to default Startup.
  54         - Updated Armv8-M Assembler startup to use GAS syntax
  55           Note: Updating existing projects may need manual user interaction!
  56       CMSIS-Core(A): 1.2.1 (see revision history for details)
  57         - Bugfixes for Cortex-A32
  58       CMSIS-DAP: 2.1.0 (see revision history for details)
  59         - Enhanced DAP_Info
  60         - Added extra UART support
  61       CMSIS-DSP: 1.9.0 (see revision history for details)
  62         - Purged pre-built libs from Git
  63         - Enhanced support for f16 datatype
  64         - Fixed couple of GCC issues
  65       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  66         - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  67         - Added optimization for SVDF kernel
  68         - Improved MVE performance for fully Connected and max pool operator
  69         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  70         - Expanded existing unit test suite along with support for FVP
  71         - Removed Examples folder
  72       CMSIS-RTOS2:
  73         - RTX 5.5.3 (see revision history for details)
  74           - CVE-2021-27431 vulnerability mitigation.
  75           - Enhanced stack overrun checking.
  76           - Various bug fixes and improvements.
  77       CMSIS-Pack: 1.7.2 (see revision history for details)
  78         - Support for Microchip XC32 compiler
  79         - Support for Custom Datapath Extension
  80     </release>
  81     <release version="5.7.0" date="2020-04-09">
  82       CMSIS-Build: 0.9.0 (beta)
  83         - Draft for CMSIS Project description (CPRJ)
  84       CMSIS-Core(M): 5.4.0 (see revision history for details)
  85         - Cortex-M55 cpu support
  86         - Enhanced MVE support for Armv8.1-MML
  87         - Fixed device config define checks.
  88         - L1 Cache functions for Armv7-M and later
  89       CMSIS-Core(A): 1.2.0 (see revision history for details)
  90         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  91         - Added missing DSP intrinsics
  92         - Reworked assembly intrinsics: volatile, barriers and clobber
  93       CMSIS-DSP: 1.8.0 (see revision history for details)
  94         - Added new functions and function groups
  95         - Added MVE support
  96       CMSIS-NN: 1.3.0 (see revision history for details)
  97         - Added MVE support
  98         - Further optimizations for kernels using DSP extension
  99       CMSIS-RTOS2:
 100         - RTX 5.5.2 (see revision history for details)
 101       CMSIS-Driver: 2.8.0
 102         - Added VIO API 0.1.0 (Preview)
 103         - removed volatile from status related typedefs in APIs
 104         - enhanced WiFi Interface API with support for polling Socket Receive/Send
 105       CMSIS-Pack: 1.6.3 (see revision history for details)
 106         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
 107       Devices:
 108         - ARMCM55 device
 109         - ARMv81MML startup code recognizing __MVE_USED macro
 110         - Refactored vector table references for all Cortex-M devices
 111         - Reworked ARMCM* C-StartUp files.
 112         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
 113       Utilities:
 114         Attention: Linux binaries moved to Linux64 folder!
 115         - SVDConv 3.3.35
 116         - PackChk 1.3.89
 117     </release>
 118     <release version="5.6.0" date="2019-07-10">
 119       CMSIS-Core(M): 5.3.0 (see revision history for details)
 120         - Added provisions for compiler-independent C startup code.
 121       CMSIS-Core(A): 1.1.4 (see revision history for details)
 122         - Fixed __FPU_Enable.
 123       CMSIS-DSP: 1.7.0 (see revision history for details)
 124         - New Neon versions of f32 functions
 125         - Python wrapper
 126         - Preliminary cmake build
 127         - Compilation flags for FFTs
 128         - Changes to arm_math.h
 129       CMSIS-NN: 1.2.0 (see revision history for details)
 130         - New function for depthwise convolution with asymmetric quantization.
 131         - New support functions for requantization.
 132       CMSIS-RTOS:
 133         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
 134       CMSIS-RTOS2:
 135         - RTX 5.5.1 (see revision history for details)
 136       CMSIS-Driver: 2.7.1
 137         - WiFi Interface API 1.0.0
 138       Devices:
 139         - Generalized C startup code for all Cortex-M family devices.
 140         - Updated Cortex-A default memory regions and MMU configurations
 141         - Moved Cortex-A memory and system config files to avoid include path issues
 142     </release>
 143     <release version="5.5.1" date="2019-03-20">
 144       The following folders are deprecated
 145         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 146
 147       CMSIS-Core(M): 5.2.1 (see revision history for details)
 148         - Fixed compilation issue in cmsis_armclang_ltm.h
 149     </release>
 150     <release version="5.5.0" date="2019-03-18">
 151       The following folders have been removed:
 152         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 153         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 154       The following folders are deprecated
 155         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 156
 157       CMSIS-Core(M): 5.2.0 (see revision history for details)
 158         - Reworked Stack/Heap configuration for ARM startup files.
 159         - Added Cortex-M35P device support.
 160         - Added generic Armv8.1-M Mainline device support.
 161       CMSIS-Core(A): 1.1.3 (see revision history for details)
 162       CMSIS-DSP: 1.6.0 (see revision history for details)
 163         - reworked DSP library source files
 164         - reworked DSP library documentation
 165         - Changed DSP folder structure
 166         - moved DSP libraries to folder ./DSP/Lib
 167         - ARM DSP Libraries are built with ARMCLANG
 168         - Added DSP Libraries Source variant
 169       CMSIS-RTOS2:
 170         - RTX 5.5.0 (see revision history for details)
 171       CMSIS-Driver: 2.7.0
 172         - Added WiFi Interface API 1.0.0-beta
 173         - Added components for project specific driver implementations
 174       CMSIS-Pack: 1.6.0 (see revision history for details)
 175       Devices:
 176         - Added Cortex-M35P and ARMv81MML device templates.
 177         - Fixed C-Startup Code for GCC (aligned with other compilers)
 178       Utilities:
 179         - SVDConv 3.3.25
 180         - PackChk 1.3.82
 181     </release>
 182     <release version="5.4.0" date="2018-08-01">
 183       Aligned pack structure with repository.
 184       The following folders are deprecated:
 185         - CMSIS/Include/
 186         - CMSIS/DSP_Lib/
 187
 188       CMSIS-Core(M): 5.1.2 (see revision history for details)
 189         - Added Cortex-M1 support (beta).
 190       CMSIS-Core(A): 1.1.2 (see revision history for details)
 191       CMSIS-NN: 1.1.0
 192         - Added new math functions.
 193       CMSIS-RTOS2:
 194         - API 2.1.3 (see revision history for details)
 195         - RTX 5.4.0 (see revision history for details)
 196           * Updated exception handling on Cortex-A
 197       CMSIS-Driver:
 198         - Flash Driver API V2.2.0
 199       Utilities:
 200         - SVDConv 3.3.21
 201         - PackChk 1.3.71
 202     </release>
 203     <release version="5.3.0" date="2018-02-22">
 204       Updated Arm company brand.
 205       CMSIS-Core(M): 5.1.1 (see revision history for details)
 206       CMSIS-Core(A): 1.1.1 (see revision history for details)
 207       CMSIS-DAP: 2.0.0 (see revision history for details)
 208       CMSIS-NN: 1.0.0
 209         - Initial contribution of the bare metal Neural Network Library.
 210       CMSIS-RTOS2:
 211         - RTX 5.3.0 (see revision history for details)
 212         - OS Tick API 1.0.1
 213     </release>
 214     <release version="5.2.0" date="2017-11-16">
 215       CMSIS-Core(M): 5.1.0 (see revision history for details)
 216         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 217         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 218       CMSIS-Core(A): 1.1.0 (see revision history for details)
 219         - Added compiler_iccarm.h.
 220         - Added additional access functions for physical timer.
 221       CMSIS-DAP: 1.2.0 (see revision history for details)
 222       CMSIS-DSP: 1.5.2 (see revision history for details)
 223       CMSIS-Driver: 2.6.0 (see revision history for details)
 224         - CAN Driver API V1.2.0
 225         - NAND Driver API V2.3.0
 226       CMSIS-RTOS:
 227         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 228       CMSIS-RTOS2:
 229         - API 2.1.2 (see revision history for details)
 230         - RTX 5.2.3 (see revision history for details)
 231       Devices:
 232         - Added GCC startup and linker script for Cortex-A9.
 233         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 234         - Added IAR startup code for Cortex-A9
 235     </release>
 236     <release version="5.1.1" date="2017-09-19">
 237       CMSIS-RTOS2:
 238       - RTX 5.2.1 (see revision history for details)
 239     </release>
 240     <release version="5.1.0" date="2017-08-04">
 241       CMSIS-Core(M): 5.0.2 (see revision history for details)
 242       - Changed Version Control macros to be core agnostic.
 243       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 244       CMSIS-Core(A): 1.0.0 (see revision history for details)
 245       - Initial release
 246       - IRQ Controller API 1.0.0
 247       CMSIS-Driver: 2.05 (see revision history for details)
 248       - All typedefs related to status have been made volatile.
 249       CMSIS-RTOS2:
 250       - API 2.1.1 (see revision history for details)
 251       - RTX 5.2.0 (see revision history for details)
 252       - OS Tick API 1.0.0
 253       CMSIS-DSP: 1.5.2 (see revision history for details)
 254       - Fixed GNU Compiler specific diagnostics.
 255       CMSIS-Pack: 1.5.0 (see revision history for details)
 256       - added System Description File (*.SDF) Format
 257       CMSIS-Zone: 0.0.1 (Preview)
 258       - Initial specification draft
 259     </release>
 260     <release version="5.0.1" date="2017-02-03">
 261       Package Description:
 262       - added taxonomy for Cclass RTOS
 263       CMSIS-RTOS2:
 264       - API 2.1   (see revision history for details)
 265       - RTX 5.1.0 (see revision history for details)
 266       CMSIS-Core: 5.0.1 (see revision history for details)
 267       - Added __PACKED_STRUCT macro
 268       - Added uVisior support
 269       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 270       - Updated template for secure main function (main_s.c)
 271       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 272       CMSIS-DSP: 1.5.1 (see revision history for details)
 273       - added ARMv8M DSP libraries.
 274       CMSIS-Pack:1.4.9 (see revision history for details)
 275       - added Pack Index File specification and schema file
 276     </release>
 277     <release version="5.0.0" date="2016-11-11">
 278       Changed open source license to Apache 2.0
 279       CMSIS_Core:
 280        - Added support for Cortex-M23 and Cortex-M33.
 281        - Added ARMv8-M device configurations for mainline and baseline.
 282        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 283        - Added cmsis_compiler.h to unify compiler behaviour.
 284        - Updated function SCB_EnableICache (for Cortex-M7).
 285        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 286       CMSIS-RTOS:
 287         - bug fix in RTX 4.82 (see revision history for details)
 288       CMSIS-RTOS2:
 289         - new API including compatibility layer to CMSIS-RTOS
 290         - reference implementation based on RTX5
 291         - supports all Cortex-M variants including TrustZone for ARMv8-M
 292       CMSIS-SVD:
 293        - reworked SVD format documentation
 294        - removed SVD file database documentation as SVD files are distributed in packs
 295        - updated SVDConv for Win32 and Linux
 296       CMSIS-DSP:
 297        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 298        - Added DSP libraries build projects to CMSIS pack.
 299     </release>
 300     <release version="4.5.0" date="2015-10-28">
 301       - CMSIS-Core     4.30.0  (see revision history for details)
 302       - CMSIS-DAP      1.1.0   (unchanged)
 303       - CMSIS-Driver   2.04.0  (see revision history for details)
 304       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 305       - CMSIS-Pack     1.4.1   (see revision history for details)
 306       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 307       - CMSIS-SVD      1.3.1   (see revision history for details)
 308     </release>
 309     <release version="4.4.0" date="2015-09-11">
 310       - CMSIS-Core     4.20   (see revision history for details)
 311       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 312       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 313       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 314       - CMSIS-RTOS
 315         -- API         1.02   (unchanged)
 316         -- RTX         4.79   (see revision history for details)
 317       - CMSIS-SVD      1.3.0  (see revision history for details)
 318       - CMSIS-DAP      1.1.0  (extended with SWO support)
 319     </release>
 320     <release version="4.3.0" date="2015-03-20">
 321       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 322       - CMSIS-DSP      1.4.5  (see revision history for details)
 323       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 324       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 325       - CMSIS-RTOS
 326         -- API         1.02   (unchanged)
 327         -- RTX         4.78   (see revision history for details)
 328       - CMSIS-SVD      1.2    (unchanged)
 329     </release>
 330     <release version="4.2.0" date="2014-09-24">
 331       Adding Cortex-M7 support
 332       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 333       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 334       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 335       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 336       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 337     </release>
 338     <release version="4.1.1" date="2014-06-30">
 339       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 340     </release>
 341     <release version="4.1.0" date="2014-06-12">
 342       - CMSIS-Driver   2.02  (incompatible update)
 343       - CMSIS-Pack     1.3   (see revision history for details)
 344       - CMSIS-DSP      1.4.2 (unchanged)
 345       - CMSIS-Core     3.30  (unchanged)
 346       - CMSIS-RTOS RTX 4.74  (unchanged)
 347       - CMSIS-RTOS API 1.02  (unchanged)
 348       - CMSIS-SVD      1.10  (unchanged)
 349       PACK:
 350       - removed G++ specific files from PACK
 351       - added Component Startup variant "C Startup"
 352       - added Pack Checking Utility
 353       - updated conditions to reflect tool-chain dependency
 354       - added Taxonomy for Graphics
 355       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 356     </release>
 357     <!-- release version="4.0.0">
 358       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 359       - CMSIS-Pack     1.1   Preliminary
 360       - CMSIS-DSP      1.4.2 (see revision history for details)
 361       - CMSIS-Core     3.30  (see revision history for details)
 362       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 363       - CMSIS-RTOS API 1.02  (unchanged)
 364       - CMSIS-SVD      1.10  (unchanged)
 365     </release -->
 366     <release version="3.20.4" date="2014-02-20">
 367       - CMSIS-RTOS 4.74 (see revision history for details)
 368       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 369     </release>
 370     <!-- release version="3.20.3">
 371       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 372       - CMSIS-RTOS 4.73 (see revision history for details)
 373     </release -->
 374     <!-- release version="3.20.2">
 375       - CMSIS-Pack documentation has been added
 376       - CMSIS-Drivers header and documentation have been added to PACK
 377       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 378     </release -->
 379     <!-- release version="3.20.1">
 380       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 381       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 382     </release -->
 383     <!-- release version="3.20.0">
 384       The software portions that are deployed in the application program are now under a BSD license which allows usage
 385       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 386       The individual components have been update as listed below:
 387       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 388       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 389       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 390       - CMSIS-SVD is unchanged.
 391     </release -->
 392   </releases>
 393
 394   <taxonomy>
 395     <description Cclass="Audio">Software components for audio processing</description>
 396     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 397     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 398     <description Cclass="Compiler">Compiler Software Extensions</description>
 399     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 400     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 401     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 402     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 403     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 404     <description Cclass="File System">File Drive Support and File System</description>
 405     <description Cclass="IoT Client">IoT cloud client connector</description>
 406     <description Cclass="IoT Service">IoT specific services</description>
 407     <description Cclass="IoT Utility">IoT specific software utility</description>
 408     <description Cclass="Graphics">Graphical User Interface</description>
 409     <description Cclass="Network">Network Stack using Internet Protocols</description>
 410     <description Cclass="RTOS">Real-time Operating System</description>
 411     <description Cclass="Security">Encryption for secure communication or storage</description>
 412     <description Cclass="USB">Universal Serial Bus Stack</description>
 413     <description Cclass="Utility">Generic software utility components</description>
 414   </taxonomy>
 415
 416   <devices>
 417     <!-- ******************************  Cortex-M0  ****************************** -->
 418     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 419       <book name="https://developer.arm.com/documentation/dui0497" title="Cortex-M0 Processor Devices Generic Users Guide"/>
 420       <description>
 421 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 422 - simple, easy-to-use programmers model
 423 - highly efficient ultra-low power operation
 424 - excellent code density
 425 - deterministic, high-performance interrupt handling
 426 - upward compatibility with the rest of the Cortex-M processor family.
 427       </description>
 428       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 429       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 430       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 431       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 432
 433       <device Dname="ARMCM0">
 434         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 435         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 436       </device>
 437     </family>
 438
 439     <!-- ******************************  Cortex-M0P  ****************************** -->
 440     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 441       <book name="https://developer.arm.com/documentation/dui0662" title="Cortex-M0+ Processor Devices Generic Users Guide"/>
 442       <description>
 443 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 444 - simple, easy-to-use programmers model
 445 - highly efficient ultra-low power operation
 446 - excellent code density
 447 - deterministic, high-performance interrupt handling
 448 - upward compatibility with the rest of the Cortex-M processor family.
 449       </description>
 450       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 451       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 452       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 453       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 454
 455       <device Dname="ARMCM0P">
 456         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 457         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 458       </device>
 459
 460       <device Dname="ARMCM0P_MPU">
 461         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 462         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 463       </device>
 464     </family>
 465
 466     <!-- ******************************  Cortex-M1  ****************************** -->
 467     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 468       <!--book name="https://developer.arm.com/documentation/dui0497" title="Cortex-M0 Processor Devices Generic Users Guide"/-->
 469       <description>
 470 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 471 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 472       </description>
 473       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 474       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 475       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 476       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 477
 478       <device Dname="ARMCM1">
 479         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 480         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 481       </device>
 482     </family>
 483
 484     <!-- ******************************  Cortex-M3  ****************************** -->
 485     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 486       <book name="https://developer.arm.com/documentation/dui0552" title="Cortex-M3 Processor Devices Generic Users Guide"/>
 487       <description>
 488 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 489 - simple, easy-to-use programmers model
 490 - highly efficient ultra-low power operation
 491 - excellent code density
 492 - deterministic, high-performance interrupt handling
 493 - upward compatibility with the rest of the Cortex-M processor family.
 494       </description>
 495       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 496       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 497       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 498       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 499
 500       <device Dname="ARMCM3">
 501         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 502         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 503       </device>
 504     </family>
 505
 506     <!-- ******************************  Cortex-M4  ****************************** -->
 507     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 508       <book name="https://developer.arm.com/documentation/dui0553" title="Cortex-M4 Processor Devices Generic Users Guide"/>
 509       <description>
 510 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 511 - simple, easy-to-use programmers model
 512 - highly efficient ultra-low power operation
 513 - excellent code density
 514 - deterministic, high-performance interrupt handling
 515 - upward compatibility with the rest of the Cortex-M processor family.
 516       </description>
 517       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 518       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 519       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 520       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 521
 522       <device Dname="ARMCM4">
 523         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 524         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 525       </device>
 526
 527       <device Dname="ARMCM4_FP">
 528         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 529         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 530       </device>
 531     </family>
 532
 533     <!-- ******************************  Cortex-M7  ****************************** -->
 534     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 535       <book name="https://developer.arm.com/documentation/dui0646" title="Cortex-M7 Processor Devices Generic Users Guide"/>
 536       <description>
 537 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 538 - simple, easy-to-use programmers model
 539 - highly efficient ultra-low power operation
 540 - excellent code density
 541 - deterministic, high-performance interrupt handling
 542 - upward compatibility with the rest of the Cortex-M processor family.
 543       </description>
 544       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 545       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 546       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 547       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 548
 549       <device Dname="ARMCM7">
 550         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 551         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 552       </device>
 553
 554       <device Dname="ARMCM7_SP">
 555         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 556         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 557       </device>
 558
 559       <device Dname="ARMCM7_DP">
 560         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 561         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 562       </device>
 563     </family>
 564
 565     <!-- ******************************  Cortex-M23  ********************** -->
 566     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 567       <book name="https://developer.arm.com/documentation/dui1095"       title="Cortex-M23 Processor Devices Generic Users Guide"/>
 568       <description>
 569 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 570 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 571 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 572       </description>
 573       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 574       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 575       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 576       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 577       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 578       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 579
 580       <device Dname="ARMCM23">
 581         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 582         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 583       </device>
 584
 585       <device Dname="ARMCM23_TZ">
 586         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 587         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 588       </device>
 589     </family>
 590
 591     <!-- ******************************  Cortex-M33  ****************************** -->
 592     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 593       <book name="https://developer.arm.com/documentation/100235"       title="Cortex-M33 Processor Devices Generic Users Guide"/>
 594       <description>
 595 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 596 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 597       </description>
 598       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 599       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 600       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 601       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 602       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 603       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 604
 605       <device Dname="ARMCM33">
 606         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 607         <description>
 608           no DSP Instructions, no Floating Point Unit, no TrustZone
 609         </description>
 610         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 611       </device>
 612
 613       <device Dname="ARMCM33_TZ">
 614         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 615         <description>
 616           no DSP Instructions, no Floating Point Unit, TrustZone
 617         </description>
 618         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 619       </device>
 620
 621       <device Dname="ARMCM33_DSP_FP">
 622         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 623         <description>
 624           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 625         </description>
 626         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 627       </device>
 628
 629       <device Dname="ARMCM33_DSP_FP_TZ">
 630         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 631         <description>
 632           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 633         </description>
 634         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 635       </device>
 636     </family>
 637
 638     <!-- ******************************  Cortex-M35P  ****************************** -->
 639     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 640       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 641       <description>
 642 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 643 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 644       </description>
 645
 646       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 647       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 648       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 649       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 650       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 651       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 652
 653       <device Dname="ARMCM35P">
 654         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 655         <description>
 656           no DSP Instructions, no Floating Point Unit, no TrustZone
 657         </description>
 658         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 659       </device>
 660
 661       <device Dname="ARMCM35P_TZ">
 662         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 663         <description>
 664           no DSP Instructions, no Floating Point Unit, TrustZone
 665         </description>
 666         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 667       </device>
 668
 669       <device Dname="ARMCM35P_DSP_FP">
 670         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 671         <description>
 672           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 673         </description>
 674         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 675       </device>
 676
 677       <device Dname="ARMCM35P_DSP_FP_TZ">
 678         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 679         <description>
 680           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 681         </description>
 682         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 683       </device>
 684     </family>
 685
 686     <!-- ******************************  Cortex-M55  ****************************** -->
 687     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 688       <book name="https://developer.arm.com/documentation/101273"       title="Cortex-M55 Processor Devices Generic Users Guide"/>
 689       <description>
 690 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 691 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 692 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 693       </description>
 694
 695       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 696       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 697       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 698       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 699       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 700       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 701
 702       <device Dname="ARMCM55">
 703         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 704         <description>
 705           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 706         </description>
 707         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 708       </device>
 709     </family>
 710
 711     <!-- ******************************  Cortex-M85  ****************************** -->
 712     <family Dfamily="ARM Cortex M85" Dvendor="ARM:82">
 713       <book name="https://developer.arm.com/documentation/1019283"       title="Cortex-M85 Processor Devices Generic Users Guide"/>
 714       <description>
 715 The Arm Cortex-M85 processor is a fully synthesizable high-performance microcontroller class processor that implements the Armv8.1-M Mainline architecture which includes support for the M-profile Vector Extension (MVE).
 716 The processor also supports previous Armv8-M architectural features.
 717 The design is focused on compute applications such as Digital Signal Processing (DSP) and machine learning.
 718 The Arm Cortex-M85 processor is energy efficient and achieves high compute performance across scalar and vector operations while maintaining low power consumption.
 719       </description>
 720
 721       <!-- debug svd="Device/ARM/SVD/ARMCM85.svd"/ SVD files do not contain any peripheral -->
 722       <memory name="ROM_NS" access="rxn"  start="0x00000000" size="0x00200000" startup="1" default="1" alias="ROM_S"/>
 723       <memory name="RAM_NS" access="rwxn" start="0x20000000" size="0x00020000" init   ="0" default="1" alias="RAM_S"/>
 724       <memory name="ROM_S"  access="rxn"  start="0x10000000" size="0x00200000" startup="1" default="1"/>
 725       <memory name="RAM_S"  access="rwxn" start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 726       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 727
 728       <device Dname="ARMCM85">
 729         <processor Dcore="Cortex-M85" DcoreVersion="r0p0" Dpacbti="PACBTI" Dmpu="MPU" Dfpu="DP_FPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 730         <description>
 731           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone, PACBTI
 732         </description>
 733         <compile header="Device/ARM/ARMCM85/Include/ARMCM85.h" define="ARMCM85"/>
 734       </device>
 735     </family>
 736
 737     <!-- ******************************  ARMSC000  ****************************** -->
 738     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 739       <description>
 740 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 741 - simple, easy-to-use programmers model
 742 - highly efficient ultra-low power operation
 743 - excellent code density
 744 - deterministic, high-performance interrupt handling
 745       </description>
 746       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 747       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 748       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 749       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 750
 751       <device Dname="ARMSC000">
 752         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 753         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 754       </device>
 755     </family>
 756
 757     <!-- ******************************  ARMSC300  ****************************** -->
 758     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 759       <description>
 760 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 761 - simple, easy-to-use programmers model
 762 - highly efficient ultra-low power operation
 763 - excellent code density
 764 - deterministic, high-performance interrupt handling
 765       </description>
 766       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 767       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 768       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 769       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 770
 771       <device Dname="ARMSC300">
 772         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 773         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 774       </device>
 775     </family>
 776
 777     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 778     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 779       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 780       <description>
 781 Armv8-M Baseline based device with TrustZone
 782       </description>
 783       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 784       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 785       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 786       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 787       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 788       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 789
 790       <device Dname="ARMv8MBL">
 791         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 792         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 793       </device>
 794     </family>
 795
 796     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 797     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 798       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 799       <description>
 800 Armv8-M Mainline based device with TrustZone
 801       </description>
 802       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 803       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 804       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 805       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 806       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 807       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 808
 809       <device Dname="ARMv8MML">
 810         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 811         <description>
 812           no DSP Instructions, no Floating Point Unit, TrustZone
 813         </description>
 814         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 815       </device>
 816
 817       <device Dname="ARMv8MML_DSP">
 818         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 819         <description>
 820           DSP Instructions, no Floating Point Unit, TrustZone
 821         </description>
 822         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 823       </device>
 824
 825       <device Dname="ARMv8MML_SP">
 826         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 827         <description>
 828           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 829         </description>
 830         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 831       </device>
 832
 833       <device Dname="ARMv8MML_DSP_SP">
 834         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 835         <description>
 836           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 837         </description>
 838         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 839       </device>
 840
 841       <device Dname="ARMv8MML_DP">
 842         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 843         <description>
 844           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 845         </description>
 846         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 847       </device>
 848
 849       <device Dname="ARMv8MML_DSP_DP">
 850         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 851         <description>
 852           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 853         </description>
 854         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 855       </device>
 856     </family>
 857
 858     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 859     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 860       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 861       <description>
 862 Armv8.1-M Mainline based device with TrustZone and MVE
 863       </description>
 864       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 865       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 866       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 867       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 868       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 869       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 870
 871
 872       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 873         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 874         <description>
 875           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 876         </description>
 877         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 878       </device>
 879     </family>
 880
 881     <!-- ******************************  Cortex-A5  ****************************** -->
 882     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 883       <book name="https://developer.arm.com/documentation/ddi0433" title="Cortex-A5 Technical Reference Manual"/>
 884       <description>
 885 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 886 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 887 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 888       </description>
 889
 890       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 891       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 892       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 893       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 894
 895       <device Dname="ARMCA5">
 896         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 897         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 898       </device>
 899     </family>
 900
 901     <!-- ******************************  Cortex-A7  ****************************** -->
 902     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 903       <book name="https://developer.arm.com/documentation/ddi0464" title="Cortex-A7 MPCore Technical Reference Manual"/>
 904       <description>
 905 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 906 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 907 an optional integrated GIC, and an optional L2 cache controller.
 908       </description>
 909
 910       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 911       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 912       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 913       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 914
 915       <device Dname="ARMCA7">
 916         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 917         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 918       </device>
 919     </family>
 920
 921     <!-- ******************************  Cortex-A9  ****************************** -->
 922     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 923       <book name="https://developer.arm.com/documentation/100511" title="Cortex-A9 Technical Reference Manual"/>
 924       <description>
 925 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 926 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 927 and 8-bit Java bytecodes in Jazelle state.
 928       </description>
 929
 930       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 931       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 932       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 933       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 934
 935       <device Dname="ARMCA9">
 936         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 937         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 938       </device>
 939     </family>
 940   </devices>
 941
 942
 943   <apis>
 944     <!-- CMSIS Device API -->
 945     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 946       <description>Device interrupt controller interface</description>
 947       <files>
 948         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 949       </files>
 950     </api>
 951     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 952       <description>RTOS Kernel system tick timer interface</description>
 953       <files>
 954         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 955       </files>
 956     </api>
 957     <!-- CMSIS-RTOS API -->
 958     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 959       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 960       <files>
 961         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 962       </files>
 963     </api>
 964     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 965       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 966       <files>
 967         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 968         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 969       </files>
 970     </api>
 971     <!-- CMSIS Driver API -->
 972     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 973       <description>USART Driver API for Cortex-M</description>
 974       <files>
 975         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 976         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 977       </files>
 978     </api>
 979     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 980       <description>SPI Driver API for Cortex-M</description>
 981       <files>
 982         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 983         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 984       </files>
 985     </api>
 986     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 987       <description>SAI Driver API for Cortex-M</description>
 988       <files>
 989         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 990         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 991       </files>
 992     </api>
 993     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 994       <description>I2C Driver API for Cortex-M</description>
 995       <files>
 996         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 997         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 998       </files>
 999     </api>
1000     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
1001       <description>CAN Driver API for Cortex-M</description>
1002       <files>
1003         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
1004         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
1005       </files>
1006     </api>
1007     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
1008       <description>Flash Driver API for Cortex-M</description>
1009       <files>
1010         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
1011         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
1012       </files>
1013     </api>
1014     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
1015       <description>MCI Driver API for Cortex-M</description>
1016       <files>
1017         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
1018         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
1019       </files>
1020     </api>
1021     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
1022       <description>NAND Flash Driver API for Cortex-M</description>
1023       <files>
1024         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
1025         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
1026       </files>
1027     </api>
1028     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
1029       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
1030       <files>
1031         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
1032         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
1033         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
1034       </files>
1035     </api>
1036     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
1037       <description>Ethernet MAC Driver API for Cortex-M</description>
1038       <files>
1039         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
1040         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
1041       </files>
1042     </api>
1043     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
1044       <description>Ethernet PHY Driver API for Cortex-M</description>
1045       <files>
1046         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
1047         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
1048       </files>
1049     </api>
1050     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
1051       <description>USB Device Driver API for Cortex-M</description>
1052       <files>
1053         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
1054         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
1055       </files>
1056     </api>
1057     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
1058       <description>USB Host Driver API for Cortex-M</description>
1059       <files>
1060         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
1061         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
1062       </files>
1063     </api>
1064     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
1065       <description>WiFi driver</description>
1066       <files>
1067         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
1068         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
1069       </files>
1070     </api>
1071     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
1072       <description>Virtual I/O</description>
1073       <files>
1074         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1075         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1076         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1077       </files>
1078     </api>
1079   </apis>
1080
1081   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1082   <conditions>
1083     <!-- compiler -->
1084     <condition id="ARMCC6">
1085       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1086       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1087     </condition>
1088     <condition id="ARMCC5">
1089       <require Tcompiler="ARMCC" Toptions="AC5"/>
1090     </condition>
1091     <condition id="ARMCC">
1092       <require Tcompiler="ARMCC"/>
1093     </condition>
1094     <condition id="GCC">
1095       <require Tcompiler="GCC"/>
1096     </condition>
1097     <condition id="IAR">
1098       <require Tcompiler="IAR"/>
1099     </condition>
1100     <condition id="ARMCC GCC">
1101       <accept Tcompiler="ARMCC"/>
1102       <accept Tcompiler="GCC"/>
1103     </condition>
1104     <condition id="ARMCC GCC IAR">
1105       <accept Tcompiler="ARMCC"/>
1106       <accept Tcompiler="GCC"/>
1107       <accept Tcompiler="IAR"/>
1108     </condition>
1109
1110     <!-- Arm architecture -->
1111     <condition id="ARMv6-M Device">
1112       <description>Armv6-M architecture based device</description>
1113       <accept Dcore="Cortex-M0"/>
1114       <accept Dcore="Cortex-M1"/>
1115       <accept Dcore="Cortex-M0+"/>
1116       <accept Dcore="SC000"/>
1117     </condition>
1118     <condition id="ARMv7-M Device">
1119       <description>Armv7-M architecture based device</description>
1120       <accept Dcore="Cortex-M3"/>
1121       <accept Dcore="Cortex-M4"/>
1122       <accept Dcore="Cortex-M7"/>
1123       <accept Dcore="SC300"/>
1124     </condition>
1125     <condition id="ARMv8-MBL Device">
1126       <description>Armv8-M base line architecture based device</description>
1127       <accept Dcore="ARMV8MBL"/>
1128       <accept Dcore="Cortex-M23"/>
1129     </condition>
1130     <condition id="ARMv8-MML Device">
1131       <description>Armv8-M main line architecture based device</description>
1132       <accept Dcore="ARMV8MML"/>
1133       <accept Dcore="Cortex-M33"/>
1134       <accept Dcore="Cortex-M35P"/>
1135       <accept Dcore="Star-MC1"/>
1136     </condition>
1137     <condition id="ARMv81-MML Device">
1138       <description>Armv8.1-M main line architecture based device</description>
1139       <accept Dcore="ARMV81MML"/>
1140       <accept Dcore="Cortex-M55"/>
1141       <accept Dcore="Cortex-M85"/>
1142     </condition>
1143     <condition id="ARMv8x-MML Device">
1144       <description>Armv8-M/Armv8.1-M architecture based device</description>
1145       <accept condition="ARMv8-MML Device"/>
1146       <accept condition="ARMv81-MML Device"/>
1147     </condition>
1148     <condition id="ARMv8-M Device">
1149       <description>Armv8-M architecture based device</description>
1150       <accept condition="ARMv8-MBL Device"/>
1151       <accept condition="ARMv8-MML Device"/>
1152       <accept condition="ARMv81-MML Device"/>
1153     </condition>
1154     <condition id="ARMv6_7-M Device">
1155       <description>Armv6_7-M architecture based device</description>
1156       <accept condition="ARMv6-M Device"/>
1157       <accept condition="ARMv7-M Device"/>
1158     </condition>
1159     <condition id="ARMv6_7_8-M Device">
1160       <description>Armv6_7_8-M architecture based device</description>
1161       <accept condition="ARMv6-M Device"/>
1162       <accept condition="ARMv7-M Device"/>
1163       <accept condition="ARMv8-M Device"/>
1164     </condition>
1165     <condition id="ARMv7-A Device">
1166       <description>Armv7-A architecture based device</description>
1167       <accept Dcore="Cortex-A5"/>
1168       <accept Dcore="Cortex-A7"/>
1169       <accept Dcore="Cortex-A9"/>
1170     </condition>
1171
1172     <condition id="TrustZone">
1173       <description>TrustZone</description>
1174       <require Dtz="TZ"/>
1175     </condition>
1176     <condition id="TZ Secure">
1177       <description>TrustZone (Secure)</description>
1178       <require Dtz="TZ"/>
1179       <require Dsecure="Secure"/>
1180     </condition>
1181     <condition id="TZ Non-secure">
1182       <description>TrustZone (Non-secure)</description>
1183       <require Dtz="TZ"/>
1184       <accept Dsecure="Non-secure"/>
1185       <accept Dsecure="TZ-disabled"/>
1186     </condition>
1187
1188     <!-- Startup -->
1189     <condition id="Startup ARMCC6 Secure">
1190       <description>Startup files for Arm Compiler 6 targeting TrustZone secure mode</description>
1191       <require condition="ARMCC6"/>
1192       <require condition="TZ Secure"/>
1193     </condition>
1194     <condition id="Startup ARMCC6 Unsecure">
1195       <description>Startup files for Arm Compiler 6 targeting non-TrustZone or TrustZone non-secure mode</description>
1196       <require condition="ARMCC6"/>
1197       <deny condition="TZ Secure"/>
1198     </condition>
1199
1200     <!-- CMSIS-Core -->
1201     <condition id="ARMCM0 CMSIS">
1202       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1203       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1204       <require Cclass="CMSIS" Cgroup="CORE"/>
1205     </condition>
1206
1207     <condition id="ARMCM0+ CMSIS">
1208       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1209       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1210       <require Cclass="CMSIS" Cgroup="CORE"/>
1211     </condition>
1212
1213     <condition id="ARMCM1 CMSIS">
1214       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
1215       <require Dvendor="ARM:82" Dname="ARMCM1"/>
1216       <require Cclass="CMSIS" Cgroup="CORE"/>
1217     </condition>
1218
1219     <condition id="ARMCM3 CMSIS">
1220       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1221       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1222       <require Cclass="CMSIS" Cgroup="CORE"/>
1223     </condition>
1224
1225     <condition id="ARMCM4 CMSIS">
1226       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1227       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1228       <require Cclass="CMSIS" Cgroup="CORE"/>
1229     </condition>
1230
1231     <condition id="ARMCM7 CMSIS">
1232       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1233       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1234       <require Cclass="CMSIS" Cgroup="CORE"/>
1235     </condition>
1236
1237     <condition id="ARMCM23 CMSIS">
1238       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1239       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1240       <require Cclass="CMSIS" Cgroup="CORE"/>
1241     </condition>
1242
1243     <condition id="ARMCM33 CMSIS">
1244       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1245       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1246       <require Cclass="CMSIS" Cgroup="CORE"/>
1247     </condition>
1248
1249     <condition id="ARMCM35P CMSIS">
1250       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
1251       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
1252       <require Cclass="CMSIS" Cgroup="CORE"/>
1253     </condition>
1254
1255     <condition id="ARMCM55 CMSIS">
1256       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
1257       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
1258       <require Cclass="CMSIS" Cgroup="CORE"/>
1259     </condition>
1260
1261     <condition id="ARMCM85 CMSIS">
1262       <description>Generic Arm Cortex-M85 device startup and depends on CMSIS Core</description>
1263       <require Dvendor="ARM:82" Dname="ARMCM85*"/>
1264       <require Cclass="CMSIS" Cgroup="CORE"/>
1265     </condition>
1266
1267     <condition id="ARMSC000 CMSIS">
1268       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1269       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1270       <require Cclass="CMSIS" Cgroup="CORE"/>
1271     </condition>
1272
1273     <condition id="ARMSC300 CMSIS">
1274       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1275       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1276       <require Cclass="CMSIS" Cgroup="CORE"/>
1277     </condition>
1278
1279     <condition id="ARMv8MBL CMSIS">
1280       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1281       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1282       <require Cclass="CMSIS" Cgroup="CORE"/>
1283     </condition>
1284
1285     <condition id="ARMv8MML CMSIS">
1286       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1287       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1288       <require Cclass="CMSIS" Cgroup="CORE"/>
1289     </condition>
1290
1291     <condition id="ARMv81MML CMSIS">
1292       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
1293       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1294       <require Cclass="CMSIS" Cgroup="CORE"/>
1295     </condition>
1296
1297     <condition id="ARMCA5 CMSIS">
1298       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
1299       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1300       <require Cclass="CMSIS" Cgroup="CORE"/>
1301     </condition>
1302
1303     <condition id="ARMCA7 CMSIS">
1304       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
1305       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1306       <require Cclass="CMSIS" Cgroup="CORE"/>
1307     </condition>
1308
1309     <condition id="ARMCA9 CMSIS">
1310       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
1311       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1312       <require Cclass="CMSIS" Cgroup="CORE"/>
1313     </condition>
1314
1315     <!-- CMSIS NN -->
1316     <condition id="CMSIS NN">
1317       <description>Components required for NN</description>
1318       <require condition="ARMCC GCC IAR"/>
1319       <require Cclass="CMSIS" Cgroup="CORE"/>
1320     </condition>
1321
1322     <!-- RTOS RTX -->
1323     <condition id="RTOS RTX">
1324       <description>Components required for RTOS RTX</description>
1325       <require condition="ARMv6_7-M Device"/>
1326       <require condition="ARMCC GCC IAR"/>
1327       <require Cclass="Device" Cgroup="Startup"/>
1328       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1329     </condition>
1330     <condition id="RTOS RTX IFX">
1331       <description>Components required for RTOS RTX IFX</description>
1332       <require condition="ARMv6_7-M Device"/>
1333       <require condition="ARMCC GCC IAR"/>
1334       <require Dvendor="Infineon:7" Dname="XMC4*"/>
1335       <require Cclass="Device" Cgroup="Startup"/>
1336       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1337     </condition>
1338     <condition id="RTOS RTX5">
1339       <description>Components required for RTOS RTX5</description>
1340       <require condition="ARMv6_7_8-M Device"/>
1341       <require condition="ARMCC GCC IAR"/>
1342       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1343     </condition>
1344     <condition id="RTOS2 RTX5">
1345       <description>Components required for RTOS2 RTX5</description>
1346       <require condition="ARMv6_7_8-M Device"/>
1347       <require condition="ARMCC GCC IAR"/>
1348       <require Cclass="CMSIS"  Cgroup="CORE"/>
1349       <require Cclass="Device" Cgroup="Startup"/>
1350     </condition>
1351     <condition id="RTOS2 RTX5 v7-A">
1352       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
1353       <require condition="ARMv7-A Device"/>
1354       <require condition="ARMCC GCC IAR"/>
1355       <require Cclass="CMSIS"  Cgroup="CORE"/>
1356       <require Cclass="Device" Cgroup="Startup"/>
1357       <require Cclass="Device" Cgroup="OS Tick"/>
1358       <require Cclass="Device" Cgroup="IRQ Controller"/>
1359     </condition>
1360     <condition id="RTOS2 RTX5 NS">
1361       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1362       <require condition="ARMv8-M Device"/>
1363       <require condition="TZ Non-secure"/>
1364       <require condition="ARMCC GCC IAR"/>
1365       <require Cclass="CMSIS"  Cgroup="CORE"/>
1366       <require Cclass="Device" Cgroup="Startup"/>
1367     </condition>
1368
1369     <condition id="ARMCC ARMv6-M LE">
1370         <description>Arm Compiler for Armv6-M architecture (little endian)</description>
1371         <require condition="ARMCC"/>
1372         <require condition="ARMv6-M Device"/>
1373         <require Dendian="Little-endian"/>
1374     </condition>
1375     <condition id="ARMCC ARMv6-M BE">
1376         <description>Arm Compiler for Armv6-M architecture (big endian)</description>
1377         <require condition="ARMCC"/>
1378         <require condition="ARMv6-M Device"/>
1379         <require Dendian="Big-endian"/>
1380     </condition>
1381     <condition id="ARMCC ARMv7-M NOFP LE">
1382         <description>Arm Compiler for Armv7-M architecture without FPU (little endian)</description>
1383         <require condition="ARMCC"/>
1384         <require condition="ARMv7-M Device"/>
1385         <require Dendian="Little-endian"/>
1386         <require Dfpu="NO_FPU"/>
1387     </condition>
1388     <condition id="ARMCC ARMv7-M NOFP BE">
1389         <description>Arm Compiler for Armv7-M architecture without FPU (big endian)</description>
1390         <require condition="ARMCC"/>
1391         <require condition="ARMv7-M Device"/>
1392         <require Dendian="Big-endian"/>
1393         <require Dfpu="NO_FPU"/>
1394     </condition>
1395     <condition id="ARMCC ARMv7-M FP LE">
1396         <description>Arm Compiler for Armv7-M architecture with FPU (little endian)</description>
1397         <require condition="ARMCC"/>
1398         <require condition="ARMv7-M Device"/>
1399         <require Dendian="Little-endian"/>
1400         <accept Dfpu="SP_FPU"/>
1401         <accept Dfpu="DP_FPU"/>
1402     </condition>
1403     <condition id="ARMCC ARMv7-M FP BE">
1404         <description>Arm Compiler for Armv7-M architecture with FPU (big endian)</description>
1405         <require condition="ARMCC"/>
1406         <require condition="ARMv7-M Device"/>
1407         <require Dendian="Big-endian"/>
1408         <accept Dfpu="SP_FPU"/>
1409         <accept Dfpu="DP_FPU"/>
1410     </condition>
1411     <condition id="ARMCC ARMv8-MBL LE">
1412         <description>Arm Compiler for Armv8-M base line architecture (little endian)</description>
1413         <require condition="ARMCC"/>
1414         <require condition="ARMv8-MBL Device"/>
1415         <require Dendian="Little-endian"/>
1416     </condition>
1417     <condition id="ARMCC ARMv8-MML NOFP LE">
1418         <description>Arm Compiler for Armv8-M/Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1419         <require condition="ARMCC"/>
1420         <require condition="ARMv8x-MML Device"/>
1421         <require Dendian="Little-endian"/>
1422         <require Dfpu="NO_FPU"/>
1423         <require Dmve="NO_MVE"/>
1424     </condition>
1425      <condition id="ARMCC ARMv8-MML FP LE">
1426         <description>Arm Compiler for Armv8-M/Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1427         <require condition="ARMCC"/>
1428         <require condition="ARMv8x-MML Device"/>
1429         <require Dendian="Little-endian"/>
1430         <accept Dfpu="SP_FPU"/>
1431         <accept Dfpu="DP_FPU"/>
1432         <accept Dmve="MVE"/>
1433         <accept Dmve="FP_MVE"/>
1434     </condition>
1435
1436     <condition id="GCC ARMv6-M LE">
1437         <description>GNU Compiler for Armv6-M architecture (little endian)</description>
1438         <require condition="GCC"/>
1439         <require condition="ARMv6-M Device"/>
1440         <require Dendian="Little-endian"/>
1441     </condition>
1442     <condition id="GCC ARMv6-M BE">
1443         <description>GNU Compiler for Armv6-M architecture (big endian)</description>
1444         <require condition="GCC"/>
1445         <require condition="ARMv6-M Device"/>
1446         <require Dendian="Big-endian"/>
1447     </condition>
1448     <condition id="GCC ARMv7-M NOFP LE">
1449         <description>GNU Compiler for Armv7-M architecture without FPU (little endian)</description>
1450         <require condition="GCC"/>
1451         <require condition="ARMv7-M Device"/>
1452         <require Dendian="Little-endian"/>
1453         <require Dfpu="NO_FPU"/>
1454     </condition>
1455     <condition id="GCC ARMv7-M NOFP BE">
1456         <description>GNU Compiler for Armv7-M architecture without FPU (big endian)</description>
1457         <require condition="GCC"/>
1458         <require condition="ARMv7-M Device"/>
1459         <require Dendian="Big-endian"/>
1460         <require Dfpu="NO_FPU"/>
1461     </condition>
1462     <condition id="GCC ARMv7-M FP LE">
1463         <description>GNU Compiler for Armv7-M architecture with FPU (little endian)</description>
1464         <require condition="GCC"/>
1465         <require condition="ARMv7-M Device"/>
1466         <require Dendian="Little-endian"/>
1467         <accept Dfpu="SP_FPU"/>
1468         <accept Dfpu="DP_FPU"/>
1469     </condition>
1470     <condition id="GCC ARMv7-M FP BE">
1471         <description>GNU Compiler for Armv7-M architecture with FPU (big endian)</description>
1472         <require condition="GCC"/>
1473         <require condition="ARMv7-M Device"/>
1474         <require Dendian="Big-endian"/>
1475         <accept Dfpu="SP_FPU"/>
1476         <accept Dfpu="DP_FPU"/>
1477     </condition>
1478     <condition id="GCC ARMv8-MBL LE">
1479         <description>GNU Compiler for Armv8-M base line architecture (little endian)</description>
1480         <require condition="GCC"/>
1481         <require condition="ARMv8-MBL Device"/>
1482         <require Dendian="Little-endian"/>
1483     </condition>
1484     <condition id="GCC ARMv8-MML NOFP LE">
1485         <description>GNU Compiler for Armv8-M/Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1486         <require condition="GCC"/>
1487         <require condition="ARMv8x-MML Device"/>
1488         <require Dendian="Little-endian"/>
1489         <require Dfpu="NO_FPU"/>
1490         <require Dmve="NO_MVE"/>
1491     </condition>
1492      <condition id="GCC ARMv8-MML FP LE">
1493         <description>GNU Compiler for Armv8-M/Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1494         <require condition="GCC"/>
1495         <require condition="ARMv8x-MML Device"/>
1496         <require Dendian="Little-endian"/>
1497         <accept Dfpu="SP_FPU"/>
1498         <accept Dfpu="DP_FPU"/>
1499         <accept Dmve="MVE"/>
1500         <accept Dmve="FP_MVE"/>
1501     </condition>
1502
1503     <condition id="IARCC ARMv6-M LE">
1504         <description>IAR Compiler for Armv6-M architecture (little endian)</description>
1505         <require condition="IAR"/>
1506         <require condition="ARMv6-M Device"/>
1507         <require Dendian="Little-endian"/>
1508     </condition>
1509     <condition id="IARCC ARMv6-M BE">
1510         <description>IAR Compiler for Armv6-M architecture (big endian)</description>
1511         <require condition="IAR"/>
1512         <require condition="ARMv6-M Device"/>
1513         <require Dendian="Big-endian"/>
1514     </condition>
1515     <condition id="IARCC ARMv7-M NOFP LE">
1516         <description>IAR Compiler for Armv7-M architecture without FPU (little endian)</description>
1517         <require condition="IAR"/>
1518         <require condition="ARMv7-M Device"/>
1519         <require Dendian="Little-endian"/>
1520         <require Dfpu="NO_FPU"/>
1521     </condition>
1522     <condition id="IARCC ARMv7-M NOFP BE">
1523         <description>IAR Compiler for Armv7-M architecture without FPU (big endian)</description>
1524         <require condition="IAR"/>
1525         <require condition="ARMv7-M Device"/>
1526         <require Dendian="Big-endian"/>
1527         <require Dfpu="NO_FPU"/>
1528     </condition>
1529     <condition id="IARCC ARMv7-M FP LE">
1530         <description>IAR Compiler for Armv7-M architecture with FPU (little endian)</description>
1531         <require condition="IAR"/>
1532         <require condition="ARMv7-M Device"/>
1533         <require Dendian="Little-endian"/>
1534         <accept Dfpu="SP_FPU"/>
1535         <accept Dfpu="DP_FPU"/>
1536     </condition>
1537     <condition id="IARCC ARMv7-M FP BE">
1538         <description>IAR Compiler for Armv7-M architecture with FPU (big endian)</description>
1539         <require condition="IAR"/>
1540         <require condition="ARMv7-M Device"/>
1541         <require Dendian="Big-endian"/>
1542         <accept Dfpu="SP_FPU"/>
1543         <accept Dfpu="DP_FPU"/>
1544     </condition>
1545     <condition id="IARCC ARMv8-MBL LE">
1546         <description>IAR Compiler for Armv8-M base line architecture (little endian)</description>
1547         <require condition="IAR"/>
1548         <require condition="ARMv8-MBL Device"/>
1549         <require Dendian="Little-endian"/>
1550     </condition>
1551     <condition id="IARCC ARMv8-MML NOFP LE">
1552         <description>IAR Compiler for Armv8-M main line architecture without FPU (little endian)</description>
1553         <require condition="IAR"/>
1554         <require condition="ARMv8-MML Device"/>
1555         <require Dendian="Little-endian"/>
1556         <require Dfpu="NO_FPU"/>
1557     </condition>
1558     <condition id="IARCC ARMv8-MML FP LE">
1559         <description>IAR Compiler for Armv8-M main line architecture with FPU (little endian)</description>
1560         <require condition="IAR"/>
1561         <require condition="ARMv8-MML Device"/>
1562         <require Dendian="Little-endian"/>
1563         <accept Dfpu="SP_FPU"/>
1564         <accept Dfpu="DP_FPU"/>
1565     </condition>
1566     <condition id="IARCC ARMv81-MML NOFP LE">
1567         <description>IAR Compiler for Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1568         <require condition="IAR"/>
1569         <require condition="ARMv81-MML Device"/>
1570         <require Dendian="Little-endian"/>
1571         <require Dfpu="NO_FPU"/>
1572         <require Dmve="NO_MVE"/>
1573     </condition>
1574      <condition id="IARCC ARMv81-MML FP LE">
1575         <description>IAR Compiler for Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1576         <require condition="IAR"/>
1577         <require condition="ARMv81-MML Device"/>
1578         <require Dendian="Little-endian"/>
1579         <accept Dfpu="SP_FPU"/>
1580         <accept Dfpu="DP_FPU"/>
1581         <accept Dmve="MVE"/>
1582         <accept Dmve="FP_MVE"/>
1583     </condition>
1584
1585     <condition id="ARMASM ARMv6-M">
1586         <description>Arm Assembler for Armv6-M architecture</description>
1587         <require condition="ARMCC5"/>
1588         <require condition="ARMv6-M Device"/>
1589     </condition>
1590     <condition id="GNUASM ARMv6-M">
1591         <description>GNU Assembler for Armv6-M architecture</description>
1592         <accept condition="ARMCC6"/>
1593         <accept condition="GCC"/>
1594         <require condition="ARMv6-M Device"/>
1595     </condition>
1596     <condition id="IARASM ARMv6-M">
1597         <description>IAR Assembler for Armv6-M architecture</description>
1598         <require condition="IAR"/>
1599         <require condition="ARMv6-M Device"/>
1600     </condition>
1601
1602     <condition id="ARMASM ARMv7-M">
1603         <description>Arm Assembler for Armv7-M architecture</description>
1604         <require condition="ARMCC5"/>
1605         <require condition="ARMv7-M Device"/>
1606     </condition>
1607     <condition id="GNUASM ARMv7-M">
1608         <description>GNU Assembler for Armv7-M architecture</description>
1609         <accept condition="ARMCC6"/>
1610         <accept condition="GCC"/>
1611         <require condition="ARMv7-M Device"/>
1612     </condition>
1613     <condition id="IARASM ARMv7-M">
1614         <description>IAR Assembler for Armv7-M architecture</description>
1615         <require condition="IAR"/>
1616         <require condition="ARMv7-M Device"/>
1617     </condition>
1618
1619     <condition id="GNUASM ARMv8-MBL">
1620         <description>GNU Assembler for Armv8-M base line architecture</description>
1621         <require condition="ARMCC GCC"/>
1622         <require condition="ARMv8-MBL Device"/>
1623     </condition>
1624     <condition id="GNUASM ARMv8-MML">
1625         <description>GNU Assembler for Armv8-M/Armv8.1-M main line architecture</description>
1626         <require condition="ARMCC GCC"/>
1627         <require condition="ARMv8x-MML Device"/>
1628     </condition>
1629     <condition id="IARASM ARMv8-MBL">
1630         <description>IAR Assembler for Armv8-M base line architecture</description>
1631         <require condition="IAR"/>
1632         <require condition="ARMv8-MBL Device"/>
1633     </condition>
1634     <condition id="IARASM ARMv8-MML">
1635         <description>IAR Assembler for Armv8-M main line architecture</description>
1636         <require condition="IAR"/>
1637         <require condition="ARMv8x-MML Device"/>
1638     </condition>
1639
1640     <condition id="ARMASM ARMv7-A">
1641         <description>Arm Assembler for Armv7-A architecture</description>
1642         <require condition="ARMCC5"/>
1643         <require condition="ARMv7-A Device"/>
1644     </condition>
1645     <condition id="GNUASM ARMv7-A">
1646         <description>GNU Assembler for Armv7-A architecture</description>
1647         <accept condition="ARMCC6"/>
1648         <accept condition="GCC"/>
1649         <require condition="ARMv7-A Device"/>
1650     </condition>
1651     <condition id="IARASM ARMv7-A">
1652         <description>IAR Assembler for Armv7-A architecture</description>
1653         <require condition="IAR"/>
1654         <require condition="ARMv7-A Device"/>
1655     </condition>
1656
1657     <!-- OS Tick -->
1658     <condition id="OS Tick PTIM">
1659       <description>Components required for OS Tick Private Timer</description>
1660       <accept Dcore="Cortex-A5"/>
1661       <accept Dcore="Cortex-A9"/>
1662       <require Cclass="Device" Cgroup="IRQ Controller"/>
1663     </condition>
1664
1665     <condition id="OS Tick GTIM">
1666       <description>Components required for OS Tick Generic Physical Timer</description>
1667       <accept Dcore="Cortex-A7"/>
1668       <require Cclass="Device" Cgroup="IRQ Controller"/>
1669     </condition>
1670
1671   </conditions>
1672
1673   <components>
1674     <!-- CMSIS-Core component -->
1675     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.6.0"  condition="ARMv6_7_8-M Device" >
1676       <description>CMSIS-CORE for Cortex-M, SC000, SC300, Star-MC1, ARMv8-M, ARMv8.1-M</description>
1677       <files>
1678         <!-- CPU independent -->
1679         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1680         <file category="include" name="CMSIS/Core/Include/"/>
1681         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
1682         <!-- Code template -->
1683         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
1684         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1685       </files>
1686     </component>
1687
1688     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.1"  condition="ARMv7-A Device" >
1689       <description>CMSIS-CORE for Cortex-A</description>
1690       <files>
1691         <!-- CPU independent -->
1692         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1693         <file category="include" name="CMSIS/Core_A/Include/"/>
1694       </files>
1695     </component>
1696
1697     <!-- CMSIS-Startup components -->
1698     <!-- Cortex-M0 -->
1699     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
1700       <description>System and Startup for Generic Arm Cortex-M0 device</description>
1701       <files>
1702         <!-- include folder / device header file -->
1703         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1704         <!-- startup / system file -->
1705         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
1706         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1707         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1708         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1709         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1710       </files>
1711     </component>
1712     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
1713       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
1714       <files>
1715         <!-- include folder / device header file -->
1716         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1717         <!-- startup / system file -->
1718         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
1719         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.2.0" attr="config" condition="GCC"/>
1720         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1721         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1722         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1723       </files>
1724     </component>
1725
1726     <!-- Cortex-M0+ -->
1727     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
1728       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
1729       <files>
1730         <!-- include folder / device header file -->
1731         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1732         <!-- startup / system file -->
1733         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
1734         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1735         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1736         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
1737         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1738       </files>
1739     </component>
1740     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM0+ CMSIS">
1741       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
1742       <files>
1743         <!-- include folder / device header file -->
1744         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1745         <!-- startup / system file -->
1746         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
1747         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.2.0" attr="config" condition="GCC"/>
1748         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
1749         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1750         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1751       </files>
1752     </component>
1753
1754     <!-- Cortex-M1 -->
1755     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
1756       <description>System and Startup for Generic Arm Cortex-M1 device</description>
1757       <files>
1758         <!-- include folder / device header file -->
1759         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
1760         <!-- startup / system file -->
1761         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
1762         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1763         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1764         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1765         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
1766       </files>
1767     </component>
1768     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
1769       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
1770       <files>
1771         <!-- include folder / device header file -->
1772         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
1773         <!-- startup / system file -->
1774         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
1775         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.2.0" attr="config" condition="GCC"/>
1776         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1777         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
1778         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
1779       </files>
1780     </component>
1781
1782     <!-- Cortex-M3 -->
1783     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
1784       <description>System and Startup for Generic Arm Cortex-M3 device</description>
1785       <files>
1786         <!-- include folder / device header file -->
1787         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1788         <!-- startup / system file -->
1789         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
1790         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1791         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1792         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1793         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
1794       </files>
1795     </component>
1796     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
1797       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
1798       <files>
1799         <!-- include folder / device header file -->
1800         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1801         <!-- startup / system file -->
1802         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
1803         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.2.0" attr="config" condition="GCC"/>
1804         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1805         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1806         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
1807       </files>
1808     </component>
1809
1810     <!-- Cortex-M4 -->
1811     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
1812       <description>System and Startup for Generic Arm Cortex-M4 device</description>
1813       <files>
1814         <!-- include folder / device header file -->
1815         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1816         <!-- startup / system file -->
1817         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
1818         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1819         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1820         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1821        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
1822       </files>
1823     </component>
1824     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
1825       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
1826       <files>
1827         <!-- include folder / device header file -->
1828         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1829         <!-- startup / system file -->
1830         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
1831         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.2.0" attr="config" condition="GCC"/>
1832         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1833         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1834         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
1835       </files>
1836     </component>
1837
1838     <!-- Cortex-M7 -->
1839     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
1840       <description>System and Startup for Generic Arm Cortex-M7 device</description>
1841       <files>
1842         <!-- include folder / device header file -->
1843         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1844         <!-- startup / system file -->
1845         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
1846         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1847         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1848         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1849         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
1850       </files>
1851     </component>
1852     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
1853       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
1854       <files>
1855         <!-- include folder / device header file -->
1856         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1857         <!-- startup / system file -->
1858         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
1859         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.2.0" attr="config" condition="GCC"/>
1860         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1861         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1862         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
1863       </files>
1864     </component>
1865
1866     <!-- Cortex-M23 -->
1867     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
1868       <description>System and Startup for Generic Arm Cortex-M23 device</description>
1869       <files>
1870         <!-- include folder / device header file -->
1871         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1872         <!-- startup / system file -->
1873         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
1874         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1875         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1876         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1877         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
1878         <!-- SAU configuration -->
1879         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1880       </files>
1881     </component>
1882     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
1883       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
1884       <files>
1885         <!-- include folder / device header file -->
1886         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1887         <!-- startup / system file -->
1888         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1889         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1890         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1891         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
1892         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1893         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
1894         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
1895         <!-- SAU configuration -->
1896         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1897       </files>
1898     </component>
1899
1900     <!-- Cortex-M33 -->
1901     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
1902       <description>System and Startup for Generic Arm Cortex-M33 device</description>
1903       <files>
1904         <!-- include folder / device header file -->
1905         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1906         <!-- startup / system file -->
1907         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
1908         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1909         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1910         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1911         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
1912         <!-- SAU configuration -->
1913         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
1914       </files>
1915     </component>
1916     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
1917       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
1918       <files>
1919         <!-- include folder / device header file -->
1920         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1921         <!-- startup / system file -->
1922         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1923         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1924         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1925         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.3.0" attr="config" condition="GCC"/>
1926         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1927         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
1928         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
1929         <!-- SAU configuration -->
1930         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
1931       </files>
1932     </component>
1933
1934     <!-- Cortex-M35P -->
1935     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
1936       <description>System and Startup for Generic Arm Cortex-M35P device</description>
1937       <files>
1938         <!-- include folder / device header file -->
1939         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
1940         <!-- startup / system file -->
1941         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
1942         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1943         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1944         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
1945         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
1946         <!-- SAU configuration -->
1947         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1948       </files>
1949     </component>
1950     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
1951       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
1952       <files>
1953         <!-- include folder / device header file -->
1954         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
1955         <!-- startup / system file -->
1956         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1957         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1958         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1959         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.3.0" attr="config" condition="GCC"/>
1960         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
1961         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
1962         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
1963         <!-- SAU configuration -->
1964         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1965       </files>
1966     </component>
1967
1968     <!-- Cortex-M55 -->
1969     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
1970       <description>System and Startup for Generic Cortex-M55 device</description>
1971       <files>
1972         <!-- include folder / device header file -->
1973         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
1974         <!-- startup / system file -->
1975         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
1976         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1977         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1978         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1979         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.1.0" attr="config"/>
1980         <!-- SAU configuration -->
1981         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1982       </files>
1983     </component>
1984
1985     <!-- Cortex-M85 -->
1986     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM85 CMSIS" isDefaultVariant="true">
1987       <description>System and Startup for Generic Cortex-M85 device</description>
1988       <files>
1989         <!-- include folder / device header file -->
1990         <file category="include"      name="Device/ARM/ARMCM85/Include/"/>
1991         <!-- startup / system file -->
1992         <file category="sourceC"      name="Device/ARM/ARMCM85/Source/startup_ARMCM85.c"             version="1.0.0" attr="config"/>
1993         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/ARM/ARMCM85_ac6_s.sct"         version="1.0.0" attr="config" condition="Startup ARMCC6 Secure"/>
1994         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/ARM/ARMCM85_ac6.sct"           version="1.0.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1995         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1996         <file category="sourceC"      name="Device/ARM/ARMCM85/Source/system_ARMCM85.c"              version="1.0.0" attr="config"/>
1997         <!-- SAU configuration -->
1998         <file category="header"       name="Device/ARM/ARMCM85/Include/Template/partition_ARMCM85.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1999       </files>
2000     </component>
2001
2002     <!-- Cortex-SC000 -->
2003     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2004       <description>System and Startup for Generic Arm SC000 device</description>
2005       <files>
2006         <!-- include folder / device header file -->
2007         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2008         <!-- startup / system file -->
2009         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2010         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2011         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2012         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2013         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2014       </files>
2015     </component>
2016     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2017       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2018       <files>
2019         <!-- include folder / device header file -->
2020         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2021         <!-- startup / system file -->
2022         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2023         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.2.0" attr="config" condition="GCC"/>
2024         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2025         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2026         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2027       </files>
2028     </component>
2029
2030     <!-- Cortex-SC300 -->
2031     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2032       <description>System and Startup for Generic Arm SC300 device</description>
2033       <files>
2034         <!-- include folder / device header file -->
2035         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2036         <!-- startup / system file -->
2037         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2038         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2039         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2040         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2041         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2042       </files>
2043     </component>
2044     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2045       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2046       <files>
2047         <!-- include folder / device header file -->
2048         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2049         <!-- startup / system file -->
2050         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2051         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.2.0" attr="config" condition="GCC"/>
2052         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2053         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2054         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2055       </files>
2056     </component>
2057
2058     <!-- ARMv8MBL -->
2059     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2060       <description>System and Startup for Generic Armv8-M Baseline device</description>
2061       <files>
2062         <!-- include folder / device header file -->
2063         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2064         <!-- startup / system file -->
2065         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2066         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2067         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2068         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2069         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2070         <!-- SAU configuration -->
2071         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2072       </files>
2073     </component>
2074     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2075       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2076       <files>
2077         <!-- include folder / device header file -->
2078         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2079         <!-- startup / system file -->
2080         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2081         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2082         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2083         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2084         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2085         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2086         <!-- SAU configuration -->
2087         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2088       </files>
2089     </component>
2090
2091     <!-- ARMv8MML -->
2092     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2093       <description>System and Startup for Generic Armv8-M Mainline device</description>
2094       <files>
2095         <!-- include folder / device header file -->
2096         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2097         <!-- startup / system file -->
2098         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2099         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2100         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2101         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2102         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2103         <!-- SAU configuration -->
2104         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2105       </files>
2106     </component>
2107     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2108       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2109       <files>
2110         <!-- include folder / device header file -->
2111         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2112         <!-- startup / system file -->
2113         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2114         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2115         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2116         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.3.0" attr="config" condition="GCC"/>
2117         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2118         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2119         <!-- SAU configuration -->
2120         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2121       </files>
2122     </component>
2123
2124     <!-- ARMv81MML -->
2125     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2126       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2127       <files>
2128         <!-- include folder / device header file -->
2129         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2130         <!-- startup / system file -->
2131         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2132         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2133         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2134         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2135         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2136         <!-- SAU configuration -->
2137         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2138       </files>
2139     </component>
2140
2141     <!-- Cortex-A5 -->
2142     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA5 CMSIS">
2143       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2144       <files>
2145         <!-- include folder / device header file -->
2146         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2147         <!-- startup / system / mmu files -->
2148         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2149         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2150         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2151         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2152         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.1" attr="config" condition="GCC"/>
2153         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2154         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2155         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2156         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2157         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2158         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2159         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2160
2161       </files>
2162     </component>
2163
2164     <!-- Cortex-A7 -->
2165     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA7 CMSIS">
2166       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2167       <files>
2168         <!-- include folder / device header file -->
2169         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2170         <!-- startup / system / mmu files -->
2171         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2172         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2173         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2174         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2175         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.1" attr="config" condition="GCC"/>
2176         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2177         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2178         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2179         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2180         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2181         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2182         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2183       </files>
2184     </component>
2185
2186     <!-- Cortex-A9 -->
2187     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.2" condition="ARMCA9 CMSIS">
2188       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2189       <files>
2190         <!-- include folder / device header file -->
2191         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2192         <!-- startup / system / mmu files -->
2193         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2194         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2195         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2196         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2197         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.1" attr="config" condition="GCC"/>
2198         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2199         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2200         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2201         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2202         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2203         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2204         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2205       </files>
2206     </component>
2207
2208     <!-- IRQ Controller -->
2209     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2210       <description>IRQ Controller implementation using GIC</description>
2211       <files>
2212         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2213       </files>
2214     </component>
2215
2216     <!-- OS Tick -->
2217     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2218       <description>OS Tick implementation using Private Timer</description>
2219       <files>
2220         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2221       </files>
2222     </component>
2223
2224     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2225       <description>OS Tick implementation using Generic Physical Timer</description>
2226       <files>
2227         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2228       </files>
2229     </component>
2230
2231     <!-- CMSIS-NN component -->
2232     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="3.1.0" condition="CMSIS NN">
2233       <description>CMSIS-NN Neural Network Library</description>
2234       <files>
2235         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2236         <file category="header" name="CMSIS/NN/Include/arm_nn_types.h"/>
2237         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2238         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
2239         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
2240
2241         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2242         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2243         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2244         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
2245         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
2246         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
2247         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2248         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c"/>
2249         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2250         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2251         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
2252         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
2253         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s16.c"/>
2254         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_fast_s16.c"/>
2255         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s16.c"/>
2256         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_fast_s16.c"/>
2257         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
2258         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
2259         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s16.c"/>
2260         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
2261         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
2262         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2263         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2264         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
2265         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c"/>
2266         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c"/>
2267         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2268         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2269         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
2270         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2271         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2272         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
2273         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
2274         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
2275         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
2276         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c"/>
2277         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_state_s16_s8.c"/>
2278         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
2279         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s16.c"/>
2280         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
2281         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s16.c"/>
2282         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2283         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
2284         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s16.c"/>
2285         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
2286         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s16.c"/>
2287         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
2288         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2289         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2290         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2291         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2292         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
2293         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2294         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2295         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
2296         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c"/>
2297         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c"/>
2298         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
2299         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
2300         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
2301         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s16.c"/>
2302         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c"/>
2303         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c"/>
2304         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
2305         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
2306         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2307         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c"/>
2308         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2309         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
2310         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2311         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
2312         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
2313         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s16.c"/>
2314         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2315         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2316         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2317         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2318         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2319         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2320         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2321         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
2322         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8_s16.c"/>
2323         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s16.c"/>
2324         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
2325         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2326         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
2327       </files>
2328     </component>
2329
2330     <!-- CMSIS-RTOS Keil RTX component -->
2331     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2332       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2333       <RTE_Components_h>
2334         <!-- the following content goes into file 'RTE_Components.h' -->
2335         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2336         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2337       </RTE_Components_h>
2338       <files>
2339         <!-- CPU independent -->
2340         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2341         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2342         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2343
2344         <!-- RTX templates -->
2345         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2346         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2347         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2348         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2349         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2350         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2351         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2352         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2353         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2354         <!-- tool-chain specific template file -->
2355         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2356         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2357         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2358
2359         <!-- CPU and Compiler dependent -->
2360         <!-- ARMCC -->
2361         <file category="library" condition="ARMCC ARMv6-M LE"      name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2362         <file category="library" condition="ARMCC ARMv6-M BE"      name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2363         <file category="library" condition="ARMCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2364         <file category="library" condition="ARMCC ARMv7-M NOFP BE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2365         <file category="library" condition="ARMCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2366         <file category="library" condition="ARMCC ARMv7-M FP BE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2367         <!-- GCC -->
2368         <file category="library" condition="GCC ARMv6-M LE"        name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2369         <file category="library" condition="GCC ARMv6-M BE"        name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2370         <file category="library" condition="GCC ARMv7-M NOFP LE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2371         <file category="library" condition="GCC ARMv7-M NOFP BE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2372         <file category="library" condition="GCC ARMv7-M FP LE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2373         <file category="library" condition="GCC ARMv7-M FP BE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2374         <!-- IAR -->
2375         <file category="library" condition="IARCC ARMv6-M LE"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2376         <file category="library" condition="IARCC ARMv6-M BE"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2377         <file category="library" condition="IARCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2378         <file category="library" condition="IARCC ARMv7-M NOFP BE" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2379         <file category="library" condition="IARCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2380         <file category="library" condition="IARCC ARMv7-M FP BE"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2381       </files>
2382     </component>
2383     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2384     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2385       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2386       <RTE_Components_h>
2387         <!-- the following content goes into file 'RTE_Components.h' -->
2388         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2389         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2390       </RTE_Components_h>
2391       <files>
2392         <!-- CPU independent -->
2393         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2394         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2395         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2396
2397         <!-- RTX templates -->
2398         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2399         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2400         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2401         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2402         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2403         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2404         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2405         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2406         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2407         <!-- tool-chain specific template file -->
2408         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2409         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2410         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2411
2412         <!-- CPU and Compiler dependent -->
2413         <!-- ARMCC -->
2414         <file category="library" condition="ARMCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2415         <file category="library" condition="ARMCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2416         <!-- GCC -->
2417         <file category="library" condition="GCC ARMv7-M NOFP LE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2418         <file category="library" condition="GCC ARMv7-M FP LE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2419         <!-- IAR -->
2420       </files>
2421     </component>
2422
2423     <!-- CMSIS-RTOS Keil RTX5 component -->
2424     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.4" Capiversion="1.0.0" condition="RTOS RTX5">
2425       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2426       <RTE_Components_h>
2427         <!-- the following content goes into file 'RTE_Components.h' -->
2428         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2429         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2430       </RTE_Components_h>
2431       <files>
2432         <!-- RTX header file -->
2433         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2434         <!-- RTX compatibility module for API V1 -->
2435         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2436       </files>
2437     </component>
2438
2439     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2440     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
2441       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
2442       <RTE_Components_h>
2443         <!-- the following content goes into file 'RTE_Components.h' -->
2444         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2445         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2446       </RTE_Components_h>
2447       <files>
2448         <!-- RTX documentation -->
2449         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2450
2451         <!-- RTX header files -->
2452         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2453
2454         <!-- RTX configuration -->
2455         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2456         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2457
2458         <!-- RTX templates -->
2459         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2460         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2461         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2462         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2463         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2464         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2465         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2466         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2467         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2468         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2469
2470         <!-- RTX library configuration -->
2471         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2472
2473         <!-- RTX libraries (CPU and Compiler dependent) -->
2474         <!-- ARMCC -->
2475         <file category="library" condition="ARMCC ARMv6-M LE"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2476         <file category="library" condition="ARMCC ARMv7-M NOFP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2477         <file category="library" condition="ARMCC ARMv7-M FP LE"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2478         <file category="library" condition="ARMCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2479         <file category="library" condition="ARMCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2480         <file category="library" condition="ARMCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2481         <!-- GCC -->
2482         <file category="library" condition="GCC ARMv6-M LE"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2483         <file category="library" condition="GCC ARMv7-M NOFP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2484         <file category="library" condition="GCC ARMv7-M FP LE"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2485         <file category="library" condition="GCC ARMv8-MBL LE"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2486         <file category="library" condition="GCC ARMv8-MML NOFP LE"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2487         <file category="library" condition="GCC ARMv8-MML FP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2488         <!-- IAR -->
2489         <file category="library" condition="IARCC ARMv6-M LE"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2490         <file category="library" condition="IARCC ARMv7-M NOFP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2491         <file category="library" condition="IARCC ARMv7-M FP LE"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2492         <file category="library" condition="IARCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
2493         <file category="library" condition="IARCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
2494         <file category="library" condition="IARCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
2495         <file category="library" condition="IARCC ARMv81-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MM.a"    src="CMSIS/RTOS2/RTX/Source"/>
2496         <file category="library" condition="IARCC ARMv81-MML FP LE"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMF.a"   src="CMSIS/RTOS2/RTX/Source"/>
2497       </files>
2498     </component>
2499     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2500       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
2501       <RTE_Components_h>
2502         <!-- the following content goes into file 'RTE_Components.h' -->
2503         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2504         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2505         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2506       </RTE_Components_h>
2507       <files>
2508         <!-- RTX documentation -->
2509         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2510
2511         <!-- RTX header files -->
2512         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2513
2514         <!-- RTX configuration -->
2515         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2516         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2517
2518         <!-- RTX templates -->
2519         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2520         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2521         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2522         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2523         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2524         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2525         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2526         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2527         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2528         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2529
2530         <!-- RTX library configuration -->
2531         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2532
2533         <!-- RTX libraries (CPU and Compiler dependent) -->
2534         <!-- ARMCC -->
2535         <file category="library" condition="ARMCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2536         <file category="library" condition="ARMCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2537         <file category="library" condition="ARMCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2538         <!-- GCC -->
2539         <file category="library" condition="GCC ARMv8-MBL LE"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2540         <file category="library" condition="GCC ARMv8-MML NOFP LE"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2541         <file category="library" condition="GCC ARMv8-MML FP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2542         <!-- IAR -->
2543         <file category="library" condition="IARCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
2544         <file category="library" condition="IARCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
2545         <file category="library" condition="IARCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
2546         <file category="library" condition="IARCC ARMv81-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMN.a"    src="CMSIS/RTOS2/RTX/Source"/>
2547         <file category="library" condition="IARCC ARMv81-MML FP LE"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMFN.a"   src="CMSIS/RTOS2/RTX/Source"/>
2548       </files>
2549     </component>
2550     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
2551       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
2552       <RTE_Components_h>
2553         <!-- the following content goes into file 'RTE_Components.h' -->
2554         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2555         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2556         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2557       </RTE_Components_h>
2558       <files>
2559         <!-- RTX documentation -->
2560         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2561
2562         <!-- RTX header files -->
2563         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2564
2565         <!-- RTX configuration -->
2566         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2567         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2568
2569         <!-- RTX templates -->
2570         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2571         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2572         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2573         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2574         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2575         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2576         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2577         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2578         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2579         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2580
2581         <!-- RTX sources (core) -->
2582         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2583         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2584         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2585         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2586         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2587         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2588         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2589         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2590         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2591         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2592         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2593         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2594         <!-- RTX sources (library configuration) -->
2595         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2596         <!-- RTX sources (handlers ARMASM) -->
2597         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="ARMASM ARMv6-M"/>
2598         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="ARMASM ARMv7-M"/>
2599         <!-- RTX sources (handlers GAS) -->
2600         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="GNUASM ARMv6-M"/>
2601         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="GNUASM ARMv7-M"/>
2602         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="GNUASM ARMv8-MBL"/>
2603         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="GNUASM ARMv8-MML"/>
2604         <!-- RTX sources (handlers IAR) -->
2605         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="IARASM ARMv6-M"/>
2606         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="IARASM ARMv7-M"/>
2607         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="IARASM ARMv8-MBL"/>
2608         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="IARASM ARMv8-MML"/>
2609         <!-- OS Tick (SysTick) -->
2610         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2611       </files>
2612     </component>
2613     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
2614       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
2615       <RTE_Components_h>
2616         <!-- the following content goes into file 'RTE_Components.h' -->
2617         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2618         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2619         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2620       </RTE_Components_h>
2621       <files>
2622         <!-- RTX documentation -->
2623         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2624
2625         <!-- RTX header files -->
2626         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2627
2628         <!-- RTX configuration -->
2629         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2630         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2631
2632         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2633
2634         <!-- RTX templates -->
2635         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2636         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2637         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2638         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2639         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2640         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2641         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2642         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2643         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2644         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2645
2646         <!-- RTX sources (core) -->
2647         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2648         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2649         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2650         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2651         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2652         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2653         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2654         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2655         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2656         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2657         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2658         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2659         <!-- RTX sources (library configuration) -->
2660         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2661         <!-- RTX sources (handlers ARMASM) -->
2662         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="ARMASM ARMv7-A"/>
2663         <!-- RTX sources (handlers GAS) -->
2664         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="GNUASM ARMv7-A"/>
2665         <!-- RTX sources (handlers IAR) -->
2666         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="IARASM ARMv7-A"/>
2667       </files>
2668     </component>
2669     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2670       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
2671       <RTE_Components_h>
2672         <!-- the following content goes into file 'RTE_Components.h' -->
2673         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2674         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2675         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2676         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2677       </RTE_Components_h>
2678       <files>
2679         <!-- RTX documentation -->
2680         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2681
2682         <!-- RTX header files -->
2683         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2684
2685         <!-- RTX configuration -->
2686         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2687         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2688
2689         <!-- RTX templates -->
2690         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2691         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2692         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2693         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2694         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2695         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2696         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2697         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2698         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2699         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2700
2701         <!-- RTX sources (core) -->
2702         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2703         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2704         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2705         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2706         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2707         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2708         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2709         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2710         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2711         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2712         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2713         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2714         <!-- RTX sources (library configuration) -->
2715         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2716         <!-- RTX sources (GAS handlers) -->
2717         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="GNUASM ARMv8-MBL"/>
2718         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="GNUASM ARMv8-MML"/>
2719         <!-- RTX sources (IAR handlers) -->
2720         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="IARASM ARMv8-MBL"/>
2721         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="IARASM ARMv8-MML"/>
2722         <!-- OS Tick (SysTick) -->
2723         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2724       </files>
2725     </component>
2726
2727     <!-- CMSIS-Driver Custom components -->
2728     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2729       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
2730       <files>
2731         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
2732         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
2733       </files>
2734     </component>
2735     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2736       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
2737       <files>
2738         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
2739         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
2740       </files>
2741     </component>
2742     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
2743       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
2744       <files>
2745         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
2746         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
2747       </files>
2748     </component>
2749     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2750       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
2751       <files>
2752         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
2753         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
2754       </files>
2755     </component>
2756     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
2757       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
2758       <files>
2759         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
2760         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
2761       </files>
2762     </component>
2763     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2764       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
2765       <files>
2766         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
2767         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
2768       </files>
2769     </component>
2770     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2771       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
2772       <files>
2773         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
2774         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
2775       </files>
2776     </component>
2777     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2778       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
2779       <files>
2780         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
2781         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
2782       </files>
2783     </component>
2784     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2785       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
2786       <files>
2787         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
2788         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
2789         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
2790         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
2791       </files>
2792     </component>
2793     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2794       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
2795       <files>
2796         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
2797         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
2798       </files>
2799     </component>
2800     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2801       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
2802       <files>
2803         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
2804         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
2805       </files>
2806     </component>
2807     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2808       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
2809       <files>
2810         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
2811         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
2812       </files>
2813     </component>
2814     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2815       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
2816       <files>
2817         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
2818         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
2819       </files>
2820     </component>
2821     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
2822       <description>Access to #include Driver_WiFi.h file</description>
2823       <files>
2824         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
2825         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
2826       </files>
2827     </component>
2828
2829     <!-- VIO components -->
2830     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
2831       <description>Virtual I/O custom implementation template</description>
2832       <files>
2833         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
2834       </files>
2835     </component>
2836     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
2837       <description>Virtual I/O implementation using memory only</description>
2838       <files>
2839         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
2840       </files>
2841     </component>
2842
2843   </components>
2844
2845   <boards>
2846     <board name="uVision Simulator" vendor="Keil">
2847       <description>uVision Simulator</description>
2848       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2849       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2850       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
2851       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
2852       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2853       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2854       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2855       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2856       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2857       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2858       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2859       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2860       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2861       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2862       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
2863       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2864       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2865       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2866       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2867       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2868       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2869       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
2870       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
2871       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
2872       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
2873       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
2874     </board>
2875
2876     <board name="EWARM Simulator" vendor="IAR">
2877       <description>EWARM Simulator</description>
2878       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2879       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2880       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
2881       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
2882       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2883       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2884       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2885       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2886       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2887       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2888       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2889       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2890       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2891       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2892       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
2893       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2894       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2895       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2896       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2897       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2898       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2899       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
2900       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
2901       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
2902       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
2903       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
2904     </board>
2905   </boards>
2906
2907   <examples>
2908     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2909       <description>CMSIS-RTOS2 Blinky example</description>
2910       <board name="uVision Simulator" vendor="Keil"/>
2911       <project>
2912         <environment name="uv" load="Blinky.uvprojx"/>
2913       </project>
2914       <attributes>
2915         <component Cclass="CMSIS" Cgroup="CORE"/>
2916         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2917         <component Cclass="Device" Cgroup="Startup"/>
2918         <category>Getting Started</category>
2919       </attributes>
2920     </example>
2921
2922     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2923       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2924       <board name="uVision Simulator" vendor="Keil"/>
2925       <project>
2926         <environment name="uv" load="Blinky.uvprojx"/>
2927       </project>
2928       <attributes>
2929         <component Cclass="CMSIS" Cgroup="CORE"/>
2930         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2931         <component Cclass="Device" Cgroup="Startup"/>
2932         <category>Getting Started</category>
2933       </attributes>
2934     </example>
2935
2936     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
2937       <description>CMSIS-RTOS2 Message Queue Example</description>
2938       <board name="uVision Simulator" vendor="Keil"/>
2939       <project>
2940         <environment name="uv" load="MsqQueue.uvprojx"/>
2941       </project>
2942       <attributes>
2943         <component Cclass="CMSIS" Cgroup="CORE"/>
2944         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2945         <component Cclass="Compiler" Cgroup="EventRecorder"/>
2946         <component Cclass="Device" Cgroup="Startup"/>
2947         <category>Getting Started</category>
2948       </attributes>
2949     </example>
2950
2951     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
2952       <description>CMSIS-RTOS2 Memory Pool Example</description>
2953       <board name="uVision Simulator" vendor="Keil"/>
2954       <project>
2955         <environment name="uv" load="MemPool.uvprojx"/>
2956       </project>
2957       <attributes>
2958         <component Cclass="CMSIS" Cgroup="CORE"/>
2959         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2960         <component Cclass="Compiler" Cgroup="EventRecorder"/>
2961         <component Cclass="Device" Cgroup="Startup"/>
2962         <category>Getting Started</category>
2963       </attributes>
2964     </example>
2965
2966     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2967       <description>Bare-metal secure/non-secure example without RTOS</description>
2968       <board name="uVision Simulator" vendor="Keil"/>
2969       <project>
2970         <environment name="uv" load="NoRTOS.uvmpw"/>
2971       </project>
2972       <attributes>
2973         <component Cclass="CMSIS" Cgroup="CORE"/>
2974         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2975         <component Cclass="Device" Cgroup="Startup"/>
2976         <category>Getting Started</category>
2977       </attributes>
2978     </example>
2979
2980     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2981       <description>Secure/non-secure RTOS example with thread context management</description>
2982       <board name="uVision Simulator" vendor="Keil"/>
2983       <project>
2984         <environment name="uv" load="RTOS.uvmpw"/>
2985       </project>
2986       <attributes>
2987         <component Cclass="CMSIS" Cgroup="CORE"/>
2988         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2989         <component Cclass="Device" Cgroup="Startup"/>
2990         <category>Getting Started</category>
2991       </attributes>
2992     </example>
2993
2994     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2995       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2996       <board name="uVision Simulator" vendor="Keil"/>
2997       <project>
2998         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2999       </project>
3000       <attributes>
3001         <component Cclass="CMSIS" Cgroup="CORE"/>
3002         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3003         <component Cclass="Device" Cgroup="Startup"/>
3004         <category>Getting Started</category>
3005       </attributes>
3006     </example>
3007
3008     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
3009       <description>CMSIS-RTOS2 Blinky example</description>
3010       <board name="EWARM Simulator" vendor="IAR"/>
3011       <project>
3012         <environment name="iar" load="Blinky/Blinky.ewp"/>
3013       </project>
3014       <attributes>
3015         <component Cclass="CMSIS" Cgroup="CORE"/>
3016         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3017         <component Cclass="Device" Cgroup="Startup"/>
3018         <category>Getting Started</category>
3019       </attributes>
3020     </example>
3021
3022     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
3023       <description>CMSIS-RTOS2 Message Queue Example</description>
3024       <board name="EWARM Simulator" vendor="IAR"/>
3025       <project>
3026         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
3027       </project>
3028       <attributes>
3029         <component Cclass="CMSIS" Cgroup="CORE"/>
3030         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3031         <component Cclass="Device" Cgroup="Startup"/>
3032         <category>Getting Started</category>
3033       </attributes>
3034     </example>
3035
3036   </examples>
3037
3038 </package>