begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Common Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.8.1">
  12       Active development ...
  13       CMSIS-DSP: 1.10.0 (see revision history for details)
  14       CMSIS-NN: 3.0.1 (see revision history for details)
  15        - Support for int16
  16     </release>
  17     <release version="5.8.0" date="2021-06-24">
  18       CMSIS-Core(M): 5.5.0 (see revision history for details)
  19         - Updated GCC LinkerDescription, GCC Assembler startup
  20         - Added Armv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  21         - Changed C-Startup to default Startup.
  22         - Updated Armv8-M Assembler startup to use GAS syntax
  23           Note: Updating existing projects may need manual user interaction!
  24       CMSIS-Core(A): 1.2.1 (see revision history for details)
  25         - Bugfixes for Cortex-A32
  26       CMSIS-DAP: 2.1.0 (see revision history for details)
  27         - Enhanced DAP_Info
  28         - Added extra UART support
  29       CMSIS-DSP: 1.9.0 (see revision history for details)
  30         - Purged pre-built libs from Git
  31         - Enhanced support for f16 datatype
  32         - Fixed couple of GCC issues
  33       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  34         - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  35         - Added optimization for SVDF kernel
  36         - Improved MVE performance for fully Connected and max pool operator
  37         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  38         - Expanded existing unit test suite along with support for FVP
  39         - Removed Examples folder
  40       CMSIS-RTOS2:
  41         - RTX 5.5.3 (see revision history for details)
  42           - CVE-2021-27431 vulnerability mitigation.
  43           - Enhanced stack overrun checking.
  44           - Various bug fixes and improvements.
  45       CMSIS-Pack: 1.7.2 (see revision history for details)
  46         - Support for Microchip XC32 compiler
  47         - Support for Custom Datapath Extension
  48     </release>
  49     <release version="5.7.0" date="2020-04-09">
  50       CMSIS-Build: 0.9.0 (beta)
  51         - Draft for CMSIS Project description (CPRJ)
  52       CMSIS-Core(M): 5.4.0 (see revision history for details)
  53         - Cortex-M55 cpu support
  54         - Enhanced MVE support for Armv8.1-MML
  55         - Fixed device config define checks.
  56         - L1 Cache functions for Armv7-M and later
  57       CMSIS-Core(A): 1.2.0 (see revision history for details)
  58         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  59         - Added missing DSP intrinsics
  60         - Reworked assembly intrinsics: volatile, barriers and clobber
  61       CMSIS-DSP: 1.8.0 (see revision history for details)
  62         - Added new functions and function groups
  63         - Added MVE support
  64       CMSIS-NN: 1.3.0 (see revision history for details)
  65         - Added MVE support
  66         - Further optimizations for kernels using DSP extension
  67       CMSIS-RTOS2:
  68         - RTX 5.5.2 (see revision history for details)
  69       CMSIS-Driver: 2.8.0
  70         - Added VIO API 0.1.0 (Preview)
  71         - removed volatile from status related typedefs in APIs
  72         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  73       CMSIS-Pack: 1.6.3 (see revision history for details)
  74         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  75       Devices:
  76         - ARMCM55 device
  77         - ARMv81MML startup code recognizing __MVE_USED macro
  78         - Refactored vector table references for all Cortex-M devices
  79         - Reworked ARMCM* C-StartUp files.
  80         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  81       Utilities:
  82         Attention: Linux binaries moved to Linux64 folder!
  83         - SVDConv 3.3.35
  84         - PackChk 1.3.89
  85     </release>
  86     <release version="5.6.0" date="2019-07-10">
  87       CMSIS-Core(M): 5.3.0 (see revision history for details)
  88         - Added provisions for compiler-independent C startup code.
  89       CMSIS-Core(A): 1.1.4 (see revision history for details)
  90         - Fixed __FPU_Enable.
  91       CMSIS-DSP: 1.7.0 (see revision history for details)
  92         - New Neon versions of f32 functions
  93         - Python wrapper
  94         - Preliminary cmake build
  95         - Compilation flags for FFTs
  96         - Changes to arm_math.h
  97       CMSIS-NN: 1.2.0 (see revision history for details)
  98         - New function for depthwise convolution with asymmetric quantization.
  99         - New support functions for requantization.
 100       CMSIS-RTOS:
 101         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
 102       CMSIS-RTOS2:
 103         - RTX 5.5.1 (see revision history for details)
 104       CMSIS-Driver: 2.7.1
 105         - WiFi Interface API 1.0.0
 106       Devices:
 107         - Generalized C startup code for all Cortex-M family devices.
 108         - Updated Cortex-A default memory regions and MMU configurations
 109         - Moved Cortex-A memory and system config files to avoid include path issues
 110     </release>
 111     <release version="5.5.1" date="2019-03-20">
 112       The following folders are deprecated
 113         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 114
 115       CMSIS-Core(M): 5.2.1 (see revision history for details)
 116         - Fixed compilation issue in cmsis_armclang_ltm.h
 117     </release>
 118     <release version="5.5.0" date="2019-03-18">
 119       The following folders have been removed:
 120         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 121         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 122       The following folders are deprecated
 123         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 124
 125       CMSIS-Core(M): 5.2.0 (see revision history for details)
 126         - Reworked Stack/Heap configuration for ARM startup files.
 127         - Added Cortex-M35P device support.
 128         - Added generic Armv8.1-M Mainline device support.
 129       CMSIS-Core(A): 1.1.3 (see revision history for details)
 130       CMSIS-DSP: 1.6.0 (see revision history for details)
 131         - reworked DSP library source files
 132         - reworked DSP library documentation
 133         - Changed DSP folder structure
 134         - moved DSP libraries to folder ./DSP/Lib
 135         - ARM DSP Libraries are built with ARMCLANG
 136         - Added DSP Libraries Source variant
 137       CMSIS-RTOS2:
 138         - RTX 5.5.0 (see revision history for details)
 139       CMSIS-Driver: 2.7.0
 140         - Added WiFi Interface API 1.0.0-beta
 141         - Added components for project specific driver implementations
 142       CMSIS-Pack: 1.6.0 (see revision history for details)
 143       Devices:
 144         - Added Cortex-M35P and ARMv81MML device templates.
 145         - Fixed C-Startup Code for GCC (aligned with other compilers)
 146       Utilities:
 147         - SVDConv 3.3.25
 148         - PackChk 1.3.82
 149     </release>
 150     <release version="5.4.0" date="2018-08-01">
 151       Aligned pack structure with repository.
 152       The following folders are deprecated:
 153         - CMSIS/Include/
 154         - CMSIS/DSP_Lib/
 155
 156       CMSIS-Core(M): 5.1.2 (see revision history for details)
 157         - Added Cortex-M1 support (beta).
 158       CMSIS-Core(A): 1.1.2 (see revision history for details)
 159       CMSIS-NN: 1.1.0
 160         - Added new math functions.
 161       CMSIS-RTOS2:
 162         - API 2.1.3 (see revision history for details)
 163         - RTX 5.4.0 (see revision history for details)
 164           * Updated exception handling on Cortex-A
 165       CMSIS-Driver:
 166         - Flash Driver API V2.2.0
 167       Utilities:
 168         - SVDConv 3.3.21
 169         - PackChk 1.3.71
 170     </release>
 171     <release version="5.3.0" date="2018-02-22">
 172       Updated Arm company brand.
 173       CMSIS-Core(M): 5.1.1 (see revision history for details)
 174       CMSIS-Core(A): 1.1.1 (see revision history for details)
 175       CMSIS-DAP: 2.0.0 (see revision history for details)
 176       CMSIS-NN: 1.0.0
 177         - Initial contribution of the bare metal Neural Network Library.
 178       CMSIS-RTOS2:
 179         - RTX 5.3.0 (see revision history for details)
 180         - OS Tick API 1.0.1
 181     </release>
 182     <release version="5.2.0" date="2017-11-16">
 183       CMSIS-Core(M): 5.1.0 (see revision history for details)
 184         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 185         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 186       CMSIS-Core(A): 1.1.0 (see revision history for details)
 187         - Added compiler_iccarm.h.
 188         - Added additional access functions for physical timer.
 189       CMSIS-DAP: 1.2.0 (see revision history for details)
 190       CMSIS-DSP: 1.5.2 (see revision history for details)
 191       CMSIS-Driver: 2.6.0 (see revision history for details)
 192         - CAN Driver API V1.2.0
 193         - NAND Driver API V2.3.0
 194       CMSIS-RTOS:
 195         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 196       CMSIS-RTOS2:
 197         - API 2.1.2 (see revision history for details)
 198         - RTX 5.2.3 (see revision history for details)
 199       Devices:
 200         - Added GCC startup and linker script for Cortex-A9.
 201         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 202         - Added IAR startup code for Cortex-A9
 203     </release>
 204     <release version="5.1.1" date="2017-09-19">
 205       CMSIS-RTOS2:
 206       - RTX 5.2.1 (see revision history for details)
 207     </release>
 208     <release version="5.1.0" date="2017-08-04">
 209       CMSIS-Core(M): 5.0.2 (see revision history for details)
 210       - Changed Version Control macros to be core agnostic.
 211       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 212       CMSIS-Core(A): 1.0.0 (see revision history for details)
 213       - Initial release
 214       - IRQ Controller API 1.0.0
 215       CMSIS-Driver: 2.05 (see revision history for details)
 216       - All typedefs related to status have been made volatile.
 217       CMSIS-RTOS2:
 218       - API 2.1.1 (see revision history for details)
 219       - RTX 5.2.0 (see revision history for details)
 220       - OS Tick API 1.0.0
 221       CMSIS-DSP: 1.5.2 (see revision history for details)
 222       - Fixed GNU Compiler specific diagnostics.
 223       CMSIS-Pack: 1.5.0 (see revision history for details)
 224       - added System Description File (*.SDF) Format
 225       CMSIS-Zone: 0.0.1 (Preview)
 226       - Initial specification draft
 227     </release>
 228     <release version="5.0.1" date="2017-02-03">
 229       Package Description:
 230       - added taxonomy for Cclass RTOS
 231       CMSIS-RTOS2:
 232       - API 2.1   (see revision history for details)
 233       - RTX 5.1.0 (see revision history for details)
 234       CMSIS-Core: 5.0.1 (see revision history for details)
 235       - Added __PACKED_STRUCT macro
 236       - Added uVisior support
 237       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 238       - Updated template for secure main function (main_s.c)
 239       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 240       CMSIS-DSP: 1.5.1 (see revision history for details)
 241       - added ARMv8M DSP libraries.
 242       CMSIS-Pack:1.4.9 (see revision history for details)
 243       - added Pack Index File specification and schema file
 244     </release>
 245     <release version="5.0.0" date="2016-11-11">
 246       Changed open source license to Apache 2.0
 247       CMSIS_Core:
 248        - Added support for Cortex-M23 and Cortex-M33.
 249        - Added ARMv8-M device configurations for mainline and baseline.
 250        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 251        - Added cmsis_compiler.h to unify compiler behaviour.
 252        - Updated function SCB_EnableICache (for Cortex-M7).
 253        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 254       CMSIS-RTOS:
 255         - bug fix in RTX 4.82 (see revision history for details)
 256       CMSIS-RTOS2:
 257         - new API including compatibility layer to CMSIS-RTOS
 258         - reference implementation based on RTX5
 259         - supports all Cortex-M variants including TrustZone for ARMv8-M
 260       CMSIS-SVD:
 261        - reworked SVD format documentation
 262        - removed SVD file database documentation as SVD files are distributed in packs
 263        - updated SVDConv for Win32 and Linux
 264       CMSIS-DSP:
 265        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 266        - Added DSP libraries build projects to CMSIS pack.
 267     </release>
 268     <release version="4.5.0" date="2015-10-28">
 269       - CMSIS-Core     4.30.0  (see revision history for details)
 270       - CMSIS-DAP      1.1.0   (unchanged)
 271       - CMSIS-Driver   2.04.0  (see revision history for details)
 272       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 273       - CMSIS-Pack     1.4.1   (see revision history for details)
 274       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 275       - CMSIS-SVD      1.3.1   (see revision history for details)
 276     </release>
 277     <release version="4.4.0" date="2015-09-11">
 278       - CMSIS-Core     4.20   (see revision history for details)
 279       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 280       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 281       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 282       - CMSIS-RTOS
 283         -- API         1.02   (unchanged)
 284         -- RTX         4.79   (see revision history for details)
 285       - CMSIS-SVD      1.3.0  (see revision history for details)
 286       - CMSIS-DAP      1.1.0  (extended with SWO support)
 287     </release>
 288     <release version="4.3.0" date="2015-03-20">
 289       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 290       - CMSIS-DSP      1.4.5  (see revision history for details)
 291       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 292       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 293       - CMSIS-RTOS
 294         -- API         1.02   (unchanged)
 295         -- RTX         4.78   (see revision history for details)
 296       - CMSIS-SVD      1.2    (unchanged)
 297     </release>
 298     <release version="4.2.0" date="2014-09-24">
 299       Adding Cortex-M7 support
 300       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 301       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 302       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 303       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 304       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 305     </release>
 306     <release version="4.1.1" date="2014-06-30">
 307       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 308     </release>
 309     <release version="4.1.0" date="2014-06-12">
 310       - CMSIS-Driver   2.02  (incompatible update)
 311       - CMSIS-Pack     1.3   (see revision history for details)
 312       - CMSIS-DSP      1.4.2 (unchanged)
 313       - CMSIS-Core     3.30  (unchanged)
 314       - CMSIS-RTOS RTX 4.74  (unchanged)
 315       - CMSIS-RTOS API 1.02  (unchanged)
 316       - CMSIS-SVD      1.10  (unchanged)
 317       PACK:
 318       - removed G++ specific files from PACK
 319       - added Component Startup variant "C Startup"
 320       - added Pack Checking Utility
 321       - updated conditions to reflect tool-chain dependency
 322       - added Taxonomy for Graphics
 323       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 324     </release>
 325     <!-- release version="4.0.0">
 326       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 327       - CMSIS-Pack     1.1   Preliminary
 328       - CMSIS-DSP      1.4.2 (see revision history for details)
 329       - CMSIS-Core     3.30  (see revision history for details)
 330       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 331       - CMSIS-RTOS API 1.02  (unchanged)
 332       - CMSIS-SVD      1.10  (unchanged)
 333     </release -->
 334     <release version="3.20.4" date="2014-02-20">
 335       - CMSIS-RTOS 4.74 (see revision history for details)
 336       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 337     </release>
 338     <!-- release version="3.20.3">
 339       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 340       - CMSIS-RTOS 4.73 (see revision history for details)
 341     </release -->
 342     <!-- release version="3.20.2">
 343       - CMSIS-Pack documentation has been added
 344       - CMSIS-Drivers header and documentation have been added to PACK
 345       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 346     </release -->
 347     <!-- release version="3.20.1">
 348       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 349       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 350     </release -->
 351     <!-- release version="3.20.0">
 352       The software portions that are deployed in the application program are now under a BSD license which allows usage
 353       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 354       The individual components have been update as listed below:
 355       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 356       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 357       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 358       - CMSIS-SVD is unchanged.
 359     </release -->
 360   </releases>
 361
 362   <taxonomy>
 363     <description Cclass="Audio">Software components for audio processing</description>
 364     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 365     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 366     <description Cclass="Compiler">Compiler Software Extensions</description>
 367     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 368     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 369     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 370     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 371     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 372     <description Cclass="File System">File Drive Support and File System</description>
 373     <description Cclass="IoT Client">IoT cloud client connector</description>
 374     <description Cclass="IoT Service">IoT specific services</description>
 375     <description Cclass="IoT Utility">IoT specific software utility</description>
 376     <description Cclass="Graphics">Graphical User Interface</description>
 377     <description Cclass="Network">Network Stack using Internet Protocols</description>
 378     <description Cclass="RTOS">Real-time Operating System</description>
 379     <description Cclass="Security">Encryption for secure communication or storage</description>
 380     <description Cclass="USB">Universal Serial Bus Stack</description>
 381     <description Cclass="Utility">Generic software utility components</description>
 382   </taxonomy>
 383
 384   <devices>
 385     <!-- ******************************  Cortex-M0  ****************************** -->
 386     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 387       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 388       <description>
 389 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 390 - simple, easy-to-use programmers model
 391 - highly efficient ultra-low power operation
 392 - excellent code density
 393 - deterministic, high-performance interrupt handling
 394 - upward compatibility with the rest of the Cortex-M processor family.
 395       </description>
 396       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 397       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 398       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 399       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 400
 401       <device Dname="ARMCM0">
 402         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 403         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 404       </device>
 405     </family>
 406
 407     <!-- ******************************  Cortex-M0P  ****************************** -->
 408     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 409       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 410       <description>
 411 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 412 - simple, easy-to-use programmers model
 413 - highly efficient ultra-low power operation
 414 - excellent code density
 415 - deterministic, high-performance interrupt handling
 416 - upward compatibility with the rest of the Cortex-M processor family.
 417       </description>
 418       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 419       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 420       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 421       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 422
 423       <device Dname="ARMCM0P">
 424         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 425         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 426       </device>
 427
 428       <device Dname="ARMCM0P_MPU">
 429         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 430         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 431       </device>
 432     </family>
 433
 434     <!-- ******************************  Cortex-M1  ****************************** -->
 435     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 436       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 437       <description>
 438 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 439 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 440       </description>
 441       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 442       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 443       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 444       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 445
 446       <device Dname="ARMCM1">
 447         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 448         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 449       </device>
 450     </family>
 451
 452     <!-- ******************************  Cortex-M3  ****************************** -->
 453     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 454       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 455       <description>
 456 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 457 - simple, easy-to-use programmers model
 458 - highly efficient ultra-low power operation
 459 - excellent code density
 460 - deterministic, high-performance interrupt handling
 461 - upward compatibility with the rest of the Cortex-M processor family.
 462       </description>
 463       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 464       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 465       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 466       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 467
 468       <device Dname="ARMCM3">
 469         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 470         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 471       </device>
 472     </family>
 473
 474     <!-- ******************************  Cortex-M4  ****************************** -->
 475     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 476       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 477       <description>
 478 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 479 - simple, easy-to-use programmers model
 480 - highly efficient ultra-low power operation
 481 - excellent code density
 482 - deterministic, high-performance interrupt handling
 483 - upward compatibility with the rest of the Cortex-M processor family.
 484       </description>
 485       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 486       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 487       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 488       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 489
 490       <device Dname="ARMCM4">
 491         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 492         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 493       </device>
 494
 495       <device Dname="ARMCM4_FP">
 496         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 497         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 498       </device>
 499     </family>
 500
 501     <!-- ******************************  Cortex-M7  ****************************** -->
 502     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 503       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 504       <description>
 505 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 506 - simple, easy-to-use programmers model
 507 - highly efficient ultra-low power operation
 508 - excellent code density
 509 - deterministic, high-performance interrupt handling
 510 - upward compatibility with the rest of the Cortex-M processor family.
 511       </description>
 512       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 513       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 514       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 515       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 516
 517       <device Dname="ARMCM7">
 518         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 519         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 520       </device>
 521
 522       <device Dname="ARMCM7_SP">
 523         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 524         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 525       </device>
 526
 527       <device Dname="ARMCM7_DP">
 528         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 529         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 530       </device>
 531     </family>
 532
 533     <!-- ******************************  Cortex-M23  ********************** -->
 534     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 535       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 536       <description>
 537 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 538 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 539 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 540       </description>
 541       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 542       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 543       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 544       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 545       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 546       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 547
 548       <device Dname="ARMCM23">
 549         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 550         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 551       </device>
 552
 553       <device Dname="ARMCM23_TZ">
 554         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 555         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 556       </device>
 557     </family>
 558
 559     <!-- ******************************  Cortex-M33  ****************************** -->
 560     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 561       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 562       <description>
 563 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 564 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 565       </description>
 566       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 567       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 568       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 569       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 570       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 571       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 572
 573       <device Dname="ARMCM33">
 574         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 575         <description>
 576           no DSP Instructions, no Floating Point Unit, no TrustZone
 577         </description>
 578         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 579       </device>
 580
 581       <device Dname="ARMCM33_TZ">
 582         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 583         <description>
 584           no DSP Instructions, no Floating Point Unit, TrustZone
 585         </description>
 586         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 587       </device>
 588
 589       <device Dname="ARMCM33_DSP_FP">
 590         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 591         <description>
 592           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 593         </description>
 594         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 595       </device>
 596
 597       <device Dname="ARMCM33_DSP_FP_TZ">
 598         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 599         <description>
 600           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 601         </description>
 602         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 603       </device>
 604     </family>
 605
 606     <!-- ******************************  Cortex-M35P  ****************************** -->
 607     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 608       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 609       <description>
 610 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 611 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 612       </description>
 613
 614       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 615       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 616       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 617       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 618       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 619       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 620
 621       <device Dname="ARMCM35P">
 622         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 623         <description>
 624           no DSP Instructions, no Floating Point Unit, no TrustZone
 625         </description>
 626         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 627       </device>
 628
 629       <device Dname="ARMCM35P_TZ">
 630         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 631         <description>
 632           no DSP Instructions, no Floating Point Unit, TrustZone
 633         </description>
 634         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 635       </device>
 636
 637       <device Dname="ARMCM35P_DSP_FP">
 638         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 639         <description>
 640           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 641         </description>
 642         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 643       </device>
 644
 645       <device Dname="ARMCM35P_DSP_FP_TZ">
 646         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 647         <description>
 648           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 649         </description>
 650         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 651       </device>
 652     </family>
 653
 654     <!-- ******************************  Cortex-M55  ****************************** -->
 655     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 656       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 657       <description>
 658 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 659 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 660 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 661       </description>
 662
 663       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 664       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 665       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 666       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 667       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 668       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 669
 670       <device Dname="ARMCM55">
 671         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 672         <description>
 673           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 674         </description>
 675         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 676       </device>
 677     </family>
 678
 679     <!-- ******************************  ARMSC000  ****************************** -->
 680     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 681       <description>
 682 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 683 - simple, easy-to-use programmers model
 684 - highly efficient ultra-low power operation
 685 - excellent code density
 686 - deterministic, high-performance interrupt handling
 687       </description>
 688       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 689       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 690       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 691       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 692
 693       <device Dname="ARMSC000">
 694         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 695         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 696       </device>
 697     </family>
 698
 699     <!-- ******************************  ARMSC300  ****************************** -->
 700     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 701       <description>
 702 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 703 - simple, easy-to-use programmers model
 704 - highly efficient ultra-low power operation
 705 - excellent code density
 706 - deterministic, high-performance interrupt handling
 707       </description>
 708       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 709       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 710       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 711       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 712
 713       <device Dname="ARMSC300">
 714         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 715         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 716       </device>
 717     </family>
 718
 719     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 720     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 721       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 722       <description>
 723 Armv8-M Baseline based device with TrustZone
 724       </description>
 725       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 726       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 727       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 728       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 729       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 730       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 731
 732       <device Dname="ARMv8MBL">
 733         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 734         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 735       </device>
 736     </family>
 737
 738     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 739     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 740       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 741       <description>
 742 Armv8-M Mainline based device with TrustZone
 743       </description>
 744       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 745       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 746       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 747       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 748       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 749       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 750
 751       <device Dname="ARMv8MML">
 752         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 753         <description>
 754           no DSP Instructions, no Floating Point Unit, TrustZone
 755         </description>
 756         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 757       </device>
 758
 759       <device Dname="ARMv8MML_DSP">
 760         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 761         <description>
 762           DSP Instructions, no Floating Point Unit, TrustZone
 763         </description>
 764         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 765       </device>
 766
 767       <device Dname="ARMv8MML_SP">
 768         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 769         <description>
 770           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 771         </description>
 772         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 773       </device>
 774
 775       <device Dname="ARMv8MML_DSP_SP">
 776         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 777         <description>
 778           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 779         </description>
 780         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 781       </device>
 782
 783       <device Dname="ARMv8MML_DP">
 784         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 785         <description>
 786           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 787         </description>
 788         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 789       </device>
 790
 791       <device Dname="ARMv8MML_DSP_DP">
 792         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 793         <description>
 794           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 795         </description>
 796         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 797       </device>
 798     </family>
 799
 800     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 801     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 802       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 803       <description>
 804 Armv8.1-M Mainline based device with TrustZone and MVE
 805       </description>
 806       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 807       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 808       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 809       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 810       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 811       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 812
 813
 814       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 815         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 816         <description>
 817           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 818         </description>
 819         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 820       </device>
 821     </family>
 822
 823     <!-- ******************************  Cortex-A5  ****************************** -->
 824     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 825       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 826       <description>
 827 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 828 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 829 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 830       </description>
 831
 832       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 833       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 834       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 835       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 836
 837       <device Dname="ARMCA5">
 838         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 839         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 840       </device>
 841     </family>
 842
 843     <!-- ******************************  Cortex-A7  ****************************** -->
 844     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 845       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 846       <description>
 847 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 848 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 849 an optional integrated GIC, and an optional L2 cache controller.
 850       </description>
 851
 852       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 853       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 854       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 855       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 856
 857       <device Dname="ARMCA7">
 858         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 859         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 860       </device>
 861     </family>
 862
 863     <!-- ******************************  Cortex-A9  ****************************** -->
 864     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 865       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 866       <description>
 867 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 868 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 869 and 8-bit Java bytecodes in Jazelle state.
 870       </description>
 871
 872       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 873       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 874       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 875       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 876
 877       <device Dname="ARMCA9">
 878         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 879         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 880       </device>
 881     </family>
 882   </devices>
 883
 884
 885   <apis>
 886     <!-- CMSIS Device API -->
 887     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 888       <description>Device interrupt controller interface</description>
 889       <files>
 890         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 891       </files>
 892     </api>
 893     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 894       <description>RTOS Kernel system tick timer interface</description>
 895       <files>
 896         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 897       </files>
 898     </api>
 899     <!-- CMSIS-RTOS API -->
 900     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 901       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 902       <files>
 903         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 904       </files>
 905     </api>
 906     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 907       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 908       <files>
 909         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 910         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 911       </files>
 912     </api>
 913     <!-- CMSIS Driver API -->
 914     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 915       <description>USART Driver API for Cortex-M</description>
 916       <files>
 917         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 918         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 919       </files>
 920     </api>
 921     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 922       <description>SPI Driver API for Cortex-M</description>
 923       <files>
 924         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 925         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 926       </files>
 927     </api>
 928     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 929       <description>SAI Driver API for Cortex-M</description>
 930       <files>
 931         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 932         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 933       </files>
 934     </api>
 935     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 936       <description>I2C Driver API for Cortex-M</description>
 937       <files>
 938         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 939         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 940       </files>
 941     </api>
 942     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 943       <description>CAN Driver API for Cortex-M</description>
 944       <files>
 945         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 946         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 947       </files>
 948     </api>
 949     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 950       <description>Flash Driver API for Cortex-M</description>
 951       <files>
 952         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 953         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 954       </files>
 955     </api>
 956     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 957       <description>MCI Driver API for Cortex-M</description>
 958       <files>
 959         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 960         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 961       </files>
 962     </api>
 963     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 964       <description>NAND Flash Driver API for Cortex-M</description>
 965       <files>
 966         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 967         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 968       </files>
 969     </api>
 970     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 971       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 972       <files>
 973         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 974         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 975         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 976       </files>
 977     </api>
 978     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 979       <description>Ethernet MAC Driver API for Cortex-M</description>
 980       <files>
 981         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 982         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 983       </files>
 984     </api>
 985     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 986       <description>Ethernet PHY Driver API for Cortex-M</description>
 987       <files>
 988         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 989         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 990       </files>
 991     </api>
 992     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 993       <description>USB Device Driver API for Cortex-M</description>
 994       <files>
 995         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 996         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 997       </files>
 998     </api>
 999     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
1000       <description>USB Host Driver API for Cortex-M</description>
1001       <files>
1002         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
1003         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
1004       </files>
1005     </api>
1006     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
1007       <description>WiFi driver</description>
1008       <files>
1009         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
1010         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
1011       </files>
1012     </api>
1013     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
1014       <description>Virtual I/O</description>
1015       <files>
1016         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1017         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1018         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1019       </files>
1020     </api>
1021   </apis>
1022
1023   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1024   <conditions>
1025     <!-- compiler -->
1026     <condition id="ARMCC6">
1027       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1028       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1029     </condition>
1030     <condition id="ARMCC5">
1031       <require Tcompiler="ARMCC" Toptions="AC5"/>
1032     </condition>
1033     <condition id="ARMCC">
1034       <require Tcompiler="ARMCC"/>
1035     </condition>
1036     <condition id="GCC">
1037       <require Tcompiler="GCC"/>
1038     </condition>
1039     <condition id="IAR">
1040       <require Tcompiler="IAR"/>
1041     </condition>
1042     <condition id="ARMCC GCC">
1043       <accept Tcompiler="ARMCC"/>
1044       <accept Tcompiler="GCC"/>
1045     </condition>
1046     <condition id="ARMCC GCC IAR">
1047       <accept Tcompiler="ARMCC"/>
1048       <accept Tcompiler="GCC"/>
1049       <accept Tcompiler="IAR"/>
1050     </condition>
1051
1052     <!-- Arm architecture -->
1053     <condition id="ARMv6-M Device">
1054       <description>Armv6-M architecture based device</description>
1055       <accept Dcore="Cortex-M0"/>
1056       <accept Dcore="Cortex-M1"/>
1057       <accept Dcore="Cortex-M0+"/>
1058       <accept Dcore="SC000"/>
1059     </condition>
1060     <condition id="ARMv7-M Device">
1061       <description>Armv7-M architecture based device</description>
1062       <accept Dcore="Cortex-M3"/>
1063       <accept Dcore="Cortex-M4"/>
1064       <accept Dcore="Cortex-M7"/>
1065       <accept Dcore="SC300"/>
1066     </condition>
1067     <condition id="ARMv8-M Device">
1068       <description>Armv8-M architecture based device</description>
1069       <accept Dcore="ARMV8MBL"/>
1070       <accept Dcore="ARMV8MML"/>
1071       <accept Dcore="ARMV81MML"/>
1072       <accept Dcore="Cortex-M23"/>
1073       <accept Dcore="Cortex-M33"/>
1074       <accept Dcore="Cortex-M35P"/>
1075       <accept Dcore="Cortex-M55"/>
1076     </condition>
1077     <condition id="ARMv6_7-M Device">
1078       <description>Armv6_7-M architecture based device</description>
1079       <accept condition="ARMv6-M Device"/>
1080       <accept condition="ARMv7-M Device"/>
1081     </condition>
1082     <condition id="ARMv6_7_8-M Device">
1083       <description>Armv6_7_8-M architecture based device</description>
1084       <accept condition="ARMv6-M Device"/>
1085       <accept condition="ARMv7-M Device"/>
1086       <accept condition="ARMv8-M Device"/>
1087     </condition>
1088     <condition id="ARMv7-A Device">
1089       <description>Armv7-A architecture based device</description>
1090       <accept Dcore="Cortex-A5"/>
1091       <accept Dcore="Cortex-A7"/>
1092       <accept Dcore="Cortex-A9"/>
1093     </condition>
1094
1095     <condition id="TrustZone">
1096       <description>TrustZone</description>
1097       <require Dtz="TZ"/>
1098     </condition>
1099     <condition id="TZ Secure">
1100       <description>TrustZone (Secure)</description>
1101       <require Dtz="TZ"/>
1102       <require Dsecure="Secure"/>
1103     </condition>
1104     <condition id="TZ Non-secure">
1105       <description>TrustZone (Non-secure)</description>
1106       <require Dtz="TZ"/>
1107       <accept Dsecure="Non-secure"/>
1108       <accept Dsecure="TZ-disabled"/>
1109     </condition>
1110     <condition id="TZ Unavailable">
1111       <description>TrustZone not available</description>
1112       <deny Dtz="TZ"/>
1113     </condition>
1114
1115     <!-- ARM core -->
1116     <condition id="CM0">
1117       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1118       <accept Dcore="Cortex-M0"/>
1119       <accept Dcore="Cortex-M0+"/>
1120       <accept Dcore="SC000"/>
1121     </condition>
1122     <condition id="CM1">
1123       <description>Cortex-M1</description>
1124       <require Dcore="Cortex-M1"/>
1125     </condition>
1126     <condition id="CM3">
1127       <description>Cortex-M3 or SC300 processor based device</description>
1128       <accept Dcore="Cortex-M3"/>
1129       <accept Dcore="SC300"/>
1130     </condition>
1131     <condition id="CM4">
1132       <description>Cortex-M4 processor based device</description>
1133       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1134     </condition>
1135     <condition id="CM4_FP">
1136       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1137       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1138       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1139       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1140     </condition>
1141     <condition id="CM7">
1142       <description>Cortex-M7 processor based device</description>
1143       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1144     </condition>
1145     <condition id="CM7_FP">
1146       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1147       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1148       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1149     </condition>
1150     <condition id="CM23">
1151       <description>Cortex-M23 processor based device</description>
1152       <require Dcore="Cortex-M23"/>
1153     </condition>
1154     <condition id="CM33">
1155       <description>Cortex-M33 processor based device</description>
1156       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1157     </condition>
1158     <condition id="CM33_FP">
1159       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1160       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1161     </condition>
1162     <condition id="CM35P">
1163       <description>Cortex-M35P processor based device</description>
1164       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1165     </condition>
1166     <condition id="CM35P_FP">
1167       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1168       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1169     </condition>
1170     <condition id="ARMv8MBL">
1171       <description>Armv8-M Baseline processor based device</description>
1172       <require Dcore="ARMV8MBL"/>
1173     </condition>
1174     <condition id="ARMv8MML">
1175       <description>Armv8-M Mainline processor based device</description>
1176       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1177     </condition>
1178     <condition id="ARMv8MML_FP">
1179       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1180       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1181       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1182     </condition>
1183
1184     <condition id="CM55_NOFPU_NOMVE">
1185       <description>Cortex-M55, no FPU, no MVE</description>
1186       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1187     </condition>
1188     <condition id="CM55_NOFPU_MVE">
1189       <description>Cortex-M55, no FPU, MVE</description>
1190       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1191       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1192     </condition>
1193     <condition id="CM55_FPU">
1194       <description>Cortex-M55, FPU</description>
1195       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1196       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1197     </condition>
1198
1199     <condition id="CA5_CA9">
1200       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1201       <accept Dcore="Cortex-A5"/>
1202       <accept Dcore="Cortex-A9"/>
1203     </condition>
1204
1205     <condition id="CA7">
1206       <description>Cortex-A7 processor based device</description>
1207       <accept Dcore="Cortex-A7"/>
1208     </condition>
1209
1210     <!-- ARMCC compiler -->
1211     <condition id="CA_ARMCC5">
1212       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1213       <require condition="ARMv7-A Device"/>
1214       <require condition="ARMCC5"/>
1215     </condition>
1216     <condition id="CA_ARMCC6">
1217       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1218       <require condition="ARMv7-A Device"/>
1219       <require condition="ARMCC6"/>
1220     </condition>
1221
1222     <condition id="CM0_ARMCC">
1223       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1224       <require condition="CM0"/>
1225       <require Tcompiler="ARMCC"/>
1226     </condition>
1227     <condition id="CM0_ARMCC5">
1228       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 5</description>
1229       <require condition="CM0"/>
1230       <require condition="ARMCC5"/>
1231     </condition>
1232     <condition id="CM0_ARMCC6">
1233       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 6</description>
1234       <require condition="CM0"/>
1235       <require condition="ARMCC6"/>
1236     </condition>
1237     <condition id="CM0_LE_ARMCC">
1238       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1239       <require condition="CM0_ARMCC"/>
1240       <require Dendian="Little-endian"/>
1241     </condition>
1242     <condition id="CM0_BE_ARMCC">
1243       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1244       <require condition="CM0_ARMCC"/>
1245       <require Dendian="Big-endian"/>
1246     </condition>
1247
1248     <condition id="CM1_ARMCC">
1249       <description>Cortex-M1 based device for the Arm Compiler</description>
1250       <require condition="CM1"/>
1251       <require Tcompiler="ARMCC"/>
1252     </condition>
1253     <condition id="CM1_ARMCC5">
1254       <description>Cortex-M1 based device for the Arm Compiler 5</description>
1255       <require condition="CM1"/>
1256       <require condition="ARMCC5"/>
1257     </condition>
1258     <condition id="CM1_ARMCC6">
1259       <description>Cortex-M1 based device for the Arm Compiler 6</description>
1260       <require condition="CM1"/>
1261       <require condition="ARMCC6"/>
1262     </condition>
1263     <condition id="CM1_LE_ARMCC">
1264       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1265       <require condition="CM1_ARMCC"/>
1266       <require Dendian="Little-endian"/>
1267     </condition>
1268     <condition id="CM1_BE_ARMCC">
1269       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1270       <require condition="CM1_ARMCC"/>
1271       <require Dendian="Big-endian"/>
1272     </condition>
1273
1274     <condition id="CM3_ARMCC">
1275       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1276       <require condition="CM3"/>
1277       <require Tcompiler="ARMCC"/>
1278     </condition>
1279     <condition id="CM3_ARMCC5">
1280       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 5</description>
1281       <require condition="CM3"/>
1282       <require condition="ARMCC5"/>
1283     </condition>
1284     <condition id="CM3_ARMCC6">
1285       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 6</description>
1286       <require condition="CM3"/>
1287       <require condition="ARMCC6"/>
1288     </condition>
1289     <condition id="CM3_LE_ARMCC">
1290       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1291       <require condition="CM3_ARMCC"/>
1292       <require Dendian="Little-endian"/>
1293     </condition>
1294     <condition id="CM3_BE_ARMCC">
1295       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1296       <require condition="CM3_ARMCC"/>
1297       <require Dendian="Big-endian"/>
1298     </condition>
1299
1300     <condition id="CM4_ARMCC">
1301       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1302       <require condition="CM4"/>
1303       <require Tcompiler="ARMCC"/>
1304     </condition>
1305     <condition id="CM4_ARMCC5">
1306       <description>Cortex-M4 processor based device for the Arm Compiler 5</description>
1307       <require condition="CM4"/>
1308       <require condition="ARMCC5"/>
1309     </condition>
1310     <condition id="CM4_ARMCC6">
1311       <description>Cortex-M4 processor based device for the Arm Compiler 6</description>
1312       <require condition="CM4"/>
1313       <require condition="ARMCC6"/>
1314     </condition>
1315     <condition id="CM4_LE_ARMCC">
1316       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1317       <require condition="CM4_ARMCC"/>
1318       <require Dendian="Little-endian"/>
1319     </condition>
1320     <condition id="CM4_BE_ARMCC">
1321       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1322       <require condition="CM4_ARMCC"/>
1323       <require Dendian="Big-endian"/>
1324     </condition>
1325
1326     <condition id="CM4_FP_ARMCC">
1327       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1328       <require condition="CM4_FP"/>
1329       <require Tcompiler="ARMCC"/>
1330     </condition>
1331     <condition id="CM4_FP_ARMCC5">
1332       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1333       <require condition="CM4_FP"/>
1334       <require condition="ARMCC5"/>
1335     </condition>
1336     <condition id="CM4_FP_ARMCC6">
1337       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1338       <require condition="CM4_FP"/>
1339       <require condition="ARMCC6"/>
1340     </condition>
1341     <condition id="CM4_FP_LE_ARMCC">
1342       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1343       <require condition="CM4_FP_ARMCC"/>
1344       <require Dendian="Little-endian"/>
1345     </condition>
1346     <condition id="CM4_FP_BE_ARMCC">
1347       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1348       <require condition="CM4_FP_ARMCC"/>
1349       <require Dendian="Big-endian"/>
1350     </condition>
1351
1352     <condition id="CM7_ARMCC">
1353       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1354       <require condition="CM7"/>
1355       <require Tcompiler="ARMCC"/>
1356     </condition>
1357     <condition id="CM7_ARMCC5">
1358       <description>Cortex-M7 processor based device for the Arm Compiler 5</description>
1359       <require condition="CM7"/>
1360       <require condition="ARMCC5"/>
1361     </condition>
1362     <condition id="CM7_ARMCC6">
1363       <description>Cortex-M7 processor based device for the Arm Compiler 6</description>
1364       <require condition="CM7"/>
1365       <require condition="ARMCC6"/>
1366     </condition>
1367     <condition id="CM7_LE_ARMCC">
1368       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1369       <require condition="CM7_ARMCC"/>
1370       <require Dendian="Little-endian"/>
1371     </condition>
1372     <condition id="CM7_BE_ARMCC">
1373       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1374       <require condition="CM7_ARMCC"/>
1375       <require Dendian="Big-endian"/>
1376     </condition>
1377
1378     <condition id="CM7_FP_ARMCC">
1379       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1380       <require condition="CM7_FP"/>
1381       <require Tcompiler="ARMCC"/>
1382     </condition>
1383     <condition id="CM7_FP_ARMCC5">
1384       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1385       <require condition="CM7_FP"/>
1386       <require condition="ARMCC5"/>
1387     </condition>
1388     <condition id="CM7_FP_ARMCC6">
1389       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1390       <require condition="CM7_FP"/>
1391       <require condition="ARMCC6"/>
1392     </condition>
1393     <condition id="CM7_FP_LE_ARMCC">
1394       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1395       <require condition="CM7_FP_ARMCC"/>
1396       <require Dendian="Little-endian"/>
1397     </condition>
1398     <condition id="CM7_FP_BE_ARMCC">
1399       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1400       <require condition="CM7_FP_ARMCC"/>
1401       <require Dendian="Big-endian"/>
1402     </condition>
1403
1404     <condition id="CM23_ARMCC">
1405       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1406       <require condition="CM23"/>
1407       <require Tcompiler="ARMCC"/>
1408     </condition>
1409     <condition id="CM23_LE_ARMCC">
1410       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1411       <require condition="CM23_ARMCC"/>
1412       <require Dendian="Little-endian"/>
1413     </condition>
1414
1415     <condition id="CM33_ARMCC">
1416       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1417       <require condition="CM33"/>
1418       <require Tcompiler="ARMCC"/>
1419     </condition>
1420     <condition id="CM33_LE_ARMCC">
1421       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1422       <require condition="CM33_ARMCC"/>
1423       <require Dendian="Little-endian"/>
1424     </condition>
1425
1426     <condition id="CM33_FP_ARMCC">
1427       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1428       <require condition="CM33_FP"/>
1429       <require Tcompiler="ARMCC"/>
1430     </condition>
1431     <condition id="CM33_FP_LE_ARMCC">
1432       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1433       <require condition="CM33_FP_ARMCC"/>
1434       <require Dendian="Little-endian"/>
1435     </condition>
1436
1437     <condition id="CM35P_ARMCC">
1438       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1439       <require condition="CM35P"/>
1440       <require Tcompiler="ARMCC"/>
1441     </condition>
1442     <condition id="CM35P_LE_ARMCC">
1443       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1444       <require condition="CM35P_ARMCC"/>
1445       <require Dendian="Little-endian"/>
1446     </condition>
1447
1448     <condition id="CM35P_FP_ARMCC">
1449       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1450       <require condition="CM35P_FP"/>
1451       <require Tcompiler="ARMCC"/>
1452     </condition>
1453     <condition id="CM35P_FP_LE_ARMCC">
1454       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1455       <require condition="CM35P_FP_ARMCC"/>
1456       <require Dendian="Little-endian"/>
1457     </condition>
1458
1459     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1460       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1461       <require condition="CM55_NOFPU_NOMVE"/>
1462       <require Tcompiler="ARMCC"/>
1463     </condition>
1464     <condition id="CM55_NOFPU_MVE_ARMCC">
1465       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1466       <require condition="CM55_NOFPU_MVE"/>
1467       <require Tcompiler="ARMCC"/>
1468     </condition>
1469     <condition id="CM55_FPU_ARMCC">
1470       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1471       <require condition="CM55_FPU"/>
1472       <require Tcompiler="ARMCC"/>
1473     </condition>
1474     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1475       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1476       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1477       <require Dendian="Little-endian"/>
1478     </condition>
1479     <condition id="CM55_FPU_LE_ARMCC">
1480       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1481       <require condition="CM55_FPU_ARMCC"/>
1482       <require Dendian="Little-endian"/>
1483     </condition>
1484
1485     <condition id="ARMv8MBL_ARMCC">
1486       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1487       <require condition="ARMv8MBL"/>
1488       <require Tcompiler="ARMCC"/>
1489     </condition>
1490     <condition id="ARMv8MBL_LE_ARMCC">
1491       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1492       <require condition="ARMv8MBL_ARMCC"/>
1493       <require Dendian="Little-endian"/>
1494     </condition>
1495
1496     <condition id="ARMv8MML_ARMCC">
1497       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1498       <require condition="ARMv8MML"/>
1499       <require Tcompiler="ARMCC"/>
1500     </condition>
1501     <condition id="ARMv8MML_LE_ARMCC">
1502       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1503       <require condition="ARMv8MML_ARMCC"/>
1504       <require Dendian="Little-endian"/>
1505     </condition>
1506
1507     <condition id="ARMv8MML_FP_ARMCC">
1508       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1509       <require condition="ARMv8MML_FP"/>
1510       <require Tcompiler="ARMCC"/>
1511     </condition>
1512     <condition id="ARMv8MML_FP_LE_ARMCC">
1513       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1514       <require condition="ARMv8MML_FP_ARMCC"/>
1515       <require Dendian="Little-endian"/>
1516     </condition>
1517
1518     <condition id="TZ Secure ARMCC6">
1519       <description>TrustZone (Secure), Arm Compiler</description>
1520       <require condition="TZ Secure"/>
1521       <require condition="ARMCC6"/>
1522     </condition>
1523     <condition id="TZ Non-secure ARMCC6">
1524       <description>TrustZone (Non-secure), Arm Compiler</description>
1525       <require condition="TZ Non-secure"/>
1526       <require condition="ARMCC6"/>
1527     </condition>
1528     <condition id="TZ Unavailable ARMCC6">
1529       <description>TrustZone not available, Arm Compiler</description>
1530       <require condition="TZ Unavailable"/>
1531       <require condition="ARMCC6"/>
1532     </condition>
1533
1534     <!-- GCC compiler -->
1535     <condition id="CA_GCC">
1536       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1537       <require condition="ARMv7-A Device"/>
1538       <require Tcompiler="GCC"/>
1539     </condition>
1540
1541     <condition id="CM0_GCC">
1542       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1543       <require condition="CM0"/>
1544       <require Tcompiler="GCC"/>
1545     </condition>
1546     <condition id="CM0_LE_GCC">
1547       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1548       <require condition="CM0_GCC"/>
1549       <require Dendian="Little-endian"/>
1550     </condition>
1551     <condition id="CM0_BE_GCC">
1552       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1553       <require condition="CM0_GCC"/>
1554       <require Dendian="Big-endian"/>
1555     </condition>
1556
1557     <condition id="CM1_GCC">
1558       <description>Cortex-M1 based device for the GCC Compiler</description>
1559       <require condition="CM1"/>
1560       <require Tcompiler="GCC"/>
1561     </condition>
1562     <condition id="CM1_LE_GCC">
1563       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1564       <require condition="CM1_GCC"/>
1565       <require Dendian="Little-endian"/>
1566     </condition>
1567     <condition id="CM1_BE_GCC">
1568       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1569       <require condition="CM1_GCC"/>
1570       <require Dendian="Big-endian"/>
1571     </condition>
1572
1573     <condition id="CM3_GCC">
1574       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1575       <require condition="CM3"/>
1576       <require Tcompiler="GCC"/>
1577     </condition>
1578     <condition id="CM3_LE_GCC">
1579       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1580       <require condition="CM3_GCC"/>
1581       <require Dendian="Little-endian"/>
1582     </condition>
1583     <condition id="CM3_BE_GCC">
1584       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1585       <require condition="CM3_GCC"/>
1586       <require Dendian="Big-endian"/>
1587     </condition>
1588
1589     <condition id="CM4_GCC">
1590       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1591       <require condition="CM4"/>
1592       <require Tcompiler="GCC"/>
1593     </condition>
1594     <condition id="CM4_LE_GCC">
1595       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1596       <require condition="CM4_GCC"/>
1597       <require Dendian="Little-endian"/>
1598     </condition>
1599     <condition id="CM4_BE_GCC">
1600       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1601       <require condition="CM4_GCC"/>
1602       <require Dendian="Big-endian"/>
1603     </condition>
1604
1605     <condition id="CM4_FP_GCC">
1606       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1607       <require condition="CM4_FP"/>
1608       <require Tcompiler="GCC"/>
1609     </condition>
1610     <condition id="CM4_FP_LE_GCC">
1611       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1612       <require condition="CM4_FP_GCC"/>
1613       <require Dendian="Little-endian"/>
1614     </condition>
1615     <condition id="CM4_FP_BE_GCC">
1616       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1617       <require condition="CM4_FP_GCC"/>
1618       <require Dendian="Big-endian"/>
1619     </condition>
1620
1621     <condition id="CM7_GCC">
1622       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1623       <require condition="CM7"/>
1624       <require Tcompiler="GCC"/>
1625     </condition>
1626     <condition id="CM7_LE_GCC">
1627       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1628       <require condition="CM7_GCC"/>
1629       <require Dendian="Little-endian"/>
1630     </condition>
1631     <condition id="CM7_BE_GCC">
1632       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1633       <require condition="CM7_GCC"/>
1634       <require Dendian="Big-endian"/>
1635     </condition>
1636
1637     <condition id="CM7_FP_GCC">
1638       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1639       <require condition="CM7_FP"/>
1640       <require Tcompiler="GCC"/>
1641     </condition>
1642     <condition id="CM7_FP_LE_GCC">
1643       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1644       <require condition="CM7_FP_GCC"/>
1645       <require Dendian="Little-endian"/>
1646     </condition>
1647     <condition id="CM7_FP_BE_GCC">
1648       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1649       <require condition="CM7_FP_GCC"/>
1650       <require Dendian="Big-endian"/>
1651     </condition>
1652
1653     <condition id="CM23_GCC">
1654       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1655       <require condition="CM23"/>
1656       <require Tcompiler="GCC"/>
1657     </condition>
1658     <condition id="CM23_LE_GCC">
1659       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1660       <require condition="CM23_GCC"/>
1661       <require Dendian="Little-endian"/>
1662     </condition>
1663
1664     <condition id="CM33_GCC">
1665       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1666       <require condition="CM33"/>
1667       <require Tcompiler="GCC"/>
1668     </condition>
1669     <condition id="CM33_LE_GCC">
1670       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1671       <require condition="CM33_GCC"/>
1672       <require Dendian="Little-endian"/>
1673     </condition>
1674
1675     <condition id="CM33_FP_GCC">
1676       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1677       <require condition="CM33_FP"/>
1678       <require Tcompiler="GCC"/>
1679     </condition>
1680     <condition id="CM33_FP_LE_GCC">
1681       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1682       <require condition="CM33_FP_GCC"/>
1683       <require Dendian="Little-endian"/>
1684     </condition>
1685
1686     <condition id="CM35P_GCC">
1687       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1688       <require condition="CM35P"/>
1689       <require Tcompiler="GCC"/>
1690     </condition>
1691     <condition id="CM35P_LE_GCC">
1692       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1693       <require condition="CM35P_GCC"/>
1694       <require Dendian="Little-endian"/>
1695     </condition>
1696
1697     <condition id="CM35P_FP_GCC">
1698       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1699       <require condition="CM35P_FP"/>
1700       <require Tcompiler="GCC"/>
1701     </condition>
1702     <condition id="CM35P_FP_LE_GCC">
1703       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1704       <require condition="CM35P_FP_GCC"/>
1705       <require Dendian="Little-endian"/>
1706     </condition>
1707
1708     <condition id="CM55_NOFPU_NOMVE_GCC">
1709       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1710       <require condition="CM55_NOFPU_NOMVE"/>
1711       <require Tcompiler="GCC"/>
1712     </condition>
1713     <condition id="CM55_NOFPU_MVE_GCC">
1714       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1715       <require condition="CM55_NOFPU_MVE"/>
1716       <require Tcompiler="GCC"/>
1717     </condition>
1718     <condition id="CM55_FPU_GCC">
1719       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1720       <require condition="CM55_FPU"/>
1721       <require Tcompiler="GCC"/>
1722     </condition>
1723     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1724       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1725       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1726       <require Dendian="Little-endian"/>
1727     </condition>
1728     <condition id="CM55_FPU_LE_GCC">
1729       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1730       <require condition="CM55_FPU_GCC"/>
1731       <require Dendian="Little-endian"/>
1732     </condition>
1733
1734     <condition id="ARMv8MBL_GCC">
1735       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1736       <require condition="ARMv8MBL"/>
1737       <require Tcompiler="GCC"/>
1738     </condition>
1739     <condition id="ARMv8MBL_LE_GCC">
1740       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1741       <require condition="ARMv8MBL_GCC"/>
1742       <require Dendian="Little-endian"/>
1743     </condition>
1744
1745     <condition id="ARMv8MML_GCC">
1746       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1747       <require condition="ARMv8MML"/>
1748       <require Tcompiler="GCC"/>
1749     </condition>
1750     <condition id="ARMv8MML_LE_GCC">
1751       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1752       <require condition="ARMv8MML_GCC"/>
1753       <require Dendian="Little-endian"/>
1754     </condition>
1755
1756     <condition id="ARMv8MML_FP_GCC">
1757       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1758       <require condition="ARMv8MML_FP"/>
1759       <require Tcompiler="GCC"/>
1760     </condition>
1761     <condition id="ARMv8MML_FP_LE_GCC">
1762       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1763       <require condition="ARMv8MML_FP_GCC"/>
1764       <require Dendian="Little-endian"/>
1765     </condition>
1766
1767     <!-- IAR compiler -->
1768     <condition id="CA_IAR">
1769       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1770       <require condition="ARMv7-A Device"/>
1771       <require Tcompiler="IAR"/>
1772     </condition>
1773
1774     <condition id="CM0_IAR">
1775       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1776       <require condition="CM0"/>
1777       <require Tcompiler="IAR"/>
1778     </condition>
1779     <condition id="CM0_LE_IAR">
1780       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1781       <require condition="CM0_IAR"/>
1782       <require Dendian="Little-endian"/>
1783     </condition>
1784     <condition id="CM0_BE_IAR">
1785       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1786       <require condition="CM0_IAR"/>
1787       <require Dendian="Big-endian"/>
1788     </condition>
1789
1790     <condition id="CM1_IAR">
1791       <description>Cortex-M1 based device for the IAR Compiler</description>
1792       <require condition="CM1"/>
1793       <require Tcompiler="IAR"/>
1794     </condition>
1795     <condition id="CM1_LE_IAR">
1796       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1797       <require condition="CM1_IAR"/>
1798       <require Dendian="Little-endian"/>
1799     </condition>
1800     <condition id="CM1_BE_IAR">
1801       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1802       <require condition="CM1_IAR"/>
1803       <require Dendian="Big-endian"/>
1804     </condition>
1805
1806     <condition id="CM3_IAR">
1807       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1808       <require condition="CM3"/>
1809       <require Tcompiler="IAR"/>
1810     </condition>
1811     <condition id="CM3_LE_IAR">
1812       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1813       <require condition="CM3_IAR"/>
1814       <require Dendian="Little-endian"/>
1815     </condition>
1816     <condition id="CM3_BE_IAR">
1817       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1818       <require condition="CM3_IAR"/>
1819       <require Dendian="Big-endian"/>
1820     </condition>
1821
1822     <condition id="CM4_IAR">
1823       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1824       <require condition="CM4"/>
1825       <require Tcompiler="IAR"/>
1826     </condition>
1827     <condition id="CM4_LE_IAR">
1828       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1829       <require condition="CM4_IAR"/>
1830       <require Dendian="Little-endian"/>
1831     </condition>
1832     <condition id="CM4_BE_IAR">
1833       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1834       <require condition="CM4_IAR"/>
1835       <require Dendian="Big-endian"/>
1836     </condition>
1837
1838     <condition id="CM4_FP_IAR">
1839       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1840       <require condition="CM4_FP"/>
1841       <require Tcompiler="IAR"/>
1842     </condition>
1843     <condition id="CM4_FP_LE_IAR">
1844       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1845       <require condition="CM4_FP_IAR"/>
1846       <require Dendian="Little-endian"/>
1847     </condition>
1848     <condition id="CM4_FP_BE_IAR">
1849       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1850       <require condition="CM4_FP_IAR"/>
1851       <require Dendian="Big-endian"/>
1852     </condition>
1853
1854     <condition id="CM7_IAR">
1855       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1856       <require condition="CM7"/>
1857       <require Tcompiler="IAR"/>
1858     </condition>
1859     <condition id="CM7_LE_IAR">
1860       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1861       <require condition="CM7_IAR"/>
1862       <require Dendian="Little-endian"/>
1863     </condition>
1864     <condition id="CM7_BE_IAR">
1865       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1866       <require condition="CM7_IAR"/>
1867       <require Dendian="Big-endian"/>
1868     </condition>
1869
1870     <condition id="CM7_FP_IAR">
1871       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1872       <require condition="CM7_FP"/>
1873       <require Tcompiler="IAR"/>
1874     </condition>
1875     <condition id="CM7_FP_LE_IAR">
1876       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1877       <require condition="CM7_FP_IAR"/>
1878       <require Dendian="Little-endian"/>
1879     </condition>
1880     <condition id="CM7_FP_BE_IAR">
1881       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1882       <require condition="CM7_FP_IAR"/>
1883       <require Dendian="Big-endian"/>
1884     </condition>
1885
1886     <condition id="CM23_IAR">
1887       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1888       <require condition="CM23"/>
1889       <require Tcompiler="IAR"/>
1890     </condition>
1891     <condition id="CM23_LE_IAR">
1892       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1893       <require condition="CM23_IAR"/>
1894       <require Dendian="Little-endian"/>
1895     </condition>
1896
1897     <condition id="CM33_IAR">
1898       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1899       <require condition="CM33"/>
1900       <require Tcompiler="IAR"/>
1901     </condition>
1902     <condition id="CM33_LE_IAR">
1903       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1904       <require condition="CM33_IAR"/>
1905       <require Dendian="Little-endian"/>
1906     </condition>
1907
1908     <condition id="CM33_FP_IAR">
1909       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1910       <require condition="CM33_FP"/>
1911       <require Tcompiler="IAR"/>
1912     </condition>
1913     <condition id="CM33_FP_LE_IAR">
1914       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1915       <require condition="CM33_FP_IAR"/>
1916       <require Dendian="Little-endian"/>
1917     </condition>
1918
1919     <condition id="CM35P_IAR">
1920       <description>Cortex-M35P processor based device for the IAR Compiler</description>
1921       <require condition="CM35P"/>
1922       <require Tcompiler="IAR"/>
1923     </condition>
1924     <condition id="CM35P_LE_IAR">
1925       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
1926       <require condition="CM35P_IAR"/>
1927       <require Dendian="Little-endian"/>
1928     </condition>
1929
1930     <condition id="CM35P_FP_IAR">
1931       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
1932       <require condition="CM35P_FP"/>
1933       <require Tcompiler="IAR"/>
1934     </condition>
1935     <condition id="CM35P_FP_LE_IAR">
1936       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1937       <require condition="CM35P_FP_IAR"/>
1938       <require Dendian="Little-endian"/>
1939     </condition>
1940
1941     <condition id="CM55_NOFPU_NOMVE_IAR">
1942       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
1943       <require condition="CM55_NOFPU_NOMVE"/>
1944       <require Tcompiler="IAR"/>
1945     </condition>
1946     <condition id="CM55_NOFPU_MVE_IAR">
1947       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
1948       <require condition="CM55_NOFPU_MVE"/>
1949       <require Tcompiler="IAR"/>
1950     </condition>
1951     <condition id="CM55_FPU_IAR">
1952       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
1953       <require condition="CM55_FPU"/>
1954       <require Tcompiler="IAR"/>
1955     </condition>
1956     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
1957       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
1958       <require condition="CM55_NOFPU_NOMVE_IAR"/>
1959       <require Dendian="Little-endian"/>
1960     </condition>
1961     <condition id="CM55_FPU_LE_IAR">
1962       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
1963       <require condition="CM55_FPU_IAR"/>
1964       <require Dendian="Little-endian"/>
1965     </condition>
1966
1967     <condition id="ARMv8MBL_IAR">
1968       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1969       <require condition="ARMv8MBL"/>
1970       <require Tcompiler="IAR"/>
1971     </condition>
1972     <condition id="ARMv8MBL_LE_IAR">
1973       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1974       <require condition="ARMv8MBL_IAR"/>
1975       <require Dendian="Little-endian"/>
1976     </condition>
1977
1978     <condition id="ARMv8MML_IAR">
1979       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1980       <require condition="ARMv8MML"/>
1981       <require Tcompiler="IAR"/>
1982     </condition>
1983     <condition id="ARMv8MML_LE_IAR">
1984       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1985       <require condition="ARMv8MML_IAR"/>
1986       <require Dendian="Little-endian"/>
1987     </condition>
1988
1989     <condition id="ARMv8MML_FP_IAR">
1990       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1991       <require condition="ARMv8MML_FP"/>
1992       <require Tcompiler="IAR"/>
1993     </condition>
1994     <condition id="ARMv8MML_FP_LE_IAR">
1995       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1996       <require condition="ARMv8MML_FP_IAR"/>
1997       <require Dendian="Little-endian"/>
1998     </condition>
1999
2000     <!-- conditions selecting single devices and CMSIS Core -->
2001     <condition id="ARMCM0 CMSIS">
2002       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2003       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2004       <require Cclass="CMSIS" Cgroup="CORE"/>
2005     </condition>
2006
2007     <condition id="ARMCM0+ CMSIS">
2008       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2009       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2010       <require Cclass="CMSIS" Cgroup="CORE"/>
2011     </condition>
2012
2013     <condition id="ARMCM1 CMSIS">
2014       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2015       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2016       <require Cclass="CMSIS" Cgroup="CORE"/>
2017     </condition>
2018
2019     <condition id="ARMCM3 CMSIS">
2020       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2021       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2022       <require Cclass="CMSIS" Cgroup="CORE"/>
2023     </condition>
2024
2025     <condition id="ARMCM4 CMSIS">
2026       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2027       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2028       <require Cclass="CMSIS" Cgroup="CORE"/>
2029     </condition>
2030
2031     <condition id="ARMCM7 CMSIS">
2032       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2033       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2034       <require Cclass="CMSIS" Cgroup="CORE"/>
2035     </condition>
2036
2037     <condition id="ARMCM23 CMSIS">
2038       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2039       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2040       <require Cclass="CMSIS" Cgroup="CORE"/>
2041     </condition>
2042
2043     <condition id="ARMCM33 CMSIS">
2044       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2045       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2046       <require Cclass="CMSIS" Cgroup="CORE"/>
2047     </condition>
2048
2049     <condition id="ARMCM35P CMSIS">
2050       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2051       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2052       <require Cclass="CMSIS" Cgroup="CORE"/>
2053     </condition>
2054
2055     <condition id="ARMCM55 CMSIS">
2056       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2057       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2058       <require Cclass="CMSIS" Cgroup="CORE"/>
2059     </condition>
2060
2061     <condition id="ARMSC000 CMSIS">
2062       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2063       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2064       <require Cclass="CMSIS" Cgroup="CORE"/>
2065     </condition>
2066
2067     <condition id="ARMSC300 CMSIS">
2068       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2069       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2070       <require Cclass="CMSIS" Cgroup="CORE"/>
2071     </condition>
2072
2073     <condition id="ARMv8MBL CMSIS">
2074       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2075       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2076       <require Cclass="CMSIS" Cgroup="CORE"/>
2077     </condition>
2078
2079     <condition id="ARMv8MML CMSIS">
2080       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2081       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2082       <require Cclass="CMSIS" Cgroup="CORE"/>
2083     </condition>
2084
2085     <condition id="ARMv81MML CMSIS">
2086       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2087       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2088       <require Cclass="CMSIS" Cgroup="CORE"/>
2089     </condition>
2090
2091     <condition id="ARMCA5 CMSIS">
2092       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2093       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2094       <require Cclass="CMSIS" Cgroup="CORE"/>
2095     </condition>
2096
2097     <condition id="ARMCA7 CMSIS">
2098       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2099       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2100       <require Cclass="CMSIS" Cgroup="CORE"/>
2101     </condition>
2102
2103     <condition id="ARMCA9 CMSIS">
2104       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2105       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2106       <require Cclass="CMSIS" Cgroup="CORE"/>
2107     </condition>
2108
2109     <!-- CMSIS DSP -->
2110     <condition id="CMSIS DSP">
2111       <description>Components required for DSP</description>
2112       <require condition="ARMv6_7_8-M Device"/>
2113       <require condition="ARMCC GCC IAR"/>
2114       <require Cclass="CMSIS" Cgroup="CORE"/>
2115     </condition>
2116
2117     <!-- CMSIS NN -->
2118     <condition id="CMSIS NN">
2119       <description>Components required for NN</description>
2120       <require Cclass="CMSIS" Cgroup="DSP"/>
2121     </condition>
2122
2123     <!-- RTOS RTX -->
2124     <condition id="RTOS RTX">
2125       <description>Components required for RTOS RTX</description>
2126       <require condition="ARMv6_7-M Device"/>
2127       <require condition="ARMCC GCC IAR"/>
2128       <require Cclass="Device" Cgroup="Startup"/>
2129       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2130     </condition>
2131     <condition id="RTOS RTX IFX">
2132       <description>Components required for RTOS RTX IFX</description>
2133       <require condition="ARMv6_7-M Device"/>
2134       <require condition="ARMCC GCC IAR"/>
2135       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2136       <require Cclass="Device" Cgroup="Startup"/>
2137       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2138     </condition>
2139     <condition id="RTOS RTX5">
2140       <description>Components required for RTOS RTX5</description>
2141       <require condition="ARMv6_7_8-M Device"/>
2142       <require condition="ARMCC GCC IAR"/>
2143       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2144     </condition>
2145     <condition id="RTOS2 RTX5">
2146       <description>Components required for RTOS2 RTX5</description>
2147       <require condition="ARMv6_7_8-M Device"/>
2148       <require condition="ARMCC GCC IAR"/>
2149       <require Cclass="CMSIS"  Cgroup="CORE"/>
2150       <require Cclass="Device" Cgroup="Startup"/>
2151     </condition>
2152     <condition id="RTOS2 RTX5 v7-A">
2153       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2154       <require condition="ARMv7-A Device"/>
2155       <require condition="ARMCC GCC IAR"/>
2156       <require Cclass="CMSIS"  Cgroup="CORE"/>
2157       <require Cclass="Device" Cgroup="Startup"/>
2158       <require Cclass="Device" Cgroup="OS Tick"/>
2159       <require Cclass="Device" Cgroup="IRQ Controller"/>
2160     </condition>
2161     <condition id="RTOS2 RTX5 NS">
2162       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2163       <require condition="ARMv8-M Device"/>
2164       <require condition="TZ Non-secure"/>
2165       <require condition="ARMCC GCC IAR"/>
2166       <require Cclass="CMSIS"  Cgroup="CORE"/>
2167       <require Cclass="Device" Cgroup="Startup"/>
2168     </condition>
2169
2170     <!-- OS Tick -->
2171     <condition id="OS Tick PTIM">
2172       <description>Components required for OS Tick Private Timer</description>
2173       <require condition="CA5_CA9"/>
2174       <require Cclass="Device" Cgroup="IRQ Controller"/>
2175     </condition>
2176
2177     <condition id="OS Tick GTIM">
2178       <description>Components required for OS Tick Generic Physical Timer</description>
2179       <require condition="CA7"/>
2180       <require Cclass="Device" Cgroup="IRQ Controller"/>
2181     </condition>
2182
2183   </conditions>
2184
2185   <components>
2186     <!-- CMSIS-Core component -->
2187     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.5.0"  condition="ARMv6_7_8-M Device" >
2188       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2189       <files>
2190         <!-- CPU independent -->
2191         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2192         <file category="include" name="CMSIS/Core/Include/"/>
2193         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2194         <!-- Code template -->
2195         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2196         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2197       </files>
2198     </component>
2199
2200     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.1"  condition="ARMv7-A Device" >
2201       <description>CMSIS-CORE for Cortex-A</description>
2202       <files>
2203         <!-- CPU independent -->
2204         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2205         <file category="include" name="CMSIS/Core_A/Include/"/>
2206       </files>
2207     </component>
2208
2209     <!-- CMSIS-Startup components -->
2210     <!-- Cortex-M0 -->
2211     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
2212       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2213       <files>
2214         <!-- include folder / device header file -->
2215         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2216         <!-- startup / system file -->
2217         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2218         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2219         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2220         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2221         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2222       </files>
2223     </component>
2224     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2225       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2226       <files>
2227         <!-- include folder / device header file -->
2228         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2229         <!-- startup / system file -->
2230         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2231         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.2.0" attr="config" condition="GCC"/>
2232         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2233         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2234         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2235       </files>
2236     </component>
2237
2238     <!-- Cortex-M0+ -->
2239     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
2240       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2241       <files>
2242         <!-- include folder / device header file -->
2243         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2244         <!-- startup / system file -->
2245         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2246         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2247         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2248         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2249         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2250       </files>
2251     </component>
2252     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM0+ CMSIS">
2253       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2254       <files>
2255         <!-- include folder / device header file -->
2256         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2257         <!-- startup / system file -->
2258         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2259         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.2.0" attr="config" condition="GCC"/>
2260         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2261         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2262         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2263       </files>
2264     </component>
2265
2266     <!-- Cortex-M1 -->
2267     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
2268       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2269       <files>
2270         <!-- include folder / device header file -->
2271         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2272         <!-- startup / system file -->
2273         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2274         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2275         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2276         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2277         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2278       </files>
2279     </component>
2280     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2281       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2282       <files>
2283         <!-- include folder / device header file -->
2284         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2285         <!-- startup / system file -->
2286         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2287         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.2.0" attr="config" condition="GCC"/>
2288         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2289         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2290         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2291       </files>
2292     </component>
2293
2294     <!-- Cortex-M3 -->
2295     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
2296       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2297       <files>
2298         <!-- include folder / device header file -->
2299         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2300         <!-- startup / system file -->
2301         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2302         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2303         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2304         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2305         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2306       </files>
2307     </component>
2308     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2309       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2310       <files>
2311         <!-- include folder / device header file -->
2312         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2313         <!-- startup / system file -->
2314         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2315         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.2.0" attr="config" condition="GCC"/>
2316         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2317         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2318         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2319       </files>
2320     </component>
2321
2322     <!-- Cortex-M4 -->
2323     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
2324       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2325       <files>
2326         <!-- include folder / device header file -->
2327         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2328         <!-- startup / system file -->
2329         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2330         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2331         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2332         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2333        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2334       </files>
2335     </component>
2336     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2337       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2338       <files>
2339         <!-- include folder / device header file -->
2340         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2341         <!-- startup / system file -->
2342         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2343         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.2.0" attr="config" condition="GCC"/>
2344         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2345         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2346         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2347       </files>
2348     </component>
2349
2350     <!-- Cortex-M7 -->
2351     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
2352       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2353       <files>
2354         <!-- include folder / device header file -->
2355         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2356         <!-- startup / system file -->
2357         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2358         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2359         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2360         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2361         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2362       </files>
2363     </component>
2364     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2365       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2366       <files>
2367         <!-- include folder / device header file -->
2368         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2369         <!-- startup / system file -->
2370         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2371         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.2.0" attr="config" condition="GCC"/>
2372         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2373         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2374         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2375       </files>
2376     </component>
2377
2378     <!-- Cortex-M23 -->
2379     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
2380       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2381       <files>
2382         <!-- include folder / device header file -->
2383         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2384         <!-- startup / system file -->
2385         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
2386         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2387         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2388         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2389         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2390         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2391         <!-- SAU configuration -->
2392         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2393       </files>
2394     </component>
2395     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
2396       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2397       <files>
2398         <!-- include folder / device header file -->
2399         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2400         <!-- startup / system file -->
2401         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2402         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2403         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2404         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2405         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
2406         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2407         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
2408         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2409         <!-- SAU configuration -->
2410         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2411       </files>
2412     </component>
2413
2414     <!-- Cortex-M33 -->
2415     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
2416       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2417       <files>
2418         <!-- include folder / device header file -->
2419         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2420         <!-- startup / system file -->
2421         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
2422         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2423         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2424         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2425         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2426         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2427         <!-- SAU configuration -->
2428         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2429       </files>
2430     </component>
2431     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
2432       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2433       <files>
2434         <!-- include folder / device header file -->
2435         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2436         <!-- startup / system file -->
2437         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2438         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2439         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2440         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2441         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.3.0" attr="config" condition="GCC"/>
2442         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2443         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
2444         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2445         <!-- SAU configuration -->
2446         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2447       </files>
2448     </component>
2449
2450     <!-- Cortex-M35P -->
2451     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
2452       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2453       <files>
2454         <!-- include folder / device header file -->
2455         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2456         <!-- startup / system file -->
2457         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
2458         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2459         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2460         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2461         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2462         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2463         <!-- SAU configuration -->
2464         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2465       </files>
2466     </component>
2467     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
2468       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2469       <files>
2470         <!-- include folder / device header file -->
2471         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2472         <!-- startup / system file -->
2473         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2474         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2475         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2476         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2477         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.3.0" attr="config" condition="GCC"/>
2478         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2479         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
2480         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2481         <!-- SAU configuration -->
2482         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2483       </files>
2484     </component>
2485
2486     <!-- Cortex-M55 -->
2487     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
2488       <description>System and Startup for Generic Cortex-M55 device</description>
2489       <files>
2490         <!-- include folder / device header file -->
2491         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2492         <!-- startup / system file -->
2493         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
2494         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2495         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2496         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2497         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2498         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.1" attr="config"/>
2499         <!-- SAU configuration -->
2500         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2501       </files>
2502     </component>
2503
2504     <!-- Cortex-SC000 -->
2505     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2506       <description>System and Startup for Generic Arm SC000 device</description>
2507       <files>
2508         <!-- include folder / device header file -->
2509         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2510         <!-- startup / system file -->
2511         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2512         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2513         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2514         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2515         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2516       </files>
2517     </component>
2518     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2519       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2520       <files>
2521         <!-- include folder / device header file -->
2522         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2523         <!-- startup / system file -->
2524         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2525         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.2.0" attr="config" condition="GCC"/>
2526         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2527         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2528         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2529       </files>
2530     </component>
2531
2532     <!-- Cortex-SC300 -->
2533     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2534       <description>System and Startup for Generic Arm SC300 device</description>
2535       <files>
2536         <!-- include folder / device header file -->
2537         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2538         <!-- startup / system file -->
2539         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2540         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2541         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2542         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2543         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2544       </files>
2545     </component>
2546     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2547       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2548       <files>
2549         <!-- include folder / device header file -->
2550         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2551         <!-- startup / system file -->
2552         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2553         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.2.0" attr="config" condition="GCC"/>
2554         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2555         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2556         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2557       </files>
2558     </component>
2559
2560     <!-- ARMv8MBL -->
2561     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2562       <description>System and Startup for Generic Armv8-M Baseline device</description>
2563       <files>
2564         <!-- include folder / device header file -->
2565         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2566         <!-- startup / system file -->
2567         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2568         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2569         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2570         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2571         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2572         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2573         <!-- SAU configuration -->
2574         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2575       </files>
2576     </component>
2577     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2578       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2579       <files>
2580         <!-- include folder / device header file -->
2581         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2582         <!-- startup / system file -->
2583         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2584         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2585         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2586         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2587         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2588         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2589         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2590         <!-- SAU configuration -->
2591         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2592       </files>
2593     </component>
2594
2595     <!-- ARMv8MML -->
2596     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2597       <description>System and Startup for Generic Armv8-M Mainline device</description>
2598       <files>
2599         <!-- include folder / device header file -->
2600         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2601         <!-- startup / system file -->
2602         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2603         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2604         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2605         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2606         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2607         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2608         <!-- SAU configuration -->
2609         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2610       </files>
2611     </component>
2612     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2613       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2614       <files>
2615         <!-- include folder / device header file -->
2616         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2617         <!-- startup / system file -->
2618         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2619         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2620         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2621         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2622         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.3.0" attr="config" condition="GCC"/>
2623         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2624         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2625         <!-- SAU configuration -->
2626         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2627       </files>
2628     </component>
2629
2630     <!-- ARMv81MML -->
2631     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2632       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2633       <files>
2634         <!-- include folder / device header file -->
2635         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2636         <!-- startup / system file -->
2637         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2638         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2639         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2640         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2641         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2642         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2643         <!-- SAU configuration -->
2644         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2645       </files>
2646     </component>
2647
2648     <!-- Cortex-A5 -->
2649     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA5 CMSIS">
2650       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2651       <files>
2652         <!-- include folder / device header file -->
2653         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2654         <!-- startup / system / mmu files -->
2655         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2656         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2657         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2658         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2659         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.1" attr="config" condition="GCC"/>
2660         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2661         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2662         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2663         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2664         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2665         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2666         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2667
2668       </files>
2669     </component>
2670
2671     <!-- Cortex-A7 -->
2672     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA7 CMSIS">
2673       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2674       <files>
2675         <!-- include folder / device header file -->
2676         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2677         <!-- startup / system / mmu files -->
2678         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2679         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2680         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2681         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2682         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.1" attr="config" condition="GCC"/>
2683         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2684         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2685         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2686         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2687         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2688         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2689         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2690       </files>
2691     </component>
2692
2693     <!-- Cortex-A9 -->
2694     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.2" condition="ARMCA9 CMSIS">
2695       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2696       <files>
2697         <!-- include folder / device header file -->
2698         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2699         <!-- startup / system / mmu files -->
2700         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2701         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2702         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2703         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2704         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.1" attr="config" condition="GCC"/>
2705         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2706         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2707         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2708         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2709         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2710         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2711         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2712       </files>
2713     </component>
2714
2715     <!-- IRQ Controller -->
2716     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2717       <description>IRQ Controller implementation using GIC</description>
2718       <files>
2719         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2720       </files>
2721     </component>
2722
2723     <!-- OS Tick -->
2724     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2725       <description>OS Tick implementation using Private Timer</description>
2726       <files>
2727         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2728       </files>
2729     </component>
2730
2731     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2732       <description>OS Tick implementation using Generic Physical Timer</description>
2733       <files>
2734         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2735       </files>
2736     </component>
2737
2738     <!-- CMSIS-DSP component -->
2739     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.10.0-dev" isDefaultVariant="true" condition="CMSIS DSP">
2740       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2741       <files>
2742         <!-- CPU independent -->
2743         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
2744         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
2745         <file category="header"   name="CMSIS/DSP/Include/arm_math_f16.h"/>
2746         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables.h"/>
2747         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables_f16.h"/>
2748         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs.h"/>
2749         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs_f16.h"/>
2750
2751         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
2752         <file category="include"  name="CMSIS/DSP/Include/"/>
2753
2754         <!-- DSP sources (core) -->
2755         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
2756
2757         <file category="source"   name="CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c"/>
2758
2759         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
2760         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
2761         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
2762         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
2763         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
2764         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
2765         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
2766         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
2767         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
2768         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
2769         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
2770         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
2771
2772         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c"/>
2773
2774         <!-- DSP sources F16 versions -->
2775         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c"/>
2776         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c"/>
2777         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c"/>
2778         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTablesF16.c"/>
2779         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c"/>
2780         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c"/>
2781         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c"/>
2782         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c"/>
2783         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c"/>
2784         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c"/>
2785         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c"/>
2786         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c"/>
2787         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c"/>
2788
2789         <!-- Compute Library for Cortex-A -->
2790         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
2791         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
2792       </files>
2793     </component>
2794
2795     <!-- CMSIS-NN component -->
2796     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="3.0.0" condition="CMSIS NN">
2797       <description>CMSIS-NN Neural Network Library</description>
2798       <files>
2799         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2800         <file category="header" name="CMSIS/NN/Include/arm_nn_types.h"/>
2801         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2802         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
2803         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
2804
2805         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2806         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2807         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2808         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
2809         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
2810         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
2811         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
2812         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2813         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c"/>
2814         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2815         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2816         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
2817         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
2818         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
2819         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
2820         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s16.c"/>
2821         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
2822         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
2823         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2824         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2825         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
2826         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c"/>
2827         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c"/>
2828         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2829         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2830         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
2831         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2832         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2833         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
2834         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
2835         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
2836         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
2837         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c"/>
2838         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
2839         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
2840         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2841         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
2842         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
2843         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
2844         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2845         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2846         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2847         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2848         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
2849         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2850         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2851         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
2852         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c"/>
2853         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
2854         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
2855         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
2856         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c"/>
2857         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
2858         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
2859         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2860         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c"/>
2861         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2862         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
2863         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2864         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
2865         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
2866         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2867         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2868         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2869         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2870         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2871         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2872         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2873         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
2874         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
2875         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2876         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
2877       </files>
2878     </component>
2879
2880     <!-- CMSIS-RTOS Keil RTX component -->
2881     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2882       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2883       <RTE_Components_h>
2884         <!-- the following content goes into file 'RTE_Components.h' -->
2885         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2886         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2887       </RTE_Components_h>
2888       <files>
2889         <!-- CPU independent -->
2890         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2891         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2892         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2893
2894         <!-- RTX templates -->
2895         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2896         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2897         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2898         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2899         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2900         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2901         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2902         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2903         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2904         <!-- tool-chain specific template file -->
2905         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2906         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2907         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2908
2909         <!-- CPU and Compiler dependent -->
2910         <!-- ARMCC -->
2911         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2912         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2913         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2914         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2915         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2916         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2917         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2918         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2919         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2920         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2921         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2922         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2923         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2924         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2925         <!-- GCC -->
2926         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2927         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2928         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2929         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2930         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2931         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2932         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2933         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2934         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2935         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2936         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2937         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2938         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2939         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2940         <!-- IAR -->
2941         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2942         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2943         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2944         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2945         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2946         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2947         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2948         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2949         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2950         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2951         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2952         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2953         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2954         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2955       </files>
2956     </component>
2957     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2958     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2959       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2960       <RTE_Components_h>
2961         <!-- the following content goes into file 'RTE_Components.h' -->
2962         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2963         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2964       </RTE_Components_h>
2965       <files>
2966         <!-- CPU independent -->
2967         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2968         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2969         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2970
2971         <!-- RTX templates -->
2972         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2973         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2974         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2975         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2976         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2977         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2978         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2979         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2980         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2981         <!-- tool-chain specific template file -->
2982         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2983         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2984         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2985
2986         <!-- CPU and Compiler dependent -->
2987         <!-- ARMCC -->
2988         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2989         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2990         <!-- GCC -->
2991         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2992         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2993         <!-- IAR -->
2994       </files>
2995     </component>
2996
2997     <!-- CMSIS-RTOS Keil RTX5 component -->
2998     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.3" Capiversion="1.0.0" condition="RTOS RTX5">
2999       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3000       <RTE_Components_h>
3001         <!-- the following content goes into file 'RTE_Components.h' -->
3002         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3003         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3004       </RTE_Components_h>
3005       <files>
3006         <!-- RTX header file -->
3007         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3008         <!-- RTX compatibility module for API V1 -->
3009         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3010       </files>
3011     </component>
3012
3013     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3014     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
3015       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3016       <RTE_Components_h>
3017         <!-- the following content goes into file 'RTE_Components.h' -->
3018         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3019         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3020       </RTE_Components_h>
3021       <files>
3022         <!-- RTX documentation -->
3023         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3024
3025         <!-- RTX header files -->
3026         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3027
3028         <!-- RTX configuration -->
3029         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3030         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3031
3032         <!-- RTX templates -->
3033         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3034         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3035         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3036         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3037         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3038         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3039         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3040         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3041         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3042         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3043
3044         <!-- RTX library configuration -->
3045         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3046
3047         <!-- RTX libraries (CPU and Compiler dependent) -->
3048         <!-- ARMCC -->
3049         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3050         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3051         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3052         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3053         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3054         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3055         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3056         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3057         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3058         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3059         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3060         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3061         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3062         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3063         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3064         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3065         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3066         <!-- GCC -->
3067         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3068         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3069         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3070         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3071         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3072         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3073         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3074         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3075         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3076         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3077         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3078         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3079         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3080         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3081         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3082         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3083         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3084         <!-- IAR -->
3085         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3086         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3087         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3088         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3089         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3090         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3091         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3092         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3093         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3094         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3095         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3096         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3097         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3098         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3099         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3100         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3101         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3102       </files>
3103     </component>
3104     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3105       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3106       <RTE_Components_h>
3107         <!-- the following content goes into file 'RTE_Components.h' -->
3108         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3109         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3110         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3111       </RTE_Components_h>
3112       <files>
3113         <!-- RTX documentation -->
3114         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3115
3116         <!-- RTX header files -->
3117         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3118
3119         <!-- RTX configuration -->
3120         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3121         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3122
3123         <!-- RTX templates -->
3124         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3125         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3126         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3127         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3128         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3129         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3130         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3131         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3132         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3133         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3134
3135         <!-- RTX library configuration -->
3136         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3137
3138         <!-- RTX libraries (CPU and Compiler dependent) -->
3139         <!-- ARMCC -->
3140         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3141         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3142         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3143         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3144         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3145         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3146         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3147         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3148         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3149         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3150         <!-- GCC -->
3151         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3152         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3153         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3154         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3155         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3156         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3157         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3158         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3159         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3160         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3161         <!-- IAR -->
3162         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3163         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3164         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3165         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3166         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3167         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3168         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3169         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3170         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3171         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3172       </files>
3173     </component>
3174     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
3175       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3176       <RTE_Components_h>
3177         <!-- the following content goes into file 'RTE_Components.h' -->
3178         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3179         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3180         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3181       </RTE_Components_h>
3182       <files>
3183         <!-- RTX documentation -->
3184         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3185
3186         <!-- RTX header files -->
3187         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3188
3189         <!-- RTX configuration -->
3190         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3191         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3192
3193         <!-- RTX templates -->
3194         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3195         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3196         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3197         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3198         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3199         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3200         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3201         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3202         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3203         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3204
3205         <!-- RTX sources (core) -->
3206         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3207         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3208         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3209         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3210         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3211         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3212         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3213         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3214         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3215         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3216         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3217         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3218         <!-- RTX sources (library configuration) -->
3219         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3220         <!-- RTX sources (handlers ARMCC) -->
3221         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM0_ARMCC5"/>
3222         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_ARMCC6"/>
3223         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM1_ARMCC5"/>
3224         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_ARMCC6"/>
3225         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM3_ARMCC5"/>
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_ARMCC6"/>
3227         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_ARMCC5"/>
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_ARMCC6"/>
3229         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_FP_ARMCC5"/>
3230         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_ARMCC6"/>
3231         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_ARMCC5"/>
3232         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_ARMCC6"/>
3233         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_FP_ARMCC5"/>
3234         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_ARMCC6"/>
3235         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3236         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3237         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3238         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3239         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3240         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3241         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3242         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3243         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3244         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3245         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3246         <!-- RTX sources (handlers GCC) -->
3247         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_GCC"/>
3248         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_GCC"/>
3249         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_GCC"/>
3250         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_GCC"/>
3251         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_GCC"/>
3252         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_GCC"/>
3253         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_GCC"/>
3254         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3255         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3256         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3257         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3258         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3259         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3260         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3261         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3262         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3263         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3264         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3265         <!-- RTX sources (handlers IAR) -->
3266         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM0_IAR"/>
3267         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM1_IAR"/>
3268         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM3_IAR"/>
3269         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_IAR"/>
3270         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_FP_IAR"/>
3271         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_IAR"/>
3272         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_FP_IAR"/>
3273         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3274         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3275         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3276         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3277         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3278         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3279         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3280         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3281         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3282         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3283         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3284         <!-- OS Tick (SysTick) -->
3285         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3286       </files>
3287     </component>
3288     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3289       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3290       <RTE_Components_h>
3291         <!-- the following content goes into file 'RTE_Components.h' -->
3292         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3293         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3294         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3295       </RTE_Components_h>
3296       <files>
3297         <!-- RTX documentation -->
3298         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3299
3300         <!-- RTX header files -->
3301         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3302
3303         <!-- RTX configuration -->
3304         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3305         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3306
3307         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3308
3309         <!-- RTX templates -->
3310         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3311         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3312         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3313         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3314         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3315         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3316         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3317         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3318         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3319         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3320
3321         <!-- RTX sources (core) -->
3322         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3323         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3324         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3325         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3326         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3327         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3328         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3329         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3330         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3331         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3332         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3333         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3334         <!-- RTX sources (library configuration) -->
3335         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3336         <!-- RTX sources (handlers ARMCC) -->
3337         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="CA_ARMCC5"/>
3338         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_ARMCC6"/>
3339         <!-- RTX sources (handlers GCC) -->
3340         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_GCC"/>
3341         <!-- RTX sources (handlers IAR) -->
3342         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="CA_IAR"/>
3343       </files>
3344     </component>
3345     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3346       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3347       <RTE_Components_h>
3348         <!-- the following content goes into file 'RTE_Components.h' -->
3349         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3350         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3351         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3352         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3353       </RTE_Components_h>
3354       <files>
3355         <!-- RTX documentation -->
3356         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3357
3358         <!-- RTX header files -->
3359         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3360
3361         <!-- RTX configuration -->
3362         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3363         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3364
3365         <!-- RTX templates -->
3366         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3367         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3368         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3369         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3370         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3371         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3372         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3373         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3374         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3375         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3376
3377         <!-- RTX sources (core) -->
3378         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3379         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3380         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3381         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3382         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3383         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3384         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3385         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3386         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3387         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3388         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3389         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3390         <!-- RTX sources (library configuration) -->
3391         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3392         <!-- RTX sources (ARMCC handlers) -->
3393         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3394         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3395         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3396         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3397         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3398         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3399         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3400         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3401         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3402         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3403         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3404         <!-- RTX sources (GCC handlers) -->
3405         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3406         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3407         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3409         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3410         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3411         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3412         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3413         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3414         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3415         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3416         <!-- RTX sources (IAR handlers) -->
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3418         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3420         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3421         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3422         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3423         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3424         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3425         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3426         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3427         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3428         <!-- OS Tick (SysTick) -->
3429         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3430       </files>
3431     </component>
3432
3433     <!-- CMSIS-Driver Custom components -->
3434     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3435       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3436       <files>
3437         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3438         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3439       </files>
3440     </component>
3441     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3442       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3443       <files>
3444         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3445         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3446       </files>
3447     </component>
3448     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3449       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3450       <files>
3451         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3452         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3453       </files>
3454     </component>
3455     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3456       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3457       <files>
3458         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3459         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3460       </files>
3461     </component>
3462     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3463       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3464       <files>
3465         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3466         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3467       </files>
3468     </component>
3469     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3470       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3471       <files>
3472         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3473         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3474       </files>
3475     </component>
3476     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3477       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3478       <files>
3479         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3480         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3481       </files>
3482     </component>
3483     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3484       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3485       <files>
3486         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3487         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3488       </files>
3489     </component>
3490     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3491       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3492       <files>
3493         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3494         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3495         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3496         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3497       </files>
3498     </component>
3499     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3500       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3501       <files>
3502         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3503         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3504       </files>
3505     </component>
3506     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3507       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3508       <files>
3509         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3510         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3511       </files>
3512     </component>
3513     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3514       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3515       <files>
3516         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3517         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3518       </files>
3519     </component>
3520     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3521       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3522       <files>
3523         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3524         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3525       </files>
3526     </component>
3527     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3528       <description>Access to #include Driver_WiFi.h file</description>
3529       <files>
3530         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3531         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3532       </files>
3533     </component>
3534
3535     <!-- VIO components -->
3536     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3537       <description>Virtual I/O custom implementation template</description>
3538       <files>
3539         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3540       </files>
3541     </component>
3542     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3543       <description>Virtual I/O implementation using memory only</description>
3544       <files>
3545         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3546       </files>
3547     </component>
3548
3549   </components>
3550
3551   <boards>
3552     <board name="uVision Simulator" vendor="Keil">
3553       <description>uVision Simulator</description>
3554       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3555       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3556       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3557       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3558       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3559       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3560       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3561       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3562       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3563       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3564       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3565       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3566       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3567       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3568       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3569       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3570       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3571       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3572       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3573       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3574       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3575       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3576       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3577       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3578       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3579       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3580     </board>
3581
3582     <board name="EWARM Simulator" vendor="IAR">
3583       <description>EWARM Simulator</description>
3584       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3585       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3586       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3587       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3588       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3589       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3590       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3591       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3592       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3593       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3594       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3595       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3596       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3597       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3598       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3599       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3600       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3601       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3602       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3603       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3604       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3605       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3606       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3607       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3608       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3609       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3610     </board>
3611   </boards>
3612
3613   <examples>
3614     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
3615       <description>DSP_Lib Bayes example</description>
3616       <board name="uVision Simulator" vendor="Keil"/>
3617       <project>
3618         <environment name="uv" load="arm_bayes_example.uvprojx"/>
3619       </project>
3620       <attributes>
3621         <component Cclass="CMSIS" Cgroup="CORE"/>
3622         <component Cclass="CMSIS" Cgroup="DSP"/>
3623         <component Cclass="Device" Cgroup="Startup"/>
3624         <category>Getting Started</category>
3625       </attributes>
3626     </example>
3627
3628     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3629       <description>DSP_Lib Class Marks example</description>
3630       <board name="uVision Simulator" vendor="Keil"/>
3631       <project>
3632         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3633       </project>
3634       <attributes>
3635         <component Cclass="CMSIS" Cgroup="CORE"/>
3636         <component Cclass="CMSIS" Cgroup="DSP"/>
3637         <component Cclass="Device" Cgroup="Startup"/>
3638         <category>Getting Started</category>
3639       </attributes>
3640     </example>
3641
3642     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3643       <description>DSP_Lib Convolution example</description>
3644       <board name="uVision Simulator" vendor="Keil"/>
3645       <project>
3646         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3647       </project>
3648       <attributes>
3649         <component Cclass="CMSIS" Cgroup="CORE"/>
3650         <component Cclass="CMSIS" Cgroup="DSP"/>
3651         <component Cclass="Device" Cgroup="Startup"/>
3652         <category>Getting Started</category>
3653       </attributes>
3654     </example>
3655
3656     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3657       <description>DSP_Lib Dotproduct example</description>
3658       <board name="uVision Simulator" vendor="Keil"/>
3659       <project>
3660         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3661       </project>
3662       <attributes>
3663         <component Cclass="CMSIS" Cgroup="CORE"/>
3664         <component Cclass="CMSIS" Cgroup="DSP"/>
3665         <component Cclass="Device" Cgroup="Startup"/>
3666         <category>Getting Started</category>
3667       </attributes>
3668     </example>
3669
3670     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3671       <description>DSP_Lib FFT Bin example</description>
3672       <board name="uVision Simulator" vendor="Keil"/>
3673       <project>
3674         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3675       </project>
3676       <attributes>
3677         <component Cclass="CMSIS" Cgroup="CORE"/>
3678         <component Cclass="CMSIS" Cgroup="DSP"/>
3679         <component Cclass="Device" Cgroup="Startup"/>
3680         <category>Getting Started</category>
3681       </attributes>
3682     </example>
3683
3684     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3685       <description>DSP_Lib FIR example</description>
3686       <board name="uVision Simulator" vendor="Keil"/>
3687       <project>
3688         <environment name="uv" load="arm_fir_example.uvprojx"/>
3689       </project>
3690       <attributes>
3691         <component Cclass="CMSIS" Cgroup="CORE"/>
3692         <component Cclass="CMSIS" Cgroup="DSP"/>
3693         <component Cclass="Device" Cgroup="Startup"/>
3694         <category>Getting Started</category>
3695       </attributes>
3696     </example>
3697
3698     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3699       <description>DSP_Lib Graphic Equalizer example</description>
3700       <board name="uVision Simulator" vendor="Keil"/>
3701       <project>
3702         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3703       </project>
3704       <attributes>
3705         <component Cclass="CMSIS" Cgroup="CORE"/>
3706         <component Cclass="CMSIS" Cgroup="DSP"/>
3707         <component Cclass="Device" Cgroup="Startup"/>
3708         <category>Getting Started</category>
3709       </attributes>
3710     </example>
3711
3712     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3713       <description>DSP_Lib Linear Interpolation example</description>
3714       <board name="uVision Simulator" vendor="Keil"/>
3715       <project>
3716         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3717       </project>
3718       <attributes>
3719         <component Cclass="CMSIS" Cgroup="CORE"/>
3720         <component Cclass="CMSIS" Cgroup="DSP"/>
3721         <component Cclass="Device" Cgroup="Startup"/>
3722         <category>Getting Started</category>
3723       </attributes>
3724     </example>
3725
3726     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3727       <description>DSP_Lib Matrix example</description>
3728       <board name="uVision Simulator" vendor="Keil"/>
3729       <project>
3730         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3731       </project>
3732       <attributes>
3733         <component Cclass="CMSIS" Cgroup="CORE"/>
3734         <component Cclass="CMSIS" Cgroup="DSP"/>
3735         <component Cclass="Device" Cgroup="Startup"/>
3736         <category>Getting Started</category>
3737       </attributes>
3738     </example>
3739
3740     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3741       <description>DSP_Lib Signal Convergence example</description>
3742       <board name="uVision Simulator" vendor="Keil"/>
3743       <project>
3744         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3745       </project>
3746       <attributes>
3747         <component Cclass="CMSIS" Cgroup="CORE"/>
3748         <component Cclass="CMSIS" Cgroup="DSP"/>
3749         <component Cclass="Device" Cgroup="Startup"/>
3750         <category>Getting Started</category>
3751       </attributes>
3752     </example>
3753
3754     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3755       <description>DSP_Lib Sinus/Cosinus example</description>
3756       <board name="uVision Simulator" vendor="Keil"/>
3757       <project>
3758         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3759       </project>
3760       <attributes>
3761         <component Cclass="CMSIS" Cgroup="CORE"/>
3762         <component Cclass="CMSIS" Cgroup="DSP"/>
3763         <component Cclass="Device" Cgroup="Startup"/>
3764         <category>Getting Started</category>
3765       </attributes>
3766     </example>
3767
3768     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
3769       <description>DSP_Lib SVM example</description>
3770       <board name="uVision Simulator" vendor="Keil"/>
3771       <project>
3772         <environment name="uv" load="arm_svm_example.uvprojx"/>
3773       </project>
3774       <attributes>
3775         <component Cclass="CMSIS" Cgroup="CORE"/>
3776         <component Cclass="CMSIS" Cgroup="DSP"/>
3777         <component Cclass="Device" Cgroup="Startup"/>
3778         <category>Getting Started</category>
3779       </attributes>
3780     </example>
3781
3782     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3783       <description>DSP_Lib Variance example</description>
3784       <board name="uVision Simulator" vendor="Keil"/>
3785       <project>
3786         <environment name="uv" load="arm_variance_example.uvprojx"/>
3787       </project>
3788       <attributes>
3789         <component Cclass="CMSIS" Cgroup="CORE"/>
3790         <component Cclass="CMSIS" Cgroup="DSP"/>
3791         <component Cclass="Device" Cgroup="Startup"/>
3792         <category>Getting Started</category>
3793       </attributes>
3794     </example>
3795
3796     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3797       <description>CMSIS-RTOS2 Blinky example</description>
3798       <board name="uVision Simulator" vendor="Keil"/>
3799       <project>
3800         <environment name="uv" load="Blinky.uvprojx"/>
3801       </project>
3802       <attributes>
3803         <component Cclass="CMSIS" Cgroup="CORE"/>
3804         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3805         <component Cclass="Device" Cgroup="Startup"/>
3806         <category>Getting Started</category>
3807       </attributes>
3808     </example>
3809
3810     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3811       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3812       <board name="uVision Simulator" vendor="Keil"/>
3813       <project>
3814         <environment name="uv" load="Blinky.uvprojx"/>
3815       </project>
3816       <attributes>
3817         <component Cclass="CMSIS" Cgroup="CORE"/>
3818         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3819         <component Cclass="Device" Cgroup="Startup"/>
3820         <category>Getting Started</category>
3821       </attributes>
3822     </example>
3823
3824     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3825       <description>CMSIS-RTOS2 Message Queue Example</description>
3826       <board name="uVision Simulator" vendor="Keil"/>
3827       <project>
3828         <environment name="uv" load="MsqQueue.uvprojx"/>
3829       </project>
3830       <attributes>
3831         <component Cclass="CMSIS" Cgroup="CORE"/>
3832         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3833         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3834         <component Cclass="Device" Cgroup="Startup"/>
3835         <category>Getting Started</category>
3836       </attributes>
3837     </example>
3838
3839     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3840       <description>CMSIS-RTOS2 Memory Pool Example</description>
3841       <board name="uVision Simulator" vendor="Keil"/>
3842       <project>
3843         <environment name="uv" load="MemPool.uvprojx"/>
3844       </project>
3845       <attributes>
3846         <component Cclass="CMSIS" Cgroup="CORE"/>
3847         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3848         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3849         <component Cclass="Device" Cgroup="Startup"/>
3850         <category>Getting Started</category>
3851       </attributes>
3852     </example>
3853
3854     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3855       <description>Bare-metal secure/non-secure example without RTOS</description>
3856       <board name="uVision Simulator" vendor="Keil"/>
3857       <project>
3858         <environment name="uv" load="NoRTOS.uvmpw"/>
3859       </project>
3860       <attributes>
3861         <component Cclass="CMSIS" Cgroup="CORE"/>
3862         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3863         <component Cclass="Device" Cgroup="Startup"/>
3864         <category>Getting Started</category>
3865       </attributes>
3866     </example>
3867
3868     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3869       <description>Secure/non-secure RTOS example with thread context management</description>
3870       <board name="uVision Simulator" vendor="Keil"/>
3871       <project>
3872         <environment name="uv" load="RTOS.uvmpw"/>
3873       </project>
3874       <attributes>
3875         <component Cclass="CMSIS" Cgroup="CORE"/>
3876         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3877         <component Cclass="Device" Cgroup="Startup"/>
3878         <category>Getting Started</category>
3879       </attributes>
3880     </example>
3881
3882     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3883       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3884       <board name="uVision Simulator" vendor="Keil"/>
3885       <project>
3886         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3887       </project>
3888       <attributes>
3889         <component Cclass="CMSIS" Cgroup="CORE"/>
3890         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3891         <component Cclass="Device" Cgroup="Startup"/>
3892         <category>Getting Started</category>
3893       </attributes>
3894     </example>
3895
3896     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
3897       <description>CMSIS-RTOS2 Blinky example</description>
3898       <board name="EWARM Simulator" vendor="IAR"/>
3899       <project>
3900         <environment name="iar" load="Blinky/Blinky.ewp"/>
3901       </project>
3902       <attributes>
3903         <component Cclass="CMSIS" Cgroup="CORE"/>
3904         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3905         <component Cclass="Device" Cgroup="Startup"/>
3906         <category>Getting Started</category>
3907       </attributes>
3908     </example>
3909
3910     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
3911       <description>CMSIS-RTOS2 Message Queue Example</description>
3912       <board name="EWARM Simulator" vendor="IAR"/>
3913       <project>
3914         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
3915       </project>
3916       <attributes>
3917         <component Cclass="CMSIS" Cgroup="CORE"/>
3918         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3919         <component Cclass="Device" Cgroup="Startup"/>
3920         <category>Getting Started</category>
3921       </attributes>
3922     </example>
3923
3924   </examples>
3925
3926 </package>