begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.1.2-dev3">
  12       Active development...
  13       CMSIS-Core(A): 1.0.1 (see revision history for details)
  14         - Added compiler_iccarm.h.
  15         - Added additional access functions for physical timer.
  16     </release>
  17     <release version="5.1.2-dev2">
  18       CMSIS-Core(M): 5.0.3 (see revision history for details)
  19       - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  20       CMSIS-RTOS2:
  21       - RTX 5.2.2 (see revision history for details)
  22     </release>
  23     <release version="5.1.2-dev1">
  24       Devices:
  25       - added GCC startup and linker script for Cortex-A9
  26       CMSIS-Core(M): 5.0.3 (see revision history for details)
  27       - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  28       - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  29       CMSIS-Core(A): 1.0.1 (see revision history for details)
  30       CMSIS-Driver:
  31       - CAN Driver API V1.2.0
  32       CMSIS-RTOS:
  33       - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata
  34       CMSIS-RTOS2:
  35       - RTX 5.2.1 (see revision history for details)
  36       - Message Queue Example
  37       - Memory Pool Example
  38     </release>
  39     <release version="5.1.1" date="2017-09-19">
  40       CMSIS-RTOS2:
  41       - RTX 5.2.1 (see revision history for details)
  42     </release>
  43     <release version="5.1.0" date="2017-08-04">
  44       CMSIS-Core(M): 5.0.2 (see revision history for details)
  45       - Changed Version Control macros to be core agnostic.
  46       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  47       CMSIS-Core(A): 1.0.0 (see revision history for details)
  48       - Initial release
  49       - IRQ Controller API 1.0.0
  50       CMSIS-Driver: 2.05 (see revision history for details)
  51       - All typedefs related to status have been made volatile.
  52       CMSIS-RTOS2:
  53       - API 2.1.1 (see revision history for details)
  54       - RTX 5.2.0 (see revision history for details)
  55       - OS Tick API 1.0.0
  56       CMSIS-DSP: 1.5.2 (see revision history for details)
  57       - Fixed GNU Compiler specific diagnostics.
  58       CMSIS-PACK: 1.5.0 (see revision history for details)
  59       - added System Description File (*.SDF) Format
  60       CMSIS-Zone: 0.0.1 (Preview)
  61       - Initial specification draft
  62     </release>
  63     <release version="5.0.1" date="2017-02-03">
  64       Package Description:
  65       - added taxonomy for Cclass RTOS
  66       CMSIS-RTOS2:
  67       - API 2.1   (see revision history for details)
  68       - RTX 5.1.0 (see revision history for details)
  69       CMSIS-Core: 5.0.1 (see revision history for details)
  70       - Added __PACKED_STRUCT macro
  71       - Added uVisior support
  72       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  73       - Updated template for secure main function (main_s.c)
  74       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  75       CMSIS-DSP: 1.5.1 (see revision history for details)
  76       - added ARMv8M DSP libraries.
  77       CMSIS-PACK:1.4.9 (see revision history for details)
  78       - added Pack Index File specification and schema file
  79     </release>
  80     <release version="5.0.0" date="2016-11-11">
  81       Changed open source license to Apache 2.0
  82       CMSIS_Core:
  83        - Added support for Cortex-M23 and Cortex-M33.
  84        - Added ARMv8-M device configurations for mainline and baseline.
  85        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  86        - Added cmsis_compiler.h to unify compiler behaviour.
  87        - Updated function SCB_EnableICache (for Cortex-M7).
  88        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  89       CMSIS-RTOS:
  90         - bug fix in RTX 4.82 (see revision history for details)
  91       CMSIS-RTOS2:
  92         - new API including compatibility layer to CMSIS-RTOS
  93         - reference implementation based on RTX5
  94         - supports all Cortex-M variants including TrustZone for ARMv8-M
  95       CMSIS-SVD:
  96        - reworked SVD format documentation
  97        - removed SVD file database documentation as SVD files are distributed in packs
  98        - updated SVDConv for Win32 and Linux
  99       CMSIS-DSP:
 100        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 101        - Added DSP libraries build projects to CMSIS pack.
 102     </release>
 103     <release version="4.5.0" date="2015-10-28">
 104       - CMSIS-Core     4.30.0  (see revision history for details)
 105       - CMSIS-DAP      1.1.0   (unchanged)
 106       - CMSIS-Driver   2.04.0  (see revision history for details)
 107       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 108       - CMSIS-PACK     1.4.1   (see revision history for details)
 109       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 110       - CMSIS-SVD      1.3.1   (see revision history for details)
 111     </release>
 112     <release version="4.4.0" date="2015-09-11">
 113       - CMSIS-Core     4.20   (see revision history for details)
 114       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 115       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 116       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 117       - CMSIS-RTOS
 118         -- API         1.02   (unchanged)
 119         -- RTX         4.79   (see revision history for details)
 120       - CMSIS-SVD      1.3.0  (see revision history for details)
 121       - CMSIS-DAP      1.1.0  (extended with SWO support)
 122     </release>
 123     <release version="4.3.0" date="2015-03-20">
 124       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 125       - CMSIS-DSP      1.4.5  (see revision history for details)
 126       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 127       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 128       - CMSIS-RTOS
 129         -- API         1.02   (unchanged)
 130         -- RTX         4.78   (see revision history for details)
 131       - CMSIS-SVD      1.2    (unchanged)
 132     </release>
 133     <release version="4.2.0" date="2014-09-24">
 134       Adding Cortex-M7 support
 135       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 136       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 137       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 138       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 139       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 140     </release>
 141     <release version="4.1.1" date="2014-06-30">
 142       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 143     </release>
 144     <release version="4.1.0" date="2014-06-12">
 145       - CMSIS-Driver   2.02  (incompatible update)
 146       - CMSIS-Pack     1.3   (see revision history for details)
 147       - CMSIS-DSP      1.4.2 (unchanged)
 148       - CMSIS-Core     3.30  (unchanged)
 149       - CMSIS-RTOS RTX 4.74  (unchanged)
 150       - CMSIS-RTOS API 1.02  (unchanged)
 151       - CMSIS-SVD      1.10  (unchanged)
 152       PACK:
 153       - removed G++ specific files from PACK
 154       - added Component Startup variant "C Startup"
 155       - added Pack Checking Utility
 156       - updated conditions to reflect tool-chain dependency
 157       - added Taxonomy for Graphics
 158       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 159     </release>
 160     <release version="4.0.0">
 161       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 162       - CMSIS-Pack     1.1   Preliminary
 163       - CMSIS-DSP      1.4.2 (see revision history for details)
 164       - CMSIS-Core     3.30  (see revision history for details)
 165       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 166       - CMSIS-RTOS API 1.02  (unchanged)
 167       - CMSIS-SVD      1.10  (unchanged)
 168     </release>
 169     <release version="3.20.4">
 170       - CMSIS-RTOS 4.74 (see revision history for details)
 171       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 172     </release>
 173     <release version="3.20.3">
 174       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 175       - CMSIS-RTOS 4.73 (see revision history for details)
 176     </release>
 177     <release version="3.20.2">
 178       - CMSIS-Pack documentation has been added
 179       - CMSIS-Drivers header and documentation have been added to PACK
 180       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 181     </release>
 182     <release version="3.20.1">
 183       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 184       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 185     </release>
 186     <release version="3.20.0">
 187       The software portions that are deployed in the application program are now under a BSD license which allows usage
 188       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 189       The individual components have been update as listed below:
 190       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 191       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 192       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 193       - CMSIS-SVD is unchanged.
 194     </release>
 195   </releases>
 196
 197   <taxonomy>
 198     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 199     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 200     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 201     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 202     <description Cclass="File System">File Drive Support and File System</description>
 203     <description Cclass="Graphics">Graphical User Interface</description>
 204     <description Cclass="Network">Network Stack using Internet Protocols</description>
 205     <description Cclass="USB">Universal Serial Bus Stack</description>
 206     <description Cclass="Compiler">Compiler Software Extensions</description>
 207     <description Cclass="RTOS">Real-time Operating System</description>
 208   </taxonomy>
 209
 210   <devices>
 211     <!-- ******************************  Cortex-M0  ****************************** -->
 212     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 213       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 214       <description>
 215 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 216 - simple, easy-to-use programmers model
 217 - highly efficient ultra-low power operation
 218 - excellent code density
 219 - deterministic, high-performance interrupt handling
 220 - upward compatibility with the rest of the Cortex-M processor family.
 221       </description>
 222       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 223       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 224       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 225       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 226
 227       <device Dname="ARMCM0">
 228         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 229         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 230       </device>
 231     </family>
 232
 233     <!-- ******************************  Cortex-M0P  ****************************** -->
 234     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 235       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 236       <description>
 237 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 238 - simple, easy-to-use programmers model
 239 - highly efficient ultra-low power operation
 240 - excellent code density
 241 - deterministic, high-performance interrupt handling
 242 - upward compatibility with the rest of the Cortex-M processor family.
 243       </description>
 244       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 245       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 246       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 247       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 248
 249       <device Dname="ARMCM0P">
 250         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 251         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 252       </device>
 253     </family>
 254
 255     <!-- ******************************  Cortex-M3  ****************************** -->
 256     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 257       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 258       <description>
 259 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 260 - simple, easy-to-use programmers model
 261 - highly efficient ultra-low power operation
 262 - excellent code density
 263 - deterministic, high-performance interrupt handling
 264 - upward compatibility with the rest of the Cortex-M processor family.
 265       </description>
 266       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 267       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 268       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 269       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 270
 271       <device Dname="ARMCM3">
 272         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 273         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 274       </device>
 275     </family>
 276
 277     <!-- ******************************  Cortex-M4  ****************************** -->
 278     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 279       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 280       <description>
 281 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 282 - simple, easy-to-use programmers model
 283 - highly efficient ultra-low power operation
 284 - excellent code density
 285 - deterministic, high-performance interrupt handling
 286 - upward compatibility with the rest of the Cortex-M processor family.
 287       </description>
 288       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 289       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 290       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 291       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 292
 293       <device Dname="ARMCM4">
 294         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 295         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 296       </device>
 297
 298       <device Dname="ARMCM4_FP">
 299         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 300         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 301       </device>
 302     </family>
 303
 304     <!-- ******************************  Cortex-M7  ****************************** -->
 305     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 306       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 307       <description>
 308 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 309 - simple, easy-to-use programmers model
 310 - highly efficient ultra-low power operation
 311 - excellent code density
 312 - deterministic, high-performance interrupt handling
 313 - upward compatibility with the rest of the Cortex-M processor family.
 314       </description>
 315       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 316       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 317       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 318       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 319
 320       <device Dname="ARMCM7">
 321         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 322         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 323       </device>
 324
 325       <device Dname="ARMCM7_SP">
 326         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 327         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 328       </device>
 329
 330       <device Dname="ARMCM7_DP">
 331         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 332         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 333       </device>
 334     </family>
 335
 336     <!-- ******************************  Cortex-M23  ********************** -->
 337     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 338       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 339       <description>
 340 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 341 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 342 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 343       </description>
 344       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 345       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 346       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 347       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 348       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 349       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 350
 351       <device Dname="ARMCM23">
 352         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 353         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 354       </device>
 355
 356       <device Dname="ARMCM23_TZ">
 357         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 358         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 359       </device>
 360     </family>
 361
 362     <!-- ******************************  Cortex-M33  ****************************** -->
 363     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 364       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 365       <description>
 366 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 367 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 368       </description>
 369       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 370       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 371       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 372       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 373       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 374       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 375
 376       <device Dname="ARMCM33">
 377         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 378         <description>
 379           no DSP Instructions, no Floating Point Unit, no TrustZone
 380         </description>
 381         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 382       </device>
 383
 384       <device Dname="ARMCM33_TZ">
 385         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 386         <description>
 387           no DSP Instructions, no Floating Point Unit, TrustZone
 388         </description>
 389         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 390       </device>
 391
 392       <device Dname="ARMCM33_DSP_FP">
 393         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 394         <description>
 395           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 396         </description>
 397         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 398       </device>
 399
 400       <device Dname="ARMCM33_DSP_FP_TZ">
 401         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 402         <description>
 403           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 404         </description>
 405         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 406       </device>
 407     </family>
 408
 409     <!-- ******************************  ARMSC000  ****************************** -->
 410     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 411       <description>
 412 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 413 - simple, easy-to-use programmers model
 414 - highly efficient ultra-low power operation
 415 - excellent code density
 416 - deterministic, high-performance interrupt handling
 417       </description>
 418       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 419       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 420       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 421       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 422
 423       <device Dname="ARMSC000">
 424         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 425         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 426       </device>
 427     </family>
 428
 429     <!-- ******************************  ARMSC300  ****************************** -->
 430     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 431       <description>
 432 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 433 - simple, easy-to-use programmers model
 434 - highly efficient ultra-low power operation
 435 - excellent code density
 436 - deterministic, high-performance interrupt handling
 437       </description>
 438       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 439       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 440       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 441       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 442
 443       <device Dname="ARMSC300">
 444         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 445         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 446       </device>
 447     </family>
 448
 449     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 450     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 451       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 452       <description>
 453 ARMv8-M Baseline based device with TrustZone
 454       </description>
 455       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 456       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 457       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 458       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 459       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 460       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 461
 462       <device Dname="ARMv8MBL">
 463         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 464         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 465       </device>
 466     </family>
 467
 468     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 469     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 470       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 471       <description>
 472 ARMv8-M Mainline based device with TrustZone
 473       </description>
 474       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 475       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 476       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 477       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 478       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 479       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 480
 481       <device Dname="ARMv8MML">
 482         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 483         <description>
 484           no DSP Instructions, no Floating Point Unit, TrustZone
 485         </description>
 486         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 487       </device>
 488
 489       <device Dname="ARMv8MML_DSP">
 490         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 491         <description>
 492           DSP Instructions, no Floating Point Unit, TrustZone
 493         </description>
 494         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 495       </device>
 496
 497       <device Dname="ARMv8MML_SP">
 498         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 499         <description>
 500           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 501         </description>
 502         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 503       </device>
 504
 505       <device Dname="ARMv8MML_DSP_SP">
 506         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 507         <description>
 508           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 509         </description>
 510         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 511       </device>
 512
 513       <device Dname="ARMv8MML_DP">
 514         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 515         <description>
 516           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 517         </description>
 518         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 519       </device>
 520
 521       <device Dname="ARMv8MML_DSP_DP">
 522         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 523         <description>
 524           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 525         </description>
 526         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 527       </device>
 528     </family>
 529
 530     <!-- ******************************  Cortex-A5  ****************************** -->
 531     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 532       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 533       <description>
 534 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 535 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 536 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 537       </description>
 538
 539       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 540       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 541
 542       <device Dname="ARMCA5">
 543         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 544         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 545       </device>
 546     </family>
 547
 548     <!-- ******************************  Cortex-A7  ****************************** -->
 549     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 550       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 551       <description>
 552 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 553 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 554 an optional integrated GIC, and an optional L2 cache controller.
 555       </description>
 556
 557       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 558       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 559
 560       <device Dname="ARMCA7">
 561         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 562         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 563       </device>
 564     </family>
 565
 566     <!-- ******************************  Cortex-A9  ****************************** -->
 567     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 568       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 569       <description>
 570 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 571 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 572 and 8-bit Java bytecodes in Jazelle state.
 573       </description>
 574
 575       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 576       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 577
 578       <device Dname="ARMCA9">
 579         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 580         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 581       </device>
 582     </family>
 583   </devices>
 584
 585
 586   <apis>
 587     <!-- CMSIS Device API -->
 588     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 589       <description>Device interrupt controller interface</description>
 590       <files>
 591         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 592       </files>
 593     </api>
 594     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
 595       <description>RTOS Kernel system tick timer interface</description>
 596       <files>
 597         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 598       </files>
 599     </api>
 600     <!-- CMSIS-RTOS API -->
 601     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 602       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 603       <files>
 604         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 605       </files>
 606     </api>
 607     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
 608       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 609       <files>
 610         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 611         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 612       </files>
 613     </api>
 614     <!-- CMSIS Driver API -->
 615     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 616       <description>USART Driver API for Cortex-M</description>
 617       <files>
 618         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 619         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 620       </files>
 621     </api>
 622     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 623       <description>SPI Driver API for Cortex-M</description>
 624       <files>
 625         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 626         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 627       </files>
 628     </api>
 629     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 630       <description>SAI Driver API for Cortex-M</description>
 631       <files>
 632         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 633         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 634       </files>
 635     </api>
 636     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 637       <description>I2C Driver API for Cortex-M</description>
 638       <files>
 639         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 640         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 641       </files>
 642     </api>
 643     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 644       <description>CAN Driver API for Cortex-M</description>
 645       <files>
 646         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 647         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 648       </files>
 649     </api>
 650     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 651       <description>Flash Driver API for Cortex-M</description>
 652       <files>
 653         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 654         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 655       </files>
 656     </api>
 657     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 658       <description>MCI Driver API for Cortex-M</description>
 659       <files>
 660         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 661         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 662       </files>
 663     </api>
 664     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 665       <description>NAND Flash Driver API for Cortex-M</description>
 666       <files>
 667         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 668         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 669       </files>
 670     </api>
 671     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 672       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 673       <files>
 674         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 675         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 676         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 677       </files>
 678     </api>
 679     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 680       <description>Ethernet MAC Driver API for Cortex-M</description>
 681       <files>
 682         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 683         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 684       </files>
 685     </api>
 686     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 687       <description>Ethernet PHY Driver API for Cortex-M</description>
 688       <files>
 689         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 690         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 691       </files>
 692     </api>
 693     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 694       <description>USB Device Driver API for Cortex-M</description>
 695       <files>
 696         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 697         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 698       </files>
 699     </api>
 700     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 701       <description>USB Host Driver API for Cortex-M</description>
 702       <files>
 703         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 704         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 705       </files>
 706     </api>
 707   </apis>
 708
 709   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 710   <conditions>
 711     <!-- compiler -->
 712     <condition id="ARMCC6">
 713       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 714       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 715     </condition>
 716     <condition id="ARMCC5">
 717       <require Tcompiler="ARMCC" Toptions="AC5"/>
 718     </condition>
 719     <condition id="ARMCC">
 720       <require Tcompiler="ARMCC"/>
 721     </condition>
 722     <condition id="GCC">
 723       <require Tcompiler="GCC"/>
 724     </condition>
 725     <condition id="IAR">
 726       <require Tcompiler="IAR"/>
 727     </condition>
 728     <condition id="ARMCC GCC">
 729       <accept Tcompiler="ARMCC"/>
 730       <accept Tcompiler="GCC"/>
 731     </condition>
 732     <condition id="ARMCC GCC IAR">
 733       <accept Tcompiler="ARMCC"/>
 734       <accept Tcompiler="GCC"/>
 735       <accept Tcompiler="IAR"/>
 736     </condition>
 737
 738     <!-- ARM architecture -->
 739     <condition id="ARMv6-M Device">
 740       <description>ARMv6-M architecture based device</description>
 741       <accept Dcore="Cortex-M0"/>
 742       <accept Dcore="Cortex-M0+"/>
 743       <accept Dcore="SC000"/>
 744     </condition>
 745     <condition id="ARMv7-M Device">
 746       <description>ARMv7-M architecture based device</description>
 747       <accept Dcore="Cortex-M3"/>
 748       <accept Dcore="Cortex-M4"/>
 749       <accept Dcore="Cortex-M7"/>
 750       <accept Dcore="SC300"/>
 751     </condition>
 752     <condition id="ARMv8-M Device">
 753       <description>ARMv8-M architecture based device</description>
 754       <accept Dcore="ARMV8MBL"/>
 755       <accept Dcore="ARMV8MML"/>
 756       <accept Dcore="Cortex-M23"/>
 757       <accept Dcore="Cortex-M33"/>
 758     </condition>
 759     <condition id="ARMv8-M TZ Device">
 760       <description>ARMv8-M architecture based device with TrustZone</description>
 761       <require condition="ARMv8-M Device"/>
 762       <require Dtz="TZ"/>
 763     </condition>
 764     <condition id="ARMv6_7-M Device">
 765       <description>ARMv6_7-M architecture based device</description>
 766       <accept condition="ARMv6-M Device"/>
 767       <accept condition="ARMv7-M Device"/>
 768     </condition>
 769     <condition id="ARMv6_7_8-M Device">
 770       <description>ARMv6_7_8-M architecture based device</description>
 771       <accept condition="ARMv6-M Device"/>
 772       <accept condition="ARMv7-M Device"/>
 773       <accept condition="ARMv8-M Device"/>
 774     </condition>
 775     <condition id="ARMv7-A Device">
 776       <description>ARMv7-A architecture based device</description>
 777       <accept Dcore="Cortex-A5"/>
 778       <accept Dcore="Cortex-A7"/>
 779       <accept Dcore="Cortex-A9"/>
 780     </condition>
 781
 782     <!-- ARM core -->
 783     <condition id="CM0">
 784       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 785       <accept Dcore="Cortex-M0"/>
 786       <accept Dcore="Cortex-M0+"/>
 787       <accept Dcore="SC000"/>
 788     </condition>
 789     <condition id="CM3">
 790       <description>Cortex-M3 or SC300 processor based device</description>
 791       <accept Dcore="Cortex-M3"/>
 792       <accept Dcore="SC300"/>
 793     </condition>
 794     <condition id="CM4">
 795       <description>Cortex-M4 processor based device</description>
 796       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 797     </condition>
 798     <condition id="CM4_FP">
 799       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 800       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 801     </condition>
 802     <condition id="CM7">
 803       <description>Cortex-M7 processor based device</description>
 804       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 805     </condition>
 806     <condition id="CM7_FP">
 807       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 808       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 809       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 810     </condition>
 811     <condition id="CM7_SP">
 812       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 813       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 814     </condition>
 815     <condition id="CM7_DP">
 816       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 817       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 818     </condition>
 819     <condition id="CM23">
 820       <description>Cortex-M23 processor based device</description>
 821       <require Dcore="Cortex-M23"/>
 822     </condition>
 823     <condition id="CM33">
 824       <description>Cortex-M33 processor based device</description>
 825       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 826     </condition>
 827     <condition id="CM33_FP">
 828       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 829       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 830     </condition>
 831     <condition id="ARMv8MBL">
 832       <description>ARMv8-M Baseline processor based device</description>
 833       <require Dcore="ARMV8MBL"/>
 834     </condition>
 835     <condition id="ARMv8MML">
 836       <description>ARMv8-M Mainline processor based device</description>
 837       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 838     </condition>
 839     <condition id="ARMv8MML_FP">
 840       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 841       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 842       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 843     </condition>
 844
 845     <condition id="CM33_NODSP_NOFPU">
 846       <description>CM33, no DSP, no FPU</description>
 847       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 848     </condition>
 849     <condition id="CM33_DSP_NOFPU">
 850       <description>CM33, DSP, no FPU</description>
 851       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 852     </condition>
 853     <condition id="CM33_NODSP_SP">
 854       <description>CM33, no DSP, SP FPU</description>
 855       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 856     </condition>
 857     <condition id="CM33_DSP_SP">
 858       <description>CM33, DSP, SP FPU</description>
 859       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 860     </condition>
 861
 862     <condition id="ARMv8MML_NODSP_NOFPU">
 863       <description>ARMv8MML, no DSP, no FPU</description>
 864       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 865     </condition>
 866     <condition id="ARMv8MML_DSP_NOFPU">
 867       <description>ARMv8MML, DSP, no FPU</description>
 868       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 869     </condition>
 870     <condition id="ARMv8MML_NODSP_SP">
 871       <description>ARMv8MML, no DSP, SP FPU</description>
 872       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 873     </condition>
 874     <condition id="ARMv8MML_DSP_SP">
 875       <description>ARMv8MML, DSP, SP FPU</description>
 876       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 877     </condition>
 878
 879     <condition id="CA5_CA9">
 880       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 881       <accept Dcore="Cortex-A5"/>
 882       <accept Dcore="Cortex-A9"/>
 883     </condition>
 884
 885     <condition id="CA7">
 886       <description>Cortex-A7 processor based device</description>
 887       <accept Dcore="Cortex-A7"/>
 888     </condition>
 889
 890     <!-- ARMCC compiler -->
 891     <condition id="CA_ARMCC5">
 892       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 893       <require condition="ARMv7-A Device"/>
 894       <require condition="ARMCC5"/>
 895     </condition>
 896     <condition id="CA_ARMCC6">
 897       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 898       <require condition="ARMv7-A Device"/>
 899       <require condition="ARMCC6"/>
 900     </condition>
 901
 902     <condition id="CM0_ARMCC">
 903       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 904       <require condition="CM0"/>
 905       <require Tcompiler="ARMCC"/>
 906     </condition>
 907     <condition id="CM0_LE_ARMCC">
 908       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 909       <require condition="CM0_ARMCC"/>
 910       <require Dendian="Little-endian"/>
 911     </condition>
 912     <condition id="CM0_BE_ARMCC">
 913       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 914       <require condition="CM0_ARMCC"/>
 915       <require Dendian="Big-endian"/>
 916     </condition>
 917
 918     <condition id="CM3_ARMCC">
 919       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 920       <require condition="CM3"/>
 921       <require Tcompiler="ARMCC"/>
 922     </condition>
 923     <condition id="CM3_LE_ARMCC">
 924       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 925       <require condition="CM3_ARMCC"/>
 926       <require Dendian="Little-endian"/>
 927     </condition>
 928     <condition id="CM3_BE_ARMCC">
 929       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 930       <require condition="CM3_ARMCC"/>
 931       <require Dendian="Big-endian"/>
 932     </condition>
 933
 934     <condition id="CM4_ARMCC">
 935       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 936       <require condition="CM4"/>
 937       <require Tcompiler="ARMCC"/>
 938     </condition>
 939     <condition id="CM4_LE_ARMCC">
 940       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 941       <require condition="CM4_ARMCC"/>
 942       <require Dendian="Little-endian"/>
 943     </condition>
 944     <condition id="CM4_BE_ARMCC">
 945       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 946       <require condition="CM4_ARMCC"/>
 947       <require Dendian="Big-endian"/>
 948     </condition>
 949
 950     <condition id="CM4_FP_ARMCC">
 951       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 952       <require condition="CM4_FP"/>
 953       <require Tcompiler="ARMCC"/>
 954     </condition>
 955     <condition id="CM4_FP_LE_ARMCC">
 956       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 957       <require condition="CM4_FP_ARMCC"/>
 958       <require Dendian="Little-endian"/>
 959     </condition>
 960     <condition id="CM4_FP_BE_ARMCC">
 961       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 962       <require condition="CM4_FP_ARMCC"/>
 963       <require Dendian="Big-endian"/>
 964     </condition>
 965
 966     <condition id="CM7_ARMCC">
 967       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 968       <require condition="CM7"/>
 969       <require Tcompiler="ARMCC"/>
 970     </condition>
 971     <condition id="CM7_LE_ARMCC">
 972       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 973       <require condition="CM7_ARMCC"/>
 974       <require Dendian="Little-endian"/>
 975     </condition>
 976     <condition id="CM7_BE_ARMCC">
 977       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 978       <require condition="CM7_ARMCC"/>
 979       <require Dendian="Big-endian"/>
 980     </condition>
 981
 982     <condition id="CM7_FP_ARMCC">
 983       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 984       <require condition="CM7_FP"/>
 985       <require Tcompiler="ARMCC"/>
 986     </condition>
 987     <condition id="CM7_FP_LE_ARMCC">
 988       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 989       <require condition="CM7_FP_ARMCC"/>
 990       <require Dendian="Little-endian"/>
 991     </condition>
 992     <condition id="CM7_FP_BE_ARMCC">
 993       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 994       <require condition="CM7_FP_ARMCC"/>
 995       <require Dendian="Big-endian"/>
 996     </condition>
 997
 998     <condition id="CM7_SP_ARMCC">
 999       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1000       <require condition="CM7_SP"/>
1001       <require Tcompiler="ARMCC"/>
1002     </condition>
1003     <condition id="CM7_SP_LE_ARMCC">
1004       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1005       <require condition="CM7_SP_ARMCC"/>
1006       <require Dendian="Little-endian"/>
1007     </condition>
1008     <condition id="CM7_SP_BE_ARMCC">
1009       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1010       <require condition="CM7_SP_ARMCC"/>
1011       <require Dendian="Big-endian"/>
1012     </condition>
1013
1014     <condition id="CM7_DP_ARMCC">
1015       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1016       <require condition="CM7_DP"/>
1017       <require Tcompiler="ARMCC"/>
1018     </condition>
1019     <condition id="CM7_DP_LE_ARMCC">
1020       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1021       <require condition="CM7_DP_ARMCC"/>
1022       <require Dendian="Little-endian"/>
1023     </condition>
1024     <condition id="CM7_DP_BE_ARMCC">
1025       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1026       <require condition="CM7_DP_ARMCC"/>
1027       <require Dendian="Big-endian"/>
1028     </condition>
1029
1030     <condition id="CM23_ARMCC">
1031       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1032       <require condition="CM23"/>
1033       <require Tcompiler="ARMCC"/>
1034     </condition>
1035     <condition id="CM23_LE_ARMCC">
1036       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1037       <require condition="CM23_ARMCC"/>
1038       <require Dendian="Little-endian"/>
1039     </condition>
1040     <condition id="CM23_BE_ARMCC">
1041       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1042       <require condition="CM23_ARMCC"/>
1043       <require Dendian="Big-endian"/>
1044     </condition>
1045
1046     <condition id="CM33_ARMCC">
1047       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1048       <require condition="CM33"/>
1049       <require Tcompiler="ARMCC"/>
1050     </condition>
1051     <condition id="CM33_LE_ARMCC">
1052       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1053       <require condition="CM33_ARMCC"/>
1054       <require Dendian="Little-endian"/>
1055     </condition>
1056     <condition id="CM33_BE_ARMCC">
1057       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1058       <require condition="CM33_ARMCC"/>
1059       <require Dendian="Big-endian"/>
1060     </condition>
1061
1062     <condition id="CM33_FP_ARMCC">
1063       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1064       <require condition="CM33_FP"/>
1065       <require Tcompiler="ARMCC"/>
1066     </condition>
1067     <condition id="CM33_FP_LE_ARMCC">
1068       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1069       <require condition="CM33_FP_ARMCC"/>
1070       <require Dendian="Little-endian"/>
1071     </condition>
1072     <condition id="CM33_FP_BE_ARMCC">
1073       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1074       <require condition="CM33_FP_ARMCC"/>
1075       <require Dendian="Big-endian"/>
1076     </condition>
1077
1078     <condition id="CM33_NODSP_NOFPU_ARMCC">
1079       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1080       <require condition="CM33_NODSP_NOFPU"/>
1081       <require Tcompiler="ARMCC"/>
1082     </condition>
1083     <condition id="CM33_DSP_NOFPU_ARMCC">
1084       <description>CM33, DSP, no FPU, ARM Compiler</description>
1085       <require condition="CM33_DSP_NOFPU"/>
1086       <require Tcompiler="ARMCC"/>
1087     </condition>
1088     <condition id="CM33_NODSP_SP_ARMCC">
1089       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1090       <require condition="CM33_NODSP_SP"/>
1091       <require Tcompiler="ARMCC"/>
1092     </condition>
1093     <condition id="CM33_DSP_SP_ARMCC">
1094       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1095       <require condition="CM33_DSP_SP"/>
1096       <require Tcompiler="ARMCC"/>
1097     </condition>
1098     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1099       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1100       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1101       <require Dendian="Little-endian"/>
1102     </condition>
1103     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1104       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1105       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1106       <require Dendian="Little-endian"/>
1107     </condition>
1108     <condition id="CM33_NODSP_SP_LE_ARMCC">
1109       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1110       <require condition="CM33_NODSP_SP_ARMCC"/>
1111       <require Dendian="Little-endian"/>
1112     </condition>
1113     <condition id="CM33_DSP_SP_LE_ARMCC">
1114       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1115       <require condition="CM33_DSP_SP_ARMCC"/>
1116       <require Dendian="Little-endian"/>
1117     </condition>
1118
1119     <condition id="ARMv8MBL_ARMCC">
1120       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1121       <require condition="ARMv8MBL"/>
1122       <require Tcompiler="ARMCC"/>
1123     </condition>
1124     <condition id="ARMv8MBL_LE_ARMCC">
1125       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1126       <require condition="ARMv8MBL_ARMCC"/>
1127       <require Dendian="Little-endian"/>
1128     </condition>
1129     <condition id="ARMv8MBL_BE_ARMCC">
1130       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1131       <require condition="ARMv8MBL_ARMCC"/>
1132       <require Dendian="Big-endian"/>
1133     </condition>
1134
1135     <condition id="ARMv8MML_ARMCC">
1136       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1137       <require condition="ARMv8MML"/>
1138       <require Tcompiler="ARMCC"/>
1139     </condition>
1140     <condition id="ARMv8MML_LE_ARMCC">
1141       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1142       <require condition="ARMv8MML_ARMCC"/>
1143       <require Dendian="Little-endian"/>
1144     </condition>
1145     <condition id="ARMv8MML_BE_ARMCC">
1146       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1147       <require condition="ARMv8MML_ARMCC"/>
1148       <require Dendian="Big-endian"/>
1149     </condition>
1150
1151     <condition id="ARMv8MML_FP_ARMCC">
1152       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1153       <require condition="ARMv8MML_FP"/>
1154       <require Tcompiler="ARMCC"/>
1155     </condition>
1156     <condition id="ARMv8MML_FP_LE_ARMCC">
1157       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1158       <require condition="ARMv8MML_FP_ARMCC"/>
1159       <require Dendian="Little-endian"/>
1160     </condition>
1161     <condition id="ARMv8MML_FP_BE_ARMCC">
1162       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1163       <require condition="ARMv8MML_FP_ARMCC"/>
1164       <require Dendian="Big-endian"/>
1165     </condition>
1166
1167     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1168       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1169       <require condition="ARMv8MML_NODSP_NOFPU"/>
1170       <require Tcompiler="ARMCC"/>
1171     </condition>
1172     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1173       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1174       <require condition="ARMv8MML_DSP_NOFPU"/>
1175       <require Tcompiler="ARMCC"/>
1176     </condition>
1177     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1178       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1179       <require condition="ARMv8MML_NODSP_SP"/>
1180       <require Tcompiler="ARMCC"/>
1181     </condition>
1182     <condition id="ARMv8MML_DSP_SP_ARMCC">
1183       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1184       <require condition="ARMv8MML_DSP_SP"/>
1185       <require Tcompiler="ARMCC"/>
1186     </condition>
1187     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1188       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1189       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1190       <require Dendian="Little-endian"/>
1191     </condition>
1192     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1193       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1194       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1195       <require Dendian="Little-endian"/>
1196     </condition>
1197     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1198       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1199       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1200       <require Dendian="Little-endian"/>
1201     </condition>
1202     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1203       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1204       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1205       <require Dendian="Little-endian"/>
1206     </condition>
1207
1208     <!-- GCC compiler -->
1209     <condition id="CA_GCC">
1210       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1211       <require condition="ARMv7-A Device"/>
1212       <require Tcompiler="GCC"/>
1213     </condition>
1214
1215     <condition id="CM0_GCC">
1216       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1217       <require condition="CM0"/>
1218       <require Tcompiler="GCC"/>
1219     </condition>
1220     <condition id="CM0_LE_GCC">
1221       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1222       <require condition="CM0_GCC"/>
1223       <require Dendian="Little-endian"/>
1224     </condition>
1225     <condition id="CM0_BE_GCC">
1226       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1227       <require condition="CM0_GCC"/>
1228       <require Dendian="Big-endian"/>
1229     </condition>
1230
1231     <condition id="CM3_GCC">
1232       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1233       <require condition="CM3"/>
1234       <require Tcompiler="GCC"/>
1235     </condition>
1236     <condition id="CM3_LE_GCC">
1237       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1238       <require condition="CM3_GCC"/>
1239       <require Dendian="Little-endian"/>
1240     </condition>
1241     <condition id="CM3_BE_GCC">
1242       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1243       <require condition="CM3_GCC"/>
1244       <require Dendian="Big-endian"/>
1245     </condition>
1246
1247     <condition id="CM4_GCC">
1248       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1249       <require condition="CM4"/>
1250       <require Tcompiler="GCC"/>
1251     </condition>
1252     <condition id="CM4_LE_GCC">
1253       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1254       <require condition="CM4_GCC"/>
1255       <require Dendian="Little-endian"/>
1256     </condition>
1257     <condition id="CM4_BE_GCC">
1258       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1259       <require condition="CM4_GCC"/>
1260       <require Dendian="Big-endian"/>
1261     </condition>
1262
1263     <condition id="CM4_FP_GCC">
1264       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1265       <require condition="CM4_FP"/>
1266       <require Tcompiler="GCC"/>
1267     </condition>
1268     <condition id="CM4_FP_LE_GCC">
1269       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1270       <require condition="CM4_FP_GCC"/>
1271       <require Dendian="Little-endian"/>
1272     </condition>
1273     <condition id="CM4_FP_BE_GCC">
1274       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1275       <require condition="CM4_FP_GCC"/>
1276       <require Dendian="Big-endian"/>
1277     </condition>
1278
1279     <condition id="CM7_GCC">
1280       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1281       <require condition="CM7"/>
1282       <require Tcompiler="GCC"/>
1283     </condition>
1284     <condition id="CM7_LE_GCC">
1285       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1286       <require condition="CM7_GCC"/>
1287       <require Dendian="Little-endian"/>
1288     </condition>
1289     <condition id="CM7_BE_GCC">
1290       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1291       <require condition="CM7_GCC"/>
1292       <require Dendian="Big-endian"/>
1293     </condition>
1294
1295     <condition id="CM7_FP_GCC">
1296       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1297       <require condition="CM7_FP"/>
1298       <require Tcompiler="GCC"/>
1299     </condition>
1300     <condition id="CM7_FP_LE_GCC">
1301       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1302       <require condition="CM7_FP_GCC"/>
1303       <require Dendian="Little-endian"/>
1304     </condition>
1305     <condition id="CM7_FP_BE_GCC">
1306       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1307       <require condition="CM7_FP_GCC"/>
1308       <require Dendian="Big-endian"/>
1309     </condition>
1310
1311     <condition id="CM7_SP_GCC">
1312       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1313       <require condition="CM7_SP"/>
1314       <require Tcompiler="GCC"/>
1315     </condition>
1316     <condition id="CM7_SP_LE_GCC">
1317       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1318       <require condition="CM7_SP_GCC"/>
1319       <require Dendian="Little-endian"/>
1320     </condition>
1321     <condition id="CM7_SP_BE_GCC">
1322       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1323       <require condition="CM7_SP_GCC"/>
1324       <require Dendian="Big-endian"/>
1325     </condition>
1326
1327     <condition id="CM7_DP_GCC">
1328       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1329       <require condition="CM7_DP"/>
1330       <require Tcompiler="GCC"/>
1331     </condition>
1332     <condition id="CM7_DP_LE_GCC">
1333       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1334       <require condition="CM7_DP_GCC"/>
1335       <require Dendian="Little-endian"/>
1336     </condition>
1337     <condition id="CM7_DP_BE_GCC">
1338       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1339       <require condition="CM7_DP_GCC"/>
1340       <require Dendian="Big-endian"/>
1341     </condition>
1342
1343     <condition id="CM23_GCC">
1344       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1345       <require condition="CM23"/>
1346       <require Tcompiler="GCC"/>
1347     </condition>
1348     <condition id="CM23_LE_GCC">
1349       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1350       <require condition="CM23_GCC"/>
1351       <require Dendian="Little-endian"/>
1352     </condition>
1353     <condition id="CM23_BE_GCC">
1354       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1355       <require condition="CM23_GCC"/>
1356       <require Dendian="Big-endian"/>
1357     </condition>
1358
1359     <condition id="CM33_GCC">
1360       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1361       <require condition="CM33"/>
1362       <require Tcompiler="GCC"/>
1363     </condition>
1364     <condition id="CM33_LE_GCC">
1365       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1366       <require condition="CM33_GCC"/>
1367       <require Dendian="Little-endian"/>
1368     </condition>
1369     <condition id="CM33_BE_GCC">
1370       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1371       <require condition="CM33_GCC"/>
1372       <require Dendian="Big-endian"/>
1373     </condition>
1374
1375     <condition id="CM33_FP_GCC">
1376       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1377       <require condition="CM33_FP"/>
1378       <require Tcompiler="GCC"/>
1379     </condition>
1380     <condition id="CM33_FP_LE_GCC">
1381       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1382       <require condition="CM33_FP_GCC"/>
1383       <require Dendian="Little-endian"/>
1384     </condition>
1385     <condition id="CM33_FP_BE_GCC">
1386       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1387       <require condition="CM33_FP_GCC"/>
1388       <require Dendian="Big-endian"/>
1389     </condition>
1390
1391     <condition id="CM33_NODSP_NOFPU_GCC">
1392       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1393       <require condition="CM33_NODSP_NOFPU"/>
1394       <require Tcompiler="GCC"/>
1395     </condition>
1396     <condition id="CM33_DSP_NOFPU_GCC">
1397       <description>CM33, DSP, no FPU, GCC Compiler</description>
1398       <require condition="CM33_DSP_NOFPU"/>
1399       <require Tcompiler="GCC"/>
1400     </condition>
1401     <condition id="CM33_NODSP_SP_GCC">
1402       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1403       <require condition="CM33_NODSP_SP"/>
1404       <require Tcompiler="GCC"/>
1405     </condition>
1406     <condition id="CM33_DSP_SP_GCC">
1407       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1408       <require condition="CM33_DSP_SP"/>
1409       <require Tcompiler="GCC"/>
1410     </condition>
1411     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1412       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1413       <require condition="CM33_NODSP_NOFPU_GCC"/>
1414       <require Dendian="Little-endian"/>
1415     </condition>
1416     <condition id="CM33_DSP_NOFPU_LE_GCC">
1417       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1418       <require condition="CM33_DSP_NOFPU_GCC"/>
1419       <require Dendian="Little-endian"/>
1420     </condition>
1421     <condition id="CM33_NODSP_SP_LE_GCC">
1422       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1423       <require condition="CM33_NODSP_SP_GCC"/>
1424       <require Dendian="Little-endian"/>
1425     </condition>
1426     <condition id="CM33_DSP_SP_LE_GCC">
1427       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1428       <require condition="CM33_DSP_SP_GCC"/>
1429       <require Dendian="Little-endian"/>
1430     </condition>
1431
1432     <condition id="ARMv8MBL_GCC">
1433       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1434       <require condition="ARMv8MBL"/>
1435       <require Tcompiler="GCC"/>
1436     </condition>
1437     <condition id="ARMv8MBL_LE_GCC">
1438       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1439       <require condition="ARMv8MBL_GCC"/>
1440       <require Dendian="Little-endian"/>
1441     </condition>
1442     <condition id="ARMv8MBL_BE_GCC">
1443       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1444       <require condition="ARMv8MBL_GCC"/>
1445       <require Dendian="Big-endian"/>
1446     </condition>
1447
1448     <condition id="ARMv8MML_GCC">
1449       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1450       <require condition="ARMv8MML"/>
1451       <require Tcompiler="GCC"/>
1452     </condition>
1453     <condition id="ARMv8MML_LE_GCC">
1454       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1455       <require condition="ARMv8MML_GCC"/>
1456       <require Dendian="Little-endian"/>
1457     </condition>
1458     <condition id="ARMv8MML_BE_GCC">
1459       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1460       <require condition="ARMv8MML_GCC"/>
1461       <require Dendian="Big-endian"/>
1462     </condition>
1463
1464     <condition id="ARMv8MML_FP_GCC">
1465       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1466       <require condition="ARMv8MML_FP"/>
1467       <require Tcompiler="GCC"/>
1468     </condition>
1469     <condition id="ARMv8MML_FP_LE_GCC">
1470       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1471       <require condition="ARMv8MML_FP_GCC"/>
1472       <require Dendian="Little-endian"/>
1473     </condition>
1474     <condition id="ARMv8MML_FP_BE_GCC">
1475       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1476       <require condition="ARMv8MML_FP_GCC"/>
1477       <require Dendian="Big-endian"/>
1478     </condition>
1479
1480     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1481       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1482       <require condition="ARMv8MML_NODSP_NOFPU"/>
1483       <require Tcompiler="GCC"/>
1484     </condition>
1485     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1486       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1487       <require condition="ARMv8MML_DSP_NOFPU"/>
1488       <require Tcompiler="GCC"/>
1489     </condition>
1490     <condition id="ARMv8MML_NODSP_SP_GCC">
1491       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1492       <require condition="ARMv8MML_NODSP_SP"/>
1493       <require Tcompiler="GCC"/>
1494     </condition>
1495     <condition id="ARMv8MML_DSP_SP_GCC">
1496       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1497       <require condition="ARMv8MML_DSP_SP"/>
1498       <require Tcompiler="GCC"/>
1499     </condition>
1500     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1501       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1502       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1503       <require Dendian="Little-endian"/>
1504     </condition>
1505     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1506       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1507       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1508       <require Dendian="Little-endian"/>
1509     </condition>
1510     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1511       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1512       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1513       <require Dendian="Little-endian"/>
1514     </condition>
1515     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1516       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1517       <require condition="ARMv8MML_DSP_SP_GCC"/>
1518       <require Dendian="Little-endian"/>
1519     </condition>
1520
1521     <!-- IAR compiler -->
1522     <condition id="CA_IAR">
1523       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1524       <require condition="ARMv7-A Device"/>
1525       <require Tcompiler="IAR"/>
1526     </condition>
1527
1528     <condition id="CM0_IAR">
1529       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1530       <require condition="CM0"/>
1531       <require Tcompiler="IAR"/>
1532     </condition>
1533     <condition id="CM0_LE_IAR">
1534       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1535       <require condition="CM0_IAR"/>
1536       <require Dendian="Little-endian"/>
1537     </condition>
1538     <condition id="CM0_BE_IAR">
1539       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1540       <require condition="CM0_IAR"/>
1541       <require Dendian="Big-endian"/>
1542     </condition>
1543
1544     <condition id="CM3_IAR">
1545       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1546       <require condition="CM3"/>
1547       <require Tcompiler="IAR"/>
1548     </condition>
1549     <condition id="CM3_LE_IAR">
1550       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1551       <require condition="CM3_IAR"/>
1552       <require Dendian="Little-endian"/>
1553     </condition>
1554     <condition id="CM3_BE_IAR">
1555       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1556       <require condition="CM3_IAR"/>
1557       <require Dendian="Big-endian"/>
1558     </condition>
1559
1560     <condition id="CM4_IAR">
1561       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1562       <require condition="CM4"/>
1563       <require Tcompiler="IAR"/>
1564     </condition>
1565     <condition id="CM4_LE_IAR">
1566       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1567       <require condition="CM4_IAR"/>
1568       <require Dendian="Little-endian"/>
1569     </condition>
1570     <condition id="CM4_BE_IAR">
1571       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1572       <require condition="CM4_IAR"/>
1573       <require Dendian="Big-endian"/>
1574     </condition>
1575
1576     <condition id="CM4_FP_IAR">
1577       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1578       <require condition="CM4_FP"/>
1579       <require Tcompiler="IAR"/>
1580     </condition>
1581     <condition id="CM4_FP_LE_IAR">
1582       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1583       <require condition="CM4_FP_IAR"/>
1584       <require Dendian="Little-endian"/>
1585     </condition>
1586     <condition id="CM4_FP_BE_IAR">
1587       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1588       <require condition="CM4_FP_IAR"/>
1589       <require Dendian="Big-endian"/>
1590     </condition>
1591
1592     <condition id="CM7_IAR">
1593       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1594       <require condition="CM7"/>
1595       <require Tcompiler="IAR"/>
1596     </condition>
1597     <condition id="CM7_LE_IAR">
1598       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1599       <require condition="CM7_IAR"/>
1600       <require Dendian="Little-endian"/>
1601     </condition>
1602     <condition id="CM7_BE_IAR">
1603       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1604       <require condition="CM7_IAR"/>
1605       <require Dendian="Big-endian"/>
1606     </condition>
1607
1608     <condition id="CM7_FP_IAR">
1609       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1610       <require condition="CM7_FP"/>
1611       <require Tcompiler="IAR"/>
1612     </condition>
1613     <condition id="CM7_FP_LE_IAR">
1614       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1615       <require condition="CM7_FP_IAR"/>
1616       <require Dendian="Little-endian"/>
1617     </condition>
1618     <condition id="CM7_FP_BE_IAR">
1619       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1620       <require condition="CM7_FP_IAR"/>
1621       <require Dendian="Big-endian"/>
1622     </condition>
1623
1624     <condition id="CM7_SP_IAR">
1625       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1626       <require condition="CM7_SP"/>
1627       <require Tcompiler="IAR"/>
1628     </condition>
1629     <condition id="CM7_SP_LE_IAR">
1630       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1631       <require condition="CM7_SP_IAR"/>
1632       <require Dendian="Little-endian"/>
1633     </condition>
1634     <condition id="CM7_SP_BE_IAR">
1635       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1636       <require condition="CM7_SP_IAR"/>
1637       <require Dendian="Big-endian"/>
1638     </condition>
1639
1640     <condition id="CM7_DP_IAR">
1641       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1642       <require condition="CM7_DP"/>
1643       <require Tcompiler="IAR"/>
1644     </condition>
1645     <condition id="CM7_DP_LE_IAR">
1646       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1647       <require condition="CM7_DP_IAR"/>
1648       <require Dendian="Little-endian"/>
1649     </condition>
1650     <condition id="CM7_DP_BE_IAR">
1651       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1652       <require condition="CM7_DP_IAR"/>
1653       <require Dendian="Big-endian"/>
1654     </condition>
1655
1656     <!-- conditions selecting single devices and CMSIS Core -->
1657     <!-- used for component startup, GCC version is used for C-Startup -->
1658     <condition id="ARMCM0 CMSIS">
1659       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1660       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1661       <require Cclass="CMSIS" Cgroup="CORE"/>
1662     </condition>
1663     <condition id="ARMCM0 CMSIS GCC">
1664       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1665       <require condition="ARMCM0 CMSIS"/>
1666       <require condition="GCC"/>
1667     </condition>
1668
1669     <condition id="ARMCM0+ CMSIS">
1670       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1671       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1672       <require Cclass="CMSIS" Cgroup="CORE"/>
1673     </condition>
1674     <condition id="ARMCM0+ CMSIS GCC">
1675       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1676       <require condition="ARMCM0+ CMSIS"/>
1677       <require condition="GCC"/>
1678     </condition>
1679
1680     <condition id="ARMCM3 CMSIS">
1681       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1682       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1683       <require Cclass="CMSIS" Cgroup="CORE"/>
1684     </condition>
1685     <condition id="ARMCM3 CMSIS GCC">
1686       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1687       <require condition="ARMCM3 CMSIS"/>
1688       <require condition="GCC"/>
1689     </condition>
1690
1691     <condition id="ARMCM4 CMSIS">
1692       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1693       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1694       <require Cclass="CMSIS" Cgroup="CORE"/>
1695     </condition>
1696     <condition id="ARMCM4 CMSIS GCC">
1697       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1698       <require condition="ARMCM4 CMSIS"/>
1699       <require condition="GCC"/>
1700     </condition>
1701
1702     <condition id="ARMCM7 CMSIS">
1703       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1704       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1705       <require Cclass="CMSIS" Cgroup="CORE"/>
1706     </condition>
1707     <condition id="ARMCM7 CMSIS GCC">
1708       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1709       <require condition="ARMCM7 CMSIS"/>
1710       <require condition="GCC"/>
1711     </condition>
1712
1713     <condition id="ARMCM23 CMSIS">
1714       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1715       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1716       <require Cclass="CMSIS" Cgroup="CORE"/>
1717     </condition>
1718     <condition id="ARMCM23 CMSIS GCC">
1719       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1720       <require condition="ARMCM23 CMSIS"/>
1721       <require condition="GCC"/>
1722     </condition>
1723
1724     <condition id="ARMCM33 CMSIS">
1725       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1726       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1727       <require Cclass="CMSIS" Cgroup="CORE"/>
1728     </condition>
1729     <condition id="ARMCM33 CMSIS GCC">
1730       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1731       <require condition="ARMCM33 CMSIS"/>
1732       <require condition="GCC"/>
1733     </condition>
1734
1735     <condition id="ARMSC000 CMSIS">
1736       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1737       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1738       <require Cclass="CMSIS" Cgroup="CORE"/>
1739     </condition>
1740     <condition id="ARMSC000 CMSIS GCC">
1741       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1742       <require condition="ARMSC000 CMSIS"/>
1743       <require condition="GCC"/>
1744     </condition>
1745
1746     <condition id="ARMSC300 CMSIS">
1747       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1748       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1749       <require Cclass="CMSIS" Cgroup="CORE"/>
1750     </condition>
1751     <condition id="ARMSC300 CMSIS GCC">
1752       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1753       <require condition="ARMSC300 CMSIS"/>
1754       <require condition="GCC"/>
1755     </condition>
1756
1757     <condition id="ARMv8MBL CMSIS">
1758       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1759       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1760       <require Cclass="CMSIS" Cgroup="CORE"/>
1761     </condition>
1762     <condition id="ARMv8MBL CMSIS GCC">
1763       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1764       <require condition="ARMv8MBL CMSIS"/>
1765       <require condition="GCC"/>
1766     </condition>
1767
1768     <condition id="ARMv8MML CMSIS">
1769       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1770       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1771       <require Cclass="CMSIS" Cgroup="CORE"/>
1772     </condition>
1773     <condition id="ARMv8MML CMSIS GCC">
1774       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1775       <require condition="ARMv8MML CMSIS"/>
1776       <require condition="GCC"/>
1777     </condition>
1778
1779     <condition id="ARMCA5 CMSIS">
1780       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1781       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1782       <require Cclass="CMSIS" Cgroup="CORE"/>
1783     </condition>
1784
1785     <condition id="ARMCA7 CMSIS">
1786       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1787       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1788       <require Cclass="CMSIS" Cgroup="CORE"/>
1789     </condition>
1790
1791     <condition id="ARMCA9 CMSIS">
1792       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1793       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1794       <require Cclass="CMSIS" Cgroup="CORE"/>
1795     </condition>
1796
1797     <!-- CMSIS DSP -->
1798     <condition id="CMSIS DSP">
1799       <description>Components required for DSP</description>
1800       <require condition="ARMv6_7_8-M Device"/>
1801       <require condition="ARMCC GCC"/>
1802       <require Cclass="CMSIS" Cgroup="CORE"/>
1803     </condition>
1804
1805     <!-- RTOS RTX -->
1806     <condition id="RTOS RTX">
1807       <description>Components required for RTOS RTX</description>
1808       <require condition="ARMv6_7-M Device"/>
1809       <require condition="ARMCC GCC IAR"/>
1810       <require Cclass="Device" Cgroup="Startup"/>
1811       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1812     </condition>
1813     <condition id="RTOS RTX IFX">
1814       <description>Components required for RTOS RTX IFX</description>
1815       <require condition="ARMv6_7-M Device"/>
1816       <require condition="ARMCC GCC IAR"/>
1817       <require Dvendor="Infineon:7" Dname="XMC4*"/>
1818       <require Cclass="Device" Cgroup="Startup"/>
1819       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1820     </condition>
1821     <condition id="RTOS RTX5">
1822       <description>Components required for RTOS RTX5</description>
1823       <require condition="ARMv6_7_8-M Device"/>
1824       <require condition="ARMCC GCC IAR"/>
1825       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1826     </condition>
1827     <condition id="RTOS2 RTX5">
1828       <description>Components required for RTOS2 RTX5</description>
1829       <require condition="ARMv6_7_8-M Device"/>
1830       <require condition="ARMCC GCC IAR"/>
1831       <require Cclass="CMSIS"  Cgroup="CORE"/>
1832       <require Cclass="Device" Cgroup="Startup"/>
1833     </condition>
1834     <condition id="RTOS2 RTX5 v7-A">
1835       <description>Components required for RTOS2 RTX5 v7-A</description>
1836       <require condition="ARMv7-A Device"/>
1837       <require condition="ARMCC GCC IAR"/>
1838       <require Cclass="CMSIS"  Cgroup="CORE"/>
1839       <require Cclass="Device" Cgroup="Startup"/>
1840       <require Cclass="Device" Cgroup="OS Tick"/>
1841       <require Cclass="Device" Cgroup="IRQ Controller"/>
1842     </condition>
1843     <condition id="RTOS2 RTX5 Lib">
1844       <description>Components required for RTOS2 RTX5 Library</description>
1845       <require condition="ARMv6_7_8-M Device"/>
1846       <require condition="ARMCC GCC IAR"/>
1847       <require Cclass="CMSIS"  Cgroup="CORE"/>
1848       <require Cclass="Device" Cgroup="Startup"/>
1849     </condition>
1850     <condition id="RTOS2 RTX5 NS">
1851       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1852       <require condition="ARMv8-M TZ Device"/>
1853       <require condition="ARMCC GCC"/>
1854       <require Cclass="CMSIS"  Cgroup="CORE"/>
1855       <require Cclass="Device" Cgroup="Startup"/>
1856     </condition>
1857
1858     <!-- OS Tick -->
1859     <condition id="OS Tick PTIM">
1860       <description>Components required for OS Tick Private Timer</description>
1861       <require condition="CA5_CA9"/>
1862       <require Cclass="Device" Cgroup="IRQ Controller"/>
1863     </condition>
1864
1865     <condition id="OS Tick GTIM">
1866       <description>Components required for OS Tick Generic Physical Timer</description>
1867       <require condition="CA7"/>
1868       <require Cclass="Device" Cgroup="IRQ Controller"/>
1869     </condition>
1870
1871   </conditions>
1872
1873   <components>
1874     <!-- CMSIS-Core component -->
1875     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2"  condition="ARMv6_7_8-M Device" >
1876       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1877       <files>
1878         <!-- CPU independent -->
1879         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1880         <file category="include" name="CMSIS/Include/"/>
1881         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1882         <!-- Code template -->
1883         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1884         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1885       </files>
1886     </component>
1887
1888     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.1"  condition="ARMv7-A Device" >
1889       <description>CMSIS-CORE for Cortex-A</description>
1890       <files>
1891         <!-- CPU independent -->
1892         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1893         <file category="include" name="CMSIS/Core_A/Include/"/>
1894       </files>
1895     </component>
1896
1897     <!-- CMSIS-Startup components -->
1898     <!-- Cortex-M0 -->
1899     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1900       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1901       <files>
1902         <!-- include folder / device header file -->
1903         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1904         <!-- startup / system file -->
1905         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1906         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1907         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1908         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1909         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1910       </files>
1911     </component>
1912     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1913       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1914       <files>
1915         <!-- include folder / device header file -->
1916         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1917         <!-- startup / system file -->
1918         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1919         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1920         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1921       </files>
1922     </component>
1923
1924     <!-- Cortex-M0+ -->
1925     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1926       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1927       <files>
1928         <!-- include folder / device header file -->
1929         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1930         <!-- startup / system file -->
1931         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1932         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1933         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1934         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1935         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1936       </files>
1937     </component>
1938     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1939       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1940       <files>
1941         <!-- include folder / device header file -->
1942         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1943         <!-- startup / system file -->
1944         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1945         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1946         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1947       </files>
1948     </component>
1949
1950     <!-- Cortex-M3 -->
1951     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1952       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1953       <files>
1954         <!-- include folder / device header file -->
1955         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1956         <!-- startup / system file -->
1957         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1958         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1959         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1960         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1961         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1962       </files>
1963     </component>
1964     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1965       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1966       <files>
1967         <!-- include folder / device header file -->
1968         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1969         <!-- startup / system file -->
1970         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1971         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1972         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1973       </files>
1974     </component>
1975
1976     <!-- Cortex-M4 -->
1977     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1978       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1979       <files>
1980         <!-- include folder / device header file -->
1981         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1982         <!-- startup / system file -->
1983         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1984         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1985         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1986         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1987         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1988       </files>
1989     </component>
1990     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1991       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1992       <files>
1993         <!-- include folder / device header file -->
1994         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1995         <!-- startup / system file -->
1996         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1997         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1998         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1999       </files>
2000     </component>
2001
2002     <!-- Cortex-M7 -->
2003     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2004       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2005       <files>
2006         <!-- include folder / device header file -->
2007         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2008         <!-- startup / system file -->
2009         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2010         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2011         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2012         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2013         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2014       </files>
2015     </component>
2016     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2017       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2018       <files>
2019         <!-- include folder / device header file -->
2020         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2021         <!-- startup / system file -->
2022         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2023         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2024         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2025       </files>
2026     </component>
2027
2028     <!-- Cortex-M23 -->
2029     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2030       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2031       <files>
2032         <!-- include folder / device header file -->
2033         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2034         <!-- startup / system file -->
2035         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2036         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2037         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2038         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2039         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2040         <!-- SAU configuration -->
2041         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2042       </files>
2043     </component>
2044     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2045       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2046       <files>
2047         <!-- include folder / device header file -->
2048         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2049         <!-- startup / system file -->
2050         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2051         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2052         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2053         <!-- SAU configuration -->
2054         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2055       </files>
2056     </component>
2057
2058     <!-- Cortex-M33 -->
2059     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2060       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2061       <files>
2062         <!-- include folder / device header file -->
2063         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2064         <!-- startup / system file -->
2065         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2066         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2067         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2068         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2069         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2070         <!-- SAU configuration -->
2071         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2072       </files>
2073     </component>
2074     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2075       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2076       <files>
2077         <!-- include folder / device header file -->
2078         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2079         <!-- startup / system file -->
2080         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2081         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2082         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2083         <!-- SAU configuration -->
2084         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2085       </files>
2086     </component>
2087
2088     <!-- Cortex-SC000 -->
2089     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2090       <description>System and Startup for Generic ARM SC000 device</description>
2091       <files>
2092         <!-- include folder / device header file -->
2093         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2094         <!-- startup / system file -->
2095         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2096         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2097         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2098         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2099         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2100       </files>
2101     </component>
2102     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2103       <description>System and Startup for Generic ARM SC000 device</description>
2104       <files>
2105         <!-- include folder / device header file -->
2106         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2107         <!-- startup / system file -->
2108         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2109         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2110         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2111       </files>
2112     </component>
2113
2114     <!-- Cortex-SC300 -->
2115     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2116       <description>System and Startup for Generic ARM SC300 device</description>
2117       <files>
2118         <!-- include folder / device header file -->
2119         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2120         <!-- startup / system file -->
2121         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2122         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2123         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2124         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2125         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2126       </files>
2127     </component>
2128     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2129       <description>System and Startup for Generic ARM SC300 device</description>
2130       <files>
2131         <!-- include folder / device header file -->
2132         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2133         <!-- startup / system file -->
2134         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2135         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2136         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2137       </files>
2138     </component>
2139
2140     <!-- ARMv8MBL -->
2141     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2142       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2143       <files>
2144         <!-- include folder / device header file -->
2145         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2146         <!-- startup / system file -->
2147         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2148         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2149         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2150         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2151         <!-- SAU configuration -->
2152         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2153       </files>
2154     </component>
2155     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2156       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2157       <files>
2158         <!-- include folder / device header file -->
2159         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2160         <!-- startup / system file -->
2161         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2162         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2163         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2164         <!-- SAU configuration -->
2165         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2166       </files>
2167     </component>
2168
2169     <!-- ARMv8MML -->
2170     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2171       <description>System and Startup for Generic ARM ARMv8MML device</description>
2172       <files>
2173         <!-- include folder / device header file -->
2174         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2175         <!-- startup / system file -->
2176         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2177         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2178         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2179         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2180         <!-- SAU configuration -->
2181         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2182       </files>
2183     </component>
2184     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2185       <description>System and Startup for Generic ARM ARMv8MML device</description>
2186       <files>
2187         <!-- include folder / device header file -->
2188         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2189         <!-- startup / system file -->
2190         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2191         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2192         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2193         <!-- SAU configuration -->
2194         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2195       </files>
2196     </component>
2197
2198     <!-- Cortex-A5 -->
2199     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2200       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2201       <files>
2202         <!-- include folder / device header file -->
2203         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2204         <!-- startup / system / mmu files -->
2205         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2206         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2207         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2208         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2209         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2210         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2211         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2212         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2213         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2214         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2215
2216       </files>
2217     </component>
2218
2219     <!-- Cortex-A7 -->
2220     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2221       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2222       <files>
2223         <!-- include folder / device header file -->
2224         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2225         <!-- startup / system / mmu files -->
2226         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2227         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2228         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2229         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2230         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2231         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2232         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2233         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2234         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2235         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2236       </files>
2237     </component>
2238
2239     <!-- Cortex-A9 -->
2240     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2241       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2242       <files>
2243         <!-- include folder / device header file -->
2244         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2245         <!-- startup / system / mmu files -->
2246         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2247         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2248         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2249         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2250         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2251         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2252         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2253         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2254         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2255         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2256       </files>
2257     </component>
2258
2259     <!-- IRQ Controller -->
2260     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2261       <description>IRQ Controller implementation using GIC</description>
2262       <files>
2263         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2264       </files>
2265     </component>
2266
2267     <!-- OS Tick -->
2268     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
2269       <description>OS Tick implementation using Private Timer</description>
2270       <files>
2271         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2272       </files>
2273     </component>
2274
2275     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2276       <description>OS Tick implementation using Generic Physical Timer</description>
2277       <files>
2278         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2279       </files>
2280     </component>
2281
2282     <!-- CMSIS-DSP component -->
2283     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2284       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2285       <files>
2286         <!-- CPU independent -->
2287         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2288         <file category="header" name="CMSIS/Include/arm_math.h"/>
2289
2290         <!-- CPU and Compiler dependent -->
2291         <!-- ARMCC -->
2292         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2293         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2294         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2295         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2296         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2297         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2298         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2299         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2300         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2301         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2302         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2303         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2304         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2305         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2306
2307         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2308         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2309         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2310         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2311         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2312         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2313         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2314         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2315         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2316         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2317         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2318         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2319
2320         <!-- GCC -->
2321         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2322         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2323         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2324         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2325         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2326         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2327         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2328
2329         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2330         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2331         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2332         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2333         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2334         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2335         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2336         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2337         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2338         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2339         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2340         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2341
2342       </files>
2343     </component>
2344
2345     <!-- CMSIS-RTOS Keil RTX component -->
2346     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2347       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2348       <RTE_Components_h>
2349         <!-- the following content goes into file 'RTE_Components.h' -->
2350         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2351         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2352       </RTE_Components_h>
2353       <files>
2354         <!-- CPU independent -->
2355         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2356         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2357         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2358
2359         <!-- RTX templates -->
2360         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2361         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2362         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2363         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2364         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2365         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2366         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2367         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2368         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2369         <!-- tool-chain specific template file -->
2370         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2371         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2372         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2373
2374         <!-- CPU and Compiler dependent -->
2375         <!-- ARMCC -->
2376         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2377         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2378         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2379         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2380         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2381         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2382         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2383         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2384         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2385         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2386         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2387         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2388         <!-- GCC -->
2389         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2390         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2391         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2392         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2393         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2394         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2395         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2396         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2397         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2398         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2399         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2400         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2401         <!-- IAR -->
2402         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2403         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2404         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2405         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2406         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2407         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2408         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2409         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2410         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2411         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2412         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2413         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2414       </files>
2415     </component>
2416     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2417     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2418       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2419       <RTE_Components_h>
2420         <!-- the following content goes into file 'RTE_Components.h' -->
2421         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2422         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2423       </RTE_Components_h>
2424       <files>
2425         <!-- CPU independent -->
2426         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2427         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2428         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2429
2430         <!-- RTX templates -->
2431         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2432         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2433         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2434         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2435         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2436         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2437         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2438         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2439         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2440         <!-- tool-chain specific template file -->
2441         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2442         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2443         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2444
2445         <!-- CPU and Compiler dependent -->
2446         <!-- ARMCC -->
2447         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2448         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2449         <!-- GCC -->
2450         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2451         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2452         <!-- IAR -->
2453       </files>
2454     </component>
2455
2456     <!-- CMSIS-RTOS Keil RTX5 component -->
2457     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.2" Capiversion="1.0.0" condition="RTOS RTX5">
2458       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2459       <RTE_Components_h>
2460         <!-- the following content goes into file 'RTE_Components.h' -->
2461         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2462         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2463       </RTE_Components_h>
2464       <files>
2465         <!-- RTX header file -->
2466         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2467         <!-- RTX compatibility module for API V1 -->
2468         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2469       </files>
2470     </component>
2471
2472     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2473     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
2474       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2475       <RTE_Components_h>
2476         <!-- the following content goes into file 'RTE_Components.h' -->
2477         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2478         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2479       </RTE_Components_h>
2480       <files>
2481         <!-- RTX documentation -->
2482         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2483
2484         <!-- RTX header files -->
2485         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2486
2487         <!-- RTX configuration -->
2488         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2489         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2490
2491         <!-- RTX templates -->
2492         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2493         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2494         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2495         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2496         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2497         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2498         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2499         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2500         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2501         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2502
2503         <!-- RTX library configuration -->
2504         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2505
2506         <!-- RTX libraries (CPU and Compiler dependent) -->
2507         <!-- ARMCC -->
2508         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2509         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2510         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2511         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2512         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2513         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2514         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2515         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2516         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2517         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2518         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2519         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2520         <!-- GCC -->
2521         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2522         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2523         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2524         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2525         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2526         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2527         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2528         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2529         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2530         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2531         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2532         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2533         <!-- IAR -->
2534         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2535         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2536         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2537         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2538         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2539         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2540       </files>
2541     </component>
2542     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2543       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2544       <RTE_Components_h>
2545         <!-- the following content goes into file 'RTE_Components.h' -->
2546         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2547         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2548         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2549       </RTE_Components_h>
2550       <files>
2551         <!-- RTX documentation -->
2552         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2553
2554         <!-- RTX header files -->
2555         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2556
2557         <!-- RTX configuration -->
2558         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2559         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2560
2561         <!-- RTX templates -->
2562         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2563         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2564         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2565         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2566         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2567         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2568         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2569         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2570         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2571         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2572
2573         <!-- RTX library configuration -->
2574         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2575
2576         <!-- RTX libraries (CPU and Compiler dependent) -->
2577         <!-- ARMCC -->
2578         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2579         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2580         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2581         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2582         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2583         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2584         <!-- GCC -->
2585         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2586         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2587         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2588         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2589         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2590         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2591       </files>
2592     </component>
2593     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5">
2594       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2595       <RTE_Components_h>
2596         <!-- the following content goes into file 'RTE_Components.h' -->
2597         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2598         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2599         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2600       </RTE_Components_h>
2601       <files>
2602         <!-- RTX documentation -->
2603         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2604
2605         <!-- RTX header files -->
2606         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2607
2608         <!-- RTX configuration -->
2609         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2610         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2611
2612         <!-- RTX templates -->
2613         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2614         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2615         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2616         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2617         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2618         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2619         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2620         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2621         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2622         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2623
2624         <!-- RTX sources (core) -->
2625         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2626         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2627         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2628         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2629         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2630         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2631         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2632         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2633         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2634         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2635         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2636         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2637         <!-- RTX sources (library configuration) -->
2638         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2639         <!-- RTX sources (handlers ARMCC) -->
2640         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2641         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2642         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2643         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2644         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2645         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2646         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2647         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2648         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2649         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2650         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2651         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2652         <!-- RTX sources (handlers GCC) -->
2653         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2654         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2655         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2656         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2657         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2658         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2659         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2660         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2661         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2662         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2663         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2664         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2665         <!-- RTX sources (handlers IAR) -->
2666         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2667         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2668         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2669         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2670         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2671         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2672         <!-- OS Tick (SysTick) -->
2673         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2674       </files>
2675     </component>
2676     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
2677       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2678       <RTE_Components_h>
2679         <!-- the following content goes into file 'RTE_Components.h' -->
2680         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2681         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2682         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2683       </RTE_Components_h>
2684       <files>
2685         <!-- RTX documentation -->
2686         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2687
2688         <!-- RTX header files -->
2689         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2690
2691         <!-- RTX configuration -->
2692         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2693         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2694
2695         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2696
2697         <!-- RTX templates -->
2698         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2699         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2700         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2701         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2702         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2703         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2704         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2705         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2706         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2707         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2708
2709         <!-- RTX sources (core) -->
2710         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2711         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2712         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2713         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2714         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2715         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2716         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2717         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2718         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2719         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2720         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2721         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2722         <!-- RTX sources (library configuration) -->
2723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2724         <!-- RTX sources (handlers ARMCC) -->
2725         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2726         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2727         <!-- RTX sources (handlers GCC) -->
2728         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2729         <!-- RTX sources (handlers IAR) -->
2730         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2731       </files>
2732     </component>
2733     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2734       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2735       <RTE_Components_h>
2736         <!-- the following content goes into file 'RTE_Components.h' -->
2737         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2738         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2739         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2740         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2741       </RTE_Components_h>
2742       <files>
2743         <!-- RTX documentation -->
2744         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2745
2746         <!-- RTX header files -->
2747         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2748
2749         <!-- RTX configuration -->
2750         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2751         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2752
2753         <!-- RTX templates -->
2754         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2755         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2756         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2757         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2758         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2759         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2760         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2761         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2762         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2763         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2764
2765         <!-- RTX sources (core) -->
2766         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2767         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2768         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2769         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2770         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2771         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2772         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2773         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2774         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2775         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2776         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2777         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2778         <!-- RTX sources (library configuration) -->
2779         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2780         <!-- RTX sources (ARMCC handlers) -->
2781         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2782         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2783         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2784         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2785         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2786         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2787         <!-- RTX sources (GCC handlers) -->
2788         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2789         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2790         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2791         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2792         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2793         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2794         <!-- OS Tick (SysTick) -->
2795         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2796       </files>
2797     </component>
2798
2799   </components>
2800
2801   <boards>
2802     <board name="uVision Simulator" vendor="Keil">
2803       <description>uVision Simulator</description>
2804       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2805       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2806       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2807       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2808       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2809       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2810       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2811       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2812       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2813       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2814       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2815       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2816       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2817       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2818       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2819       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2820       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2821       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2822     </board>
2823
2824     <board name="Fixed Virtual Platform" vendor="ARM">
2825       <description>Fixed Virtual Platform</description>
2826       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
2827       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
2828       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
2829     </board>
2830   </boards>
2831
2832   <examples>
2833     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2834       <description>DSP_Lib Class Marks example</description>
2835       <board name="uVision Simulator" vendor="Keil"/>
2836       <project>
2837         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2838       </project>
2839       <attributes>
2840         <component Cclass="CMSIS" Cgroup="CORE"/>
2841         <component Cclass="CMSIS" Cgroup="DSP"/>
2842         <component Cclass="Device" Cgroup="Startup"/>
2843         <category>Getting Started</category>
2844       </attributes>
2845     </example>
2846
2847     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2848       <description>DSP_Lib Convolution example</description>
2849       <board name="uVision Simulator" vendor="Keil"/>
2850       <project>
2851         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2852       </project>
2853       <attributes>
2854         <component Cclass="CMSIS" Cgroup="CORE"/>
2855         <component Cclass="CMSIS" Cgroup="DSP"/>
2856         <component Cclass="Device" Cgroup="Startup"/>
2857         <category>Getting Started</category>
2858       </attributes>
2859     </example>
2860
2861     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2862       <description>DSP_Lib Dotproduct example</description>
2863       <board name="uVision Simulator" vendor="Keil"/>
2864       <project>
2865         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2866       </project>
2867       <attributes>
2868         <component Cclass="CMSIS" Cgroup="CORE"/>
2869         <component Cclass="CMSIS" Cgroup="DSP"/>
2870         <component Cclass="Device" Cgroup="Startup"/>
2871         <category>Getting Started</category>
2872       </attributes>
2873     </example>
2874
2875     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2876       <description>DSP_Lib FFT Bin example</description>
2877       <board name="uVision Simulator" vendor="Keil"/>
2878       <project>
2879         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2880       </project>
2881       <attributes>
2882         <component Cclass="CMSIS" Cgroup="CORE"/>
2883         <component Cclass="CMSIS" Cgroup="DSP"/>
2884         <component Cclass="Device" Cgroup="Startup"/>
2885         <category>Getting Started</category>
2886       </attributes>
2887     </example>
2888
2889     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2890       <description>DSP_Lib FIR example</description>
2891       <board name="uVision Simulator" vendor="Keil"/>
2892       <project>
2893         <environment name="uv" load="arm_fir_example.uvprojx"/>
2894       </project>
2895       <attributes>
2896         <component Cclass="CMSIS" Cgroup="CORE"/>
2897         <component Cclass="CMSIS" Cgroup="DSP"/>
2898         <component Cclass="Device" Cgroup="Startup"/>
2899         <category>Getting Started</category>
2900       </attributes>
2901     </example>
2902
2903     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2904       <description>DSP_Lib Graphic Equalizer example</description>
2905       <board name="uVision Simulator" vendor="Keil"/>
2906       <project>
2907         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2908       </project>
2909       <attributes>
2910         <component Cclass="CMSIS" Cgroup="CORE"/>
2911         <component Cclass="CMSIS" Cgroup="DSP"/>
2912         <component Cclass="Device" Cgroup="Startup"/>
2913         <category>Getting Started</category>
2914       </attributes>
2915     </example>
2916
2917     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2918       <description>DSP_Lib Linear Interpolation example</description>
2919       <board name="uVision Simulator" vendor="Keil"/>
2920       <project>
2921         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2922       </project>
2923       <attributes>
2924         <component Cclass="CMSIS" Cgroup="CORE"/>
2925         <component Cclass="CMSIS" Cgroup="DSP"/>
2926         <component Cclass="Device" Cgroup="Startup"/>
2927         <category>Getting Started</category>
2928       </attributes>
2929     </example>
2930
2931     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2932       <description>DSP_Lib Matrix example</description>
2933       <board name="uVision Simulator" vendor="Keil"/>
2934       <project>
2935         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2936       </project>
2937       <attributes>
2938         <component Cclass="CMSIS" Cgroup="CORE"/>
2939         <component Cclass="CMSIS" Cgroup="DSP"/>
2940         <component Cclass="Device" Cgroup="Startup"/>
2941         <category>Getting Started</category>
2942       </attributes>
2943     </example>
2944
2945     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2946       <description>DSP_Lib Signal Convergence example</description>
2947       <board name="uVision Simulator" vendor="Keil"/>
2948       <project>
2949         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2950       </project>
2951       <attributes>
2952         <component Cclass="CMSIS" Cgroup="CORE"/>
2953         <component Cclass="CMSIS" Cgroup="DSP"/>
2954         <component Cclass="Device" Cgroup="Startup"/>
2955         <category>Getting Started</category>
2956       </attributes>
2957     </example>
2958
2959     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2960       <description>DSP_Lib Sinus/Cosinus example</description>
2961       <board name="uVision Simulator" vendor="Keil"/>
2962       <project>
2963         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2964       </project>
2965       <attributes>
2966         <component Cclass="CMSIS" Cgroup="CORE"/>
2967         <component Cclass="CMSIS" Cgroup="DSP"/>
2968         <component Cclass="Device" Cgroup="Startup"/>
2969         <category>Getting Started</category>
2970       </attributes>
2971     </example>
2972
2973     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2974       <description>DSP_Lib Variance example</description>
2975       <board name="uVision Simulator" vendor="Keil"/>
2976       <project>
2977         <environment name="uv" load="arm_variance_example.uvprojx"/>
2978       </project>
2979       <attributes>
2980         <component Cclass="CMSIS" Cgroup="CORE"/>
2981         <component Cclass="CMSIS" Cgroup="DSP"/>
2982         <component Cclass="Device" Cgroup="Startup"/>
2983         <category>Getting Started</category>
2984       </attributes>
2985     </example>
2986
2987     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2988       <description>CMSIS-RTOS2 Blinky example</description>
2989       <board name="uVision Simulator" vendor="Keil"/>
2990       <project>
2991         <environment name="uv" load="Blinky.uvprojx"/>
2992       </project>
2993       <attributes>
2994         <component Cclass="CMSIS" Cgroup="CORE"/>
2995         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2996         <component Cclass="Device" Cgroup="Startup"/>
2997         <category>Getting Started</category>
2998       </attributes>
2999     </example>
3000
3001     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3002       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3003       <board name="uVision Simulator" vendor="Keil"/>
3004       <project>
3005         <environment name="uv" load="Blinky.uvprojx"/>
3006       </project>
3007       <attributes>
3008         <component Cclass="CMSIS" Cgroup="CORE"/>
3009         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3010         <component Cclass="Device" Cgroup="Startup"/>
3011         <category>Getting Started</category>
3012       </attributes>
3013     </example>
3014
3015     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3016       <description>CMSIS-RTOS2 Message Queue Example</description>
3017       <board name="uVision Simulator" vendor="Keil"/>
3018       <project>
3019         <environment name="uv" load="MsqQueue.uvprojx"/>
3020       </project>
3021       <attributes>
3022         <component Cclass="CMSIS" Cgroup="CORE"/>
3023         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3024         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3025         <component Cclass="Device" Cgroup="Startup"/>
3026         <category>Getting Started</category>
3027       </attributes>
3028     </example>
3029
3030     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3031       <description>CMSIS-RTOS2 Memory Pool Example</description>
3032       <board name="Fixed Virtual Platform" vendor="ARM"/>
3033       <project>
3034         <environment name="uv" load="MemPool.uvprojx"/>
3035       </project>
3036       <attributes>
3037         <component Cclass="CMSIS" Cgroup="CORE"/>
3038         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3039         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3040         <component Cclass="Device" Cgroup="Startup"/>
3041         <category>Getting Started</category>
3042       </attributes>
3043     </example>
3044
3045     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3046       <description>Bare-metal secure/non-secure example without RTOS</description>
3047       <board name="uVision Simulator" vendor="Keil"/>
3048       <project>
3049         <environment name="uv" load="NoRTOS.uvmpw"/>
3050       </project>
3051       <attributes>
3052         <component Cclass="CMSIS" Cgroup="CORE"/>
3053         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3054         <component Cclass="Device" Cgroup="Startup"/>
3055         <category>Getting Started</category>
3056       </attributes>
3057     </example>
3058
3059     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3060       <description>Secure/non-secure RTOS example with thread context management</description>
3061       <board name="uVision Simulator" vendor="Keil"/>
3062       <project>
3063         <environment name="uv" load="RTOS.uvmpw"/>
3064       </project>
3065       <attributes>
3066         <component Cclass="CMSIS" Cgroup="CORE"/>
3067         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3068         <component Cclass="Device" Cgroup="Startup"/>
3069         <category>Getting Started</category>
3070       </attributes>
3071     </example>
3072
3073     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3074       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3075       <board name="uVision Simulator" vendor="Keil"/>
3076       <project>
3077         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3078       </project>
3079       <attributes>
3080         <component Cclass="CMSIS" Cgroup="CORE"/>
3081         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3082         <component Cclass="Device" Cgroup="Startup"/>
3083         <category>Getting Started</category>
3084       </attributes>
3085     </example>
3086
3087   </examples>
3088
3089 </package>