begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.5.0-dev6">
  12       Active development ...
  13       DSP_Lib:
  14         - new version V1.5.5
  15         - reworked DSP library source files
  16             added macro ARM_MATH_LOOPUNROLL
  17             removed macro UNALIGNED_SUPPORT_DISABLE
  18             replaced arm_bitreversal2.S with C version
  19             added const-correctness
  20             replaced SIMD pointer construct with memcpy solution
  21         - reworked DSP library documentation
  22         - moved DSP libraries to folder ./DSP/Lib
  23         - ARM DSP Libraries are built with ARMCLANG
  24         - Added DSP Libraries Source variant
  25     </release>
  26     <release version="5.5.0-dev5">
  27       Development Snapshot ...
  28       CMSIS-Driver:
  29       - Added components for project specific driver implementations
  30     </release>
  31     <release version="5.5.0-dev4">
  32       CMSIS-Core(M):
  33        - Added generic Armv8.1-M Mainline device support.
  34     </release>
  35     <release version="5.5.0-dev3">
  36       CMSIS-Driver:
  37         - Added WiFi Driver API 1.0.0-beta
  38     </release>
  39     <release version="5.5.0-dev2">
  40       CMSIS-Core(M):
  41         - Reworked Stack/Heap configuration for ARM startup files.
  42         - Added Cortex-M35P device support.
  43       CMSIS-RTOS2:
  44         - RTX 5.5.0 (see revision history for details)
  45       DSP_Lib:
  46         - updated arm_math.h
  47         - reduced ARM_MATH_CMx macros
  48         - added GitHub pull requests
  49     </release>
  50     <release version="5.4.0" date="2018-08-01">
  51       Aligned pack structure with repository.
  52       The following folders are deprecated:
  53         - CMSIS/Include/
  54         - CMSIS/DSP_Lib/
  55
  56       CMSIS-Core(M): 5.1.2 (see revision history for details)
  57         - Added Cortex-M1 support (beta).
  58       CMSIS-Core(A): 1.1.2 (see revision history for details)
  59       CMSIS-NN: 1.1.0
  60         - Added new math functions.
  61       CMSIS-RTOS2:
  62         - API 2.1.3 (see revision history for details)
  63         - RTX 5.4.0 (see revision history for details)
  64           * Updated exception handling on Cortex-A
  65       CMSIS-Driver:
  66         - Flash Driver API V2.2.0
  67       Utilities:
  68         - SVDConv 3.3.21
  69         - PackChk 1.3.71
  70     </release>
  71     <release version="5.3.0" date="2018-02-22">
  72       Updated Arm company brand.
  73       CMSIS-Core(M): 5.1.1 (see revision history for details)
  74       CMSIS-Core(A): 1.1.1 (see revision history for details)
  75       CMSIS-DAP: 2.0.0 (see revision history for details)
  76       CMSIS-NN: 1.0.0
  77         - Initial contribution of the bare metal Neural Network Library.
  78       CMSIS-RTOS2:
  79         - RTX 5.3.0 (see revision history for details)
  80         - OS Tick API 1.0.1
  81     </release>
  82     <release version="5.2.0" date="2017-11-16">
  83       CMSIS-Core(M): 5.1.0 (see revision history for details)
  84         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  85         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  86       CMSIS-Core(A): 1.1.0 (see revision history for details)
  87         - Added compiler_iccarm.h.
  88         - Added additional access functions for physical timer.
  89       CMSIS-DAP: 1.2.0 (see revision history for details)
  90       CMSIS-DSP: 1.5.2 (see revision history for details)
  91       CMSIS-Driver: 2.6.0 (see revision history for details)
  92         - CAN Driver API V1.2.0
  93         - NAND Driver API V2.3.0
  94       CMSIS-RTOS:
  95         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  96       CMSIS-RTOS2:
  97         - API 2.1.2 (see revision history for details)
  98         - RTX 5.2.3 (see revision history for details)
  99       Devices:
 100         - Added GCC startup and linker script for Cortex-A9.
 101         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 102         - Added IAR startup code for Cortex-A9
 103     </release>
 104     <release version="5.1.1" date="2017-09-19">
 105       CMSIS-RTOS2:
 106       - RTX 5.2.1 (see revision history for details)
 107     </release>
 108     <release version="5.1.0" date="2017-08-04">
 109       CMSIS-Core(M): 5.0.2 (see revision history for details)
 110       - Changed Version Control macros to be core agnostic.
 111       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 112       CMSIS-Core(A): 1.0.0 (see revision history for details)
 113       - Initial release
 114       - IRQ Controller API 1.0.0
 115       CMSIS-Driver: 2.05 (see revision history for details)
 116       - All typedefs related to status have been made volatile.
 117       CMSIS-RTOS2:
 118       - API 2.1.1 (see revision history for details)
 119       - RTX 5.2.0 (see revision history for details)
 120       - OS Tick API 1.0.0
 121       CMSIS-DSP: 1.5.2 (see revision history for details)
 122       - Fixed GNU Compiler specific diagnostics.
 123       CMSIS-Pack: 1.5.0 (see revision history for details)
 124       - added System Description File (*.SDF) Format
 125       CMSIS-Zone: 0.0.1 (Preview)
 126       - Initial specification draft
 127     </release>
 128     <release version="5.0.1" date="2017-02-03">
 129       Package Description:
 130       - added taxonomy for Cclass RTOS
 131       CMSIS-RTOS2:
 132       - API 2.1   (see revision history for details)
 133       - RTX 5.1.0 (see revision history for details)
 134       CMSIS-Core: 5.0.1 (see revision history for details)
 135       - Added __PACKED_STRUCT macro
 136       - Added uVisior support
 137       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 138       - Updated template for secure main function (main_s.c)
 139       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 140       CMSIS-DSP: 1.5.1 (see revision history for details)
 141       - added ARMv8M DSP libraries.
 142       CMSIS-Pack:1.4.9 (see revision history for details)
 143       - added Pack Index File specification and schema file
 144     </release>
 145     <release version="5.0.0" date="2016-11-11">
 146       Changed open source license to Apache 2.0
 147       CMSIS_Core:
 148        - Added support for Cortex-M23 and Cortex-M33.
 149        - Added ARMv8-M device configurations for mainline and baseline.
 150        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 151        - Added cmsis_compiler.h to unify compiler behaviour.
 152        - Updated function SCB_EnableICache (for Cortex-M7).
 153        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 154       CMSIS-RTOS:
 155         - bug fix in RTX 4.82 (see revision history for details)
 156       CMSIS-RTOS2:
 157         - new API including compatibility layer to CMSIS-RTOS
 158         - reference implementation based on RTX5
 159         - supports all Cortex-M variants including TrustZone for ARMv8-M
 160       CMSIS-SVD:
 161        - reworked SVD format documentation
 162        - removed SVD file database documentation as SVD files are distributed in packs
 163        - updated SVDConv for Win32 and Linux
 164       CMSIS-DSP:
 165        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 166        - Added DSP libraries build projects to CMSIS pack.
 167     </release>
 168     <release version="4.5.0" date="2015-10-28">
 169       - CMSIS-Core     4.30.0  (see revision history for details)
 170       - CMSIS-DAP      1.1.0   (unchanged)
 171       - CMSIS-Driver   2.04.0  (see revision history for details)
 172       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 173       - CMSIS-Pack     1.4.1   (see revision history for details)
 174       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 175       - CMSIS-SVD      1.3.1   (see revision history for details)
 176     </release>
 177     <release version="4.4.0" date="2015-09-11">
 178       - CMSIS-Core     4.20   (see revision history for details)
 179       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 180       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 181       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 182       - CMSIS-RTOS
 183         -- API         1.02   (unchanged)
 184         -- RTX         4.79   (see revision history for details)
 185       - CMSIS-SVD      1.3.0  (see revision history for details)
 186       - CMSIS-DAP      1.1.0  (extended with SWO support)
 187     </release>
 188     <release version="4.3.0" date="2015-03-20">
 189       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 190       - CMSIS-DSP      1.4.5  (see revision history for details)
 191       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 192       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 193       - CMSIS-RTOS
 194         -- API         1.02   (unchanged)
 195         -- RTX         4.78   (see revision history for details)
 196       - CMSIS-SVD      1.2    (unchanged)
 197     </release>
 198     <release version="4.2.0" date="2014-09-24">
 199       Adding Cortex-M7 support
 200       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 201       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 202       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 203       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 204       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 205     </release>
 206     <release version="4.1.1" date="2014-06-30">
 207       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 208     </release>
 209     <release version="4.1.0" date="2014-06-12">
 210       - CMSIS-Driver   2.02  (incompatible update)
 211       - CMSIS-Pack     1.3   (see revision history for details)
 212       - CMSIS-DSP      1.4.2 (unchanged)
 213       - CMSIS-Core     3.30  (unchanged)
 214       - CMSIS-RTOS RTX 4.74  (unchanged)
 215       - CMSIS-RTOS API 1.02  (unchanged)
 216       - CMSIS-SVD      1.10  (unchanged)
 217       PACK:
 218       - removed G++ specific files from PACK
 219       - added Component Startup variant "C Startup"
 220       - added Pack Checking Utility
 221       - updated conditions to reflect tool-chain dependency
 222       - added Taxonomy for Graphics
 223       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 224     </release>
 225     <release version="4.0.0">
 226       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 227       - CMSIS-Pack     1.1   Preliminary
 228       - CMSIS-DSP      1.4.2 (see revision history for details)
 229       - CMSIS-Core     3.30  (see revision history for details)
 230       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 231       - CMSIS-RTOS API 1.02  (unchanged)
 232       - CMSIS-SVD      1.10  (unchanged)
 233     </release>
 234     <release version="3.20.4">
 235       - CMSIS-RTOS 4.74 (see revision history for details)
 236       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 237     </release>
 238     <release version="3.20.3">
 239       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 240       - CMSIS-RTOS 4.73 (see revision history for details)
 241     </release>
 242     <release version="3.20.2">
 243       - CMSIS-Pack documentation has been added
 244       - CMSIS-Drivers header and documentation have been added to PACK
 245       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 246     </release>
 247     <release version="3.20.1">
 248       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 249       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 250     </release>
 251     <release version="3.20.0">
 252       The software portions that are deployed in the application program are now under a BSD license which allows usage
 253       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 254       The individual components have been update as listed below:
 255       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 256       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 257       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 258       - CMSIS-SVD is unchanged.
 259     </release>
 260   </releases>
 261
 262   <taxonomy>
 263     <description Cclass="Audio">Software components for audio processing</description>
 264     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 265     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 266     <description Cclass="Compiler">Compiler Software Extensions</description>
 267     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 268     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 269     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 270     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 271     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 272     <description Cclass="File System">File Drive Support and File System</description>
 273     <description Cclass="IoT Client">IoT cloud client connector</description>
 274     <description Cclass="IoT Utility">IoT specific software utility</description>
 275     <description Cclass="Graphics">Graphical User Interface</description>
 276     <description Cclass="Network">Network Stack using Internet Protocols</description>
 277     <description Cclass="RTOS">Real-time Operating System</description>
 278     <description Cclass="Security">Encryption for secure communication or storage</description>
 279     <description Cclass="USB">Universal Serial Bus Stack</description>
 280     <description Cclass="Utility">Generic software utility components</description>
 281   </taxonomy>
 282
 283   <devices>
 284     <!-- ******************************  Cortex-M0  ****************************** -->
 285     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 286       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 287       <description>
 288 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 289 - simple, easy-to-use programmers model
 290 - highly efficient ultra-low power operation
 291 - excellent code density
 292 - deterministic, high-performance interrupt handling
 293 - upward compatibility with the rest of the Cortex-M processor family.
 294       </description>
 295       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 296       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 297       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 298       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 299
 300       <device Dname="ARMCM0">
 301         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 302         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 303       </device>
 304     </family>
 305
 306     <!-- ******************************  Cortex-M0P  ****************************** -->
 307     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 308       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 309       <description>
 310 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 311 - simple, easy-to-use programmers model
 312 - highly efficient ultra-low power operation
 313 - excellent code density
 314 - deterministic, high-performance interrupt handling
 315 - upward compatibility with the rest of the Cortex-M processor family.
 316       </description>
 317       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 318       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 319       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 320       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 321
 322       <device Dname="ARMCM0P">
 323         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 324         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 325       </device>
 326
 327       <device Dname="ARMCM0P_MPU">
 328         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 329         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 330       </device>
 331     </family>
 332
 333     <!-- ******************************  Cortex-M1  ****************************** -->
 334     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 335       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 336       <description>
 337 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 338 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 339       </description>
 340       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 341       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 342       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 343       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 344
 345       <device Dname="ARMCM1">
 346         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 347         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 348       </device>
 349     </family>
 350
 351     <!-- ******************************  Cortex-M3  ****************************** -->
 352     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 353       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 354       <description>
 355 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 356 - simple, easy-to-use programmers model
 357 - highly efficient ultra-low power operation
 358 - excellent code density
 359 - deterministic, high-performance interrupt handling
 360 - upward compatibility with the rest of the Cortex-M processor family.
 361       </description>
 362       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 363       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 364       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 365       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 366
 367       <device Dname="ARMCM3">
 368         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 369         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 370       </device>
 371     </family>
 372
 373     <!-- ******************************  Cortex-M4  ****************************** -->
 374     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 375       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 376       <description>
 377 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 378 - simple, easy-to-use programmers model
 379 - highly efficient ultra-low power operation
 380 - excellent code density
 381 - deterministic, high-performance interrupt handling
 382 - upward compatibility with the rest of the Cortex-M processor family.
 383       </description>
 384       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 385       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 386       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 387       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 388
 389       <device Dname="ARMCM4">
 390         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 391         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 392       </device>
 393
 394       <device Dname="ARMCM4_FP">
 395         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 396         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 397       </device>
 398     </family>
 399
 400     <!-- ******************************  Cortex-M7  ****************************** -->
 401     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 402       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 403       <description>
 404 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 405 - simple, easy-to-use programmers model
 406 - highly efficient ultra-low power operation
 407 - excellent code density
 408 - deterministic, high-performance interrupt handling
 409 - upward compatibility with the rest of the Cortex-M processor family.
 410       </description>
 411       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 412       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 413       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 414       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 415
 416       <device Dname="ARMCM7">
 417         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 418         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 419       </device>
 420
 421       <device Dname="ARMCM7_SP">
 422         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 423         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 424       </device>
 425
 426       <device Dname="ARMCM7_DP">
 427         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 428         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 429       </device>
 430     </family>
 431
 432     <!-- ******************************  Cortex-M23  ********************** -->
 433     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 434       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 435       <description>
 436 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 437 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 438 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 439       </description>
 440       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 441       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 442       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 443       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 444       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 445       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 446
 447       <device Dname="ARMCM23">
 448         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 449         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 450       </device>
 451
 452       <device Dname="ARMCM23_TZ">
 453         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 454         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 455       </device>
 456     </family>
 457
 458     <!-- ******************************  Cortex-M33  ****************************** -->
 459     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 460       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 461       <description>
 462 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 463 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 464       </description>
 465       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 466       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 467       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 468       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 469       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 470       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 471
 472       <device Dname="ARMCM33">
 473         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 474         <description>
 475           no DSP Instructions, no Floating Point Unit, no TrustZone
 476         </description>
 477         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 478       </device>
 479
 480       <device Dname="ARMCM33_TZ">
 481         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 482         <description>
 483           no DSP Instructions, no Floating Point Unit, TrustZone
 484         </description>
 485         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 486       </device>
 487
 488       <device Dname="ARMCM33_DSP_FP">
 489         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 490         <description>
 491           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 492         </description>
 493         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 494       </device>
 495
 496       <device Dname="ARMCM33_DSP_FP_TZ">
 497         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 498         <description>
 499           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 500         </description>
 501         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 502       </device>
 503     </family>
 504
 505     <!-- ******************************  Cortex-M35P  ****************************** -->
 506     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 507       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 508       <description>
 509 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 510 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 511       </description>
 512
 513       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 514       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 515       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 516       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 517       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 518       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 519
 520       <device Dname="ARMCM35P">
 521         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 522         <description>
 523           no DSP Instructions, no Floating Point Unit, no TrustZone
 524         </description>
 525         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 526       </device>
 527
 528       <device Dname="ARMCM35P_TZ">
 529         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 530         <description>
 531           no DSP Instructions, no Floating Point Unit, TrustZone
 532         </description>
 533         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 534       </device>
 535
 536       <device Dname="ARMCM35P_DSP_FP">
 537         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 538         <description>
 539           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 540         </description>
 541         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 542       </device>
 543
 544       <device Dname="ARMCM35P_DSP_FP_TZ">
 545         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 546         <description>
 547           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 548         </description>
 549         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 550       </device>
 551     </family>
 552
 553     <!-- ******************************  ARMSC000  ****************************** -->
 554     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 555       <description>
 556 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 557 - simple, easy-to-use programmers model
 558 - highly efficient ultra-low power operation
 559 - excellent code density
 560 - deterministic, high-performance interrupt handling
 561       </description>
 562       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 563       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 564       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 565       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 566
 567       <device Dname="ARMSC000">
 568         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 569         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 570       </device>
 571     </family>
 572
 573     <!-- ******************************  ARMSC300  ****************************** -->
 574     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 575       <description>
 576 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 577 - simple, easy-to-use programmers model
 578 - highly efficient ultra-low power operation
 579 - excellent code density
 580 - deterministic, high-performance interrupt handling
 581       </description>
 582       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 583       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 584       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 585       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 586
 587       <device Dname="ARMSC300">
 588         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 589         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 590       </device>
 591     </family>
 592
 593     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 594     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 595       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 596       <description>
 597 Armv8-M Baseline based device with TrustZone
 598       </description>
 599       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 600       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 601       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 602       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 603       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 604       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 605
 606       <device Dname="ARMv8MBL">
 607         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 608         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 609       </device>
 610     </family>
 611
 612     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 613     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 614       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 615       <description>
 616 Armv8-M Mainline based device with TrustZone
 617       </description>
 618       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 619       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 620       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 621       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 622       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 623       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 624
 625       <device Dname="ARMv8MML">
 626         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 627         <description>
 628           no DSP Instructions, no Floating Point Unit, TrustZone
 629         </description>
 630         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 631       </device>
 632
 633       <device Dname="ARMv8MML_DSP">
 634         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 635         <description>
 636           DSP Instructions, no Floating Point Unit, TrustZone
 637         </description>
 638         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 639       </device>
 640
 641       <device Dname="ARMv8MML_SP">
 642         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 643         <description>
 644           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 645         </description>
 646         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 647       </device>
 648
 649       <device Dname="ARMv8MML_DSP_SP">
 650         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 651         <description>
 652           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 653         </description>
 654         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 655       </device>
 656
 657       <device Dname="ARMv8MML_DP">
 658         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 659         <description>
 660           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 661         </description>
 662         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 663       </device>
 664
 665       <device Dname="ARMv8MML_DSP_DP">
 666         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 667         <description>
 668           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 669         </description>
 670         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 671       </device>
 672     </family>
 673
 674     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 675     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 676       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 677       <description>
 678 Armv8.1-M Mainline based device with TrustZone and MVE
 679       </description>
 680       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 681       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 682       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 683       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 684       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 685       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 686
 687
 688       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 689         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 690         <description>
 691           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 692         </description>
 693         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 694       </device>
 695     </family>
 696
 697     <!-- ******************************  Cortex-A5  ****************************** -->
 698     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 699       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 700       <description>
 701 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 702 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 703 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 704       </description>
 705
 706       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 707       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 708
 709       <device Dname="ARMCA5">
 710         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 711         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 712       </device>
 713     </family>
 714
 715     <!-- ******************************  Cortex-A7  ****************************** -->
 716     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 717       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 718       <description>
 719 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 720 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 721 an optional integrated GIC, and an optional L2 cache controller.
 722       </description>
 723
 724       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 725       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 726
 727       <device Dname="ARMCA7">
 728         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 729         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 730       </device>
 731     </family>
 732
 733     <!-- ******************************  Cortex-A9  ****************************** -->
 734     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 735       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 736       <description>
 737 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 738 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 739 and 8-bit Java bytecodes in Jazelle state.
 740       </description>
 741
 742       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 743       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 744
 745       <device Dname="ARMCA9">
 746         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 747         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 748       </device>
 749     </family>
 750   </devices>
 751
 752
 753   <apis>
 754     <!-- CMSIS Device API -->
 755     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 756       <description>Device interrupt controller interface</description>
 757       <files>
 758         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 759       </files>
 760     </api>
 761     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 762       <description>RTOS Kernel system tick timer interface</description>
 763       <files>
 764         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 765       </files>
 766     </api>
 767     <!-- CMSIS-RTOS API -->
 768     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 769       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 770       <files>
 771         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 772       </files>
 773     </api>
 774     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 775       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 776       <files>
 777         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 778         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 779       </files>
 780     </api>
 781     <!-- CMSIS Driver API -->
 782     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 783       <description>USART Driver API for Cortex-M</description>
 784       <files>
 785         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 786         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 787       </files>
 788     </api>
 789     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 790       <description>SPI Driver API for Cortex-M</description>
 791       <files>
 792         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 793         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 794       </files>
 795     </api>
 796     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 797       <description>SAI Driver API for Cortex-M</description>
 798       <files>
 799         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 800         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 801       </files>
 802     </api>
 803     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 804       <description>I2C Driver API for Cortex-M</description>
 805       <files>
 806         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 807         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 808       </files>
 809     </api>
 810     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 811       <description>CAN Driver API for Cortex-M</description>
 812       <files>
 813         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 814         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 815       </files>
 816     </api>
 817     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 818       <description>Flash Driver API for Cortex-M</description>
 819       <files>
 820         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 821         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 822       </files>
 823     </api>
 824     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 825       <description>MCI Driver API for Cortex-M</description>
 826       <files>
 827         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 828         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 829       </files>
 830     </api>
 831     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 832       <description>NAND Flash Driver API for Cortex-M</description>
 833       <files>
 834         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 835         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 836       </files>
 837     </api>
 838     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 839       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 840       <files>
 841         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 842         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 843         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 844       </files>
 845     </api>
 846     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 847       <description>Ethernet MAC Driver API for Cortex-M</description>
 848       <files>
 849         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 850         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 851       </files>
 852     </api>
 853     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 854       <description>Ethernet PHY Driver API for Cortex-M</description>
 855       <files>
 856         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 857         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 858       </files>
 859     </api>
 860     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 861       <description>USB Device Driver API for Cortex-M</description>
 862       <files>
 863         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 864         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 865       </files>
 866     </api>
 867     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 868       <description>USB Host Driver API for Cortex-M</description>
 869       <files>
 870         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 871         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 872       </files>
 873     </api>
 874     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0-beta" exclusive="0">
 875       <description>WiFi driver</description>
 876       <files>
 877         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
 878       </files>
 879     </api>
 880   </apis>
 881
 882   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 883   <conditions>
 884     <!-- compiler -->
 885     <condition id="ARMCC6">
 886       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 887       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 888     </condition>
 889     <condition id="ARMCC5">
 890       <require Tcompiler="ARMCC" Toptions="AC5"/>
 891     </condition>
 892     <condition id="ARMCC">
 893       <require Tcompiler="ARMCC"/>
 894     </condition>
 895     <condition id="GCC">
 896       <require Tcompiler="GCC"/>
 897     </condition>
 898     <condition id="IAR">
 899       <require Tcompiler="IAR"/>
 900     </condition>
 901     <condition id="ARMCC GCC">
 902       <accept Tcompiler="ARMCC"/>
 903       <accept Tcompiler="GCC"/>
 904     </condition>
 905     <condition id="ARMCC GCC IAR">
 906       <accept Tcompiler="ARMCC"/>
 907       <accept Tcompiler="GCC"/>
 908       <accept Tcompiler="IAR"/>
 909     </condition>
 910
 911     <!-- Arm architecture -->
 912     <condition id="ARMv6-M Device">
 913       <description>Armv6-M architecture based device</description>
 914       <accept Dcore="Cortex-M0"/>
 915       <accept Dcore="Cortex-M1"/>
 916       <accept Dcore="Cortex-M0+"/>
 917       <accept Dcore="SC000"/>
 918     </condition>
 919     <condition id="ARMv7-M Device">
 920       <description>Armv7-M architecture based device</description>
 921       <accept Dcore="Cortex-M3"/>
 922       <accept Dcore="Cortex-M4"/>
 923       <accept Dcore="Cortex-M7"/>
 924       <accept Dcore="SC300"/>
 925     </condition>
 926     <condition id="ARMv8-M Device">
 927       <description>Armv8-M architecture based device</description>
 928       <accept Dcore="ARMV8MBL"/>
 929       <accept Dcore="ARMV8MML"/>
 930       <accept Dcore="ARMV81MML"/>
 931       <accept Dcore="Cortex-M23"/>
 932       <accept Dcore="Cortex-M33"/>
 933       <accept Dcore="Cortex-M35P"/>
 934     </condition>
 935     <condition id="ARMv8-M TZ Device">
 936       <description>Armv8-M architecture based device with TrustZone</description>
 937       <require condition="ARMv8-M Device"/>
 938       <require Dtz="TZ"/>
 939     </condition>
 940     <condition id="ARMv6_7-M Device">
 941       <description>Armv6_7-M architecture based device</description>
 942       <accept condition="ARMv6-M Device"/>
 943       <accept condition="ARMv7-M Device"/>
 944     </condition>
 945     <condition id="ARMv6_7_8-M Device">
 946       <description>Armv6_7_8-M architecture based device</description>
 947       <accept condition="ARMv6-M Device"/>
 948       <accept condition="ARMv7-M Device"/>
 949       <accept condition="ARMv8-M Device"/>
 950     </condition>
 951     <condition id="ARMv7-A Device">
 952       <description>Armv7-A architecture based device</description>
 953       <accept Dcore="Cortex-A5"/>
 954       <accept Dcore="Cortex-A7"/>
 955       <accept Dcore="Cortex-A9"/>
 956     </condition>
 957
 958     <!-- ARM core -->
 959     <condition id="CM0">
 960       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 961       <accept Dcore="Cortex-M0"/>
 962       <accept Dcore="Cortex-M0+"/>
 963       <accept Dcore="SC000"/>
 964     </condition>
 965     <condition id="CM1">
 966       <description>Cortex-M1</description>
 967       <require Dcore="Cortex-M1"/>
 968     </condition>
 969     <condition id="CM3">
 970       <description>Cortex-M3 or SC300 processor based device</description>
 971       <accept Dcore="Cortex-M3"/>
 972       <accept Dcore="SC300"/>
 973     </condition>
 974     <condition id="CM4">
 975       <description>Cortex-M4 processor based device</description>
 976       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 977     </condition>
 978     <condition id="CM4_FP">
 979       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 980       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 981       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 982       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 983     </condition>
 984     <condition id="CM7">
 985       <description>Cortex-M7 processor based device</description>
 986       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 987     </condition>
 988     <condition id="CM7_FP">
 989       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 990       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 991       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 992     </condition>
 993     <condition id="CM7_SP">
 994       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 995       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 996     </condition>
 997     <condition id="CM7_DP">
 998       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 999       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1000     </condition>
1001     <condition id="CM23">
1002       <description>Cortex-M23 processor based device</description>
1003       <require Dcore="Cortex-M23"/>
1004     </condition>
1005     <condition id="CM33">
1006       <description>Cortex-M33 processor based device</description>
1007       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1008     </condition>
1009     <condition id="CM33_FP">
1010       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1011       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1012     </condition>
1013     <condition id="CM35P">
1014       <description>Cortex-M35P processor based device</description>
1015       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1016     </condition>
1017     <condition id="CM35P_FP">
1018       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1019       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1020     </condition>
1021     <condition id="ARMv8MBL">
1022       <description>Armv8-M Baseline processor based device</description>
1023       <require Dcore="ARMV8MBL"/>
1024     </condition>
1025     <condition id="ARMv8MML">
1026       <description>Armv8-M Mainline processor based device</description>
1027       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1028     </condition>
1029     <condition id="ARMv8MML_FP">
1030       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1031       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1032       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1033     </condition>
1034
1035     <condition id="CM33_NODSP_NOFPU">
1036       <description>CM33, no DSP, no FPU</description>
1037       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1038     </condition>
1039     <condition id="CM33_DSP_NOFPU">
1040       <description>CM33, DSP, no FPU</description>
1041       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1042     </condition>
1043     <condition id="CM33_NODSP_SP">
1044       <description>CM33, no DSP, SP FPU</description>
1045       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1046     </condition>
1047     <condition id="CM33_DSP_SP">
1048       <description>CM33, DSP, SP FPU</description>
1049       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1050     </condition>
1051
1052     <condition id="CM35P_NODSP_NOFPU">
1053       <description>CM35P, no DSP, no FPU</description>
1054       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1055     </condition>
1056     <condition id="CM35P_DSP_NOFPU">
1057       <description>CM35P, DSP, no FPU</description>
1058       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1059     </condition>
1060     <condition id="CM35P_NODSP_SP">
1061       <description>CM35P, no DSP, SP FPU</description>
1062       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1063     </condition>
1064     <condition id="CM35P_DSP_SP">
1065       <description>CM35P, DSP, SP FPU</description>
1066       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1067     </condition>
1068
1069     <condition id="ARMv8MML_NODSP_NOFPU">
1070       <description>Armv8-M Mainline, no DSP, no FPU</description>
1071       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1072     </condition>
1073     <condition id="ARMv8MML_DSP_NOFPU">
1074       <description>Armv8-M Mainline, DSP, no FPU</description>
1075       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1076     </condition>
1077     <condition id="ARMv8MML_NODSP_SP">
1078       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1079       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1080     </condition>
1081     <condition id="ARMv8MML_DSP_SP">
1082       <description>Armv8-M Mainline, DSP, SP FPU</description>
1083       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1084     </condition>
1085
1086     <condition id="ARMv81MML">
1087       <description>Armv8.1-M Mainline</description>
1088       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1089     </condition>
1090
1091     <condition id="CA5_CA9">
1092       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1093       <accept Dcore="Cortex-A5"/>
1094       <accept Dcore="Cortex-A9"/>
1095     </condition>
1096
1097     <condition id="CA7">
1098       <description>Cortex-A7 processor based device</description>
1099       <accept Dcore="Cortex-A7"/>
1100     </condition>
1101
1102     <!-- ARMCC compiler -->
1103     <condition id="CA_ARMCC5">
1104       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1105       <require condition="ARMv7-A Device"/>
1106       <require condition="ARMCC5"/>
1107     </condition>
1108     <condition id="CA_ARMCC6">
1109       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1110       <require condition="ARMv7-A Device"/>
1111       <require condition="ARMCC6"/>
1112     </condition>
1113
1114     <condition id="CM0_ARMCC">
1115       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1116       <require condition="CM0"/>
1117       <require Tcompiler="ARMCC"/>
1118     </condition>
1119     <condition id="CM0_LE_ARMCC">
1120       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1121       <require condition="CM0_ARMCC"/>
1122       <require Dendian="Little-endian"/>
1123     </condition>
1124     <condition id="CM0_BE_ARMCC">
1125       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1126       <require condition="CM0_ARMCC"/>
1127       <require Dendian="Big-endian"/>
1128     </condition>
1129
1130     <condition id="CM1_ARMCC">
1131       <description>Cortex-M1 based device for the Arm Compiler</description>
1132       <require condition="CM1"/>
1133       <require Tcompiler="ARMCC"/>
1134     </condition>
1135     <condition id="CM1_LE_ARMCC">
1136       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1137       <require condition="CM1_ARMCC"/>
1138       <require Dendian="Little-endian"/>
1139     </condition>
1140     <condition id="CM1_BE_ARMCC">
1141       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1142       <require condition="CM1_ARMCC"/>
1143       <require Dendian="Big-endian"/>
1144     </condition>
1145
1146     <condition id="CM3_ARMCC">
1147       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1148       <require condition="CM3"/>
1149       <require Tcompiler="ARMCC"/>
1150     </condition>
1151     <condition id="CM3_LE_ARMCC">
1152       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1153       <require condition="CM3_ARMCC"/>
1154       <require Dendian="Little-endian"/>
1155     </condition>
1156     <condition id="CM3_BE_ARMCC">
1157       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1158       <require condition="CM3_ARMCC"/>
1159       <require Dendian="Big-endian"/>
1160     </condition>
1161
1162     <condition id="CM4_ARMCC">
1163       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1164       <require condition="CM4"/>
1165       <require Tcompiler="ARMCC"/>
1166     </condition>
1167     <condition id="CM4_LE_ARMCC">
1168       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1169       <require condition="CM4_ARMCC"/>
1170       <require Dendian="Little-endian"/>
1171     </condition>
1172     <condition id="CM4_BE_ARMCC">
1173       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1174       <require condition="CM4_ARMCC"/>
1175       <require Dendian="Big-endian"/>
1176     </condition>
1177
1178     <condition id="CM4_FP_ARMCC">
1179       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1180       <require condition="CM4_FP"/>
1181       <require Tcompiler="ARMCC"/>
1182     </condition>
1183     <condition id="CM4_FP_LE_ARMCC">
1184       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1185       <require condition="CM4_FP_ARMCC"/>
1186       <require Dendian="Little-endian"/>
1187     </condition>
1188     <condition id="CM4_FP_BE_ARMCC">
1189       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1190       <require condition="CM4_FP_ARMCC"/>
1191       <require Dendian="Big-endian"/>
1192     </condition>
1193
1194     <condition id="CM7_ARMCC">
1195       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1196       <require condition="CM7"/>
1197       <require Tcompiler="ARMCC"/>
1198     </condition>
1199     <condition id="CM7_LE_ARMCC">
1200       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1201       <require condition="CM7_ARMCC"/>
1202       <require Dendian="Little-endian"/>
1203     </condition>
1204     <condition id="CM7_BE_ARMCC">
1205       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1206       <require condition="CM7_ARMCC"/>
1207       <require Dendian="Big-endian"/>
1208     </condition>
1209
1210     <condition id="CM7_FP_ARMCC">
1211       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1212       <require condition="CM7_FP"/>
1213       <require Tcompiler="ARMCC"/>
1214     </condition>
1215     <condition id="CM7_FP_LE_ARMCC">
1216       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1217       <require condition="CM7_FP_ARMCC"/>
1218       <require Dendian="Little-endian"/>
1219     </condition>
1220     <condition id="CM7_FP_BE_ARMCC">
1221       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1222       <require condition="CM7_FP_ARMCC"/>
1223       <require Dendian="Big-endian"/>
1224     </condition>
1225
1226     <condition id="CM7_SP_ARMCC">
1227       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1228       <require condition="CM7_SP"/>
1229       <require Tcompiler="ARMCC"/>
1230     </condition>
1231     <condition id="CM7_SP_LE_ARMCC">
1232       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1233       <require condition="CM7_SP_ARMCC"/>
1234       <require Dendian="Little-endian"/>
1235     </condition>
1236     <condition id="CM7_SP_BE_ARMCC">
1237       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1238       <require condition="CM7_SP_ARMCC"/>
1239       <require Dendian="Big-endian"/>
1240     </condition>
1241
1242     <condition id="CM7_DP_ARMCC">
1243       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1244       <require condition="CM7_DP"/>
1245       <require Tcompiler="ARMCC"/>
1246     </condition>
1247     <condition id="CM7_DP_LE_ARMCC">
1248       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1249       <require condition="CM7_DP_ARMCC"/>
1250       <require Dendian="Little-endian"/>
1251     </condition>
1252     <condition id="CM7_DP_BE_ARMCC">
1253       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1254       <require condition="CM7_DP_ARMCC"/>
1255       <require Dendian="Big-endian"/>
1256     </condition>
1257
1258     <condition id="CM23_ARMCC">
1259       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1260       <require condition="CM23"/>
1261       <require Tcompiler="ARMCC"/>
1262     </condition>
1263     <condition id="CM23_LE_ARMCC">
1264       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1265       <require condition="CM23_ARMCC"/>
1266       <require Dendian="Little-endian"/>
1267     </condition>
1268     <condition id="CM23_BE_ARMCC">
1269       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1270       <require condition="CM23_ARMCC"/>
1271       <require Dendian="Big-endian"/>
1272     </condition>
1273
1274     <condition id="CM33_ARMCC">
1275       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1276       <require condition="CM33"/>
1277       <require Tcompiler="ARMCC"/>
1278     </condition>
1279     <condition id="CM33_LE_ARMCC">
1280       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1281       <require condition="CM33_ARMCC"/>
1282       <require Dendian="Little-endian"/>
1283     </condition>
1284     <condition id="CM33_BE_ARMCC">
1285       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1286       <require condition="CM33_ARMCC"/>
1287       <require Dendian="Big-endian"/>
1288     </condition>
1289
1290     <condition id="CM33_FP_ARMCC">
1291       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1292       <require condition="CM33_FP"/>
1293       <require Tcompiler="ARMCC"/>
1294     </condition>
1295     <condition id="CM33_FP_LE_ARMCC">
1296       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1297       <require condition="CM33_FP_ARMCC"/>
1298       <require Dendian="Little-endian"/>
1299     </condition>
1300     <condition id="CM33_FP_BE_ARMCC">
1301       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1302       <require condition="CM33_FP_ARMCC"/>
1303       <require Dendian="Big-endian"/>
1304     </condition>
1305
1306     <condition id="CM33_NODSP_NOFPU_ARMCC">
1307       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1308       <require condition="CM33_NODSP_NOFPU"/>
1309       <require Tcompiler="ARMCC"/>
1310     </condition>
1311     <condition id="CM33_DSP_NOFPU_ARMCC">
1312       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1313       <require condition="CM33_DSP_NOFPU"/>
1314       <require Tcompiler="ARMCC"/>
1315     </condition>
1316     <condition id="CM33_NODSP_SP_ARMCC">
1317       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1318       <require condition="CM33_NODSP_SP"/>
1319       <require Tcompiler="ARMCC"/>
1320     </condition>
1321     <condition id="CM33_DSP_SP_ARMCC">
1322       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1323       <require condition="CM33_DSP_SP"/>
1324       <require Tcompiler="ARMCC"/>
1325     </condition>
1326     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1327       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1328       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1329       <require Dendian="Little-endian"/>
1330     </condition>
1331     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1332       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1333       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1334       <require Dendian="Little-endian"/>
1335     </condition>
1336     <condition id="CM33_NODSP_SP_LE_ARMCC">
1337       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1338       <require condition="CM33_NODSP_SP_ARMCC"/>
1339       <require Dendian="Little-endian"/>
1340     </condition>
1341     <condition id="CM33_DSP_SP_LE_ARMCC">
1342       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1343       <require condition="CM33_DSP_SP_ARMCC"/>
1344       <require Dendian="Little-endian"/>
1345     </condition>
1346
1347     <condition id="CM35P_ARMCC">
1348       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1349       <require condition="CM35P"/>
1350       <require Tcompiler="ARMCC"/>
1351     </condition>
1352     <condition id="CM35P_LE_ARMCC">
1353       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1354       <require condition="CM35P_ARMCC"/>
1355       <require Dendian="Little-endian"/>
1356     </condition>
1357     <condition id="CM35P_BE_ARMCC">
1358       <description>Cortex-M35P processor based device in big endian mode for the Arm Compiler</description>
1359       <require condition="CM35P_ARMCC"/>
1360       <require Dendian="Big-endian"/>
1361     </condition>
1362
1363     <condition id="CM35P_FP_ARMCC">
1364       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1365       <require condition="CM35P_FP"/>
1366       <require Tcompiler="ARMCC"/>
1367     </condition>
1368     <condition id="CM35P_FP_LE_ARMCC">
1369       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1370       <require condition="CM35P_FP_ARMCC"/>
1371       <require Dendian="Little-endian"/>
1372     </condition>
1373     <condition id="CM35P_FP_BE_ARMCC">
1374       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1375       <require condition="CM35P_FP_ARMCC"/>
1376       <require Dendian="Big-endian"/>
1377     </condition>
1378
1379     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1380       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1381       <require condition="CM35P_NODSP_NOFPU"/>
1382       <require Tcompiler="ARMCC"/>
1383     </condition>
1384     <condition id="CM35P_DSP_NOFPU_ARMCC">
1385       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1386       <require condition="CM35P_DSP_NOFPU"/>
1387       <require Tcompiler="ARMCC"/>
1388     </condition>
1389     <condition id="CM35P_NODSP_SP_ARMCC">
1390       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1391       <require condition="CM35P_NODSP_SP"/>
1392       <require Tcompiler="ARMCC"/>
1393     </condition>
1394     <condition id="CM35P_DSP_SP_ARMCC">
1395       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1396       <require condition="CM35P_DSP_SP"/>
1397       <require Tcompiler="ARMCC"/>
1398     </condition>
1399     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1400       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1401       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1402       <require Dendian="Little-endian"/>
1403     </condition>
1404     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1405       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1406       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1407       <require Dendian="Little-endian"/>
1408     </condition>
1409     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1410       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1411       <require condition="CM35P_NODSP_SP_ARMCC"/>
1412       <require Dendian="Little-endian"/>
1413     </condition>
1414     <condition id="CM35P_DSP_SP_LE_ARMCC">
1415       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1416       <require condition="CM35P_DSP_SP_ARMCC"/>
1417       <require Dendian="Little-endian"/>
1418     </condition>
1419
1420     <condition id="ARMv8MBL_ARMCC">
1421       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1422       <require condition="ARMv8MBL"/>
1423       <require Tcompiler="ARMCC"/>
1424     </condition>
1425     <condition id="ARMv8MBL_LE_ARMCC">
1426       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1427       <require condition="ARMv8MBL_ARMCC"/>
1428       <require Dendian="Little-endian"/>
1429     </condition>
1430     <condition id="ARMv8MBL_BE_ARMCC">
1431       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1432       <require condition="ARMv8MBL_ARMCC"/>
1433       <require Dendian="Big-endian"/>
1434     </condition>
1435
1436     <condition id="ARMv8MML_ARMCC">
1437       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1438       <require condition="ARMv8MML"/>
1439       <require Tcompiler="ARMCC"/>
1440     </condition>
1441     <condition id="ARMv8MML_LE_ARMCC">
1442       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1443       <require condition="ARMv8MML_ARMCC"/>
1444       <require Dendian="Little-endian"/>
1445     </condition>
1446     <condition id="ARMv8MML_BE_ARMCC">
1447       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1448       <require condition="ARMv8MML_ARMCC"/>
1449       <require Dendian="Big-endian"/>
1450     </condition>
1451
1452     <condition id="ARMv8MML_FP_ARMCC">
1453       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1454       <require condition="ARMv8MML_FP"/>
1455       <require Tcompiler="ARMCC"/>
1456     </condition>
1457     <condition id="ARMv8MML_FP_LE_ARMCC">
1458       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1459       <require condition="ARMv8MML_FP_ARMCC"/>
1460       <require Dendian="Little-endian"/>
1461     </condition>
1462     <condition id="ARMv8MML_FP_BE_ARMCC">
1463       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1464       <require condition="ARMv8MML_FP_ARMCC"/>
1465       <require Dendian="Big-endian"/>
1466     </condition>
1467
1468     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1469       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1470       <require condition="ARMv8MML_NODSP_NOFPU"/>
1471       <require Tcompiler="ARMCC"/>
1472     </condition>
1473     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1474       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1475       <require condition="ARMv8MML_DSP_NOFPU"/>
1476       <require Tcompiler="ARMCC"/>
1477     </condition>
1478     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1479       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1480       <require condition="ARMv8MML_NODSP_SP"/>
1481       <require Tcompiler="ARMCC"/>
1482     </condition>
1483     <condition id="ARMv8MML_DSP_SP_ARMCC">
1484       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1485       <require condition="ARMv8MML_DSP_SP"/>
1486       <require Tcompiler="ARMCC"/>
1487     </condition>
1488     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1489       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1490       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1491       <require Dendian="Little-endian"/>
1492     </condition>
1493     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1494       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1495       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1496       <require Dendian="Little-endian"/>
1497     </condition>
1498     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1499       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1500       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1501       <require Dendian="Little-endian"/>
1502     </condition>
1503     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1504       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1505       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1506       <require Dendian="Little-endian"/>
1507     </condition>
1508
1509     <!-- GCC compiler -->
1510     <condition id="CA_GCC">
1511       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1512       <require condition="ARMv7-A Device"/>
1513       <require Tcompiler="GCC"/>
1514     </condition>
1515
1516     <condition id="CM0_GCC">
1517       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1518       <require condition="CM0"/>
1519       <require Tcompiler="GCC"/>
1520     </condition>
1521     <condition id="CM0_LE_GCC">
1522       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1523       <require condition="CM0_GCC"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526     <condition id="CM0_BE_GCC">
1527       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1528       <require condition="CM0_GCC"/>
1529       <require Dendian="Big-endian"/>
1530     </condition>
1531
1532     <condition id="CM1_GCC">
1533       <description>Cortex-M1 based device for the GCC Compiler</description>
1534       <require condition="CM1"/>
1535       <require Tcompiler="GCC"/>
1536     </condition>
1537     <condition id="CM1_LE_GCC">
1538       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1539       <require condition="CM1_GCC"/>
1540       <require Dendian="Little-endian"/>
1541     </condition>
1542     <condition id="CM1_BE_GCC">
1543       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1544       <require condition="CM1_GCC"/>
1545       <require Dendian="Big-endian"/>
1546     </condition>
1547
1548     <condition id="CM3_GCC">
1549       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1550       <require condition="CM3"/>
1551       <require Tcompiler="GCC"/>
1552     </condition>
1553     <condition id="CM3_LE_GCC">
1554       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1555       <require condition="CM3_GCC"/>
1556       <require Dendian="Little-endian"/>
1557     </condition>
1558     <condition id="CM3_BE_GCC">
1559       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1560       <require condition="CM3_GCC"/>
1561       <require Dendian="Big-endian"/>
1562     </condition>
1563
1564     <condition id="CM4_GCC">
1565       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1566       <require condition="CM4"/>
1567       <require Tcompiler="GCC"/>
1568     </condition>
1569     <condition id="CM4_LE_GCC">
1570       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1571       <require condition="CM4_GCC"/>
1572       <require Dendian="Little-endian"/>
1573     </condition>
1574     <condition id="CM4_BE_GCC">
1575       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1576       <require condition="CM4_GCC"/>
1577       <require Dendian="Big-endian"/>
1578     </condition>
1579
1580     <condition id="CM4_FP_GCC">
1581       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1582       <require condition="CM4_FP"/>
1583       <require Tcompiler="GCC"/>
1584     </condition>
1585     <condition id="CM4_FP_LE_GCC">
1586       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1587       <require condition="CM4_FP_GCC"/>
1588       <require Dendian="Little-endian"/>
1589     </condition>
1590     <condition id="CM4_FP_BE_GCC">
1591       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1592       <require condition="CM4_FP_GCC"/>
1593       <require Dendian="Big-endian"/>
1594     </condition>
1595
1596     <condition id="CM7_GCC">
1597       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1598       <require condition="CM7"/>
1599       <require Tcompiler="GCC"/>
1600     </condition>
1601     <condition id="CM7_LE_GCC">
1602       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1603       <require condition="CM7_GCC"/>
1604       <require Dendian="Little-endian"/>
1605     </condition>
1606     <condition id="CM7_BE_GCC">
1607       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1608       <require condition="CM7_GCC"/>
1609       <require Dendian="Big-endian"/>
1610     </condition>
1611
1612     <condition id="CM7_FP_GCC">
1613       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1614       <require condition="CM7_FP"/>
1615       <require Tcompiler="GCC"/>
1616     </condition>
1617     <condition id="CM7_FP_LE_GCC">
1618       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1619       <require condition="CM7_FP_GCC"/>
1620       <require Dendian="Little-endian"/>
1621     </condition>
1622     <condition id="CM7_FP_BE_GCC">
1623       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1624       <require condition="CM7_FP_GCC"/>
1625       <require Dendian="Big-endian"/>
1626     </condition>
1627
1628     <condition id="CM7_SP_GCC">
1629       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1630       <require condition="CM7_SP"/>
1631       <require Tcompiler="GCC"/>
1632     </condition>
1633     <condition id="CM7_SP_LE_GCC">
1634       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1635       <require condition="CM7_SP_GCC"/>
1636       <require Dendian="Little-endian"/>
1637     </condition>
1638     <condition id="CM7_SP_BE_GCC">
1639       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1640       <require condition="CM7_SP_GCC"/>
1641       <require Dendian="Big-endian"/>
1642     </condition>
1643
1644     <condition id="CM7_DP_GCC">
1645       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1646       <require condition="CM7_DP"/>
1647       <require Tcompiler="GCC"/>
1648     </condition>
1649     <condition id="CM7_DP_LE_GCC">
1650       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1651       <require condition="CM7_DP_GCC"/>
1652       <require Dendian="Little-endian"/>
1653     </condition>
1654     <condition id="CM7_DP_BE_GCC">
1655       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1656       <require condition="CM7_DP_GCC"/>
1657       <require Dendian="Big-endian"/>
1658     </condition>
1659
1660     <condition id="CM23_GCC">
1661       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1662       <require condition="CM23"/>
1663       <require Tcompiler="GCC"/>
1664     </condition>
1665     <condition id="CM23_LE_GCC">
1666       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1667       <require condition="CM23_GCC"/>
1668       <require Dendian="Little-endian"/>
1669     </condition>
1670     <condition id="CM23_BE_GCC">
1671       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1672       <require condition="CM23_GCC"/>
1673       <require Dendian="Big-endian"/>
1674     </condition>
1675
1676     <condition id="CM33_GCC">
1677       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1678       <require condition="CM33"/>
1679       <require Tcompiler="GCC"/>
1680     </condition>
1681     <condition id="CM33_LE_GCC">
1682       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1683       <require condition="CM33_GCC"/>
1684       <require Dendian="Little-endian"/>
1685     </condition>
1686     <condition id="CM33_BE_GCC">
1687       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1688       <require condition="CM33_GCC"/>
1689       <require Dendian="Big-endian"/>
1690     </condition>
1691
1692     <condition id="CM33_FP_GCC">
1693       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1694       <require condition="CM33_FP"/>
1695       <require Tcompiler="GCC"/>
1696     </condition>
1697     <condition id="CM33_FP_LE_GCC">
1698       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1699       <require condition="CM33_FP_GCC"/>
1700       <require Dendian="Little-endian"/>
1701     </condition>
1702     <condition id="CM33_FP_BE_GCC">
1703       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1704       <require condition="CM33_FP_GCC"/>
1705       <require Dendian="Big-endian"/>
1706     </condition>
1707
1708     <condition id="CM33_NODSP_NOFPU_GCC">
1709       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1710       <require condition="CM33_NODSP_NOFPU"/>
1711       <require Tcompiler="GCC"/>
1712     </condition>
1713     <condition id="CM33_DSP_NOFPU_GCC">
1714       <description>CM33, DSP, no FPU, GCC Compiler</description>
1715       <require condition="CM33_DSP_NOFPU"/>
1716       <require Tcompiler="GCC"/>
1717     </condition>
1718     <condition id="CM33_NODSP_SP_GCC">
1719       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1720       <require condition="CM33_NODSP_SP"/>
1721       <require Tcompiler="GCC"/>
1722     </condition>
1723     <condition id="CM33_DSP_SP_GCC">
1724       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1725       <require condition="CM33_DSP_SP"/>
1726       <require Tcompiler="GCC"/>
1727     </condition>
1728     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1729       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1730       <require condition="CM33_NODSP_NOFPU_GCC"/>
1731       <require Dendian="Little-endian"/>
1732     </condition>
1733     <condition id="CM33_DSP_NOFPU_LE_GCC">
1734       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1735       <require condition="CM33_DSP_NOFPU_GCC"/>
1736       <require Dendian="Little-endian"/>
1737     </condition>
1738     <condition id="CM33_NODSP_SP_LE_GCC">
1739       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1740       <require condition="CM33_NODSP_SP_GCC"/>
1741       <require Dendian="Little-endian"/>
1742     </condition>
1743     <condition id="CM33_DSP_SP_LE_GCC">
1744       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1745       <require condition="CM33_DSP_SP_GCC"/>
1746       <require Dendian="Little-endian"/>
1747     </condition>
1748
1749     <condition id="CM35P_GCC">
1750       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1751       <require condition="CM35P"/>
1752       <require Tcompiler="GCC"/>
1753     </condition>
1754     <condition id="CM35P_LE_GCC">
1755       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1756       <require condition="CM35P_GCC"/>
1757       <require Dendian="Little-endian"/>
1758     </condition>
1759     <condition id="CM35P_BE_GCC">
1760       <description>Cortex-M35P processor based device in big endian mode for the GCC Compiler</description>
1761       <require condition="CM35P_GCC"/>
1762       <require Dendian="Big-endian"/>
1763     </condition>
1764
1765     <condition id="CM35P_FP_GCC">
1766       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1767       <require condition="CM35P_FP"/>
1768       <require Tcompiler="GCC"/>
1769     </condition>
1770     <condition id="CM35P_FP_LE_GCC">
1771       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1772       <require condition="CM35P_FP_GCC"/>
1773       <require Dendian="Little-endian"/>
1774     </condition>
1775     <condition id="CM35P_FP_BE_GCC">
1776       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1777       <require condition="CM35P_FP_GCC"/>
1778       <require Dendian="Big-endian"/>
1779     </condition>
1780
1781     <condition id="CM35P_NODSP_NOFPU_GCC">
1782       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1783       <require condition="CM35P_NODSP_NOFPU"/>
1784       <require Tcompiler="GCC"/>
1785     </condition>
1786     <condition id="CM35P_DSP_NOFPU_GCC">
1787       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1788       <require condition="CM35P_DSP_NOFPU"/>
1789       <require Tcompiler="GCC"/>
1790     </condition>
1791     <condition id="CM35P_NODSP_SP_GCC">
1792       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1793       <require condition="CM35P_NODSP_SP"/>
1794       <require Tcompiler="GCC"/>
1795     </condition>
1796     <condition id="CM35P_DSP_SP_GCC">
1797       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1798       <require condition="CM35P_DSP_SP"/>
1799       <require Tcompiler="GCC"/>
1800     </condition>
1801     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1802       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1803       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1804       <require Dendian="Little-endian"/>
1805     </condition>
1806     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1807       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1808       <require condition="CM35P_DSP_NOFPU_GCC"/>
1809       <require Dendian="Little-endian"/>
1810     </condition>
1811     <condition id="CM35P_NODSP_SP_LE_GCC">
1812       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1813       <require condition="CM35P_NODSP_SP_GCC"/>
1814       <require Dendian="Little-endian"/>
1815     </condition>
1816     <condition id="CM35P_DSP_SP_LE_GCC">
1817       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1818       <require condition="CM35P_DSP_SP_GCC"/>
1819       <require Dendian="Little-endian"/>
1820     </condition>
1821
1822     <condition id="ARMv8MBL_GCC">
1823       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1824       <require condition="ARMv8MBL"/>
1825       <require Tcompiler="GCC"/>
1826     </condition>
1827     <condition id="ARMv8MBL_LE_GCC">
1828       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1829       <require condition="ARMv8MBL_GCC"/>
1830       <require Dendian="Little-endian"/>
1831     </condition>
1832     <condition id="ARMv8MBL_BE_GCC">
1833       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1834       <require condition="ARMv8MBL_GCC"/>
1835       <require Dendian="Big-endian"/>
1836     </condition>
1837
1838     <condition id="ARMv8MML_GCC">
1839       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1840       <require condition="ARMv8MML"/>
1841       <require Tcompiler="GCC"/>
1842     </condition>
1843     <condition id="ARMv8MML_LE_GCC">
1844       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1845       <require condition="ARMv8MML_GCC"/>
1846       <require Dendian="Little-endian"/>
1847     </condition>
1848     <condition id="ARMv8MML_BE_GCC">
1849       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1850       <require condition="ARMv8MML_GCC"/>
1851       <require Dendian="Big-endian"/>
1852     </condition>
1853
1854     <condition id="ARMv8MML_FP_GCC">
1855       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1856       <require condition="ARMv8MML_FP"/>
1857       <require Tcompiler="GCC"/>
1858     </condition>
1859     <condition id="ARMv8MML_FP_LE_GCC">
1860       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1861       <require condition="ARMv8MML_FP_GCC"/>
1862       <require Dendian="Little-endian"/>
1863     </condition>
1864     <condition id="ARMv8MML_FP_BE_GCC">
1865       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1866       <require condition="ARMv8MML_FP_GCC"/>
1867       <require Dendian="Big-endian"/>
1868     </condition>
1869
1870     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1871       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1872       <require condition="ARMv8MML_NODSP_NOFPU"/>
1873       <require Tcompiler="GCC"/>
1874     </condition>
1875     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1876       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1877       <require condition="ARMv8MML_DSP_NOFPU"/>
1878       <require Tcompiler="GCC"/>
1879     </condition>
1880     <condition id="ARMv8MML_NODSP_SP_GCC">
1881       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1882       <require condition="ARMv8MML_NODSP_SP"/>
1883       <require Tcompiler="GCC"/>
1884     </condition>
1885     <condition id="ARMv8MML_DSP_SP_GCC">
1886       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1887       <require condition="ARMv8MML_DSP_SP"/>
1888       <require Tcompiler="GCC"/>
1889     </condition>
1890     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1891       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1892       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1893       <require Dendian="Little-endian"/>
1894     </condition>
1895     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1896       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1897       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1898       <require Dendian="Little-endian"/>
1899     </condition>
1900     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1901       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1902       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1903       <require Dendian="Little-endian"/>
1904     </condition>
1905     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1906       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1907       <require condition="ARMv8MML_DSP_SP_GCC"/>
1908       <require Dendian="Little-endian"/>
1909     </condition>
1910
1911     <!-- IAR compiler -->
1912     <condition id="CA_IAR">
1913       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1914       <require condition="ARMv7-A Device"/>
1915       <require Tcompiler="IAR"/>
1916     </condition>
1917
1918     <condition id="CM0_IAR">
1919       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1920       <require condition="CM0"/>
1921       <require Tcompiler="IAR"/>
1922     </condition>
1923     <condition id="CM0_LE_IAR">
1924       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1925       <require condition="CM0_IAR"/>
1926       <require Dendian="Little-endian"/>
1927     </condition>
1928     <condition id="CM0_BE_IAR">
1929       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1930       <require condition="CM0_IAR"/>
1931       <require Dendian="Big-endian"/>
1932     </condition>
1933
1934     <condition id="CM1_IAR">
1935       <description>Cortex-M1 based device for the IAR Compiler</description>
1936       <require condition="CM1"/>
1937       <require Tcompiler="IAR"/>
1938     </condition>
1939     <condition id="CM1_LE_IAR">
1940       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1941       <require condition="CM1_IAR"/>
1942       <require Dendian="Little-endian"/>
1943     </condition>
1944     <condition id="CM1_BE_IAR">
1945       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1946       <require condition="CM1_IAR"/>
1947       <require Dendian="Big-endian"/>
1948     </condition>
1949
1950     <condition id="CM3_IAR">
1951       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1952       <require condition="CM3"/>
1953       <require Tcompiler="IAR"/>
1954     </condition>
1955     <condition id="CM3_LE_IAR">
1956       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1957       <require condition="CM3_IAR"/>
1958       <require Dendian="Little-endian"/>
1959     </condition>
1960     <condition id="CM3_BE_IAR">
1961       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1962       <require condition="CM3_IAR"/>
1963       <require Dendian="Big-endian"/>
1964     </condition>
1965
1966     <condition id="CM4_IAR">
1967       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1968       <require condition="CM4"/>
1969       <require Tcompiler="IAR"/>
1970     </condition>
1971     <condition id="CM4_LE_IAR">
1972       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1973       <require condition="CM4_IAR"/>
1974       <require Dendian="Little-endian"/>
1975     </condition>
1976     <condition id="CM4_BE_IAR">
1977       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1978       <require condition="CM4_IAR"/>
1979       <require Dendian="Big-endian"/>
1980     </condition>
1981
1982     <condition id="CM4_FP_IAR">
1983       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1984       <require condition="CM4_FP"/>
1985       <require Tcompiler="IAR"/>
1986     </condition>
1987     <condition id="CM4_FP_LE_IAR">
1988       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1989       <require condition="CM4_FP_IAR"/>
1990       <require Dendian="Little-endian"/>
1991     </condition>
1992     <condition id="CM4_FP_BE_IAR">
1993       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1994       <require condition="CM4_FP_IAR"/>
1995       <require Dendian="Big-endian"/>
1996     </condition>
1997
1998     <condition id="CM7_IAR">
1999       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2000       <require condition="CM7"/>
2001       <require Tcompiler="IAR"/>
2002     </condition>
2003     <condition id="CM7_LE_IAR">
2004       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2005       <require condition="CM7_IAR"/>
2006       <require Dendian="Little-endian"/>
2007     </condition>
2008     <condition id="CM7_BE_IAR">
2009       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2010       <require condition="CM7_IAR"/>
2011       <require Dendian="Big-endian"/>
2012     </condition>
2013
2014     <condition id="CM7_FP_IAR">
2015       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2016       <require condition="CM7_FP"/>
2017       <require Tcompiler="IAR"/>
2018     </condition>
2019     <condition id="CM7_FP_LE_IAR">
2020       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2021       <require condition="CM7_FP_IAR"/>
2022       <require Dendian="Little-endian"/>
2023     </condition>
2024     <condition id="CM7_FP_BE_IAR">
2025       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2026       <require condition="CM7_FP_IAR"/>
2027       <require Dendian="Big-endian"/>
2028     </condition>
2029
2030     <condition id="CM7_SP_IAR">
2031       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2032       <require condition="CM7_SP"/>
2033       <require Tcompiler="IAR"/>
2034     </condition>
2035     <condition id="CM7_SP_LE_IAR">
2036       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2037       <require condition="CM7_SP_IAR"/>
2038       <require Dendian="Little-endian"/>
2039     </condition>
2040     <condition id="CM7_SP_BE_IAR">
2041       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2042       <require condition="CM7_SP_IAR"/>
2043       <require Dendian="Big-endian"/>
2044     </condition>
2045
2046     <condition id="CM7_DP_IAR">
2047       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2048       <require condition="CM7_DP"/>
2049       <require Tcompiler="IAR"/>
2050     </condition>
2051     <condition id="CM7_DP_LE_IAR">
2052       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2053       <require condition="CM7_DP_IAR"/>
2054       <require Dendian="Little-endian"/>
2055     </condition>
2056     <condition id="CM7_DP_BE_IAR">
2057       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2058       <require condition="CM7_DP_IAR"/>
2059       <require Dendian="Big-endian"/>
2060     </condition>
2061
2062     <condition id="CM23_IAR">
2063       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2064       <require condition="CM23"/>
2065       <require Tcompiler="IAR"/>
2066     </condition>
2067     <condition id="CM23_LE_IAR">
2068       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2069       <require condition="CM23_IAR"/>
2070       <require Dendian="Little-endian"/>
2071     </condition>
2072     <condition id="CM23_BE_IAR">
2073       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
2074       <require condition="CM23_IAR"/>
2075       <require Dendian="Big-endian"/>
2076     </condition>
2077
2078     <condition id="CM33_IAR">
2079       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2080       <require condition="CM33"/>
2081       <require Tcompiler="IAR"/>
2082     </condition>
2083     <condition id="CM33_LE_IAR">
2084       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2085       <require condition="CM33_IAR"/>
2086       <require Dendian="Little-endian"/>
2087     </condition>
2088     <condition id="CM33_BE_IAR">
2089       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
2090       <require condition="CM33_IAR"/>
2091       <require Dendian="Big-endian"/>
2092     </condition>
2093
2094     <condition id="CM33_FP_IAR">
2095       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2096       <require condition="CM33_FP"/>
2097       <require Tcompiler="IAR"/>
2098     </condition>
2099     <condition id="CM33_FP_LE_IAR">
2100       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2101       <require condition="CM33_FP_IAR"/>
2102       <require Dendian="Little-endian"/>
2103     </condition>
2104     <condition id="CM33_FP_BE_IAR">
2105       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2106       <require condition="CM33_FP_IAR"/>
2107       <require Dendian="Big-endian"/>
2108     </condition>
2109
2110     <condition id="CM33_NODSP_NOFPU_IAR">
2111       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2112       <require condition="CM33_NODSP_NOFPU"/>
2113       <require Tcompiler="IAR"/>
2114     </condition>
2115     <condition id="CM33_DSP_NOFPU_IAR">
2116       <description>CM33, DSP, no FPU, IAR Compiler</description>
2117       <require condition="CM33_DSP_NOFPU"/>
2118       <require Tcompiler="IAR"/>
2119     </condition>
2120     <condition id="CM33_NODSP_SP_IAR">
2121       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2122       <require condition="CM33_NODSP_SP"/>
2123       <require Tcompiler="IAR"/>
2124     </condition>
2125     <condition id="CM33_DSP_SP_IAR">
2126       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2127       <require condition="CM33_DSP_SP"/>
2128       <require Tcompiler="IAR"/>
2129     </condition>
2130     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2131       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2132       <require condition="CM33_NODSP_NOFPU_IAR"/>
2133       <require Dendian="Little-endian"/>
2134     </condition>
2135     <condition id="CM33_DSP_NOFPU_LE_IAR">
2136       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2137       <require condition="CM33_DSP_NOFPU_IAR"/>
2138       <require Dendian="Little-endian"/>
2139     </condition>
2140     <condition id="CM33_NODSP_SP_LE_IAR">
2141       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2142       <require condition="CM33_NODSP_SP_IAR"/>
2143       <require Dendian="Little-endian"/>
2144     </condition>
2145     <condition id="CM33_DSP_SP_LE_IAR">
2146       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2147       <require condition="CM33_DSP_SP_IAR"/>
2148       <require Dendian="Little-endian"/>
2149     </condition>
2150
2151     <condition id="CM35P_IAR">
2152       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2153       <require condition="CM35P"/>
2154       <require Tcompiler="IAR"/>
2155     </condition>
2156     <condition id="CM35P_LE_IAR">
2157       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2158       <require condition="CM35P_IAR"/>
2159       <require Dendian="Little-endian"/>
2160     </condition>
2161     <condition id="CM35P_BE_IAR">
2162       <description>Cortex-M35P processor based device in big endian mode for the IAR Compiler</description>
2163       <require condition="CM35P_IAR"/>
2164       <require Dendian="Big-endian"/>
2165     </condition>
2166
2167     <condition id="CM35P_FP_IAR">
2168       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2169       <require condition="CM35P_FP"/>
2170       <require Tcompiler="IAR"/>
2171     </condition>
2172     <condition id="CM35P_FP_LE_IAR">
2173       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2174       <require condition="CM35P_FP_IAR"/>
2175       <require Dendian="Little-endian"/>
2176     </condition>
2177     <condition id="CM35P_FP_BE_IAR">
2178       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2179       <require condition="CM35P_FP_IAR"/>
2180       <require Dendian="Big-endian"/>
2181     </condition>
2182
2183     <condition id="CM35P_NODSP_NOFPU_IAR">
2184       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2185       <require condition="CM35P_NODSP_NOFPU"/>
2186       <require Tcompiler="IAR"/>
2187     </condition>
2188     <condition id="CM35P_DSP_NOFPU_IAR">
2189       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2190       <require condition="CM35P_DSP_NOFPU"/>
2191       <require Tcompiler="IAR"/>
2192     </condition>
2193     <condition id="CM35P_NODSP_SP_IAR">
2194       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2195       <require condition="CM35P_NODSP_SP"/>
2196       <require Tcompiler="IAR"/>
2197     </condition>
2198     <condition id="CM35P_DSP_SP_IAR">
2199       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2200       <require condition="CM35P_DSP_SP"/>
2201       <require Tcompiler="IAR"/>
2202     </condition>
2203     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2204       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2205       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2206       <require Dendian="Little-endian"/>
2207     </condition>
2208     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2209       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2210       <require condition="CM35P_DSP_NOFPU_IAR"/>
2211       <require Dendian="Little-endian"/>
2212     </condition>
2213     <condition id="CM35P_NODSP_SP_LE_IAR">
2214       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2215       <require condition="CM35P_NODSP_SP_IAR"/>
2216       <require Dendian="Little-endian"/>
2217     </condition>
2218     <condition id="CM35P_DSP_SP_LE_IAR">
2219       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2220       <require condition="CM35P_DSP_SP_IAR"/>
2221       <require Dendian="Little-endian"/>
2222     </condition>
2223
2224     <condition id="ARMv8MBL_IAR">
2225       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2226       <require condition="ARMv8MBL"/>
2227       <require Tcompiler="IAR"/>
2228     </condition>
2229     <condition id="ARMv8MBL_LE_IAR">
2230       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2231       <require condition="ARMv8MBL_IAR"/>
2232       <require Dendian="Little-endian"/>
2233     </condition>
2234     <condition id="ARMv8MBL_BE_IAR">
2235       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
2236       <require condition="ARMv8MBL_IAR"/>
2237       <require Dendian="Big-endian"/>
2238     </condition>
2239
2240     <condition id="ARMv8MML_IAR">
2241       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2242       <require condition="ARMv8MML"/>
2243       <require Tcompiler="IAR"/>
2244     </condition>
2245     <condition id="ARMv8MML_LE_IAR">
2246       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2247       <require condition="ARMv8MML_IAR"/>
2248       <require Dendian="Little-endian"/>
2249     </condition>
2250     <condition id="ARMv8MML_BE_IAR">
2251       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
2252       <require condition="ARMv8MML_IAR"/>
2253       <require Dendian="Big-endian"/>
2254     </condition>
2255
2256     <condition id="ARMv8MML_FP_IAR">
2257       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2258       <require condition="ARMv8MML_FP"/>
2259       <require Tcompiler="IAR"/>
2260     </condition>
2261     <condition id="ARMv8MML_FP_LE_IAR">
2262       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2263       <require condition="ARMv8MML_FP_IAR"/>
2264       <require Dendian="Little-endian"/>
2265     </condition>
2266     <condition id="ARMv8MML_FP_BE_IAR">
2267       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2268       <require condition="ARMv8MML_FP_IAR"/>
2269       <require Dendian="Big-endian"/>
2270     </condition>
2271
2272     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2273       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2274       <require condition="ARMv8MML_NODSP_NOFPU"/>
2275       <require Tcompiler="IAR"/>
2276     </condition>
2277     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2278       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2279       <require condition="ARMv8MML_DSP_NOFPU"/>
2280       <require Tcompiler="IAR"/>
2281     </condition>
2282     <condition id="ARMv8MML_NODSP_SP_IAR">
2283       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2284       <require condition="ARMv8MML_NODSP_SP"/>
2285       <require Tcompiler="IAR"/>
2286     </condition>
2287     <condition id="ARMv8MML_DSP_SP_IAR">
2288       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2289       <require condition="ARMv8MML_DSP_SP"/>
2290       <require Tcompiler="IAR"/>
2291     </condition>
2292     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2293       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2294       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2295       <require Dendian="Little-endian"/>
2296     </condition>
2297     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2298       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2299       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2300       <require Dendian="Little-endian"/>
2301     </condition>
2302     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2303       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2304       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2305       <require Dendian="Little-endian"/>
2306     </condition>
2307     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2308       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2309       <require condition="ARMv8MML_DSP_SP_IAR"/>
2310       <require Dendian="Little-endian"/>
2311     </condition>
2312
2313     <!-- conditions selecting single devices and CMSIS Core -->
2314     <!-- used for component startup, GCC version is used for C-Startup -->
2315     <condition id="ARMCM0 CMSIS">
2316       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2317       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2318       <require Cclass="CMSIS" Cgroup="CORE"/>
2319     </condition>
2320     <condition id="ARMCM0 CMSIS GCC">
2321       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
2322       <require condition="ARMCM0 CMSIS"/>
2323       <require condition="GCC"/>
2324     </condition>
2325
2326     <condition id="ARMCM0+ CMSIS">
2327       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2328       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2329       <require Cclass="CMSIS" Cgroup="CORE"/>
2330     </condition>
2331     <condition id="ARMCM0+ CMSIS GCC">
2332       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
2333       <require condition="ARMCM0+ CMSIS"/>
2334       <require condition="GCC"/>
2335     </condition>
2336
2337     <condition id="ARMCM1 CMSIS">
2338       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2339       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2340       <require Cclass="CMSIS" Cgroup="CORE"/>
2341     </condition>
2342     <condition id="ARMCM1 CMSIS GCC">
2343       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
2344       <require condition="ARMCM1 CMSIS"/>
2345       <require condition="GCC"/>
2346     </condition>
2347
2348     <condition id="ARMCM3 CMSIS">
2349       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2350       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2351       <require Cclass="CMSIS" Cgroup="CORE"/>
2352     </condition>
2353     <condition id="ARMCM3 CMSIS GCC">
2354       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
2355       <require condition="ARMCM3 CMSIS"/>
2356       <require condition="GCC"/>
2357     </condition>
2358
2359     <condition id="ARMCM4 CMSIS">
2360       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2361       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2362       <require Cclass="CMSIS" Cgroup="CORE"/>
2363     </condition>
2364     <condition id="ARMCM4 CMSIS GCC">
2365       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
2366       <require condition="ARMCM4 CMSIS"/>
2367       <require condition="GCC"/>
2368     </condition>
2369
2370     <condition id="ARMCM7 CMSIS">
2371       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2372       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2373       <require Cclass="CMSIS" Cgroup="CORE"/>
2374     </condition>
2375     <condition id="ARMCM7 CMSIS GCC">
2376       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2377       <require condition="ARMCM7 CMSIS"/>
2378       <require condition="GCC"/>
2379     </condition>
2380
2381     <condition id="ARMCM23 CMSIS">
2382       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2383       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2384       <require Cclass="CMSIS" Cgroup="CORE"/>
2385     </condition>
2386     <condition id="ARMCM23 CMSIS GCC">
2387       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2388       <require condition="ARMCM23 CMSIS"/>
2389       <require condition="GCC"/>
2390     </condition>
2391
2392     <condition id="ARMCM33 CMSIS">
2393       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2394       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2395       <require Cclass="CMSIS" Cgroup="CORE"/>
2396     </condition>
2397     <condition id="ARMCM33 CMSIS GCC">
2398       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2399       <require condition="ARMCM33 CMSIS"/>
2400       <require condition="GCC"/>
2401     </condition>
2402
2403     <condition id="ARMCM35P CMSIS">
2404       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2405       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2406       <require Cclass="CMSIS" Cgroup="CORE"/>
2407     </condition>
2408     <condition id="ARMCM35P CMSIS GCC">
2409       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core requiring GCC</description>
2410       <require condition="ARMCM35P CMSIS"/>
2411       <require condition="GCC"/>
2412     </condition>
2413
2414     <condition id="ARMSC000 CMSIS">
2415       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2416       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2417       <require Cclass="CMSIS" Cgroup="CORE"/>
2418     </condition>
2419     <condition id="ARMSC000 CMSIS GCC">
2420       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2421       <require condition="ARMSC000 CMSIS"/>
2422       <require condition="GCC"/>
2423     </condition>
2424
2425     <condition id="ARMSC300 CMSIS">
2426       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2427       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2428       <require Cclass="CMSIS" Cgroup="CORE"/>
2429     </condition>
2430     <condition id="ARMSC300 CMSIS GCC">
2431       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2432       <require condition="ARMSC300 CMSIS"/>
2433       <require condition="GCC"/>
2434     </condition>
2435
2436     <condition id="ARMv8MBL CMSIS">
2437       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2438       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2439       <require Cclass="CMSIS" Cgroup="CORE"/>
2440     </condition>
2441     <condition id="ARMv8MBL CMSIS GCC">
2442       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2443       <require condition="ARMv8MBL CMSIS"/>
2444       <require condition="GCC"/>
2445     </condition>
2446
2447     <condition id="ARMv8MML CMSIS">
2448       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2449       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2450       <require Cclass="CMSIS" Cgroup="CORE"/>
2451     </condition>
2452     <condition id="ARMv8MML CMSIS GCC">
2453       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2454       <require condition="ARMv8MML CMSIS"/>
2455       <require condition="GCC"/>
2456     </condition>
2457
2458     <condition id="ARMv81MML CMSIS">
2459       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2460       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2461       <require Cclass="CMSIS" Cgroup="CORE"/>
2462     </condition>
2463
2464     <condition id="ARMCA5 CMSIS">
2465       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2466       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2467       <require Cclass="CMSIS" Cgroup="CORE"/>
2468     </condition>
2469
2470     <condition id="ARMCA7 CMSIS">
2471       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2472       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2473       <require Cclass="CMSIS" Cgroup="CORE"/>
2474     </condition>
2475
2476     <condition id="ARMCA9 CMSIS">
2477       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2478       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2479       <require Cclass="CMSIS" Cgroup="CORE"/>
2480     </condition>
2481
2482     <!-- CMSIS DSP -->
2483     <condition id="CMSIS DSP">
2484       <description>Components required for DSP</description>
2485       <require condition="ARMv6_7_8-M Device"/>
2486       <require condition="ARMCC GCC IAR"/>
2487       <require Cclass="CMSIS" Cgroup="CORE"/>
2488     </condition>
2489
2490     <!-- CMSIS NN -->
2491     <condition id="CMSIS NN">
2492       <description>Components required for NN</description>
2493       <require condition="CMSIS DSP"/>
2494     </condition>
2495
2496     <!-- RTOS RTX -->
2497     <condition id="RTOS RTX">
2498       <description>Components required for RTOS RTX</description>
2499       <require condition="ARMv6_7-M Device"/>
2500       <require condition="ARMCC GCC IAR"/>
2501       <require Cclass="Device" Cgroup="Startup"/>
2502       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2503     </condition>
2504     <condition id="RTOS RTX IFX">
2505       <description>Components required for RTOS RTX IFX</description>
2506       <require condition="ARMv6_7-M Device"/>
2507       <require condition="ARMCC GCC IAR"/>
2508       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2509       <require Cclass="Device" Cgroup="Startup"/>
2510       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2511     </condition>
2512     <condition id="RTOS RTX5">
2513       <description>Components required for RTOS RTX5</description>
2514       <require condition="ARMv6_7_8-M Device"/>
2515       <require condition="ARMCC GCC IAR"/>
2516       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2517     </condition>
2518     <condition id="RTOS2 RTX5">
2519       <description>Components required for RTOS2 RTX5</description>
2520       <require condition="ARMv6_7_8-M Device"/>
2521       <require condition="ARMCC GCC IAR"/>
2522       <require Cclass="CMSIS"  Cgroup="CORE"/>
2523       <require Cclass="Device" Cgroup="Startup"/>
2524     </condition>
2525     <condition id="RTOS2 RTX5 v7-A">
2526       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2527       <require condition="ARMv7-A Device"/>
2528       <require condition="ARMCC GCC IAR"/>
2529       <require Cclass="CMSIS"  Cgroup="CORE"/>
2530       <require Cclass="Device" Cgroup="Startup"/>
2531       <require Cclass="Device" Cgroup="OS Tick"/>
2532       <require Cclass="Device" Cgroup="IRQ Controller"/>
2533     </condition>
2534     <condition id="RTOS2 RTX5 Lib">
2535       <description>Components required for RTOS2 RTX5 Library</description>
2536       <require condition="ARMv6_7_8-M Device"/>
2537       <require condition="ARMCC GCC IAR"/>
2538       <require Cclass="CMSIS"  Cgroup="CORE"/>
2539       <require Cclass="Device" Cgroup="Startup"/>
2540     </condition>
2541     <condition id="RTOS2 RTX5 NS">
2542       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2543       <require condition="ARMv8-M TZ Device"/>
2544       <require condition="ARMCC GCC IAR"/>
2545       <require Cclass="CMSIS"  Cgroup="CORE"/>
2546       <require Cclass="Device" Cgroup="Startup"/>
2547     </condition>
2548
2549     <!-- OS Tick -->
2550     <condition id="OS Tick PTIM">
2551       <description>Components required for OS Tick Private Timer</description>
2552       <require condition="CA5_CA9"/>
2553       <require Cclass="Device" Cgroup="IRQ Controller"/>
2554     </condition>
2555
2556     <condition id="OS Tick GTIM">
2557       <description>Components required for OS Tick Generic Physical Timer</description>
2558       <require condition="CA7"/>
2559       <require Cclass="Device" Cgroup="IRQ Controller"/>
2560     </condition>
2561
2562   </conditions>
2563
2564   <components>
2565     <!-- CMSIS-Core component -->
2566     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.3"  condition="ARMv6_7_8-M Device" >
2567       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2568       <files>
2569         <!-- CPU independent -->
2570         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2571         <file category="include" name="CMSIS/Core/Include/"/>
2572         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2573         <!-- Code template -->
2574         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2575         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2576       </files>
2577     </component>
2578
2579     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.2"  condition="ARMv7-A Device" >
2580       <description>CMSIS-CORE for Cortex-A</description>
2581       <files>
2582         <!-- CPU independent -->
2583         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2584         <file category="include" name="CMSIS/Core_A/Include/"/>
2585       </files>
2586     </component>
2587
2588     <!-- CMSIS-Startup components -->
2589     <!-- Cortex-M0 -->
2590     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2591       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2592       <files>
2593         <!-- include folder / device header file -->
2594         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2595         <!-- startup / system file -->
2596         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2597         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2598         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2599         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2600         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2601       </files>
2602     </component>
2603     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2604       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2605       <files>
2606         <!-- include folder / device header file -->
2607         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2608         <!-- startup / system file -->
2609         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2610         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2611         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2612       </files>
2613     </component>
2614
2615     <!-- Cortex-M0+ -->
2616     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2617       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2618       <files>
2619         <!-- include folder / device header file -->
2620         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2621         <!-- startup / system file -->
2622         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2623         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2624         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2625         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2626         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2627       </files>
2628     </component>
2629     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2630       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2631       <files>
2632         <!-- include folder / device header file -->
2633         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2634         <!-- startup / system file -->
2635         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2636         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2637         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2638       </files>
2639     </component>
2640
2641     <!-- Cortex-M1 -->
2642     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM1 CMSIS">
2643       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2644       <files>
2645         <!-- include folder / device header file -->
2646         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2647         <!-- startup / system file -->
2648         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2649         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.0.0" attr="config" condition="GCC"/>
2650         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2651         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2652         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2653       </files>
2654     </component>
2655     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM1 CMSIS GCC">
2656       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2657       <files>
2658         <!-- include folder / device header file -->
2659         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2660         <!-- startup / system file -->
2661         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.0.0" attr="config" condition="GCC"/>
2662         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2663         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2664       </files>
2665     </component>
2666
2667     <!-- Cortex-M3 -->
2668     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2669       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2670       <files>
2671         <!-- include folder / device header file -->
2672         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2673         <!-- startup / system file -->
2674         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2675         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2676         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2677         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2678         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2679       </files>
2680     </component>
2681     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2682       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2683       <files>
2684         <!-- include folder / device header file -->
2685         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2686         <!-- startup / system file -->
2687         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2688         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2689         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2690       </files>
2691     </component>
2692
2693     <!-- Cortex-M4 -->
2694     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2695       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2696       <files>
2697         <!-- include folder / device header file -->
2698         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2699         <!-- startup / system file -->
2700         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2701         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2702         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2703         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2704         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2705       </files>
2706     </component>
2707     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2708       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2709       <files>
2710         <!-- include folder / device header file -->
2711         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2712         <!-- startup / system file -->
2713         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2714         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2715         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2716       </files>
2717     </component>
2718
2719     <!-- Cortex-M7 -->
2720     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2721       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2722       <files>
2723         <!-- include folder / device header file -->
2724         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2725         <!-- startup / system file -->
2726         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2727         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2728         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2729         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2730         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2731       </files>
2732     </component>
2733     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2734       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2735       <files>
2736         <!-- include folder / device header file -->
2737         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2738         <!-- startup / system file -->
2739         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2740         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2741         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2742       </files>
2743     </component>
2744
2745     <!-- Cortex-M23 -->
2746     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2747       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2748       <files>
2749         <!-- include folder / device header file -->
2750         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2751         <!-- startup / system file -->
2752         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2753         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2754         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2755         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2756         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2757         <!-- SAU configuration -->
2758         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2759       </files>
2760     </component>
2761     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2762       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2763       <files>
2764         <!-- include folder / device header file -->
2765         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2766         <!-- startup / system file -->
2767         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2768         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2769         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2770         <!-- SAU configuration -->
2771         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2772       </files>
2773     </component>
2774
2775     <!-- Cortex-M33 -->
2776     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2777       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2778       <files>
2779         <!-- include folder / device header file -->
2780         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2781         <!-- startup / system file -->
2782         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2783         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2784         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2785         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2786         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2787         <!-- SAU configuration -->
2788         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2789       </files>
2790     </component>
2791     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2792       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2793       <files>
2794         <!-- include folder / device header file -->
2795         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2796         <!-- startup / system file -->
2797         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2798         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2799         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2800         <!-- SAU configuration -->
2801         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2802       </files>
2803     </component>
2804
2805     <!-- Cortex-M35P -->
2806     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM35P CMSIS">
2807       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2808       <files>
2809         <!-- include folder / device header file -->
2810         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2811         <!-- startup / system file -->
2812         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2813         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.0" attr="config" condition="GCC"/>
2814         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2815         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="IAR"/>
2816         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2817         <!-- SAU configuration -->
2818         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2819       </files>
2820     </component>
2821     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM35P CMSIS GCC">
2822       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2823       <files>
2824         <!-- include folder / device header file -->
2825         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2826         <!-- startup / system file -->
2827         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.c"         version="1.0.0" attr="config" condition="GCC"/>
2828         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2829         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2830         <!-- SAU configuration -->
2831         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2832       </files>
2833     </component>
2834
2835     <!-- Cortex-SC000 -->
2836     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2837       <description>System and Startup for Generic Arm SC000 device</description>
2838       <files>
2839         <!-- include folder / device header file -->
2840         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2841         <!-- startup / system file -->
2842         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2843         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2844         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2845         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2846         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2847       </files>
2848     </component>
2849     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2850       <description>System and Startup for Generic Arm SC000 device</description>
2851       <files>
2852         <!-- include folder / device header file -->
2853         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2854         <!-- startup / system file -->
2855         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2856         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2857         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2858       </files>
2859     </component>
2860
2861     <!-- Cortex-SC300 -->
2862     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2863       <description>System and Startup for Generic Arm SC300 device</description>
2864       <files>
2865         <!-- include folder / device header file -->
2866         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2867         <!-- startup / system file -->
2868         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2869         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2870         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2871         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2872         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2873       </files>
2874     </component>
2875     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2876       <description>System and Startup for Generic Arm SC300 device</description>
2877       <files>
2878         <!-- include folder / device header file -->
2879         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2880         <!-- startup / system file -->
2881         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2882         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2883         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2884       </files>
2885     </component>
2886
2887     <!-- ARMv8MBL -->
2888     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2889       <description>System and Startup for Generic Armv8-M Baseline device</description>
2890       <files>
2891         <!-- include folder / device header file -->
2892         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2893         <!-- startup / system file -->
2894         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2895         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2896         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2897         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2898         <!-- SAU configuration -->
2899         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2900       </files>
2901     </component>
2902     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2903       <description>System and Startup for Generic Armv8-M Baseline device</description>
2904       <files>
2905         <!-- include folder / device header file -->
2906         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2907         <!-- startup / system file -->
2908         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2909         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2910         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2911         <!-- SAU configuration -->
2912         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2913       </files>
2914     </component>
2915
2916     <!-- ARMv8MML -->
2917     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2918       <description>System and Startup for Generic Armv8-M Mainline device</description>
2919       <files>
2920         <!-- include folder / device header file -->
2921         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2922         <!-- startup / system file -->
2923         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2924         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2925         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2926         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2927         <!-- SAU configuration -->
2928         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2929       </files>
2930     </component>
2931     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2932       <description>System and Startup for Generic Armv8-M Mainline device</description>
2933       <files>
2934         <!-- include folder / device header file -->
2935         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2936         <!-- startup / system file -->
2937         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2938         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2939         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2940         <!-- SAU configuration -->
2941         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2942       </files>
2943     </component>
2944
2945     <!-- ARMv81MML -->
2946     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv81MML CMSIS">
2947       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2948       <files>
2949         <!-- include folder / device header file -->
2950         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2951         <file category="header"       name="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h"/>
2952         <!-- startup / system file -->
2953         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/ARM/startup_ARMv81MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2954         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML.sct"               version="1.0.0" attr="config" condition="ARMCC"/>
2955         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2956         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2957         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/IAR/startup_ARMv81MML.s"         version="1.0.0" attr="config" condition="IAR"/>
2958         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2959         <!-- SAU configuration -->
2960         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2961       </files>
2962     </component>
2963     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv81MML CMSIS">
2964       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2965       <files>
2966         <!-- include folder / device header file -->
2967         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2968         <!-- startup / system file -->
2969         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/ARM/startup_ARMv81MML.c"         version="1.0.0" attr="config" condition="ARMCC"/>
2970         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML.sct"               version="1.0.0" attr="config" condition="ARMCC"/>
2971         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2972         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2973         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/IAR/startup_ARMv81MML.c"         version="1.0.0" attr="config" condition="IAR"/>
2974         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2975         <!-- SAU configuration -->
2976         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2977       </files>
2978     </component>
2979
2980     <!-- Cortex-A5 -->
2981     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2982       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2983       <files>
2984         <!-- include folder / device header file -->
2985         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2986         <!-- startup / system / mmu files -->
2987         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2988         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2989         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2990         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2991         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2992         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2993         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2994         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2995         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2996         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2997         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2998         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2999
3000       </files>
3001     </component>
3002
3003     <!-- Cortex-A7 -->
3004     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3005       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3006       <files>
3007         <!-- include folder / device header file -->
3008         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3009         <!-- startup / system / mmu files -->
3010         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3011         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3012         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3013         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3014         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3015         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3016         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3017         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3018         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
3019         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
3020         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
3021         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
3022       </files>
3023     </component>
3024
3025     <!-- Cortex-A9 -->
3026     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3027       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3028       <files>
3029         <!-- include folder / device header file -->
3030         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3031         <!-- startup / system / mmu files -->
3032         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3033         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3034         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3035         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3036         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3037         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3038         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3039         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3040         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
3041         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
3042         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
3043         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
3044       </files>
3045     </component>
3046
3047     <!-- IRQ Controller -->
3048     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3049       <description>IRQ Controller implementation using GIC</description>
3050       <files>
3051         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3052       </files>
3053     </component>
3054
3055     <!-- OS Tick -->
3056     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3057       <description>OS Tick implementation using Private Timer</description>
3058       <files>
3059         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3060       </files>
3061     </component>
3062
3063     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3064       <description>OS Tick implementation using Generic Physical Timer</description>
3065       <files>
3066         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3067       </files>
3068     </component>
3069
3070     <!-- CMSIS-DSP component -->
3071     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.5.5" isDefaultVariant="true" condition="CMSIS DSP">
3072       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3073       <files>
3074         <!-- CPU independent -->
3075         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3076         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3077
3078         <!-- CPU and Compiler dependent -->
3079         <!-- ARMCC -->
3080         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3081         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3082         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3083         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3084         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3085         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3086         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3087         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3088         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3089         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3090         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3091         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3092         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3093         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3094         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3095         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3096
3097         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3098         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3099         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3100         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3101         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3102         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3103         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3104         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3105         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3106         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3107         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3108         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3109         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3110         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3111         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3112         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3113
3114         <!-- GCC -->
3115         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3116         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3117         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3118         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3119         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3120         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3121         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3122         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3123
3124         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3125         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3126         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3127         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3128         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3129         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3130         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3131         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3132         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3133         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3134         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3135         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3136         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3137         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3138         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3139         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3140
3141         <!-- IAR -->
3142         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3143         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3144         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3145         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3146         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3147         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3148         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3149         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3150         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3151         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3152         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3153         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3154         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3155         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3156         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3157         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3158
3159         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3160         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3161         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3162         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3163         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3164         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3165         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3166         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3167         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3168         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3169         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3170         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3171         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3172         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3173         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3174         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3175
3176       </files>
3177     </component>
3178     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.5.5" condition="CMSIS DSP">
3179       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3180       <files>
3181         <!-- CPU independent -->
3182         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3183         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3184
3185         <!-- RTX sources (core) -->
3186         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3187         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3188         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3189         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3190         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3191         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3192         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3193         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3194         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3195         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3196
3197       </files>
3198     </component>
3199
3200     <!-- CMSIS-NN component -->
3201     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.1.0" condition="CMSIS NN">
3202       <description>CMSIS-NN Neural Network Library</description>
3203       <files>
3204         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3205         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3206
3207         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3208         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3209         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3210         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3211
3212         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3213         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3214         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3215         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3216         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3217         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3218         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3219         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3220         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3221         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3222         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3223         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3224
3225         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3226         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3227         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3228         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3229         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3230         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3231
3232         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3233         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3234         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3235         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3236         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3237
3238         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3239
3240         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3241         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3242       </files>
3243     </component>
3244
3245     <!-- CMSIS-RTOS Keil RTX component -->
3246     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3247       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3248       <RTE_Components_h>
3249         <!-- the following content goes into file 'RTE_Components.h' -->
3250         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3251         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3252       </RTE_Components_h>
3253       <files>
3254         <!-- CPU independent -->
3255         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3256         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3257         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3258
3259         <!-- RTX templates -->
3260         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3261         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3262         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3263         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3264         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3265         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3266         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3267         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3268         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3269         <!-- tool-chain specific template file -->
3270         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3271         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3272         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3273
3274         <!-- CPU and Compiler dependent -->
3275         <!-- ARMCC -->
3276         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3277         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3278         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3279         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3280         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3281         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3282         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3283         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3284         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3285         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3286         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3287         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3288         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3289         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3290         <!-- GCC -->
3291         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3292         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3293         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3294         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3295         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3296         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3297         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3298         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3299         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3300         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3301         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3302         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3303         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3304         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3305         <!-- IAR -->
3306         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3307         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3308         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3309         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3310         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3311         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3312         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3313         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3314         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3315         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3316         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3317         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3318         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3319         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3320       </files>
3321     </component>
3322     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3323     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
3324       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3325       <RTE_Components_h>
3326         <!-- the following content goes into file 'RTE_Components.h' -->
3327         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3328         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3329       </RTE_Components_h>
3330       <files>
3331         <!-- CPU independent -->
3332         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3333         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3334         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3335
3336         <!-- RTX templates -->
3337         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3338         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3339         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3340         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3341         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3342         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3343         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3344         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3345         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3346         <!-- tool-chain specific template file -->
3347         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3348         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3349         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3350
3351         <!-- CPU and Compiler dependent -->
3352         <!-- ARMCC -->
3353         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3354         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3355         <!-- GCC -->
3356         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3357         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3358         <!-- IAR -->
3359       </files>
3360     </component>
3361
3362     <!-- CMSIS-RTOS Keil RTX5 component -->
3363     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.0" Capiversion="1.0.0" condition="RTOS RTX5">
3364       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3365       <RTE_Components_h>
3366         <!-- the following content goes into file 'RTE_Components.h' -->
3367         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3368         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3369       </RTE_Components_h>
3370       <files>
3371         <!-- RTX header file -->
3372         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3373         <!-- RTX compatibility module for API V1 -->
3374         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3375       </files>
3376     </component>
3377
3378     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3379     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3380       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3381       <RTE_Components_h>
3382         <!-- the following content goes into file 'RTE_Components.h' -->
3383         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3384         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3385       </RTE_Components_h>
3386       <files>
3387         <!-- RTX documentation -->
3388         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3389
3390         <!-- RTX header files -->
3391         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3392
3393         <!-- RTX configuration -->
3394         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3395         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3396
3397         <!-- RTX templates -->
3398         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3399         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3400         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3401         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3402         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3403         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3404         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3405         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3406         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3407         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3408
3409         <!-- RTX library configuration -->
3410         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3411
3412         <!-- RTX libraries (CPU and Compiler dependent) -->
3413         <!-- ARMCC -->
3414         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3415         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3416         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3417         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3418         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3419         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3420         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3421         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3422         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3423         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3424         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3425         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3426         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3427         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3428         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3429         <!-- GCC -->
3430         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3431         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3432         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3433         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3434         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3435         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3436         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3437         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3438         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3439         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3440         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3441         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3442         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3443         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3444         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3445         <!-- IAR -->
3446         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3447         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3448         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3449         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3450         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3451         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3452         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3453         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3454         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3455         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3456         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3457         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3458         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3459         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3460         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3461       </files>
3462     </component>
3463     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3464       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3465       <RTE_Components_h>
3466         <!-- the following content goes into file 'RTE_Components.h' -->
3467         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3468         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3469         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3470       </RTE_Components_h>
3471       <files>
3472         <!-- RTX documentation -->
3473         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3474
3475         <!-- RTX header files -->
3476         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3477
3478         <!-- RTX configuration -->
3479         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3480         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3481
3482         <!-- RTX templates -->
3483         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3484         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3485         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3486         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3487         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3488         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3489         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3490         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3491         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3492         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3493
3494         <!-- RTX library configuration -->
3495         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3496
3497         <!-- RTX libraries (CPU and Compiler dependent) -->
3498         <!-- ARMCC -->
3499         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3500         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3501         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3502         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3503         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3504         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3505         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3506         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3507         <!-- GCC -->
3508         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3509         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3510         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3512         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3513         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3514         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3515         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3516         <!-- IAR -->
3517         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3521         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3523         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3524         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3525       </files>
3526     </component>
3527     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
3528       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3529       <RTE_Components_h>
3530         <!-- the following content goes into file 'RTE_Components.h' -->
3531         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3532         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3533         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3534       </RTE_Components_h>
3535       <files>
3536         <!-- RTX documentation -->
3537         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3538
3539         <!-- RTX header files -->
3540         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3541
3542         <!-- RTX configuration -->
3543         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3544         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3545
3546         <!-- RTX templates -->
3547         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3548         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3549         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3550         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3551         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3552         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3553         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3554         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3555         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3556         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3557
3558         <!-- RTX sources (core) -->
3559         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3560         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3561         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3562         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3563         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3564         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3565         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3569         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3571         <!-- RTX sources (library configuration) -->
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3573         <!-- RTX sources (handlers ARMCC) -->
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3578         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3589         <!-- RTX sources (handlers GCC) -->
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3596         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3597         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3603         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3604         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3605         <!-- RTX sources (handlers IAR) -->
3606         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3607         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3608         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3609         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3610         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3611         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3612         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3613         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3614         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3615         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3616         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3617         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3618         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3619         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3620         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3621         <!-- OS Tick (SysTick) -->
3622         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3623       </files>
3624     </component>
3625     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3626       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3627       <RTE_Components_h>
3628         <!-- the following content goes into file 'RTE_Components.h' -->
3629         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3630         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3631         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3632       </RTE_Components_h>
3633       <files>
3634         <!-- RTX documentation -->
3635         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3636
3637         <!-- RTX header files -->
3638         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3639
3640         <!-- RTX configuration -->
3641         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3642         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3643
3644         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3645
3646         <!-- RTX templates -->
3647         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3648         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3649         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3650         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3651         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3652         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3653         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3654         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3655         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3656         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3657
3658         <!-- RTX sources (core) -->
3659         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3660         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3661         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3662         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3663         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3664         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3665         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3669         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3671         <!-- RTX sources (library configuration) -->
3672         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3673         <!-- RTX sources (handlers ARMCC) -->
3674         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3676         <!-- RTX sources (handlers GCC) -->
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3678         <!-- RTX sources (handlers IAR) -->
3679         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3680       </files>
3681     </component>
3682     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3683       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3684       <RTE_Components_h>
3685         <!-- the following content goes into file 'RTE_Components.h' -->
3686         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3687         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3688         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3689         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3690       </RTE_Components_h>
3691       <files>
3692         <!-- RTX documentation -->
3693         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3694
3695         <!-- RTX header files -->
3696         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3697
3698         <!-- RTX configuration -->
3699         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3700         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3701
3702         <!-- RTX templates -->
3703         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3704         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3705         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3706         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3707         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3708         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3709         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3710         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3711         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3712         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3713
3714         <!-- RTX sources (core) -->
3715         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3716         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3717         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3718         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3719         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3720         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3721         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3722         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3724         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3725         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3726         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3727         <!-- RTX sources (library configuration) -->
3728         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3729         <!-- RTX sources (ARMCC handlers) -->
3730         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3731         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3732         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3733         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3734         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3735         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3736         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3737         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3738         <!-- RTX sources (GCC handlers) -->
3739         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3740         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3741         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3742         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3743         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3745         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3747         <!-- RTX sources (IAR handlers) -->
3748         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3752         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3754         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3755         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3756         <!-- OS Tick (SysTick) -->
3757         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3758       </files>
3759     </component>
3760
3761     <!-- CMSIS-Driver Custom components -->
3762     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3763       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3764       <files>
3765         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3766         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3767       </files>
3768     </component>
3769     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3770       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3771       <files>
3772         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3773         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3774       </files>
3775     </component>
3776     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3777       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3778       <files>
3779         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3780         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3781       </files>
3782     </component>
3783     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3784       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3785       <files>
3786         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3787         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3788       </files>
3789     </component>
3790     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3791       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3792       <files>
3793         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3794         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3795       </files>
3796     </component>
3797     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3798       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3799       <files>
3800         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3801         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3802       </files>
3803     </component>
3804     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3805       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3806       <files>
3807         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3808         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3809       </files>
3810     </component>
3811     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3812       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3813       <files>
3814         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3815         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3816       </files>
3817     </component>
3818     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3819       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3820       <files>
3821         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3822         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3823         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3824         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3825       </files>
3826     </component>
3827     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3828       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3829       <files>
3830         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3831         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3832       </files>
3833     </component>
3834     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3835       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3836       <files>
3837         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3838         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3839       </files>
3840     </component>
3841     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3842       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3843       <files>
3844         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3845         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3846       </files>
3847     </component>
3848     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3849       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3850       <files>
3851         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3852         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3853       </files>
3854     </component>
3855     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0-beta" Capiversion="1.0.0-beta">
3856       <description>Access to #include Driver_WiFi.h file</description>
3857       <files>
3858         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3859         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3860       </files>
3861     </component>
3862   </components>
3863
3864   <boards>
3865     <board name="uVision Simulator" vendor="Keil">
3866       <description>uVision Simulator</description>
3867       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3868       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3869       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3870       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3871       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3872       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3873       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3874       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3875       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3876       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3877       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3878       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3879       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3880       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3881       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3882       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3883       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3884       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3885       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3886       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3887       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3888       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3889       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3890       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3891     </board>
3892
3893     <board name="EWARM Simulator" vendor="IAR">
3894       <description>EWARM Simulator</description>
3895       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3896       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3897       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3898       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3899       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3900       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3901       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3902       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3903       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3904       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3905       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3906       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3907       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3908       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3909       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3910       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3911       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3912       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3913       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3914       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3915       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3916       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3917       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3918       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3919     </board>
3920   </boards>
3921
3922   <examples>
3923     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3924       <description>DSP_Lib Class Marks example</description>
3925       <board name="uVision Simulator" vendor="Keil"/>
3926       <project>
3927         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3928       </project>
3929       <attributes>
3930         <component Cclass="CMSIS" Cgroup="CORE"/>
3931         <component Cclass="CMSIS" Cgroup="DSP"/>
3932         <component Cclass="Device" Cgroup="Startup"/>
3933         <category>Getting Started</category>
3934       </attributes>
3935     </example>
3936
3937     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3938       <description>DSP_Lib Convolution example</description>
3939       <board name="uVision Simulator" vendor="Keil"/>
3940       <project>
3941         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3942       </project>
3943       <attributes>
3944         <component Cclass="CMSIS" Cgroup="CORE"/>
3945         <component Cclass="CMSIS" Cgroup="DSP"/>
3946         <component Cclass="Device" Cgroup="Startup"/>
3947         <category>Getting Started</category>
3948       </attributes>
3949     </example>
3950
3951     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3952       <description>DSP_Lib Dotproduct example</description>
3953       <board name="uVision Simulator" vendor="Keil"/>
3954       <project>
3955         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3956       </project>
3957       <attributes>
3958         <component Cclass="CMSIS" Cgroup="CORE"/>
3959         <component Cclass="CMSIS" Cgroup="DSP"/>
3960         <component Cclass="Device" Cgroup="Startup"/>
3961         <category>Getting Started</category>
3962       </attributes>
3963     </example>
3964
3965     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3966       <description>DSP_Lib FFT Bin example</description>
3967       <board name="uVision Simulator" vendor="Keil"/>
3968       <project>
3969         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3970       </project>
3971       <attributes>
3972         <component Cclass="CMSIS" Cgroup="CORE"/>
3973         <component Cclass="CMSIS" Cgroup="DSP"/>
3974         <component Cclass="Device" Cgroup="Startup"/>
3975         <category>Getting Started</category>
3976       </attributes>
3977     </example>
3978
3979     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3980       <description>DSP_Lib FIR example</description>
3981       <board name="uVision Simulator" vendor="Keil"/>
3982       <project>
3983         <environment name="uv" load="arm_fir_example.uvprojx"/>
3984       </project>
3985       <attributes>
3986         <component Cclass="CMSIS" Cgroup="CORE"/>
3987         <component Cclass="CMSIS" Cgroup="DSP"/>
3988         <component Cclass="Device" Cgroup="Startup"/>
3989         <category>Getting Started</category>
3990       </attributes>
3991     </example>
3992
3993     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3994       <description>DSP_Lib Graphic Equalizer example</description>
3995       <board name="uVision Simulator" vendor="Keil"/>
3996       <project>
3997         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3998       </project>
3999       <attributes>
4000         <component Cclass="CMSIS" Cgroup="CORE"/>
4001         <component Cclass="CMSIS" Cgroup="DSP"/>
4002         <component Cclass="Device" Cgroup="Startup"/>
4003         <category>Getting Started</category>
4004       </attributes>
4005     </example>
4006
4007     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4008       <description>DSP_Lib Linear Interpolation example</description>
4009       <board name="uVision Simulator" vendor="Keil"/>
4010       <project>
4011         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4012       </project>
4013       <attributes>
4014         <component Cclass="CMSIS" Cgroup="CORE"/>
4015         <component Cclass="CMSIS" Cgroup="DSP"/>
4016         <component Cclass="Device" Cgroup="Startup"/>
4017         <category>Getting Started</category>
4018       </attributes>
4019     </example>
4020
4021     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4022       <description>DSP_Lib Matrix example</description>
4023       <board name="uVision Simulator" vendor="Keil"/>
4024       <project>
4025         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4026       </project>
4027       <attributes>
4028         <component Cclass="CMSIS" Cgroup="CORE"/>
4029         <component Cclass="CMSIS" Cgroup="DSP"/>
4030         <component Cclass="Device" Cgroup="Startup"/>
4031         <category>Getting Started</category>
4032       </attributes>
4033     </example>
4034
4035     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4036       <description>DSP_Lib Signal Convergence example</description>
4037       <board name="uVision Simulator" vendor="Keil"/>
4038       <project>
4039         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4040       </project>
4041       <attributes>
4042         <component Cclass="CMSIS" Cgroup="CORE"/>
4043         <component Cclass="CMSIS" Cgroup="DSP"/>
4044         <component Cclass="Device" Cgroup="Startup"/>
4045         <category>Getting Started</category>
4046       </attributes>
4047     </example>
4048
4049     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4050       <description>DSP_Lib Sinus/Cosinus example</description>
4051       <board name="uVision Simulator" vendor="Keil"/>
4052       <project>
4053         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4054       </project>
4055       <attributes>
4056         <component Cclass="CMSIS" Cgroup="CORE"/>
4057         <component Cclass="CMSIS" Cgroup="DSP"/>
4058         <component Cclass="Device" Cgroup="Startup"/>
4059         <category>Getting Started</category>
4060       </attributes>
4061     </example>
4062
4063     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4064       <description>DSP_Lib Variance example</description>
4065       <board name="uVision Simulator" vendor="Keil"/>
4066       <project>
4067         <environment name="uv" load="arm_variance_example.uvprojx"/>
4068       </project>
4069       <attributes>
4070         <component Cclass="CMSIS" Cgroup="CORE"/>
4071         <component Cclass="CMSIS" Cgroup="DSP"/>
4072         <component Cclass="Device" Cgroup="Startup"/>
4073         <category>Getting Started</category>
4074       </attributes>
4075     </example>
4076
4077     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4078       <description>Neural Network CIFAR10 example</description>
4079       <board name="uVision Simulator" vendor="Keil"/>
4080       <project>
4081         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4082       </project>
4083       <attributes>
4084         <component Cclass="CMSIS" Cgroup="CORE"/>
4085         <component Cclass="CMSIS" Cgroup="DSP"/>
4086         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4087         <component Cclass="Device" Cgroup="Startup"/>
4088         <category>Getting Started</category>
4089       </attributes>
4090     </example>
4091
4092     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4093       <description>Neural Network CIFAR10 example</description>
4094       <board name="EWARM Simulator" vendor="IAR"/>
4095       <project>
4096         <environment name="iar" load="NN-example-cifar10.ewp"/>
4097       </project>
4098       <attributes>
4099         <component Cclass="CMSIS" Cgroup="CORE"/>
4100         <component Cclass="CMSIS" Cgroup="DSP"/>
4101         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4102         <component Cclass="Device" Cgroup="Startup"/>
4103         <category>Getting Started</category>
4104       </attributes>
4105     </example>
4106
4107     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4108       <description>Neural Network GRU example</description>
4109       <board name="uVision Simulator" vendor="Keil"/>
4110       <project>
4111         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4112       </project>
4113       <attributes>
4114         <component Cclass="CMSIS" Cgroup="CORE"/>
4115         <component Cclass="CMSIS" Cgroup="DSP"/>
4116         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4117         <component Cclass="Device" Cgroup="Startup"/>
4118         <category>Getting Started</category>
4119       </attributes>
4120     </example>
4121
4122     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4123       <description>Neural Network GRU example</description>
4124       <board name="EWARM Simulator" vendor="IAR"/>
4125       <project>
4126         <environment name="iar" load="NN-example-gru.ewp"/>
4127       </project>
4128       <attributes>
4129         <component Cclass="CMSIS" Cgroup="CORE"/>
4130         <component Cclass="CMSIS" Cgroup="DSP"/>
4131         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4132         <component Cclass="Device" Cgroup="Startup"/>
4133         <category>Getting Started</category>
4134       </attributes>
4135     </example>
4136
4137     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4138       <description>CMSIS-RTOS2 Blinky example</description>
4139       <board name="uVision Simulator" vendor="Keil"/>
4140       <project>
4141         <environment name="uv" load="Blinky.uvprojx"/>
4142       </project>
4143       <attributes>
4144         <component Cclass="CMSIS" Cgroup="CORE"/>
4145         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4146         <component Cclass="Device" Cgroup="Startup"/>
4147         <category>Getting Started</category>
4148       </attributes>
4149     </example>
4150
4151     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4152       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4153       <board name="uVision Simulator" vendor="Keil"/>
4154       <project>
4155         <environment name="uv" load="Blinky.uvprojx"/>
4156       </project>
4157       <attributes>
4158         <component Cclass="CMSIS" Cgroup="CORE"/>
4159         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4160         <component Cclass="Device" Cgroup="Startup"/>
4161         <category>Getting Started</category>
4162       </attributes>
4163     </example>
4164
4165     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4166       <description>CMSIS-RTOS2 Message Queue Example</description>
4167       <board name="uVision Simulator" vendor="Keil"/>
4168       <project>
4169         <environment name="uv" load="MsqQueue.uvprojx"/>
4170       </project>
4171       <attributes>
4172         <component Cclass="CMSIS" Cgroup="CORE"/>
4173         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4174         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4175         <component Cclass="Device" Cgroup="Startup"/>
4176         <category>Getting Started</category>
4177       </attributes>
4178     </example>
4179
4180     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4181       <description>CMSIS-RTOS2 Memory Pool Example</description>
4182       <board name="uVision Simulator" vendor="Keil"/>
4183       <project>
4184         <environment name="uv" load="MemPool.uvprojx"/>
4185       </project>
4186       <attributes>
4187         <component Cclass="CMSIS" Cgroup="CORE"/>
4188         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4189         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4190         <component Cclass="Device" Cgroup="Startup"/>
4191         <category>Getting Started</category>
4192       </attributes>
4193     </example>
4194
4195     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4196       <description>Bare-metal secure/non-secure example without RTOS</description>
4197       <board name="uVision Simulator" vendor="Keil"/>
4198       <project>
4199         <environment name="uv" load="NoRTOS.uvmpw"/>
4200       </project>
4201       <attributes>
4202         <component Cclass="CMSIS" Cgroup="CORE"/>
4203         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4204         <component Cclass="Device" Cgroup="Startup"/>
4205         <category>Getting Started</category>
4206       </attributes>
4207     </example>
4208
4209     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4210       <description>Secure/non-secure RTOS example with thread context management</description>
4211       <board name="uVision Simulator" vendor="Keil"/>
4212       <project>
4213         <environment name="uv" load="RTOS.uvmpw"/>
4214       </project>
4215       <attributes>
4216         <component Cclass="CMSIS" Cgroup="CORE"/>
4217         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4218         <component Cclass="Device" Cgroup="Startup"/>
4219         <category>Getting Started</category>
4220       </attributes>
4221     </example>
4222
4223     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4224       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4225       <board name="uVision Simulator" vendor="Keil"/>
4226       <project>
4227         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4228       </project>
4229       <attributes>
4230         <component Cclass="CMSIS" Cgroup="CORE"/>
4231         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4232         <component Cclass="Device" Cgroup="Startup"/>
4233         <category>Getting Started</category>
4234       </attributes>
4235     </example>
4236
4237   </examples>
4238
4239 </package>