begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.0-RC1">
  12           Changed open source license to Apache 2.0
  13       CMSIS_Core:
  14        - Added support for Cortex-M23 and Cortex-M33.
  15        - Added ARMv8-M device configurations for mainline and baseline.
  16            - Added CMSE support and thread context management for TrustZone for ARMv8-M
  17        - Added cmsis_compiler.h to unify compiler behaviour.
  18        - Updated function SCB_EnableICache (for Cortex-M7).
  19        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  20       CMSIS-RTOS:
  21         - bug fix in RTX 4.82 (see revision history for details)
  22       CMSIS-RTOS2:
  23         - new API including compatibility layer to CMSIS-RTOS
  24                 - reference implementation based on RTX5
  25                 - supports all Cortex-M variants including TrustZone for ARMv8-M
  26       CMSIS-SVD:
  27        - reworked SVD format documentation
  28        - removed SVD file database documentation as SVD files are distributed in packs
  29        - updated SVDConv for Win32 and Linux
  30       CMSIS-DSP:
  31        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  32        - Added DSP libraries build projects to CMSIS pack.
  33     </release>
  34
  35     <release version="4.5.0" date="2015-10-28">
  36       - CMSIS-Core     4.30.0  (see revision history for details)
  37       - CMSIS-DAP      1.1.0   (unchanged)
  38       - CMSIS-Driver   2.04.0  (see revision history for details)
  39       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  40       - CMSIS-PACK     1.4.1   (see revision history for details)
  41       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  42       - CMSIS-SVD      1.3.1   (see revision history for details)
  43     </release>
  44     <release version="4.4.0" date="2015-09-11">
  45       - CMSIS-Core     4.20   (see revision history for details)
  46       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  47       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  48       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  49       - CMSIS-RTOS
  50         -- API         1.02   (unchanged)
  51         -- RTX         4.79   (see revision history for details)
  52       - CMSIS-SVD      1.3.0  (see revision history for details)
  53       - CMSIS-DAP      1.1.0  (extended with SWO support)
  54     </release>
  55     <release version="4.3.0" date="2015-03-20">
  56       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  57       - CMSIS-DSP      1.4.5  (see revision history for details)
  58       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  59       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  60       - CMSIS-RTOS
  61         -- API         1.02   (unchanged)
  62         -- RTX         4.78   (see revision history for details)
  63       - CMSIS-SVD      1.2    (unchanged)
  64     </release>
  65     <release version="4.2.0" date="2014-09-24">
  66       Adding Cortex-M7 support
  67       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
  68       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
  69       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
  70       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
  71       - CMSIS-RTOS RTX 4.75  (see revision history for details)
  72     </release>
  73     <release version="4.1.1" date="2014-06-30">
  74       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
  75     </release>
  76     <release version="4.1.0" date="2014-06-12">
  77       - CMSIS-Driver   2.02  (incompatible update)
  78       - CMSIS-Pack     1.3   (see revision history for details)
  79       - CMSIS-DSP      1.4.2 (unchanged)
  80       - CMSIS-Core     3.30  (unchanged)
  81       - CMSIS-RTOS RTX 4.74  (unchanged)
  82       - CMSIS-RTOS API 1.02  (unchanged)
  83       - CMSIS-SVD      1.10  (unchanged)
  84       PACK:
  85       - removed G++ specific files from PACK
  86       - added Component Startup variant "C Startup"
  87       - added Pack Checking Utility
  88       - updated conditions to reflect tool-chain dependency
  89       - added Taxonomy for Graphics
  90       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
  91     </release>
  92     <release version="4.0.0">
  93       - CMSIS-Driver   2.00  Preliminary (incompatible update)
  94       - CMSIS-Pack     1.1   Preliminary
  95       - CMSIS-DSP      1.4.2 (see revision history for details)
  96       - CMSIS-Core     3.30  (see revision history for details)
  97       - CMSIS-RTOS RTX 4.74  (see revision history for details)
  98       - CMSIS-RTOS API 1.02  (unchanged)
  99       - CMSIS-SVD      1.10  (unchanged)
 100     </release>
 101     <release version="3.20.4">
 102       - CMSIS-RTOS 4.74 (see revision history for details)
 103       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 104     </release>
 105     <release version="3.20.3">
 106       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 107       - CMSIS-RTOS 4.73 (see revision history for details)
 108     </release>
 109     <release version="3.20.2">
 110       - CMSIS-Pack documentation has been added
 111       - CMSIS-Drivers header and documentation have been added to PACK
 112       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 113     </release>
 114     <release version="3.20.1">
 115       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 116       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 117     </release>
 118     <release version="3.20.0">
 119       The software portions that are deployed in the application program are now under a BSD license which allows usage
 120       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 121       The individual components have been update as listed below:
 122       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 123       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 124       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 125       - CMSIS-SVD is unchanged.
 126     </release>
 127   </releases>
 128
 129   <taxonomy>
 130     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 131     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 132     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 133     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 134     <description Cclass="File System">File Drive Support and File System</description>
 135     <description Cclass="Graphics">Graphical User Interface</description>
 136     <description Cclass="Network">Network Stack using Internet Protocols</description>
 137     <description Cclass="USB">Universal Serial Bus Stack</description>
 138     <description Cclass="Compiler">ARM Compiler Software Extensions</description>
 139   </taxonomy>
 140
 141   <devices>
 142     <!-- ******************************  Cortex-M0  ****************************** -->
 143     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 144       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 145       <description>
 146 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 147 - simple, easy-to-use programmers model
 148 - highly efficient ultra-low power operation
 149 - excellent code density
 150 - deterministic, high-performance interrupt handling
 151 - upward compatibility with the rest of the Cortex-M processor family.
 152       </description>
 153       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 154       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 155       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 156       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 157
 158       <device Dname="ARMCM0">
 159         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 160         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 161       </device>
 162     </family>
 163
 164     <!-- ******************************  Cortex-M0P  ****************************** -->
 165     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 166       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 167       <description>
 168 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 169 - simple, easy-to-use programmers model
 170 - highly efficient ultra-low power operation
 171 - excellent code density
 172 - deterministic, high-performance interrupt handling
 173 - upward compatibility with the rest of the Cortex-M processor family.
 174       </description>
 175       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 176       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 177       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 178       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 179
 180       <device Dname="ARMCM0P">
 181         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 182         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 183       </device>
 184     </family>
 185
 186     <!-- ******************************  Cortex-M3  ****************************** -->
 187     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 188       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 189       <description>
 190 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 191 - simple, easy-to-use programmers model
 192 - highly efficient ultra-low power operation
 193 - excellent code density
 194 - deterministic, high-performance interrupt handling
 195 - upward compatibility with the rest of the Cortex-M processor family.
 196       </description>
 197       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 198       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 199       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 200       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 201
 202       <device Dname="ARMCM3">
 203         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 204         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 205       </device>
 206     </family>
 207
 208     <!-- ******************************  Cortex-M4  ****************************** -->
 209     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 210       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 211       <description>
 212 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 213 - simple, easy-to-use programmers model
 214 - highly efficient ultra-low power operation
 215 - excellent code density
 216 - deterministic, high-performance interrupt handling
 217 - upward compatibility with the rest of the Cortex-M processor family.
 218       </description>
 219       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 220       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 221       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 222       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 223
 224       <device Dname="ARMCM4">
 225         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 226         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 227       </device>
 228
 229       <device Dname="ARMCM4_FP">
 230         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 231         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 232       </device>
 233     </family>
 234
 235     <!-- ******************************  Cortex-M7  ****************************** -->
 236     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 237       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 238       <description>
 239 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 240 - simple, easy-to-use programmers model
 241 - highly efficient ultra-low power operation
 242 - excellent code density
 243 - deterministic, high-performance interrupt handling
 244 - upward compatibility with the rest of the Cortex-M processor family.
 245       </description>
 246       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 247       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 248       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 249       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 250
 251       <device Dname="ARMCM7">
 252         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 253         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 254       </device>
 255
 256       <device Dname="ARMCM7_SP">
 257         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 258         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 259       </device>
 260
 261       <device Dname="ARMCM7_DP">
 262         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 263         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 264       </device>
 265     </family>
 266
 267     <!-- ******************************  Cortex-M23  ********************** -->
 268     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 269       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 270       <description>
 271 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 272 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 273 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 274       </description>
 275       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 276       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 277       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 278       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 279       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 280       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 281
 282       <device Dname="ARMCM23">
 283         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 284         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 285       </device>
 286
 287       <device Dname="ARMCM23_TZ">
 288         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 289         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 290       </device>
 291     </family>
 292
 293     <!-- ******************************  Cortex-M33  ****************************** -->
 294     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 295       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 296       <description>
 297 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 298 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 299       </description>
 300       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 301       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 302       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 303       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 304       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 305       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 306
 307       <device Dname="ARMCM33">
 308         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 309         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 310       </device>
 311
 312       <device Dname="ARMCM33_TZ">
 313         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 314         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 315       </device>
 316
 317       <device Dname="ARMCM33_DSP_FP">
 318         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 319         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 320       </device>
 321
 322       <device Dname="ARMCM33_DSP_FP_TZ">
 323         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 324         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 325       </device>
 326     </family>
 327
 328     <!-- ******************************  ARMSC000  ****************************** -->
 329     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 330       <description>
 331 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 332 - simple, easy-to-use programmers model
 333 - highly efficient ultra-low power operation
 334 - excellent code density
 335 - deterministic, high-performance interrupt handling
 336       </description>
 337       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 338       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 339       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 340       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 341
 342       <device Dname="ARMSC000">
 343         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 344         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 345       </device>
 346     </family>
 347
 348     <!-- ******************************  ARMSC300  ****************************** -->
 349     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 350       <description>
 351 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 352 - simple, easy-to-use programmers model
 353 - highly efficient ultra-low power operation
 354 - excellent code density
 355 - deterministic, high-performance interrupt handling
 356       </description>
 357       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 358       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 359       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 360       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 361
 362       <device Dname="ARMSC300">
 363         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 364         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 365       </device>
 366     </family>
 367
 368     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 369     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 370       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 371       <description>
 372 ARMv8-M Baseline based device with TrustZone
 373       </description>
 374       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 375       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 376       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 377       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 378       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 379       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 380
 381       <device Dname="ARMv8MBL">
 382         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 383         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 384       </device>
 385     </family>
 386
 387     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 388     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 389       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 390       <description>
 391 ARMv8-M Mainline based device with TrustZone
 392       </description>
 393       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 394       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 395       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 396       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 397       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 398       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 399
 400       <device Dname="ARMv8MML">
 401         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 402         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 403       </device>
 404
 405       <device Dname="ARMv8MML_DSP">
 406         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 407         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 408       </device>
 409
 410       <device Dname="ARMv8MML_SP">
 411         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 412         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 413       </device>
 414
 415       <device Dname="ARMv8MML_DSP_SP">
 416         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 417         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 418       </device>
 419
 420       <device Dname="ARMv8MML_DP">
 421         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 422         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 423       </device>
 424
 425       <device Dname="ARMv8MML_DSP_DP">
 426         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 427         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 428       </device>
 429     </family>
 430
 431   </devices>
 432
 433
 434   <apis>
 435     <!-- CMSIS-RTOS API -->
 436     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
 437       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 438       <files>
 439         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 440       </files>
 441     </api>
 442     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
 443       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 444       <files>
 445         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 446       </files>
 447     </api>
 448     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
 449       <description>USART Driver API for Cortex-M</description>
 450       <files>
 451         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 452         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 453       </files>
 454     </api>
 455     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
 456       <description>SPI Driver API for Cortex-M</description>
 457       <files>
 458         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 459         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 460       </files>
 461     </api>
 462     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
 463       <description>SAI Driver API for Cortex-M</description>
 464       <files>
 465         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 466         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 467       </files>
 468     </api>
 469     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
 470       <description>I2C Driver API for Cortex-M</description>
 471       <files>
 472         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 473         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 474       </files>
 475     </api>
 476     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
 477       <description>CAN Driver API for Cortex-M</description>
 478       <files>
 479         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 480         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 481       </files>
 482     </api>
 483     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
 484       <description>Flash Driver API for Cortex-M</description>
 485       <files>
 486         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 487         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 488       </files>
 489     </api>
 490     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
 491       <description>MCI Driver API for Cortex-M</description>
 492       <files>
 493         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 494         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 495       </files>
 496     </api>
 497     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
 498       <description>NAND Flash Driver API for Cortex-M</description>
 499       <files>
 500         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 501         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 502       </files>
 503     </api>
 504     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
 505       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 506       <files>
 507         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 508         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 509         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 510       </files>
 511     </api>
 512     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
 513       <description>Ethernet MAC Driver API for Cortex-M</description>
 514       <files>
 515         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 516         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 517       </files>
 518     </api>
 519     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
 520       <description>Ethernet PHY Driver API for Cortex-M</description>
 521       <files>
 522         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 523         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 524       </files>
 525     </api>
 526     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
 527       <description>USB Device Driver API for Cortex-M</description>
 528       <files>
 529         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 530         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 531       </files>
 532     </api>
 533     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
 534       <description>USB Host Driver API for Cortex-M</description>
 535       <files>
 536         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 537         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 538       </files>
 539     </api>
 540   </apis>
 541
 542   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 543   <conditions>
 544     <!-- compiler -->
 545     <condition id="ARMCC">
 546       <require Tcompiler="ARMCC"/>
 547     </condition>
 548     <condition id="GCC">
 549       <require Tcompiler="GCC"/>
 550     </condition>
 551     <condition id="IAR">
 552       <require Tcompiler="IAR"/>
 553     </condition>
 554     <condition id="ARMCC GCC">
 555       <accept Tcompiler="ARMCC"/>
 556       <accept Tcompiler="GCC"/>
 557     </condition>
 558     <condition id="ARMCC GCC IAR">
 559       <accept Tcompiler="ARMCC"/>
 560       <accept Tcompiler="GCC"/>
 561       <accept Tcompiler="IAR"/>
 562     </condition>
 563
 564     <!-- ARM architecture -->
 565     <condition id="ARMv6-M Device">
 566       <description>ARMv6-M architecture based device</description>
 567       <accept Dcore="Cortex-M0"/>
 568       <accept Dcore="Cortex-M0+"/>
 569       <accept Dcore="SC000"/>
 570     </condition>
 571     <condition id="ARMv7-M Device">
 572       <description>ARMv7-M architecture based device</description>
 573       <accept Dcore="Cortex-M3"/>
 574       <accept Dcore="Cortex-M4"/>
 575       <accept Dcore="Cortex-M7"/>
 576       <accept Dcore="SC300"/>
 577     </condition>
 578     <condition id="ARMv8-M Device">
 579       <description>ARMv8-M architecture based device</description>
 580       <accept Dcore="ARMV8MBL"/>
 581       <accept Dcore="ARMV8MML"/>
 582       <accept Dcore="Cortex-M23"/>
 583       <accept Dcore="Cortex-M33"/>
 584     </condition>
 585     <condition id="ARMv8-M TZ Device">
 586       <description>ARMv8-M architecture based device with TrustZone</description>
 587       <require condition="ARMv8-M Device"/>
 588       <require Dtz="TZ"/>
 589     </condition>
 590     <condition id="ARMv6_7-M Device">
 591       <description>ARMv6_7-M architecture based device</description>
 592       <accept condition="ARMv6-M Device"/>
 593       <accept condition="ARMv7-M Device"/>
 594     </condition>
 595     <condition id="ARMv6_7_8-M Device">
 596       <description>ARMv6_7_8-M architecture based device</description>
 597       <accept condition="ARMv6-M Device"/>
 598       <accept condition="ARMv7-M Device"/>
 599       <accept condition="ARMv8-M Device"/>
 600     </condition>
 601
 602     <!-- ARM core -->
 603     <condition id="CM0">
 604       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 605       <accept Dcore="Cortex-M0"/>
 606       <accept Dcore="Cortex-M0+"/>
 607       <accept Dcore="SC000"/>
 608     </condition>
 609     <condition id="CM3">
 610       <description>Cortex-M3 or SC300 processor based device</description>
 611       <accept Dcore="Cortex-M3"/>
 612       <accept Dcore="SC300"/>
 613     </condition>
 614     <condition id="CM4">
 615       <description>Cortex-M4 processor based device</description>
 616       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 617     </condition>
 618     <condition id="CM4_FP">
 619       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 620       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 621     </condition>
 622     <condition id="CM7">
 623       <description>Cortex-M7 processor based device</description>
 624       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 625     </condition>
 626     <condition id="CM7_FP">
 627       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 628       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 629       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 630     </condition>
 631     <condition id="CM7_SP">
 632       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 633       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 634     </condition>
 635     <condition id="CM7_DP">
 636       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 637       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 638     </condition>
 639     <condition id="CM23">
 640       <description>Cortex-M23 processor based device</description>
 641       <require Dcore="Cortex-M23"/>
 642     </condition>
 643     <condition id="CM33">
 644       <description>Cortex-M33 processor based device</description>
 645       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 646     </condition>
 647     <condition id="CM33_DSP">
 648       <description>Cortex-M33 processor based device with DSP extension</description>
 649       <require Dcore="Cortex-M33" Dfpu="NO_FPU" Ddsp="DSP"/>
 650     </condition>
 651     <condition id="CM33_FP">
 652       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 653       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 654     </condition>
 655     <condition id="CM33_SP">
 656       <description>Cortex-M33 processor based device using Floating Point Unit (SP)</description>
 657       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="NO_DSP"/>
 658     </condition>
 659     <condition id="CM33_DSP_SP">
 660       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP)</description>
 661       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="DSP"/>
 662     </condition>
 663     <condition id="ARMv8MBL">
 664       <description>ARMv8-M Baseline processor based device</description>
 665       <require Dcore="ARMV8MBL"/>
 666     </condition>
 667     <condition id="ARMv8MML">
 668       <description>ARMv8-M Mainline processor based device</description>
 669       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 670     </condition>
 671     <condition id="ARMv8MML_DSP">
 672       <description>ARMv8-M Mainline processor based device with DSP extension</description>
 673       <require Dcore="ARMV8MML" Dfpu="NO_FPU" Ddsp="DSP"/>
 674     </condition>
 675     <condition id="ARMv8MML_FP">
 676       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 677       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 678       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 679     </condition>
 680     <condition id="ARMv8MML_SP">
 681       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
 682       <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 683     </condition>
 684     <condition id="ARMv8MML_DSP_SP">
 685       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP)</description>
 686       <require Dcore="ARMV8MML" Dfpu="SP_FPU" Ddsp="DSP"/>
 687     </condition>
 688     <condition id="ARMv8MML_DP">
 689       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
 690       <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 691     </condition>
 692     <condition id="ARMv8MML_DSP_DP">
 693       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP)</description>
 694       <require Dcore="ARMV8MML" Dfpu="DP_FPU" Ddsp="DSP"/>
 695     </condition>
 696
 697     <!-- ARMCC compiler -->
 698     <condition id="CM0_ARMCC">
 699       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 700       <require condition="CM0"/>
 701       <require Tcompiler="ARMCC"/>
 702     </condition>
 703     <condition id="CM0_LE_ARMCC">
 704       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 705       <require condition="CM0_ARMCC"/>
 706       <require Dendian="Little-endian"/>
 707     </condition>
 708     <condition id="CM0_BE_ARMCC">
 709       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 710       <require condition="CM0_ARMCC"/>
 711       <require Dendian="Big-endian"/>
 712     </condition>
 713
 714     <condition id="CM3_ARMCC">
 715       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 716       <require condition="CM3"/>
 717       <require Tcompiler="ARMCC"/>
 718     </condition>
 719     <condition id="CM3_LE_ARMCC">
 720       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 721       <require condition="CM3_ARMCC"/>
 722       <require Dendian="Little-endian"/>
 723     </condition>
 724     <condition id="CM3_BE_ARMCC">
 725       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 726       <require condition="CM3_ARMCC"/>
 727       <require Dendian="Big-endian"/>
 728     </condition>
 729
 730     <condition id="CM4_ARMCC">
 731       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 732       <require condition="CM4"/>
 733       <require Tcompiler="ARMCC"/>
 734     </condition>
 735     <condition id="CM4_LE_ARMCC">
 736       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 737       <require condition="CM4_ARMCC"/>
 738       <require Dendian="Little-endian"/>
 739     </condition>
 740     <condition id="CM4_BE_ARMCC">
 741       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 742       <require condition="CM4_ARMCC"/>
 743       <require Dendian="Big-endian"/>
 744     </condition>
 745
 746     <condition id="CM4_FP_ARMCC">
 747       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 748       <require condition="CM4_FP"/>
 749       <require Tcompiler="ARMCC"/>
 750     </condition>
 751     <condition id="CM4_FP_LE_ARMCC">
 752       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 753       <require condition="CM4_FP_ARMCC"/>
 754       <require Dendian="Little-endian"/>
 755     </condition>
 756     <condition id="CM4_FP_BE_ARMCC">
 757       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 758       <require condition="CM4_FP_ARMCC"/>
 759       <require Dendian="Big-endian"/>
 760     </condition>
 761
 762     <!-- XMC 4000 Series devices from Infineon require a special library -->
 763     <condition id="CM4_LE_ARMCC_STD">
 764       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 765       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 766       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 767       <require Tcompiler="ARMCC"/>
 768     </condition>
 769     <condition id="CM4_LE_ARMCC_IFX">
 770       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 771       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 772       <require Tcompiler="ARMCC"/>
 773     </condition>
 774     <condition id="CM4_FP_LE_ARMCC_STD">
 775       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 776       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 777       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 778       <require Tcompiler="ARMCC"/>
 779     </condition>
 780     <condition id="CM4_FP_LE_ARMCC_IFX">
 781       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 782       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 783       <require Tcompiler="ARMCC"/>
 784     </condition>
 785
 786     <condition id="CM7_ARMCC">
 787       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 788       <require condition="CM7"/>
 789       <require Tcompiler="ARMCC"/>
 790     </condition>
 791     <condition id="CM7_LE_ARMCC">
 792       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 793       <require condition="CM7_ARMCC"/>
 794       <require Dendian="Little-endian"/>
 795     </condition>
 796     <condition id="CM7_BE_ARMCC">
 797       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 798       <require condition="CM7_ARMCC"/>
 799       <require Dendian="Big-endian"/>
 800     </condition>
 801
 802     <condition id="CM7_FP_ARMCC">
 803       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 804       <require condition="CM7_FP"/>
 805       <require Tcompiler="ARMCC"/>
 806     </condition>
 807     <condition id="CM7_FP_LE_ARMCC">
 808       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 809       <require condition="CM7_FP_ARMCC"/>
 810       <require Dendian="Little-endian"/>
 811     </condition>
 812     <condition id="CM7_FP_BE_ARMCC">
 813       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 814       <require condition="CM7_FP_ARMCC"/>
 815       <require Dendian="Big-endian"/>
 816     </condition>
 817
 818     <condition id="CM7_SP_ARMCC">
 819       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 820       <require condition="CM7_SP"/>
 821       <require Tcompiler="ARMCC"/>
 822     </condition>
 823     <condition id="CM7_SP_LE_ARMCC">
 824       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 825       <require condition="CM7_SP_ARMCC"/>
 826       <require Dendian="Little-endian"/>
 827     </condition>
 828     <condition id="CM7_SP_BE_ARMCC">
 829       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 830       <require condition="CM7_SP_ARMCC"/>
 831       <require Dendian="Big-endian"/>
 832     </condition>
 833
 834     <condition id="CM7_DP_ARMCC">
 835       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 836       <require condition="CM7_DP"/>
 837       <require Tcompiler="ARMCC"/>
 838     </condition>
 839     <condition id="CM7_DP_LE_ARMCC">
 840       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 841       <require condition="CM7_DP_ARMCC"/>
 842       <require Dendian="Little-endian"/>
 843     </condition>
 844     <condition id="CM7_DP_BE_ARMCC">
 845       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 846       <require condition="CM7_DP_ARMCC"/>
 847       <require Dendian="Big-endian"/>
 848     </condition>
 849
 850     <condition id="CM23_ARMCC">
 851       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 852       <require condition="CM23"/>
 853       <require Tcompiler="ARMCC"/>
 854     </condition>
 855     <condition id="CM23_LE_ARMCC">
 856       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 857       <require condition="CM23_ARMCC"/>
 858       <require Dendian="Little-endian"/>
 859     </condition>
 860     <condition id="CM23_BE_ARMCC">
 861       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 862       <require condition="CM23_ARMCC"/>
 863       <require Dendian="Big-endian"/>
 864     </condition>
 865
 866     <condition id="CM33_ARMCC">
 867       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 868       <require condition="CM33"/>
 869       <require Tcompiler="ARMCC"/>
 870     </condition>
 871     <condition id="CM33_LE_ARMCC">
 872       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 873       <require condition="CM33_ARMCC"/>
 874       <require Dendian="Little-endian"/>
 875     </condition>
 876     <condition id="CM33_BE_ARMCC">
 877       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 878       <require condition="CM33_ARMCC"/>
 879       <require Dendian="Big-endian"/>
 880     </condition>
 881
 882     <condition id="CM33_DSP_ARMCC">
 883       <description>Cortex-M33 processor based device with DSP extension for the ARM Compiler</description>
 884       <require condition="CM33_DSP"/>
 885       <require Tcompiler="ARMCC"/>
 886     </condition>
 887     <condition id="CM33_DSP_LE_ARMCC">
 888       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the ARM Compiler</description>
 889       <require condition="CM33_DSP_ARMCC"/>
 890       <require Dendian="Little-endian"/>
 891     </condition>
 892     <condition id="CM33_DSP_BE_ARMCC">
 893       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the ARM Compiler</description>
 894       <require condition="CM33_DSP_ARMCC"/>
 895       <require Dendian="Big-endian"/>
 896     </condition>
 897
 898     <condition id="CM33_FP_ARMCC">
 899       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 900       <require condition="CM33_FP"/>
 901       <require Tcompiler="ARMCC"/>
 902     </condition>
 903     <condition id="CM33_FP_LE_ARMCC">
 904       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 905       <require condition="CM33_FP_ARMCC"/>
 906       <require Dendian="Little-endian"/>
 907     </condition>
 908     <condition id="CM33_FP_BE_ARMCC">
 909       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 910       <require condition="CM33_FP_ARMCC"/>
 911       <require Dendian="Big-endian"/>
 912     </condition>
 913
 914     <condition id="CM33_SP_ARMCC">
 915       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 916       <require condition="CM33_SP"/>
 917       <require Tcompiler="ARMCC"/>
 918     </condition>
 919     <condition id="CM33_SP_LE_ARMCC">
 920       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 921       <require condition="CM33_SP_ARMCC"/>
 922       <require Dendian="Little-endian"/>
 923     </condition>
 924     <condition id="CM33_SP_BE_ARMCC">
 925       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 926       <require condition="CM33_SP_ARMCC"/>
 927       <require Dendian="Big-endian"/>
 928     </condition>
 929
 930     <condition id="CM33_DSP_SP_ARMCC">
 931       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
 932       <require condition="CM33_DSP_SP"/>
 933       <require Tcompiler="ARMCC"/>
 934     </condition>
 935     <condition id="CM33_DSP_SP_LE_ARMCC">
 936       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 937       <require condition="CM33_DSP_SP_ARMCC"/>
 938       <require Dendian="Little-endian"/>
 939     </condition>
 940     <condition id="CM33_DSP_SP_BE_ARMCC">
 941       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 942       <require condition="CM33_DSP_SP_ARMCC"/>
 943       <require Dendian="Big-endian"/>
 944     </condition>
 945
 946     <condition id="ARMv8MBL_ARMCC">
 947       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
 948       <require condition="ARMv8MBL"/>
 949       <require Tcompiler="ARMCC"/>
 950     </condition>
 951     <condition id="ARMv8MBL_LE_ARMCC">
 952       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
 953       <require condition="ARMv8MBL_ARMCC"/>
 954       <require Dendian="Little-endian"/>
 955     </condition>
 956     <condition id="ARMv8MBL_BE_ARMCC">
 957       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
 958       <require condition="ARMv8MBL_ARMCC"/>
 959       <require Dendian="Big-endian"/>
 960     </condition>
 961
 962     <condition id="ARMv8MML_ARMCC">
 963       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
 964       <require condition="ARMv8MML"/>
 965       <require Tcompiler="ARMCC"/>
 966     </condition>
 967     <condition id="ARMv8MML_LE_ARMCC">
 968       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
 969       <require condition="ARMv8MML_ARMCC"/>
 970       <require Dendian="Little-endian"/>
 971     </condition>
 972     <condition id="ARMv8MML_BE_ARMCC">
 973       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
 974       <require condition="ARMv8MML_ARMCC"/>
 975       <require Dendian="Big-endian"/>
 976     </condition>
 977
 978     <condition id="ARMv8MML_DSP_ARMCC">
 979       <description>ARMv8-M Mainline processor based device with DSP extension for the ARM Compiler</description>
 980       <require condition="ARMv8MML_DSP"/>
 981       <require Tcompiler="ARMCC"/>
 982     </condition>
 983     <condition id="ARMv8MML_DSP_LE_ARMCC">
 984       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the ARM Compiler</description>
 985       <require condition="ARMv8MML_DSP_ARMCC"/>
 986       <require Dendian="Little-endian"/>
 987     </condition>
 988     <condition id="ARMv8MML_DSP_BE_ARMCC">
 989       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the ARM Compiler</description>
 990       <require condition="ARMv8MML_DSP_ARMCC"/>
 991       <require Dendian="Big-endian"/>
 992     </condition>
 993
 994     <condition id="ARMv8MML_FP_ARMCC">
 995       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
 996       <require condition="ARMv8MML_FP"/>
 997       <require Tcompiler="ARMCC"/>
 998     </condition>
 999     <condition id="ARMv8MML_FP_LE_ARMCC">
1000       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1001       <require condition="ARMv8MML_FP_ARMCC"/>
1002       <require Dendian="Little-endian"/>
1003     </condition>
1004     <condition id="ARMv8MML_FP_BE_ARMCC">
1005       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1006       <require condition="ARMv8MML_FP_ARMCC"/>
1007       <require Dendian="Big-endian"/>
1008     </condition>
1009
1010     <condition id="ARMv8MML_SP_ARMCC">
1011       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1012       <require condition="ARMv8MML_SP"/>
1013       <require Tcompiler="ARMCC"/>
1014     </condition>
1015     <condition id="ARMv8MML_SP_LE_ARMCC">
1016       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1017       <require condition="ARMv8MML_SP_ARMCC"/>
1018       <require Dendian="Little-endian"/>
1019     </condition>
1020     <condition id="ARMv8MML_SP_BE_ARMCC">
1021       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1022       <require condition="ARMv8MML_SP_ARMCC"/>
1023       <require Dendian="Big-endian"/>
1024     </condition>
1025
1026     <condition id="ARMv8MML_DSP_SP_ARMCC">
1027       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1028       <require condition="ARMv8MML_DSP_SP"/>
1029       <require Tcompiler="ARMCC"/>
1030     </condition>
1031     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1032       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1033       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1034       <require Dendian="Little-endian"/>
1035     </condition>
1036     <condition id="ARMv8MML_DSP_SP_BE_ARMCC">
1037       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1038       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1039       <require Dendian="Big-endian"/>
1040     </condition>
1041
1042     <condition id="ARMv8MML_DP_ARMCC">
1043       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1044       <require condition="ARMv8MML_DP"/>
1045       <require Tcompiler="ARMCC"/>
1046     </condition>
1047     <condition id="ARMv8MML_DP_LE_ARMCC">
1048       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1049       <require condition="ARMv8MML_DP_ARMCC"/>
1050       <require Dendian="Little-endian"/>
1051     </condition>
1052     <condition id="ARMv8MML_DP_BE_ARMCC">
1053       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1054       <require condition="ARMv8MML_DP_ARMCC"/>
1055       <require Dendian="Big-endian"/>
1056     </condition>
1057
1058     <condition id="ARMv8MML_DSP_DP_ARMCC">
1059       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the ARM Compiler</description>
1060       <require condition="ARMv8MML_DSP_DP"/>
1061       <require Tcompiler="ARMCC"/>
1062     </condition>
1063     <condition id="ARMv8MML_DSP_DP_LE_ARMCC">
1064       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1065       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1066       <require Dendian="Little-endian"/>
1067     </condition>
1068     <condition id="ARMv8MML_DSP_DP_BE_ARMCC">
1069       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1070       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1071       <require Dendian="Big-endian"/>
1072     </condition>
1073
1074     <!-- GCC compiler -->
1075     <condition id="CM0_GCC">
1076       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1077       <require condition="CM0"/>
1078       <require Tcompiler="GCC"/>
1079     </condition>
1080     <condition id="CM0_LE_GCC">
1081       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1082       <require condition="CM0_GCC"/>
1083       <require Dendian="Little-endian"/>
1084     </condition>
1085     <condition id="CM0_BE_GCC">
1086       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1087       <require condition="CM0_GCC"/>
1088       <require Dendian="Big-endian"/>
1089     </condition>
1090
1091     <condition id="CM3_GCC">
1092       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1093       <require condition="CM3"/>
1094       <require Tcompiler="GCC"/>
1095     </condition>
1096     <condition id="CM3_LE_GCC">
1097       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1098       <require condition="CM3_GCC"/>
1099       <require Dendian="Little-endian"/>
1100     </condition>
1101     <condition id="CM3_BE_GCC">
1102       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1103       <require condition="CM3_GCC"/>
1104       <require Dendian="Big-endian"/>
1105     </condition>
1106
1107     <condition id="CM4_GCC">
1108       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1109       <require condition="CM4"/>
1110       <require Tcompiler="GCC"/>
1111     </condition>
1112     <condition id="CM4_LE_GCC">
1113       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1114       <require condition="CM4_GCC"/>
1115       <require Dendian="Little-endian"/>
1116     </condition>
1117     <condition id="CM4_BE_GCC">
1118       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1119       <require condition="CM4_GCC"/>
1120       <require Dendian="Big-endian"/>
1121     </condition>
1122
1123     <condition id="CM4_FP_GCC">
1124       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1125       <require condition="CM4_FP"/>
1126       <require Tcompiler="GCC"/>
1127     </condition>
1128     <condition id="CM4_FP_LE_GCC">
1129       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1130       <require condition="CM4_FP_GCC"/>
1131       <require Dendian="Little-endian"/>
1132     </condition>
1133     <condition id="CM4_FP_BE_GCC">
1134       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1135       <require condition="CM4_FP_GCC"/>
1136       <require Dendian="Big-endian"/>
1137     </condition>
1138
1139     <!-- XMC 4000 Series devices from Infineon require a special library -->
1140     <condition id="CM4_LE_GCC_STD">
1141       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1142       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1143       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1144       <require Tcompiler="GCC"/>
1145     </condition>
1146     <condition id="CM4_LE_GCC_IFX">
1147       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1148       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1149       <require Tcompiler="GCC"/>
1150     </condition>
1151     <condition id="CM4_FP_LE_GCC_STD">
1152       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1153       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1154       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1155       <require Tcompiler="GCC"/>
1156     </condition>
1157     <condition id="CM4_FP_LE_GCC_IFX">
1158       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1159       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1160       <require Tcompiler="GCC"/>
1161     </condition>
1162
1163     <condition id="CM7_GCC">
1164       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1165       <require condition="CM7"/>
1166       <require Tcompiler="GCC"/>
1167     </condition>
1168     <condition id="CM7_LE_GCC">
1169       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1170       <require condition="CM7_GCC"/>
1171       <require Dendian="Little-endian"/>
1172     </condition>
1173     <condition id="CM7_BE_GCC">
1174       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1175       <require condition="CM7_GCC"/>
1176       <require Dendian="Big-endian"/>
1177     </condition>
1178
1179     <condition id="CM7_FP_GCC">
1180       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1181       <require condition="CM7_FP"/>
1182       <require Tcompiler="GCC"/>
1183     </condition>
1184     <condition id="CM7_FP_LE_GCC">
1185       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1186       <require condition="CM7_FP_GCC"/>
1187       <require Dendian="Little-endian"/>
1188     </condition>
1189     <condition id="CM7_FP_BE_GCC">
1190       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1191       <require condition="CM7_FP_GCC"/>
1192       <require Dendian="Big-endian"/>
1193     </condition>
1194
1195     <condition id="CM7_SP_GCC">
1196       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1197       <require condition="CM7_SP"/>
1198       <require Tcompiler="GCC"/>
1199     </condition>
1200     <condition id="CM7_SP_LE_GCC">
1201       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1202       <require condition="CM7_SP_GCC"/>
1203       <require Dendian="Little-endian"/>
1204     </condition>
1205     <condition id="CM7_SP_BE_GCC">
1206       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1207       <require condition="CM7_SP_GCC"/>
1208       <require Dendian="Big-endian"/>
1209     </condition>
1210
1211     <condition id="CM7_DP_GCC">
1212       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1213       <require condition="CM7_DP"/>
1214       <require Tcompiler="GCC"/>
1215     </condition>
1216     <condition id="CM7_DP_LE_GCC">
1217       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1218       <require condition="CM7_DP_GCC"/>
1219       <require Dendian="Little-endian"/>
1220     </condition>
1221     <condition id="CM7_DP_BE_GCC">
1222       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1223       <require condition="CM7_DP_GCC"/>
1224       <require Dendian="Big-endian"/>
1225     </condition>
1226
1227     <condition id="CM23_GCC">
1228       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1229       <require condition="CM23"/>
1230       <require Tcompiler="GCC"/>
1231     </condition>
1232     <condition id="CM23_LE_GCC">
1233       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1234       <require condition="CM23_GCC"/>
1235       <require Dendian="Little-endian"/>
1236     </condition>
1237     <condition id="CM23_BE_GCC">
1238       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1239       <require condition="CM23_GCC"/>
1240       <require Dendian="Big-endian"/>
1241     </condition>
1242
1243     <condition id="CM33_GCC">
1244       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1245       <require condition="CM33"/>
1246       <require Tcompiler="GCC"/>
1247     </condition>
1248     <condition id="CM33_LE_GCC">
1249       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1250       <require condition="CM33_GCC"/>
1251       <require Dendian="Little-endian"/>
1252     </condition>
1253     <condition id="CM33_BE_GCC">
1254       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1255       <require condition="CM33_GCC"/>
1256       <require Dendian="Big-endian"/>
1257     </condition>
1258
1259     <condition id="CM33_DSP_GCC">
1260       <description>Cortex-M33 processor based device with DSP extension for the GCC Compiler</description>
1261       <require condition="CM33_DSP"/>
1262       <require Tcompiler="GCC"/>
1263     </condition>
1264     <condition id="CM33_DSP_LE_GCC">
1265       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1266       <require condition="CM33_DSP_GCC"/>
1267       <require Dendian="Little-endian"/>
1268     </condition>
1269     <condition id="CM33_DSP_BE_GCC">
1270       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1271       <require condition="CM33_DSP_GCC"/>
1272       <require Dendian="Big-endian"/>
1273     </condition>
1274
1275     <condition id="CM33_FP_GCC">
1276       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1277       <require condition="CM33_FP"/>
1278       <require Tcompiler="GCC"/>
1279     </condition>
1280     <condition id="CM33_FP_LE_GCC">
1281       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1282       <require condition="CM33_FP_GCC"/>
1283       <require Dendian="Little-endian"/>
1284     </condition>
1285     <condition id="CM33_FP_BE_GCC">
1286       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1287       <require condition="CM33_FP_GCC"/>
1288       <require Dendian="Big-endian"/>
1289     </condition>
1290
1291     <condition id="CM33_SP_GCC">
1292       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1293       <require condition="CM33_SP"/>
1294       <require Tcompiler="GCC"/>
1295     </condition>
1296     <condition id="CM33_SP_LE_GCC">
1297       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1298       <require condition="CM33_SP_GCC"/>
1299       <require Dendian="Little-endian"/>
1300     </condition>
1301     <condition id="CM33_SP_BE_GCC">
1302       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1303       <require condition="CM33_SP_GCC"/>
1304       <require Dendian="Big-endian"/>
1305     </condition>
1306
1307     <condition id="CM33_DSP_SP_GCC">
1308       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1309       <require condition="CM33_DSP_SP"/>
1310       <require Tcompiler="GCC"/>
1311     </condition>
1312     <condition id="CM33_DSP_SP_LE_GCC">
1313       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1314       <require condition="CM33_DSP_SP_GCC"/>
1315       <require Dendian="Little-endian"/>
1316     </condition>
1317     <condition id="CM33_DSP_SP_BE_GCC">
1318       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1319       <require condition="CM33_DSP_SP_GCC"/>
1320       <require Dendian="Big-endian"/>
1321     </condition>
1322
1323     <condition id="ARMv8MBL_GCC">
1324       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1325       <require condition="ARMv8MBL"/>
1326       <require Tcompiler="GCC"/>
1327     </condition>
1328     <condition id="ARMv8MBL_LE_GCC">
1329       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1330       <require condition="ARMv8MBL_GCC"/>
1331       <require Dendian="Little-endian"/>
1332     </condition>
1333     <condition id="ARMv8MBL_BE_GCC">
1334       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1335       <require condition="ARMv8MBL_GCC"/>
1336       <require Dendian="Big-endian"/>
1337     </condition>
1338
1339     <condition id="ARMv8MML_GCC">
1340       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1341       <require condition="ARMv8MML"/>
1342       <require Tcompiler="GCC"/>
1343     </condition>
1344     <condition id="ARMv8MML_LE_GCC">
1345       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1346       <require condition="ARMv8MML_GCC"/>
1347       <require Dendian="Little-endian"/>
1348     </condition>
1349     <condition id="ARMv8MML_BE_GCC">
1350       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1351       <require condition="ARMv8MML_GCC"/>
1352       <require Dendian="Big-endian"/>
1353     </condition>
1354
1355     <condition id="ARMv8MML_DSP_GCC">
1356       <description>ARMv8-M Mainline processor based device with DSP extension for the GCC Compiler</description>
1357       <require condition="ARMv8MML_DSP"/>
1358       <require Tcompiler="GCC"/>
1359     </condition>
1360     <condition id="ARMv8MML_DSP_LE_GCC">
1361       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1362       <require condition="ARMv8MML_DSP_GCC"/>
1363       <require Dendian="Little-endian"/>
1364     </condition>
1365     <condition id="ARMv8MML_DSP_BE_GCC">
1366       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1367       <require condition="ARMv8MML_DSP_GCC"/>
1368       <require Dendian="Big-endian"/>
1369     </condition>
1370
1371     <condition id="ARMv8MML_FP_GCC">
1372       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1373       <require condition="ARMv8MML_FP"/>
1374       <require Tcompiler="GCC"/>
1375     </condition>
1376     <condition id="ARMv8MML_FP_LE_GCC">
1377       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1378       <require condition="ARMv8MML_FP_GCC"/>
1379       <require Dendian="Little-endian"/>
1380     </condition>
1381     <condition id="ARMv8MML_FP_BE_GCC">
1382       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1383       <require condition="ARMv8MML_FP_GCC"/>
1384       <require Dendian="Big-endian"/>
1385     </condition>
1386
1387     <condition id="ARMv8MML_SP_GCC">
1388       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1389       <require condition="ARMv8MML_SP"/>
1390       <require Tcompiler="GCC"/>
1391     </condition>
1392     <condition id="ARMv8MML_SP_LE_GCC">
1393       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1394       <require condition="ARMv8MML_SP_GCC"/>
1395       <require Dendian="Little-endian"/>
1396     </condition>
1397     <condition id="ARMv8MML_SP_BE_GCC">
1398       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1399       <require condition="ARMv8MML_SP_GCC"/>
1400       <require Dendian="Big-endian"/>
1401     </condition>
1402
1403     <condition id="ARMv8MML_DSP_SP_GCC">
1404       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1405       <require condition="ARMv8MML_DSP_SP"/>
1406       <require Tcompiler="GCC"/>
1407     </condition>
1408     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1409       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1410       <require condition="ARMv8MML_DSP_SP_GCC"/>
1411       <require Dendian="Little-endian"/>
1412     </condition>
1413     <condition id="ARMv8MML_DSP_SP_BE_GCC">
1414       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1415       <require condition="ARMv8MML_DSP_SP_GCC"/>
1416       <require Dendian="Big-endian"/>
1417     </condition>
1418
1419     <condition id="ARMv8MML_DP_GCC">
1420       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1421       <require condition="ARMv8MML_DP"/>
1422       <require Tcompiler="GCC"/>
1423     </condition>
1424     <condition id="ARMv8MML_DP_LE_GCC">
1425       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1426       <require condition="ARMv8MML_DP_GCC"/>
1427       <require Dendian="Little-endian"/>
1428     </condition>
1429     <condition id="ARMv8MML_DP_BE_GCC">
1430       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1431       <require condition="ARMv8MML_DP_GCC"/>
1432       <require Dendian="Big-endian"/>
1433     </condition>
1434
1435     <condition id="ARMv8MML_DSP_DP_GCC">
1436       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the GCC Compiler</description>
1437       <require condition="ARMv8MML_DSP_DP"/>
1438       <require Tcompiler="GCC"/>
1439     </condition>
1440     <condition id="ARMv8MML_DSP_DP_LE_GCC">
1441       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1442       <require condition="ARMv8MML_DSP_DP_GCC"/>
1443       <require Dendian="Little-endian"/>
1444     </condition>
1445     <condition id="ARMv8MML_DSP_DP_BE_GCC">
1446       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1447       <require condition="ARMv8MML_DSP_DP_GCC"/>
1448       <require Dendian="Big-endian"/>
1449     </condition>
1450
1451     <!-- IAR compiler -->
1452     <condition id="CM0_IAR">
1453       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1454       <require condition="CM0"/>
1455       <require Tcompiler="IAR"/>
1456     </condition>
1457     <condition id="CM0_LE_IAR">
1458       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1459       <require condition="CM0_IAR"/>
1460       <require Dendian="Little-endian"/>
1461     </condition>
1462     <condition id="CM0_BE_IAR">
1463       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1464       <require condition="CM0_IAR"/>
1465       <require Dendian="Big-endian"/>
1466     </condition>
1467
1468     <condition id="CM3_IAR">
1469       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1470       <require condition="CM3"/>
1471       <require Tcompiler="IAR"/>
1472     </condition>
1473     <condition id="CM3_LE_IAR">
1474       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1475       <require condition="CM3_IAR"/>
1476       <require Dendian="Little-endian"/>
1477     </condition>
1478     <condition id="CM3_BE_IAR">
1479       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1480       <require condition="CM3_IAR"/>
1481       <require Dendian="Big-endian"/>
1482     </condition>
1483
1484     <condition id="CM4_IAR">
1485       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1486       <require condition="CM4"/>
1487       <require Tcompiler="IAR"/>
1488     </condition>
1489     <condition id="CM4_LE_IAR">
1490       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1491       <require condition="CM4_IAR"/>
1492       <require Dendian="Little-endian"/>
1493     </condition>
1494     <condition id="CM4_BE_IAR">
1495       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1496       <require condition="CM4_IAR"/>
1497       <require Dendian="Big-endian"/>
1498     </condition>
1499
1500     <condition id="CM4_FP_IAR">
1501       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1502       <require condition="CM4_FP"/>
1503       <require Tcompiler="IAR"/>
1504     </condition>
1505     <condition id="CM4_FP_LE_IAR">
1506       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1507       <require condition="CM4_FP_IAR"/>
1508       <require Dendian="Little-endian"/>
1509     </condition>
1510     <condition id="CM4_FP_BE_IAR">
1511       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1512       <require condition="CM4_FP_IAR"/>
1513       <require Dendian="Big-endian"/>
1514     </condition>
1515
1516     <condition id="CM7_IAR">
1517       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1518       <require condition="CM7"/>
1519       <require Tcompiler="IAR"/>
1520     </condition>
1521     <condition id="CM7_LE_IAR">
1522       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1523       <require condition="CM7_IAR"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526     <condition id="CM7_BE_IAR">
1527       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1528       <require condition="CM7_IAR"/>
1529       <require Dendian="Big-endian"/>
1530     </condition>
1531
1532     <condition id="CM7_FP_IAR">
1533       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1534       <require condition="CM7_FP"/>
1535       <require Tcompiler="IAR"/>
1536     </condition>
1537     <condition id="CM7_FP_LE_IAR">
1538       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1539       <require condition="CM7_FP_IAR"/>
1540       <require Dendian="Little-endian"/>
1541     </condition>
1542     <condition id="CM7_FP_BE_IAR">
1543       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1544       <require condition="CM7_FP_IAR"/>
1545       <require Dendian="Big-endian"/>
1546     </condition>
1547
1548     <condition id="CM7_SP_IAR">
1549       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1550       <require condition="CM7_SP"/>
1551       <require Tcompiler="IAR"/>
1552     </condition>
1553     <condition id="CM7_SP_LE_IAR">
1554       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1555       <require condition="CM7_SP_IAR"/>
1556       <require Dendian="Little-endian"/>
1557     </condition>
1558     <condition id="CM7_SP_BE_IAR">
1559       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1560       <require condition="CM7_SP_IAR"/>
1561       <require Dendian="Big-endian"/>
1562     </condition>
1563
1564     <condition id="CM7_DP_IAR">
1565       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1566       <require condition="CM7_DP"/>
1567       <require Tcompiler="IAR"/>
1568     </condition>
1569     <condition id="CM7_DP_LE_IAR">
1570       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1571       <require condition="CM7_DP_IAR"/>
1572       <require Dendian="Little-endian"/>
1573     </condition>
1574     <condition id="CM7_DP_BE_IAR">
1575       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1576       <require condition="CM7_DP_IAR"/>
1577       <require Dendian="Big-endian"/>
1578     </condition>
1579
1580     <!-- conditions selecting single devices and CMSIS Core -->
1581     <!-- used for component startup, GCC version is used for C-Startup -->
1582     <condition id="ARMCM0 CMSIS">
1583       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1584       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1585       <require Cclass="CMSIS" Cgroup="CORE"/>
1586     </condition>
1587     <condition id="ARMCM0 CMSIS GCC">
1588       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1589       <require condition="ARMCM0 CMSIS"/>
1590       <require condition="GCC"/>
1591     </condition>
1592
1593     <condition id="ARMCM0+ CMSIS">
1594       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1595       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1596       <require Cclass="CMSIS" Cgroup="CORE"/>
1597     </condition>
1598     <condition id="ARMCM0+ CMSIS GCC">
1599       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1600       <require condition="ARMCM0+ CMSIS"/>
1601       <require condition="GCC"/>
1602     </condition>
1603
1604     <condition id="ARMCM3 CMSIS">
1605       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1606       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1607       <require Cclass="CMSIS" Cgroup="CORE"/>
1608     </condition>
1609     <condition id="ARMCM3 CMSIS GCC">
1610       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1611       <require condition="ARMCM3 CMSIS"/>
1612       <require condition="GCC"/>
1613     </condition>
1614
1615     <condition id="ARMCM4 CMSIS">
1616       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1617       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1618       <require Cclass="CMSIS" Cgroup="CORE"/>
1619     </condition>
1620     <condition id="ARMCM4 CMSIS GCC">
1621       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1622       <require condition="ARMCM4 CMSIS"/>
1623       <require condition="GCC"/>
1624     </condition>
1625
1626     <condition id="ARMCM7 CMSIS">
1627       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1628       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1629       <require Cclass="CMSIS" Cgroup="CORE"/>
1630     </condition>
1631     <condition id="ARMCM7 CMSIS GCC">
1632       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1633       <require condition="ARMCM7 CMSIS"/>
1634       <require condition="GCC"/>
1635     </condition>
1636
1637     <condition id="ARMCM23 CMSIS">
1638       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1639       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1640       <require Cclass="CMSIS" Cgroup="CORE"/>
1641     </condition>
1642     <condition id="ARMCM23 CMSIS GCC">
1643       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1644       <require condition="ARMCM23 CMSIS"/>
1645       <require condition="GCC"/>
1646     </condition>
1647
1648     <condition id="ARMCM33 CMSIS">
1649       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1650       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1651       <require Cclass="CMSIS" Cgroup="CORE"/>
1652     </condition>
1653     <condition id="ARMCM33 CMSIS GCC">
1654       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1655       <require condition="ARMCM33 CMSIS"/>
1656       <require condition="GCC"/>
1657     </condition>
1658
1659     <condition id="ARMSC000 CMSIS">
1660       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1661       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1662       <require Cclass="CMSIS" Cgroup="CORE"/>
1663     </condition>
1664     <condition id="ARMSC000 CMSIS GCC">
1665       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1666       <require condition="ARMSC000 CMSIS"/>
1667       <require condition="GCC"/>
1668     </condition>
1669
1670     <condition id="ARMSC300 CMSIS">
1671       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1672       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1673       <require Cclass="CMSIS" Cgroup="CORE"/>
1674     </condition>
1675     <condition id="ARMSC300 CMSIS GCC">
1676       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1677       <require condition="ARMSC300 CMSIS"/>
1678       <require condition="GCC"/>
1679     </condition>
1680
1681     <condition id="ARMv8MBL CMSIS">
1682       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1683       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1684       <require Cclass="CMSIS" Cgroup="CORE"/>
1685     </condition>
1686     <condition id="ARMv8MBL CMSIS GCC">
1687       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1688       <require condition="ARMv8MBL CMSIS"/>
1689       <require condition="GCC"/>
1690     </condition>
1691
1692     <condition id="ARMv8MML CMSIS">
1693       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1694       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1695       <require Cclass="CMSIS" Cgroup="CORE"/>
1696     </condition>
1697     <condition id="ARMv8MML CMSIS GCC">
1698       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1699       <require condition="ARMv8MML CMSIS"/>
1700       <require condition="GCC"/>
1701     </condition>
1702
1703     <!-- CMSIS DSP -->
1704     <condition id="CMSIS DSP">
1705       <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
1706       <require condition="ARMv6_7-M Device"/>
1707       <require Cclass="CMSIS" Cgroup="CORE"/>
1708       <require condition="ARMCC GCC"/>
1709     </condition>
1710
1711     <!-- RTOS RTX -->
1712     <condition id="RTOS RTX">
1713       <description>Components required for RTOS RTX</description>
1714       <require condition="ARMv6_7-M Device"/>
1715       <require condition="ARMCC GCC IAR"/>
1716       <require Cclass="Device" Cgroup="Startup"/>
1717       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1718     </condition>
1719     <condition id="RTOS RTX5">
1720       <description>Components required for RTOS RTX5</description>
1721       <require condition="ARMv6_7_8-M Device"/>
1722       <require condition="ARMCC GCC"/>
1723       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1724     </condition>
1725     <condition id="RTOS2 RTX5">
1726       <description>Components required for RTOS2 RTX5</description>
1727       <require condition="ARMv6_7_8-M Device"/>
1728       <require condition="ARMCC GCC"/>
1729       <require Cclass="CMSIS"  Cgroup="CORE"/>
1730       <require Cclass="Device" Cgroup="Startup"/>
1731     </condition>
1732     <condition id="RTOS2 RTX5 NS">
1733       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1734       <require condition="ARMv8-M TZ Device"/>
1735       <require condition="ARMCC GCC"/>
1736       <require Cclass="CMSIS"  Cgroup="CORE"/>
1737       <require Cclass="Device" Cgroup="Startup"/>
1738     </condition>
1739
1740   </conditions>
1741
1742   <components>
1743     <!-- CMSIS-Core component -->
1744     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0"  condition="ARMv6_7_8-M Device" >
1745       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1746       <files>
1747         <!-- CPU independent -->
1748         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1749         <file category="include" name="CMSIS/Include/"/>
1750         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1751         <!-- Code template -->
1752         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     select="Secure mode 'main' module for ARMv8-M"/>
1753         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1754       </files>
1755     </component>
1756
1757     <!-- CMSIS-Startup components -->
1758     <!-- Cortex-M0 -->
1759     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1760       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1761       <files>
1762         <!-- include folder / device header file -->
1763         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1764         <!-- startup / system file -->
1765         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1766         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1767         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1768         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1769         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1770       </files>
1771     </component>
1772     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1773       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1774       <files>
1775         <!-- include folder / device header file -->
1776         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1777         <!-- startup / system file -->
1778         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1779         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1780         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1781       </files>
1782     </component>
1783
1784     <!-- Cortex-M0+ -->
1785     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1786       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1787       <files>
1788         <!-- include folder / device header file -->
1789         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1790         <!-- startup / system file -->
1791         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1792         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1793         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1794         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1795         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1796       </files>
1797     </component>
1798     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1799       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1800       <files>
1801         <!-- include folder / device header file -->
1802         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1803         <!-- startup / system file -->
1804         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1805         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1806         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1807       </files>
1808     </component>
1809
1810     <!-- Cortex-M3 -->
1811     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1812       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1813       <files>
1814         <!-- include folder / device header file -->
1815         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1816         <!-- startup / system file -->
1817         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1818         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1819         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1820         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1821         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1822       </files>
1823     </component>
1824     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1825       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1826       <files>
1827         <!-- include folder / device header file -->
1828         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1829         <!-- startup / system file -->
1830         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1831         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1832         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1833       </files>
1834     </component>
1835
1836     <!-- Cortex-M4 -->
1837     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1838       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1839       <files>
1840         <!-- include folder / device header file -->
1841         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1842         <!-- startup / system file -->
1843         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1844         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1845         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1846         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1847         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1848       </files>
1849     </component>
1850     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1851       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1852       <files>
1853         <!-- include folder / device header file -->
1854         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1855         <!-- startup / system file -->
1856         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1857         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1858         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1859       </files>
1860     </component>
1861
1862     <!-- Cortex-M7 -->
1863     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1864       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1865       <files>
1866         <!-- include folder / device header file -->
1867         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1868         <!-- startup / system file -->
1869         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1870         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1871         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1872         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1873         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1874       </files>
1875     </component>
1876     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1877       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1878       <files>
1879         <!-- include folder / device header file -->
1880         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1881         <!-- startup / system file -->
1882         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1883         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1884         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1885       </files>
1886     </component>
1887
1888     <!-- Cortex-M23 -->
1889     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1890       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1891       <files>
1892         <!-- include folder / device header file -->
1893         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1894         <!-- startup / system file -->
1895         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1896         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1897         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1898         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1899         <!-- SAU configuration -->
1900         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1901       </files>
1902     </component>
1903     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1904       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1905       <files>
1906         <!-- include folder / device header file -->
1907         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1908         <!-- startup / system file -->
1909         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1910         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1911         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1912         <!-- SAU configuration -->
1913         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1914       </files>
1915     </component>
1916
1917     <!-- Cortex-M33 -->
1918     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM33 CMSIS">
1919       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1920       <files>
1921         <!-- include folder / device header file -->
1922         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1923         <!-- startup / system file -->
1924         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
1925         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
1926         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1927         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1928         <!-- SAU configuration -->
1929         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1930       </files>
1931     </component>
1932     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM33 CMSIS GCC">
1933       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1934       <files>
1935         <!-- include folder / device header file -->
1936         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1937         <!-- startup / system file -->
1938         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
1939         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1940         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"      version="1.0.0" attr="config"/>
1941         <!-- SAU configuration -->
1942         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1943       </files>
1944     </component>
1945
1946     <!-- Cortex-SC000 -->
1947     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1948       <description>System and Startup for Generic ARM SC000 device</description>
1949       <files>
1950         <!-- include folder / device header file -->
1951         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1952         <!-- startup / system file -->
1953         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1954         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1955         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1956         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1957         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1958       </files>
1959     </component>
1960     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1961       <description>System and Startup for Generic ARM SC000 device</description>
1962       <files>
1963         <!-- include folder / device header file -->
1964         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1965         <!-- startup / system file -->
1966         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1967         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1968         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1969       </files>
1970     </component>
1971
1972     <!-- Cortex-SC300 -->
1973     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1974       <description>System and Startup for Generic ARM SC300 device</description>
1975       <files>
1976         <!-- include folder / device header file -->
1977         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1978         <!-- startup / system file -->
1979         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1980         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1981         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1982         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1983         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1984       </files>
1985     </component>
1986     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1987       <description>System and Startup for Generic ARM SC300 device</description>
1988       <files>
1989         <!-- include folder / device header file -->
1990         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1991         <!-- startup / system file -->
1992         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1993         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1994         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1995       </files>
1996     </component>
1997
1998     <!-- ARMv8MBL -->
1999     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2000       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2001       <files>
2002         <!-- include folder / device header file -->
2003         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2004         <!-- startup / system file -->
2005         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2006         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2007         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2008         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2009         <!-- SAU configuration -->
2010         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2011       </files>
2012     </component>
2013     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2014       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2015       <files>
2016         <!-- include folder / device header file -->
2017         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2018         <!-- startup / system file -->
2019         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2020         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2021         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2022         <!-- SAU configuration -->
2023         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2024       </files>
2025     </component>
2026
2027     <!-- ARMv8MML -->
2028     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
2029       <description>System and Startup for Generic ARM ARMv8MML device</description>
2030       <files>
2031         <!-- include folder / device header file -->
2032         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2033         <!-- startup / system file -->
2034         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2035         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2036         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2037         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2038         <!-- SAU configuration -->
2039         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2040       </files>
2041     </component>
2042     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
2043       <description>System and Startup for Generic ARM ARMv8MML device</description>
2044       <files>
2045         <!-- include folder / device header file -->
2046         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2047         <!-- startup / system file -->
2048         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2049         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2050         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"      version="1.0.0" attr="config"/>
2051         <!-- SAU configuration -->
2052         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2053       </files>
2054     </component>
2055
2056
2057     <!-- CMSIS-DSP component -->
2058     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
2059       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2060       <files>
2061         <!-- CPU independent -->
2062         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2063         <file category="header" name="CMSIS/Include/arm_math.h"/>
2064
2065         <!-- CPU and Compiler dependent -->
2066         <!-- ARMCC -->
2067         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2068         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2069         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2070         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2071         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2072         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2073         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2074         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2075         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2076         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2077         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2078         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2079         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2080         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2081 <!--
2082         <file category="library" condition="CM23_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2083         <file category="library" condition="CM33_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2084         <file category="library" condition="CM33_DSP_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2085         <file category="library" condition="CM33_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2086         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2087         <file category="library" condition="ARMv8MBL_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2088         <file category="library" condition="ARMv8MML_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2089         <file category="library" condition="ARMv8MML_DSP_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2090         <file category="library" condition="ARMv8MML_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2091         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2092 -->
2093         <!-- GCC -->
2094         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2095         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2096         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2097         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2098         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2099         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2100         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2101 <!--
2102         <file category="library" condition="CM23_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2103         <file category="library" condition="CM33_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2104         <file category="library" condition="CM33_DSP_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2105         <file category="library" condition="CM33_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2106         <file category="library" condition="CM33_DSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2107         <file category="library" condition="ARMv8MBL_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2108         <file category="library" condition="ARMv8MML_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2109         <file category="library" condition="ARMv8MML_DSP_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2110         <file category="library" condition="ARMv8MML_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2111         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"   name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2112 -->
2113       </files>
2114     </component>
2115
2116     <!-- CMSIS-RTOS Keil RTX component -->
2117     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
2118       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2119       <RTE_Components_h>
2120         <!-- the following content goes into file 'RTE_Components.h' -->
2121         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2122         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2123       </RTE_Components_h>
2124       <files>
2125         <!-- CPU independent -->
2126         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2127         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2128         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2129
2130         <!-- RTX templates -->
2131         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2132         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2133         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2134         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2135         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2136         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2137         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2138         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2139         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2140         <!-- tool-chain specific template file -->
2141         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2142         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2143         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2144
2145         <!-- CPU and Compiler dependent -->
2146         <!-- ARMCC -->
2147         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2148         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2149         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2150         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2151         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2152         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2153         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2154         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2155         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2156         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2157         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2158         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2159         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2160         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2161         <!-- GCC -->
2162         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2163         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2164         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2165         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2166         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2167         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2168         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2169         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2170         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2171         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2172         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2173         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2174         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2175         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2176         <!-- IAR -->
2177         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2178         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2179         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2180         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2181         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2182         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2183         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2184         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2185         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2186         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2187         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2188         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2189       </files>
2190     </component>
2191
2192     <!-- CMSIS-RTOS Keil RTX5 component -->
2193     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0" Capiversion="1.0" condition="RTOS RTX5">
2194       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2195       <RTE_Components_h>
2196         <!-- the following content goes into file 'RTE_Components.h' -->
2197         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2198         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2199       </RTE_Components_h>
2200       <files>
2201         <!-- RTX header file -->
2202         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2203         <!-- RTX compatibility module for API V1 -->
2204         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2205       </files>
2206     </component>
2207
2208     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2209     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5">
2210       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2211       <RTE_Components_h>
2212         <!-- the following content goes into file 'RTE_Components.h' -->
2213         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2214         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2215       </RTE_Components_h>
2216       <files>
2217         <!-- RTX documentation -->
2218         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2219
2220         <!-- RTX header files -->
2221         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2222         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2223
2224         <!-- RTX configuration -->
2225         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2226
2227         <!-- RTX templates -->
2228         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2229         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2230         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2231         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2232         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2233         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2234         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2235         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2236         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2237
2238         <!-- RTX libraries (CPU and Compiler dependent) -->
2239         <!-- ARMCC -->
2240         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2241         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2242         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2243         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2244         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2245         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2246         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2247         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2248         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2249         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2250         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2251         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2252         <!-- GCC -->
2253         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2254         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2255         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2256         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2257         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2258         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2259         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2260         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2261         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2262         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2263         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2264         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2265       </files>
2266     </component>
2267     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5 NS">
2268       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2269       <RTE_Components_h>
2270         <!-- the following content goes into file 'RTE_Components.h' -->
2271         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2272         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2273         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2274       </RTE_Components_h>
2275       <files>
2276         <!-- RTX documentation -->
2277         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2278
2279         <!-- RTX header files -->
2280         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2281         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2282
2283         <!-- RTX configuration -->
2284         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2285
2286         <!-- RTX templates -->
2287         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2288         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2289         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2290         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2291         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2292         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2293         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2294         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2295         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2296
2297         <!-- RTX libraries (CPU and Compiler dependent) -->
2298         <!-- ARMCC -->
2299         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2300         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2301         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2302         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2303         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2304         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2305         <!-- GCC -->
2306         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2307         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2308         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2309         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2310         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2311         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2312       </files>
2313     </component>
2314     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5">
2315       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2316       <RTE_Components_h>
2317         <!-- the following content goes into file 'RTE_Components.h' -->
2318         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2319         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2320         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2321       </RTE_Components_h>
2322       <files>
2323         <!-- RTX documentation -->
2324         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2325
2326         <!-- RTX header files -->
2327         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2328         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2329
2330         <!-- RTX configuration -->
2331         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2332
2333         <!-- RTX templates -->
2334         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2335         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2336         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2337         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2338         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2339         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2340         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2341         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2342         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2343
2344         <!-- RTX sources (core) -->
2345         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2346         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2347         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2348         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2349         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2350         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2351         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2352         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2353         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2354         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2355         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2356         <!-- RTX sources (handlers ARMCC) -->
2357         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2358         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2359         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2360         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2361         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2362         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2363         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2364         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2365         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2366         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2367         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2368         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2369         <!-- RTX sources (handlers GCC) -->
2370         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s"         condition="CM0_GCC"/>
2371         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s"         condition="CM3_GCC"/>
2372         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s"         condition="CM4_GCC"/>
2373         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s"        condition="CM4_FP_GCC"/>
2374         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s"         condition="CM7_GCC"/>
2375         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s"        condition="CM7_FP_GCC"/>
2376         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.s"    condition="CM23_GCC"/>
2377         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.s"    condition="CM33_GCC"/>
2378         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.s" condition="CM33_FP_GCC"/>
2379         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.s"    condition="ARMv8MBL_GCC"/>
2380         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.s"    condition="ARMv8MML_GCC"/>
2381         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.s" condition="ARMv8MML_FP_GCC"/>
2382       </files>
2383     </component>
2384     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5 NS">
2385       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2386       <RTE_Components_h>
2387         <!-- the following content goes into file 'RTE_Components.h' -->
2388         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2389         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2390         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2391         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2392       </RTE_Components_h>
2393       <files>
2394         <!-- RTX documentation -->
2395         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2396
2397         <!-- RTX header files -->
2398         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2399         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2400
2401         <!-- RTX configuration -->
2402         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2403
2404         <!-- RTX templates -->
2405         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2406         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2407         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2408         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2409         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2413         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2414
2415         <!-- RTX sources (core) -->
2416         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2417         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2418         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2419         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2420         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2421         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2422         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2423         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2424         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2425         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2426         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2427         <!-- RTX sources (ARMCC handlers) -->
2428         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2429         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2430         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2431         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2432         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2433         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2434         <!-- RTX sources (GCC handlers) -->
2435         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.s"    condition="CM23_GCC"/>
2436         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.s"    condition="CM33_GCC"/>
2437         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.s" condition="CM33_FP_GCC"/>
2438         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.s"    condition="ARMv8MBL_GCC"/>
2439         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.s"    condition="ARMv8MML_GCC"/>
2440         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.s" condition="ARMv8MML_FP_GCC"/>
2441       </files>
2442     </component>
2443
2444   </components>
2445
2446   <boards>
2447     <board name="uVision Simulator" vendor="Keil">
2448       <description>uVision Simulator</description>
2449       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2450       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2451       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2452       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2453       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2454     </board>
2455   </boards>
2456
2457   <examples>
2458     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2459       <description>DSP_Lib Class Marks example</description>
2460       <board name="uVision Simulator" vendor="Keil"/>
2461       <project>
2462         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2463       </project>
2464       <attributes>
2465         <component Cclass="CMSIS" Cgroup="CORE"/>
2466         <component Cclass="CMSIS" Cgroup="DSP"/>
2467         <component Cclass="Device" Cgroup="Startup"/>
2468         <category>Getting Started</category>
2469       </attributes>
2470     </example>
2471
2472     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2473       <description>DSP_Lib Convolution example</description>
2474       <board name="uVision Simulator" vendor="Keil"/>
2475       <project>
2476         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2477       </project>
2478       <attributes>
2479         <component Cclass="CMSIS" Cgroup="CORE"/>
2480         <component Cclass="CMSIS" Cgroup="DSP"/>
2481         <component Cclass="Device" Cgroup="Startup"/>
2482         <category>Getting Started</category>
2483       </attributes>
2484     </example>
2485
2486     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2487       <description>DSP_Lib Dotproduct example</description>
2488       <board name="uVision Simulator" vendor="Keil"/>
2489       <project>
2490         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2491       </project>
2492       <attributes>
2493         <component Cclass="CMSIS" Cgroup="CORE"/>
2494         <component Cclass="CMSIS" Cgroup="DSP"/>
2495         <component Cclass="Device" Cgroup="Startup"/>
2496         <category>Getting Started</category>
2497       </attributes>
2498     </example>
2499
2500     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2501       <description>DSP_Lib FFT Bin example</description>
2502       <board name="uVision Simulator" vendor="Keil"/>
2503       <project>
2504         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2505       </project>
2506       <attributes>
2507         <component Cclass="CMSIS" Cgroup="CORE"/>
2508         <component Cclass="CMSIS" Cgroup="DSP"/>
2509         <component Cclass="Device" Cgroup="Startup"/>
2510         <category>Getting Started</category>
2511       </attributes>
2512     </example>
2513
2514     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2515       <description>DSP_Lib FIR example</description>
2516       <board name="uVision Simulator" vendor="Keil"/>
2517       <project>
2518         <environment name="uv" load="arm_fir_example.uvprojx"/>
2519       </project>
2520       <attributes>
2521         <component Cclass="CMSIS" Cgroup="CORE"/>
2522         <component Cclass="CMSIS" Cgroup="DSP"/>
2523         <component Cclass="Device" Cgroup="Startup"/>
2524         <category>Getting Started</category>
2525       </attributes>
2526     </example>
2527
2528     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2529       <description>DSP_Lib Graphic Equalizer example</description>
2530       <board name="uVision Simulator" vendor="Keil"/>
2531       <project>
2532         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2533       </project>
2534       <attributes>
2535         <component Cclass="CMSIS" Cgroup="CORE"/>
2536         <component Cclass="CMSIS" Cgroup="DSP"/>
2537         <component Cclass="Device" Cgroup="Startup"/>
2538         <category>Getting Started</category>
2539       </attributes>
2540     </example>
2541
2542     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2543       <description>DSP_Lib Linear Interpolation example</description>
2544       <board name="uVision Simulator" vendor="Keil"/>
2545       <project>
2546         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2547       </project>
2548       <attributes>
2549         <component Cclass="CMSIS" Cgroup="CORE"/>
2550         <component Cclass="CMSIS" Cgroup="DSP"/>
2551         <component Cclass="Device" Cgroup="Startup"/>
2552         <category>Getting Started</category>
2553       </attributes>
2554     </example>
2555
2556     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2557       <description>DSP_Lib Matrix example</description>
2558       <board name="uVision Simulator" vendor="Keil"/>
2559       <project>
2560         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2561       </project>
2562       <attributes>
2563         <component Cclass="CMSIS" Cgroup="CORE"/>
2564         <component Cclass="CMSIS" Cgroup="DSP"/>
2565         <component Cclass="Device" Cgroup="Startup"/>
2566         <category>Getting Started</category>
2567       </attributes>
2568     </example>
2569
2570     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2571       <description>DSP_Lib Signal Convergence example</description>
2572       <board name="uVision Simulator" vendor="Keil"/>
2573       <project>
2574         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2575       </project>
2576       <attributes>
2577         <component Cclass="CMSIS" Cgroup="CORE"/>
2578         <component Cclass="CMSIS" Cgroup="DSP"/>
2579         <component Cclass="Device" Cgroup="Startup"/>
2580         <category>Getting Started</category>
2581       </attributes>
2582     </example>
2583
2584     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2585       <description>DSP_Lib Sinus/Cosinus example</description>
2586       <board name="uVision Simulator" vendor="Keil"/>
2587       <project>
2588         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2589       </project>
2590       <attributes>
2591         <component Cclass="CMSIS" Cgroup="CORE"/>
2592         <component Cclass="CMSIS" Cgroup="DSP"/>
2593         <component Cclass="Device" Cgroup="Startup"/>
2594         <category>Getting Started</category>
2595       </attributes>
2596     </example>
2597
2598     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2599       <description>DSP_Lib Variance example</description>
2600       <board name="uVision Simulator" vendor="Keil"/>
2601       <project>
2602         <environment name="uv" load="arm_variance_example.uvprojx"/>
2603       </project>
2604       <attributes>
2605         <component Cclass="CMSIS" Cgroup="CORE"/>
2606         <component Cclass="CMSIS" Cgroup="DSP"/>
2607         <component Cclass="Device" Cgroup="Startup"/>
2608         <category>Getting Started</category>
2609       </attributes>
2610     </example>
2611
2612     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2613       <description>CMSIS-RTOS2 Blinky example</description>
2614       <board name="uVision Simulator" vendor="Keil"/>
2615       <project>
2616         <environment name="uv" load="Blinky.uvprojx"/>
2617       </project>
2618       <attributes>
2619         <component Cclass="CMSIS" Cgroup="CORE"/>
2620         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2621         <component Cclass="Device" Cgroup="Startup"/>
2622         <category>Getting Started</category>
2623       </attributes>
2624     </example>
2625
2626     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2627       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2628       <board name="uVision Simulator" vendor="Keil"/>
2629       <project>
2630         <environment name="uv" load="Blinky.uvprojx"/>
2631       </project>
2632       <attributes>
2633         <component Cclass="CMSIS" Cgroup="CORE"/>
2634         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2635         <component Cclass="Device" Cgroup="Startup"/>
2636         <category>Getting Started</category>
2637       </attributes>
2638     </example>
2639
2640     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2641       <description>Bare-metal secure/non-secure example without RTOS</description>
2642       <board name="uVision Simulator" vendor="Keil"/>
2643       <project>
2644         <environment name="uv" load="NoRTOS.uvmpw"/>
2645       </project>
2646       <attributes>
2647         <component Cclass="CMSIS" Cgroup="CORE"/>
2648         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2649         <component Cclass="Device" Cgroup="Startup"/>
2650         <category>Getting Started</category>
2651       </attributes>
2652     </example>
2653
2654     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2655       <description>Secure/non-secure RTOS example with thread context management</description>
2656       <board name="uVision Simulator" vendor="Keil"/>
2657       <project>
2658         <environment name="uv" load="RTOS.uvmpw"/>
2659       </project>
2660       <attributes>
2661         <component Cclass="CMSIS" Cgroup="CORE"/>
2662         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2663         <component Cclass="Device" Cgroup="Startup"/>
2664         <category>Getting Started</category>
2665       </attributes>
2666     </example>
2667
2668     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2669       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2670       <board name="uVision Simulator" vendor="Keil"/>
2671       <project>
2672         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2673       </project>
2674       <attributes>
2675         <component Cclass="CMSIS" Cgroup="CORE"/>
2676         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2677         <component Cclass="Device" Cgroup="Startup"/>
2678         <category>Getting Started</category>
2679       </attributes>
2680     </example>
2681
2682   </examples>
2683
2684 </package>