begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.4.0" date="2018-08-01">
  12       Aligned pack structure with repository.
  13       The following folders are deprecated:
  14         - CMSIS/Include/
  15         - CMSIS/DSP_Lib/
  16
  17       CMSIS-Core(M): 5.1.2 (see revision history for details)
  18         - Added Cortex-M1 support (beta).
  19       CMSIS-Core(A): 1.1.2 (see revision history for details)
  20       CMSIS-NN: 1.1.0
  21         - Added new math functions.
  22       CMSIS-RTOS2:
  23         - API 2.1.3 (see revision history for details)
  24         - RTX 5.4.0 (see revision history for details)
  25           * Updated exception handling on Cortex-A
  26       CMSIS-Driver:
  27         - Flash Driver API V2.2.0
  28       Utilities:
  29         - SVDConv 3.3.21
  30         - PackChk 1.3.71
  31     </release>
  32     <release version="5.3.0" date="2018-02-22">
  33       Updated Arm company brand.
  34       CMSIS-Core(M): 5.1.1 (see revision history for details)
  35       CMSIS-Core(A): 1.1.1 (see revision history for details)
  36       CMSIS-DAP: 2.0.0 (see revision history for details)
  37       CMSIS-NN: 1.0.0
  38         - Initial contribution of the bare metal Neural Network Library.
  39       CMSIS-RTOS2:
  40         - RTX 5.3.0 (see revision history for details)
  41         - OS Tick API 1.0.1
  42     </release>
  43     <release version="5.2.0" date="2017-11-16">
  44       CMSIS-Core(M): 5.1.0 (see revision history for details)
  45         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  46         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  47       CMSIS-Core(A): 1.1.0 (see revision history for details)
  48         - Added compiler_iccarm.h.
  49         - Added additional access functions for physical timer.
  50       CMSIS-DAP: 1.2.0 (see revision history for details)
  51       CMSIS-DSP: 1.5.2 (see revision history for details)
  52       CMSIS-Driver: 2.6.0 (see revision history for details)
  53         - CAN Driver API V1.2.0
  54         - NAND Driver API V2.3.0
  55       CMSIS-RTOS:
  56         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  57       CMSIS-RTOS2:
  58         - API 2.1.2 (see revision history for details)
  59         - RTX 5.2.3 (see revision history for details)
  60       Devices:
  61         - Added GCC startup and linker script for Cortex-A9.
  62         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  63         - Added IAR startup code for Cortex-A9
  64     </release>
  65     <release version="5.1.1" date="2017-09-19">
  66       CMSIS-RTOS2:
  67       - RTX 5.2.1 (see revision history for details)
  68     </release>
  69     <release version="5.1.0" date="2017-08-04">
  70       CMSIS-Core(M): 5.0.2 (see revision history for details)
  71       - Changed Version Control macros to be core agnostic.
  72       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  73       CMSIS-Core(A): 1.0.0 (see revision history for details)
  74       - Initial release
  75       - IRQ Controller API 1.0.0
  76       CMSIS-Driver: 2.05 (see revision history for details)
  77       - All typedefs related to status have been made volatile.
  78       CMSIS-RTOS2:
  79       - API 2.1.1 (see revision history for details)
  80       - RTX 5.2.0 (see revision history for details)
  81       - OS Tick API 1.0.0
  82       CMSIS-DSP: 1.5.2 (see revision history for details)
  83       - Fixed GNU Compiler specific diagnostics.
  84       CMSIS-Pack: 1.5.0 (see revision history for details)
  85       - added System Description File (*.SDF) Format
  86       CMSIS-Zone: 0.0.1 (Preview)
  87       - Initial specification draft
  88     </release>
  89     <release version="5.0.1" date="2017-02-03">
  90       Package Description:
  91       - added taxonomy for Cclass RTOS
  92       CMSIS-RTOS2:
  93       - API 2.1   (see revision history for details)
  94       - RTX 5.1.0 (see revision history for details)
  95       CMSIS-Core: 5.0.1 (see revision history for details)
  96       - Added __PACKED_STRUCT macro
  97       - Added uVisior support
  98       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  99       - Updated template for secure main function (main_s.c)
 100       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 101       CMSIS-DSP: 1.5.1 (see revision history for details)
 102       - added ARMv8M DSP libraries.
 103       CMSIS-Pack:1.4.9 (see revision history for details)
 104       - added Pack Index File specification and schema file
 105     </release>
 106     <release version="5.0.0" date="2016-11-11">
 107       Changed open source license to Apache 2.0
 108       CMSIS_Core:
 109        - Added support for Cortex-M23 and Cortex-M33.
 110        - Added ARMv8-M device configurations for mainline and baseline.
 111        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 112        - Added cmsis_compiler.h to unify compiler behaviour.
 113        - Updated function SCB_EnableICache (for Cortex-M7).
 114        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 115       CMSIS-RTOS:
 116         - bug fix in RTX 4.82 (see revision history for details)
 117       CMSIS-RTOS2:
 118         - new API including compatibility layer to CMSIS-RTOS
 119         - reference implementation based on RTX5
 120         - supports all Cortex-M variants including TrustZone for ARMv8-M
 121       CMSIS-SVD:
 122        - reworked SVD format documentation
 123        - removed SVD file database documentation as SVD files are distributed in packs
 124        - updated SVDConv for Win32 and Linux
 125       CMSIS-DSP:
 126        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 127        - Added DSP libraries build projects to CMSIS pack.
 128     </release>
 129     <release version="4.5.0" date="2015-10-28">
 130       - CMSIS-Core     4.30.0  (see revision history for details)
 131       - CMSIS-DAP      1.1.0   (unchanged)
 132       - CMSIS-Driver   2.04.0  (see revision history for details)
 133       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 134       - CMSIS-Pack     1.4.1   (see revision history for details)
 135       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 136       - CMSIS-SVD      1.3.1   (see revision history for details)
 137     </release>
 138     <release version="4.4.0" date="2015-09-11">
 139       - CMSIS-Core     4.20   (see revision history for details)
 140       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 141       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 142       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 143       - CMSIS-RTOS
 144         -- API         1.02   (unchanged)
 145         -- RTX         4.79   (see revision history for details)
 146       - CMSIS-SVD      1.3.0  (see revision history for details)
 147       - CMSIS-DAP      1.1.0  (extended with SWO support)
 148     </release>
 149     <release version="4.3.0" date="2015-03-20">
 150       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 151       - CMSIS-DSP      1.4.5  (see revision history for details)
 152       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 153       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 154       - CMSIS-RTOS
 155         -- API         1.02   (unchanged)
 156         -- RTX         4.78   (see revision history for details)
 157       - CMSIS-SVD      1.2    (unchanged)
 158     </release>
 159     <release version="4.2.0" date="2014-09-24">
 160       Adding Cortex-M7 support
 161       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 162       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 163       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 164       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 165       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 166     </release>
 167     <release version="4.1.1" date="2014-06-30">
 168       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 169     </release>
 170     <release version="4.1.0" date="2014-06-12">
 171       - CMSIS-Driver   2.02  (incompatible update)
 172       - CMSIS-Pack     1.3   (see revision history for details)
 173       - CMSIS-DSP      1.4.2 (unchanged)
 174       - CMSIS-Core     3.30  (unchanged)
 175       - CMSIS-RTOS RTX 4.74  (unchanged)
 176       - CMSIS-RTOS API 1.02  (unchanged)
 177       - CMSIS-SVD      1.10  (unchanged)
 178       PACK:
 179       - removed G++ specific files from PACK
 180       - added Component Startup variant "C Startup"
 181       - added Pack Checking Utility
 182       - updated conditions to reflect tool-chain dependency
 183       - added Taxonomy for Graphics
 184       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 185     </release>
 186     <release version="4.0.0">
 187       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 188       - CMSIS-Pack     1.1   Preliminary
 189       - CMSIS-DSP      1.4.2 (see revision history for details)
 190       - CMSIS-Core     3.30  (see revision history for details)
 191       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 192       - CMSIS-RTOS API 1.02  (unchanged)
 193       - CMSIS-SVD      1.10  (unchanged)
 194     </release>
 195     <release version="3.20.4">
 196       - CMSIS-RTOS 4.74 (see revision history for details)
 197       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 198     </release>
 199     <release version="3.20.3">
 200       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 201       - CMSIS-RTOS 4.73 (see revision history for details)
 202     </release>
 203     <release version="3.20.2">
 204       - CMSIS-Pack documentation has been added
 205       - CMSIS-Drivers header and documentation have been added to PACK
 206       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 207     </release>
 208     <release version="3.20.1">
 209       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 210       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 211     </release>
 212     <release version="3.20.0">
 213       The software portions that are deployed in the application program are now under a BSD license which allows usage
 214       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 215       The individual components have been update as listed below:
 216       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 217       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 218       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 219       - CMSIS-SVD is unchanged.
 220     </release>
 221   </releases>
 222
 223   <taxonomy>
 224     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 225     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 226     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 227     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 228     <description Cclass="File System">File Drive Support and File System</description>
 229     <description Cclass="Graphics">Graphical User Interface</description>
 230     <description Cclass="Network">Network Stack using Internet Protocols</description>
 231     <description Cclass="USB">Universal Serial Bus Stack</description>
 232     <description Cclass="Compiler">Compiler Software Extensions</description>
 233     <description Cclass="RTOS">Real-time Operating System</description>
 234   </taxonomy>
 235
 236   <devices>
 237     <!-- ******************************  Cortex-M0  ****************************** -->
 238     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 239       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 240       <description>
 241 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 242 - simple, easy-to-use programmers model
 243 - highly efficient ultra-low power operation
 244 - excellent code density
 245 - deterministic, high-performance interrupt handling
 246 - upward compatibility with the rest of the Cortex-M processor family.
 247       </description>
 248       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 249       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 250       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 251       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 252
 253       <device Dname="ARMCM0">
 254         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 255         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 256       </device>
 257     </family>
 258
 259     <!-- ******************************  Cortex-M0P  ****************************** -->
 260     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 261       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 262       <description>
 263 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 264 - simple, easy-to-use programmers model
 265 - highly efficient ultra-low power operation
 266 - excellent code density
 267 - deterministic, high-performance interrupt handling
 268 - upward compatibility with the rest of the Cortex-M processor family.
 269       </description>
 270       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 271       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 272       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 273       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 274
 275       <device Dname="ARMCM0P">
 276         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 277         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 278       </device>
 279
 280       <device Dname="ARMCM0P_MPU">
 281         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 282         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 283       </device>
 284     </family>
 285
 286     <!-- ******************************  Cortex-M1  ****************************** -->
 287     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 288       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 289       <description>
 290 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 291 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 292       </description>
 293       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 294       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 295       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 296       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 297
 298       <device Dname="ARMCM1">
 299         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 300         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 301       </device>
 302     </family>
 303
 304     <!-- ******************************  Cortex-M3  ****************************** -->
 305     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 306       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 307       <description>
 308 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 309 - simple, easy-to-use programmers model
 310 - highly efficient ultra-low power operation
 311 - excellent code density
 312 - deterministic, high-performance interrupt handling
 313 - upward compatibility with the rest of the Cortex-M processor family.
 314       </description>
 315       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 316       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 317       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 318       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 319
 320       <device Dname="ARMCM3">
 321         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 322         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 323       </device>
 324     </family>
 325
 326     <!-- ******************************  Cortex-M4  ****************************** -->
 327     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 328       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 329       <description>
 330 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 331 - simple, easy-to-use programmers model
 332 - highly efficient ultra-low power operation
 333 - excellent code density
 334 - deterministic, high-performance interrupt handling
 335 - upward compatibility with the rest of the Cortex-M processor family.
 336       </description>
 337       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 338       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 339       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 340       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 341
 342       <device Dname="ARMCM4">
 343         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 344         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 345       </device>
 346
 347       <device Dname="ARMCM4_FP">
 348         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 349         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 350       </device>
 351     </family>
 352
 353     <!-- ******************************  Cortex-M7  ****************************** -->
 354     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 355       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 356       <description>
 357 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 358 - simple, easy-to-use programmers model
 359 - highly efficient ultra-low power operation
 360 - excellent code density
 361 - deterministic, high-performance interrupt handling
 362 - upward compatibility with the rest of the Cortex-M processor family.
 363       </description>
 364       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 365       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 366       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 367       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 368
 369       <device Dname="ARMCM7">
 370         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 371         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 372       </device>
 373
 374       <device Dname="ARMCM7_SP">
 375         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 376         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 377       </device>
 378
 379       <device Dname="ARMCM7_DP">
 380         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 381         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 382       </device>
 383     </family>
 384
 385     <!-- ******************************  Cortex-M23  ********************** -->
 386     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 387       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 388       <description>
 389 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 390 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 391 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 392       </description>
 393       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 394       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 395       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 396       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 397       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 398       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 399
 400       <device Dname="ARMCM23">
 401         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 402         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 403       </device>
 404
 405       <device Dname="ARMCM23_TZ">
 406         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 407         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 408       </device>
 409     </family>
 410
 411     <!-- ******************************  Cortex-M33  ****************************** -->
 412     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 413       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 414       <description>
 415 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 416 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 417       </description>
 418       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 419       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 420       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 421       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 422       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 423       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 424
 425       <device Dname="ARMCM33">
 426         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 427         <description>
 428           no DSP Instructions, no Floating Point Unit, no TrustZone
 429         </description>
 430         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 431       </device>
 432
 433       <device Dname="ARMCM33_TZ">
 434         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 435         <description>
 436           no DSP Instructions, no Floating Point Unit, TrustZone
 437         </description>
 438         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 439       </device>
 440
 441       <device Dname="ARMCM33_DSP_FP">
 442         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 443         <description>
 444           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 445         </description>
 446         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 447       </device>
 448
 449       <device Dname="ARMCM33_DSP_FP_TZ">
 450         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 451         <description>
 452           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 453         </description>
 454         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 455       </device>
 456     </family>
 457
 458     <!-- ******************************  ARMSC000  ****************************** -->
 459     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 460       <description>
 461 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 462 - simple, easy-to-use programmers model
 463 - highly efficient ultra-low power operation
 464 - excellent code density
 465 - deterministic, high-performance interrupt handling
 466       </description>
 467       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 468       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 469       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 470       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 471
 472       <device Dname="ARMSC000">
 473         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 474         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 475       </device>
 476     </family>
 477
 478     <!-- ******************************  ARMSC300  ****************************** -->
 479     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 480       <description>
 481 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 482 - simple, easy-to-use programmers model
 483 - highly efficient ultra-low power operation
 484 - excellent code density
 485 - deterministic, high-performance interrupt handling
 486       </description>
 487       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 488       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 489       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 490       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 491
 492       <device Dname="ARMSC300">
 493         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 494         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 495       </device>
 496     </family>
 497
 498     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 499     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 500       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 501       <description>
 502 Armv8-M Baseline based device with TrustZone
 503       </description>
 504       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 505       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 506       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 507       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 508       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 509       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 510
 511       <device Dname="ARMv8MBL">
 512         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 513         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 514       </device>
 515     </family>
 516
 517     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 518     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 519       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 520       <description>
 521 Armv8-M Mainline based device with TrustZone
 522       </description>
 523       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 524       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 525       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 526       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 527       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 528       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 529
 530       <device Dname="ARMv8MML">
 531         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 532         <description>
 533           no DSP Instructions, no Floating Point Unit, TrustZone
 534         </description>
 535         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 536       </device>
 537
 538       <device Dname="ARMv8MML_DSP">
 539         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 540         <description>
 541           DSP Instructions, no Floating Point Unit, TrustZone
 542         </description>
 543         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 544       </device>
 545
 546       <device Dname="ARMv8MML_SP">
 547         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 548         <description>
 549           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 550         </description>
 551         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 552       </device>
 553
 554       <device Dname="ARMv8MML_DSP_SP">
 555         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 556         <description>
 557           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 558         </description>
 559         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 560       </device>
 561
 562       <device Dname="ARMv8MML_DP">
 563         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 564         <description>
 565           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 566         </description>
 567         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 568       </device>
 569
 570       <device Dname="ARMv8MML_DSP_DP">
 571         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 572         <description>
 573           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 574         </description>
 575         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 576       </device>
 577     </family>
 578
 579     <!-- ******************************  Cortex-A5  ****************************** -->
 580     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 581       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 582       <description>
 583 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 584 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 585 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 586       </description>
 587
 588       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 589       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 590
 591       <device Dname="ARMCA5">
 592         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 593         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 594       </device>
 595     </family>
 596
 597     <!-- ******************************  Cortex-A7  ****************************** -->
 598     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 599       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 600       <description>
 601 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 602 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 603 an optional integrated GIC, and an optional L2 cache controller.
 604       </description>
 605
 606       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 607       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 608
 609       <device Dname="ARMCA7">
 610         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 611         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 612       </device>
 613     </family>
 614
 615     <!-- ******************************  Cortex-A9  ****************************** -->
 616     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 617       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 618       <description>
 619 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 620 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 621 and 8-bit Java bytecodes in Jazelle state.
 622       </description>
 623
 624       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 625       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 626
 627       <device Dname="ARMCA9">
 628         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 629         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 630       </device>
 631     </family>
 632   </devices>
 633
 634
 635   <apis>
 636     <!-- CMSIS Device API -->
 637     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 638       <description>Device interrupt controller interface</description>
 639       <files>
 640         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 641       </files>
 642     </api>
 643     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 644       <description>RTOS Kernel system tick timer interface</description>
 645       <files>
 646         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 647       </files>
 648     </api>
 649     <!-- CMSIS-RTOS API -->
 650     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 651       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 652       <files>
 653         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 654       </files>
 655     </api>
 656     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 657       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 658       <files>
 659         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 660         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 661       </files>
 662     </api>
 663     <!-- CMSIS Driver API -->
 664     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 665       <description>USART Driver API for Cortex-M</description>
 666       <files>
 667         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 668         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 669       </files>
 670     </api>
 671     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 672       <description>SPI Driver API for Cortex-M</description>
 673       <files>
 674         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 675         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 676       </files>
 677     </api>
 678     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 679       <description>SAI Driver API for Cortex-M</description>
 680       <files>
 681         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 682         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 683       </files>
 684     </api>
 685     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 686       <description>I2C Driver API for Cortex-M</description>
 687       <files>
 688         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 689         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 690       </files>
 691     </api>
 692     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 693       <description>CAN Driver API for Cortex-M</description>
 694       <files>
 695         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 696         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 697       </files>
 698     </api>
 699     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 700       <description>Flash Driver API for Cortex-M</description>
 701       <files>
 702         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 703         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 704       </files>
 705     </api>
 706     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 707       <description>MCI Driver API for Cortex-M</description>
 708       <files>
 709         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 710         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 711       </files>
 712     </api>
 713     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 714       <description>NAND Flash Driver API for Cortex-M</description>
 715       <files>
 716         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 717         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 718       </files>
 719     </api>
 720     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 721       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 722       <files>
 723         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 724         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 725         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 726       </files>
 727     </api>
 728     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 729       <description>Ethernet MAC Driver API for Cortex-M</description>
 730       <files>
 731         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 732         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 733       </files>
 734     </api>
 735     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 736       <description>Ethernet PHY Driver API for Cortex-M</description>
 737       <files>
 738         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 739         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 740       </files>
 741     </api>
 742     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 743       <description>USB Device Driver API for Cortex-M</description>
 744       <files>
 745         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 746         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 747       </files>
 748     </api>
 749     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 750       <description>USB Host Driver API for Cortex-M</description>
 751       <files>
 752         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 753         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 754       </files>
 755     </api>
 756   </apis>
 757
 758   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 759   <conditions>
 760     <!-- compiler -->
 761     <condition id="ARMCC6">
 762       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 763       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 764     </condition>
 765     <condition id="ARMCC5">
 766       <require Tcompiler="ARMCC" Toptions="AC5"/>
 767     </condition>
 768     <condition id="ARMCC">
 769       <require Tcompiler="ARMCC"/>
 770     </condition>
 771     <condition id="GCC">
 772       <require Tcompiler="GCC"/>
 773     </condition>
 774     <condition id="IAR">
 775       <require Tcompiler="IAR"/>
 776     </condition>
 777     <condition id="ARMCC GCC">
 778       <accept Tcompiler="ARMCC"/>
 779       <accept Tcompiler="GCC"/>
 780     </condition>
 781     <condition id="ARMCC GCC IAR">
 782       <accept Tcompiler="ARMCC"/>
 783       <accept Tcompiler="GCC"/>
 784       <accept Tcompiler="IAR"/>
 785     </condition>
 786
 787     <!-- Arm architecture -->
 788     <condition id="ARMv6-M Device">
 789       <description>Armv6-M architecture based device</description>
 790       <accept Dcore="Cortex-M0"/>
 791       <accept Dcore="Cortex-M1"/>
 792       <accept Dcore="Cortex-M0+"/>
 793       <accept Dcore="SC000"/>
 794     </condition>
 795     <condition id="ARMv7-M Device">
 796       <description>Armv7-M architecture based device</description>
 797       <accept Dcore="Cortex-M3"/>
 798       <accept Dcore="Cortex-M4"/>
 799       <accept Dcore="Cortex-M7"/>
 800       <accept Dcore="SC300"/>
 801     </condition>
 802     <condition id="ARMv8-M Device">
 803       <description>Armv8-M architecture based device</description>
 804       <accept Dcore="ARMV8MBL"/>
 805       <accept Dcore="ARMV8MML"/>
 806       <accept Dcore="Cortex-M23"/>
 807       <accept Dcore="Cortex-M33"/>
 808     </condition>
 809     <condition id="ARMv8-M TZ Device">
 810       <description>Armv8-M architecture based device with TrustZone</description>
 811       <require condition="ARMv8-M Device"/>
 812       <require Dtz="TZ"/>
 813     </condition>
 814     <condition id="ARMv6_7-M Device">
 815       <description>Armv6_7-M architecture based device</description>
 816       <accept condition="ARMv6-M Device"/>
 817       <accept condition="ARMv7-M Device"/>
 818     </condition>
 819     <condition id="ARMv6_7_8-M Device">
 820       <description>Armv6_7_8-M architecture based device</description>
 821       <accept condition="ARMv6-M Device"/>
 822       <accept condition="ARMv7-M Device"/>
 823       <accept condition="ARMv8-M Device"/>
 824     </condition>
 825     <condition id="ARMv7-A Device">
 826       <description>Armv7-A architecture based device</description>
 827       <accept Dcore="Cortex-A5"/>
 828       <accept Dcore="Cortex-A7"/>
 829       <accept Dcore="Cortex-A9"/>
 830     </condition>
 831
 832     <!-- ARM core -->
 833     <condition id="CM0">
 834       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 835       <accept Dcore="Cortex-M0"/>
 836       <accept Dcore="Cortex-M0+"/>
 837       <accept Dcore="SC000"/>
 838     </condition>
 839     <condition id="CM1">
 840       <description>Cortex-M1</description>
 841       <require Dcore="Cortex-M1"/>
 842     </condition>
 843     <condition id="CM3">
 844       <description>Cortex-M3 or SC300 processor based device</description>
 845       <accept Dcore="Cortex-M3"/>
 846       <accept Dcore="SC300"/>
 847     </condition>
 848     <condition id="CM4">
 849       <description>Cortex-M4 processor based device</description>
 850       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 851     </condition>
 852     <condition id="CM4_FP">
 853       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 854       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 855       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 856       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 857     </condition>
 858     <condition id="CM7">
 859       <description>Cortex-M7 processor based device</description>
 860       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 861     </condition>
 862     <condition id="CM7_FP">
 863       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 864       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 865       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 866     </condition>
 867     <condition id="CM7_SP">
 868       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 869       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 870     </condition>
 871     <condition id="CM7_DP">
 872       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 873       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 874     </condition>
 875     <condition id="CM23">
 876       <description>Cortex-M23 processor based device</description>
 877       <require Dcore="Cortex-M23"/>
 878     </condition>
 879     <condition id="CM33">
 880       <description>Cortex-M33 processor based device</description>
 881       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 882     </condition>
 883     <condition id="CM33_FP">
 884       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 885       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 886     </condition>
 887     <condition id="ARMv8MBL">
 888       <description>Armv8-M Baseline processor based device</description>
 889       <require Dcore="ARMV8MBL"/>
 890     </condition>
 891     <condition id="ARMv8MML">
 892       <description>Armv8-M Mainline processor based device</description>
 893       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 894     </condition>
 895     <condition id="ARMv8MML_FP">
 896       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
 897       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 898       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 899     </condition>
 900
 901     <condition id="CM33_NODSP_NOFPU">
 902       <description>CM33, no DSP, no FPU</description>
 903       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 904     </condition>
 905     <condition id="CM33_DSP_NOFPU">
 906       <description>CM33, DSP, no FPU</description>
 907       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 908     </condition>
 909     <condition id="CM33_NODSP_SP">
 910       <description>CM33, no DSP, SP FPU</description>
 911       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 912     </condition>
 913     <condition id="CM33_DSP_SP">
 914       <description>CM33, DSP, SP FPU</description>
 915       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 916     </condition>
 917
 918     <condition id="ARMv8MML_NODSP_NOFPU">
 919       <description>Armv8-M Mainline, no DSP, no FPU</description>
 920       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 921     </condition>
 922     <condition id="ARMv8MML_DSP_NOFPU">
 923       <description>Armv8-M Mainline, DSP, no FPU</description>
 924       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 925     </condition>
 926     <condition id="ARMv8MML_NODSP_SP">
 927       <description>Armv8-M Mainline, no DSP, SP FPU</description>
 928       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 929     </condition>
 930     <condition id="ARMv8MML_DSP_SP">
 931       <description>Armv8-M Mainline, DSP, SP FPU</description>
 932       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 933     </condition>
 934
 935     <condition id="CA5_CA9">
 936       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 937       <accept Dcore="Cortex-A5"/>
 938       <accept Dcore="Cortex-A9"/>
 939     </condition>
 940
 941     <condition id="CA7">
 942       <description>Cortex-A7 processor based device</description>
 943       <accept Dcore="Cortex-A7"/>
 944     </condition>
 945
 946     <!-- ARMCC compiler -->
 947     <condition id="CA_ARMCC5">
 948       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
 949       <require condition="ARMv7-A Device"/>
 950       <require condition="ARMCC5"/>
 951     </condition>
 952     <condition id="CA_ARMCC6">
 953       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
 954       <require condition="ARMv7-A Device"/>
 955       <require condition="ARMCC6"/>
 956     </condition>
 957
 958     <condition id="CM0_ARMCC">
 959       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
 960       <require condition="CM0"/>
 961       <require Tcompiler="ARMCC"/>
 962     </condition>
 963     <condition id="CM0_LE_ARMCC">
 964       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
 965       <require condition="CM0_ARMCC"/>
 966       <require Dendian="Little-endian"/>
 967     </condition>
 968     <condition id="CM0_BE_ARMCC">
 969       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
 970       <require condition="CM0_ARMCC"/>
 971       <require Dendian="Big-endian"/>
 972     </condition>
 973
 974     <condition id="CM1_ARMCC">
 975       <description>Cortex-M1 based device for the Arm Compiler</description>
 976       <require condition="CM1"/>
 977       <require Tcompiler="ARMCC"/>
 978     </condition>
 979     <condition id="CM1_LE_ARMCC">
 980       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
 981       <require condition="CM1_ARMCC"/>
 982       <require Dendian="Little-endian"/>
 983     </condition>
 984     <condition id="CM1_BE_ARMCC">
 985       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
 986       <require condition="CM1_ARMCC"/>
 987       <require Dendian="Big-endian"/>
 988     </condition>
 989
 990     <condition id="CM3_ARMCC">
 991       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
 992       <require condition="CM3"/>
 993       <require Tcompiler="ARMCC"/>
 994     </condition>
 995     <condition id="CM3_LE_ARMCC">
 996       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
 997       <require condition="CM3_ARMCC"/>
 998       <require Dendian="Little-endian"/>
 999     </condition>
1000     <condition id="CM3_BE_ARMCC">
1001       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1002       <require condition="CM3_ARMCC"/>
1003       <require Dendian="Big-endian"/>
1004     </condition>
1005
1006     <condition id="CM4_ARMCC">
1007       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1008       <require condition="CM4"/>
1009       <require Tcompiler="ARMCC"/>
1010     </condition>
1011     <condition id="CM4_LE_ARMCC">
1012       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1013       <require condition="CM4_ARMCC"/>
1014       <require Dendian="Little-endian"/>
1015     </condition>
1016     <condition id="CM4_BE_ARMCC">
1017       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1018       <require condition="CM4_ARMCC"/>
1019       <require Dendian="Big-endian"/>
1020     </condition>
1021
1022     <condition id="CM4_FP_ARMCC">
1023       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1024       <require condition="CM4_FP"/>
1025       <require Tcompiler="ARMCC"/>
1026     </condition>
1027     <condition id="CM4_FP_LE_ARMCC">
1028       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1029       <require condition="CM4_FP_ARMCC"/>
1030       <require Dendian="Little-endian"/>
1031     </condition>
1032     <condition id="CM4_FP_BE_ARMCC">
1033       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1034       <require condition="CM4_FP_ARMCC"/>
1035       <require Dendian="Big-endian"/>
1036     </condition>
1037
1038     <condition id="CM7_ARMCC">
1039       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1040       <require condition="CM7"/>
1041       <require Tcompiler="ARMCC"/>
1042     </condition>
1043     <condition id="CM7_LE_ARMCC">
1044       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1045       <require condition="CM7_ARMCC"/>
1046       <require Dendian="Little-endian"/>
1047     </condition>
1048     <condition id="CM7_BE_ARMCC">
1049       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1050       <require condition="CM7_ARMCC"/>
1051       <require Dendian="Big-endian"/>
1052     </condition>
1053
1054     <condition id="CM7_FP_ARMCC">
1055       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1056       <require condition="CM7_FP"/>
1057       <require Tcompiler="ARMCC"/>
1058     </condition>
1059     <condition id="CM7_FP_LE_ARMCC">
1060       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1061       <require condition="CM7_FP_ARMCC"/>
1062       <require Dendian="Little-endian"/>
1063     </condition>
1064     <condition id="CM7_FP_BE_ARMCC">
1065       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1066       <require condition="CM7_FP_ARMCC"/>
1067       <require Dendian="Big-endian"/>
1068     </condition>
1069
1070     <condition id="CM7_SP_ARMCC">
1071       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1072       <require condition="CM7_SP"/>
1073       <require Tcompiler="ARMCC"/>
1074     </condition>
1075     <condition id="CM7_SP_LE_ARMCC">
1076       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1077       <require condition="CM7_SP_ARMCC"/>
1078       <require Dendian="Little-endian"/>
1079     </condition>
1080     <condition id="CM7_SP_BE_ARMCC">
1081       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1082       <require condition="CM7_SP_ARMCC"/>
1083       <require Dendian="Big-endian"/>
1084     </condition>
1085
1086     <condition id="CM7_DP_ARMCC">
1087       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1088       <require condition="CM7_DP"/>
1089       <require Tcompiler="ARMCC"/>
1090     </condition>
1091     <condition id="CM7_DP_LE_ARMCC">
1092       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1093       <require condition="CM7_DP_ARMCC"/>
1094       <require Dendian="Little-endian"/>
1095     </condition>
1096     <condition id="CM7_DP_BE_ARMCC">
1097       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1098       <require condition="CM7_DP_ARMCC"/>
1099       <require Dendian="Big-endian"/>
1100     </condition>
1101
1102     <condition id="CM23_ARMCC">
1103       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1104       <require condition="CM23"/>
1105       <require Tcompiler="ARMCC"/>
1106     </condition>
1107     <condition id="CM23_LE_ARMCC">
1108       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1109       <require condition="CM23_ARMCC"/>
1110       <require Dendian="Little-endian"/>
1111     </condition>
1112     <condition id="CM23_BE_ARMCC">
1113       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1114       <require condition="CM23_ARMCC"/>
1115       <require Dendian="Big-endian"/>
1116     </condition>
1117
1118     <condition id="CM33_ARMCC">
1119       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1120       <require condition="CM33"/>
1121       <require Tcompiler="ARMCC"/>
1122     </condition>
1123     <condition id="CM33_LE_ARMCC">
1124       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1125       <require condition="CM33_ARMCC"/>
1126       <require Dendian="Little-endian"/>
1127     </condition>
1128     <condition id="CM33_BE_ARMCC">
1129       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1130       <require condition="CM33_ARMCC"/>
1131       <require Dendian="Big-endian"/>
1132     </condition>
1133
1134     <condition id="CM33_FP_ARMCC">
1135       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1136       <require condition="CM33_FP"/>
1137       <require Tcompiler="ARMCC"/>
1138     </condition>
1139     <condition id="CM33_FP_LE_ARMCC">
1140       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1141       <require condition="CM33_FP_ARMCC"/>
1142       <require Dendian="Little-endian"/>
1143     </condition>
1144     <condition id="CM33_FP_BE_ARMCC">
1145       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1146       <require condition="CM33_FP_ARMCC"/>
1147       <require Dendian="Big-endian"/>
1148     </condition>
1149
1150     <condition id="CM33_NODSP_NOFPU_ARMCC">
1151       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1152       <require condition="CM33_NODSP_NOFPU"/>
1153       <require Tcompiler="ARMCC"/>
1154     </condition>
1155     <condition id="CM33_DSP_NOFPU_ARMCC">
1156       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1157       <require condition="CM33_DSP_NOFPU"/>
1158       <require Tcompiler="ARMCC"/>
1159     </condition>
1160     <condition id="CM33_NODSP_SP_ARMCC">
1161       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1162       <require condition="CM33_NODSP_SP"/>
1163       <require Tcompiler="ARMCC"/>
1164     </condition>
1165     <condition id="CM33_DSP_SP_ARMCC">
1166       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1167       <require condition="CM33_DSP_SP"/>
1168       <require Tcompiler="ARMCC"/>
1169     </condition>
1170     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1171       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1172       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1173       <require Dendian="Little-endian"/>
1174     </condition>
1175     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1176       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1177       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1178       <require Dendian="Little-endian"/>
1179     </condition>
1180     <condition id="CM33_NODSP_SP_LE_ARMCC">
1181       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1182       <require condition="CM33_NODSP_SP_ARMCC"/>
1183       <require Dendian="Little-endian"/>
1184     </condition>
1185     <condition id="CM33_DSP_SP_LE_ARMCC">
1186       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1187       <require condition="CM33_DSP_SP_ARMCC"/>
1188       <require Dendian="Little-endian"/>
1189     </condition>
1190
1191     <condition id="ARMv8MBL_ARMCC">
1192       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1193       <require condition="ARMv8MBL"/>
1194       <require Tcompiler="ARMCC"/>
1195     </condition>
1196     <condition id="ARMv8MBL_LE_ARMCC">
1197       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1198       <require condition="ARMv8MBL_ARMCC"/>
1199       <require Dendian="Little-endian"/>
1200     </condition>
1201     <condition id="ARMv8MBL_BE_ARMCC">
1202       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1203       <require condition="ARMv8MBL_ARMCC"/>
1204       <require Dendian="Big-endian"/>
1205     </condition>
1206
1207     <condition id="ARMv8MML_ARMCC">
1208       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1209       <require condition="ARMv8MML"/>
1210       <require Tcompiler="ARMCC"/>
1211     </condition>
1212     <condition id="ARMv8MML_LE_ARMCC">
1213       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1214       <require condition="ARMv8MML_ARMCC"/>
1215       <require Dendian="Little-endian"/>
1216     </condition>
1217     <condition id="ARMv8MML_BE_ARMCC">
1218       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1219       <require condition="ARMv8MML_ARMCC"/>
1220       <require Dendian="Big-endian"/>
1221     </condition>
1222
1223     <condition id="ARMv8MML_FP_ARMCC">
1224       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1225       <require condition="ARMv8MML_FP"/>
1226       <require Tcompiler="ARMCC"/>
1227     </condition>
1228     <condition id="ARMv8MML_FP_LE_ARMCC">
1229       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1230       <require condition="ARMv8MML_FP_ARMCC"/>
1231       <require Dendian="Little-endian"/>
1232     </condition>
1233     <condition id="ARMv8MML_FP_BE_ARMCC">
1234       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1235       <require condition="ARMv8MML_FP_ARMCC"/>
1236       <require Dendian="Big-endian"/>
1237     </condition>
1238
1239     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1240       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1241       <require condition="ARMv8MML_NODSP_NOFPU"/>
1242       <require Tcompiler="ARMCC"/>
1243     </condition>
1244     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1245       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1246       <require condition="ARMv8MML_DSP_NOFPU"/>
1247       <require Tcompiler="ARMCC"/>
1248     </condition>
1249     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1250       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1251       <require condition="ARMv8MML_NODSP_SP"/>
1252       <require Tcompiler="ARMCC"/>
1253     </condition>
1254     <condition id="ARMv8MML_DSP_SP_ARMCC">
1255       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1256       <require condition="ARMv8MML_DSP_SP"/>
1257       <require Tcompiler="ARMCC"/>
1258     </condition>
1259     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1260       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1261       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1262       <require Dendian="Little-endian"/>
1263     </condition>
1264     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1265       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1266       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1267       <require Dendian="Little-endian"/>
1268     </condition>
1269     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1270       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1271       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1272       <require Dendian="Little-endian"/>
1273     </condition>
1274     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1275       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1276       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1277       <require Dendian="Little-endian"/>
1278     </condition>
1279
1280     <!-- GCC compiler -->
1281     <condition id="CA_GCC">
1282       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1283       <require condition="ARMv7-A Device"/>
1284       <require Tcompiler="GCC"/>
1285     </condition>
1286
1287     <condition id="CM0_GCC">
1288       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1289       <require condition="CM0"/>
1290       <require Tcompiler="GCC"/>
1291     </condition>
1292     <condition id="CM0_LE_GCC">
1293       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1294       <require condition="CM0_GCC"/>
1295       <require Dendian="Little-endian"/>
1296     </condition>
1297     <condition id="CM0_BE_GCC">
1298       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1299       <require condition="CM0_GCC"/>
1300       <require Dendian="Big-endian"/>
1301     </condition>
1302
1303     <condition id="CM1_GCC">
1304       <description>Cortex-M1 based device for the GCC Compiler</description>
1305       <require condition="CM1"/>
1306       <require Tcompiler="GCC"/>
1307     </condition>
1308     <condition id="CM1_LE_GCC">
1309       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1310       <require condition="CM1_GCC"/>
1311       <require Dendian="Little-endian"/>
1312     </condition>
1313     <condition id="CM1_BE_GCC">
1314       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1315       <require condition="CM1_GCC"/>
1316       <require Dendian="Big-endian"/>
1317     </condition>
1318
1319     <condition id="CM3_GCC">
1320       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1321       <require condition="CM3"/>
1322       <require Tcompiler="GCC"/>
1323     </condition>
1324     <condition id="CM3_LE_GCC">
1325       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1326       <require condition="CM3_GCC"/>
1327       <require Dendian="Little-endian"/>
1328     </condition>
1329     <condition id="CM3_BE_GCC">
1330       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1331       <require condition="CM3_GCC"/>
1332       <require Dendian="Big-endian"/>
1333     </condition>
1334
1335     <condition id="CM4_GCC">
1336       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1337       <require condition="CM4"/>
1338       <require Tcompiler="GCC"/>
1339     </condition>
1340     <condition id="CM4_LE_GCC">
1341       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1342       <require condition="CM4_GCC"/>
1343       <require Dendian="Little-endian"/>
1344     </condition>
1345     <condition id="CM4_BE_GCC">
1346       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1347       <require condition="CM4_GCC"/>
1348       <require Dendian="Big-endian"/>
1349     </condition>
1350
1351     <condition id="CM4_FP_GCC">
1352       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1353       <require condition="CM4_FP"/>
1354       <require Tcompiler="GCC"/>
1355     </condition>
1356     <condition id="CM4_FP_LE_GCC">
1357       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1358       <require condition="CM4_FP_GCC"/>
1359       <require Dendian="Little-endian"/>
1360     </condition>
1361     <condition id="CM4_FP_BE_GCC">
1362       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1363       <require condition="CM4_FP_GCC"/>
1364       <require Dendian="Big-endian"/>
1365     </condition>
1366
1367     <condition id="CM7_GCC">
1368       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1369       <require condition="CM7"/>
1370       <require Tcompiler="GCC"/>
1371     </condition>
1372     <condition id="CM7_LE_GCC">
1373       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1374       <require condition="CM7_GCC"/>
1375       <require Dendian="Little-endian"/>
1376     </condition>
1377     <condition id="CM7_BE_GCC">
1378       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1379       <require condition="CM7_GCC"/>
1380       <require Dendian="Big-endian"/>
1381     </condition>
1382
1383     <condition id="CM7_FP_GCC">
1384       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1385       <require condition="CM7_FP"/>
1386       <require Tcompiler="GCC"/>
1387     </condition>
1388     <condition id="CM7_FP_LE_GCC">
1389       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1390       <require condition="CM7_FP_GCC"/>
1391       <require Dendian="Little-endian"/>
1392     </condition>
1393     <condition id="CM7_FP_BE_GCC">
1394       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1395       <require condition="CM7_FP_GCC"/>
1396       <require Dendian="Big-endian"/>
1397     </condition>
1398
1399     <condition id="CM7_SP_GCC">
1400       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1401       <require condition="CM7_SP"/>
1402       <require Tcompiler="GCC"/>
1403     </condition>
1404     <condition id="CM7_SP_LE_GCC">
1405       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1406       <require condition="CM7_SP_GCC"/>
1407       <require Dendian="Little-endian"/>
1408     </condition>
1409     <condition id="CM7_SP_BE_GCC">
1410       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1411       <require condition="CM7_SP_GCC"/>
1412       <require Dendian="Big-endian"/>
1413     </condition>
1414
1415     <condition id="CM7_DP_GCC">
1416       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1417       <require condition="CM7_DP"/>
1418       <require Tcompiler="GCC"/>
1419     </condition>
1420     <condition id="CM7_DP_LE_GCC">
1421       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1422       <require condition="CM7_DP_GCC"/>
1423       <require Dendian="Little-endian"/>
1424     </condition>
1425     <condition id="CM7_DP_BE_GCC">
1426       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1427       <require condition="CM7_DP_GCC"/>
1428       <require Dendian="Big-endian"/>
1429     </condition>
1430
1431     <condition id="CM23_GCC">
1432       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1433       <require condition="CM23"/>
1434       <require Tcompiler="GCC"/>
1435     </condition>
1436     <condition id="CM23_LE_GCC">
1437       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1438       <require condition="CM23_GCC"/>
1439       <require Dendian="Little-endian"/>
1440     </condition>
1441     <condition id="CM23_BE_GCC">
1442       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1443       <require condition="CM23_GCC"/>
1444       <require Dendian="Big-endian"/>
1445     </condition>
1446
1447     <condition id="CM33_GCC">
1448       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1449       <require condition="CM33"/>
1450       <require Tcompiler="GCC"/>
1451     </condition>
1452     <condition id="CM33_LE_GCC">
1453       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1454       <require condition="CM33_GCC"/>
1455       <require Dendian="Little-endian"/>
1456     </condition>
1457     <condition id="CM33_BE_GCC">
1458       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1459       <require condition="CM33_GCC"/>
1460       <require Dendian="Big-endian"/>
1461     </condition>
1462
1463     <condition id="CM33_FP_GCC">
1464       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1465       <require condition="CM33_FP"/>
1466       <require Tcompiler="GCC"/>
1467     </condition>
1468     <condition id="CM33_FP_LE_GCC">
1469       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1470       <require condition="CM33_FP_GCC"/>
1471       <require Dendian="Little-endian"/>
1472     </condition>
1473     <condition id="CM33_FP_BE_GCC">
1474       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1475       <require condition="CM33_FP_GCC"/>
1476       <require Dendian="Big-endian"/>
1477     </condition>
1478
1479     <condition id="CM33_NODSP_NOFPU_GCC">
1480       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1481       <require condition="CM33_NODSP_NOFPU"/>
1482       <require Tcompiler="GCC"/>
1483     </condition>
1484     <condition id="CM33_DSP_NOFPU_GCC">
1485       <description>CM33, DSP, no FPU, GCC Compiler</description>
1486       <require condition="CM33_DSP_NOFPU"/>
1487       <require Tcompiler="GCC"/>
1488     </condition>
1489     <condition id="CM33_NODSP_SP_GCC">
1490       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1491       <require condition="CM33_NODSP_SP"/>
1492       <require Tcompiler="GCC"/>
1493     </condition>
1494     <condition id="CM33_DSP_SP_GCC">
1495       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1496       <require condition="CM33_DSP_SP"/>
1497       <require Tcompiler="GCC"/>
1498     </condition>
1499     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1500       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1501       <require condition="CM33_NODSP_NOFPU_GCC"/>
1502       <require Dendian="Little-endian"/>
1503     </condition>
1504     <condition id="CM33_DSP_NOFPU_LE_GCC">
1505       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1506       <require condition="CM33_DSP_NOFPU_GCC"/>
1507       <require Dendian="Little-endian"/>
1508     </condition>
1509     <condition id="CM33_NODSP_SP_LE_GCC">
1510       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1511       <require condition="CM33_NODSP_SP_GCC"/>
1512       <require Dendian="Little-endian"/>
1513     </condition>
1514     <condition id="CM33_DSP_SP_LE_GCC">
1515       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1516       <require condition="CM33_DSP_SP_GCC"/>
1517       <require Dendian="Little-endian"/>
1518     </condition>
1519
1520     <condition id="ARMv8MBL_GCC">
1521       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1522       <require condition="ARMv8MBL"/>
1523       <require Tcompiler="GCC"/>
1524     </condition>
1525     <condition id="ARMv8MBL_LE_GCC">
1526       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1527       <require condition="ARMv8MBL_GCC"/>
1528       <require Dendian="Little-endian"/>
1529     </condition>
1530     <condition id="ARMv8MBL_BE_GCC">
1531       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1532       <require condition="ARMv8MBL_GCC"/>
1533       <require Dendian="Big-endian"/>
1534     </condition>
1535
1536     <condition id="ARMv8MML_GCC">
1537       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1538       <require condition="ARMv8MML"/>
1539       <require Tcompiler="GCC"/>
1540     </condition>
1541     <condition id="ARMv8MML_LE_GCC">
1542       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1543       <require condition="ARMv8MML_GCC"/>
1544       <require Dendian="Little-endian"/>
1545     </condition>
1546     <condition id="ARMv8MML_BE_GCC">
1547       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1548       <require condition="ARMv8MML_GCC"/>
1549       <require Dendian="Big-endian"/>
1550     </condition>
1551
1552     <condition id="ARMv8MML_FP_GCC">
1553       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1554       <require condition="ARMv8MML_FP"/>
1555       <require Tcompiler="GCC"/>
1556     </condition>
1557     <condition id="ARMv8MML_FP_LE_GCC">
1558       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1559       <require condition="ARMv8MML_FP_GCC"/>
1560       <require Dendian="Little-endian"/>
1561     </condition>
1562     <condition id="ARMv8MML_FP_BE_GCC">
1563       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1564       <require condition="ARMv8MML_FP_GCC"/>
1565       <require Dendian="Big-endian"/>
1566     </condition>
1567
1568     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1569       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1570       <require condition="ARMv8MML_NODSP_NOFPU"/>
1571       <require Tcompiler="GCC"/>
1572     </condition>
1573     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1574       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1575       <require condition="ARMv8MML_DSP_NOFPU"/>
1576       <require Tcompiler="GCC"/>
1577     </condition>
1578     <condition id="ARMv8MML_NODSP_SP_GCC">
1579       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1580       <require condition="ARMv8MML_NODSP_SP"/>
1581       <require Tcompiler="GCC"/>
1582     </condition>
1583     <condition id="ARMv8MML_DSP_SP_GCC">
1584       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1585       <require condition="ARMv8MML_DSP_SP"/>
1586       <require Tcompiler="GCC"/>
1587     </condition>
1588     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1589       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1590       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1591       <require Dendian="Little-endian"/>
1592     </condition>
1593     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1594       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1595       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1596       <require Dendian="Little-endian"/>
1597     </condition>
1598     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1599       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1600       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1601       <require Dendian="Little-endian"/>
1602     </condition>
1603     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1604       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1605       <require condition="ARMv8MML_DSP_SP_GCC"/>
1606       <require Dendian="Little-endian"/>
1607     </condition>
1608
1609     <!-- IAR compiler -->
1610     <condition id="CA_IAR">
1611       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1612       <require condition="ARMv7-A Device"/>
1613       <require Tcompiler="IAR"/>
1614     </condition>
1615
1616     <condition id="CM0_IAR">
1617       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1618       <require condition="CM0"/>
1619       <require Tcompiler="IAR"/>
1620     </condition>
1621     <condition id="CM0_LE_IAR">
1622       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1623       <require condition="CM0_IAR"/>
1624       <require Dendian="Little-endian"/>
1625     </condition>
1626     <condition id="CM0_BE_IAR">
1627       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1628       <require condition="CM0_IAR"/>
1629       <require Dendian="Big-endian"/>
1630     </condition>
1631
1632     <condition id="CM1_IAR">
1633       <description>Cortex-M1 based device for the IAR Compiler</description>
1634       <require condition="CM1"/>
1635       <require Tcompiler="IAR"/>
1636     </condition>
1637     <condition id="CM1_LE_IAR">
1638       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1639       <require condition="CM1_IAR"/>
1640       <require Dendian="Little-endian"/>
1641     </condition>
1642     <condition id="CM1_BE_IAR">
1643       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1644       <require condition="CM1_IAR"/>
1645       <require Dendian="Big-endian"/>
1646     </condition>
1647
1648     <condition id="CM3_IAR">
1649       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1650       <require condition="CM3"/>
1651       <require Tcompiler="IAR"/>
1652     </condition>
1653     <condition id="CM3_LE_IAR">
1654       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1655       <require condition="CM3_IAR"/>
1656       <require Dendian="Little-endian"/>
1657     </condition>
1658     <condition id="CM3_BE_IAR">
1659       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1660       <require condition="CM3_IAR"/>
1661       <require Dendian="Big-endian"/>
1662     </condition>
1663
1664     <condition id="CM4_IAR">
1665       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1666       <require condition="CM4"/>
1667       <require Tcompiler="IAR"/>
1668     </condition>
1669     <condition id="CM4_LE_IAR">
1670       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1671       <require condition="CM4_IAR"/>
1672       <require Dendian="Little-endian"/>
1673     </condition>
1674     <condition id="CM4_BE_IAR">
1675       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1676       <require condition="CM4_IAR"/>
1677       <require Dendian="Big-endian"/>
1678     </condition>
1679
1680     <condition id="CM4_FP_IAR">
1681       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1682       <require condition="CM4_FP"/>
1683       <require Tcompiler="IAR"/>
1684     </condition>
1685     <condition id="CM4_FP_LE_IAR">
1686       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1687       <require condition="CM4_FP_IAR"/>
1688       <require Dendian="Little-endian"/>
1689     </condition>
1690     <condition id="CM4_FP_BE_IAR">
1691       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1692       <require condition="CM4_FP_IAR"/>
1693       <require Dendian="Big-endian"/>
1694     </condition>
1695
1696     <condition id="CM7_IAR">
1697       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1698       <require condition="CM7"/>
1699       <require Tcompiler="IAR"/>
1700     </condition>
1701     <condition id="CM7_LE_IAR">
1702       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1703       <require condition="CM7_IAR"/>
1704       <require Dendian="Little-endian"/>
1705     </condition>
1706     <condition id="CM7_BE_IAR">
1707       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1708       <require condition="CM7_IAR"/>
1709       <require Dendian="Big-endian"/>
1710     </condition>
1711
1712     <condition id="CM7_FP_IAR">
1713       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1714       <require condition="CM7_FP"/>
1715       <require Tcompiler="IAR"/>
1716     </condition>
1717     <condition id="CM7_FP_LE_IAR">
1718       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1719       <require condition="CM7_FP_IAR"/>
1720       <require Dendian="Little-endian"/>
1721     </condition>
1722     <condition id="CM7_FP_BE_IAR">
1723       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1724       <require condition="CM7_FP_IAR"/>
1725       <require Dendian="Big-endian"/>
1726     </condition>
1727
1728     <condition id="CM7_SP_IAR">
1729       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1730       <require condition="CM7_SP"/>
1731       <require Tcompiler="IAR"/>
1732     </condition>
1733     <condition id="CM7_SP_LE_IAR">
1734       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1735       <require condition="CM7_SP_IAR"/>
1736       <require Dendian="Little-endian"/>
1737     </condition>
1738     <condition id="CM7_SP_BE_IAR">
1739       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1740       <require condition="CM7_SP_IAR"/>
1741       <require Dendian="Big-endian"/>
1742     </condition>
1743
1744     <condition id="CM7_DP_IAR">
1745       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1746       <require condition="CM7_DP"/>
1747       <require Tcompiler="IAR"/>
1748     </condition>
1749     <condition id="CM7_DP_LE_IAR">
1750       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1751       <require condition="CM7_DP_IAR"/>
1752       <require Dendian="Little-endian"/>
1753     </condition>
1754     <condition id="CM7_DP_BE_IAR">
1755       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1756       <require condition="CM7_DP_IAR"/>
1757       <require Dendian="Big-endian"/>
1758     </condition>
1759
1760     <condition id="CM23_IAR">
1761       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1762       <require condition="CM23"/>
1763       <require Tcompiler="IAR"/>
1764     </condition>
1765     <condition id="CM23_LE_IAR">
1766       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1767       <require condition="CM23_IAR"/>
1768       <require Dendian="Little-endian"/>
1769     </condition>
1770     <condition id="CM23_BE_IAR">
1771       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1772       <require condition="CM23_IAR"/>
1773       <require Dendian="Big-endian"/>
1774     </condition>
1775
1776     <condition id="CM33_IAR">
1777       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1778       <require condition="CM33"/>
1779       <require Tcompiler="IAR"/>
1780     </condition>
1781     <condition id="CM33_LE_IAR">
1782       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1783       <require condition="CM33_IAR"/>
1784       <require Dendian="Little-endian"/>
1785     </condition>
1786     <condition id="CM33_BE_IAR">
1787       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1788       <require condition="CM33_IAR"/>
1789       <require Dendian="Big-endian"/>
1790     </condition>
1791
1792     <condition id="CM33_FP_IAR">
1793       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1794       <require condition="CM33_FP"/>
1795       <require Tcompiler="IAR"/>
1796     </condition>
1797     <condition id="CM33_FP_LE_IAR">
1798       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1799       <require condition="CM33_FP_IAR"/>
1800       <require Dendian="Little-endian"/>
1801     </condition>
1802     <condition id="CM33_FP_BE_IAR">
1803       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1804       <require condition="CM33_FP_IAR"/>
1805       <require Dendian="Big-endian"/>
1806     </condition>
1807
1808     <condition id="CM33_NODSP_NOFPU_IAR">
1809       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1810       <require condition="CM33_NODSP_NOFPU"/>
1811       <require Tcompiler="IAR"/>
1812     </condition>
1813     <condition id="CM33_DSP_NOFPU_IAR">
1814       <description>CM33, DSP, no FPU, IAR Compiler</description>
1815       <require condition="CM33_DSP_NOFPU"/>
1816       <require Tcompiler="IAR"/>
1817     </condition>
1818     <condition id="CM33_NODSP_SP_IAR">
1819       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1820       <require condition="CM33_NODSP_SP"/>
1821       <require Tcompiler="IAR"/>
1822     </condition>
1823     <condition id="CM33_DSP_SP_IAR">
1824       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1825       <require condition="CM33_DSP_SP"/>
1826       <require Tcompiler="IAR"/>
1827     </condition>
1828     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1829       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1830       <require condition="CM33_NODSP_NOFPU_IAR"/>
1831       <require Dendian="Little-endian"/>
1832     </condition>
1833     <condition id="CM33_DSP_NOFPU_LE_IAR">
1834       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1835       <require condition="CM33_DSP_NOFPU_IAR"/>
1836       <require Dendian="Little-endian"/>
1837     </condition>
1838     <condition id="CM33_NODSP_SP_LE_IAR">
1839       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1840       <require condition="CM33_NODSP_SP_IAR"/>
1841       <require Dendian="Little-endian"/>
1842     </condition>
1843     <condition id="CM33_DSP_SP_LE_IAR">
1844       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1845       <require condition="CM33_DSP_SP_IAR"/>
1846       <require Dendian="Little-endian"/>
1847     </condition>
1848
1849     <condition id="ARMv8MBL_IAR">
1850       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1851       <require condition="ARMv8MBL"/>
1852       <require Tcompiler="IAR"/>
1853     </condition>
1854     <condition id="ARMv8MBL_LE_IAR">
1855       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1856       <require condition="ARMv8MBL_IAR"/>
1857       <require Dendian="Little-endian"/>
1858     </condition>
1859     <condition id="ARMv8MBL_BE_IAR">
1860       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1861       <require condition="ARMv8MBL_IAR"/>
1862       <require Dendian="Big-endian"/>
1863     </condition>
1864
1865     <condition id="ARMv8MML_IAR">
1866       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1867       <require condition="ARMv8MML"/>
1868       <require Tcompiler="IAR"/>
1869     </condition>
1870     <condition id="ARMv8MML_LE_IAR">
1871       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1872       <require condition="ARMv8MML_IAR"/>
1873       <require Dendian="Little-endian"/>
1874     </condition>
1875     <condition id="ARMv8MML_BE_IAR">
1876       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1877       <require condition="ARMv8MML_IAR"/>
1878       <require Dendian="Big-endian"/>
1879     </condition>
1880
1881     <condition id="ARMv8MML_FP_IAR">
1882       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1883       <require condition="ARMv8MML_FP"/>
1884       <require Tcompiler="IAR"/>
1885     </condition>
1886     <condition id="ARMv8MML_FP_LE_IAR">
1887       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1888       <require condition="ARMv8MML_FP_IAR"/>
1889       <require Dendian="Little-endian"/>
1890     </condition>
1891     <condition id="ARMv8MML_FP_BE_IAR">
1892       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1893       <require condition="ARMv8MML_FP_IAR"/>
1894       <require Dendian="Big-endian"/>
1895     </condition>
1896
1897     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1898       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
1899       <require condition="ARMv8MML_NODSP_NOFPU"/>
1900       <require Tcompiler="IAR"/>
1901     </condition>
1902     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1903       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
1904       <require condition="ARMv8MML_DSP_NOFPU"/>
1905       <require Tcompiler="IAR"/>
1906     </condition>
1907     <condition id="ARMv8MML_NODSP_SP_IAR">
1908       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
1909       <require condition="ARMv8MML_NODSP_SP"/>
1910       <require Tcompiler="IAR"/>
1911     </condition>
1912     <condition id="ARMv8MML_DSP_SP_IAR">
1913       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
1914       <require condition="ARMv8MML_DSP_SP"/>
1915       <require Tcompiler="IAR"/>
1916     </condition>
1917     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1918       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
1919       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1920       <require Dendian="Little-endian"/>
1921     </condition>
1922     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1923       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
1924       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1925       <require Dendian="Little-endian"/>
1926     </condition>
1927     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1928       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
1929       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1930       <require Dendian="Little-endian"/>
1931     </condition>
1932     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1933       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
1934       <require condition="ARMv8MML_DSP_SP_IAR"/>
1935       <require Dendian="Little-endian"/>
1936     </condition>
1937
1938     <!-- conditions selecting single devices and CMSIS Core -->
1939     <!-- used for component startup, GCC version is used for C-Startup -->
1940     <condition id="ARMCM0 CMSIS">
1941       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1942       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1943       <require Cclass="CMSIS" Cgroup="CORE"/>
1944     </condition>
1945     <condition id="ARMCM0 CMSIS GCC">
1946       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1947       <require condition="ARMCM0 CMSIS"/>
1948       <require condition="GCC"/>
1949     </condition>
1950
1951     <condition id="ARMCM0+ CMSIS">
1952       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1953       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1954       <require Cclass="CMSIS" Cgroup="CORE"/>
1955     </condition>
1956     <condition id="ARMCM0+ CMSIS GCC">
1957       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1958       <require condition="ARMCM0+ CMSIS"/>
1959       <require condition="GCC"/>
1960     </condition>
1961
1962     <condition id="ARMCM1 CMSIS">
1963       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
1964       <require Dvendor="ARM:82" Dname="ARMCM1"/>
1965       <require Cclass="CMSIS" Cgroup="CORE"/>
1966     </condition>
1967     <condition id="ARMCM1 CMSIS GCC">
1968       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
1969       <require condition="ARMCM1 CMSIS"/>
1970       <require condition="GCC"/>
1971     </condition>
1972
1973     <condition id="ARMCM3 CMSIS">
1974       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1975       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1976       <require Cclass="CMSIS" Cgroup="CORE"/>
1977     </condition>
1978     <condition id="ARMCM3 CMSIS GCC">
1979       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1980       <require condition="ARMCM3 CMSIS"/>
1981       <require condition="GCC"/>
1982     </condition>
1983
1984     <condition id="ARMCM4 CMSIS">
1985       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1986       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1987       <require Cclass="CMSIS" Cgroup="CORE"/>
1988     </condition>
1989     <condition id="ARMCM4 CMSIS GCC">
1990       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1991       <require condition="ARMCM4 CMSIS"/>
1992       <require condition="GCC"/>
1993     </condition>
1994
1995     <condition id="ARMCM7 CMSIS">
1996       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1997       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1998       <require Cclass="CMSIS" Cgroup="CORE"/>
1999     </condition>
2000     <condition id="ARMCM7 CMSIS GCC">
2001       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2002       <require condition="ARMCM7 CMSIS"/>
2003       <require condition="GCC"/>
2004     </condition>
2005
2006     <condition id="ARMCM23 CMSIS">
2007       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2008       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2009       <require Cclass="CMSIS" Cgroup="CORE"/>
2010     </condition>
2011     <condition id="ARMCM23 CMSIS GCC">
2012       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2013       <require condition="ARMCM23 CMSIS"/>
2014       <require condition="GCC"/>
2015     </condition>
2016
2017     <condition id="ARMCM33 CMSIS">
2018       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2019       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2020       <require Cclass="CMSIS" Cgroup="CORE"/>
2021     </condition>
2022     <condition id="ARMCM33 CMSIS GCC">
2023       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2024       <require condition="ARMCM33 CMSIS"/>
2025       <require condition="GCC"/>
2026     </condition>
2027
2028     <condition id="ARMSC000 CMSIS">
2029       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2030       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2031       <require Cclass="CMSIS" Cgroup="CORE"/>
2032     </condition>
2033     <condition id="ARMSC000 CMSIS GCC">
2034       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2035       <require condition="ARMSC000 CMSIS"/>
2036       <require condition="GCC"/>
2037     </condition>
2038
2039     <condition id="ARMSC300 CMSIS">
2040       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2041       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2042       <require Cclass="CMSIS" Cgroup="CORE"/>
2043     </condition>
2044     <condition id="ARMSC300 CMSIS GCC">
2045       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2046       <require condition="ARMSC300 CMSIS"/>
2047       <require condition="GCC"/>
2048     </condition>
2049
2050     <condition id="ARMv8MBL CMSIS">
2051       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2052       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2053       <require Cclass="CMSIS" Cgroup="CORE"/>
2054     </condition>
2055     <condition id="ARMv8MBL CMSIS GCC">
2056       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2057       <require condition="ARMv8MBL CMSIS"/>
2058       <require condition="GCC"/>
2059     </condition>
2060
2061     <condition id="ARMv8MML CMSIS">
2062       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2063       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2064       <require Cclass="CMSIS" Cgroup="CORE"/>
2065     </condition>
2066     <condition id="ARMv8MML CMSIS GCC">
2067       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2068       <require condition="ARMv8MML CMSIS"/>
2069       <require condition="GCC"/>
2070     </condition>
2071
2072     <condition id="ARMCA5 CMSIS">
2073       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2074       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2075       <require Cclass="CMSIS" Cgroup="CORE"/>
2076     </condition>
2077
2078     <condition id="ARMCA7 CMSIS">
2079       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2080       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2081       <require Cclass="CMSIS" Cgroup="CORE"/>
2082     </condition>
2083
2084     <condition id="ARMCA9 CMSIS">
2085       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2086       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2087       <require Cclass="CMSIS" Cgroup="CORE"/>
2088     </condition>
2089
2090     <!-- CMSIS DSP -->
2091     <condition id="CMSIS DSP">
2092       <description>Components required for DSP</description>
2093       <require condition="ARMv6_7_8-M Device"/>
2094       <require condition="ARMCC GCC IAR"/>
2095       <require Cclass="CMSIS" Cgroup="CORE"/>
2096     </condition>
2097
2098     <!-- CMSIS NN -->
2099     <condition id="CMSIS NN">
2100       <description>Components required for NN</description>
2101       <require condition="CMSIS DSP"/>
2102     </condition>
2103
2104     <!-- RTOS RTX -->
2105     <condition id="RTOS RTX">
2106       <description>Components required for RTOS RTX</description>
2107       <require condition="ARMv6_7-M Device"/>
2108       <require condition="ARMCC GCC IAR"/>
2109       <require Cclass="Device" Cgroup="Startup"/>
2110       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2111     </condition>
2112     <condition id="RTOS RTX IFX">
2113       <description>Components required for RTOS RTX IFX</description>
2114       <require condition="ARMv6_7-M Device"/>
2115       <require condition="ARMCC GCC IAR"/>
2116       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2117       <require Cclass="Device" Cgroup="Startup"/>
2118       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2119     </condition>
2120     <condition id="RTOS RTX5">
2121       <description>Components required for RTOS RTX5</description>
2122       <require condition="ARMv6_7_8-M Device"/>
2123       <require condition="ARMCC GCC IAR"/>
2124       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2125     </condition>
2126     <condition id="RTOS2 RTX5">
2127       <description>Components required for RTOS2 RTX5</description>
2128       <require condition="ARMv6_7_8-M Device"/>
2129       <require condition="ARMCC GCC IAR"/>
2130       <require Cclass="CMSIS"  Cgroup="CORE"/>
2131       <require Cclass="Device" Cgroup="Startup"/>
2132     </condition>
2133     <condition id="RTOS2 RTX5 v7-A">
2134       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2135       <require condition="ARMv7-A Device"/>
2136       <require condition="ARMCC GCC IAR"/>
2137       <require Cclass="CMSIS"  Cgroup="CORE"/>
2138       <require Cclass="Device" Cgroup="Startup"/>
2139       <require Cclass="Device" Cgroup="OS Tick"/>
2140       <require Cclass="Device" Cgroup="IRQ Controller"/>
2141     </condition>
2142     <condition id="RTOS2 RTX5 Lib">
2143       <description>Components required for RTOS2 RTX5 Library</description>
2144       <require condition="ARMv6_7_8-M Device"/>
2145       <require condition="ARMCC GCC IAR"/>
2146       <require Cclass="CMSIS"  Cgroup="CORE"/>
2147       <require Cclass="Device" Cgroup="Startup"/>
2148     </condition>
2149     <condition id="RTOS2 RTX5 NS">
2150       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2151       <require condition="ARMv8-M TZ Device"/>
2152       <require condition="ARMCC GCC IAR"/>
2153       <require Cclass="CMSIS"  Cgroup="CORE"/>
2154       <require Cclass="Device" Cgroup="Startup"/>
2155     </condition>
2156
2157     <!-- OS Tick -->
2158     <condition id="OS Tick PTIM">
2159       <description>Components required for OS Tick Private Timer</description>
2160       <require condition="CA5_CA9"/>
2161       <require Cclass="Device" Cgroup="IRQ Controller"/>
2162     </condition>
2163
2164     <condition id="OS Tick GTIM">
2165       <description>Components required for OS Tick Generic Physical Timer</description>
2166       <require condition="CA7"/>
2167       <require Cclass="Device" Cgroup="IRQ Controller"/>
2168     </condition>
2169
2170   </conditions>
2171
2172   <components>
2173     <!-- CMSIS-Core component -->
2174     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.2"  condition="ARMv6_7_8-M Device" >
2175       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2176       <files>
2177         <!-- CPU independent -->
2178         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2179         <file category="include" name="CMSIS/Core/Include/"/>
2180         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2181         <!-- Code template -->
2182         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2183         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2184       </files>
2185     </component>
2186
2187     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.2"  condition="ARMv7-A Device" >
2188       <description>CMSIS-CORE for Cortex-A</description>
2189       <files>
2190         <!-- CPU independent -->
2191         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2192         <file category="include" name="CMSIS/Core_A/Include/"/>
2193       </files>
2194     </component>
2195
2196     <!-- CMSIS-Startup components -->
2197     <!-- Cortex-M0 -->
2198     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2199       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2200       <files>
2201         <!-- include folder / device header file -->
2202         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2203         <!-- startup / system file -->
2204         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2205         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2206         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2207         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2208         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2209       </files>
2210     </component>
2211     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2212       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2213       <files>
2214         <!-- include folder / device header file -->
2215         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2216         <!-- startup / system file -->
2217         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2218         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2219         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2220       </files>
2221     </component>
2222
2223     <!-- Cortex-M0+ -->
2224     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2225       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2226       <files>
2227         <!-- include folder / device header file -->
2228         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2229         <!-- startup / system file -->
2230         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2231         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2232         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2233         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2234         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2235       </files>
2236     </component>
2237     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2238       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2239       <files>
2240         <!-- include folder / device header file -->
2241         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2242         <!-- startup / system file -->
2243         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2244         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2245         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2246       </files>
2247     </component>
2248
2249     <!-- Cortex-M1 -->
2250     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM1 CMSIS">
2251       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2252       <files>
2253         <!-- include folder / device header file -->
2254         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2255         <!-- startup / system file -->
2256         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2257         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.0.0" attr="config" condition="GCC"/>
2258         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2259         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2260         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2261       </files>
2262     </component>
2263     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM1 CMSIS GCC">
2264       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2265       <files>
2266         <!-- include folder / device header file -->
2267         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2268         <!-- startup / system file -->
2269         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.0.0" attr="config" condition="GCC"/>
2270         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2271         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2272       </files>
2273     </component>
2274
2275     <!-- Cortex-M3 -->
2276     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2277       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2278       <files>
2279         <!-- include folder / device header file -->
2280         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2281         <!-- startup / system file -->
2282         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2283         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2284         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2285         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2286         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2287       </files>
2288     </component>
2289     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2290       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2291       <files>
2292         <!-- include folder / device header file -->
2293         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2294         <!-- startup / system file -->
2295         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2296         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2297         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2298       </files>
2299     </component>
2300
2301     <!-- Cortex-M4 -->
2302     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2303       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2304       <files>
2305         <!-- include folder / device header file -->
2306         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2307         <!-- startup / system file -->
2308         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2309         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2310         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2311         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2312         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2313       </files>
2314     </component>
2315     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2316       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2317       <files>
2318         <!-- include folder / device header file -->
2319         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2320         <!-- startup / system file -->
2321         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2322         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2323         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2324       </files>
2325     </component>
2326
2327     <!-- Cortex-M7 -->
2328     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2329       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2330       <files>
2331         <!-- include folder / device header file -->
2332         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2333         <!-- startup / system file -->
2334         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2335         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2336         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2337         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2338         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2339       </files>
2340     </component>
2341     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2342       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2343       <files>
2344         <!-- include folder / device header file -->
2345         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2346         <!-- startup / system file -->
2347         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2348         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2349         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2350       </files>
2351     </component>
2352
2353     <!-- Cortex-M23 -->
2354     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2355       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2356       <files>
2357         <!-- include folder / device header file -->
2358         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2359         <!-- startup / system file -->
2360         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2361         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2362         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2363         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2364         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2365         <!-- SAU configuration -->
2366         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2367       </files>
2368     </component>
2369     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2370       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2371       <files>
2372         <!-- include folder / device header file -->
2373         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2374         <!-- startup / system file -->
2375         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2376         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2377         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2378         <!-- SAU configuration -->
2379         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2380       </files>
2381     </component>
2382
2383     <!-- Cortex-M33 -->
2384     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2385       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2386       <files>
2387         <!-- include folder / device header file -->
2388         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2389         <!-- startup / system file -->
2390         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2391         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2392         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2393         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2394         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2395         <!-- SAU configuration -->
2396         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2397       </files>
2398     </component>
2399     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2400       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2401       <files>
2402         <!-- include folder / device header file -->
2403         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2404         <!-- startup / system file -->
2405         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2406         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2407         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2408         <!-- SAU configuration -->
2409         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2410       </files>
2411     </component>
2412
2413     <!-- Cortex-SC000 -->
2414     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2415       <description>System and Startup for Generic Arm SC000 device</description>
2416       <files>
2417         <!-- include folder / device header file -->
2418         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2419         <!-- startup / system file -->
2420         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2421         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2422         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2423         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2424         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2425       </files>
2426     </component>
2427     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2428       <description>System and Startup for Generic Arm SC000 device</description>
2429       <files>
2430         <!-- include folder / device header file -->
2431         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2432         <!-- startup / system file -->
2433         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2434         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2435         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2436       </files>
2437     </component>
2438
2439     <!-- Cortex-SC300 -->
2440     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2441       <description>System and Startup for Generic Arm SC300 device</description>
2442       <files>
2443         <!-- include folder / device header file -->
2444         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2445         <!-- startup / system file -->
2446         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2447         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2448         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2449         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2450         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2451       </files>
2452     </component>
2453     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2454       <description>System and Startup for Generic Arm SC300 device</description>
2455       <files>
2456         <!-- include folder / device header file -->
2457         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2458         <!-- startup / system file -->
2459         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2460         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2461         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2462       </files>
2463     </component>
2464
2465     <!-- ARMv8MBL -->
2466     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2467       <description>System and Startup for Generic Armv8-M Baseline device</description>
2468       <files>
2469         <!-- include folder / device header file -->
2470         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2471         <!-- startup / system file -->
2472         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2473         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2474         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2475         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2476         <!-- SAU configuration -->
2477         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2478       </files>
2479     </component>
2480     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2481       <description>System and Startup for Generic Armv8-M Baseline device</description>
2482       <files>
2483         <!-- include folder / device header file -->
2484         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2485         <!-- startup / system file -->
2486         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2487         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2488         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2489         <!-- SAU configuration -->
2490         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2491       </files>
2492     </component>
2493
2494     <!-- ARMv8MML -->
2495     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2496       <description>System and Startup for Generic Armv8-M Mainline device</description>
2497       <files>
2498         <!-- include folder / device header file -->
2499         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2500         <!-- startup / system file -->
2501         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2502         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2503         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2504         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2505         <!-- SAU configuration -->
2506         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2507       </files>
2508     </component>
2509     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2510       <description>System and Startup for Generic Armv8-M Mainline device</description>
2511       <files>
2512         <!-- include folder / device header file -->
2513         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2514         <!-- startup / system file -->
2515         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2516         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2517         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2518         <!-- SAU configuration -->
2519         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2520       </files>
2521     </component>
2522
2523     <!-- Cortex-A5 -->
2524     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2525       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2526       <files>
2527         <!-- include folder / device header file -->
2528         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2529         <!-- startup / system / mmu files -->
2530         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2531         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2532         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2533         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2534         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2535         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2536         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2537         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2538         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2539         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2540         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2541         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2542
2543       </files>
2544     </component>
2545
2546     <!-- Cortex-A7 -->
2547     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2548       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2549       <files>
2550         <!-- include folder / device header file -->
2551         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2552         <!-- startup / system / mmu files -->
2553         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2554         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2555         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2556         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2557         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2558         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2559         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2560         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2561         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2562         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2563         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2564         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2565       </files>
2566     </component>
2567
2568     <!-- Cortex-A9 -->
2569     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2570       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2571       <files>
2572         <!-- include folder / device header file -->
2573         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2574         <!-- startup / system / mmu files -->
2575         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2576         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2577         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2578         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2579         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2580         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2581         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2582         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2583         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2584         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2585         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2586         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2587       </files>
2588     </component>
2589
2590     <!-- IRQ Controller -->
2591     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2592       <description>IRQ Controller implementation using GIC</description>
2593       <files>
2594         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2595       </files>
2596     </component>
2597
2598     <!-- OS Tick -->
2599     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2600       <description>OS Tick implementation using Private Timer</description>
2601       <files>
2602         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2603       </files>
2604     </component>
2605
2606     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2607       <description>OS Tick implementation using Generic Physical Timer</description>
2608       <files>
2609         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2610       </files>
2611     </component>
2612
2613     <!-- CMSIS-DSP component -->
2614     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2615       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2616       <files>
2617         <!-- CPU independent -->
2618         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2619         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2620
2621         <!-- CPU and Compiler dependent -->
2622         <!-- ARMCC -->
2623         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2624         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2625         <file category="library" condition="CM1_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2626         <file category="library" condition="CM1_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2627         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2628         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2629         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2630         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2631         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2632         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2633         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2634         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2635         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2636         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2637         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2638         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2639
2640         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2641         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2642         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2643         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2644         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2645         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2646         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2647         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2648         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2649         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2650         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2651         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2652
2653         <!-- GCC -->
2654         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2655         <file category="library" condition="CM1_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2656         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2657         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2658         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2659         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2660         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2661         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2662
2663         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2664         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2665         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2666         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2667         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2668         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2669         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2670         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2671         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2672         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2673         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2674         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2675
2676         <!-- IAR -->
2677         <file category="library" condition="CM0_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2678         <file category="library" condition="CM0_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2679         <file category="library" condition="CM1_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2680         <file category="library" condition="CM1_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2681         <file category="library" condition="CM3_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2682         <file category="library" condition="CM3_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2683         <file category="library" condition="CM4_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2684         <file category="library" condition="CM4_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2685         <file category="library" condition="CM4_FP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2686         <file category="library" condition="CM4_FP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2687         <file category="library" condition="CM7_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2688         <file category="library" condition="CM7_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2689         <file category="library" condition="CM7_DP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2690         <file category="library" condition="CM7_DP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2691         <file category="library" condition="CM7_SP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
2692         <file category="library" condition="CM7_SP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
2693
2694         <file category="library" condition="CM23_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2695         <file category="library" condition="CM33_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2696         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2697         <file category="library" condition="CM33_FP_LE_IAR"           name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2698         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"    name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2699         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2700         <!--file category="library" condition="CM33_DSP_DP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2701         <file category="library" condition="ARMv8MBL_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2702         <file category="library" condition="ARMv8MML_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2703         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2704         <file category="library" condition="ARMv8MML_FP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2705         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2706         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2707         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2708
2709       </files>
2710     </component>
2711
2712     <!-- CMSIS-NN component -->
2713     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.1.0" condition="CMSIS NN">
2714       <description>CMSIS-NN Neural Network Library</description>
2715       <files>
2716         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2717         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2718
2719         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2720         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2721         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2722         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2723
2724         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2725         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2726         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2727         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2728         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2729         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2730         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2731         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2732         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2733         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2734         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2735         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2736
2737         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2738         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2739         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2740         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2741         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2742         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2743
2744         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2745         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2746         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2747         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2748         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2749
2750         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2751
2752         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2753         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2754       </files>
2755     </component>
2756
2757     <!-- CMSIS-RTOS Keil RTX component -->
2758     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2759       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2760       <RTE_Components_h>
2761         <!-- the following content goes into file 'RTE_Components.h' -->
2762         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2763         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2764       </RTE_Components_h>
2765       <files>
2766         <!-- CPU independent -->
2767         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2768         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2769         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2770
2771         <!-- RTX templates -->
2772         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2773         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2774         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2775         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2776         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2777         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2778         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2779         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2780         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2781         <!-- tool-chain specific template file -->
2782         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2783         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2784         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2785
2786         <!-- CPU and Compiler dependent -->
2787         <!-- ARMCC -->
2788         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2789         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2790         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2791         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2792         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2793         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2794         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2795         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2796         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2797         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2798         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2799         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2800         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2801         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2802         <!-- GCC -->
2803         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2804         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2805         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2806         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2807         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2808         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2809         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2810         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2811         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2812         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2813         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2814         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2815         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2816         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2817         <!-- IAR -->
2818         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2819         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2820         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2821         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2822         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2823         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2824         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2825         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2826         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2827         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2828         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2829         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2830         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2831         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2832       </files>
2833     </component>
2834     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2835     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2836       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2837       <RTE_Components_h>
2838         <!-- the following content goes into file 'RTE_Components.h' -->
2839         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2840         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2841       </RTE_Components_h>
2842       <files>
2843         <!-- CPU independent -->
2844         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2845         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2846         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2847
2848         <!-- RTX templates -->
2849         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2850         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2851         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2852         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2853         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2854         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2855         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2856         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2857         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2858         <!-- tool-chain specific template file -->
2859         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2860         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2861         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2862
2863         <!-- CPU and Compiler dependent -->
2864         <!-- ARMCC -->
2865         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2866         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2867         <!-- GCC -->
2868         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2869         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2870         <!-- IAR -->
2871       </files>
2872     </component>
2873
2874     <!-- CMSIS-RTOS Keil RTX5 component -->
2875     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.4.0" Capiversion="1.0.0" condition="RTOS RTX5">
2876       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2877       <RTE_Components_h>
2878         <!-- the following content goes into file 'RTE_Components.h' -->
2879         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2880         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2881       </RTE_Components_h>
2882       <files>
2883         <!-- RTX header file -->
2884         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2885         <!-- RTX compatibility module for API V1 -->
2886         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2887       </files>
2888     </component>
2889
2890     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2891     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
2892       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
2893       <RTE_Components_h>
2894         <!-- the following content goes into file 'RTE_Components.h' -->
2895         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2896         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2897       </RTE_Components_h>
2898       <files>
2899         <!-- RTX documentation -->
2900         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2901
2902         <!-- RTX header files -->
2903         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2904
2905         <!-- RTX configuration -->
2906         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2907         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2908
2909         <!-- RTX templates -->
2910         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2911         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2912         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2913         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2914         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2915         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2916         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2917         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2918         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2919         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2920
2921         <!-- RTX library configuration -->
2922         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2923
2924         <!-- RTX libraries (CPU and Compiler dependent) -->
2925         <!-- ARMCC -->
2926         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2927         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2928         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2929         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2930         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2931         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2932         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2933         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2934         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2935         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2936         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2937         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2938         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2939         <!-- GCC -->
2940         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2941         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2942         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2943         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2944         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2945         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2946         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2947         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2948         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2949         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2950         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2951         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2952         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2953         <!-- IAR -->
2954         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2955         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2956         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2957         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2958         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2959         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2960         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2961       </files>
2962     </component>
2963     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2964       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
2965       <RTE_Components_h>
2966         <!-- the following content goes into file 'RTE_Components.h' -->
2967         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2968         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2969         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2970       </RTE_Components_h>
2971       <files>
2972         <!-- RTX documentation -->
2973         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2974
2975         <!-- RTX header files -->
2976         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2977
2978         <!-- RTX configuration -->
2979         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2980         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2981
2982         <!-- RTX templates -->
2983         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2984         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2985         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2986         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2987         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2988         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2989         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2990         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2991         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2992         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2993
2994         <!-- RTX library configuration -->
2995         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2996
2997         <!-- RTX libraries (CPU and Compiler dependent) -->
2998         <!-- ARMCC -->
2999         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3000         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3001         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3002         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3003         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3004         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3005         <!-- GCC -->
3006         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3007         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3008         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3009         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3010         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3011         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3012       </files>
3013     </component>
3014     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
3015       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3016       <RTE_Components_h>
3017         <!-- the following content goes into file 'RTE_Components.h' -->
3018         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3019         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3020         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3021       </RTE_Components_h>
3022       <files>
3023         <!-- RTX documentation -->
3024         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3025
3026         <!-- RTX header files -->
3027         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3028
3029         <!-- RTX configuration -->
3030         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3031         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3032
3033         <!-- RTX templates -->
3034         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3035         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3036         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3037         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3038         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3039         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3040         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3041         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3042         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3043         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3044
3045         <!-- RTX sources (core) -->
3046         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3047         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3048         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3049         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3050         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3051         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3052         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3053         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3054         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3055         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3056         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3057         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3058         <!-- RTX sources (library configuration) -->
3059         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3060         <!-- RTX sources (handlers ARMCC) -->
3061         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3062         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3063         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3064         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3065         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3066         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3067         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3068         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3069         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3070         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3071         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3072         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3073         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3074         <!-- RTX sources (handlers GCC) -->
3075         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3076         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3077         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3078         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3079         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3080         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3081         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3082         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3083         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3084         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3085         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3086         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3087         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3088         <!-- RTX sources (handlers IAR) -->
3089         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3090         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3091         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3092         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3093         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3094         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3095         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3096         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3097         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3098         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3099         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3100         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3101         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3102         <!-- OS Tick (SysTick) -->
3103         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3104       </files>
3105     </component>
3106     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3107       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3108       <RTE_Components_h>
3109         <!-- the following content goes into file 'RTE_Components.h' -->
3110         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3111         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3112         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3113       </RTE_Components_h>
3114       <files>
3115         <!-- RTX documentation -->
3116         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3117
3118         <!-- RTX header files -->
3119         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3120
3121         <!-- RTX configuration -->
3122         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3123         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3124
3125         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3126
3127         <!-- RTX templates -->
3128         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3129         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3130         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3131         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3132         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3133         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3134         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3135         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3136         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3137         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3138
3139         <!-- RTX sources (core) -->
3140         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3141         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3142         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3143         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3144         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3145         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3146         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3147         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3148         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3149         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3150         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3151         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3152         <!-- RTX sources (library configuration) -->
3153         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3154         <!-- RTX sources (handlers ARMCC) -->
3155         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3156         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3157         <!-- RTX sources (handlers GCC) -->
3158         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3159         <!-- RTX sources (handlers IAR) -->
3160         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3161       </files>
3162     </component>
3163     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3164       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3165       <RTE_Components_h>
3166         <!-- the following content goes into file 'RTE_Components.h' -->
3167         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3168         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3169         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3170         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3171       </RTE_Components_h>
3172       <files>
3173         <!-- RTX documentation -->
3174         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3175
3176         <!-- RTX header files -->
3177         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3178
3179         <!-- RTX configuration -->
3180         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3181         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3182
3183         <!-- RTX templates -->
3184         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3185         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3186         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3187         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3188         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3189         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3190         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3191         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3192         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3193         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3194
3195         <!-- RTX sources (core) -->
3196         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3197         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3198         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3199         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3200         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3201         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3202         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3203         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3204         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3205         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3206         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3207         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3208         <!-- RTX sources (library configuration) -->
3209         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3210         <!-- RTX sources (ARMCC handlers) -->
3211         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3212         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3213         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3214         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3215         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3216         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3217         <!-- RTX sources (GCC handlers) -->
3218         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3219         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3220         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3221         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3222         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3223         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3224         <!-- RTX sources (IAR handlers) -->
3225         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3227         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3229         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3230         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3231         <!-- OS Tick (SysTick) -->
3232         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3233       </files>
3234     </component>
3235
3236   </components>
3237
3238   <boards>
3239     <board name="uVision Simulator" vendor="Keil">
3240       <description>uVision Simulator</description>
3241       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3242       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3243       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3244       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3245       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3246       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3247       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3248       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3249       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3250       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3251       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3252       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3253       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3254       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3255       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3256       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3257       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3258       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3259       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3260       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3261     </board>
3262
3263     <board name="Fixed Virtual Platform" vendor="ARM">
3264       <description>Fixed Virtual Platform</description>
3265       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3266       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3267       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3268     </board>
3269   </boards>
3270
3271   <examples>
3272     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3273       <description>DSP_Lib Class Marks example</description>
3274       <board name="uVision Simulator" vendor="Keil"/>
3275       <project>
3276         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3277       </project>
3278       <attributes>
3279         <component Cclass="CMSIS" Cgroup="CORE"/>
3280         <component Cclass="CMSIS" Cgroup="DSP"/>
3281         <component Cclass="Device" Cgroup="Startup"/>
3282         <category>Getting Started</category>
3283       </attributes>
3284     </example>
3285
3286     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3287       <description>DSP_Lib Convolution example</description>
3288       <board name="uVision Simulator" vendor="Keil"/>
3289       <project>
3290         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3291       </project>
3292       <attributes>
3293         <component Cclass="CMSIS" Cgroup="CORE"/>
3294         <component Cclass="CMSIS" Cgroup="DSP"/>
3295         <component Cclass="Device" Cgroup="Startup"/>
3296         <category>Getting Started</category>
3297       </attributes>
3298     </example>
3299
3300     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3301       <description>DSP_Lib Dotproduct example</description>
3302       <board name="uVision Simulator" vendor="Keil"/>
3303       <project>
3304         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3305       </project>
3306       <attributes>
3307         <component Cclass="CMSIS" Cgroup="CORE"/>
3308         <component Cclass="CMSIS" Cgroup="DSP"/>
3309         <component Cclass="Device" Cgroup="Startup"/>
3310         <category>Getting Started</category>
3311       </attributes>
3312     </example>
3313
3314     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3315       <description>DSP_Lib FFT Bin example</description>
3316       <board name="uVision Simulator" vendor="Keil"/>
3317       <project>
3318         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3319       </project>
3320       <attributes>
3321         <component Cclass="CMSIS" Cgroup="CORE"/>
3322         <component Cclass="CMSIS" Cgroup="DSP"/>
3323         <component Cclass="Device" Cgroup="Startup"/>
3324         <category>Getting Started</category>
3325       </attributes>
3326     </example>
3327
3328     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3329       <description>DSP_Lib FIR example</description>
3330       <board name="uVision Simulator" vendor="Keil"/>
3331       <project>
3332         <environment name="uv" load="arm_fir_example.uvprojx"/>
3333       </project>
3334       <attributes>
3335         <component Cclass="CMSIS" Cgroup="CORE"/>
3336         <component Cclass="CMSIS" Cgroup="DSP"/>
3337         <component Cclass="Device" Cgroup="Startup"/>
3338         <category>Getting Started</category>
3339       </attributes>
3340     </example>
3341
3342     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3343       <description>DSP_Lib Graphic Equalizer example</description>
3344       <board name="uVision Simulator" vendor="Keil"/>
3345       <project>
3346         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3347       </project>
3348       <attributes>
3349         <component Cclass="CMSIS" Cgroup="CORE"/>
3350         <component Cclass="CMSIS" Cgroup="DSP"/>
3351         <component Cclass="Device" Cgroup="Startup"/>
3352         <category>Getting Started</category>
3353       </attributes>
3354     </example>
3355
3356     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3357       <description>DSP_Lib Linear Interpolation example</description>
3358       <board name="uVision Simulator" vendor="Keil"/>
3359       <project>
3360         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3361       </project>
3362       <attributes>
3363         <component Cclass="CMSIS" Cgroup="CORE"/>
3364         <component Cclass="CMSIS" Cgroup="DSP"/>
3365         <component Cclass="Device" Cgroup="Startup"/>
3366         <category>Getting Started</category>
3367       </attributes>
3368     </example>
3369
3370     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3371       <description>DSP_Lib Matrix example</description>
3372       <board name="uVision Simulator" vendor="Keil"/>
3373       <project>
3374         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3375       </project>
3376       <attributes>
3377         <component Cclass="CMSIS" Cgroup="CORE"/>
3378         <component Cclass="CMSIS" Cgroup="DSP"/>
3379         <component Cclass="Device" Cgroup="Startup"/>
3380         <category>Getting Started</category>
3381       </attributes>
3382     </example>
3383
3384     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3385       <description>DSP_Lib Signal Convergence example</description>
3386       <board name="uVision Simulator" vendor="Keil"/>
3387       <project>
3388         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3389       </project>
3390       <attributes>
3391         <component Cclass="CMSIS" Cgroup="CORE"/>
3392         <component Cclass="CMSIS" Cgroup="DSP"/>
3393         <component Cclass="Device" Cgroup="Startup"/>
3394         <category>Getting Started</category>
3395       </attributes>
3396     </example>
3397
3398     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3399       <description>DSP_Lib Sinus/Cosinus example</description>
3400       <board name="uVision Simulator" vendor="Keil"/>
3401       <project>
3402         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3403       </project>
3404       <attributes>
3405         <component Cclass="CMSIS" Cgroup="CORE"/>
3406         <component Cclass="CMSIS" Cgroup="DSP"/>
3407         <component Cclass="Device" Cgroup="Startup"/>
3408         <category>Getting Started</category>
3409       </attributes>
3410     </example>
3411
3412     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3413       <description>DSP_Lib Variance example</description>
3414       <board name="uVision Simulator" vendor="Keil"/>
3415       <project>
3416         <environment name="uv" load="arm_variance_example.uvprojx"/>
3417       </project>
3418       <attributes>
3419         <component Cclass="CMSIS" Cgroup="CORE"/>
3420         <component Cclass="CMSIS" Cgroup="DSP"/>
3421         <component Cclass="Device" Cgroup="Startup"/>
3422         <category>Getting Started</category>
3423       </attributes>
3424     </example>
3425
3426     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3427       <description>Neural Network CIFAR10 example</description>
3428       <board name="uVision Simulator" vendor="Keil"/>
3429       <project>
3430         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3431       </project>
3432       <attributes>
3433         <component Cclass="CMSIS" Cgroup="CORE"/>
3434         <component Cclass="CMSIS" Cgroup="DSP"/>
3435         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3436         <component Cclass="Device" Cgroup="Startup"/>
3437         <category>Getting Started</category>
3438       </attributes>
3439     </example>
3440
3441     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3442       <description>Neural Network GRU example</description>
3443       <board name="uVision Simulator" vendor="Keil"/>
3444       <project>
3445         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3446       </project>
3447       <attributes>
3448         <component Cclass="CMSIS" Cgroup="CORE"/>
3449         <component Cclass="CMSIS" Cgroup="DSP"/>
3450         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3451         <component Cclass="Device" Cgroup="Startup"/>
3452         <category>Getting Started</category>
3453       </attributes>
3454     </example>
3455
3456     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3457       <description>CMSIS-RTOS2 Blinky example</description>
3458       <board name="uVision Simulator" vendor="Keil"/>
3459       <project>
3460         <environment name="uv" load="Blinky.uvprojx"/>
3461       </project>
3462       <attributes>
3463         <component Cclass="CMSIS" Cgroup="CORE"/>
3464         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3465         <component Cclass="Device" Cgroup="Startup"/>
3466         <category>Getting Started</category>
3467       </attributes>
3468     </example>
3469
3470     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3471       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3472       <board name="uVision Simulator" vendor="Keil"/>
3473       <project>
3474         <environment name="uv" load="Blinky.uvprojx"/>
3475       </project>
3476       <attributes>
3477         <component Cclass="CMSIS" Cgroup="CORE"/>
3478         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3479         <component Cclass="Device" Cgroup="Startup"/>
3480         <category>Getting Started</category>
3481       </attributes>
3482     </example>
3483
3484     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3485       <description>CMSIS-RTOS2 Message Queue Example</description>
3486       <board name="uVision Simulator" vendor="Keil"/>
3487       <project>
3488         <environment name="uv" load="MsqQueue.uvprojx"/>
3489       </project>
3490       <attributes>
3491         <component Cclass="CMSIS" Cgroup="CORE"/>
3492         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3493         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3494         <component Cclass="Device" Cgroup="Startup"/>
3495         <category>Getting Started</category>
3496       </attributes>
3497     </example>
3498
3499     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3500       <description>CMSIS-RTOS2 Memory Pool Example</description>
3501       <board name="Fixed Virtual Platform" vendor="ARM"/>
3502       <project>
3503         <environment name="uv" load="MemPool.uvprojx"/>
3504       </project>
3505       <attributes>
3506         <component Cclass="CMSIS" Cgroup="CORE"/>
3507         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3508         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3509         <component Cclass="Device" Cgroup="Startup"/>
3510         <category>Getting Started</category>
3511       </attributes>
3512     </example>
3513
3514     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3515       <description>Bare-metal secure/non-secure example without RTOS</description>
3516       <board name="uVision Simulator" vendor="Keil"/>
3517       <project>
3518         <environment name="uv" load="NoRTOS.uvmpw"/>
3519       </project>
3520       <attributes>
3521         <component Cclass="CMSIS" Cgroup="CORE"/>
3522         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3523         <component Cclass="Device" Cgroup="Startup"/>
3524         <category>Getting Started</category>
3525       </attributes>
3526     </example>
3527
3528     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3529       <description>Secure/non-secure RTOS example with thread context management</description>
3530       <board name="uVision Simulator" vendor="Keil"/>
3531       <project>
3532         <environment name="uv" load="RTOS.uvmpw"/>
3533       </project>
3534       <attributes>
3535         <component Cclass="CMSIS" Cgroup="CORE"/>
3536         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3537         <component Cclass="Device" Cgroup="Startup"/>
3538         <category>Getting Started</category>
3539       </attributes>
3540     </example>
3541
3542     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3543       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3544       <board name="uVision Simulator" vendor="Keil"/>
3545       <project>
3546         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3547       </project>
3548       <attributes>
3549         <component Cclass="CMSIS" Cgroup="CORE"/>
3550         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3551         <component Cclass="Device" Cgroup="Startup"/>
3552         <category>Getting Started</category>
3553       </attributes>
3554     </example>
3555
3556   </examples>
3557
3558 </package>