begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.1-dev1">
  12       Active development ...
  13       CMSIS-Core(M):
  14        - Added ARMv8-M Stack Sealing (to linker, startup) for toolcahin ARM, GCC
  15        - Changed C-Startup to default Startup.
  16     </release>
  17     <release version="5.7.1-dev0">
  18       Active development ...
  19       CMSIS-Core(M):
  20        - Updated GCC LinkerDescription, GCC Assembler startup
  21       CMSIS-DSP:
  22        - Purged pre-built libs from Git
  23       CMSIS-RTOS:
  24        - RTX4: Purged pre-built libs from Git
  25       CMSIS-RTOS2:
  26        - RTX5: Purged pre-built libs from Git
  27       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  28        - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  29        - Added optimization for SVDF kernel
  30        - Improved MVE performance for fully Connected and max pool operator
  31        - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  32        - Expanded existing unit test suite along with support for FVP
  33     </release>
  34     <release version="5.7.0" date="2020-04-09">
  35       CMSIS-Build: 0.9.0 (beta)
  36         - Draft for CMSIS Project description (CPRJ)
  37       CMSIS-Core(M): 5.4.0 (see revision history for details)
  38         - Cortex-M55 cpu support
  39         - Enhanced MVE support for Armv8.1-MML
  40         - Fixed device config define checks.
  41         - L1 Cache functions for Armv7-M and later
  42       CMSIS-Core(A): 1.2.0 (see revision history for details)
  43         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  44         - Added missing DSP intrinsics
  45         - Reworked assembly intrinsics: volatile, barriers and clobber
  46       CMSIS-DSP: 1.8.0 (see revision history for details)
  47         - Added new functions and function groups
  48         - Added MVE support
  49       CMSIS-NN: 1.3.0 (see revision history for details)
  50         - Added MVE support
  51         - Further optimizations for kernels using DSP extension
  52       CMSIS-RTOS2:
  53         - RTX 5.5.2 (see revision history for details)
  54       CMSIS-Driver: 2.8.0
  55         - Added VIO API 0.1.0 (Preview)
  56         - removed volatile from status related typedefs in APIs
  57         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  58       CMSIS-Pack: 1.6.3 (see revision history for details)
  59         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  60       Devices:
  61         - ARMCM55 device
  62         - ARMv81MML startup code recognizing __MVE_USED macro
  63         - Refactored vector table references for all Cortex-M devices
  64         - Reworked ARMCM* C-StartUp files.
  65         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  66       Utilities:
  67         Attention: Linux binaries moved to Linux64 folder!
  68         - SVDConv 3.3.35
  69         - PackChk 1.3.89
  70     </release>
  71     <release version="5.6.0" date="2019-07-10">
  72       CMSIS-Core(M): 5.3.0 (see revision history for details)
  73         - Added provisions for compiler-independent C startup code.
  74       CMSIS-Core(A): 1.1.4 (see revision history for details)
  75         - Fixed __FPU_Enable.
  76       CMSIS-DSP: 1.7.0 (see revision history for details)
  77         - New Neon versions of f32 functions
  78         - Python wrapper
  79         - Preliminary cmake build
  80         - Compilation flags for FFTs
  81         - Changes to arm_math.h
  82       CMSIS-NN: 1.2.0 (see revision history for details)
  83         - New function for depthwise convolution with asymmetric quantization.
  84         - New support functions for requantization.
  85       CMSIS-RTOS:
  86         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  87       CMSIS-RTOS2:
  88         - RTX 5.5.1 (see revision history for details)
  89       CMSIS-Driver: 2.7.1
  90         - WiFi Interface API 1.0.0
  91       Devices:
  92         - Generalized C startup code for all Cortex-M family devices.
  93         - Updated Cortex-A default memory regions and MMU configurations
  94         - Moved Cortex-A memory and system config files to avoid include path issues
  95     </release>
  96     <release version="5.5.1" date="2019-03-20">
  97       The following folders are deprecated
  98         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  99
 100       CMSIS-Core(M): 5.2.1 (see revision history for details)
 101         - Fixed compilation issue in cmsis_armclang_ltm.h
 102     </release>
 103     <release version="5.5.0" date="2019-03-18">
 104       The following folders have been removed:
 105         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 106         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 107       The following folders are deprecated
 108         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 109
 110       CMSIS-Core(M): 5.2.0 (see revision history for details)
 111         - Reworked Stack/Heap configuration for ARM startup files.
 112         - Added Cortex-M35P device support.
 113         - Added generic Armv8.1-M Mainline device support.
 114       CMSIS-Core(A): 1.1.3 (see revision history for details)
 115       CMSIS-DSP: 1.6.0 (see revision history for details)
 116         - reworked DSP library source files
 117         - reworked DSP library documentation
 118         - Changed DSP folder structure
 119         - moved DSP libraries to folder ./DSP/Lib
 120         - ARM DSP Libraries are built with ARMCLANG
 121         - Added DSP Libraries Source variant
 122       CMSIS-RTOS2:
 123         - RTX 5.5.0 (see revision history for details)
 124       CMSIS-Driver: 2.7.0
 125         - Added WiFi Interface API 1.0.0-beta
 126         - Added components for project specific driver implementations
 127       CMSIS-Pack: 1.6.0 (see revision history for details)
 128       Devices:
 129         - Added Cortex-M35P and ARMv81MML device templates.
 130         - Fixed C-Startup Code for GCC (aligned with other compilers)
 131       Utilities:
 132         - SVDConv 3.3.25
 133         - PackChk 1.3.82
 134     </release>
 135     <release version="5.4.0" date="2018-08-01">
 136       Aligned pack structure with repository.
 137       The following folders are deprecated:
 138         - CMSIS/Include/
 139         - CMSIS/DSP_Lib/
 140
 141       CMSIS-Core(M): 5.1.2 (see revision history for details)
 142         - Added Cortex-M1 support (beta).
 143       CMSIS-Core(A): 1.1.2 (see revision history for details)
 144       CMSIS-NN: 1.1.0
 145         - Added new math functions.
 146       CMSIS-RTOS2:
 147         - API 2.1.3 (see revision history for details)
 148         - RTX 5.4.0 (see revision history for details)
 149           * Updated exception handling on Cortex-A
 150       CMSIS-Driver:
 151         - Flash Driver API V2.2.0
 152       Utilities:
 153         - SVDConv 3.3.21
 154         - PackChk 1.3.71
 155     </release>
 156     <release version="5.3.0" date="2018-02-22">
 157       Updated Arm company brand.
 158       CMSIS-Core(M): 5.1.1 (see revision history for details)
 159       CMSIS-Core(A): 1.1.1 (see revision history for details)
 160       CMSIS-DAP: 2.0.0 (see revision history for details)
 161       CMSIS-NN: 1.0.0
 162         - Initial contribution of the bare metal Neural Network Library.
 163       CMSIS-RTOS2:
 164         - RTX 5.3.0 (see revision history for details)
 165         - OS Tick API 1.0.1
 166     </release>
 167     <release version="5.2.0" date="2017-11-16">
 168       CMSIS-Core(M): 5.1.0 (see revision history for details)
 169         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 170         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 171       CMSIS-Core(A): 1.1.0 (see revision history for details)
 172         - Added compiler_iccarm.h.
 173         - Added additional access functions for physical timer.
 174       CMSIS-DAP: 1.2.0 (see revision history for details)
 175       CMSIS-DSP: 1.5.2 (see revision history for details)
 176       CMSIS-Driver: 2.6.0 (see revision history for details)
 177         - CAN Driver API V1.2.0
 178         - NAND Driver API V2.3.0
 179       CMSIS-RTOS:
 180         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 181       CMSIS-RTOS2:
 182         - API 2.1.2 (see revision history for details)
 183         - RTX 5.2.3 (see revision history for details)
 184       Devices:
 185         - Added GCC startup and linker script for Cortex-A9.
 186         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 187         - Added IAR startup code for Cortex-A9
 188     </release>
 189     <release version="5.1.1" date="2017-09-19">
 190       CMSIS-RTOS2:
 191       - RTX 5.2.1 (see revision history for details)
 192     </release>
 193     <release version="5.1.0" date="2017-08-04">
 194       CMSIS-Core(M): 5.0.2 (see revision history for details)
 195       - Changed Version Control macros to be core agnostic.
 196       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 197       CMSIS-Core(A): 1.0.0 (see revision history for details)
 198       - Initial release
 199       - IRQ Controller API 1.0.0
 200       CMSIS-Driver: 2.05 (see revision history for details)
 201       - All typedefs related to status have been made volatile.
 202       CMSIS-RTOS2:
 203       - API 2.1.1 (see revision history for details)
 204       - RTX 5.2.0 (see revision history for details)
 205       - OS Tick API 1.0.0
 206       CMSIS-DSP: 1.5.2 (see revision history for details)
 207       - Fixed GNU Compiler specific diagnostics.
 208       CMSIS-Pack: 1.5.0 (see revision history for details)
 209       - added System Description File (*.SDF) Format
 210       CMSIS-Zone: 0.0.1 (Preview)
 211       - Initial specification draft
 212     </release>
 213     <release version="5.0.1" date="2017-02-03">
 214       Package Description:
 215       - added taxonomy for Cclass RTOS
 216       CMSIS-RTOS2:
 217       - API 2.1   (see revision history for details)
 218       - RTX 5.1.0 (see revision history for details)
 219       CMSIS-Core: 5.0.1 (see revision history for details)
 220       - Added __PACKED_STRUCT macro
 221       - Added uVisior support
 222       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 223       - Updated template for secure main function (main_s.c)
 224       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 225       CMSIS-DSP: 1.5.1 (see revision history for details)
 226       - added ARMv8M DSP libraries.
 227       CMSIS-Pack:1.4.9 (see revision history for details)
 228       - added Pack Index File specification and schema file
 229     </release>
 230     <release version="5.0.0" date="2016-11-11">
 231       Changed open source license to Apache 2.0
 232       CMSIS_Core:
 233        - Added support for Cortex-M23 and Cortex-M33.
 234        - Added ARMv8-M device configurations for mainline and baseline.
 235        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 236        - Added cmsis_compiler.h to unify compiler behaviour.
 237        - Updated function SCB_EnableICache (for Cortex-M7).
 238        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 239       CMSIS-RTOS:
 240         - bug fix in RTX 4.82 (see revision history for details)
 241       CMSIS-RTOS2:
 242         - new API including compatibility layer to CMSIS-RTOS
 243         - reference implementation based on RTX5
 244         - supports all Cortex-M variants including TrustZone for ARMv8-M
 245       CMSIS-SVD:
 246        - reworked SVD format documentation
 247        - removed SVD file database documentation as SVD files are distributed in packs
 248        - updated SVDConv for Win32 and Linux
 249       CMSIS-DSP:
 250        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 251        - Added DSP libraries build projects to CMSIS pack.
 252     </release>
 253     <release version="4.5.0" date="2015-10-28">
 254       - CMSIS-Core     4.30.0  (see revision history for details)
 255       - CMSIS-DAP      1.1.0   (unchanged)
 256       - CMSIS-Driver   2.04.0  (see revision history for details)
 257       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 258       - CMSIS-Pack     1.4.1   (see revision history for details)
 259       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 260       - CMSIS-SVD      1.3.1   (see revision history for details)
 261     </release>
 262     <release version="4.4.0" date="2015-09-11">
 263       - CMSIS-Core     4.20   (see revision history for details)
 264       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 265       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 266       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 267       - CMSIS-RTOS
 268         -- API         1.02   (unchanged)
 269         -- RTX         4.79   (see revision history for details)
 270       - CMSIS-SVD      1.3.0  (see revision history for details)
 271       - CMSIS-DAP      1.1.0  (extended with SWO support)
 272     </release>
 273     <release version="4.3.0" date="2015-03-20">
 274       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 275       - CMSIS-DSP      1.4.5  (see revision history for details)
 276       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 277       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 278       - CMSIS-RTOS
 279         -- API         1.02   (unchanged)
 280         -- RTX         4.78   (see revision history for details)
 281       - CMSIS-SVD      1.2    (unchanged)
 282     </release>
 283     <release version="4.2.0" date="2014-09-24">
 284       Adding Cortex-M7 support
 285       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 286       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 287       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 288       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 289       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 290     </release>
 291     <release version="4.1.1" date="2014-06-30">
 292       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 293     </release>
 294     <release version="4.1.0" date="2014-06-12">
 295       - CMSIS-Driver   2.02  (incompatible update)
 296       - CMSIS-Pack     1.3   (see revision history for details)
 297       - CMSIS-DSP      1.4.2 (unchanged)
 298       - CMSIS-Core     3.30  (unchanged)
 299       - CMSIS-RTOS RTX 4.74  (unchanged)
 300       - CMSIS-RTOS API 1.02  (unchanged)
 301       - CMSIS-SVD      1.10  (unchanged)
 302       PACK:
 303       - removed G++ specific files from PACK
 304       - added Component Startup variant "C Startup"
 305       - added Pack Checking Utility
 306       - updated conditions to reflect tool-chain dependency
 307       - added Taxonomy for Graphics
 308       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 309     </release>
 310     <!-- release version="4.0.0">
 311       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 312       - CMSIS-Pack     1.1   Preliminary
 313       - CMSIS-DSP      1.4.2 (see revision history for details)
 314       - CMSIS-Core     3.30  (see revision history for details)
 315       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 316       - CMSIS-RTOS API 1.02  (unchanged)
 317       - CMSIS-SVD      1.10  (unchanged)
 318     </release -->
 319     <release version="3.20.4" date="2014-02-20">
 320       - CMSIS-RTOS 4.74 (see revision history for details)
 321       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 322     </release>
 323     <!-- release version="3.20.3">
 324       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 325       - CMSIS-RTOS 4.73 (see revision history for details)
 326     </release -->
 327     <!-- release version="3.20.2">
 328       - CMSIS-Pack documentation has been added
 329       - CMSIS-Drivers header and documentation have been added to PACK
 330       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 331     </release -->
 332     <!-- release version="3.20.1">
 333       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 334       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 335     </release -->
 336     <!-- release version="3.20.0">
 337       The software portions that are deployed in the application program are now under a BSD license which allows usage
 338       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 339       The individual components have been update as listed below:
 340       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 341       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 342       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 343       - CMSIS-SVD is unchanged.
 344     </release -->
 345   </releases>
 346
 347   <taxonomy>
 348     <description Cclass="Audio">Software components for audio processing</description>
 349     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 350     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 351     <description Cclass="Compiler">Compiler Software Extensions</description>
 352     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 353     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 354     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 355     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 356     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 357     <description Cclass="File System">File Drive Support and File System</description>
 358     <description Cclass="IoT Client">IoT cloud client connector</description>
 359     <description Cclass="IoT Service">IoT specific services</description>
 360     <description Cclass="IoT Utility">IoT specific software utility</description>
 361     <description Cclass="Graphics">Graphical User Interface</description>
 362     <description Cclass="Network">Network Stack using Internet Protocols</description>
 363     <description Cclass="RTOS">Real-time Operating System</description>
 364     <description Cclass="Security">Encryption for secure communication or storage</description>
 365     <description Cclass="USB">Universal Serial Bus Stack</description>
 366     <description Cclass="Utility">Generic software utility components</description>
 367   </taxonomy>
 368
 369   <devices>
 370     <!-- ******************************  Cortex-M0  ****************************** -->
 371     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 372       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 373       <description>
 374 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 375 - simple, easy-to-use programmers model
 376 - highly efficient ultra-low power operation
 377 - excellent code density
 378 - deterministic, high-performance interrupt handling
 379 - upward compatibility with the rest of the Cortex-M processor family.
 380       </description>
 381       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 382       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 383       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 384       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 385
 386       <device Dname="ARMCM0">
 387         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 388         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 389       </device>
 390     </family>
 391
 392     <!-- ******************************  Cortex-M0P  ****************************** -->
 393     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 394       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 395       <description>
 396 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 397 - simple, easy-to-use programmers model
 398 - highly efficient ultra-low power operation
 399 - excellent code density
 400 - deterministic, high-performance interrupt handling
 401 - upward compatibility with the rest of the Cortex-M processor family.
 402       </description>
 403       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 404       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 405       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 406       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 407
 408       <device Dname="ARMCM0P">
 409         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 410         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 411       </device>
 412
 413       <device Dname="ARMCM0P_MPU">
 414         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 415         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 416       </device>
 417     </family>
 418
 419     <!-- ******************************  Cortex-M1  ****************************** -->
 420     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 421       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 422       <description>
 423 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 424 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 425       </description>
 426       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 427       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 428       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 429       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 430
 431       <device Dname="ARMCM1">
 432         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 433         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 434       </device>
 435     </family>
 436
 437     <!-- ******************************  Cortex-M3  ****************************** -->
 438     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 439       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 440       <description>
 441 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 442 - simple, easy-to-use programmers model
 443 - highly efficient ultra-low power operation
 444 - excellent code density
 445 - deterministic, high-performance interrupt handling
 446 - upward compatibility with the rest of the Cortex-M processor family.
 447       </description>
 448       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 449       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 450       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 451       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 452
 453       <device Dname="ARMCM3">
 454         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 455         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 456       </device>
 457     </family>
 458
 459     <!-- ******************************  Cortex-M4  ****************************** -->
 460     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 461       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 462       <description>
 463 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 464 - simple, easy-to-use programmers model
 465 - highly efficient ultra-low power operation
 466 - excellent code density
 467 - deterministic, high-performance interrupt handling
 468 - upward compatibility with the rest of the Cortex-M processor family.
 469       </description>
 470       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 471       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 472       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 473       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 474
 475       <device Dname="ARMCM4">
 476         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 477         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 478       </device>
 479
 480       <device Dname="ARMCM4_FP">
 481         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 482         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 483       </device>
 484     </family>
 485
 486     <!-- ******************************  Cortex-M7  ****************************** -->
 487     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 488       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 489       <description>
 490 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 491 - simple, easy-to-use programmers model
 492 - highly efficient ultra-low power operation
 493 - excellent code density
 494 - deterministic, high-performance interrupt handling
 495 - upward compatibility with the rest of the Cortex-M processor family.
 496       </description>
 497       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 498       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 499       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 500       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 501
 502       <device Dname="ARMCM7">
 503         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 504         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 505       </device>
 506
 507       <device Dname="ARMCM7_SP">
 508         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 509         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 510       </device>
 511
 512       <device Dname="ARMCM7_DP">
 513         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 514         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 515       </device>
 516     </family>
 517
 518     <!-- ******************************  Cortex-M23  ********************** -->
 519     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 520       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 521       <description>
 522 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 523 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 524 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 525       </description>
 526       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 527       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 528       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 529       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 530       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 531       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 532
 533       <device Dname="ARMCM23">
 534         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 535         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 536       </device>
 537
 538       <device Dname="ARMCM23_TZ">
 539         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 540         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 541       </device>
 542     </family>
 543
 544     <!-- ******************************  Cortex-M33  ****************************** -->
 545     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 546       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 547       <description>
 548 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 549 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 550       </description>
 551       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 552       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 553       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 554       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 555       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 556       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 557
 558       <device Dname="ARMCM33">
 559         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 560         <description>
 561           no DSP Instructions, no Floating Point Unit, no TrustZone
 562         </description>
 563         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 564       </device>
 565
 566       <device Dname="ARMCM33_TZ">
 567         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 568         <description>
 569           no DSP Instructions, no Floating Point Unit, TrustZone
 570         </description>
 571         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 572       </device>
 573
 574       <device Dname="ARMCM33_DSP_FP">
 575         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 576         <description>
 577           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 578         </description>
 579         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 580       </device>
 581
 582       <device Dname="ARMCM33_DSP_FP_TZ">
 583         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 584         <description>
 585           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 586         </description>
 587         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 588       </device>
 589     </family>
 590
 591     <!-- ******************************  Cortex-M35P  ****************************** -->
 592     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 593       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 594       <description>
 595 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 596 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 597       </description>
 598
 599       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 600       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 601       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 602       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 603       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 604       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 605
 606       <device Dname="ARMCM35P">
 607         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 608         <description>
 609           no DSP Instructions, no Floating Point Unit, no TrustZone
 610         </description>
 611         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 612       </device>
 613
 614       <device Dname="ARMCM35P_TZ">
 615         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 616         <description>
 617           no DSP Instructions, no Floating Point Unit, TrustZone
 618         </description>
 619         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 620       </device>
 621
 622       <device Dname="ARMCM35P_DSP_FP">
 623         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 624         <description>
 625           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 626         </description>
 627         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 628       </device>
 629
 630       <device Dname="ARMCM35P_DSP_FP_TZ">
 631         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 632         <description>
 633           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 634         </description>
 635         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 636       </device>
 637     </family>
 638
 639     <!-- ******************************  Cortex-M55  ****************************** -->
 640     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 641       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 642       <description>
 643 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 644 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 645 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 646       </description>
 647
 648       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 649       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 650       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 651       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 652       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 653       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 654
 655       <device Dname="ARMCM55">
 656         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 657         <description>
 658           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 659         </description>
 660         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 661       </device>
 662     </family>
 663
 664     <!-- ******************************  ARMSC000  ****************************** -->
 665     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 666       <description>
 667 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 668 - simple, easy-to-use programmers model
 669 - highly efficient ultra-low power operation
 670 - excellent code density
 671 - deterministic, high-performance interrupt handling
 672       </description>
 673       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 674       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 675       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 676       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 677
 678       <device Dname="ARMSC000">
 679         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 680         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 681       </device>
 682     </family>
 683
 684     <!-- ******************************  ARMSC300  ****************************** -->
 685     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 686       <description>
 687 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 688 - simple, easy-to-use programmers model
 689 - highly efficient ultra-low power operation
 690 - excellent code density
 691 - deterministic, high-performance interrupt handling
 692       </description>
 693       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 694       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 695       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 696       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 697
 698       <device Dname="ARMSC300">
 699         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 700         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 701       </device>
 702     </family>
 703
 704     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 705     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 706       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 707       <description>
 708 Armv8-M Baseline based device with TrustZone
 709       </description>
 710       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 711       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 712       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 713       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 714       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 715       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 716
 717       <device Dname="ARMv8MBL">
 718         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 719         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 720       </device>
 721     </family>
 722
 723     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 724     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 725       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 726       <description>
 727 Armv8-M Mainline based device with TrustZone
 728       </description>
 729       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 730       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 731       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 732       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 733       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 734       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 735
 736       <device Dname="ARMv8MML">
 737         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 738         <description>
 739           no DSP Instructions, no Floating Point Unit, TrustZone
 740         </description>
 741         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 742       </device>
 743
 744       <device Dname="ARMv8MML_DSP">
 745         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 746         <description>
 747           DSP Instructions, no Floating Point Unit, TrustZone
 748         </description>
 749         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 750       </device>
 751
 752       <device Dname="ARMv8MML_SP">
 753         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 754         <description>
 755           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 756         </description>
 757         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 758       </device>
 759
 760       <device Dname="ARMv8MML_DSP_SP">
 761         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 762         <description>
 763           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 764         </description>
 765         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 766       </device>
 767
 768       <device Dname="ARMv8MML_DP">
 769         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 770         <description>
 771           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 772         </description>
 773         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 774       </device>
 775
 776       <device Dname="ARMv8MML_DSP_DP">
 777         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 778         <description>
 779           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 780         </description>
 781         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 782       </device>
 783     </family>
 784
 785     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 786     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 787       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 788       <description>
 789 Armv8.1-M Mainline based device with TrustZone and MVE
 790       </description>
 791       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 792       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 793       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 794       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 795       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 796       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 797
 798
 799       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 800         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 801         <description>
 802           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 803         </description>
 804         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 805       </device>
 806     </family>
 807
 808     <!-- ******************************  Cortex-A5  ****************************** -->
 809     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 810       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 811       <description>
 812 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 813 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 814 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 815       </description>
 816
 817       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 818       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 819       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 820       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 821
 822       <device Dname="ARMCA5">
 823         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 824         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 825       </device>
 826     </family>
 827
 828     <!-- ******************************  Cortex-A7  ****************************** -->
 829     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 830       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 831       <description>
 832 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 833 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 834 an optional integrated GIC, and an optional L2 cache controller.
 835       </description>
 836
 837       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 838       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 839       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 840       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 841
 842       <device Dname="ARMCA7">
 843         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 844         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 845       </device>
 846     </family>
 847
 848     <!-- ******************************  Cortex-A9  ****************************** -->
 849     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 850       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 851       <description>
 852 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 853 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 854 and 8-bit Java bytecodes in Jazelle state.
 855       </description>
 856
 857       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 858       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 859       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 860       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 861
 862       <device Dname="ARMCA9">
 863         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 864         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 865       </device>
 866     </family>
 867   </devices>
 868
 869
 870   <apis>
 871     <!-- CMSIS Device API -->
 872     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 873       <description>Device interrupt controller interface</description>
 874       <files>
 875         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 876       </files>
 877     </api>
 878     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 879       <description>RTOS Kernel system tick timer interface</description>
 880       <files>
 881         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 882       </files>
 883     </api>
 884     <!-- CMSIS-RTOS API -->
 885     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 886       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 887       <files>
 888         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 889       </files>
 890     </api>
 891     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 892       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 893       <files>
 894         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 895         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 896       </files>
 897     </api>
 898     <!-- CMSIS Driver API -->
 899     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 900       <description>USART Driver API for Cortex-M</description>
 901       <files>
 902         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 903         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 904       </files>
 905     </api>
 906     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 907       <description>SPI Driver API for Cortex-M</description>
 908       <files>
 909         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 910         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 911       </files>
 912     </api>
 913     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 914       <description>SAI Driver API for Cortex-M</description>
 915       <files>
 916         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 917         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 918       </files>
 919     </api>
 920     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 921       <description>I2C Driver API for Cortex-M</description>
 922       <files>
 923         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 924         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 925       </files>
 926     </api>
 927     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 928       <description>CAN Driver API for Cortex-M</description>
 929       <files>
 930         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 931         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 932       </files>
 933     </api>
 934     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 935       <description>Flash Driver API for Cortex-M</description>
 936       <files>
 937         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 938         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 939       </files>
 940     </api>
 941     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 942       <description>MCI Driver API for Cortex-M</description>
 943       <files>
 944         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 945         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 946       </files>
 947     </api>
 948     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 949       <description>NAND Flash Driver API for Cortex-M</description>
 950       <files>
 951         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 952         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 953       </files>
 954     </api>
 955     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 956       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 957       <files>
 958         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 959         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 960         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 961       </files>
 962     </api>
 963     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 964       <description>Ethernet MAC Driver API for Cortex-M</description>
 965       <files>
 966         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 967         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 968       </files>
 969     </api>
 970     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 971       <description>Ethernet PHY Driver API for Cortex-M</description>
 972       <files>
 973         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 974         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 975       </files>
 976     </api>
 977     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 978       <description>USB Device Driver API for Cortex-M</description>
 979       <files>
 980         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 981         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 982       </files>
 983     </api>
 984     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 985       <description>USB Host Driver API for Cortex-M</description>
 986       <files>
 987         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 988         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 989       </files>
 990     </api>
 991     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 992       <description>WiFi driver</description>
 993       <files>
 994         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 995         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 996       </files>
 997     </api>
 998     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
 999       <description>Virtual I/O</description>
1000       <files>
1001         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1002         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1003         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1004       </files>
1005     </api>
1006   </apis>
1007
1008   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1009   <conditions>
1010     <!-- compiler -->
1011     <condition id="ARMCC6">
1012       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1013       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1014     </condition>
1015     <condition id="ARMCC5">
1016       <require Tcompiler="ARMCC" Toptions="AC5"/>
1017     </condition>
1018     <condition id="ARMCC">
1019       <require Tcompiler="ARMCC"/>
1020     </condition>
1021     <condition id="GCC">
1022       <require Tcompiler="GCC"/>
1023     </condition>
1024     <condition id="IAR">
1025       <require Tcompiler="IAR"/>
1026     </condition>
1027     <condition id="ARMCC GCC">
1028       <accept Tcompiler="ARMCC"/>
1029       <accept Tcompiler="GCC"/>
1030     </condition>
1031     <condition id="ARMCC GCC IAR">
1032       <accept Tcompiler="ARMCC"/>
1033       <accept Tcompiler="GCC"/>
1034       <accept Tcompiler="IAR"/>
1035     </condition>
1036
1037     <!-- Arm architecture -->
1038     <condition id="ARMv6-M Device">
1039       <description>Armv6-M architecture based device</description>
1040       <accept Dcore="Cortex-M0"/>
1041       <accept Dcore="Cortex-M1"/>
1042       <accept Dcore="Cortex-M0+"/>
1043       <accept Dcore="SC000"/>
1044     </condition>
1045     <condition id="ARMv7-M Device">
1046       <description>Armv7-M architecture based device</description>
1047       <accept Dcore="Cortex-M3"/>
1048       <accept Dcore="Cortex-M4"/>
1049       <accept Dcore="Cortex-M7"/>
1050       <accept Dcore="SC300"/>
1051     </condition>
1052     <condition id="ARMv8-M Device">
1053       <description>Armv8-M architecture based device</description>
1054       <accept Dcore="ARMV8MBL"/>
1055       <accept Dcore="ARMV8MML"/>
1056       <accept Dcore="ARMV81MML"/>
1057       <accept Dcore="Cortex-M23"/>
1058       <accept Dcore="Cortex-M33"/>
1059       <accept Dcore="Cortex-M35P"/>
1060       <accept Dcore="Cortex-M55"/>
1061     </condition>
1062     <condition id="ARMv6_7-M Device">
1063       <description>Armv6_7-M architecture based device</description>
1064       <accept condition="ARMv6-M Device"/>
1065       <accept condition="ARMv7-M Device"/>
1066     </condition>
1067     <condition id="ARMv6_7_8-M Device">
1068       <description>Armv6_7_8-M architecture based device</description>
1069       <accept condition="ARMv6-M Device"/>
1070       <accept condition="ARMv7-M Device"/>
1071       <accept condition="ARMv8-M Device"/>
1072     </condition>
1073     <condition id="ARMv7-A Device">
1074       <description>Armv7-A architecture based device</description>
1075       <accept Dcore="Cortex-A5"/>
1076       <accept Dcore="Cortex-A7"/>
1077       <accept Dcore="Cortex-A9"/>
1078     </condition>
1079
1080     <condition id="TrustZone">
1081       <description>TrustZone</description>
1082       <require Dtz="TZ"/>
1083     </condition>
1084     <condition id="TZ Secure">
1085       <description>TrustZone (Secure)</description>
1086       <require Dtz="TZ"/>
1087       <require Dsecure="Secure"/>
1088     </condition>
1089     <condition id="TZ Non-secure">
1090       <description>TrustZone (Non-secure)</description>
1091       <require Dtz="TZ"/>
1092       <accept Dsecure="Non-secure"/>
1093       <accept Dsecure="TZ-disabled"/>
1094     </condition>
1095     <condition id="TZ Unavailable">
1096       <description>TrustZone not available</description>
1097       <deny Dtz="TZ"/>
1098     </condition>
1099
1100     <!-- ARM core -->
1101     <condition id="CM0">
1102       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1103       <accept Dcore="Cortex-M0"/>
1104       <accept Dcore="Cortex-M0+"/>
1105       <accept Dcore="SC000"/>
1106     </condition>
1107     <condition id="CM1">
1108       <description>Cortex-M1</description>
1109       <require Dcore="Cortex-M1"/>
1110     </condition>
1111     <condition id="CM3">
1112       <description>Cortex-M3 or SC300 processor based device</description>
1113       <accept Dcore="Cortex-M3"/>
1114       <accept Dcore="SC300"/>
1115     </condition>
1116     <condition id="CM4">
1117       <description>Cortex-M4 processor based device</description>
1118       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1119     </condition>
1120     <condition id="CM4_FP">
1121       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1122       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1123       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1124       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1125     </condition>
1126     <condition id="CM7">
1127       <description>Cortex-M7 processor based device</description>
1128       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1129     </condition>
1130     <condition id="CM7_FP">
1131       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1132       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1133       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1134     </condition>
1135     <condition id="CM7_SP">
1136       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1137       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1138     </condition>
1139     <condition id="CM7_DP">
1140       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1141       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1142     </condition>
1143     <condition id="CM23">
1144       <description>Cortex-M23 processor based device</description>
1145       <require Dcore="Cortex-M23"/>
1146     </condition>
1147     <condition id="CM33">
1148       <description>Cortex-M33 processor based device</description>
1149       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1150     </condition>
1151     <condition id="CM33_FP">
1152       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1153       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1154     </condition>
1155     <condition id="CM35P">
1156       <description>Cortex-M35P processor based device</description>
1157       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1158     </condition>
1159     <condition id="CM35P_FP">
1160       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1161       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1162     </condition>
1163     <condition id="ARMv8MBL">
1164       <description>Armv8-M Baseline processor based device</description>
1165       <require Dcore="ARMV8MBL"/>
1166     </condition>
1167     <condition id="ARMv8MML">
1168       <description>Armv8-M Mainline processor based device</description>
1169       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1170     </condition>
1171     <condition id="ARMv8MML_FP">
1172       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1173       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1174       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1175     </condition>
1176
1177     <condition id="CM33_NODSP_NOFPU">
1178       <description>CM33, no DSP, no FPU</description>
1179       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1180     </condition>
1181     <condition id="CM33_DSP_NOFPU">
1182       <description>CM33, DSP, no FPU</description>
1183       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1184     </condition>
1185     <condition id="CM33_NODSP_SP">
1186       <description>CM33, no DSP, SP FPU</description>
1187       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1188     </condition>
1189     <condition id="CM33_DSP_SP">
1190       <description>CM33, DSP, SP FPU</description>
1191       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1192     </condition>
1193
1194     <condition id="CM35P_NODSP_NOFPU">
1195       <description>CM35P, no DSP, no FPU</description>
1196       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1197     </condition>
1198     <condition id="CM35P_DSP_NOFPU">
1199       <description>CM35P, DSP, no FPU</description>
1200       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1201     </condition>
1202     <condition id="CM35P_NODSP_SP">
1203       <description>CM35P, no DSP, SP FPU</description>
1204       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1205     </condition>
1206     <condition id="CM35P_DSP_SP">
1207       <description>CM35P, DSP, SP FPU</description>
1208       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1209     </condition>
1210
1211     <condition id="CM55_NOFPU_NOMVE">
1212       <description>Cortex-M55, no FPU, no MVE</description>
1213       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1214     </condition>
1215     <condition id="CM55_NOFPU_MVE">
1216       <description>Cortex-M55, no FPU, MVE</description>
1217       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1218       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1219     </condition>
1220     <condition id="CM55_FPU">
1221       <description>Cortex-M55, FPU</description>
1222       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1223       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1224     </condition>
1225
1226     <condition id="ARMv8MML_NODSP_NOFPU">
1227       <description>Armv8-M Mainline, no DSP, no FPU</description>
1228       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1229     </condition>
1230     <condition id="ARMv8MML_DSP_NOFPU">
1231       <description>Armv8-M Mainline, DSP, no FPU</description>
1232       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1233     </condition>
1234     <condition id="ARMv8MML_NODSP_SP">
1235       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1236       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1237     </condition>
1238     <condition id="ARMv8MML_DSP_SP">
1239       <description>Armv8-M Mainline, DSP, SP FPU</description>
1240       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1241     </condition>
1242
1243     <condition id="CA5_CA9">
1244       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1245       <accept Dcore="Cortex-A5"/>
1246       <accept Dcore="Cortex-A9"/>
1247     </condition>
1248
1249     <condition id="CA7">
1250       <description>Cortex-A7 processor based device</description>
1251       <accept Dcore="Cortex-A7"/>
1252     </condition>
1253
1254     <!-- ARMCC compiler -->
1255     <condition id="CA_ARMCC5">
1256       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1257       <require condition="ARMv7-A Device"/>
1258       <require condition="ARMCC5"/>
1259     </condition>
1260     <condition id="CA_ARMCC6">
1261       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1262       <require condition="ARMv7-A Device"/>
1263       <require condition="ARMCC6"/>
1264     </condition>
1265
1266     <condition id="CM0_ARMCC">
1267       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1268       <require condition="CM0"/>
1269       <require Tcompiler="ARMCC"/>
1270     </condition>
1271     <condition id="CM0_LE_ARMCC">
1272       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1273       <require condition="CM0_ARMCC"/>
1274       <require Dendian="Little-endian"/>
1275     </condition>
1276     <condition id="CM0_BE_ARMCC">
1277       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1278       <require condition="CM0_ARMCC"/>
1279       <require Dendian="Big-endian"/>
1280     </condition>
1281
1282     <condition id="CM1_ARMCC">
1283       <description>Cortex-M1 based device for the Arm Compiler</description>
1284       <require condition="CM1"/>
1285       <require Tcompiler="ARMCC"/>
1286     </condition>
1287     <condition id="CM1_LE_ARMCC">
1288       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1289       <require condition="CM1_ARMCC"/>
1290       <require Dendian="Little-endian"/>
1291     </condition>
1292     <condition id="CM1_BE_ARMCC">
1293       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1294       <require condition="CM1_ARMCC"/>
1295       <require Dendian="Big-endian"/>
1296     </condition>
1297
1298     <condition id="CM3_ARMCC">
1299       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1300       <require condition="CM3"/>
1301       <require Tcompiler="ARMCC"/>
1302     </condition>
1303     <condition id="CM3_LE_ARMCC">
1304       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1305       <require condition="CM3_ARMCC"/>
1306       <require Dendian="Little-endian"/>
1307     </condition>
1308     <condition id="CM3_BE_ARMCC">
1309       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1310       <require condition="CM3_ARMCC"/>
1311       <require Dendian="Big-endian"/>
1312     </condition>
1313
1314     <condition id="CM4_ARMCC">
1315       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1316       <require condition="CM4"/>
1317       <require Tcompiler="ARMCC"/>
1318     </condition>
1319     <condition id="CM4_LE_ARMCC">
1320       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1321       <require condition="CM4_ARMCC"/>
1322       <require Dendian="Little-endian"/>
1323     </condition>
1324     <condition id="CM4_BE_ARMCC">
1325       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1326       <require condition="CM4_ARMCC"/>
1327       <require Dendian="Big-endian"/>
1328     </condition>
1329
1330     <condition id="CM4_FP_ARMCC">
1331       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1332       <require condition="CM4_FP"/>
1333       <require Tcompiler="ARMCC"/>
1334     </condition>
1335     <condition id="CM4_FP_LE_ARMCC">
1336       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1337       <require condition="CM4_FP_ARMCC"/>
1338       <require Dendian="Little-endian"/>
1339     </condition>
1340     <condition id="CM4_FP_BE_ARMCC">
1341       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1342       <require condition="CM4_FP_ARMCC"/>
1343       <require Dendian="Big-endian"/>
1344     </condition>
1345
1346     <condition id="CM7_ARMCC">
1347       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1348       <require condition="CM7"/>
1349       <require Tcompiler="ARMCC"/>
1350     </condition>
1351     <condition id="CM7_LE_ARMCC">
1352       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1353       <require condition="CM7_ARMCC"/>
1354       <require Dendian="Little-endian"/>
1355     </condition>
1356     <condition id="CM7_BE_ARMCC">
1357       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1358       <require condition="CM7_ARMCC"/>
1359       <require Dendian="Big-endian"/>
1360     </condition>
1361
1362     <condition id="CM7_FP_ARMCC">
1363       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1364       <require condition="CM7_FP"/>
1365       <require Tcompiler="ARMCC"/>
1366     </condition>
1367     <condition id="CM7_FP_LE_ARMCC">
1368       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1369       <require condition="CM7_FP_ARMCC"/>
1370       <require Dendian="Little-endian"/>
1371     </condition>
1372     <condition id="CM7_FP_BE_ARMCC">
1373       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1374       <require condition="CM7_FP_ARMCC"/>
1375       <require Dendian="Big-endian"/>
1376     </condition>
1377
1378     <condition id="CM7_SP_ARMCC">
1379       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1380       <require condition="CM7_SP"/>
1381       <require Tcompiler="ARMCC"/>
1382     </condition>
1383     <condition id="CM7_SP_LE_ARMCC">
1384       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1385       <require condition="CM7_SP_ARMCC"/>
1386       <require Dendian="Little-endian"/>
1387     </condition>
1388     <condition id="CM7_SP_BE_ARMCC">
1389       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1390       <require condition="CM7_SP_ARMCC"/>
1391       <require Dendian="Big-endian"/>
1392     </condition>
1393
1394     <condition id="CM7_DP_ARMCC">
1395       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1396       <require condition="CM7_DP"/>
1397       <require Tcompiler="ARMCC"/>
1398     </condition>
1399     <condition id="CM7_DP_LE_ARMCC">
1400       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1401       <require condition="CM7_DP_ARMCC"/>
1402       <require Dendian="Little-endian"/>
1403     </condition>
1404     <condition id="CM7_DP_BE_ARMCC">
1405       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1406       <require condition="CM7_DP_ARMCC"/>
1407       <require Dendian="Big-endian"/>
1408     </condition>
1409
1410     <condition id="CM23_ARMCC">
1411       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1412       <require condition="CM23"/>
1413       <require Tcompiler="ARMCC"/>
1414     </condition>
1415     <condition id="CM23_LE_ARMCC">
1416       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1417       <require condition="CM23_ARMCC"/>
1418       <require Dendian="Little-endian"/>
1419     </condition>
1420
1421     <condition id="CM33_ARMCC">
1422       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1423       <require condition="CM33"/>
1424       <require Tcompiler="ARMCC"/>
1425     </condition>
1426     <condition id="CM33_LE_ARMCC">
1427       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1428       <require condition="CM33_ARMCC"/>
1429       <require Dendian="Little-endian"/>
1430     </condition>
1431
1432     <condition id="CM33_FP_ARMCC">
1433       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1434       <require condition="CM33_FP"/>
1435       <require Tcompiler="ARMCC"/>
1436     </condition>
1437     <condition id="CM33_FP_LE_ARMCC">
1438       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1439       <require condition="CM33_FP_ARMCC"/>
1440       <require Dendian="Little-endian"/>
1441     </condition>
1442
1443     <condition id="CM33_NODSP_NOFPU_ARMCC">
1444       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1445       <require condition="CM33_NODSP_NOFPU"/>
1446       <require Tcompiler="ARMCC"/>
1447     </condition>
1448     <condition id="CM33_DSP_NOFPU_ARMCC">
1449       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1450       <require condition="CM33_DSP_NOFPU"/>
1451       <require Tcompiler="ARMCC"/>
1452     </condition>
1453     <condition id="CM33_NODSP_SP_ARMCC">
1454       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1455       <require condition="CM33_NODSP_SP"/>
1456       <require Tcompiler="ARMCC"/>
1457     </condition>
1458     <condition id="CM33_DSP_SP_ARMCC">
1459       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1460       <require condition="CM33_DSP_SP"/>
1461       <require Tcompiler="ARMCC"/>
1462     </condition>
1463     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1464       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1465       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1466       <require Dendian="Little-endian"/>
1467     </condition>
1468     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1469       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1470       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1471       <require Dendian="Little-endian"/>
1472     </condition>
1473     <condition id="CM33_NODSP_SP_LE_ARMCC">
1474       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1475       <require condition="CM33_NODSP_SP_ARMCC"/>
1476       <require Dendian="Little-endian"/>
1477     </condition>
1478     <condition id="CM33_DSP_SP_LE_ARMCC">
1479       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1480       <require condition="CM33_DSP_SP_ARMCC"/>
1481       <require Dendian="Little-endian"/>
1482     </condition>
1483
1484     <condition id="CM35P_ARMCC">
1485       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1486       <require condition="CM35P"/>
1487       <require Tcompiler="ARMCC"/>
1488     </condition>
1489     <condition id="CM35P_LE_ARMCC">
1490       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1491       <require condition="CM35P_ARMCC"/>
1492       <require Dendian="Little-endian"/>
1493     </condition>
1494
1495     <condition id="CM35P_FP_ARMCC">
1496       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1497       <require condition="CM35P_FP"/>
1498       <require Tcompiler="ARMCC"/>
1499     </condition>
1500     <condition id="CM35P_FP_LE_ARMCC">
1501       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1502       <require condition="CM35P_FP_ARMCC"/>
1503       <require Dendian="Little-endian"/>
1504     </condition>
1505
1506     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1507       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1508       <require condition="CM35P_NODSP_NOFPU"/>
1509       <require Tcompiler="ARMCC"/>
1510     </condition>
1511     <condition id="CM35P_DSP_NOFPU_ARMCC">
1512       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1513       <require condition="CM35P_DSP_NOFPU"/>
1514       <require Tcompiler="ARMCC"/>
1515     </condition>
1516     <condition id="CM35P_NODSP_SP_ARMCC">
1517       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1518       <require condition="CM35P_NODSP_SP"/>
1519       <require Tcompiler="ARMCC"/>
1520     </condition>
1521     <condition id="CM35P_DSP_SP_ARMCC">
1522       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1523       <require condition="CM35P_DSP_SP"/>
1524       <require Tcompiler="ARMCC"/>
1525     </condition>
1526     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1527       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1528       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1529       <require Dendian="Little-endian"/>
1530     </condition>
1531     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1532       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1533       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1534       <require Dendian="Little-endian"/>
1535     </condition>
1536     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1537       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1538       <require condition="CM35P_NODSP_SP_ARMCC"/>
1539       <require Dendian="Little-endian"/>
1540     </condition>
1541     <condition id="CM35P_DSP_SP_LE_ARMCC">
1542       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1543       <require condition="CM35P_DSP_SP_ARMCC"/>
1544       <require Dendian="Little-endian"/>
1545     </condition>
1546
1547     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1548       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1549       <require condition="CM55_NOFPU_NOMVE"/>
1550       <require Tcompiler="ARMCC"/>
1551     </condition>
1552     <condition id="CM55_NOFPU_MVE_ARMCC">
1553       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1554       <require condition="CM55_NOFPU_MVE"/>
1555       <require Tcompiler="ARMCC"/>
1556     </condition>
1557     <condition id="CM55_FPU_ARMCC">
1558       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1559       <require condition="CM55_FPU"/>
1560       <require Tcompiler="ARMCC"/>
1561     </condition>
1562     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1563       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1564       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1565       <require Dendian="Little-endian"/>
1566     </condition>
1567     <condition id="CM55_FPU_LE_ARMCC">
1568       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1569       <require condition="CM55_FPU_ARMCC"/>
1570       <require Dendian="Little-endian"/>
1571     </condition>
1572
1573     <condition id="ARMv8MBL_ARMCC">
1574       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1575       <require condition="ARMv8MBL"/>
1576       <require Tcompiler="ARMCC"/>
1577     </condition>
1578     <condition id="ARMv8MBL_LE_ARMCC">
1579       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1580       <require condition="ARMv8MBL_ARMCC"/>
1581       <require Dendian="Little-endian"/>
1582     </condition>
1583
1584     <condition id="ARMv8MML_ARMCC">
1585       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1586       <require condition="ARMv8MML"/>
1587       <require Tcompiler="ARMCC"/>
1588     </condition>
1589     <condition id="ARMv8MML_LE_ARMCC">
1590       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1591       <require condition="ARMv8MML_ARMCC"/>
1592       <require Dendian="Little-endian"/>
1593     </condition>
1594
1595     <condition id="ARMv8MML_FP_ARMCC">
1596       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1597       <require condition="ARMv8MML_FP"/>
1598       <require Tcompiler="ARMCC"/>
1599     </condition>
1600     <condition id="ARMv8MML_FP_LE_ARMCC">
1601       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1602       <require condition="ARMv8MML_FP_ARMCC"/>
1603       <require Dendian="Little-endian"/>
1604     </condition>
1605
1606     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1607       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1608       <require condition="ARMv8MML_NODSP_NOFPU"/>
1609       <require Tcompiler="ARMCC"/>
1610     </condition>
1611     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1612       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1613       <require condition="ARMv8MML_DSP_NOFPU"/>
1614       <require Tcompiler="ARMCC"/>
1615     </condition>
1616     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1617       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1618       <require condition="ARMv8MML_NODSP_SP"/>
1619       <require Tcompiler="ARMCC"/>
1620     </condition>
1621     <condition id="ARMv8MML_DSP_SP_ARMCC">
1622       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1623       <require condition="ARMv8MML_DSP_SP"/>
1624       <require Tcompiler="ARMCC"/>
1625     </condition>
1626     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1627       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1628       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1629       <require Dendian="Little-endian"/>
1630     </condition>
1631     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1632       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1633       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1634       <require Dendian="Little-endian"/>
1635     </condition>
1636     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1637       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1638       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1639       <require Dendian="Little-endian"/>
1640     </condition>
1641     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1642       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1643       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1644       <require Dendian="Little-endian"/>
1645     </condition>
1646
1647     <condition id="TZ Secure ARMCC6">
1648       <description>TrustZone (Secure), Arm Compiler</description>
1649       <require condition="TZ Secure"/>
1650       <require condition="ARMCC6"/>
1651     </condition>
1652     <condition id="TZ Non-secure ARMCC6">
1653       <description>TrustZone (Non-secure), Arm Compiler</description>
1654       <require condition="TZ Non-secure"/>
1655       <require condition="ARMCC6"/>
1656     </condition>
1657     <condition id="TZ Unavailable ARMCC6">
1658       <description>TrustZone not available, Arm Compiler</description>
1659       <require condition="TZ Unavailable"/>
1660       <require condition="ARMCC6"/>
1661     </condition>
1662
1663     <!-- GCC compiler -->
1664     <condition id="CA_GCC">
1665       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1666       <require condition="ARMv7-A Device"/>
1667       <require Tcompiler="GCC"/>
1668     </condition>
1669
1670     <condition id="CM0_GCC">
1671       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1672       <require condition="CM0"/>
1673       <require Tcompiler="GCC"/>
1674     </condition>
1675     <condition id="CM0_LE_GCC">
1676       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1677       <require condition="CM0_GCC"/>
1678       <require Dendian="Little-endian"/>
1679     </condition>
1680     <condition id="CM0_BE_GCC">
1681       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1682       <require condition="CM0_GCC"/>
1683       <require Dendian="Big-endian"/>
1684     </condition>
1685
1686     <condition id="CM1_GCC">
1687       <description>Cortex-M1 based device for the GCC Compiler</description>
1688       <require condition="CM1"/>
1689       <require Tcompiler="GCC"/>
1690     </condition>
1691     <condition id="CM1_LE_GCC">
1692       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1693       <require condition="CM1_GCC"/>
1694       <require Dendian="Little-endian"/>
1695     </condition>
1696     <condition id="CM1_BE_GCC">
1697       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1698       <require condition="CM1_GCC"/>
1699       <require Dendian="Big-endian"/>
1700     </condition>
1701
1702     <condition id="CM3_GCC">
1703       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1704       <require condition="CM3"/>
1705       <require Tcompiler="GCC"/>
1706     </condition>
1707     <condition id="CM3_LE_GCC">
1708       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1709       <require condition="CM3_GCC"/>
1710       <require Dendian="Little-endian"/>
1711     </condition>
1712     <condition id="CM3_BE_GCC">
1713       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1714       <require condition="CM3_GCC"/>
1715       <require Dendian="Big-endian"/>
1716     </condition>
1717
1718     <condition id="CM4_GCC">
1719       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1720       <require condition="CM4"/>
1721       <require Tcompiler="GCC"/>
1722     </condition>
1723     <condition id="CM4_LE_GCC">
1724       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1725       <require condition="CM4_GCC"/>
1726       <require Dendian="Little-endian"/>
1727     </condition>
1728     <condition id="CM4_BE_GCC">
1729       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1730       <require condition="CM4_GCC"/>
1731       <require Dendian="Big-endian"/>
1732     </condition>
1733
1734     <condition id="CM4_FP_GCC">
1735       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1736       <require condition="CM4_FP"/>
1737       <require Tcompiler="GCC"/>
1738     </condition>
1739     <condition id="CM4_FP_LE_GCC">
1740       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1741       <require condition="CM4_FP_GCC"/>
1742       <require Dendian="Little-endian"/>
1743     </condition>
1744     <condition id="CM4_FP_BE_GCC">
1745       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1746       <require condition="CM4_FP_GCC"/>
1747       <require Dendian="Big-endian"/>
1748     </condition>
1749
1750     <condition id="CM7_GCC">
1751       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1752       <require condition="CM7"/>
1753       <require Tcompiler="GCC"/>
1754     </condition>
1755     <condition id="CM7_LE_GCC">
1756       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1757       <require condition="CM7_GCC"/>
1758       <require Dendian="Little-endian"/>
1759     </condition>
1760     <condition id="CM7_BE_GCC">
1761       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1762       <require condition="CM7_GCC"/>
1763       <require Dendian="Big-endian"/>
1764     </condition>
1765
1766     <condition id="CM7_FP_GCC">
1767       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1768       <require condition="CM7_FP"/>
1769       <require Tcompiler="GCC"/>
1770     </condition>
1771     <condition id="CM7_FP_LE_GCC">
1772       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1773       <require condition="CM7_FP_GCC"/>
1774       <require Dendian="Little-endian"/>
1775     </condition>
1776     <condition id="CM7_FP_BE_GCC">
1777       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1778       <require condition="CM7_FP_GCC"/>
1779       <require Dendian="Big-endian"/>
1780     </condition>
1781
1782     <condition id="CM7_SP_GCC">
1783       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1784       <require condition="CM7_SP"/>
1785       <require Tcompiler="GCC"/>
1786     </condition>
1787     <condition id="CM7_SP_LE_GCC">
1788       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1789       <require condition="CM7_SP_GCC"/>
1790       <require Dendian="Little-endian"/>
1791     </condition>
1792
1793     <condition id="CM7_DP_GCC">
1794       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1795       <require condition="CM7_DP"/>
1796       <require Tcompiler="GCC"/>
1797     </condition>
1798     <condition id="CM7_DP_LE_GCC">
1799       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1800       <require condition="CM7_DP_GCC"/>
1801       <require Dendian="Little-endian"/>
1802     </condition>
1803
1804     <condition id="CM23_GCC">
1805       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1806       <require condition="CM23"/>
1807       <require Tcompiler="GCC"/>
1808     </condition>
1809     <condition id="CM23_LE_GCC">
1810       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1811       <require condition="CM23_GCC"/>
1812       <require Dendian="Little-endian"/>
1813     </condition>
1814
1815     <condition id="CM33_GCC">
1816       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1817       <require condition="CM33"/>
1818       <require Tcompiler="GCC"/>
1819     </condition>
1820     <condition id="CM33_LE_GCC">
1821       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1822       <require condition="CM33_GCC"/>
1823       <require Dendian="Little-endian"/>
1824     </condition>
1825
1826     <condition id="CM33_FP_GCC">
1827       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1828       <require condition="CM33_FP"/>
1829       <require Tcompiler="GCC"/>
1830     </condition>
1831     <condition id="CM33_FP_LE_GCC">
1832       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1833       <require condition="CM33_FP_GCC"/>
1834       <require Dendian="Little-endian"/>
1835     </condition>
1836
1837     <condition id="CM33_NODSP_NOFPU_GCC">
1838       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1839       <require condition="CM33_NODSP_NOFPU"/>
1840       <require Tcompiler="GCC"/>
1841     </condition>
1842     <condition id="CM33_DSP_NOFPU_GCC">
1843       <description>CM33, DSP, no FPU, GCC Compiler</description>
1844       <require condition="CM33_DSP_NOFPU"/>
1845       <require Tcompiler="GCC"/>
1846     </condition>
1847     <condition id="CM33_NODSP_SP_GCC">
1848       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1849       <require condition="CM33_NODSP_SP"/>
1850       <require Tcompiler="GCC"/>
1851     </condition>
1852     <condition id="CM33_DSP_SP_GCC">
1853       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1854       <require condition="CM33_DSP_SP"/>
1855       <require Tcompiler="GCC"/>
1856     </condition>
1857     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1858       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1859       <require condition="CM33_NODSP_NOFPU_GCC"/>
1860       <require Dendian="Little-endian"/>
1861     </condition>
1862     <condition id="CM33_DSP_NOFPU_LE_GCC">
1863       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1864       <require condition="CM33_DSP_NOFPU_GCC"/>
1865       <require Dendian="Little-endian"/>
1866     </condition>
1867     <condition id="CM33_NODSP_SP_LE_GCC">
1868       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1869       <require condition="CM33_NODSP_SP_GCC"/>
1870       <require Dendian="Little-endian"/>
1871     </condition>
1872     <condition id="CM33_DSP_SP_LE_GCC">
1873       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1874       <require condition="CM33_DSP_SP_GCC"/>
1875       <require Dendian="Little-endian"/>
1876     </condition>
1877
1878     <condition id="CM35P_GCC">
1879       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1880       <require condition="CM35P"/>
1881       <require Tcompiler="GCC"/>
1882     </condition>
1883     <condition id="CM35P_LE_GCC">
1884       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1885       <require condition="CM35P_GCC"/>
1886       <require Dendian="Little-endian"/>
1887     </condition>
1888
1889     <condition id="CM35P_FP_GCC">
1890       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1891       <require condition="CM35P_FP"/>
1892       <require Tcompiler="GCC"/>
1893     </condition>
1894     <condition id="CM35P_FP_LE_GCC">
1895       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1896       <require condition="CM35P_FP_GCC"/>
1897       <require Dendian="Little-endian"/>
1898     </condition>
1899
1900     <condition id="CM35P_NODSP_NOFPU_GCC">
1901       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1902       <require condition="CM35P_NODSP_NOFPU"/>
1903       <require Tcompiler="GCC"/>
1904     </condition>
1905     <condition id="CM35P_DSP_NOFPU_GCC">
1906       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1907       <require condition="CM35P_DSP_NOFPU"/>
1908       <require Tcompiler="GCC"/>
1909     </condition>
1910     <condition id="CM35P_NODSP_SP_GCC">
1911       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1912       <require condition="CM35P_NODSP_SP"/>
1913       <require Tcompiler="GCC"/>
1914     </condition>
1915     <condition id="CM35P_DSP_SP_GCC">
1916       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1917       <require condition="CM35P_DSP_SP"/>
1918       <require Tcompiler="GCC"/>
1919     </condition>
1920     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1921       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1922       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1923       <require Dendian="Little-endian"/>
1924     </condition>
1925     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1926       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1927       <require condition="CM35P_DSP_NOFPU_GCC"/>
1928       <require Dendian="Little-endian"/>
1929     </condition>
1930     <condition id="CM35P_NODSP_SP_LE_GCC">
1931       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1932       <require condition="CM35P_NODSP_SP_GCC"/>
1933       <require Dendian="Little-endian"/>
1934     </condition>
1935     <condition id="CM35P_DSP_SP_LE_GCC">
1936       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1937       <require condition="CM35P_DSP_SP_GCC"/>
1938       <require Dendian="Little-endian"/>
1939     </condition>
1940
1941     <condition id="CM55_NOFPU_NOMVE_GCC">
1942       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1943       <require condition="CM55_NOFPU_NOMVE"/>
1944       <require Tcompiler="GCC"/>
1945     </condition>
1946     <condition id="CM55_NOFPU_MVE_GCC">
1947       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1948       <require condition="CM55_NOFPU_MVE"/>
1949       <require Tcompiler="GCC"/>
1950     </condition>
1951     <condition id="CM55_FPU_GCC">
1952       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1953       <require condition="CM55_FPU"/>
1954       <require Tcompiler="GCC"/>
1955     </condition>
1956     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1957       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1958       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1959       <require Dendian="Little-endian"/>
1960     </condition>
1961     <condition id="CM55_FPU_LE_GCC">
1962       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1963       <require condition="CM55_FPU_GCC"/>
1964       <require Dendian="Little-endian"/>
1965     </condition>
1966
1967     <condition id="ARMv8MBL_GCC">
1968       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1969       <require condition="ARMv8MBL"/>
1970       <require Tcompiler="GCC"/>
1971     </condition>
1972     <condition id="ARMv8MBL_LE_GCC">
1973       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1974       <require condition="ARMv8MBL_GCC"/>
1975       <require Dendian="Little-endian"/>
1976     </condition>
1977
1978     <condition id="ARMv8MML_GCC">
1979       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1980       <require condition="ARMv8MML"/>
1981       <require Tcompiler="GCC"/>
1982     </condition>
1983     <condition id="ARMv8MML_LE_GCC">
1984       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1985       <require condition="ARMv8MML_GCC"/>
1986       <require Dendian="Little-endian"/>
1987     </condition>
1988
1989     <condition id="ARMv8MML_FP_GCC">
1990       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1991       <require condition="ARMv8MML_FP"/>
1992       <require Tcompiler="GCC"/>
1993     </condition>
1994     <condition id="ARMv8MML_FP_LE_GCC">
1995       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1996       <require condition="ARMv8MML_FP_GCC"/>
1997       <require Dendian="Little-endian"/>
1998     </condition>
1999
2000     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
2001       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
2002       <require condition="ARMv8MML_NODSP_NOFPU"/>
2003       <require Tcompiler="GCC"/>
2004     </condition>
2005     <condition id="ARMv8MML_DSP_NOFPU_GCC">
2006       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
2007       <require condition="ARMv8MML_DSP_NOFPU"/>
2008       <require Tcompiler="GCC"/>
2009     </condition>
2010     <condition id="ARMv8MML_NODSP_SP_GCC">
2011       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
2012       <require condition="ARMv8MML_NODSP_SP"/>
2013       <require Tcompiler="GCC"/>
2014     </condition>
2015     <condition id="ARMv8MML_DSP_SP_GCC">
2016       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
2017       <require condition="ARMv8MML_DSP_SP"/>
2018       <require Tcompiler="GCC"/>
2019     </condition>
2020     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
2021       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
2022       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
2023       <require Dendian="Little-endian"/>
2024     </condition>
2025     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
2026       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
2027       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
2028       <require Dendian="Little-endian"/>
2029     </condition>
2030     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
2031       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
2032       <require condition="ARMv8MML_NODSP_SP_GCC"/>
2033       <require Dendian="Little-endian"/>
2034     </condition>
2035     <condition id="ARMv8MML_DSP_SP_LE_GCC">
2036       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
2037       <require condition="ARMv8MML_DSP_SP_GCC"/>
2038       <require Dendian="Little-endian"/>
2039     </condition>
2040
2041     <!-- IAR compiler -->
2042     <condition id="CA_IAR">
2043       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
2044       <require condition="ARMv7-A Device"/>
2045       <require Tcompiler="IAR"/>
2046     </condition>
2047
2048     <condition id="CM0_IAR">
2049       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
2050       <require condition="CM0"/>
2051       <require Tcompiler="IAR"/>
2052     </condition>
2053     <condition id="CM0_LE_IAR">
2054       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
2055       <require condition="CM0_IAR"/>
2056       <require Dendian="Little-endian"/>
2057     </condition>
2058     <condition id="CM0_BE_IAR">
2059       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
2060       <require condition="CM0_IAR"/>
2061       <require Dendian="Big-endian"/>
2062     </condition>
2063
2064     <condition id="CM1_IAR">
2065       <description>Cortex-M1 based device for the IAR Compiler</description>
2066       <require condition="CM1"/>
2067       <require Tcompiler="IAR"/>
2068     </condition>
2069     <condition id="CM1_LE_IAR">
2070       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
2071       <require condition="CM1_IAR"/>
2072       <require Dendian="Little-endian"/>
2073     </condition>
2074     <condition id="CM1_BE_IAR">
2075       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
2076       <require condition="CM1_IAR"/>
2077       <require Dendian="Big-endian"/>
2078     </condition>
2079
2080     <condition id="CM3_IAR">
2081       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
2082       <require condition="CM3"/>
2083       <require Tcompiler="IAR"/>
2084     </condition>
2085     <condition id="CM3_LE_IAR">
2086       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
2087       <require condition="CM3_IAR"/>
2088       <require Dendian="Little-endian"/>
2089     </condition>
2090     <condition id="CM3_BE_IAR">
2091       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
2092       <require condition="CM3_IAR"/>
2093       <require Dendian="Big-endian"/>
2094     </condition>
2095
2096     <condition id="CM4_IAR">
2097       <description>Cortex-M4 processor based device for the IAR Compiler</description>
2098       <require condition="CM4"/>
2099       <require Tcompiler="IAR"/>
2100     </condition>
2101     <condition id="CM4_LE_IAR">
2102       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
2103       <require condition="CM4_IAR"/>
2104       <require Dendian="Little-endian"/>
2105     </condition>
2106     <condition id="CM4_BE_IAR">
2107       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2108       <require condition="CM4_IAR"/>
2109       <require Dendian="Big-endian"/>
2110     </condition>
2111
2112     <condition id="CM4_FP_IAR">
2113       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2114       <require condition="CM4_FP"/>
2115       <require Tcompiler="IAR"/>
2116     </condition>
2117     <condition id="CM4_FP_LE_IAR">
2118       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2119       <require condition="CM4_FP_IAR"/>
2120       <require Dendian="Little-endian"/>
2121     </condition>
2122     <condition id="CM4_FP_BE_IAR">
2123       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2124       <require condition="CM4_FP_IAR"/>
2125       <require Dendian="Big-endian"/>
2126     </condition>
2127
2128     <condition id="CM7_IAR">
2129       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2130       <require condition="CM7"/>
2131       <require Tcompiler="IAR"/>
2132     </condition>
2133     <condition id="CM7_LE_IAR">
2134       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2135       <require condition="CM7_IAR"/>
2136       <require Dendian="Little-endian"/>
2137     </condition>
2138     <condition id="CM7_BE_IAR">
2139       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2140       <require condition="CM7_IAR"/>
2141       <require Dendian="Big-endian"/>
2142     </condition>
2143
2144     <condition id="CM7_FP_IAR">
2145       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2146       <require condition="CM7_FP"/>
2147       <require Tcompiler="IAR"/>
2148     </condition>
2149     <condition id="CM7_FP_LE_IAR">
2150       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2151       <require condition="CM7_FP_IAR"/>
2152       <require Dendian="Little-endian"/>
2153     </condition>
2154     <condition id="CM7_FP_BE_IAR">
2155       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2156       <require condition="CM7_FP_IAR"/>
2157       <require Dendian="Big-endian"/>
2158     </condition>
2159
2160     <condition id="CM7_SP_IAR">
2161       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2162       <require condition="CM7_SP"/>
2163       <require Tcompiler="IAR"/>
2164     </condition>
2165     <condition id="CM7_SP_LE_IAR">
2166       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2167       <require condition="CM7_SP_IAR"/>
2168       <require Dendian="Little-endian"/>
2169     </condition>
2170     <condition id="CM7_SP_BE_IAR">
2171       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2172       <require condition="CM7_SP_IAR"/>
2173       <require Dendian="Big-endian"/>
2174     </condition>
2175
2176     <condition id="CM7_DP_IAR">
2177       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2178       <require condition="CM7_DP"/>
2179       <require Tcompiler="IAR"/>
2180     </condition>
2181     <condition id="CM7_DP_LE_IAR">
2182       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2183       <require condition="CM7_DP_IAR"/>
2184       <require Dendian="Little-endian"/>
2185     </condition>
2186     <condition id="CM7_DP_BE_IAR">
2187       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2188       <require condition="CM7_DP_IAR"/>
2189       <require Dendian="Big-endian"/>
2190     </condition>
2191
2192     <condition id="CM23_IAR">
2193       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2194       <require condition="CM23"/>
2195       <require Tcompiler="IAR"/>
2196     </condition>
2197     <condition id="CM23_LE_IAR">
2198       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2199       <require condition="CM23_IAR"/>
2200       <require Dendian="Little-endian"/>
2201     </condition>
2202
2203     <condition id="CM33_IAR">
2204       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2205       <require condition="CM33"/>
2206       <require Tcompiler="IAR"/>
2207     </condition>
2208     <condition id="CM33_LE_IAR">
2209       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2210       <require condition="CM33_IAR"/>
2211       <require Dendian="Little-endian"/>
2212     </condition>
2213
2214     <condition id="CM33_FP_IAR">
2215       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2216       <require condition="CM33_FP"/>
2217       <require Tcompiler="IAR"/>
2218     </condition>
2219     <condition id="CM33_FP_LE_IAR">
2220       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2221       <require condition="CM33_FP_IAR"/>
2222       <require Dendian="Little-endian"/>
2223     </condition>
2224
2225     <condition id="CM33_NODSP_NOFPU_IAR">
2226       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2227       <require condition="CM33_NODSP_NOFPU"/>
2228       <require Tcompiler="IAR"/>
2229     </condition>
2230     <condition id="CM33_DSP_NOFPU_IAR">
2231       <description>CM33, DSP, no FPU, IAR Compiler</description>
2232       <require condition="CM33_DSP_NOFPU"/>
2233       <require Tcompiler="IAR"/>
2234     </condition>
2235     <condition id="CM33_NODSP_SP_IAR">
2236       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2237       <require condition="CM33_NODSP_SP"/>
2238       <require Tcompiler="IAR"/>
2239     </condition>
2240     <condition id="CM33_DSP_SP_IAR">
2241       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2242       <require condition="CM33_DSP_SP"/>
2243       <require Tcompiler="IAR"/>
2244     </condition>
2245     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2246       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2247       <require condition="CM33_NODSP_NOFPU_IAR"/>
2248       <require Dendian="Little-endian"/>
2249     </condition>
2250     <condition id="CM33_DSP_NOFPU_LE_IAR">
2251       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2252       <require condition="CM33_DSP_NOFPU_IAR"/>
2253       <require Dendian="Little-endian"/>
2254     </condition>
2255     <condition id="CM33_NODSP_SP_LE_IAR">
2256       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2257       <require condition="CM33_NODSP_SP_IAR"/>
2258       <require Dendian="Little-endian"/>
2259     </condition>
2260     <condition id="CM33_DSP_SP_LE_IAR">
2261       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2262       <require condition="CM33_DSP_SP_IAR"/>
2263       <require Dendian="Little-endian"/>
2264     </condition>
2265
2266     <condition id="CM35P_IAR">
2267       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2268       <require condition="CM35P"/>
2269       <require Tcompiler="IAR"/>
2270     </condition>
2271     <condition id="CM35P_LE_IAR">
2272       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2273       <require condition="CM35P_IAR"/>
2274       <require Dendian="Little-endian"/>
2275     </condition>
2276
2277     <condition id="CM35P_FP_IAR">
2278       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2279       <require condition="CM35P_FP"/>
2280       <require Tcompiler="IAR"/>
2281     </condition>
2282     <condition id="CM35P_FP_LE_IAR">
2283       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2284       <require condition="CM35P_FP_IAR"/>
2285       <require Dendian="Little-endian"/>
2286     </condition>
2287
2288     <condition id="CM35P_NODSP_NOFPU_IAR">
2289       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2290       <require condition="CM35P_NODSP_NOFPU"/>
2291       <require Tcompiler="IAR"/>
2292     </condition>
2293     <condition id="CM35P_DSP_NOFPU_IAR">
2294       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2295       <require condition="CM35P_DSP_NOFPU"/>
2296       <require Tcompiler="IAR"/>
2297     </condition>
2298     <condition id="CM35P_NODSP_SP_IAR">
2299       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2300       <require condition="CM35P_NODSP_SP"/>
2301       <require Tcompiler="IAR"/>
2302     </condition>
2303     <condition id="CM35P_DSP_SP_IAR">
2304       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2305       <require condition="CM35P_DSP_SP"/>
2306       <require Tcompiler="IAR"/>
2307     </condition>
2308     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2309       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2310       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2311       <require Dendian="Little-endian"/>
2312     </condition>
2313     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2314       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2315       <require condition="CM35P_DSP_NOFPU_IAR"/>
2316       <require Dendian="Little-endian"/>
2317     </condition>
2318     <condition id="CM35P_NODSP_SP_LE_IAR">
2319       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2320       <require condition="CM35P_NODSP_SP_IAR"/>
2321       <require Dendian="Little-endian"/>
2322     </condition>
2323     <condition id="CM35P_DSP_SP_LE_IAR">
2324       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2325       <require condition="CM35P_DSP_SP_IAR"/>
2326       <require Dendian="Little-endian"/>
2327     </condition>
2328
2329     <condition id="CM55_NOFPU_NOMVE_IAR">
2330       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
2331       <require condition="CM55_NOFPU_NOMVE"/>
2332       <require Tcompiler="IAR"/>
2333     </condition>
2334     <condition id="CM55_NOFPU_MVE_IAR">
2335       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
2336       <require condition="CM55_NOFPU_MVE"/>
2337       <require Tcompiler="IAR"/>
2338     </condition>
2339     <condition id="CM55_FPU_IAR">
2340       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
2341       <require condition="CM55_FPU"/>
2342       <require Tcompiler="IAR"/>
2343     </condition>
2344     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
2345       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
2346       <require condition="CM55_NOFPU_NOMVE_IAR"/>
2347       <require Dendian="Little-endian"/>
2348     </condition>
2349     <condition id="CM55_FPU_LE_IAR">
2350       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
2351       <require condition="CM55_FPU_IAR"/>
2352       <require Dendian="Little-endian"/>
2353     </condition>
2354
2355     <condition id="ARMv8MBL_IAR">
2356       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2357       <require condition="ARMv8MBL"/>
2358       <require Tcompiler="IAR"/>
2359     </condition>
2360     <condition id="ARMv8MBL_LE_IAR">
2361       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2362       <require condition="ARMv8MBL_IAR"/>
2363       <require Dendian="Little-endian"/>
2364     </condition>
2365
2366     <condition id="ARMv8MML_IAR">
2367       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2368       <require condition="ARMv8MML"/>
2369       <require Tcompiler="IAR"/>
2370     </condition>
2371     <condition id="ARMv8MML_LE_IAR">
2372       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2373       <require condition="ARMv8MML_IAR"/>
2374       <require Dendian="Little-endian"/>
2375     </condition>
2376
2377     <condition id="ARMv8MML_FP_IAR">
2378       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2379       <require condition="ARMv8MML_FP"/>
2380       <require Tcompiler="IAR"/>
2381     </condition>
2382     <condition id="ARMv8MML_FP_LE_IAR">
2383       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2384       <require condition="ARMv8MML_FP_IAR"/>
2385       <require Dendian="Little-endian"/>
2386     </condition>
2387
2388     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2389       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2390       <require condition="ARMv8MML_NODSP_NOFPU"/>
2391       <require Tcompiler="IAR"/>
2392     </condition>
2393     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2394       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2395       <require condition="ARMv8MML_DSP_NOFPU"/>
2396       <require Tcompiler="IAR"/>
2397     </condition>
2398     <condition id="ARMv8MML_NODSP_SP_IAR">
2399       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2400       <require condition="ARMv8MML_NODSP_SP"/>
2401       <require Tcompiler="IAR"/>
2402     </condition>
2403     <condition id="ARMv8MML_DSP_SP_IAR">
2404       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2405       <require condition="ARMv8MML_DSP_SP"/>
2406       <require Tcompiler="IAR"/>
2407     </condition>
2408     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2409       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2410       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2411       <require Dendian="Little-endian"/>
2412     </condition>
2413     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2414       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2415       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2416       <require Dendian="Little-endian"/>
2417     </condition>
2418     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2419       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2420       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2421       <require Dendian="Little-endian"/>
2422     </condition>
2423     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2424       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2425       <require condition="ARMv8MML_DSP_SP_IAR"/>
2426       <require Dendian="Little-endian"/>
2427     </condition>
2428
2429     <!-- conditions selecting single devices and CMSIS Core -->
2430     <condition id="ARMCM0 CMSIS">
2431       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2432       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2433       <require Cclass="CMSIS" Cgroup="CORE"/>
2434     </condition>
2435
2436     <condition id="ARMCM0+ CMSIS">
2437       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2438       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2439       <require Cclass="CMSIS" Cgroup="CORE"/>
2440     </condition>
2441
2442     <condition id="ARMCM1 CMSIS">
2443       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2444       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2445       <require Cclass="CMSIS" Cgroup="CORE"/>
2446     </condition>
2447
2448     <condition id="ARMCM3 CMSIS">
2449       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2450       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2451       <require Cclass="CMSIS" Cgroup="CORE"/>
2452     </condition>
2453
2454     <condition id="ARMCM4 CMSIS">
2455       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2456       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2457       <require Cclass="CMSIS" Cgroup="CORE"/>
2458     </condition>
2459
2460     <condition id="ARMCM7 CMSIS">
2461       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2462       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2463       <require Cclass="CMSIS" Cgroup="CORE"/>
2464     </condition>
2465
2466     <condition id="ARMCM23 CMSIS">
2467       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2468       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2469       <require Cclass="CMSIS" Cgroup="CORE"/>
2470     </condition>
2471
2472     <condition id="ARMCM33 CMSIS">
2473       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2474       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2475       <require Cclass="CMSIS" Cgroup="CORE"/>
2476     </condition>
2477
2478     <condition id="ARMCM35P CMSIS">
2479       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2480       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2481       <require Cclass="CMSIS" Cgroup="CORE"/>
2482     </condition>
2483
2484     <condition id="ARMCM55 CMSIS">
2485       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2486       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2487       <require Cclass="CMSIS" Cgroup="CORE"/>
2488     </condition>
2489
2490     <condition id="ARMSC000 CMSIS">
2491       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2492       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2493       <require Cclass="CMSIS" Cgroup="CORE"/>
2494     </condition>
2495
2496     <condition id="ARMSC300 CMSIS">
2497       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2498       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2499       <require Cclass="CMSIS" Cgroup="CORE"/>
2500     </condition>
2501
2502     <condition id="ARMv8MBL CMSIS">
2503       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2504       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2505       <require Cclass="CMSIS" Cgroup="CORE"/>
2506     </condition>
2507
2508     <condition id="ARMv8MML CMSIS">
2509       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2510       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2511       <require Cclass="CMSIS" Cgroup="CORE"/>
2512     </condition>
2513
2514     <condition id="ARMv81MML CMSIS">
2515       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2516       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2517       <require Cclass="CMSIS" Cgroup="CORE"/>
2518     </condition>
2519
2520     <condition id="ARMCA5 CMSIS">
2521       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2522       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2523       <require Cclass="CMSIS" Cgroup="CORE"/>
2524     </condition>
2525
2526     <condition id="ARMCA7 CMSIS">
2527       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2528       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2529       <require Cclass="CMSIS" Cgroup="CORE"/>
2530     </condition>
2531
2532     <condition id="ARMCA9 CMSIS">
2533       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2534       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2535       <require Cclass="CMSIS" Cgroup="CORE"/>
2536     </condition>
2537
2538     <!-- CMSIS DSP -->
2539     <condition id="CMSIS DSP">
2540       <description>Components required for DSP</description>
2541       <require condition="ARMv6_7_8-M Device"/>
2542       <require condition="ARMCC GCC IAR"/>
2543       <require Cclass="CMSIS" Cgroup="CORE"/>
2544     </condition>
2545
2546     <!-- CMSIS NN -->
2547     <condition id="CMSIS NN">
2548       <description>Components required for NN</description>
2549       <require Cclass="CMSIS" Cgroup="DSP"/>
2550     </condition>
2551
2552     <!-- RTOS RTX -->
2553     <condition id="RTOS RTX">
2554       <description>Components required for RTOS RTX</description>
2555       <require condition="ARMv6_7-M Device"/>
2556       <require condition="ARMCC GCC IAR"/>
2557       <require Cclass="Device" Cgroup="Startup"/>
2558       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2559     </condition>
2560     <condition id="RTOS RTX IFX">
2561       <description>Components required for RTOS RTX IFX</description>
2562       <require condition="ARMv6_7-M Device"/>
2563       <require condition="ARMCC GCC IAR"/>
2564       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2565       <require Cclass="Device" Cgroup="Startup"/>
2566       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2567     </condition>
2568     <condition id="RTOS RTX5">
2569       <description>Components required for RTOS RTX5</description>
2570       <require condition="ARMv6_7_8-M Device"/>
2571       <require condition="ARMCC GCC IAR"/>
2572       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2573     </condition>
2574     <condition id="RTOS2 RTX5">
2575       <description>Components required for RTOS2 RTX5</description>
2576       <require condition="ARMv6_7_8-M Device"/>
2577       <require condition="ARMCC GCC IAR"/>
2578       <require Cclass="CMSIS"  Cgroup="CORE"/>
2579       <require Cclass="Device" Cgroup="Startup"/>
2580     </condition>
2581     <condition id="RTOS2 RTX5 v7-A">
2582       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2583       <require condition="ARMv7-A Device"/>
2584       <require condition="ARMCC GCC IAR"/>
2585       <require Cclass="CMSIS"  Cgroup="CORE"/>
2586       <require Cclass="Device" Cgroup="Startup"/>
2587       <require Cclass="Device" Cgroup="OS Tick"/>
2588       <require Cclass="Device" Cgroup="IRQ Controller"/>
2589     </condition>
2590     <condition id="RTOS2 RTX5 NS">
2591       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2592       <require condition="ARMv8-M Device"/>
2593       <require condition="TZ Non-secure"/>
2594       <require condition="ARMCC GCC IAR"/>
2595       <require Cclass="CMSIS"  Cgroup="CORE"/>
2596       <require Cclass="Device" Cgroup="Startup"/>
2597     </condition>
2598
2599     <!-- OS Tick -->
2600     <condition id="OS Tick PTIM">
2601       <description>Components required for OS Tick Private Timer</description>
2602       <require condition="CA5_CA9"/>
2603       <require Cclass="Device" Cgroup="IRQ Controller"/>
2604     </condition>
2605
2606     <condition id="OS Tick GTIM">
2607       <description>Components required for OS Tick Generic Physical Timer</description>
2608       <require condition="CA7"/>
2609       <require Cclass="Device" Cgroup="IRQ Controller"/>
2610     </condition>
2611
2612   </conditions>
2613
2614   <components>
2615     <!-- CMSIS-Core component -->
2616     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2617       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2618       <files>
2619         <!-- CPU independent -->
2620         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2621         <file category="include" name="CMSIS/Core/Include/"/>
2622         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2623         <!-- Code template -->
2624         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2625         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2626       </files>
2627     </component>
2628
2629     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.0"  condition="ARMv7-A Device" >
2630       <description>CMSIS-CORE for Cortex-A</description>
2631       <files>
2632         <!-- CPU independent -->
2633         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2634         <file category="include" name="CMSIS/Core_A/Include/"/>
2635       </files>
2636     </component>
2637
2638     <!-- CMSIS-Startup components -->
2639     <!-- Cortex-M0 -->
2640     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
2641       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2642       <files>
2643         <!-- include folder / device header file -->
2644         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2645         <!-- startup / system file -->
2646         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2647         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2648         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2649         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2650         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2651       </files>
2652     </component>
2653     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2654       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2655       <files>
2656         <!-- include folder / device header file -->
2657         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2658         <!-- startup / system file -->
2659         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2660         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.1.0" attr="config" condition="GCC"/>
2661         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2662         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2663         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2664       </files>
2665     </component>
2666
2667     <!-- Cortex-M0+ -->
2668     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
2669       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2670       <files>
2671         <!-- include folder / device header file -->
2672         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2673         <!-- startup / system file -->
2674         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2675         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2676         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2677         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2678         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2679       </files>
2680     </component>
2681     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2682       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2683       <files>
2684         <!-- include folder / device header file -->
2685         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2686         <!-- startup / system file -->
2687         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2688         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.1.0" attr="config" condition="GCC"/>
2689         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2690         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2691         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2692       </files>
2693     </component>
2694
2695     <!-- Cortex-M1 -->
2696     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
2697       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2698       <files>
2699         <!-- include folder / device header file -->
2700         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2701         <!-- startup / system file -->
2702         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2703         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2704         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2705         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2706         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2707       </files>
2708     </component>
2709     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2710       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2711       <files>
2712         <!-- include folder / device header file -->
2713         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2714         <!-- startup / system file -->
2715         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2716         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.1.0" attr="config" condition="GCC"/>
2717         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2718         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2719         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2720       </files>
2721     </component>
2722
2723     <!-- Cortex-M3 -->
2724     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
2725       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2726       <files>
2727         <!-- include folder / device header file -->
2728         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2729         <!-- startup / system file -->
2730         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2731         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2732         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2733         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2734         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2735       </files>
2736     </component>
2737     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2738       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2739       <files>
2740         <!-- include folder / device header file -->
2741         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2742         <!-- startup / system file -->
2743         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2744         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.1.0" attr="config" condition="GCC"/>
2745         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2746         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2747         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2748       </files>
2749     </component>
2750
2751     <!-- Cortex-M4 -->
2752     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
2753       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2754       <files>
2755         <!-- include folder / device header file -->
2756         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2757         <!-- startup / system file -->
2758         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2759         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2760         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2761         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2762        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2763       </files>
2764     </component>
2765     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2766       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2767       <files>
2768         <!-- include folder / device header file -->
2769         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2770         <!-- startup / system file -->
2771         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2772         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.1.0" attr="config" condition="GCC"/>
2773         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2774         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2775         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2776       </files>
2777     </component>
2778
2779     <!-- Cortex-M7 -->
2780     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
2781       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2782       <files>
2783         <!-- include folder / device header file -->
2784         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2785         <!-- startup / system file -->
2786         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2787         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2788         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2789         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2790         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2791       </files>
2792     </component>
2793     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2794       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2795       <files>
2796         <!-- include folder / device header file -->
2797         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2798         <!-- startup / system file -->
2799         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2800         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.1.0" attr="config" condition="GCC"/>
2801         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2802         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2803         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2804       </files>
2805     </component>
2806
2807     <!-- Cortex-M23 -->
2808     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
2809       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2810       <files>
2811         <!-- include folder / device header file -->
2812         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2813         <!-- startup / system file -->
2814         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
2815         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2816         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2817         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2818         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2819         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2820         <!-- SAU configuration -->
2821         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2822       </files>
2823     </component>
2824     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
2825       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2826       <files>
2827         <!-- include folder / device header file -->
2828         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2829         <!-- startup / system file -->
2830         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2831         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2832         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2833         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2834         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
2835         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2836         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
2837         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2838         <!-- SAU configuration -->
2839         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2840       </files>
2841     </component>
2842
2843     <!-- Cortex-M33 -->
2844     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
2845       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2846       <files>
2847         <!-- include folder / device header file -->
2848         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2849         <!-- startup / system file -->
2850         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
2851         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2852         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2853         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2854         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2855         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2856         <!-- SAU configuration -->
2857         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2858       </files>
2859     </component>
2860     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
2861       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2862       <files>
2863         <!-- include folder / device header file -->
2864         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2865         <!-- startup / system file -->
2866         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2867         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2868         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2869         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2870         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.2.0" attr="config" condition="GCC"/>
2871         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2872         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
2873         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2874         <!-- SAU configuration -->
2875         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2876       </files>
2877     </component>
2878
2879     <!-- Cortex-M35P -->
2880     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
2881       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2882       <files>
2883         <!-- include folder / device header file -->
2884         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2885         <!-- startup / system file -->
2886         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
2887         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2888         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2889         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2890         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2891         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2892         <!-- SAU configuration -->
2893         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2894       </files>
2895     </component>
2896     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
2897       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2898       <files>
2899         <!-- include folder / device header file -->
2900         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2901         <!-- startup / system file -->
2902         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2903         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2904         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2905         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2906         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.2.0" attr="config" condition="GCC"/>
2907         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2908         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
2909         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2910         <!-- SAU configuration -->
2911         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2912       </files>
2913     </component>
2914
2915     <!-- Cortex-M55 -->
2916     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
2917       <description>System and Startup for Generic Cortex-M55 device</description>
2918       <files>
2919         <!-- include folder / device header file -->
2920         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2921         <!-- startup / system file -->
2922         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
2923         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2924         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2925         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2926         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2927         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.0" attr="config"/>
2928         <!-- SAU configuration -->
2929         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2930       </files>
2931     </component>
2932
2933     <!-- Cortex-SC000 -->
2934     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2935       <description>System and Startup for Generic Arm SC000 device</description>
2936       <files>
2937         <!-- include folder / device header file -->
2938         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2939         <!-- startup / system file -->
2940         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2941         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2942         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2943         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2944         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2945       </files>
2946     </component>
2947     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2948       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2949       <files>
2950         <!-- include folder / device header file -->
2951         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2952         <!-- startup / system file -->
2953         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2954         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.1.0" attr="config" condition="GCC"/>
2955         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2956         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2957         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2958       </files>
2959     </component>
2960
2961     <!-- Cortex-SC300 -->
2962     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2963       <description>System and Startup for Generic Arm SC300 device</description>
2964       <files>
2965         <!-- include folder / device header file -->
2966         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2967         <!-- startup / system file -->
2968         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2969         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2970         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2971         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2972         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2973       </files>
2974     </component>
2975     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2976       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2977       <files>
2978         <!-- include folder / device header file -->
2979         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2980         <!-- startup / system file -->
2981         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2982         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.1.0" attr="config" condition="GCC"/>
2983         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2984         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2985         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2986       </files>
2987     </component>
2988
2989     <!-- ARMv8MBL -->
2990     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2991       <description>System and Startup for Generic Armv8-M Baseline device</description>
2992       <files>
2993         <!-- include folder / device header file -->
2994         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2995         <!-- startup / system file -->
2996         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2997         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2998         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2999         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
3000         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
3001         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
3002         <!-- SAU configuration -->
3003         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
3004       </files>
3005     </component>
3006     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
3007       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
3008       <files>
3009         <!-- include folder / device header file -->
3010         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
3011         <!-- startup / system file -->
3012         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
3013         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
3014         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
3015         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
3016         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
3017         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
3018         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
3019         <!-- SAU configuration -->
3020         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
3021       </files>
3022     </component>
3023
3024     <!-- ARMv8MML -->
3025     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
3026       <description>System and Startup for Generic Armv8-M Mainline device</description>
3027       <files>
3028         <!-- include folder / device header file -->
3029         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
3030         <!-- startup / system file -->
3031         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
3032         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
3033         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
3034         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
3035         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
3036         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
3037         <!-- SAU configuration -->
3038         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
3039       </files>
3040     </component>
3041     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
3042       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
3043       <files>
3044         <!-- include folder / device header file -->
3045         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
3046         <!-- startup / system file -->
3047         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
3048         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
3049         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
3050         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
3051         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.2.0" attr="config" condition="GCC"/>
3052         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
3053         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
3054         <!-- SAU configuration -->
3055         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
3056       </files>
3057     </component>
3058
3059     <!-- ARMv81MML -->
3060     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
3061       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
3062       <files>
3063         <!-- include folder / device header file -->
3064         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
3065         <!-- startup / system file -->
3066         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
3067         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
3068         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
3069         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
3070         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
3071         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
3072         <!-- SAU configuration -->
3073         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
3074       </files>
3075     </component>
3076
3077     <!-- Cortex-A5 -->
3078     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
3079       <description>System and Startup for Generic Arm Cortex-A5 device</description>
3080       <files>
3081         <!-- include folder / device header file -->
3082         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
3083         <!-- startup / system / mmu files -->
3084         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3085         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3086         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3087         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3088         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
3089         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3090         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3091         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3092         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3093         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
3094         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
3095         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
3096
3097       </files>
3098     </component>
3099
3100     <!-- Cortex-A7 -->
3101     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3102       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3103       <files>
3104         <!-- include folder / device header file -->
3105         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3106         <!-- startup / system / mmu files -->
3107         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3108         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3109         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3110         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3111         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3112         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3113         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3114         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3115         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3116         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
3117         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
3118         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
3119       </files>
3120     </component>
3121
3122     <!-- Cortex-A9 -->
3123     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3124       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3125       <files>
3126         <!-- include folder / device header file -->
3127         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3128         <!-- startup / system / mmu files -->
3129         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3130         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3131         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3132         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3133         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3134         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3135         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3136         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3137         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3138         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
3139         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3140         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
3141       </files>
3142     </component>
3143
3144     <!-- IRQ Controller -->
3145     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3146       <description>IRQ Controller implementation using GIC</description>
3147       <files>
3148         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3149       </files>
3150     </component>
3151
3152     <!-- OS Tick -->
3153     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3154       <description>OS Tick implementation using Private Timer</description>
3155       <files>
3156         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3157       </files>
3158     </component>
3159
3160     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3161       <description>OS Tick implementation using Generic Physical Timer</description>
3162       <files>
3163         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3164       </files>
3165     </component>
3166
3167     <!-- CMSIS-DSP component -->
3168     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.8.0" condition="CMSIS DSP">
3169       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3170       <files>
3171         <!-- CPU independent -->
3172         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3173         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3174
3175         <!-- CPU and Compiler dependent -->
3176         <!-- ARMCC -->
3177         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3178         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3179         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3180         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3181         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3182         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3183         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3184         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3185         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3186         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3187         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3188         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3189         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3190         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3191         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3192         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3193
3194         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3195         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3196         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3197         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3198         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3199         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3200         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3201         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3202         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3203         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3204         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3205         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3206         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3207         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3208         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3209         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3210
3211         <!-- GCC -->
3212         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3213         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3214         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3215         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3216         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3217         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3218         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3219         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3220
3221         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3222         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3223         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3224         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3225         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3226         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3227         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3228         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3229         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3230         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3231         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3232         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3233         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3234         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3235         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3236         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3237
3238         <!-- IAR -->
3239         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3240         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3241         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3242         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3243         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3244         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3245         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3246         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3247         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3248         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3249         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3250         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3251         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3252         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3253         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3254         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3255
3256         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3257         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3258         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3259         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3260         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3261         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3262         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3263         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3264         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3265         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3266         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3267         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3268         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3269         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3270         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3271         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3272
3273       </files>
3274     </component>
3275     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.9.0-dev" isDefaultVariant="true" condition="CMSIS DSP">
3276       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3277       <files>
3278         <!-- CPU independent -->
3279         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
3280         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
3281         <file category="header"   name="CMSIS/DSP/Include/arm_math_f16.h"/>
3282         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables.h"/>
3283         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables_f16.h"/>
3284         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs.h"/>
3285         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs_f16.h"/>
3286
3287         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
3288         <file category="include"  name="CMSIS/DSP/Include/"/>
3289
3290         <!-- DSP sources (core) -->
3291         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3292
3293         <file category="source"   name="CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c"/>
3294
3295         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
3296         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3297         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3298         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3299         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
3300         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3301         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3302         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3303         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3304         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3305         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
3306         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3307
3308         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c"/>
3309
3310         <!-- DSP sources F16 versions -->
3311         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c"/>
3312         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c"/>
3313         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c"/>
3314         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTablesF16.c"/>
3315         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c"/>
3316         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c"/>
3317         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c"/>
3318         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c"/>
3319         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c"/>
3320         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c"/>
3321         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c"/>
3322         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c"/>
3323         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c"/>
3324
3325         <!-- Compute Library for Cortex-A -->
3326         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
3327         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
3328       </files>
3329     </component>
3330
3331     <!-- CMSIS-NN component -->
3332     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.4.0" condition="CMSIS NN">
3333       <description>CMSIS-NN Neural Network Library</description>
3334       <files>
3335         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3336         <file category="header" name="CMSIS/NN/Include/arm_nn_types.h"/>
3337         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3338         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
3339         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
3340
3341         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3342         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3343         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3344         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
3345         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
3346         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3347         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
3348         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3349         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c"/>
3350         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3351         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3352         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
3353         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
3354         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
3355         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
3356         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
3357         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
3358         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3359         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3360         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
3361         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c"/>
3362         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3363         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3364         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
3365         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3366         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3367         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
3368         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
3369         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
3370         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
3371         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c"/>
3372         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
3373         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
3374         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3375         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
3376         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
3377         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
3378         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3379         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3380         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3381         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3382         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
3383         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3384         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3385         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
3386         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c"/>
3387         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
3388         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
3389         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
3390         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c"/>
3391         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
3392         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
3393         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3394         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c"/>
3395         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3396         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
3397         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3398         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
3399         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
3400         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3401         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3402         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3403         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3404         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3405         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3406         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3407         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
3408         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
3409         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3410         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
3411       </files>
3412     </component>
3413
3414     <!-- CMSIS-RTOS Keil RTX component -->
3415     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3416       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3417       <RTE_Components_h>
3418         <!-- the following content goes into file 'RTE_Components.h' -->
3419         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3420         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3421       </RTE_Components_h>
3422       <files>
3423         <!-- CPU independent -->
3424         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3425         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3426         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3427
3428         <!-- RTX templates -->
3429         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3430         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3431         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3432         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3433         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3434         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3435         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3436         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3437         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3438         <!-- tool-chain specific template file -->
3439         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3440         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3441         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3442
3443         <!-- CPU and Compiler dependent -->
3444         <!-- ARMCC -->
3445         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3446         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3447         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3448         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3449         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3450         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3451         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3452         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3453         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3454         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3455         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3456         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3457         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3458         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3459         <!-- GCC -->
3460         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3461         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3462         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3463         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3464         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3465         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3466         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3467         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3468         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3469         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3470         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3471         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3472         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3473         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3474         <!-- IAR -->
3475         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3476         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3477         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3478         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3479         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3480         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3481         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3482         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3483         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3484         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3485         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3486         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3487         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3488         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3489       </files>
3490     </component>
3491     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3492     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3493       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3494       <RTE_Components_h>
3495         <!-- the following content goes into file 'RTE_Components.h' -->
3496         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3497         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3498       </RTE_Components_h>
3499       <files>
3500         <!-- CPU independent -->
3501         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3502         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3503         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3504
3505         <!-- RTX templates -->
3506         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3507         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3508         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3509         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3510         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3511         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3512         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3513         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3514         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3515         <!-- tool-chain specific template file -->
3516         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3517         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3518         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3519
3520         <!-- CPU and Compiler dependent -->
3521         <!-- ARMCC -->
3522         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3523         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3524         <!-- GCC -->
3525         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3526         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3527         <!-- IAR -->
3528       </files>
3529     </component>
3530
3531     <!-- CMSIS-RTOS Keil RTX5 component -->
3532     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3533       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3534       <RTE_Components_h>
3535         <!-- the following content goes into file 'RTE_Components.h' -->
3536         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3537         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3538       </RTE_Components_h>
3539       <files>
3540         <!-- RTX header file -->
3541         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3542         <!-- RTX compatibility module for API V1 -->
3543         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3544       </files>
3545     </component>
3546
3547     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3548     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3549       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3550       <RTE_Components_h>
3551         <!-- the following content goes into file 'RTE_Components.h' -->
3552         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3553         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3554       </RTE_Components_h>
3555       <files>
3556         <!-- RTX documentation -->
3557         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3558
3559         <!-- RTX header files -->
3560         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3561
3562         <!-- RTX configuration -->
3563         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3564         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3565
3566         <!-- RTX templates -->
3567         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3568         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3569         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3570         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3571         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3572         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3573         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3574         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3575         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3576         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3577
3578         <!-- RTX library configuration -->
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3580
3581         <!-- RTX libraries (CPU and Compiler dependent) -->
3582         <!-- ARMCC -->
3583         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3584         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3585         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3586         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3587         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3588         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3589         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3590         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3591         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3592         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3593         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3594         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3595         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3596         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3597         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3598         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3599         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3600         <!-- GCC -->
3601         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3602         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3603         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3604         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3605         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3606         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3607         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3608         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3609         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3610         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3611         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3612         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3613         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3614         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3615         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3616         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3617         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3618         <!-- IAR -->
3619         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3620         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3621         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3622         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3623         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3624         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3625         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3626         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3627         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3628         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3629         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3630         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3631         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3632         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3633         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3634         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3635         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3636       </files>
3637     </component>
3638     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3639       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3640       <RTE_Components_h>
3641         <!-- the following content goes into file 'RTE_Components.h' -->
3642         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3643         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3644         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3645       </RTE_Components_h>
3646       <files>
3647         <!-- RTX documentation -->
3648         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3649
3650         <!-- RTX header files -->
3651         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3652
3653         <!-- RTX configuration -->
3654         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3655         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3656
3657         <!-- RTX templates -->
3658         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3659         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3660         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3661         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3662         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3663         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3664         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3665         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3666         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3667         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3668
3669         <!-- RTX library configuration -->
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3671
3672         <!-- RTX libraries (CPU and Compiler dependent) -->
3673         <!-- ARMCC -->
3674         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3675         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3676         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3677         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3678         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3679         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3680         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3681         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3682         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3683         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3684         <!-- GCC -->
3685         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3686         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3687         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3688         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3689         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3690         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3691         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3692         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3693         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3694         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3695         <!-- IAR -->
3696         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3697         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3698         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3699         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3700         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3701         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3702         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3703         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3704         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3705         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3706       </files>
3707     </component>
3708     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3709       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3710       <RTE_Components_h>
3711         <!-- the following content goes into file 'RTE_Components.h' -->
3712         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3713         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3714         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3715       </RTE_Components_h>
3716       <files>
3717         <!-- RTX documentation -->
3718         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3719
3720         <!-- RTX header files -->
3721         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3722
3723         <!-- RTX configuration -->
3724         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3725         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3726
3727         <!-- RTX templates -->
3728         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3729         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3730         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3731         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3732         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3733         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3734         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3735         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3736         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3737         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3738
3739         <!-- RTX sources (core) -->
3740         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3741         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3742         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3743         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3745         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3747         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3748         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3752         <!-- RTX sources (library configuration) -->
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3754         <!-- RTX sources (handlers ARMCC) -->
3755         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM0_ARMCC"/>
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM1_ARMCC"/>
3757         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM3_ARMCC"/>
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM4_ARMCC"/>
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM4_FP_ARMCC"/>
3760         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM7_ARMCC"/>
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM7_FP_ARMCC"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
3763         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
3764         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
3765         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_ARMCC"/>
3766         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_FP_ARMCC"/>
3767         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3768         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3769         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3770         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
3771         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
3772         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
3773         <!-- RTX sources (handlers GCC) -->
3774         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM0_GCC"/>
3775         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM1_GCC"/>
3776         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM3_GCC"/>
3777         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM4_GCC"/>
3778         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM4_FP_GCC"/>
3779         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM7_GCC"/>
3780         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM7_FP_GCC"/>
3781         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3782         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3783         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3784         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3785         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3786         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3787         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3788         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3789         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3790         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3791         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3792         <!-- RTX sources (handlers IAR) -->
3793         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM0_IAR"/>
3794         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM1_IAR"/>
3795         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM3_IAR"/>
3796         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM4_IAR"/>
3797         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM4_FP_IAR"/>
3798         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM7_IAR"/>
3799         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM7_FP_IAR"/>
3800         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3801         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3802         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3803         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3804         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3805         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3806         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3807         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3808         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3809         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3810         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3811         <!-- OS Tick (SysTick) -->
3812         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3813       </files>
3814     </component>
3815     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3816       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3817       <RTE_Components_h>
3818         <!-- the following content goes into file 'RTE_Components.h' -->
3819         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3820         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3821         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3822       </RTE_Components_h>
3823       <files>
3824         <!-- RTX documentation -->
3825         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3826
3827         <!-- RTX header files -->
3828         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3829
3830         <!-- RTX configuration -->
3831         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3832         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3833
3834         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3835
3836         <!-- RTX templates -->
3837         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3838         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3839         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3840         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3841         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3842         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3843         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3844         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3845         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3846         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3847
3848         <!-- RTX sources (core) -->
3849         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3850         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3851         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3852         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3853         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3854         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3855         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3856         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3857         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3858         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3859         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3860         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3861         <!-- RTX sources (library configuration) -->
3862         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3863         <!-- RTX sources (handlers ARMCC) -->
3864         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3865         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3866         <!-- RTX sources (handlers GCC) -->
3867         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3868         <!-- RTX sources (handlers IAR) -->
3869         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3870       </files>
3871     </component>
3872     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3873       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3874       <RTE_Components_h>
3875         <!-- the following content goes into file 'RTE_Components.h' -->
3876         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3877         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3878         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3879         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3880       </RTE_Components_h>
3881       <files>
3882         <!-- RTX documentation -->
3883         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3884
3885         <!-- RTX header files -->
3886         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3887
3888         <!-- RTX configuration -->
3889         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3890         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3891
3892         <!-- RTX templates -->
3893         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3894         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3895         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3896         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3897         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3898         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3899         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3900         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3901         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3902         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3903
3904         <!-- RTX sources (core) -->
3905         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3906         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3907         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3908         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3909         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3910         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3911         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3912         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3913         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3914         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3915         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3916         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3917         <!-- RTX sources (library configuration) -->
3918         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3919         <!-- RTX sources (ARMCC handlers) -->
3920         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
3921         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
3922         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
3923         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_ARMCC"/>
3924         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_FP_ARMCC"/>
3925         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_ARMCC"/>
3926         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_ARMCC"/>
3927         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_ARMCC"/>
3928         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
3929         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
3930         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
3931         <!-- RTX sources (GCC handlers) -->
3932         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3933         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3934         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_FP_GCC"/>
3935         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3936         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_FP_GCC"/>
3937         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_GCC"/>
3938         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_GCC"/>
3939         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_GCC"/>
3940         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3941         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3942         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_FP_GCC"/>
3943         <!-- RTX sources (IAR handlers) -->
3944         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="CM23_IAR"/>
3945         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_IAR"/>
3946         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_FP_IAR"/>
3947         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_IAR"/>
3948         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_FP_IAR"/>
3949         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3950         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_MVE_IAR"/>
3951         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_FPU_IAR"/>
3952         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="ARMv8MBL_IAR"/>
3953         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_IAR"/>
3954         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_FP_IAR"/>
3955         <!-- OS Tick (SysTick) -->
3956         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3957       </files>
3958     </component>
3959
3960     <!-- CMSIS-Driver Custom components -->
3961     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3962       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3963       <files>
3964         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3965         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3966       </files>
3967     </component>
3968     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3969       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3970       <files>
3971         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3972         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3973       </files>
3974     </component>
3975     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3976       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3977       <files>
3978         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3979         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3980       </files>
3981     </component>
3982     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3983       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3984       <files>
3985         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3986         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3987       </files>
3988     </component>
3989     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3990       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3991       <files>
3992         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3993         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3994       </files>
3995     </component>
3996     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3997       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3998       <files>
3999         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
4000         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
4001       </files>
4002     </component>
4003     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
4004       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
4005       <files>
4006         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
4007         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
4008       </files>
4009     </component>
4010     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
4011       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
4012       <files>
4013         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
4014         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
4015       </files>
4016     </component>
4017     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
4018       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
4019       <files>
4020         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
4021         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
4022         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
4023         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
4024       </files>
4025     </component>
4026     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
4027       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
4028       <files>
4029         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
4030         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
4031       </files>
4032     </component>
4033     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
4034       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
4035       <files>
4036         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
4037         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
4038       </files>
4039     </component>
4040     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
4041       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
4042       <files>
4043         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
4044         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
4045       </files>
4046     </component>
4047     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
4048       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
4049       <files>
4050         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
4051         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
4052       </files>
4053     </component>
4054     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
4055       <description>Access to #include Driver_WiFi.h file</description>
4056       <files>
4057         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
4058         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
4059       </files>
4060     </component>
4061
4062     <!-- VIO components -->
4063     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
4064       <description>Virtual I/O custom implementation template</description>
4065       <files>
4066         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
4067       </files>
4068     </component>
4069     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
4070       <description>Virtual I/O implementation using memory only</description>
4071       <files>
4072         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
4073       </files>
4074     </component>
4075
4076   </components>
4077
4078   <boards>
4079     <board name="uVision Simulator" vendor="Keil">
4080       <description>uVision Simulator</description>
4081       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
4082       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
4083       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
4084       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
4085       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
4086       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
4087       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4088       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4089       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4090       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4091       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4092       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4093       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4094       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4095       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4096       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4097       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4098       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4099       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4100       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4101       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4102       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4103       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4104       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4105       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4106       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4107     </board>
4108
4109     <board name="EWARM Simulator" vendor="IAR">
4110       <description>EWARM Simulator</description>
4111       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
4112       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
4113       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
4114       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
4115       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
4116       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
4117       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4118       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4119       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4120       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4121       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4122       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4123       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4124       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4125       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4126       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4127       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4128       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4129       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4130       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4131       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4132       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4133       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4134       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4135       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4136       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4137     </board>
4138   </boards>
4139
4140   <examples>
4141     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
4142       <description>DSP_Lib Bayes example</description>
4143       <board name="uVision Simulator" vendor="Keil"/>
4144       <project>
4145         <environment name="uv" load="arm_bayes_example.uvprojx"/>
4146       </project>
4147       <attributes>
4148         <component Cclass="CMSIS" Cgroup="CORE"/>
4149         <component Cclass="CMSIS" Cgroup="DSP"/>
4150         <component Cclass="Device" Cgroup="Startup"/>
4151         <category>Getting Started</category>
4152       </attributes>
4153     </example>
4154
4155     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
4156       <description>DSP_Lib Class Marks example</description>
4157       <board name="uVision Simulator" vendor="Keil"/>
4158       <project>
4159         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
4160       </project>
4161       <attributes>
4162         <component Cclass="CMSIS" Cgroup="CORE"/>
4163         <component Cclass="CMSIS" Cgroup="DSP"/>
4164         <component Cclass="Device" Cgroup="Startup"/>
4165         <category>Getting Started</category>
4166       </attributes>
4167     </example>
4168
4169     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
4170       <description>DSP_Lib Convolution example</description>
4171       <board name="uVision Simulator" vendor="Keil"/>
4172       <project>
4173         <environment name="uv" load="arm_convolution_example.uvprojx"/>
4174       </project>
4175       <attributes>
4176         <component Cclass="CMSIS" Cgroup="CORE"/>
4177         <component Cclass="CMSIS" Cgroup="DSP"/>
4178         <component Cclass="Device" Cgroup="Startup"/>
4179         <category>Getting Started</category>
4180       </attributes>
4181     </example>
4182
4183     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
4184       <description>DSP_Lib Dotproduct example</description>
4185       <board name="uVision Simulator" vendor="Keil"/>
4186       <project>
4187         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
4188       </project>
4189       <attributes>
4190         <component Cclass="CMSIS" Cgroup="CORE"/>
4191         <component Cclass="CMSIS" Cgroup="DSP"/>
4192         <component Cclass="Device" Cgroup="Startup"/>
4193         <category>Getting Started</category>
4194       </attributes>
4195     </example>
4196
4197     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
4198       <description>DSP_Lib FFT Bin example</description>
4199       <board name="uVision Simulator" vendor="Keil"/>
4200       <project>
4201         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
4202       </project>
4203       <attributes>
4204         <component Cclass="CMSIS" Cgroup="CORE"/>
4205         <component Cclass="CMSIS" Cgroup="DSP"/>
4206         <component Cclass="Device" Cgroup="Startup"/>
4207         <category>Getting Started</category>
4208       </attributes>
4209     </example>
4210
4211     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4212       <description>DSP_Lib FIR example</description>
4213       <board name="uVision Simulator" vendor="Keil"/>
4214       <project>
4215         <environment name="uv" load="arm_fir_example.uvprojx"/>
4216       </project>
4217       <attributes>
4218         <component Cclass="CMSIS" Cgroup="CORE"/>
4219         <component Cclass="CMSIS" Cgroup="DSP"/>
4220         <component Cclass="Device" Cgroup="Startup"/>
4221         <category>Getting Started</category>
4222       </attributes>
4223     </example>
4224
4225     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4226       <description>DSP_Lib Graphic Equalizer example</description>
4227       <board name="uVision Simulator" vendor="Keil"/>
4228       <project>
4229         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4230       </project>
4231       <attributes>
4232         <component Cclass="CMSIS" Cgroup="CORE"/>
4233         <component Cclass="CMSIS" Cgroup="DSP"/>
4234         <component Cclass="Device" Cgroup="Startup"/>
4235         <category>Getting Started</category>
4236       </attributes>
4237     </example>
4238
4239     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4240       <description>DSP_Lib Linear Interpolation example</description>
4241       <board name="uVision Simulator" vendor="Keil"/>
4242       <project>
4243         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4244       </project>
4245       <attributes>
4246         <component Cclass="CMSIS" Cgroup="CORE"/>
4247         <component Cclass="CMSIS" Cgroup="DSP"/>
4248         <component Cclass="Device" Cgroup="Startup"/>
4249         <category>Getting Started</category>
4250       </attributes>
4251     </example>
4252
4253     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4254       <description>DSP_Lib Matrix example</description>
4255       <board name="uVision Simulator" vendor="Keil"/>
4256       <project>
4257         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4258       </project>
4259       <attributes>
4260         <component Cclass="CMSIS" Cgroup="CORE"/>
4261         <component Cclass="CMSIS" Cgroup="DSP"/>
4262         <component Cclass="Device" Cgroup="Startup"/>
4263         <category>Getting Started</category>
4264       </attributes>
4265     </example>
4266
4267     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4268       <description>DSP_Lib Signal Convergence example</description>
4269       <board name="uVision Simulator" vendor="Keil"/>
4270       <project>
4271         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4272       </project>
4273       <attributes>
4274         <component Cclass="CMSIS" Cgroup="CORE"/>
4275         <component Cclass="CMSIS" Cgroup="DSP"/>
4276         <component Cclass="Device" Cgroup="Startup"/>
4277         <category>Getting Started</category>
4278       </attributes>
4279     </example>
4280
4281     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4282       <description>DSP_Lib Sinus/Cosinus example</description>
4283       <board name="uVision Simulator" vendor="Keil"/>
4284       <project>
4285         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4286       </project>
4287       <attributes>
4288         <component Cclass="CMSIS" Cgroup="CORE"/>
4289         <component Cclass="CMSIS" Cgroup="DSP"/>
4290         <component Cclass="Device" Cgroup="Startup"/>
4291         <category>Getting Started</category>
4292       </attributes>
4293     </example>
4294
4295     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
4296       <description>DSP_Lib SVM example</description>
4297       <board name="uVision Simulator" vendor="Keil"/>
4298       <project>
4299         <environment name="uv" load="arm_svm_example.uvprojx"/>
4300       </project>
4301       <attributes>
4302         <component Cclass="CMSIS" Cgroup="CORE"/>
4303         <component Cclass="CMSIS" Cgroup="DSP"/>
4304         <component Cclass="Device" Cgroup="Startup"/>
4305         <category>Getting Started</category>
4306       </attributes>
4307     </example>
4308
4309     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4310       <description>DSP_Lib Variance example</description>
4311       <board name="uVision Simulator" vendor="Keil"/>
4312       <project>
4313         <environment name="uv" load="arm_variance_example.uvprojx"/>
4314       </project>
4315       <attributes>
4316         <component Cclass="CMSIS" Cgroup="CORE"/>
4317         <component Cclass="CMSIS" Cgroup="DSP"/>
4318         <component Cclass="Device" Cgroup="Startup"/>
4319         <category>Getting Started</category>
4320       </attributes>
4321     </example>
4322
4323     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4324       <description>Neural Network CIFAR10 example</description>
4325       <board name="uVision Simulator" vendor="Keil"/>
4326       <project>
4327         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4328       </project>
4329       <attributes>
4330         <component Cclass="CMSIS" Cgroup="CORE"/>
4331         <component Cclass="CMSIS" Cgroup="DSP"/>
4332         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4333         <component Cclass="Device" Cgroup="Startup"/>
4334         <category>Getting Started</category>
4335       </attributes>
4336     </example>
4337
4338     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4339       <description>Neural Network CIFAR10 example</description>
4340       <board name="EWARM Simulator" vendor="IAR"/>
4341       <project>
4342         <environment name="iar" load="NN-example-cifar10.ewp"/>
4343       </project>
4344       <attributes>
4345         <component Cclass="CMSIS" Cgroup="CORE"/>
4346         <component Cclass="CMSIS" Cgroup="DSP"/>
4347         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4348         <component Cclass="Device" Cgroup="Startup"/>
4349         <category>Getting Started</category>
4350       </attributes>
4351     </example>
4352
4353     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4354       <description>Neural Network GRU example</description>
4355       <board name="uVision Simulator" vendor="Keil"/>
4356       <project>
4357         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4358       </project>
4359       <attributes>
4360         <component Cclass="CMSIS" Cgroup="CORE"/>
4361         <component Cclass="CMSIS" Cgroup="DSP"/>
4362         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4363         <component Cclass="Device" Cgroup="Startup"/>
4364         <category>Getting Started</category>
4365       </attributes>
4366     </example>
4367
4368     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4369       <description>Neural Network GRU example</description>
4370       <board name="EWARM Simulator" vendor="IAR"/>
4371       <project>
4372         <environment name="iar" load="NN-example-gru.ewp"/>
4373       </project>
4374       <attributes>
4375         <component Cclass="CMSIS" Cgroup="CORE"/>
4376         <component Cclass="CMSIS" Cgroup="DSP"/>
4377         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4378         <component Cclass="Device" Cgroup="Startup"/>
4379         <category>Getting Started</category>
4380       </attributes>
4381     </example>
4382
4383     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4384       <description>CMSIS-RTOS2 Blinky example</description>
4385       <board name="uVision Simulator" vendor="Keil"/>
4386       <project>
4387         <environment name="uv" load="Blinky.uvprojx"/>
4388       </project>
4389       <attributes>
4390         <component Cclass="CMSIS" Cgroup="CORE"/>
4391         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4392         <component Cclass="Device" Cgroup="Startup"/>
4393         <category>Getting Started</category>
4394       </attributes>
4395     </example>
4396
4397     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4398       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4399       <board name="uVision Simulator" vendor="Keil"/>
4400       <project>
4401         <environment name="uv" load="Blinky.uvprojx"/>
4402       </project>
4403       <attributes>
4404         <component Cclass="CMSIS" Cgroup="CORE"/>
4405         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4406         <component Cclass="Device" Cgroup="Startup"/>
4407         <category>Getting Started</category>
4408       </attributes>
4409     </example>
4410
4411     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4412       <description>CMSIS-RTOS2 Message Queue Example</description>
4413       <board name="uVision Simulator" vendor="Keil"/>
4414       <project>
4415         <environment name="uv" load="MsqQueue.uvprojx"/>
4416       </project>
4417       <attributes>
4418         <component Cclass="CMSIS" Cgroup="CORE"/>
4419         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4420         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4421         <component Cclass="Device" Cgroup="Startup"/>
4422         <category>Getting Started</category>
4423       </attributes>
4424     </example>
4425
4426     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4427       <description>CMSIS-RTOS2 Memory Pool Example</description>
4428       <board name="uVision Simulator" vendor="Keil"/>
4429       <project>
4430         <environment name="uv" load="MemPool.uvprojx"/>
4431       </project>
4432       <attributes>
4433         <component Cclass="CMSIS" Cgroup="CORE"/>
4434         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4435         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4436         <component Cclass="Device" Cgroup="Startup"/>
4437         <category>Getting Started</category>
4438       </attributes>
4439     </example>
4440
4441     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4442       <description>Bare-metal secure/non-secure example without RTOS</description>
4443       <board name="uVision Simulator" vendor="Keil"/>
4444       <project>
4445         <environment name="uv" load="NoRTOS.uvmpw"/>
4446       </project>
4447       <attributes>
4448         <component Cclass="CMSIS" Cgroup="CORE"/>
4449         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4450         <component Cclass="Device" Cgroup="Startup"/>
4451         <category>Getting Started</category>
4452       </attributes>
4453     </example>
4454
4455     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4456       <description>Secure/non-secure RTOS example with thread context management</description>
4457       <board name="uVision Simulator" vendor="Keil"/>
4458       <project>
4459         <environment name="uv" load="RTOS.uvmpw"/>
4460       </project>
4461       <attributes>
4462         <component Cclass="CMSIS" Cgroup="CORE"/>
4463         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4464         <component Cclass="Device" Cgroup="Startup"/>
4465         <category>Getting Started</category>
4466       </attributes>
4467     </example>
4468
4469     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4470       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4471       <board name="uVision Simulator" vendor="Keil"/>
4472       <project>
4473         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4474       </project>
4475       <attributes>
4476         <component Cclass="CMSIS" Cgroup="CORE"/>
4477         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4478         <component Cclass="Device" Cgroup="Startup"/>
4479         <category>Getting Started</category>
4480       </attributes>
4481     </example>
4482
4483     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
4484       <description>CMSIS-RTOS2 Blinky example</description>
4485       <board name="EWARM Simulator" vendor="IAR"/>
4486       <project>
4487         <environment name="iar" load="Blinky/Blinky.ewp"/>
4488       </project>
4489       <attributes>
4490         <component Cclass="CMSIS" Cgroup="CORE"/>
4491         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4492         <component Cclass="Device" Cgroup="Startup"/>
4493         <category>Getting Started</category>
4494       </attributes>
4495     </example>
4496
4497     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
4498       <description>CMSIS-RTOS2 Message Queue Example</description>
4499       <board name="EWARM Simulator" vendor="IAR"/>
4500       <project>
4501         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
4502       </project>
4503       <attributes>
4504         <component Cclass="CMSIS" Cgroup="CORE"/>
4505         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4506         <component Cclass="Device" Cgroup="Startup"/>
4507         <category>Getting Started</category>
4508       </attributes>
4509     </example>
4510
4511   </examples>
4512
4513 </package>