begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.5.1-dev0">
  12       Active development...
  13     </release>
  14     <release version="5.5.0-rc1" date="2019-03-18">
  15       The following folders have been removed:
  16         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  17         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  18       The following folders are deprecated
  19         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  20
  21       CMSIS-Core(M): 5.2.0 (see revision history for details)
  22         - Reworked Stack/Heap configuration for ARM startup files.
  23         - Added Cortex-M35P device support.
  24         - Added generic Armv8.1-M Mainline device support.
  25       CMSIS-Core(A): 1.1.3 (see revision history for details)
  26       CMSIS-DSP: 1.6.0 (see revision history for details)
  27         - reworked DSP library source files
  28           * added macro ARM_MATH_LOOPUNROLL
  29           * removed macro UNALIGNED_SUPPORT_DISABLE
  30           * added const-correctness
  31           * replaced SIMD pointer construct with memcopy solution
  32           * replaced macro combination "CMSIS_INLINE __STATIC_INLINE with "__STATIC_FORCEINLINE"
  33         - reworked DSP library documentation
  34         - Changed DSP folder structure
  35           * moved DSP libraries to ./DSP/Lib
  36         - moved DSP libraries to folder ./DSP/Lib
  37         - ARM DSP Libraries are built with ARMCLANG
  38         - Added DSP Libraries Source variant
  39       CMSIS-RTOS2:
  40         - RTX 5.5.0 (see revision history for details)
  41       CMSIS-Driver: 2.7.0
  42         - Added WiFi Interface API 1.0.0-beta
  43         - Added components for project specific driver implementations
  44       CMSIS-Pack: 1.6.0 (see revision history for details)
  45       Utilities:
  46         - SVDConv 3.3.25
  47         - PackChk 1.3.82
  48     </release>
  49     <release version="5.4.0" date="2018-08-01">
  50       Aligned pack structure with repository.
  51       The following folders are deprecated:
  52         - CMSIS/Include/
  53         - CMSIS/DSP_Lib/
  54
  55       CMSIS-Core(M): 5.1.2 (see revision history for details)
  56         - Added Cortex-M1 support (beta).
  57       CMSIS-Core(A): 1.1.2 (see revision history for details)
  58       CMSIS-NN: 1.1.0
  59         - Added new math functions.
  60       CMSIS-RTOS2:
  61         - API 2.1.3 (see revision history for details)
  62         - RTX 5.4.0 (see revision history for details)
  63           * Updated exception handling on Cortex-A
  64       CMSIS-Driver:
  65         - Flash Driver API V2.2.0
  66       Utilities:
  67         - SVDConv 3.3.21
  68         - PackChk 1.3.71
  69     </release>
  70     <release version="5.3.0" date="2018-02-22">
  71       Updated Arm company brand.
  72       CMSIS-Core(M): 5.1.1 (see revision history for details)
  73       CMSIS-Core(A): 1.1.1 (see revision history for details)
  74       CMSIS-DAP: 2.0.0 (see revision history for details)
  75       CMSIS-NN: 1.0.0
  76         - Initial contribution of the bare metal Neural Network Library.
  77       CMSIS-RTOS2:
  78         - RTX 5.3.0 (see revision history for details)
  79         - OS Tick API 1.0.1
  80     </release>
  81     <release version="5.2.0" date="2017-11-16">
  82       CMSIS-Core(M): 5.1.0 (see revision history for details)
  83         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  84         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  85       CMSIS-Core(A): 1.1.0 (see revision history for details)
  86         - Added compiler_iccarm.h.
  87         - Added additional access functions for physical timer.
  88       CMSIS-DAP: 1.2.0 (see revision history for details)
  89       CMSIS-DSP: 1.5.2 (see revision history for details)
  90       CMSIS-Driver: 2.6.0 (see revision history for details)
  91         - CAN Driver API V1.2.0
  92         - NAND Driver API V2.3.0
  93       CMSIS-RTOS:
  94         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  95       CMSIS-RTOS2:
  96         - API 2.1.2 (see revision history for details)
  97         - RTX 5.2.3 (see revision history for details)
  98       Devices:
  99         - Added GCC startup and linker script for Cortex-A9.
 100         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 101         - Added IAR startup code for Cortex-A9
 102     </release>
 103     <release version="5.1.1" date="2017-09-19">
 104       CMSIS-RTOS2:
 105       - RTX 5.2.1 (see revision history for details)
 106     </release>
 107     <release version="5.1.0" date="2017-08-04">
 108       CMSIS-Core(M): 5.0.2 (see revision history for details)
 109       - Changed Version Control macros to be core agnostic.
 110       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 111       CMSIS-Core(A): 1.0.0 (see revision history for details)
 112       - Initial release
 113       - IRQ Controller API 1.0.0
 114       CMSIS-Driver: 2.05 (see revision history for details)
 115       - All typedefs related to status have been made volatile.
 116       CMSIS-RTOS2:
 117       - API 2.1.1 (see revision history for details)
 118       - RTX 5.2.0 (see revision history for details)
 119       - OS Tick API 1.0.0
 120       CMSIS-DSP: 1.5.2 (see revision history for details)
 121       - Fixed GNU Compiler specific diagnostics.
 122       CMSIS-Pack: 1.5.0 (see revision history for details)
 123       - added System Description File (*.SDF) Format
 124       CMSIS-Zone: 0.0.1 (Preview)
 125       - Initial specification draft
 126     </release>
 127     <release version="5.0.1" date="2017-02-03">
 128       Package Description:
 129       - added taxonomy for Cclass RTOS
 130       CMSIS-RTOS2:
 131       - API 2.1   (see revision history for details)
 132       - RTX 5.1.0 (see revision history for details)
 133       CMSIS-Core: 5.0.1 (see revision history for details)
 134       - Added __PACKED_STRUCT macro
 135       - Added uVisior support
 136       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 137       - Updated template for secure main function (main_s.c)
 138       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 139       CMSIS-DSP: 1.5.1 (see revision history for details)
 140       - added ARMv8M DSP libraries.
 141       CMSIS-Pack:1.4.9 (see revision history for details)
 142       - added Pack Index File specification and schema file
 143     </release>
 144     <release version="5.0.0" date="2016-11-11">
 145       Changed open source license to Apache 2.0
 146       CMSIS_Core:
 147        - Added support for Cortex-M23 and Cortex-M33.
 148        - Added ARMv8-M device configurations for mainline and baseline.
 149        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 150        - Added cmsis_compiler.h to unify compiler behaviour.
 151        - Updated function SCB_EnableICache (for Cortex-M7).
 152        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 153       CMSIS-RTOS:
 154         - bug fix in RTX 4.82 (see revision history for details)
 155       CMSIS-RTOS2:
 156         - new API including compatibility layer to CMSIS-RTOS
 157         - reference implementation based on RTX5
 158         - supports all Cortex-M variants including TrustZone for ARMv8-M
 159       CMSIS-SVD:
 160        - reworked SVD format documentation
 161        - removed SVD file database documentation as SVD files are distributed in packs
 162        - updated SVDConv for Win32 and Linux
 163       CMSIS-DSP:
 164        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 165        - Added DSP libraries build projects to CMSIS pack.
 166     </release>
 167     <release version="4.5.0" date="2015-10-28">
 168       - CMSIS-Core     4.30.0  (see revision history for details)
 169       - CMSIS-DAP      1.1.0   (unchanged)
 170       - CMSIS-Driver   2.04.0  (see revision history for details)
 171       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 172       - CMSIS-Pack     1.4.1   (see revision history for details)
 173       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 174       - CMSIS-SVD      1.3.1   (see revision history for details)
 175     </release>
 176     <release version="4.4.0" date="2015-09-11">
 177       - CMSIS-Core     4.20   (see revision history for details)
 178       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 179       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 180       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 181       - CMSIS-RTOS
 182         -- API         1.02   (unchanged)
 183         -- RTX         4.79   (see revision history for details)
 184       - CMSIS-SVD      1.3.0  (see revision history for details)
 185       - CMSIS-DAP      1.1.0  (extended with SWO support)
 186     </release>
 187     <release version="4.3.0" date="2015-03-20">
 188       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 189       - CMSIS-DSP      1.4.5  (see revision history for details)
 190       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 191       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 192       - CMSIS-RTOS
 193         -- API         1.02   (unchanged)
 194         -- RTX         4.78   (see revision history for details)
 195       - CMSIS-SVD      1.2    (unchanged)
 196     </release>
 197     <release version="4.2.0" date="2014-09-24">
 198       Adding Cortex-M7 support
 199       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 200       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 201       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 202       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 203       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 204     </release>
 205     <release version="4.1.1" date="2014-06-30">
 206       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 207     </release>
 208     <release version="4.1.0" date="2014-06-12">
 209       - CMSIS-Driver   2.02  (incompatible update)
 210       - CMSIS-Pack     1.3   (see revision history for details)
 211       - CMSIS-DSP      1.4.2 (unchanged)
 212       - CMSIS-Core     3.30  (unchanged)
 213       - CMSIS-RTOS RTX 4.74  (unchanged)
 214       - CMSIS-RTOS API 1.02  (unchanged)
 215       - CMSIS-SVD      1.10  (unchanged)
 216       PACK:
 217       - removed G++ specific files from PACK
 218       - added Component Startup variant "C Startup"
 219       - added Pack Checking Utility
 220       - updated conditions to reflect tool-chain dependency
 221       - added Taxonomy for Graphics
 222       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 223     </release>
 224     <release version="4.0.0">
 225       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 226       - CMSIS-Pack     1.1   Preliminary
 227       - CMSIS-DSP      1.4.2 (see revision history for details)
 228       - CMSIS-Core     3.30  (see revision history for details)
 229       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 230       - CMSIS-RTOS API 1.02  (unchanged)
 231       - CMSIS-SVD      1.10  (unchanged)
 232     </release>
 233     <release version="3.20.4">
 234       - CMSIS-RTOS 4.74 (see revision history for details)
 235       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 236     </release>
 237     <release version="3.20.3">
 238       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 239       - CMSIS-RTOS 4.73 (see revision history for details)
 240     </release>
 241     <release version="3.20.2">
 242       - CMSIS-Pack documentation has been added
 243       - CMSIS-Drivers header and documentation have been added to PACK
 244       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 245     </release>
 246     <release version="3.20.1">
 247       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 248       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 249     </release>
 250     <release version="3.20.0">
 251       The software portions that are deployed in the application program are now under a BSD license which allows usage
 252       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 253       The individual components have been update as listed below:
 254       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 255       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 256       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 257       - CMSIS-SVD is unchanged.
 258     </release>
 259   </releases>
 260
 261   <taxonomy>
 262     <description Cclass="Audio">Software components for audio processing</description>
 263     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 264     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 265     <description Cclass="Compiler">Compiler Software Extensions</description>
 266     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 267     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 268     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 269     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 270     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 271     <description Cclass="File System">File Drive Support and File System</description>
 272     <description Cclass="IoT Client">IoT cloud client connector</description>
 273     <description Cclass="IoT Utility">IoT specific software utility</description>
 274     <description Cclass="Graphics">Graphical User Interface</description>
 275     <description Cclass="Network">Network Stack using Internet Protocols</description>
 276     <description Cclass="RTOS">Real-time Operating System</description>
 277     <description Cclass="Security">Encryption for secure communication or storage</description>
 278     <description Cclass="USB">Universal Serial Bus Stack</description>
 279     <description Cclass="Utility">Generic software utility components</description>
 280   </taxonomy>
 281
 282   <devices>
 283     <!-- ******************************  Cortex-M0  ****************************** -->
 284     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 285       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 286       <description>
 287 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 288 - simple, easy-to-use programmers model
 289 - highly efficient ultra-low power operation
 290 - excellent code density
 291 - deterministic, high-performance interrupt handling
 292 - upward compatibility with the rest of the Cortex-M processor family.
 293       </description>
 294       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 295       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 296       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 297       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 298
 299       <device Dname="ARMCM0">
 300         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 301         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 302       </device>
 303     </family>
 304
 305     <!-- ******************************  Cortex-M0P  ****************************** -->
 306     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 307       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 308       <description>
 309 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 310 - simple, easy-to-use programmers model
 311 - highly efficient ultra-low power operation
 312 - excellent code density
 313 - deterministic, high-performance interrupt handling
 314 - upward compatibility with the rest of the Cortex-M processor family.
 315       </description>
 316       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 317       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 318       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 319       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 320
 321       <device Dname="ARMCM0P">
 322         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 323         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 324       </device>
 325
 326       <device Dname="ARMCM0P_MPU">
 327         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 328         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 329       </device>
 330     </family>
 331
 332     <!-- ******************************  Cortex-M1  ****************************** -->
 333     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 334       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 335       <description>
 336 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 337 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 338       </description>
 339       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 340       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 341       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 342       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 343
 344       <device Dname="ARMCM1">
 345         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 346         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 347       </device>
 348     </family>
 349
 350     <!-- ******************************  Cortex-M3  ****************************** -->
 351     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 352       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 353       <description>
 354 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 355 - simple, easy-to-use programmers model
 356 - highly efficient ultra-low power operation
 357 - excellent code density
 358 - deterministic, high-performance interrupt handling
 359 - upward compatibility with the rest of the Cortex-M processor family.
 360       </description>
 361       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 362       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 363       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 364       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 365
 366       <device Dname="ARMCM3">
 367         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 368         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 369       </device>
 370     </family>
 371
 372     <!-- ******************************  Cortex-M4  ****************************** -->
 373     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 374       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 375       <description>
 376 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 377 - simple, easy-to-use programmers model
 378 - highly efficient ultra-low power operation
 379 - excellent code density
 380 - deterministic, high-performance interrupt handling
 381 - upward compatibility with the rest of the Cortex-M processor family.
 382       </description>
 383       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 384       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 385       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 386       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 387
 388       <device Dname="ARMCM4">
 389         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 390         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 391       </device>
 392
 393       <device Dname="ARMCM4_FP">
 394         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 395         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 396       </device>
 397     </family>
 398
 399     <!-- ******************************  Cortex-M7  ****************************** -->
 400     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 401       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 402       <description>
 403 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 404 - simple, easy-to-use programmers model
 405 - highly efficient ultra-low power operation
 406 - excellent code density
 407 - deterministic, high-performance interrupt handling
 408 - upward compatibility with the rest of the Cortex-M processor family.
 409       </description>
 410       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 411       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 412       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 413       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 414
 415       <device Dname="ARMCM7">
 416         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 417         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 418       </device>
 419
 420       <device Dname="ARMCM7_SP">
 421         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 422         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 423       </device>
 424
 425       <device Dname="ARMCM7_DP">
 426         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 427         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 428       </device>
 429     </family>
 430
 431     <!-- ******************************  Cortex-M23  ********************** -->
 432     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 433       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 434       <description>
 435 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 436 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 437 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 438       </description>
 439       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 440       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 441       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 442       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 443       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 444       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 445
 446       <device Dname="ARMCM23">
 447         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 448         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 449       </device>
 450
 451       <device Dname="ARMCM23_TZ">
 452         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 453         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 454       </device>
 455     </family>
 456
 457     <!-- ******************************  Cortex-M33  ****************************** -->
 458     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 459       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 460       <description>
 461 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 462 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 463       </description>
 464       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 465       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 466       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 467       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 468       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 469       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 470
 471       <device Dname="ARMCM33">
 472         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 473         <description>
 474           no DSP Instructions, no Floating Point Unit, no TrustZone
 475         </description>
 476         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 477       </device>
 478
 479       <device Dname="ARMCM33_TZ">
 480         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 481         <description>
 482           no DSP Instructions, no Floating Point Unit, TrustZone
 483         </description>
 484         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 485       </device>
 486
 487       <device Dname="ARMCM33_DSP_FP">
 488         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 489         <description>
 490           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 491         </description>
 492         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 493       </device>
 494
 495       <device Dname="ARMCM33_DSP_FP_TZ">
 496         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 497         <description>
 498           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 499         </description>
 500         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 501       </device>
 502     </family>
 503
 504     <!-- ******************************  Cortex-M35P  ****************************** -->
 505     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 506       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 507       <description>
 508 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 509 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 510       </description>
 511
 512       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 513       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 514       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 515       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 516       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 517       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 518
 519       <device Dname="ARMCM35P">
 520         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 521         <description>
 522           no DSP Instructions, no Floating Point Unit, no TrustZone
 523         </description>
 524         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 525       </device>
 526
 527       <device Dname="ARMCM35P_TZ">
 528         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 529         <description>
 530           no DSP Instructions, no Floating Point Unit, TrustZone
 531         </description>
 532         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 533       </device>
 534
 535       <device Dname="ARMCM35P_DSP_FP">
 536         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 537         <description>
 538           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 539         </description>
 540         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 541       </device>
 542
 543       <device Dname="ARMCM35P_DSP_FP_TZ">
 544         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 545         <description>
 546           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 547         </description>
 548         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 549       </device>
 550     </family>
 551
 552     <!-- ******************************  ARMSC000  ****************************** -->
 553     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 554       <description>
 555 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 556 - simple, easy-to-use programmers model
 557 - highly efficient ultra-low power operation
 558 - excellent code density
 559 - deterministic, high-performance interrupt handling
 560       </description>
 561       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 562       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 563       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 564       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 565
 566       <device Dname="ARMSC000">
 567         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 568         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 569       </device>
 570     </family>
 571
 572     <!-- ******************************  ARMSC300  ****************************** -->
 573     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 574       <description>
 575 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 576 - simple, easy-to-use programmers model
 577 - highly efficient ultra-low power operation
 578 - excellent code density
 579 - deterministic, high-performance interrupt handling
 580       </description>
 581       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 582       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 583       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 584       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 585
 586       <device Dname="ARMSC300">
 587         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 588         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 589       </device>
 590     </family>
 591
 592     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 593     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 594       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 595       <description>
 596 Armv8-M Baseline based device with TrustZone
 597       </description>
 598       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 599       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 600       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 601       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 602       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 603       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 604
 605       <device Dname="ARMv8MBL">
 606         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 607         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 608       </device>
 609     </family>
 610
 611     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 612     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 613       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 614       <description>
 615 Armv8-M Mainline based device with TrustZone
 616       </description>
 617       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 618       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 619       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 620       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 621       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 622       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 623
 624       <device Dname="ARMv8MML">
 625         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 626         <description>
 627           no DSP Instructions, no Floating Point Unit, TrustZone
 628         </description>
 629         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 630       </device>
 631
 632       <device Dname="ARMv8MML_DSP">
 633         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 634         <description>
 635           DSP Instructions, no Floating Point Unit, TrustZone
 636         </description>
 637         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 638       </device>
 639
 640       <device Dname="ARMv8MML_SP">
 641         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 642         <description>
 643           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 644         </description>
 645         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 646       </device>
 647
 648       <device Dname="ARMv8MML_DSP_SP">
 649         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 650         <description>
 651           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 652         </description>
 653         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 654       </device>
 655
 656       <device Dname="ARMv8MML_DP">
 657         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 658         <description>
 659           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 660         </description>
 661         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 662       </device>
 663
 664       <device Dname="ARMv8MML_DSP_DP">
 665         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 666         <description>
 667           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 668         </description>
 669         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 670       </device>
 671     </family>
 672
 673     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 674     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 675       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 676       <description>
 677 Armv8.1-M Mainline based device with TrustZone and MVE
 678       </description>
 679       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 680       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 681       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 682       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 683       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 684       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 685
 686
 687       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 688         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 689         <description>
 690           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 691         </description>
 692         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 693       </device>
 694     </family>
 695
 696     <!-- ******************************  Cortex-A5  ****************************** -->
 697     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 698       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 699       <description>
 700 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 701 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 702 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 703       </description>
 704
 705       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 706       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 707
 708       <device Dname="ARMCA5">
 709         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 710         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 711       </device>
 712     </family>
 713
 714     <!-- ******************************  Cortex-A7  ****************************** -->
 715     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 716       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 717       <description>
 718 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 719 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 720 an optional integrated GIC, and an optional L2 cache controller.
 721       </description>
 722
 723       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 724       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 725
 726       <device Dname="ARMCA7">
 727         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 728         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 729       </device>
 730     </family>
 731
 732     <!-- ******************************  Cortex-A9  ****************************** -->
 733     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 734       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 735       <description>
 736 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 737 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 738 and 8-bit Java bytecodes in Jazelle state.
 739       </description>
 740
 741       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 742       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 743
 744       <device Dname="ARMCA9">
 745         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 746         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 747       </device>
 748     </family>
 749   </devices>
 750
 751
 752   <apis>
 753     <!-- CMSIS Device API -->
 754     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 755       <description>Device interrupt controller interface</description>
 756       <files>
 757         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 758       </files>
 759     </api>
 760     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 761       <description>RTOS Kernel system tick timer interface</description>
 762       <files>
 763         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 764       </files>
 765     </api>
 766     <!-- CMSIS-RTOS API -->
 767     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 768       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 769       <files>
 770         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 771       </files>
 772     </api>
 773     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 774       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 775       <files>
 776         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 777         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 778       </files>
 779     </api>
 780     <!-- CMSIS Driver API -->
 781     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 782       <description>USART Driver API for Cortex-M</description>
 783       <files>
 784         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 785         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 786       </files>
 787     </api>
 788     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 789       <description>SPI Driver API for Cortex-M</description>
 790       <files>
 791         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 792         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 793       </files>
 794     </api>
 795     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 796       <description>SAI Driver API for Cortex-M</description>
 797       <files>
 798         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 799         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 800       </files>
 801     </api>
 802     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 803       <description>I2C Driver API for Cortex-M</description>
 804       <files>
 805         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 806         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 807       </files>
 808     </api>
 809     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 810       <description>CAN Driver API for Cortex-M</description>
 811       <files>
 812         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 813         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 814       </files>
 815     </api>
 816     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 817       <description>Flash Driver API for Cortex-M</description>
 818       <files>
 819         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 820         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 821       </files>
 822     </api>
 823     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 824       <description>MCI Driver API for Cortex-M</description>
 825       <files>
 826         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 827         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 828       </files>
 829     </api>
 830     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 831       <description>NAND Flash Driver API for Cortex-M</description>
 832       <files>
 833         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 834         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 835       </files>
 836     </api>
 837     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 838       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 839       <files>
 840         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 841         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 842         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 843       </files>
 844     </api>
 845     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 846       <description>Ethernet MAC Driver API for Cortex-M</description>
 847       <files>
 848         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 849         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 850       </files>
 851     </api>
 852     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 853       <description>Ethernet PHY Driver API for Cortex-M</description>
 854       <files>
 855         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 856         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 857       </files>
 858     </api>
 859     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 860       <description>USB Device Driver API for Cortex-M</description>
 861       <files>
 862         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 863         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 864       </files>
 865     </api>
 866     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 867       <description>USB Host Driver API for Cortex-M</description>
 868       <files>
 869         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 870         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 871       </files>
 872     </api>
 873     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0-beta" exclusive="0">
 874       <description>WiFi driver</description>
 875       <files>
 876         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 877         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 878       </files>
 879     </api>
 880   </apis>
 881
 882   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 883   <conditions>
 884     <!-- compiler -->
 885     <condition id="ARMCC6">
 886       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 887       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 888     </condition>
 889     <condition id="ARMCC5">
 890       <require Tcompiler="ARMCC" Toptions="AC5"/>
 891     </condition>
 892     <condition id="ARMCC">
 893       <require Tcompiler="ARMCC"/>
 894     </condition>
 895     <condition id="GCC">
 896       <require Tcompiler="GCC"/>
 897     </condition>
 898     <condition id="IAR">
 899       <require Tcompiler="IAR"/>
 900     </condition>
 901     <condition id="ARMCC GCC">
 902       <accept Tcompiler="ARMCC"/>
 903       <accept Tcompiler="GCC"/>
 904     </condition>
 905     <condition id="ARMCC GCC IAR">
 906       <accept Tcompiler="ARMCC"/>
 907       <accept Tcompiler="GCC"/>
 908       <accept Tcompiler="IAR"/>
 909     </condition>
 910
 911     <!-- Arm architecture -->
 912     <condition id="ARMv6-M Device">
 913       <description>Armv6-M architecture based device</description>
 914       <accept Dcore="Cortex-M0"/>
 915       <accept Dcore="Cortex-M1"/>
 916       <accept Dcore="Cortex-M0+"/>
 917       <accept Dcore="SC000"/>
 918     </condition>
 919     <condition id="ARMv7-M Device">
 920       <description>Armv7-M architecture based device</description>
 921       <accept Dcore="Cortex-M3"/>
 922       <accept Dcore="Cortex-M4"/>
 923       <accept Dcore="Cortex-M7"/>
 924       <accept Dcore="SC300"/>
 925     </condition>
 926     <condition id="ARMv8-M Device">
 927       <description>Armv8-M architecture based device</description>
 928       <accept Dcore="ARMV8MBL"/>
 929       <accept Dcore="ARMV8MML"/>
 930       <accept Dcore="ARMV81MML"/>
 931       <accept Dcore="Cortex-M23"/>
 932       <accept Dcore="Cortex-M33"/>
 933       <accept Dcore="Cortex-M35P"/>
 934     </condition>
 935     <condition id="ARMv8-M TZ Device">
 936       <description>Armv8-M architecture based device with TrustZone</description>
 937       <require condition="ARMv8-M Device"/>
 938       <require Dtz="TZ"/>
 939     </condition>
 940     <condition id="ARMv6_7-M Device">
 941       <description>Armv6_7-M architecture based device</description>
 942       <accept condition="ARMv6-M Device"/>
 943       <accept condition="ARMv7-M Device"/>
 944     </condition>
 945     <condition id="ARMv6_7_8-M Device">
 946       <description>Armv6_7_8-M architecture based device</description>
 947       <accept condition="ARMv6-M Device"/>
 948       <accept condition="ARMv7-M Device"/>
 949       <accept condition="ARMv8-M Device"/>
 950     </condition>
 951     <condition id="ARMv7-A Device">
 952       <description>Armv7-A architecture based device</description>
 953       <accept Dcore="Cortex-A5"/>
 954       <accept Dcore="Cortex-A7"/>
 955       <accept Dcore="Cortex-A9"/>
 956     </condition>
 957
 958     <!-- ARM core -->
 959     <condition id="CM0">
 960       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 961       <accept Dcore="Cortex-M0"/>
 962       <accept Dcore="Cortex-M0+"/>
 963       <accept Dcore="SC000"/>
 964     </condition>
 965     <condition id="CM1">
 966       <description>Cortex-M1</description>
 967       <require Dcore="Cortex-M1"/>
 968     </condition>
 969     <condition id="CM3">
 970       <description>Cortex-M3 or SC300 processor based device</description>
 971       <accept Dcore="Cortex-M3"/>
 972       <accept Dcore="SC300"/>
 973     </condition>
 974     <condition id="CM4">
 975       <description>Cortex-M4 processor based device</description>
 976       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 977     </condition>
 978     <condition id="CM4_FP">
 979       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 980       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 981       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 982       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 983     </condition>
 984     <condition id="CM7">
 985       <description>Cortex-M7 processor based device</description>
 986       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 987     </condition>
 988     <condition id="CM7_FP">
 989       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 990       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 991       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 992     </condition>
 993     <condition id="CM7_SP">
 994       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 995       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 996     </condition>
 997     <condition id="CM7_DP">
 998       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 999       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1000     </condition>
1001     <condition id="CM23">
1002       <description>Cortex-M23 processor based device</description>
1003       <require Dcore="Cortex-M23"/>
1004     </condition>
1005     <condition id="CM33">
1006       <description>Cortex-M33 processor based device</description>
1007       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1008     </condition>
1009     <condition id="CM33_FP">
1010       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1011       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1012     </condition>
1013     <condition id="CM35P">
1014       <description>Cortex-M35P processor based device</description>
1015       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1016     </condition>
1017     <condition id="CM35P_FP">
1018       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1019       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1020     </condition>
1021     <condition id="ARMv8MBL">
1022       <description>Armv8-M Baseline processor based device</description>
1023       <require Dcore="ARMV8MBL"/>
1024     </condition>
1025     <condition id="ARMv8MML">
1026       <description>Armv8-M Mainline processor based device</description>
1027       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1028     </condition>
1029     <condition id="ARMv8MML_FP">
1030       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1031       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1032       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1033     </condition>
1034
1035     <condition id="CM33_NODSP_NOFPU">
1036       <description>CM33, no DSP, no FPU</description>
1037       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1038     </condition>
1039     <condition id="CM33_DSP_NOFPU">
1040       <description>CM33, DSP, no FPU</description>
1041       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1042     </condition>
1043     <condition id="CM33_NODSP_SP">
1044       <description>CM33, no DSP, SP FPU</description>
1045       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1046     </condition>
1047     <condition id="CM33_DSP_SP">
1048       <description>CM33, DSP, SP FPU</description>
1049       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1050     </condition>
1051
1052     <condition id="CM35P_NODSP_NOFPU">
1053       <description>CM35P, no DSP, no FPU</description>
1054       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1055     </condition>
1056     <condition id="CM35P_DSP_NOFPU">
1057       <description>CM35P, DSP, no FPU</description>
1058       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1059     </condition>
1060     <condition id="CM35P_NODSP_SP">
1061       <description>CM35P, no DSP, SP FPU</description>
1062       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1063     </condition>
1064     <condition id="CM35P_DSP_SP">
1065       <description>CM35P, DSP, SP FPU</description>
1066       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1067     </condition>
1068
1069     <condition id="ARMv8MML_NODSP_NOFPU">
1070       <description>Armv8-M Mainline, no DSP, no FPU</description>
1071       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1072     </condition>
1073     <condition id="ARMv8MML_DSP_NOFPU">
1074       <description>Armv8-M Mainline, DSP, no FPU</description>
1075       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1076     </condition>
1077     <condition id="ARMv8MML_NODSP_SP">
1078       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1079       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1080     </condition>
1081     <condition id="ARMv8MML_DSP_SP">
1082       <description>Armv8-M Mainline, DSP, SP FPU</description>
1083       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1084     </condition>
1085
1086     <condition id="ARMv81MML">
1087       <description>Armv8.1-M Mainline</description>
1088       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1089     </condition>
1090
1091     <condition id="CA5_CA9">
1092       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1093       <accept Dcore="Cortex-A5"/>
1094       <accept Dcore="Cortex-A9"/>
1095     </condition>
1096
1097     <condition id="CA7">
1098       <description>Cortex-A7 processor based device</description>
1099       <accept Dcore="Cortex-A7"/>
1100     </condition>
1101
1102     <!-- ARMCC compiler -->
1103     <condition id="CA_ARMCC5">
1104       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1105       <require condition="ARMv7-A Device"/>
1106       <require condition="ARMCC5"/>
1107     </condition>
1108     <condition id="CA_ARMCC6">
1109       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1110       <require condition="ARMv7-A Device"/>
1111       <require condition="ARMCC6"/>
1112     </condition>
1113
1114     <condition id="CM0_ARMCC">
1115       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1116       <require condition="CM0"/>
1117       <require Tcompiler="ARMCC"/>
1118     </condition>
1119     <condition id="CM0_LE_ARMCC">
1120       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1121       <require condition="CM0_ARMCC"/>
1122       <require Dendian="Little-endian"/>
1123     </condition>
1124     <condition id="CM0_BE_ARMCC">
1125       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1126       <require condition="CM0_ARMCC"/>
1127       <require Dendian="Big-endian"/>
1128     </condition>
1129
1130     <condition id="CM1_ARMCC">
1131       <description>Cortex-M1 based device for the Arm Compiler</description>
1132       <require condition="CM1"/>
1133       <require Tcompiler="ARMCC"/>
1134     </condition>
1135     <condition id="CM1_LE_ARMCC">
1136       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1137       <require condition="CM1_ARMCC"/>
1138       <require Dendian="Little-endian"/>
1139     </condition>
1140     <condition id="CM1_BE_ARMCC">
1141       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1142       <require condition="CM1_ARMCC"/>
1143       <require Dendian="Big-endian"/>
1144     </condition>
1145
1146     <condition id="CM3_ARMCC">
1147       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1148       <require condition="CM3"/>
1149       <require Tcompiler="ARMCC"/>
1150     </condition>
1151     <condition id="CM3_LE_ARMCC">
1152       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1153       <require condition="CM3_ARMCC"/>
1154       <require Dendian="Little-endian"/>
1155     </condition>
1156     <condition id="CM3_BE_ARMCC">
1157       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1158       <require condition="CM3_ARMCC"/>
1159       <require Dendian="Big-endian"/>
1160     </condition>
1161
1162     <condition id="CM4_ARMCC">
1163       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1164       <require condition="CM4"/>
1165       <require Tcompiler="ARMCC"/>
1166     </condition>
1167     <condition id="CM4_LE_ARMCC">
1168       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1169       <require condition="CM4_ARMCC"/>
1170       <require Dendian="Little-endian"/>
1171     </condition>
1172     <condition id="CM4_BE_ARMCC">
1173       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1174       <require condition="CM4_ARMCC"/>
1175       <require Dendian="Big-endian"/>
1176     </condition>
1177
1178     <condition id="CM4_FP_ARMCC">
1179       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1180       <require condition="CM4_FP"/>
1181       <require Tcompiler="ARMCC"/>
1182     </condition>
1183     <condition id="CM4_FP_LE_ARMCC">
1184       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1185       <require condition="CM4_FP_ARMCC"/>
1186       <require Dendian="Little-endian"/>
1187     </condition>
1188     <condition id="CM4_FP_BE_ARMCC">
1189       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1190       <require condition="CM4_FP_ARMCC"/>
1191       <require Dendian="Big-endian"/>
1192     </condition>
1193
1194     <condition id="CM7_ARMCC">
1195       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1196       <require condition="CM7"/>
1197       <require Tcompiler="ARMCC"/>
1198     </condition>
1199     <condition id="CM7_LE_ARMCC">
1200       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1201       <require condition="CM7_ARMCC"/>
1202       <require Dendian="Little-endian"/>
1203     </condition>
1204     <condition id="CM7_BE_ARMCC">
1205       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1206       <require condition="CM7_ARMCC"/>
1207       <require Dendian="Big-endian"/>
1208     </condition>
1209
1210     <condition id="CM7_FP_ARMCC">
1211       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1212       <require condition="CM7_FP"/>
1213       <require Tcompiler="ARMCC"/>
1214     </condition>
1215     <condition id="CM7_FP_LE_ARMCC">
1216       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1217       <require condition="CM7_FP_ARMCC"/>
1218       <require Dendian="Little-endian"/>
1219     </condition>
1220     <condition id="CM7_FP_BE_ARMCC">
1221       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1222       <require condition="CM7_FP_ARMCC"/>
1223       <require Dendian="Big-endian"/>
1224     </condition>
1225
1226     <condition id="CM7_SP_ARMCC">
1227       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1228       <require condition="CM7_SP"/>
1229       <require Tcompiler="ARMCC"/>
1230     </condition>
1231     <condition id="CM7_SP_LE_ARMCC">
1232       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1233       <require condition="CM7_SP_ARMCC"/>
1234       <require Dendian="Little-endian"/>
1235     </condition>
1236     <condition id="CM7_SP_BE_ARMCC">
1237       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1238       <require condition="CM7_SP_ARMCC"/>
1239       <require Dendian="Big-endian"/>
1240     </condition>
1241
1242     <condition id="CM7_DP_ARMCC">
1243       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1244       <require condition="CM7_DP"/>
1245       <require Tcompiler="ARMCC"/>
1246     </condition>
1247     <condition id="CM7_DP_LE_ARMCC">
1248       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1249       <require condition="CM7_DP_ARMCC"/>
1250       <require Dendian="Little-endian"/>
1251     </condition>
1252     <condition id="CM7_DP_BE_ARMCC">
1253       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1254       <require condition="CM7_DP_ARMCC"/>
1255       <require Dendian="Big-endian"/>
1256     </condition>
1257
1258     <condition id="CM23_ARMCC">
1259       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1260       <require condition="CM23"/>
1261       <require Tcompiler="ARMCC"/>
1262     </condition>
1263     <condition id="CM23_LE_ARMCC">
1264       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1265       <require condition="CM23_ARMCC"/>
1266       <require Dendian="Little-endian"/>
1267     </condition>
1268     <condition id="CM23_BE_ARMCC">
1269       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1270       <require condition="CM23_ARMCC"/>
1271       <require Dendian="Big-endian"/>
1272     </condition>
1273
1274     <condition id="CM33_ARMCC">
1275       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1276       <require condition="CM33"/>
1277       <require Tcompiler="ARMCC"/>
1278     </condition>
1279     <condition id="CM33_LE_ARMCC">
1280       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1281       <require condition="CM33_ARMCC"/>
1282       <require Dendian="Little-endian"/>
1283     </condition>
1284     <condition id="CM33_BE_ARMCC">
1285       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1286       <require condition="CM33_ARMCC"/>
1287       <require Dendian="Big-endian"/>
1288     </condition>
1289
1290     <condition id="CM33_FP_ARMCC">
1291       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1292       <require condition="CM33_FP"/>
1293       <require Tcompiler="ARMCC"/>
1294     </condition>
1295     <condition id="CM33_FP_LE_ARMCC">
1296       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1297       <require condition="CM33_FP_ARMCC"/>
1298       <require Dendian="Little-endian"/>
1299     </condition>
1300     <condition id="CM33_FP_BE_ARMCC">
1301       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1302       <require condition="CM33_FP_ARMCC"/>
1303       <require Dendian="Big-endian"/>
1304     </condition>
1305
1306     <condition id="CM33_NODSP_NOFPU_ARMCC">
1307       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1308       <require condition="CM33_NODSP_NOFPU"/>
1309       <require Tcompiler="ARMCC"/>
1310     </condition>
1311     <condition id="CM33_DSP_NOFPU_ARMCC">
1312       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1313       <require condition="CM33_DSP_NOFPU"/>
1314       <require Tcompiler="ARMCC"/>
1315     </condition>
1316     <condition id="CM33_NODSP_SP_ARMCC">
1317       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1318       <require condition="CM33_NODSP_SP"/>
1319       <require Tcompiler="ARMCC"/>
1320     </condition>
1321     <condition id="CM33_DSP_SP_ARMCC">
1322       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1323       <require condition="CM33_DSP_SP"/>
1324       <require Tcompiler="ARMCC"/>
1325     </condition>
1326     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1327       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1328       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1329       <require Dendian="Little-endian"/>
1330     </condition>
1331     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1332       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1333       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1334       <require Dendian="Little-endian"/>
1335     </condition>
1336     <condition id="CM33_NODSP_SP_LE_ARMCC">
1337       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1338       <require condition="CM33_NODSP_SP_ARMCC"/>
1339       <require Dendian="Little-endian"/>
1340     </condition>
1341     <condition id="CM33_DSP_SP_LE_ARMCC">
1342       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1343       <require condition="CM33_DSP_SP_ARMCC"/>
1344       <require Dendian="Little-endian"/>
1345     </condition>
1346
1347     <condition id="CM35P_ARMCC">
1348       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1349       <require condition="CM35P"/>
1350       <require Tcompiler="ARMCC"/>
1351     </condition>
1352     <condition id="CM35P_LE_ARMCC">
1353       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1354       <require condition="CM35P_ARMCC"/>
1355       <require Dendian="Little-endian"/>
1356     </condition>
1357     <condition id="CM35P_BE_ARMCC">
1358       <description>Cortex-M35P processor based device in big endian mode for the Arm Compiler</description>
1359       <require condition="CM35P_ARMCC"/>
1360       <require Dendian="Big-endian"/>
1361     </condition>
1362
1363     <condition id="CM35P_FP_ARMCC">
1364       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1365       <require condition="CM35P_FP"/>
1366       <require Tcompiler="ARMCC"/>
1367     </condition>
1368     <condition id="CM35P_FP_LE_ARMCC">
1369       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1370       <require condition="CM35P_FP_ARMCC"/>
1371       <require Dendian="Little-endian"/>
1372     </condition>
1373     <condition id="CM35P_FP_BE_ARMCC">
1374       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1375       <require condition="CM35P_FP_ARMCC"/>
1376       <require Dendian="Big-endian"/>
1377     </condition>
1378
1379     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1380       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1381       <require condition="CM35P_NODSP_NOFPU"/>
1382       <require Tcompiler="ARMCC"/>
1383     </condition>
1384     <condition id="CM35P_DSP_NOFPU_ARMCC">
1385       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1386       <require condition="CM35P_DSP_NOFPU"/>
1387       <require Tcompiler="ARMCC"/>
1388     </condition>
1389     <condition id="CM35P_NODSP_SP_ARMCC">
1390       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1391       <require condition="CM35P_NODSP_SP"/>
1392       <require Tcompiler="ARMCC"/>
1393     </condition>
1394     <condition id="CM35P_DSP_SP_ARMCC">
1395       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1396       <require condition="CM35P_DSP_SP"/>
1397       <require Tcompiler="ARMCC"/>
1398     </condition>
1399     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1400       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1401       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1402       <require Dendian="Little-endian"/>
1403     </condition>
1404     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1405       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1406       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1407       <require Dendian="Little-endian"/>
1408     </condition>
1409     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1410       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1411       <require condition="CM35P_NODSP_SP_ARMCC"/>
1412       <require Dendian="Little-endian"/>
1413     </condition>
1414     <condition id="CM35P_DSP_SP_LE_ARMCC">
1415       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1416       <require condition="CM35P_DSP_SP_ARMCC"/>
1417       <require Dendian="Little-endian"/>
1418     </condition>
1419
1420     <condition id="ARMv8MBL_ARMCC">
1421       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1422       <require condition="ARMv8MBL"/>
1423       <require Tcompiler="ARMCC"/>
1424     </condition>
1425     <condition id="ARMv8MBL_LE_ARMCC">
1426       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1427       <require condition="ARMv8MBL_ARMCC"/>
1428       <require Dendian="Little-endian"/>
1429     </condition>
1430     <condition id="ARMv8MBL_BE_ARMCC">
1431       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1432       <require condition="ARMv8MBL_ARMCC"/>
1433       <require Dendian="Big-endian"/>
1434     </condition>
1435
1436     <condition id="ARMv8MML_ARMCC">
1437       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1438       <require condition="ARMv8MML"/>
1439       <require Tcompiler="ARMCC"/>
1440     </condition>
1441     <condition id="ARMv8MML_LE_ARMCC">
1442       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1443       <require condition="ARMv8MML_ARMCC"/>
1444       <require Dendian="Little-endian"/>
1445     </condition>
1446     <condition id="ARMv8MML_BE_ARMCC">
1447       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1448       <require condition="ARMv8MML_ARMCC"/>
1449       <require Dendian="Big-endian"/>
1450     </condition>
1451
1452     <condition id="ARMv8MML_FP_ARMCC">
1453       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1454       <require condition="ARMv8MML_FP"/>
1455       <require Tcompiler="ARMCC"/>
1456     </condition>
1457     <condition id="ARMv8MML_FP_LE_ARMCC">
1458       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1459       <require condition="ARMv8MML_FP_ARMCC"/>
1460       <require Dendian="Little-endian"/>
1461     </condition>
1462     <condition id="ARMv8MML_FP_BE_ARMCC">
1463       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1464       <require condition="ARMv8MML_FP_ARMCC"/>
1465       <require Dendian="Big-endian"/>
1466     </condition>
1467
1468     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1469       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1470       <require condition="ARMv8MML_NODSP_NOFPU"/>
1471       <require Tcompiler="ARMCC"/>
1472     </condition>
1473     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1474       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1475       <require condition="ARMv8MML_DSP_NOFPU"/>
1476       <require Tcompiler="ARMCC"/>
1477     </condition>
1478     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1479       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1480       <require condition="ARMv8MML_NODSP_SP"/>
1481       <require Tcompiler="ARMCC"/>
1482     </condition>
1483     <condition id="ARMv8MML_DSP_SP_ARMCC">
1484       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1485       <require condition="ARMv8MML_DSP_SP"/>
1486       <require Tcompiler="ARMCC"/>
1487     </condition>
1488     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1489       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1490       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1491       <require Dendian="Little-endian"/>
1492     </condition>
1493     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1494       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1495       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1496       <require Dendian="Little-endian"/>
1497     </condition>
1498     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1499       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1500       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1501       <require Dendian="Little-endian"/>
1502     </condition>
1503     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1504       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1505       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1506       <require Dendian="Little-endian"/>
1507     </condition>
1508
1509     <!-- GCC compiler -->
1510     <condition id="CA_GCC">
1511       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1512       <require condition="ARMv7-A Device"/>
1513       <require Tcompiler="GCC"/>
1514     </condition>
1515
1516     <condition id="CM0_GCC">
1517       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1518       <require condition="CM0"/>
1519       <require Tcompiler="GCC"/>
1520     </condition>
1521     <condition id="CM0_LE_GCC">
1522       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1523       <require condition="CM0_GCC"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526     <condition id="CM0_BE_GCC">
1527       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1528       <require condition="CM0_GCC"/>
1529       <require Dendian="Big-endian"/>
1530     </condition>
1531
1532     <condition id="CM1_GCC">
1533       <description>Cortex-M1 based device for the GCC Compiler</description>
1534       <require condition="CM1"/>
1535       <require Tcompiler="GCC"/>
1536     </condition>
1537     <condition id="CM1_LE_GCC">
1538       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1539       <require condition="CM1_GCC"/>
1540       <require Dendian="Little-endian"/>
1541     </condition>
1542     <condition id="CM1_BE_GCC">
1543       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1544       <require condition="CM1_GCC"/>
1545       <require Dendian="Big-endian"/>
1546     </condition>
1547
1548     <condition id="CM3_GCC">
1549       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1550       <require condition="CM3"/>
1551       <require Tcompiler="GCC"/>
1552     </condition>
1553     <condition id="CM3_LE_GCC">
1554       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1555       <require condition="CM3_GCC"/>
1556       <require Dendian="Little-endian"/>
1557     </condition>
1558     <condition id="CM3_BE_GCC">
1559       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1560       <require condition="CM3_GCC"/>
1561       <require Dendian="Big-endian"/>
1562     </condition>
1563
1564     <condition id="CM4_GCC">
1565       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1566       <require condition="CM4"/>
1567       <require Tcompiler="GCC"/>
1568     </condition>
1569     <condition id="CM4_LE_GCC">
1570       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1571       <require condition="CM4_GCC"/>
1572       <require Dendian="Little-endian"/>
1573     </condition>
1574     <condition id="CM4_BE_GCC">
1575       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1576       <require condition="CM4_GCC"/>
1577       <require Dendian="Big-endian"/>
1578     </condition>
1579
1580     <condition id="CM4_FP_GCC">
1581       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1582       <require condition="CM4_FP"/>
1583       <require Tcompiler="GCC"/>
1584     </condition>
1585     <condition id="CM4_FP_LE_GCC">
1586       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1587       <require condition="CM4_FP_GCC"/>
1588       <require Dendian="Little-endian"/>
1589     </condition>
1590     <condition id="CM4_FP_BE_GCC">
1591       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1592       <require condition="CM4_FP_GCC"/>
1593       <require Dendian="Big-endian"/>
1594     </condition>
1595
1596     <condition id="CM7_GCC">
1597       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1598       <require condition="CM7"/>
1599       <require Tcompiler="GCC"/>
1600     </condition>
1601     <condition id="CM7_LE_GCC">
1602       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1603       <require condition="CM7_GCC"/>
1604       <require Dendian="Little-endian"/>
1605     </condition>
1606     <condition id="CM7_BE_GCC">
1607       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1608       <require condition="CM7_GCC"/>
1609       <require Dendian="Big-endian"/>
1610     </condition>
1611
1612     <condition id="CM7_FP_GCC">
1613       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1614       <require condition="CM7_FP"/>
1615       <require Tcompiler="GCC"/>
1616     </condition>
1617     <condition id="CM7_FP_LE_GCC">
1618       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1619       <require condition="CM7_FP_GCC"/>
1620       <require Dendian="Little-endian"/>
1621     </condition>
1622     <condition id="CM7_FP_BE_GCC">
1623       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1624       <require condition="CM7_FP_GCC"/>
1625       <require Dendian="Big-endian"/>
1626     </condition>
1627
1628     <condition id="CM7_SP_GCC">
1629       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1630       <require condition="CM7_SP"/>
1631       <require Tcompiler="GCC"/>
1632     </condition>
1633     <condition id="CM7_SP_LE_GCC">
1634       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1635       <require condition="CM7_SP_GCC"/>
1636       <require Dendian="Little-endian"/>
1637     </condition>
1638     <condition id="CM7_SP_BE_GCC">
1639       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1640       <require condition="CM7_SP_GCC"/>
1641       <require Dendian="Big-endian"/>
1642     </condition>
1643
1644     <condition id="CM7_DP_GCC">
1645       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1646       <require condition="CM7_DP"/>
1647       <require Tcompiler="GCC"/>
1648     </condition>
1649     <condition id="CM7_DP_LE_GCC">
1650       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1651       <require condition="CM7_DP_GCC"/>
1652       <require Dendian="Little-endian"/>
1653     </condition>
1654     <condition id="CM7_DP_BE_GCC">
1655       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1656       <require condition="CM7_DP_GCC"/>
1657       <require Dendian="Big-endian"/>
1658     </condition>
1659
1660     <condition id="CM23_GCC">
1661       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1662       <require condition="CM23"/>
1663       <require Tcompiler="GCC"/>
1664     </condition>
1665     <condition id="CM23_LE_GCC">
1666       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1667       <require condition="CM23_GCC"/>
1668       <require Dendian="Little-endian"/>
1669     </condition>
1670     <condition id="CM23_BE_GCC">
1671       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1672       <require condition="CM23_GCC"/>
1673       <require Dendian="Big-endian"/>
1674     </condition>
1675
1676     <condition id="CM33_GCC">
1677       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1678       <require condition="CM33"/>
1679       <require Tcompiler="GCC"/>
1680     </condition>
1681     <condition id="CM33_LE_GCC">
1682       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1683       <require condition="CM33_GCC"/>
1684       <require Dendian="Little-endian"/>
1685     </condition>
1686     <condition id="CM33_BE_GCC">
1687       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1688       <require condition="CM33_GCC"/>
1689       <require Dendian="Big-endian"/>
1690     </condition>
1691
1692     <condition id="CM33_FP_GCC">
1693       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1694       <require condition="CM33_FP"/>
1695       <require Tcompiler="GCC"/>
1696     </condition>
1697     <condition id="CM33_FP_LE_GCC">
1698       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1699       <require condition="CM33_FP_GCC"/>
1700       <require Dendian="Little-endian"/>
1701     </condition>
1702     <condition id="CM33_FP_BE_GCC">
1703       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1704       <require condition="CM33_FP_GCC"/>
1705       <require Dendian="Big-endian"/>
1706     </condition>
1707
1708     <condition id="CM33_NODSP_NOFPU_GCC">
1709       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1710       <require condition="CM33_NODSP_NOFPU"/>
1711       <require Tcompiler="GCC"/>
1712     </condition>
1713     <condition id="CM33_DSP_NOFPU_GCC">
1714       <description>CM33, DSP, no FPU, GCC Compiler</description>
1715       <require condition="CM33_DSP_NOFPU"/>
1716       <require Tcompiler="GCC"/>
1717     </condition>
1718     <condition id="CM33_NODSP_SP_GCC">
1719       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1720       <require condition="CM33_NODSP_SP"/>
1721       <require Tcompiler="GCC"/>
1722     </condition>
1723     <condition id="CM33_DSP_SP_GCC">
1724       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1725       <require condition="CM33_DSP_SP"/>
1726       <require Tcompiler="GCC"/>
1727     </condition>
1728     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1729       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1730       <require condition="CM33_NODSP_NOFPU_GCC"/>
1731       <require Dendian="Little-endian"/>
1732     </condition>
1733     <condition id="CM33_DSP_NOFPU_LE_GCC">
1734       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1735       <require condition="CM33_DSP_NOFPU_GCC"/>
1736       <require Dendian="Little-endian"/>
1737     </condition>
1738     <condition id="CM33_NODSP_SP_LE_GCC">
1739       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1740       <require condition="CM33_NODSP_SP_GCC"/>
1741       <require Dendian="Little-endian"/>
1742     </condition>
1743     <condition id="CM33_DSP_SP_LE_GCC">
1744       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1745       <require condition="CM33_DSP_SP_GCC"/>
1746       <require Dendian="Little-endian"/>
1747     </condition>
1748
1749     <condition id="CM35P_GCC">
1750       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1751       <require condition="CM35P"/>
1752       <require Tcompiler="GCC"/>
1753     </condition>
1754     <condition id="CM35P_LE_GCC">
1755       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1756       <require condition="CM35P_GCC"/>
1757       <require Dendian="Little-endian"/>
1758     </condition>
1759     <condition id="CM35P_BE_GCC">
1760       <description>Cortex-M35P processor based device in big endian mode for the GCC Compiler</description>
1761       <require condition="CM35P_GCC"/>
1762       <require Dendian="Big-endian"/>
1763     </condition>
1764
1765     <condition id="CM35P_FP_GCC">
1766       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1767       <require condition="CM35P_FP"/>
1768       <require Tcompiler="GCC"/>
1769     </condition>
1770     <condition id="CM35P_FP_LE_GCC">
1771       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1772       <require condition="CM35P_FP_GCC"/>
1773       <require Dendian="Little-endian"/>
1774     </condition>
1775     <condition id="CM35P_FP_BE_GCC">
1776       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1777       <require condition="CM35P_FP_GCC"/>
1778       <require Dendian="Big-endian"/>
1779     </condition>
1780
1781     <condition id="CM35P_NODSP_NOFPU_GCC">
1782       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1783       <require condition="CM35P_NODSP_NOFPU"/>
1784       <require Tcompiler="GCC"/>
1785     </condition>
1786     <condition id="CM35P_DSP_NOFPU_GCC">
1787       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1788       <require condition="CM35P_DSP_NOFPU"/>
1789       <require Tcompiler="GCC"/>
1790     </condition>
1791     <condition id="CM35P_NODSP_SP_GCC">
1792       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1793       <require condition="CM35P_NODSP_SP"/>
1794       <require Tcompiler="GCC"/>
1795     </condition>
1796     <condition id="CM35P_DSP_SP_GCC">
1797       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1798       <require condition="CM35P_DSP_SP"/>
1799       <require Tcompiler="GCC"/>
1800     </condition>
1801     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1802       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1803       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1804       <require Dendian="Little-endian"/>
1805     </condition>
1806     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1807       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1808       <require condition="CM35P_DSP_NOFPU_GCC"/>
1809       <require Dendian="Little-endian"/>
1810     </condition>
1811     <condition id="CM35P_NODSP_SP_LE_GCC">
1812       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1813       <require condition="CM35P_NODSP_SP_GCC"/>
1814       <require Dendian="Little-endian"/>
1815     </condition>
1816     <condition id="CM35P_DSP_SP_LE_GCC">
1817       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1818       <require condition="CM35P_DSP_SP_GCC"/>
1819       <require Dendian="Little-endian"/>
1820     </condition>
1821
1822     <condition id="ARMv8MBL_GCC">
1823       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1824       <require condition="ARMv8MBL"/>
1825       <require Tcompiler="GCC"/>
1826     </condition>
1827     <condition id="ARMv8MBL_LE_GCC">
1828       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1829       <require condition="ARMv8MBL_GCC"/>
1830       <require Dendian="Little-endian"/>
1831     </condition>
1832     <condition id="ARMv8MBL_BE_GCC">
1833       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1834       <require condition="ARMv8MBL_GCC"/>
1835       <require Dendian="Big-endian"/>
1836     </condition>
1837
1838     <condition id="ARMv8MML_GCC">
1839       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1840       <require condition="ARMv8MML"/>
1841       <require Tcompiler="GCC"/>
1842     </condition>
1843     <condition id="ARMv8MML_LE_GCC">
1844       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1845       <require condition="ARMv8MML_GCC"/>
1846       <require Dendian="Little-endian"/>
1847     </condition>
1848     <condition id="ARMv8MML_BE_GCC">
1849       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1850       <require condition="ARMv8MML_GCC"/>
1851       <require Dendian="Big-endian"/>
1852     </condition>
1853
1854     <condition id="ARMv8MML_FP_GCC">
1855       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1856       <require condition="ARMv8MML_FP"/>
1857       <require Tcompiler="GCC"/>
1858     </condition>
1859     <condition id="ARMv8MML_FP_LE_GCC">
1860       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1861       <require condition="ARMv8MML_FP_GCC"/>
1862       <require Dendian="Little-endian"/>
1863     </condition>
1864     <condition id="ARMv8MML_FP_BE_GCC">
1865       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1866       <require condition="ARMv8MML_FP_GCC"/>
1867       <require Dendian="Big-endian"/>
1868     </condition>
1869
1870     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1871       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1872       <require condition="ARMv8MML_NODSP_NOFPU"/>
1873       <require Tcompiler="GCC"/>
1874     </condition>
1875     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1876       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1877       <require condition="ARMv8MML_DSP_NOFPU"/>
1878       <require Tcompiler="GCC"/>
1879     </condition>
1880     <condition id="ARMv8MML_NODSP_SP_GCC">
1881       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1882       <require condition="ARMv8MML_NODSP_SP"/>
1883       <require Tcompiler="GCC"/>
1884     </condition>
1885     <condition id="ARMv8MML_DSP_SP_GCC">
1886       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1887       <require condition="ARMv8MML_DSP_SP"/>
1888       <require Tcompiler="GCC"/>
1889     </condition>
1890     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1891       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1892       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1893       <require Dendian="Little-endian"/>
1894     </condition>
1895     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1896       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1897       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1898       <require Dendian="Little-endian"/>
1899     </condition>
1900     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1901       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1902       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1903       <require Dendian="Little-endian"/>
1904     </condition>
1905     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1906       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1907       <require condition="ARMv8MML_DSP_SP_GCC"/>
1908       <require Dendian="Little-endian"/>
1909     </condition>
1910
1911     <!-- IAR compiler -->
1912     <condition id="CA_IAR">
1913       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1914       <require condition="ARMv7-A Device"/>
1915       <require Tcompiler="IAR"/>
1916     </condition>
1917
1918     <condition id="CM0_IAR">
1919       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1920       <require condition="CM0"/>
1921       <require Tcompiler="IAR"/>
1922     </condition>
1923     <condition id="CM0_LE_IAR">
1924       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1925       <require condition="CM0_IAR"/>
1926       <require Dendian="Little-endian"/>
1927     </condition>
1928     <condition id="CM0_BE_IAR">
1929       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1930       <require condition="CM0_IAR"/>
1931       <require Dendian="Big-endian"/>
1932     </condition>
1933
1934     <condition id="CM1_IAR">
1935       <description>Cortex-M1 based device for the IAR Compiler</description>
1936       <require condition="CM1"/>
1937       <require Tcompiler="IAR"/>
1938     </condition>
1939     <condition id="CM1_LE_IAR">
1940       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1941       <require condition="CM1_IAR"/>
1942       <require Dendian="Little-endian"/>
1943     </condition>
1944     <condition id="CM1_BE_IAR">
1945       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1946       <require condition="CM1_IAR"/>
1947       <require Dendian="Big-endian"/>
1948     </condition>
1949
1950     <condition id="CM3_IAR">
1951       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1952       <require condition="CM3"/>
1953       <require Tcompiler="IAR"/>
1954     </condition>
1955     <condition id="CM3_LE_IAR">
1956       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1957       <require condition="CM3_IAR"/>
1958       <require Dendian="Little-endian"/>
1959     </condition>
1960     <condition id="CM3_BE_IAR">
1961       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1962       <require condition="CM3_IAR"/>
1963       <require Dendian="Big-endian"/>
1964     </condition>
1965
1966     <condition id="CM4_IAR">
1967       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1968       <require condition="CM4"/>
1969       <require Tcompiler="IAR"/>
1970     </condition>
1971     <condition id="CM4_LE_IAR">
1972       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1973       <require condition="CM4_IAR"/>
1974       <require Dendian="Little-endian"/>
1975     </condition>
1976     <condition id="CM4_BE_IAR">
1977       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1978       <require condition="CM4_IAR"/>
1979       <require Dendian="Big-endian"/>
1980     </condition>
1981
1982     <condition id="CM4_FP_IAR">
1983       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1984       <require condition="CM4_FP"/>
1985       <require Tcompiler="IAR"/>
1986     </condition>
1987     <condition id="CM4_FP_LE_IAR">
1988       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1989       <require condition="CM4_FP_IAR"/>
1990       <require Dendian="Little-endian"/>
1991     </condition>
1992     <condition id="CM4_FP_BE_IAR">
1993       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1994       <require condition="CM4_FP_IAR"/>
1995       <require Dendian="Big-endian"/>
1996     </condition>
1997
1998     <condition id="CM7_IAR">
1999       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2000       <require condition="CM7"/>
2001       <require Tcompiler="IAR"/>
2002     </condition>
2003     <condition id="CM7_LE_IAR">
2004       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2005       <require condition="CM7_IAR"/>
2006       <require Dendian="Little-endian"/>
2007     </condition>
2008     <condition id="CM7_BE_IAR">
2009       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2010       <require condition="CM7_IAR"/>
2011       <require Dendian="Big-endian"/>
2012     </condition>
2013
2014     <condition id="CM7_FP_IAR">
2015       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2016       <require condition="CM7_FP"/>
2017       <require Tcompiler="IAR"/>
2018     </condition>
2019     <condition id="CM7_FP_LE_IAR">
2020       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2021       <require condition="CM7_FP_IAR"/>
2022       <require Dendian="Little-endian"/>
2023     </condition>
2024     <condition id="CM7_FP_BE_IAR">
2025       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2026       <require condition="CM7_FP_IAR"/>
2027       <require Dendian="Big-endian"/>
2028     </condition>
2029
2030     <condition id="CM7_SP_IAR">
2031       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2032       <require condition="CM7_SP"/>
2033       <require Tcompiler="IAR"/>
2034     </condition>
2035     <condition id="CM7_SP_LE_IAR">
2036       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2037       <require condition="CM7_SP_IAR"/>
2038       <require Dendian="Little-endian"/>
2039     </condition>
2040     <condition id="CM7_SP_BE_IAR">
2041       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2042       <require condition="CM7_SP_IAR"/>
2043       <require Dendian="Big-endian"/>
2044     </condition>
2045
2046     <condition id="CM7_DP_IAR">
2047       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2048       <require condition="CM7_DP"/>
2049       <require Tcompiler="IAR"/>
2050     </condition>
2051     <condition id="CM7_DP_LE_IAR">
2052       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2053       <require condition="CM7_DP_IAR"/>
2054       <require Dendian="Little-endian"/>
2055     </condition>
2056     <condition id="CM7_DP_BE_IAR">
2057       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2058       <require condition="CM7_DP_IAR"/>
2059       <require Dendian="Big-endian"/>
2060     </condition>
2061
2062     <condition id="CM23_IAR">
2063       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2064       <require condition="CM23"/>
2065       <require Tcompiler="IAR"/>
2066     </condition>
2067     <condition id="CM23_LE_IAR">
2068       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2069       <require condition="CM23_IAR"/>
2070       <require Dendian="Little-endian"/>
2071     </condition>
2072     <condition id="CM23_BE_IAR">
2073       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
2074       <require condition="CM23_IAR"/>
2075       <require Dendian="Big-endian"/>
2076     </condition>
2077
2078     <condition id="CM33_IAR">
2079       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2080       <require condition="CM33"/>
2081       <require Tcompiler="IAR"/>
2082     </condition>
2083     <condition id="CM33_LE_IAR">
2084       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2085       <require condition="CM33_IAR"/>
2086       <require Dendian="Little-endian"/>
2087     </condition>
2088     <condition id="CM33_BE_IAR">
2089       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
2090       <require condition="CM33_IAR"/>
2091       <require Dendian="Big-endian"/>
2092     </condition>
2093
2094     <condition id="CM33_FP_IAR">
2095       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2096       <require condition="CM33_FP"/>
2097       <require Tcompiler="IAR"/>
2098     </condition>
2099     <condition id="CM33_FP_LE_IAR">
2100       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2101       <require condition="CM33_FP_IAR"/>
2102       <require Dendian="Little-endian"/>
2103     </condition>
2104     <condition id="CM33_FP_BE_IAR">
2105       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2106       <require condition="CM33_FP_IAR"/>
2107       <require Dendian="Big-endian"/>
2108     </condition>
2109
2110     <condition id="CM33_NODSP_NOFPU_IAR">
2111       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2112       <require condition="CM33_NODSP_NOFPU"/>
2113       <require Tcompiler="IAR"/>
2114     </condition>
2115     <condition id="CM33_DSP_NOFPU_IAR">
2116       <description>CM33, DSP, no FPU, IAR Compiler</description>
2117       <require condition="CM33_DSP_NOFPU"/>
2118       <require Tcompiler="IAR"/>
2119     </condition>
2120     <condition id="CM33_NODSP_SP_IAR">
2121       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2122       <require condition="CM33_NODSP_SP"/>
2123       <require Tcompiler="IAR"/>
2124     </condition>
2125     <condition id="CM33_DSP_SP_IAR">
2126       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2127       <require condition="CM33_DSP_SP"/>
2128       <require Tcompiler="IAR"/>
2129     </condition>
2130     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2131       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2132       <require condition="CM33_NODSP_NOFPU_IAR"/>
2133       <require Dendian="Little-endian"/>
2134     </condition>
2135     <condition id="CM33_DSP_NOFPU_LE_IAR">
2136       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2137       <require condition="CM33_DSP_NOFPU_IAR"/>
2138       <require Dendian="Little-endian"/>
2139     </condition>
2140     <condition id="CM33_NODSP_SP_LE_IAR">
2141       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2142       <require condition="CM33_NODSP_SP_IAR"/>
2143       <require Dendian="Little-endian"/>
2144     </condition>
2145     <condition id="CM33_DSP_SP_LE_IAR">
2146       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2147       <require condition="CM33_DSP_SP_IAR"/>
2148       <require Dendian="Little-endian"/>
2149     </condition>
2150
2151     <condition id="CM35P_IAR">
2152       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2153       <require condition="CM35P"/>
2154       <require Tcompiler="IAR"/>
2155     </condition>
2156     <condition id="CM35P_LE_IAR">
2157       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2158       <require condition="CM35P_IAR"/>
2159       <require Dendian="Little-endian"/>
2160     </condition>
2161     <condition id="CM35P_BE_IAR">
2162       <description>Cortex-M35P processor based device in big endian mode for the IAR Compiler</description>
2163       <require condition="CM35P_IAR"/>
2164       <require Dendian="Big-endian"/>
2165     </condition>
2166
2167     <condition id="CM35P_FP_IAR">
2168       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2169       <require condition="CM35P_FP"/>
2170       <require Tcompiler="IAR"/>
2171     </condition>
2172     <condition id="CM35P_FP_LE_IAR">
2173       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2174       <require condition="CM35P_FP_IAR"/>
2175       <require Dendian="Little-endian"/>
2176     </condition>
2177     <condition id="CM35P_FP_BE_IAR">
2178       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2179       <require condition="CM35P_FP_IAR"/>
2180       <require Dendian="Big-endian"/>
2181     </condition>
2182
2183     <condition id="CM35P_NODSP_NOFPU_IAR">
2184       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2185       <require condition="CM35P_NODSP_NOFPU"/>
2186       <require Tcompiler="IAR"/>
2187     </condition>
2188     <condition id="CM35P_DSP_NOFPU_IAR">
2189       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2190       <require condition="CM35P_DSP_NOFPU"/>
2191       <require Tcompiler="IAR"/>
2192     </condition>
2193     <condition id="CM35P_NODSP_SP_IAR">
2194       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2195       <require condition="CM35P_NODSP_SP"/>
2196       <require Tcompiler="IAR"/>
2197     </condition>
2198     <condition id="CM35P_DSP_SP_IAR">
2199       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2200       <require condition="CM35P_DSP_SP"/>
2201       <require Tcompiler="IAR"/>
2202     </condition>
2203     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2204       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2205       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2206       <require Dendian="Little-endian"/>
2207     </condition>
2208     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2209       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2210       <require condition="CM35P_DSP_NOFPU_IAR"/>
2211       <require Dendian="Little-endian"/>
2212     </condition>
2213     <condition id="CM35P_NODSP_SP_LE_IAR">
2214       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2215       <require condition="CM35P_NODSP_SP_IAR"/>
2216       <require Dendian="Little-endian"/>
2217     </condition>
2218     <condition id="CM35P_DSP_SP_LE_IAR">
2219       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2220       <require condition="CM35P_DSP_SP_IAR"/>
2221       <require Dendian="Little-endian"/>
2222     </condition>
2223
2224     <condition id="ARMv8MBL_IAR">
2225       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2226       <require condition="ARMv8MBL"/>
2227       <require Tcompiler="IAR"/>
2228     </condition>
2229     <condition id="ARMv8MBL_LE_IAR">
2230       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2231       <require condition="ARMv8MBL_IAR"/>
2232       <require Dendian="Little-endian"/>
2233     </condition>
2234     <condition id="ARMv8MBL_BE_IAR">
2235       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
2236       <require condition="ARMv8MBL_IAR"/>
2237       <require Dendian="Big-endian"/>
2238     </condition>
2239
2240     <condition id="ARMv8MML_IAR">
2241       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2242       <require condition="ARMv8MML"/>
2243       <require Tcompiler="IAR"/>
2244     </condition>
2245     <condition id="ARMv8MML_LE_IAR">
2246       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2247       <require condition="ARMv8MML_IAR"/>
2248       <require Dendian="Little-endian"/>
2249     </condition>
2250     <condition id="ARMv8MML_BE_IAR">
2251       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
2252       <require condition="ARMv8MML_IAR"/>
2253       <require Dendian="Big-endian"/>
2254     </condition>
2255
2256     <condition id="ARMv8MML_FP_IAR">
2257       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2258       <require condition="ARMv8MML_FP"/>
2259       <require Tcompiler="IAR"/>
2260     </condition>
2261     <condition id="ARMv8MML_FP_LE_IAR">
2262       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2263       <require condition="ARMv8MML_FP_IAR"/>
2264       <require Dendian="Little-endian"/>
2265     </condition>
2266     <condition id="ARMv8MML_FP_BE_IAR">
2267       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2268       <require condition="ARMv8MML_FP_IAR"/>
2269       <require Dendian="Big-endian"/>
2270     </condition>
2271
2272     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2273       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2274       <require condition="ARMv8MML_NODSP_NOFPU"/>
2275       <require Tcompiler="IAR"/>
2276     </condition>
2277     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2278       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2279       <require condition="ARMv8MML_DSP_NOFPU"/>
2280       <require Tcompiler="IAR"/>
2281     </condition>
2282     <condition id="ARMv8MML_NODSP_SP_IAR">
2283       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2284       <require condition="ARMv8MML_NODSP_SP"/>
2285       <require Tcompiler="IAR"/>
2286     </condition>
2287     <condition id="ARMv8MML_DSP_SP_IAR">
2288       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2289       <require condition="ARMv8MML_DSP_SP"/>
2290       <require Tcompiler="IAR"/>
2291     </condition>
2292     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2293       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2294       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2295       <require Dendian="Little-endian"/>
2296     </condition>
2297     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2298       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2299       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2300       <require Dendian="Little-endian"/>
2301     </condition>
2302     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2303       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2304       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2305       <require Dendian="Little-endian"/>
2306     </condition>
2307     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2308       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2309       <require condition="ARMv8MML_DSP_SP_IAR"/>
2310       <require Dendian="Little-endian"/>
2311     </condition>
2312
2313     <!-- conditions selecting single devices and CMSIS Core -->
2314     <!-- used for component startup, GCC version is used for C-Startup -->
2315     <condition id="ARMCM0 CMSIS">
2316       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2317       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2318       <require Cclass="CMSIS" Cgroup="CORE"/>
2319     </condition>
2320     <condition id="ARMCM0 CMSIS GCC">
2321       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
2322       <require condition="ARMCM0 CMSIS"/>
2323       <require condition="GCC"/>
2324     </condition>
2325
2326     <condition id="ARMCM0+ CMSIS">
2327       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2328       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2329       <require Cclass="CMSIS" Cgroup="CORE"/>
2330     </condition>
2331     <condition id="ARMCM0+ CMSIS GCC">
2332       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
2333       <require condition="ARMCM0+ CMSIS"/>
2334       <require condition="GCC"/>
2335     </condition>
2336
2337     <condition id="ARMCM1 CMSIS">
2338       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2339       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2340       <require Cclass="CMSIS" Cgroup="CORE"/>
2341     </condition>
2342     <condition id="ARMCM1 CMSIS GCC">
2343       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
2344       <require condition="ARMCM1 CMSIS"/>
2345       <require condition="GCC"/>
2346     </condition>
2347
2348     <condition id="ARMCM3 CMSIS">
2349       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2350       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2351       <require Cclass="CMSIS" Cgroup="CORE"/>
2352     </condition>
2353     <condition id="ARMCM3 CMSIS GCC">
2354       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
2355       <require condition="ARMCM3 CMSIS"/>
2356       <require condition="GCC"/>
2357     </condition>
2358
2359     <condition id="ARMCM4 CMSIS">
2360       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2361       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2362       <require Cclass="CMSIS" Cgroup="CORE"/>
2363     </condition>
2364     <condition id="ARMCM4 CMSIS GCC">
2365       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
2366       <require condition="ARMCM4 CMSIS"/>
2367       <require condition="GCC"/>
2368     </condition>
2369
2370     <condition id="ARMCM7 CMSIS">
2371       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2372       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2373       <require Cclass="CMSIS" Cgroup="CORE"/>
2374     </condition>
2375     <condition id="ARMCM7 CMSIS GCC">
2376       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2377       <require condition="ARMCM7 CMSIS"/>
2378       <require condition="GCC"/>
2379     </condition>
2380
2381     <condition id="ARMCM23 CMSIS">
2382       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2383       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2384       <require Cclass="CMSIS" Cgroup="CORE"/>
2385     </condition>
2386     <condition id="ARMCM23 CMSIS GCC">
2387       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2388       <require condition="ARMCM23 CMSIS"/>
2389       <require condition="GCC"/>
2390     </condition>
2391
2392     <condition id="ARMCM33 CMSIS">
2393       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2394       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2395       <require Cclass="CMSIS" Cgroup="CORE"/>
2396     </condition>
2397     <condition id="ARMCM33 CMSIS GCC">
2398       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2399       <require condition="ARMCM33 CMSIS"/>
2400       <require condition="GCC"/>
2401     </condition>
2402
2403     <condition id="ARMCM35P CMSIS">
2404       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2405       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2406       <require Cclass="CMSIS" Cgroup="CORE"/>
2407     </condition>
2408     <condition id="ARMCM35P CMSIS GCC">
2409       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core requiring GCC</description>
2410       <require condition="ARMCM35P CMSIS"/>
2411       <require condition="GCC"/>
2412     </condition>
2413
2414     <condition id="ARMSC000 CMSIS">
2415       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2416       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2417       <require Cclass="CMSIS" Cgroup="CORE"/>
2418     </condition>
2419     <condition id="ARMSC000 CMSIS GCC">
2420       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2421       <require condition="ARMSC000 CMSIS"/>
2422       <require condition="GCC"/>
2423     </condition>
2424
2425     <condition id="ARMSC300 CMSIS">
2426       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2427       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2428       <require Cclass="CMSIS" Cgroup="CORE"/>
2429     </condition>
2430     <condition id="ARMSC300 CMSIS GCC">
2431       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2432       <require condition="ARMSC300 CMSIS"/>
2433       <require condition="GCC"/>
2434     </condition>
2435
2436     <condition id="ARMv8MBL CMSIS">
2437       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2438       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2439       <require Cclass="CMSIS" Cgroup="CORE"/>
2440     </condition>
2441     <condition id="ARMv8MBL CMSIS GCC">
2442       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2443       <require condition="ARMv8MBL CMSIS"/>
2444       <require condition="GCC"/>
2445     </condition>
2446
2447     <condition id="ARMv8MML CMSIS">
2448       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2449       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2450       <require Cclass="CMSIS" Cgroup="CORE"/>
2451     </condition>
2452     <condition id="ARMv8MML CMSIS GCC">
2453       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2454       <require condition="ARMv8MML CMSIS"/>
2455       <require condition="GCC"/>
2456     </condition>
2457
2458     <condition id="ARMv81MML CMSIS">
2459       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2460       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2461       <require Cclass="CMSIS" Cgroup="CORE"/>
2462     </condition>
2463     <condition id="ARMv81MML CMSIS GCC">
2464       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2465       <require condition="ARMv81MML CMSIS"/>
2466       <require condition="GCC"/>
2467     </condition>
2468
2469     <condition id="ARMCA5 CMSIS">
2470       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2471       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2472       <require Cclass="CMSIS" Cgroup="CORE"/>
2473     </condition>
2474
2475     <condition id="ARMCA7 CMSIS">
2476       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2477       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2478       <require Cclass="CMSIS" Cgroup="CORE"/>
2479     </condition>
2480
2481     <condition id="ARMCA9 CMSIS">
2482       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2483       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2484       <require Cclass="CMSIS" Cgroup="CORE"/>
2485     </condition>
2486
2487     <!-- CMSIS DSP -->
2488     <condition id="CMSIS DSP">
2489       <description>Components required for DSP</description>
2490       <require condition="ARMv6_7_8-M Device"/>
2491       <require condition="ARMCC GCC IAR"/>
2492       <require Cclass="CMSIS" Cgroup="CORE"/>
2493     </condition>
2494
2495     <!-- CMSIS NN -->
2496     <condition id="CMSIS NN">
2497       <description>Components required for NN</description>
2498       <require condition="CMSIS DSP"/>
2499     </condition>
2500
2501     <!-- RTOS RTX -->
2502     <condition id="RTOS RTX">
2503       <description>Components required for RTOS RTX</description>
2504       <require condition="ARMv6_7-M Device"/>
2505       <require condition="ARMCC GCC IAR"/>
2506       <require Cclass="Device" Cgroup="Startup"/>
2507       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2508     </condition>
2509     <condition id="RTOS RTX IFX">
2510       <description>Components required for RTOS RTX IFX</description>
2511       <require condition="ARMv6_7-M Device"/>
2512       <require condition="ARMCC GCC IAR"/>
2513       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2514       <require Cclass="Device" Cgroup="Startup"/>
2515       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2516     </condition>
2517     <condition id="RTOS RTX5">
2518       <description>Components required for RTOS RTX5</description>
2519       <require condition="ARMv6_7_8-M Device"/>
2520       <require condition="ARMCC GCC IAR"/>
2521       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2522     </condition>
2523     <condition id="RTOS2 RTX5">
2524       <description>Components required for RTOS2 RTX5</description>
2525       <require condition="ARMv6_7_8-M Device"/>
2526       <require condition="ARMCC GCC IAR"/>
2527       <require Cclass="CMSIS"  Cgroup="CORE"/>
2528       <require Cclass="Device" Cgroup="Startup"/>
2529     </condition>
2530     <condition id="RTOS2 RTX5 v7-A">
2531       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2532       <require condition="ARMv7-A Device"/>
2533       <require condition="ARMCC GCC IAR"/>
2534       <require Cclass="CMSIS"  Cgroup="CORE"/>
2535       <require Cclass="Device" Cgroup="Startup"/>
2536       <require Cclass="Device" Cgroup="OS Tick"/>
2537       <require Cclass="Device" Cgroup="IRQ Controller"/>
2538     </condition>
2539     <condition id="RTOS2 RTX5 Lib">
2540       <description>Components required for RTOS2 RTX5 Library</description>
2541       <require condition="ARMv6_7_8-M Device"/>
2542       <require condition="ARMCC GCC IAR"/>
2543       <require Cclass="CMSIS"  Cgroup="CORE"/>
2544       <require Cclass="Device" Cgroup="Startup"/>
2545     </condition>
2546     <condition id="RTOS2 RTX5 NS">
2547       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2548       <require condition="ARMv8-M TZ Device"/>
2549       <require condition="ARMCC GCC IAR"/>
2550       <require Cclass="CMSIS"  Cgroup="CORE"/>
2551       <require Cclass="Device" Cgroup="Startup"/>
2552     </condition>
2553
2554     <!-- OS Tick -->
2555     <condition id="OS Tick PTIM">
2556       <description>Components required for OS Tick Private Timer</description>
2557       <require condition="CA5_CA9"/>
2558       <require Cclass="Device" Cgroup="IRQ Controller"/>
2559     </condition>
2560
2561     <condition id="OS Tick GTIM">
2562       <description>Components required for OS Tick Generic Physical Timer</description>
2563       <require condition="CA7"/>
2564       <require Cclass="Device" Cgroup="IRQ Controller"/>
2565     </condition>
2566
2567   </conditions>
2568
2569   <components>
2570     <!-- CMSIS-Core component -->
2571     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.2.0"  condition="ARMv6_7_8-M Device" >
2572       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2573       <files>
2574         <!-- CPU independent -->
2575         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2576         <file category="include" name="CMSIS/Core/Include/"/>
2577         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2578         <!-- Code template -->
2579         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2580         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2581       </files>
2582     </component>
2583
2584     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.3"  condition="ARMv7-A Device" >
2585       <description>CMSIS-CORE for Cortex-A</description>
2586       <files>
2587         <!-- CPU independent -->
2588         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2589         <file category="include" name="CMSIS/Core_A/Include/"/>
2590       </files>
2591     </component>
2592
2593     <!-- CMSIS-Startup components -->
2594     <!-- Cortex-M0 -->
2595     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2596       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2597       <files>
2598         <!-- include folder / device header file -->
2599         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2600         <!-- startup / system file -->
2601         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2602         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2603         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2604         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2605         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2606       </files>
2607     </component>
2608     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2609       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2610       <files>
2611         <!-- include folder / device header file -->
2612         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2613         <!-- startup / system file -->
2614         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.1.0" attr="config" condition="GCC"/>
2615         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2616         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2617       </files>
2618     </component>
2619
2620     <!-- Cortex-M0+ -->
2621     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2622       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2623       <files>
2624         <!-- include folder / device header file -->
2625         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2626         <!-- startup / system file -->
2627         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2628         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2629         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2630         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2631         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2632       </files>
2633     </component>
2634     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2635       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2636       <files>
2637         <!-- include folder / device header file -->
2638         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2639         <!-- startup / system file -->
2640         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.1.0" attr="config" condition="GCC"/>
2641         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2642         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2643       </files>
2644     </component>
2645
2646     <!-- Cortex-M1 -->
2647     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM1 CMSIS">
2648       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2649       <files>
2650         <!-- include folder / device header file -->
2651         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2652         <!-- startup / system file -->
2653         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2654         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.0.0" attr="config" condition="GCC"/>
2655         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2656         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2657         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2658       </files>
2659     </component>
2660     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM1 CMSIS GCC">
2661       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2662       <files>
2663         <!-- include folder / device header file -->
2664         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2665         <!-- startup / system file -->
2666         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.1.0" attr="config" condition="GCC"/>
2667         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2668         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2669       </files>
2670     </component>
2671
2672     <!-- Cortex-M3 -->
2673     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2674       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2675       <files>
2676         <!-- include folder / device header file -->
2677         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2678         <!-- startup / system file -->
2679         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2680         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2681         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2682         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2683         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2684       </files>
2685     </component>
2686     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2687       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2688       <files>
2689         <!-- include folder / device header file -->
2690         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2691         <!-- startup / system file -->
2692         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.1.0" attr="config" condition="GCC"/>
2693         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2694         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2695       </files>
2696     </component>
2697
2698     <!-- Cortex-M4 -->
2699     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2700       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2701       <files>
2702         <!-- include folder / device header file -->
2703         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2704         <!-- startup / system file -->
2705         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2706         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2707         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2708         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2709         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2710       </files>
2711     </component>
2712     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2713       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2714       <files>
2715         <!-- include folder / device header file -->
2716         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2717         <!-- startup / system file -->
2718         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.1.0" attr="config" condition="GCC"/>
2719         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2720         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2721       </files>
2722     </component>
2723
2724     <!-- Cortex-M7 -->
2725     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2726       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2727       <files>
2728         <!-- include folder / device header file -->
2729         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2730         <!-- startup / system file -->
2731         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2732         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2733         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2734         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2735         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2736       </files>
2737     </component>
2738     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2739       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2740       <files>
2741         <!-- include folder / device header file -->
2742         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2743         <!-- startup / system file -->
2744         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.1.0" attr="config" condition="GCC"/>
2745         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2746         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2747       </files>
2748     </component>
2749
2750     <!-- Cortex-M23 -->
2751     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2752       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2753       <files>
2754         <!-- include folder / device header file -->
2755         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2756         <!-- startup / system file -->
2757         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2758         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2759         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2760         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2761         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2762         <!-- SAU configuration -->
2763         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2764       </files>
2765     </component>
2766     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2767       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2768       <files>
2769         <!-- include folder / device header file -->
2770         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2771         <!-- startup / system file -->
2772         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.1.0" attr="config" condition="GCC"/>
2773         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2774         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2775         <!-- SAU configuration -->
2776         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2777       </files>
2778     </component>
2779
2780     <!-- Cortex-M33 -->
2781     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2782       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2783       <files>
2784         <!-- include folder / device header file -->
2785         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2786         <!-- startup / system file -->
2787         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2788         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2789         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2790         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2791         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2792         <!-- SAU configuration -->
2793         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2794       </files>
2795     </component>
2796     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2797       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2798       <files>
2799         <!-- include folder / device header file -->
2800         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2801         <!-- startup / system file -->
2802         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.1.0" attr="config" condition="GCC"/>
2803         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2804         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2805         <!-- SAU configuration -->
2806         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2807       </files>
2808     </component>
2809
2810     <!-- Cortex-M35P -->
2811     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM35P CMSIS">
2812       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2813       <files>
2814         <!-- include folder / device header file -->
2815         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2816         <!-- startup / system file -->
2817         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2818         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.0" attr="config" condition="GCC"/>
2819         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2820         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="IAR"/>
2821         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2822         <!-- SAU configuration -->
2823         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2824       </files>
2825     </component>
2826     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM35P CMSIS GCC">
2827       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2828       <files>
2829         <!-- include folder / device header file -->
2830         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2831         <!-- startup / system file -->
2832         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.c"         version="1.0.0" attr="config" condition="GCC"/>
2833         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2834         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2835         <!-- SAU configuration -->
2836         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2837       </files>
2838     </component>
2839
2840     <!-- Cortex-SC000 -->
2841     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2842       <description>System and Startup for Generic Arm SC000 device</description>
2843       <files>
2844         <!-- include folder / device header file -->
2845         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2846         <!-- startup / system file -->
2847         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2848         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2849         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2850         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2851         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2852       </files>
2853     </component>
2854     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2855       <description>System and Startup for Generic Arm SC000 device</description>
2856       <files>
2857         <!-- include folder / device header file -->
2858         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2859         <!-- startup / system file -->
2860         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.1.0" attr="config" condition="GCC"/>
2861         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2862         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2863       </files>
2864     </component>
2865
2866     <!-- Cortex-SC300 -->
2867     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2868       <description>System and Startup for Generic Arm SC300 device</description>
2869       <files>
2870         <!-- include folder / device header file -->
2871         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2872         <!-- startup / system file -->
2873         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2874         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2875         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2876         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2877         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2878       </files>
2879     </component>
2880     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2881       <description>System and Startup for Generic Arm SC300 device</description>
2882       <files>
2883         <!-- include folder / device header file -->
2884         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2885         <!-- startup / system file -->
2886         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.1.0" attr="config" condition="GCC"/>
2887         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2888         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2889       </files>
2890     </component>
2891
2892     <!-- ARMv8MBL -->
2893     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2894       <description>System and Startup for Generic Armv8-M Baseline device</description>
2895       <files>
2896         <!-- include folder / device header file -->
2897         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2898         <!-- startup / system file -->
2899         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2900         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2901         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2902         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2903         <!-- SAU configuration -->
2904         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2905       </files>
2906     </component>
2907     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2908       <description>System and Startup for Generic Armv8-M Baseline device</description>
2909       <files>
2910         <!-- include folder / device header file -->
2911         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2912         <!-- startup / system file -->
2913         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.1.0" attr="config" condition="GCC"/>
2914         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2915         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2916         <!-- SAU configuration -->
2917         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2918       </files>
2919     </component>
2920
2921     <!-- ARMv8MML -->
2922     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2923       <description>System and Startup for Generic Armv8-M Mainline device</description>
2924       <files>
2925         <!-- include folder / device header file -->
2926         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2927         <!-- startup / system file -->
2928         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2929         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2930         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2931         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2932         <!-- SAU configuration -->
2933         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2934       </files>
2935     </component>
2936     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2937       <description>System and Startup for Generic Armv8-M Mainline device</description>
2938       <files>
2939         <!-- include folder / device header file -->
2940         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2941         <!-- startup / system file -->
2942         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.1.0" attr="config" condition="GCC"/>
2943         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2944         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2945         <!-- SAU configuration -->
2946         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2947       </files>
2948     </component>
2949
2950     <!-- ARMv81MML -->
2951     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv81MML CMSIS">
2952       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2953       <files>
2954         <!-- include folder / device header file -->
2955         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2956         <file category="header"       name="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h"/>
2957         <!-- startup / system file -->
2958         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/ARM/startup_ARMv81MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2959         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2960         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2961         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/IAR/startup_ARMv81MML.s"         version="1.0.0" attr="config" condition="IAR"/>
2962         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2963         <!-- SAU configuration -->
2964         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2965       </files>
2966     </component>
2967     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv81MML CMSIS GCC">
2968       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2969       <files>
2970         <!-- include folder / device header file -->
2971         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2972         <!-- startup / system file -->
2973         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2974         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2975         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2976         <!-- SAU configuration -->
2977         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2978       </files>
2979     </component>
2980
2981     <!-- Cortex-A5 -->
2982     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2983       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2984       <files>
2985         <!-- include folder / device header file -->
2986         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2987         <!-- startup / system / mmu files -->
2988         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2989         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2990         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2991         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2992         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2993         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2994         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2995         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2996         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2997         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2998         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2999         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
3000
3001       </files>
3002     </component>
3003
3004     <!-- Cortex-A7 -->
3005     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3006       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3007       <files>
3008         <!-- include folder / device header file -->
3009         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3010         <!-- startup / system / mmu files -->
3011         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3012         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3013         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3014         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3015         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3016         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3017         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3018         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3019         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3020         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
3021         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
3022         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
3023       </files>
3024     </component>
3025
3026     <!-- Cortex-A9 -->
3027     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3028       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3029       <files>
3030         <!-- include folder / device header file -->
3031         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3032         <!-- startup / system / mmu files -->
3033         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3034         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3035         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3036         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3037         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3038         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3039         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3040         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3041         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3042         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
3043         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
3044         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
3045       </files>
3046     </component>
3047
3048     <!-- IRQ Controller -->
3049     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3050       <description>IRQ Controller implementation using GIC</description>
3051       <files>
3052         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3053       </files>
3054     </component>
3055
3056     <!-- OS Tick -->
3057     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3058       <description>OS Tick implementation using Private Timer</description>
3059       <files>
3060         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3061       </files>
3062     </component>
3063
3064     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3065       <description>OS Tick implementation using Generic Physical Timer</description>
3066       <files>
3067         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3068       </files>
3069     </component>
3070
3071     <!-- CMSIS-DSP component -->
3072     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.6.0" isDefaultVariant="true" condition="CMSIS DSP">
3073       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3074       <files>
3075         <!-- CPU independent -->
3076         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3077         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3078
3079         <!-- CPU and Compiler dependent -->
3080         <!-- ARMCC -->
3081         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3082         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3083         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3084         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3085         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3086         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3087         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3088         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3089         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3090         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3091         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3092         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3093         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3094         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3095         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3096         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3097
3098         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3099         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3100         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3101         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3102         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3103         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3104         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3105         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3106         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3107         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3108         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3109         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3110         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3111         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3112         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3113         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3114
3115         <!-- GCC -->
3116         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3117         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3118         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3119         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3120         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3121         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3122         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3123         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3124
3125         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3126         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3127         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3128         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3129         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3130         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3131         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3132         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3133         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3134         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3135         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3136         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3137         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3138         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3139         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3140         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3141
3142         <!-- IAR -->
3143         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3144         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3145         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3146         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3147         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3148         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3149         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3150         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3151         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3152         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3153         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3154         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3155         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3156         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3157         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3158         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3159
3160         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3161         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3162         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3163         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3164         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3165         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3166         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3167         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3168         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3169         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3170         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3171         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3172         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3173         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3174         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3175         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3176
3177       </files>
3178     </component>
3179     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.6.0" condition="CMSIS DSP">
3180       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3181       <files>
3182         <!-- CPU independent -->
3183         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3184         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3185
3186         <!-- RTX sources (core) -->
3187         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3188         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3189         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3190         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3191         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3192         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3193         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3194         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3195         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3196         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3197
3198       </files>
3199     </component>
3200
3201     <!-- CMSIS-NN component -->
3202     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.1.0" condition="CMSIS NN">
3203       <description>CMSIS-NN Neural Network Library</description>
3204       <files>
3205         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3206         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3207
3208         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3209         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3210         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3211         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3212
3213         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3214         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3215         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3216         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3217         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3218         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3219         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3220         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3221         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3222         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3223         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3224         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3225
3226         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3227         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3228         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3229         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3230         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3231         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3232
3233         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3234         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3235         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3236         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3237         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3238
3239         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3240
3241         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3242         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3243       </files>
3244     </component>
3245
3246     <!-- CMSIS-RTOS Keil RTX component -->
3247     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3248       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3249       <RTE_Components_h>
3250         <!-- the following content goes into file 'RTE_Components.h' -->
3251         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3252         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3253       </RTE_Components_h>
3254       <files>
3255         <!-- CPU independent -->
3256         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3257         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3258         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3259
3260         <!-- RTX templates -->
3261         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3262         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3263         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3264         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3265         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3266         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3267         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3268         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3269         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3270         <!-- tool-chain specific template file -->
3271         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3272         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3273         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3274
3275         <!-- CPU and Compiler dependent -->
3276         <!-- ARMCC -->
3277         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3278         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3279         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3280         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3281         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3282         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3283         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3284         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3285         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3286         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3287         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3288         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3289         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3290         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3291         <!-- GCC -->
3292         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3293         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3294         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3295         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3296         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3297         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3298         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3299         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3300         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3301         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3302         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3303         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3304         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3305         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3306         <!-- IAR -->
3307         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3308         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3309         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3310         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3311         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3312         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3313         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3314         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3315         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3316         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3317         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3318         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3319         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3320         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3321       </files>
3322     </component>
3323     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3324     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
3325       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3326       <RTE_Components_h>
3327         <!-- the following content goes into file 'RTE_Components.h' -->
3328         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3329         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3330       </RTE_Components_h>
3331       <files>
3332         <!-- CPU independent -->
3333         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3334         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3335         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3336
3337         <!-- RTX templates -->
3338         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3339         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3340         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3341         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3342         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3343         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3344         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3345         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3346         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3347         <!-- tool-chain specific template file -->
3348         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3349         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3350         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3351
3352         <!-- CPU and Compiler dependent -->
3353         <!-- ARMCC -->
3354         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3355         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3356         <!-- GCC -->
3357         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3358         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3359         <!-- IAR -->
3360       </files>
3361     </component>
3362
3363     <!-- CMSIS-RTOS Keil RTX5 component -->
3364     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.0" Capiversion="1.0.0" condition="RTOS RTX5">
3365       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3366       <RTE_Components_h>
3367         <!-- the following content goes into file 'RTE_Components.h' -->
3368         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3369         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3370       </RTE_Components_h>
3371       <files>
3372         <!-- RTX header file -->
3373         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3374         <!-- RTX compatibility module for API V1 -->
3375         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3376       </files>
3377     </component>
3378
3379     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3380     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3381       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3382       <RTE_Components_h>
3383         <!-- the following content goes into file 'RTE_Components.h' -->
3384         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3385         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3386       </RTE_Components_h>
3387       <files>
3388         <!-- RTX documentation -->
3389         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3390
3391         <!-- RTX header files -->
3392         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3393
3394         <!-- RTX configuration -->
3395         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3396         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3397
3398         <!-- RTX templates -->
3399         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3400         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3401         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3402         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3403         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3404         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3405         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3406         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3407         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3408         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3409
3410         <!-- RTX library configuration -->
3411         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3412
3413         <!-- RTX libraries (CPU and Compiler dependent) -->
3414         <!-- ARMCC -->
3415         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3416         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3417         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3418         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3419         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3420         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3421         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3422         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3423         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3424         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3425         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3426         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3427         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3428         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3429         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3430         <!-- GCC -->
3431         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3432         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3433         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3434         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3435         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3436         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3437         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3438         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3439         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3440         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3441         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3442         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3443         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3444         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3445         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3446         <!-- IAR -->
3447         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3448         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3449         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3450         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3451         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3452         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3453         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3454         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3455         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3456         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3457         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3458         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3459         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3460         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3461         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3462       </files>
3463     </component>
3464     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3465       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3466       <RTE_Components_h>
3467         <!-- the following content goes into file 'RTE_Components.h' -->
3468         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3469         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3470         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3471       </RTE_Components_h>
3472       <files>
3473         <!-- RTX documentation -->
3474         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3475
3476         <!-- RTX header files -->
3477         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3478
3479         <!-- RTX configuration -->
3480         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3481         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3482
3483         <!-- RTX templates -->
3484         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3485         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3486         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3487         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3488         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3489         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3490         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3491         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3492         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3493         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3494
3495         <!-- RTX library configuration -->
3496         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3497
3498         <!-- RTX libraries (CPU and Compiler dependent) -->
3499         <!-- ARMCC -->
3500         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3501         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3502         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3503         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3504         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3505         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3506         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3507         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3508         <!-- GCC -->
3509         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3510         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3512         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3513         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3514         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3515         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3517         <!-- IAR -->
3518         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3521         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3523         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3524         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3525         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3526       </files>
3527     </component>
3528     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
3529       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3530       <RTE_Components_h>
3531         <!-- the following content goes into file 'RTE_Components.h' -->
3532         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3533         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3534         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3535       </RTE_Components_h>
3536       <files>
3537         <!-- RTX documentation -->
3538         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3539
3540         <!-- RTX header files -->
3541         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3542
3543         <!-- RTX configuration -->
3544         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3545         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3546
3547         <!-- RTX templates -->
3548         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3549         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3550         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3551         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3552         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3553         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3554         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3555         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3556         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3557         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3558
3559         <!-- RTX sources (core) -->
3560         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3561         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3562         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3563         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3564         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3565         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3569         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3571         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3572         <!-- RTX sources (library configuration) -->
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3574         <!-- RTX sources (handlers ARMCC) -->
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3578         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3590         <!-- RTX sources (handlers GCC) -->
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3596         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3597         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3603         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3604         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3605         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3606         <!-- RTX sources (handlers IAR) -->
3607         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3608         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3609         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3610         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3611         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3612         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3613         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3614         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3615         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3616         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3617         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3618         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3619         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3620         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3621         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3622         <!-- OS Tick (SysTick) -->
3623         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3624       </files>
3625     </component>
3626     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3627       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3628       <RTE_Components_h>
3629         <!-- the following content goes into file 'RTE_Components.h' -->
3630         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3631         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3632         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3633       </RTE_Components_h>
3634       <files>
3635         <!-- RTX documentation -->
3636         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3637
3638         <!-- RTX header files -->
3639         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3640
3641         <!-- RTX configuration -->
3642         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3643         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3644
3645         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3646
3647         <!-- RTX templates -->
3648         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3649         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3650         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3651         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3652         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3653         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3654         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3655         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3656         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3657         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3658
3659         <!-- RTX sources (core) -->
3660         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3661         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3662         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3663         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3664         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3665         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3669         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3671         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3672         <!-- RTX sources (library configuration) -->
3673         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3674         <!-- RTX sources (handlers ARMCC) -->
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3676         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3677         <!-- RTX sources (handlers GCC) -->
3678         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3679         <!-- RTX sources (handlers IAR) -->
3680         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3681       </files>
3682     </component>
3683     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3684       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3685       <RTE_Components_h>
3686         <!-- the following content goes into file 'RTE_Components.h' -->
3687         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3688         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3689         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3690         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3691       </RTE_Components_h>
3692       <files>
3693         <!-- RTX documentation -->
3694         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3695
3696         <!-- RTX header files -->
3697         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3698
3699         <!-- RTX configuration -->
3700         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3701         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3702
3703         <!-- RTX templates -->
3704         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3705         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3706         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3707         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3708         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3709         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3710         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3711         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3712         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3713         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3714
3715         <!-- RTX sources (core) -->
3716         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3717         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3718         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3719         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3720         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3721         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3722         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3724         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3725         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3726         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3727         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3728         <!-- RTX sources (library configuration) -->
3729         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3730         <!-- RTX sources (ARMCC handlers) -->
3731         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3732         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3733         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3734         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3735         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3736         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3737         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3738         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3739         <!-- RTX sources (GCC handlers) -->
3740         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3741         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3742         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3743         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3745         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3747         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3748         <!-- RTX sources (IAR handlers) -->
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3752         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3754         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3755         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3757         <!-- OS Tick (SysTick) -->
3758         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3759       </files>
3760     </component>
3761
3762     <!-- CMSIS-Driver Custom components -->
3763     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3764       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3765       <files>
3766         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3767         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3768       </files>
3769     </component>
3770     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3771       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3772       <files>
3773         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3774         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3775       </files>
3776     </component>
3777     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3778       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3779       <files>
3780         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3781         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3782       </files>
3783     </component>
3784     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3785       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3786       <files>
3787         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3788         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3789       </files>
3790     </component>
3791     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3792       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3793       <files>
3794         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3795         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3796       </files>
3797     </component>
3798     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3799       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3800       <files>
3801         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3802         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3803       </files>
3804     </component>
3805     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3806       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3807       <files>
3808         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3809         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3810       </files>
3811     </component>
3812     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3813       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3814       <files>
3815         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3816         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3817       </files>
3818     </component>
3819     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3820       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3821       <files>
3822         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3823         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3824         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3825         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3826       </files>
3827     </component>
3828     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3829       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3830       <files>
3831         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3832         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3833       </files>
3834     </component>
3835     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3836       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3837       <files>
3838         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3839         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3840       </files>
3841     </component>
3842     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3843       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3844       <files>
3845         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3846         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3847       </files>
3848     </component>
3849     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3850       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3851       <files>
3852         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3853         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3854       </files>
3855     </component>
3856     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0-beta" Capiversion="1.0.0-beta">
3857       <description>Access to #include Driver_WiFi.h file</description>
3858       <files>
3859         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3860         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3861       </files>
3862     </component>
3863   </components>
3864
3865   <boards>
3866     <board name="uVision Simulator" vendor="Keil">
3867       <description>uVision Simulator</description>
3868       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3869       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3870       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3871       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3872       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3873       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3874       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3875       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3876       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3877       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3878       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3879       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3880       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3881       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3882       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3883       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3884       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3885       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3886       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3887       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3888       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3889       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3890       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3891       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3892     </board>
3893
3894     <board name="EWARM Simulator" vendor="IAR">
3895       <description>EWARM Simulator</description>
3896       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3897       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3898       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3899       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3900       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3901       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3902       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3903       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3904       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3905       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3906       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3907       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3908       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3909       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3910       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3911       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3912       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3913       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3914       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3915       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3916       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3917       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3918       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3919       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3920     </board>
3921   </boards>
3922
3923   <examples>
3924     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3925       <description>DSP_Lib Class Marks example</description>
3926       <board name="uVision Simulator" vendor="Keil"/>
3927       <project>
3928         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3929       </project>
3930       <attributes>
3931         <component Cclass="CMSIS" Cgroup="CORE"/>
3932         <component Cclass="CMSIS" Cgroup="DSP"/>
3933         <component Cclass="Device" Cgroup="Startup"/>
3934         <category>Getting Started</category>
3935       </attributes>
3936     </example>
3937
3938     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3939       <description>DSP_Lib Convolution example</description>
3940       <board name="uVision Simulator" vendor="Keil"/>
3941       <project>
3942         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3943       </project>
3944       <attributes>
3945         <component Cclass="CMSIS" Cgroup="CORE"/>
3946         <component Cclass="CMSIS" Cgroup="DSP"/>
3947         <component Cclass="Device" Cgroup="Startup"/>
3948         <category>Getting Started</category>
3949       </attributes>
3950     </example>
3951
3952     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3953       <description>DSP_Lib Dotproduct example</description>
3954       <board name="uVision Simulator" vendor="Keil"/>
3955       <project>
3956         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3957       </project>
3958       <attributes>
3959         <component Cclass="CMSIS" Cgroup="CORE"/>
3960         <component Cclass="CMSIS" Cgroup="DSP"/>
3961         <component Cclass="Device" Cgroup="Startup"/>
3962         <category>Getting Started</category>
3963       </attributes>
3964     </example>
3965
3966     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3967       <description>DSP_Lib FFT Bin example</description>
3968       <board name="uVision Simulator" vendor="Keil"/>
3969       <project>
3970         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3971       </project>
3972       <attributes>
3973         <component Cclass="CMSIS" Cgroup="CORE"/>
3974         <component Cclass="CMSIS" Cgroup="DSP"/>
3975         <component Cclass="Device" Cgroup="Startup"/>
3976         <category>Getting Started</category>
3977       </attributes>
3978     </example>
3979
3980     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3981       <description>DSP_Lib FIR example</description>
3982       <board name="uVision Simulator" vendor="Keil"/>
3983       <project>
3984         <environment name="uv" load="arm_fir_example.uvprojx"/>
3985       </project>
3986       <attributes>
3987         <component Cclass="CMSIS" Cgroup="CORE"/>
3988         <component Cclass="CMSIS" Cgroup="DSP"/>
3989         <component Cclass="Device" Cgroup="Startup"/>
3990         <category>Getting Started</category>
3991       </attributes>
3992     </example>
3993
3994     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3995       <description>DSP_Lib Graphic Equalizer example</description>
3996       <board name="uVision Simulator" vendor="Keil"/>
3997       <project>
3998         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3999       </project>
4000       <attributes>
4001         <component Cclass="CMSIS" Cgroup="CORE"/>
4002         <component Cclass="CMSIS" Cgroup="DSP"/>
4003         <component Cclass="Device" Cgroup="Startup"/>
4004         <category>Getting Started</category>
4005       </attributes>
4006     </example>
4007
4008     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4009       <description>DSP_Lib Linear Interpolation example</description>
4010       <board name="uVision Simulator" vendor="Keil"/>
4011       <project>
4012         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4013       </project>
4014       <attributes>
4015         <component Cclass="CMSIS" Cgroup="CORE"/>
4016         <component Cclass="CMSIS" Cgroup="DSP"/>
4017         <component Cclass="Device" Cgroup="Startup"/>
4018         <category>Getting Started</category>
4019       </attributes>
4020     </example>
4021
4022     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4023       <description>DSP_Lib Matrix example</description>
4024       <board name="uVision Simulator" vendor="Keil"/>
4025       <project>
4026         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4027       </project>
4028       <attributes>
4029         <component Cclass="CMSIS" Cgroup="CORE"/>
4030         <component Cclass="CMSIS" Cgroup="DSP"/>
4031         <component Cclass="Device" Cgroup="Startup"/>
4032         <category>Getting Started</category>
4033       </attributes>
4034     </example>
4035
4036     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4037       <description>DSP_Lib Signal Convergence example</description>
4038       <board name="uVision Simulator" vendor="Keil"/>
4039       <project>
4040         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4041       </project>
4042       <attributes>
4043         <component Cclass="CMSIS" Cgroup="CORE"/>
4044         <component Cclass="CMSIS" Cgroup="DSP"/>
4045         <component Cclass="Device" Cgroup="Startup"/>
4046         <category>Getting Started</category>
4047       </attributes>
4048     </example>
4049
4050     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4051       <description>DSP_Lib Sinus/Cosinus example</description>
4052       <board name="uVision Simulator" vendor="Keil"/>
4053       <project>
4054         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4055       </project>
4056       <attributes>
4057         <component Cclass="CMSIS" Cgroup="CORE"/>
4058         <component Cclass="CMSIS" Cgroup="DSP"/>
4059         <component Cclass="Device" Cgroup="Startup"/>
4060         <category>Getting Started</category>
4061       </attributes>
4062     </example>
4063
4064     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4065       <description>DSP_Lib Variance example</description>
4066       <board name="uVision Simulator" vendor="Keil"/>
4067       <project>
4068         <environment name="uv" load="arm_variance_example.uvprojx"/>
4069       </project>
4070       <attributes>
4071         <component Cclass="CMSIS" Cgroup="CORE"/>
4072         <component Cclass="CMSIS" Cgroup="DSP"/>
4073         <component Cclass="Device" Cgroup="Startup"/>
4074         <category>Getting Started</category>
4075       </attributes>
4076     </example>
4077
4078     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4079       <description>Neural Network CIFAR10 example</description>
4080       <board name="uVision Simulator" vendor="Keil"/>
4081       <project>
4082         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4083       </project>
4084       <attributes>
4085         <component Cclass="CMSIS" Cgroup="CORE"/>
4086         <component Cclass="CMSIS" Cgroup="DSP"/>
4087         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4088         <component Cclass="Device" Cgroup="Startup"/>
4089         <category>Getting Started</category>
4090       </attributes>
4091     </example>
4092
4093     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4094       <description>Neural Network CIFAR10 example</description>
4095       <board name="EWARM Simulator" vendor="IAR"/>
4096       <project>
4097         <environment name="iar" load="NN-example-cifar10.ewp"/>
4098       </project>
4099       <attributes>
4100         <component Cclass="CMSIS" Cgroup="CORE"/>
4101         <component Cclass="CMSIS" Cgroup="DSP"/>
4102         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4103         <component Cclass="Device" Cgroup="Startup"/>
4104         <category>Getting Started</category>
4105       </attributes>
4106     </example>
4107
4108     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4109       <description>Neural Network GRU example</description>
4110       <board name="uVision Simulator" vendor="Keil"/>
4111       <project>
4112         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4113       </project>
4114       <attributes>
4115         <component Cclass="CMSIS" Cgroup="CORE"/>
4116         <component Cclass="CMSIS" Cgroup="DSP"/>
4117         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4118         <component Cclass="Device" Cgroup="Startup"/>
4119         <category>Getting Started</category>
4120       </attributes>
4121     </example>
4122
4123     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4124       <description>Neural Network GRU example</description>
4125       <board name="EWARM Simulator" vendor="IAR"/>
4126       <project>
4127         <environment name="iar" load="NN-example-gru.ewp"/>
4128       </project>
4129       <attributes>
4130         <component Cclass="CMSIS" Cgroup="CORE"/>
4131         <component Cclass="CMSIS" Cgroup="DSP"/>
4132         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4133         <component Cclass="Device" Cgroup="Startup"/>
4134         <category>Getting Started</category>
4135       </attributes>
4136     </example>
4137
4138     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4139       <description>CMSIS-RTOS2 Blinky example</description>
4140       <board name="uVision Simulator" vendor="Keil"/>
4141       <project>
4142         <environment name="uv" load="Blinky.uvprojx"/>
4143       </project>
4144       <attributes>
4145         <component Cclass="CMSIS" Cgroup="CORE"/>
4146         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4147         <component Cclass="Device" Cgroup="Startup"/>
4148         <category>Getting Started</category>
4149       </attributes>
4150     </example>
4151
4152     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4153       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4154       <board name="uVision Simulator" vendor="Keil"/>
4155       <project>
4156         <environment name="uv" load="Blinky.uvprojx"/>
4157       </project>
4158       <attributes>
4159         <component Cclass="CMSIS" Cgroup="CORE"/>
4160         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4161         <component Cclass="Device" Cgroup="Startup"/>
4162         <category>Getting Started</category>
4163       </attributes>
4164     </example>
4165
4166     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4167       <description>CMSIS-RTOS2 Message Queue Example</description>
4168       <board name="uVision Simulator" vendor="Keil"/>
4169       <project>
4170         <environment name="uv" load="MsqQueue.uvprojx"/>
4171       </project>
4172       <attributes>
4173         <component Cclass="CMSIS" Cgroup="CORE"/>
4174         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4175         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4176         <component Cclass="Device" Cgroup="Startup"/>
4177         <category>Getting Started</category>
4178       </attributes>
4179     </example>
4180
4181     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4182       <description>CMSIS-RTOS2 Memory Pool Example</description>
4183       <board name="uVision Simulator" vendor="Keil"/>
4184       <project>
4185         <environment name="uv" load="MemPool.uvprojx"/>
4186       </project>
4187       <attributes>
4188         <component Cclass="CMSIS" Cgroup="CORE"/>
4189         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4190         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4191         <component Cclass="Device" Cgroup="Startup"/>
4192         <category>Getting Started</category>
4193       </attributes>
4194     </example>
4195
4196     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4197       <description>Bare-metal secure/non-secure example without RTOS</description>
4198       <board name="uVision Simulator" vendor="Keil"/>
4199       <project>
4200         <environment name="uv" load="NoRTOS.uvmpw"/>
4201       </project>
4202       <attributes>
4203         <component Cclass="CMSIS" Cgroup="CORE"/>
4204         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4205         <component Cclass="Device" Cgroup="Startup"/>
4206         <category>Getting Started</category>
4207       </attributes>
4208     </example>
4209
4210     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4211       <description>Secure/non-secure RTOS example with thread context management</description>
4212       <board name="uVision Simulator" vendor="Keil"/>
4213       <project>
4214         <environment name="uv" load="RTOS.uvmpw"/>
4215       </project>
4216       <attributes>
4217         <component Cclass="CMSIS" Cgroup="CORE"/>
4218         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4219         <component Cclass="Device" Cgroup="Startup"/>
4220         <category>Getting Started</category>
4221       </attributes>
4222     </example>
4223
4224     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4225       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4226       <board name="uVision Simulator" vendor="Keil"/>
4227       <project>
4228         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4229       </project>
4230       <attributes>
4231         <component Cclass="CMSIS" Cgroup="CORE"/>
4232         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4233         <component Cclass="Device" Cgroup="Startup"/>
4234         <category>Getting Started</category>
4235       </attributes>
4236     </example>
4237
4238   </examples>
4239
4240 </package>