begriffs open source - cmsis/blob - CMSIS/Documentation/Core/html/startup_s_pg.html

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  34    <div id="projectname">CMSIS-CORE
  35    &#160;<span id="projectnumber">Version 5.0.0 - Beta</span>
  36    </div>
  37    <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div>
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 110   <div class="headertitle">
 111 <div class="title">Startup File startup_&lt;device&gt;.s </div>  </div>
 112 </div><!--header-->
 113 <div class="contents">
 114 <div class="textblock"><p>The <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s</a> contains:</p>
 115 <ul>
 116 <li>The reset handler which is executed after CPU reset and typically calls the <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a> function.</li>
 117 <li>The setup values for the Main Stack Pointer (MSP).</li>
 118 <li>Exception vectors of the Cortex-M Processor with weak functions that implement default routines.</li>
 119 <li>Interrupt vectors that are device specific with weak functions that implement default routines.</li>
 120 </ul>
 121 <p>The file exists for each supported toolchain and is the only tool-chain specific CMSIS file.</p>
 122 <p>To adapt the file to a new device only the interrupt vector table needs to be extended with the device-specific interrupt handlers. The naming convention for the interrupt handler names are &lt;interrupt_name&gt;_IRQHandler. This table needs to be consistent with <a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> that defines all the IRQ numbers for each interrupt.</p>
 123 <p><b>Example:</b> </p>
 124 <p>The following example shows the extension of the interrupt vector table for the LPC1100 device family.</p>
 125 <div class="fragment"><div class="line">                ; External Interrupts</div>
 126 <div class="line">                DCD     WAKEUP0_IRQHandler       ; 16+ 0: Wakeup PIO0.0</div>
 127 <div class="line">                DCD     WAKEUP1_IRQHandler       ; 16+ 1: Wakeup PIO0.1</div>
 128 <div class="line">                DCD     WAKEUP2_IRQHandler       ; 16+ 2: Wakeup PIO0.2</div>
 129 <div class="line">                 :       :</div>
 130 <div class="line">                 :       :</div>
 131 <div class="line">                DCD     EINT1_IRQHandler         ; 16+30: PIO INT1</div>
 132 <div class="line">                DCD     EINT0_IRQHandler         ; 16+31: PIO INT0</div>
 133 <div class="line">         :</div>
 134 <div class="line">         :</div>
 135 <div class="line">                EXPORT  WAKEUP0_IRQHandler       [WEAK]</div>
 136 <div class="line">                EXPORT  WAKEUP1_IRQHandler       [WEAK]</div>
 137 <div class="line">                EXPORT  WAKEUP2_IRQHandler       [WEAK]</div>
 138 <div class="line">                 :       :</div>
 139 <div class="line">                 :       :</div>
 140 <div class="line">                EXPORT  EINT1_IRQHandler         [WEAK]</div>
 141 <div class="line">                EXPORT  EINT0_IRQHandler         [WEAK]</div>
 142 <div class="line"></div>
 143 <div class="line">WAKEUP0_IRQHandler</div>
 144 <div class="line">WAKEUP1_IRQHandler</div>
 145 <div class="line">WAKEUP1_IRQHandler</div>
 146 <div class="line">      :</div>
 147 <div class="line">      :</div>
 148 <div class="line">EINT1_IRQHandler</div>
 149 <div class="line">EINT0_IRQHandler</div>
 150 <div class="line">                B       .</div>
 151 </div><!-- fragment --><h1><a class="anchor" id="startup_s_sec"></a>
 152 startup_Device.s Template File</h1>
 153 <p>An ARM Compiler <a class="el" href="startup_s_pg.html#startup_s_sec">startup_Device.s Template File</a> for an ARMv7-M processor like Cortex-M3 is shown below. The files for other compiler vendors differ slightly in the syntax, but not in the overall structure.</p>
 154 <pre class="fragment">;/**************************************************************************//**
 155 ; * @file     startup_&lt;Device&gt;.s
 156 ; * @brief    CMSIS Cortex-M ARMv7-M based Core Device Startup File for
 157 ; *           Device &lt;Device&gt;
 158 ; * @version  V5.00
 159 ; * @date     02. March 2016
 160 ; ******************************************************************************/
 161 ;/*
 162 ; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
 163 ; *
 164 ; * SPDX-License-Identifier: Apache-2.0
 165 ; *
 166 ; * Licensed under the Apache License, Version 2.0 (the License); you may
 167 ; * not use this file except in compliance with the License.
 168 ; * You may obtain a copy of the License at
 169 ; *
 170 ; * http://www.apache.org/licenses/LICENSE-2.0
 171 ; *
 172 ; * Unless required by applicable law or agreed to in writing, software
 173 ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
 174 ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 175 ; * See the License for the specific language governing permissions and
 176 ; * limitations under the License.
 177 ; */
 178 ;/*
 179
 180 ;//-------- &lt;&lt;&lt; Use Configuration Wizard in Context Menu &gt;&gt;&gt; ------------------
 181 ;*/
 182
 183
 184 ; &lt;h&gt; Stack Configuration
 185 ;   &lt;o&gt; Stack Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
 186 ; &lt;/h&gt;
 187
 188 Stack_Size      EQU     0x00000400
 189
 190                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
 191 Stack_Mem       SPACE   Stack_Size
 192 __initial_sp
 193
 194
 195 ; &lt;h&gt; Heap Configuration
 196 ;   &lt;o&gt;  Heap Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;
 197 ; &lt;/h&gt;
 198
 199 Heap_Size       EQU     0x00000100
 200
 201                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
 202 __heap_base
 203 Heap_Mem        SPACE   Heap_Size
 204 __heap_limit
 205
 206
 207                 PRESERVE8
 208                 THUMB
 209
 210
 211 ; Vector Table Mapped to Address 0 at Reset
 212
 213                 AREA    RESET, DATA, READONLY
 214                 EXPORT  __Vectors
 215                 EXPORT  __Vectors_End
 216                 EXPORT  __Vectors_Size
 217
 218 __Vectors       DCD     __initial_sp              ; Top of Stack
 219                 DCD     Reset_Handler             ; Reset Handler
 220                 DCD     NMI_Handler               ; NMI Handler
 221                 DCD     HardFault_Handler         ; Hard Fault Handler
 222                 DCD     MemManage_Handler         ; MPU Fault Handler
 223                 DCD     BusFault_Handler          ; Bus Fault Handler
 224                 DCD     UsageFault_Handler        ; Usage Fault Handler
 225                 DCD     0                         ; Reserved
 226                 DCD     0                         ; Reserved
 227                 DCD     0                         ; Reserved
 228                 DCD     0                         ; Reserved
 229                 DCD     SVC_Handler               ; SVCall Handler
 230                 DCD     DebugMon_Handler          ; Debug Monitor Handler
 231                 DCD     0                         ; Reserved
 232                 DCD     PendSV_Handler            ; PendSV Handler
 233                 DCD     SysTick_Handler           ; SysTick Handler
 234
 235                 ; External Interrupts
 236 ; ToDo:  Add here the vectors for the device specific external interrupts handler
 237                 DCD     &lt;DeviceInterrupt&gt;_IRQHandler       ;  0: Default
 238 __Vectors_End
 239
 240 __Vectors_Size  EQU     __Vectors_End - __Vectors
 241
 242                 AREA    |.text|, CODE, READONLY
 243
 244
 245 ; Reset Handler
 246
 247 Reset_Handler   PROC
 248                 EXPORT  Reset_Handler             [WEAK]
 249                 IMPORT  SystemInit
 250                 IMPORT  __main
 251                 LDR     R0, =SystemInit
 252                 BLX     R0
 253                 LDR     R0, =__main
 254                 BX      R0
 255                 ENDP
 256
 257
 258 ; Dummy Exception Handlers (infinite loops which can be modified)
 259
 260 NMI_Handler\
 261                 PROC
 262                 EXPORT  NMI_Handler               [WEAK]
 263                 B       .
 264                 ENDP
 265 HardFault_Handler\
 266                 PROC
 267                 EXPORT  HardFault_Handler         [WEAK]
 268                 B       .
 269                 ENDP
 270 MemManage_Handler\
 271                 PROC
 272                 EXPORT  MemManage_Handler         [WEAK]
 273                 B       .
 274                 ENDP
 275 BusFault_Handler\
 276                 PROC
 277                 EXPORT  BusFault_Handler          [WEAK]
 278                 B       .
 279                 ENDP
 280 UsageFault_Handler\
 281                 PROC
 282                 EXPORT  UsageFault_Handler        [WEAK]
 283                 B       .
 284                 ENDP
 285 SVC_Handler\
 286                 PROC
 287                 EXPORT  SVC_Handler               [WEAK]
 288                 B       .
 289                 ENDP
 290 DebugMon_Handler\
 291                 PROC
 292                 EXPORT  DebugMon_Handler          [WEAK]
 293                 B       .
 294                 ENDP
 295 PendSV_Handler\
 296                 PROC
 297                 EXPORT  PendSV_Handler            [WEAK]
 298                 B       .
 299                 ENDP
 300 SysTick_Handler\
 301                 PROC
 302                 EXPORT  SysTick_Handler           [WEAK]
 303                 B       .
 304                 ENDP
 305
 306 Default_Handler PROC
 307 ; ToDo:  Add here the export definition for the device specific external interrupts handler
 308                 EXPORT  &lt;DeviceInterrupt&gt;_IRQHandler         [WEAK]
 309
 310 ; ToDo:  Add here the names for the device specific external interrupts handler
 311 &lt;DeviceInterrupt&gt;_IRQHandler
 312                 B       .
 313                 ENDP
 314
 315
 316                 ALIGN
 317
 318
 319 ; User Initial Stack &amp; Heap
 320
 321                 IF      :DEF:__MICROLIB
 322
 323                 EXPORT  __initial_sp
 324                 EXPORT  __heap_base
 325                 EXPORT  __heap_limit
 326
 327                 ELSE
 328
 329                 IMPORT  __use_two_region_memory
 330                 EXPORT  __user_initial_stackheap
 331
 332 __user_initial_stackheap PROC
 333                 LDR     R0, =  Heap_Mem
 334                 LDR     R1, =(Stack_Mem + Stack_Size)
 335                 LDR     R2, = (Heap_Mem +  Heap_Size)
 336                 LDR     R3, = Stack_Mem
 337                 BX      LR
 338                 ENDP
 339
 340                 ALIGN
 341
 342                 ENDIF
 343
 344
 345                 END
 346 </pre> </div></div><!-- contents -->
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 352     <li class="footer">Generated on Tue Sep 13 2016 16:45:26 for CMSIS-CORE by ARM Ltd. All rights reserved.
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