begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.1.1-dev1">
  12       Active development...
  13       Devices:
  14       - added GCC startup and linker script for Cortex-A9
  15       CMSIS-Core(M): 5.0.3 (see revision history for details)
  16       - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  17       CMSIS-RTOS:
  18       - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata
  19       CMSIS-RTOS2:
  20       - RTX 5.2.1 (see revision history for details)
  21       - Message Queue Example
  22       - Memory Pool Example
  23     </release>
  24     <release version="5.1.0" date="2017-08-04">
  25       CMSIS-Core(M): 5.0.2 (see revision history for details)
  26       - Changed Version Control macros to be core agnostic.
  27       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  28       CMSIS-Core(A): 1.0.0 (see revision history for details)
  29       - Initial release
  30       - IRQ Controller API 1.0.0
  31       CMSIS-Driver: 2.05 (see revision history for details)
  32       - All typedefs related to status have been made volatile.
  33       CMSIS-RTOS2:
  34       - API 2.1.1 (see revision history for details)
  35       - RTX 5.2.0 (see revision history for details)
  36       - OS Tick API 1.0.0
  37       CMSIS-DSP: 1.5.2 (see revision history for details)
  38       - Fixed GNU Compiler specific diagnostics.
  39       CMSIS-PACK: 1.5.0 (see revision history for details)
  40       - added System Description File (*.SDF) Format
  41       CMSIS-Zone: 0.0.1 (Preview)
  42       - Initial specification draft
  43     </release>
  44     <release version="5.0.1" date="2017-02-03">
  45       Package Description:
  46       - added taxonomy for Cclass RTOS
  47       CMSIS-RTOS2:
  48       - API 2.1   (see revision history for details)
  49       - RTX 5.1.0 (see revision history for details)
  50       CMSIS-Core: 5.0.1 (see revision history for details)
  51       - Added __PACKED_STRUCT macro
  52       - Added uVisior support
  53       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  54       - Updated template for secure main function (main_s.c)
  55       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  56       CMSIS-DSP: 1.5.1 (see revision history for details)
  57       - added ARMv8M DSP libraries.
  58       CMSIS-PACK:1.4.9 (see revision history for details)
  59       - added Pack Index File specification and schema file
  60     </release>
  61     <release version="5.0.0" date="2016-11-11">
  62       Changed open source license to Apache 2.0
  63       CMSIS_Core:
  64        - Added support for Cortex-M23 and Cortex-M33.
  65        - Added ARMv8-M device configurations for mainline and baseline.
  66        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  67        - Added cmsis_compiler.h to unify compiler behaviour.
  68        - Updated function SCB_EnableICache (for Cortex-M7).
  69        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  70       CMSIS-RTOS:
  71         - bug fix in RTX 4.82 (see revision history for details)
  72       CMSIS-RTOS2:
  73         - new API including compatibility layer to CMSIS-RTOS
  74         - reference implementation based on RTX5
  75         - supports all Cortex-M variants including TrustZone for ARMv8-M
  76       CMSIS-SVD:
  77        - reworked SVD format documentation
  78        - removed SVD file database documentation as SVD files are distributed in packs
  79        - updated SVDConv for Win32 and Linux
  80       CMSIS-DSP:
  81        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  82        - Added DSP libraries build projects to CMSIS pack.
  83     </release>
  84     <release version="4.5.0" date="2015-10-28">
  85       - CMSIS-Core     4.30.0  (see revision history for details)
  86       - CMSIS-DAP      1.1.0   (unchanged)
  87       - CMSIS-Driver   2.04.0  (see revision history for details)
  88       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  89       - CMSIS-PACK     1.4.1   (see revision history for details)
  90       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  91       - CMSIS-SVD      1.3.1   (see revision history for details)
  92     </release>
  93     <release version="4.4.0" date="2015-09-11">
  94       - CMSIS-Core     4.20   (see revision history for details)
  95       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  96       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  97       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  98       - CMSIS-RTOS
  99         -- API         1.02   (unchanged)
 100         -- RTX         4.79   (see revision history for details)
 101       - CMSIS-SVD      1.3.0  (see revision history for details)
 102       - CMSIS-DAP      1.1.0  (extended with SWO support)
 103     </release>
 104     <release version="4.3.0" date="2015-03-20">
 105       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 106       - CMSIS-DSP      1.4.5  (see revision history for details)
 107       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 108       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 109       - CMSIS-RTOS
 110         -- API         1.02   (unchanged)
 111         -- RTX         4.78   (see revision history for details)
 112       - CMSIS-SVD      1.2    (unchanged)
 113     </release>
 114     <release version="4.2.0" date="2014-09-24">
 115       Adding Cortex-M7 support
 116       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 117       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 118       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 119       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 120       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 121     </release>
 122     <release version="4.1.1" date="2014-06-30">
 123       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 124     </release>
 125     <release version="4.1.0" date="2014-06-12">
 126       - CMSIS-Driver   2.02  (incompatible update)
 127       - CMSIS-Pack     1.3   (see revision history for details)
 128       - CMSIS-DSP      1.4.2 (unchanged)
 129       - CMSIS-Core     3.30  (unchanged)
 130       - CMSIS-RTOS RTX 4.74  (unchanged)
 131       - CMSIS-RTOS API 1.02  (unchanged)
 132       - CMSIS-SVD      1.10  (unchanged)
 133       PACK:
 134       - removed G++ specific files from PACK
 135       - added Component Startup variant "C Startup"
 136       - added Pack Checking Utility
 137       - updated conditions to reflect tool-chain dependency
 138       - added Taxonomy for Graphics
 139       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 140     </release>
 141     <release version="4.0.0">
 142       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 143       - CMSIS-Pack     1.1   Preliminary
 144       - CMSIS-DSP      1.4.2 (see revision history for details)
 145       - CMSIS-Core     3.30  (see revision history for details)
 146       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 147       - CMSIS-RTOS API 1.02  (unchanged)
 148       - CMSIS-SVD      1.10  (unchanged)
 149     </release>
 150     <release version="3.20.4">
 151       - CMSIS-RTOS 4.74 (see revision history for details)
 152       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 153     </release>
 154     <release version="3.20.3">
 155       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 156       - CMSIS-RTOS 4.73 (see revision history for details)
 157     </release>
 158     <release version="3.20.2">
 159       - CMSIS-Pack documentation has been added
 160       - CMSIS-Drivers header and documentation have been added to PACK
 161       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 162     </release>
 163     <release version="3.20.1">
 164       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 165       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 166     </release>
 167     <release version="3.20.0">
 168       The software portions that are deployed in the application program are now under a BSD license which allows usage
 169       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 170       The individual components have been update as listed below:
 171       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 172       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 173       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 174       - CMSIS-SVD is unchanged.
 175     </release>
 176   </releases>
 177
 178   <taxonomy>
 179     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 180     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 181     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 182     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 183     <description Cclass="File System">File Drive Support and File System</description>
 184     <description Cclass="Graphics">Graphical User Interface</description>
 185     <description Cclass="Network">Network Stack using Internet Protocols</description>
 186     <description Cclass="USB">Universal Serial Bus Stack</description>
 187     <description Cclass="Compiler">Compiler Software Extensions</description>
 188     <description Cclass="RTOS">Real-time Operating System</description>
 189   </taxonomy>
 190
 191   <devices>
 192     <!-- ******************************  Cortex-M0  ****************************** -->
 193     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 194       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 195       <description>
 196 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 197 - simple, easy-to-use programmers model
 198 - highly efficient ultra-low power operation
 199 - excellent code density
 200 - deterministic, high-performance interrupt handling
 201 - upward compatibility with the rest of the Cortex-M processor family.
 202       </description>
 203       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 204       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 205       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 206       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 207
 208       <device Dname="ARMCM0">
 209         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 210         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 211       </device>
 212     </family>
 213
 214     <!-- ******************************  Cortex-M0P  ****************************** -->
 215     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 216       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 217       <description>
 218 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 219 - simple, easy-to-use programmers model
 220 - highly efficient ultra-low power operation
 221 - excellent code density
 222 - deterministic, high-performance interrupt handling
 223 - upward compatibility with the rest of the Cortex-M processor family.
 224       </description>
 225       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 226       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 227       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 228       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 229
 230       <device Dname="ARMCM0P">
 231         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 232         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 233       </device>
 234     </family>
 235
 236     <!-- ******************************  Cortex-M3  ****************************** -->
 237     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 238       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 239       <description>
 240 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 241 - simple, easy-to-use programmers model
 242 - highly efficient ultra-low power operation
 243 - excellent code density
 244 - deterministic, high-performance interrupt handling
 245 - upward compatibility with the rest of the Cortex-M processor family.
 246       </description>
 247       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 248       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 249       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 250       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 251
 252       <device Dname="ARMCM3">
 253         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 254         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 255       </device>
 256     </family>
 257
 258     <!-- ******************************  Cortex-M4  ****************************** -->
 259     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 260       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 261       <description>
 262 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 263 - simple, easy-to-use programmers model
 264 - highly efficient ultra-low power operation
 265 - excellent code density
 266 - deterministic, high-performance interrupt handling
 267 - upward compatibility with the rest of the Cortex-M processor family.
 268       </description>
 269       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 270       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 271       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 272       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 273
 274       <device Dname="ARMCM4">
 275         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 276         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 277       </device>
 278
 279       <device Dname="ARMCM4_FP">
 280         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 281         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 282       </device>
 283     </family>
 284
 285     <!-- ******************************  Cortex-M7  ****************************** -->
 286     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 287       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 288       <description>
 289 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 290 - simple, easy-to-use programmers model
 291 - highly efficient ultra-low power operation
 292 - excellent code density
 293 - deterministic, high-performance interrupt handling
 294 - upward compatibility with the rest of the Cortex-M processor family.
 295       </description>
 296       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 297       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 298       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 299       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 300
 301       <device Dname="ARMCM7">
 302         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 303         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 304       </device>
 305
 306       <device Dname="ARMCM7_SP">
 307         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 308         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 309       </device>
 310
 311       <device Dname="ARMCM7_DP">
 312         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 313         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 314       </device>
 315     </family>
 316
 317     <!-- ******************************  Cortex-M23  ********************** -->
 318     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 319       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 320       <description>
 321 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 322 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 323 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 324       </description>
 325       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 326       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 327       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 328       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 329       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 330       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 331
 332       <device Dname="ARMCM23">
 333         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 334         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 335       </device>
 336
 337       <device Dname="ARMCM23_TZ">
 338         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 339         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 340       </device>
 341     </family>
 342
 343     <!-- ******************************  Cortex-M33  ****************************** -->
 344     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 345       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 346       <description>
 347 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 348 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 349       </description>
 350       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 351       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 352       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 353       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 354       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 355       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 356
 357       <device Dname="ARMCM33">
 358         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 359         <description>
 360           no DSP Instructions, no Floating Point Unit, no TrustZone
 361         </description>
 362         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 363       </device>
 364
 365       <device Dname="ARMCM33_TZ">
 366         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 367         <description>
 368           no DSP Instructions, no Floating Point Unit, TrustZone
 369         </description>
 370         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 371       </device>
 372
 373       <device Dname="ARMCM33_DSP_FP">
 374         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 375         <description>
 376           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 377         </description>
 378         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 379       </device>
 380
 381       <device Dname="ARMCM33_DSP_FP_TZ">
 382         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 383         <description>
 384           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 385         </description>
 386         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 387       </device>
 388     </family>
 389
 390     <!-- ******************************  ARMSC000  ****************************** -->
 391     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 392       <description>
 393 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 394 - simple, easy-to-use programmers model
 395 - highly efficient ultra-low power operation
 396 - excellent code density
 397 - deterministic, high-performance interrupt handling
 398       </description>
 399       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 400       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 401       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 402       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 403
 404       <device Dname="ARMSC000">
 405         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 406         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 407       </device>
 408     </family>
 409
 410     <!-- ******************************  ARMSC300  ****************************** -->
 411     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 412       <description>
 413 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 414 - simple, easy-to-use programmers model
 415 - highly efficient ultra-low power operation
 416 - excellent code density
 417 - deterministic, high-performance interrupt handling
 418       </description>
 419       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 420       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 421       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 422       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 423
 424       <device Dname="ARMSC300">
 425         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 426         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 427       </device>
 428     </family>
 429
 430     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 431     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 432       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 433       <description>
 434 ARMv8-M Baseline based device with TrustZone
 435       </description>
 436       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 437       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 438       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 439       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 440       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 441       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 442
 443       <device Dname="ARMv8MBL">
 444         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 445         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 446       </device>
 447     </family>
 448
 449     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 450     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 451       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 452       <description>
 453 ARMv8-M Mainline based device with TrustZone
 454       </description>
 455       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 456       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 457       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 458       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 459       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 460       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 461
 462       <device Dname="ARMv8MML">
 463         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 464         <description>
 465           no DSP Instructions, no Floating Point Unit, TrustZone
 466         </description>
 467         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 468       </device>
 469
 470       <device Dname="ARMv8MML_DSP">
 471         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 472         <description>
 473           DSP Instructions, no Floating Point Unit, TrustZone
 474         </description>
 475         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 476       </device>
 477
 478       <device Dname="ARMv8MML_SP">
 479         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 480         <description>
 481           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 482         </description>
 483         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 484       </device>
 485
 486       <device Dname="ARMv8MML_DSP_SP">
 487         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 488         <description>
 489           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 490         </description>
 491         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 492       </device>
 493
 494       <device Dname="ARMv8MML_DP">
 495         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 496         <description>
 497           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 498         </description>
 499         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 500       </device>
 501
 502       <device Dname="ARMv8MML_DSP_DP">
 503         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 504         <description>
 505           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 506         </description>
 507         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 508       </device>
 509     </family>
 510
 511     <!-- ******************************  Cortex-A5  ****************************** -->
 512     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 513       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 514       <description>
 515 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 516 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 517 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 518       </description>
 519
 520       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 521       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 522
 523       <device Dname="ARMCA5">
 524         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 525         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 526       </device>
 527     </family>
 528
 529     <!-- ******************************  Cortex-A7  ****************************** -->
 530     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 531       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 532       <description>
 533 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 534 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 535 an optional integrated GIC, and an optional L2 cache controller.
 536       </description>
 537
 538       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 539       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 540
 541       <device Dname="ARMCA7">
 542         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 543         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 544       </device>
 545     </family>
 546
 547     <!-- ******************************  Cortex-A9  ****************************** -->
 548     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 549       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 550       <description>
 551 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 552 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 553 and 8-bit Java bytecodes in Jazelle state.
 554       </description>
 555
 556       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 557       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 558
 559       <device Dname="ARMCA9">
 560         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 561         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 562       </device>
 563     </family>
 564   </devices>
 565
 566
 567   <apis>
 568     <!-- CMSIS Device API -->
 569     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 570       <description>Device interrupt controller interface</description>
 571       <files>
 572         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 573       </files>
 574     </api>
 575     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
 576       <description>RTOS Kernel system tick timer interface</description>
 577       <files>
 578         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 579       </files>
 580     </api>
 581     <!-- CMSIS-RTOS API -->
 582     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 583       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 584       <files>
 585         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 586       </files>
 587     </api>
 588     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
 589       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 590       <files>
 591         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 592         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 593       </files>
 594     </api>
 595     <!-- CMSIS Driver API -->
 596     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 597       <description>USART Driver API for Cortex-M</description>
 598       <files>
 599         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 600         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 601       </files>
 602     </api>
 603     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 604       <description>SPI Driver API for Cortex-M</description>
 605       <files>
 606         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 607         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 608       </files>
 609     </api>
 610     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 611       <description>SAI Driver API for Cortex-M</description>
 612       <files>
 613         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 614         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 615       </files>
 616     </api>
 617     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 618       <description>I2C Driver API for Cortex-M</description>
 619       <files>
 620         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 621         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 622       </files>
 623     </api>
 624     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
 625       <description>CAN Driver API for Cortex-M</description>
 626       <files>
 627         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 628         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 629       </files>
 630     </api>
 631     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 632       <description>Flash Driver API for Cortex-M</description>
 633       <files>
 634         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 635         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 636       </files>
 637     </api>
 638     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 639       <description>MCI Driver API for Cortex-M</description>
 640       <files>
 641         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 642         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 643       </files>
 644     </api>
 645     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 646       <description>NAND Flash Driver API for Cortex-M</description>
 647       <files>
 648         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 649         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 650       </files>
 651     </api>
 652     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 653       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 654       <files>
 655         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 656         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 657         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 658       </files>
 659     </api>
 660     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 661       <description>Ethernet MAC Driver API for Cortex-M</description>
 662       <files>
 663         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 664         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 665       </files>
 666     </api>
 667     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 668       <description>Ethernet PHY Driver API for Cortex-M</description>
 669       <files>
 670         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 671         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 672       </files>
 673     </api>
 674     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 675       <description>USB Device Driver API for Cortex-M</description>
 676       <files>
 677         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 678         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 679       </files>
 680     </api>
 681     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 682       <description>USB Host Driver API for Cortex-M</description>
 683       <files>
 684         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 685         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 686       </files>
 687     </api>
 688   </apis>
 689
 690   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 691   <conditions>
 692     <!-- compiler -->
 693     <condition id="ARMCC6">
 694       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 695       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 696     </condition>
 697     <condition id="ARMCC5">
 698       <require Tcompiler="ARMCC" Toptions="AC5"/>
 699     </condition>
 700     <condition id="ARMCC">
 701       <require Tcompiler="ARMCC"/>
 702     </condition>
 703     <condition id="GCC">
 704       <require Tcompiler="GCC"/>
 705     </condition>
 706     <condition id="IAR">
 707       <require Tcompiler="IAR"/>
 708     </condition>
 709     <condition id="ARMCC GCC">
 710       <accept Tcompiler="ARMCC"/>
 711       <accept Tcompiler="GCC"/>
 712     </condition>
 713     <condition id="ARMCC GCC IAR">
 714       <accept Tcompiler="ARMCC"/>
 715       <accept Tcompiler="GCC"/>
 716       <accept Tcompiler="IAR"/>
 717     </condition>
 718
 719     <!-- ARM architecture -->
 720     <condition id="ARMv6-M Device">
 721       <description>ARMv6-M architecture based device</description>
 722       <accept Dcore="Cortex-M0"/>
 723       <accept Dcore="Cortex-M0+"/>
 724       <accept Dcore="SC000"/>
 725     </condition>
 726     <condition id="ARMv7-M Device">
 727       <description>ARMv7-M architecture based device</description>
 728       <accept Dcore="Cortex-M3"/>
 729       <accept Dcore="Cortex-M4"/>
 730       <accept Dcore="Cortex-M7"/>
 731       <accept Dcore="SC300"/>
 732     </condition>
 733     <condition id="ARMv8-M Device">
 734       <description>ARMv8-M architecture based device</description>
 735       <accept Dcore="ARMV8MBL"/>
 736       <accept Dcore="ARMV8MML"/>
 737       <accept Dcore="Cortex-M23"/>
 738       <accept Dcore="Cortex-M33"/>
 739     </condition>
 740     <condition id="ARMv8-M TZ Device">
 741       <description>ARMv8-M architecture based device with TrustZone</description>
 742       <require condition="ARMv8-M Device"/>
 743       <require Dtz="TZ"/>
 744     </condition>
 745     <condition id="ARMv6_7-M Device">
 746       <description>ARMv6_7-M architecture based device</description>
 747       <accept condition="ARMv6-M Device"/>
 748       <accept condition="ARMv7-M Device"/>
 749     </condition>
 750     <condition id="ARMv6_7_8-M Device">
 751       <description>ARMv6_7_8-M architecture based device</description>
 752       <accept condition="ARMv6-M Device"/>
 753       <accept condition="ARMv7-M Device"/>
 754       <accept condition="ARMv8-M Device"/>
 755     </condition>
 756     <condition id="ARMv7-A Device">
 757       <description>ARMv7-A architecture based device</description>
 758       <accept Dcore="Cortex-A5"/>
 759       <accept Dcore="Cortex-A7"/>
 760       <accept Dcore="Cortex-A9"/>
 761     </condition>
 762
 763     <!-- ARM core -->
 764     <condition id="CM0">
 765       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 766       <accept Dcore="Cortex-M0"/>
 767       <accept Dcore="Cortex-M0+"/>
 768       <accept Dcore="SC000"/>
 769     </condition>
 770     <condition id="CM3">
 771       <description>Cortex-M3 or SC300 processor based device</description>
 772       <accept Dcore="Cortex-M3"/>
 773       <accept Dcore="SC300"/>
 774     </condition>
 775     <condition id="CM4">
 776       <description>Cortex-M4 processor based device</description>
 777       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 778     </condition>
 779     <condition id="CM4_FP">
 780       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 781       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 782     </condition>
 783     <condition id="CM7">
 784       <description>Cortex-M7 processor based device</description>
 785       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 786     </condition>
 787     <condition id="CM7_FP">
 788       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 789       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 790       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 791     </condition>
 792     <condition id="CM7_SP">
 793       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 794       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 795     </condition>
 796     <condition id="CM7_DP">
 797       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 798       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 799     </condition>
 800     <condition id="CM23">
 801       <description>Cortex-M23 processor based device</description>
 802       <require Dcore="Cortex-M23"/>
 803     </condition>
 804     <condition id="CM33">
 805       <description>Cortex-M33 processor based device</description>
 806       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 807     </condition>
 808     <condition id="CM33_FP">
 809       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 810       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 811     </condition>
 812     <condition id="ARMv8MBL">
 813       <description>ARMv8-M Baseline processor based device</description>
 814       <require Dcore="ARMV8MBL"/>
 815     </condition>
 816     <condition id="ARMv8MML">
 817       <description>ARMv8-M Mainline processor based device</description>
 818       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 819     </condition>
 820     <condition id="ARMv8MML_FP">
 821       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 822       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 823       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 824     </condition>
 825
 826     <condition id="CM33_NODSP_NOFPU">
 827       <description>CM33, no DSP, no FPU</description>
 828       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 829     </condition>
 830     <condition id="CM33_DSP_NOFPU">
 831       <description>CM33, DSP, no FPU</description>
 832       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 833     </condition>
 834     <condition id="CM33_NODSP_SP">
 835       <description>CM33, no DSP, SP FPU</description>
 836       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 837     </condition>
 838     <condition id="CM33_DSP_SP">
 839       <description>CM33, DSP, SP FPU</description>
 840       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 841     </condition>
 842
 843     <condition id="ARMv8MML_NODSP_NOFPU">
 844       <description>ARMv8MML, no DSP, no FPU</description>
 845       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 846     </condition>
 847     <condition id="ARMv8MML_DSP_NOFPU">
 848       <description>ARMv8MML, DSP, no FPU</description>
 849       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 850     </condition>
 851     <condition id="ARMv8MML_NODSP_SP">
 852       <description>ARMv8MML, no DSP, SP FPU</description>
 853       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 854     </condition>
 855     <condition id="ARMv8MML_DSP_SP">
 856       <description>ARMv8MML, DSP, SP FPU</description>
 857       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 858     </condition>
 859
 860     <condition id="CA5_CA9">
 861       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 862       <accept Dcore="Cortex-A5"/>
 863       <accept Dcore="Cortex-A9"/>
 864     </condition>
 865
 866     <condition id="CA7">
 867       <description>Cortex-A7 processor based device</description>
 868       <accept Dcore="Cortex-A7"/>
 869     </condition>
 870
 871     <!-- ARMCC compiler -->
 872     <condition id="CA_ARMCC5">
 873       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 874       <require condition="ARMv7-A Device"/>
 875       <require condition="ARMCC5"/>
 876     </condition>
 877     <condition id="CA_ARMCC6">
 878       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 879       <require condition="ARMv7-A Device"/>
 880       <require condition="ARMCC6"/>
 881     </condition>
 882
 883     <condition id="CM0_ARMCC">
 884       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 885       <require condition="CM0"/>
 886       <require Tcompiler="ARMCC"/>
 887     </condition>
 888     <condition id="CM0_LE_ARMCC">
 889       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 890       <require condition="CM0_ARMCC"/>
 891       <require Dendian="Little-endian"/>
 892     </condition>
 893     <condition id="CM0_BE_ARMCC">
 894       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 895       <require condition="CM0_ARMCC"/>
 896       <require Dendian="Big-endian"/>
 897     </condition>
 898
 899     <condition id="CM3_ARMCC">
 900       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 901       <require condition="CM3"/>
 902       <require Tcompiler="ARMCC"/>
 903     </condition>
 904     <condition id="CM3_LE_ARMCC">
 905       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 906       <require condition="CM3_ARMCC"/>
 907       <require Dendian="Little-endian"/>
 908     </condition>
 909     <condition id="CM3_BE_ARMCC">
 910       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 911       <require condition="CM3_ARMCC"/>
 912       <require Dendian="Big-endian"/>
 913     </condition>
 914
 915     <condition id="CM4_ARMCC">
 916       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 917       <require condition="CM4"/>
 918       <require Tcompiler="ARMCC"/>
 919     </condition>
 920     <condition id="CM4_LE_ARMCC">
 921       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 922       <require condition="CM4_ARMCC"/>
 923       <require Dendian="Little-endian"/>
 924     </condition>
 925     <condition id="CM4_BE_ARMCC">
 926       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 927       <require condition="CM4_ARMCC"/>
 928       <require Dendian="Big-endian"/>
 929     </condition>
 930
 931     <condition id="CM4_FP_ARMCC">
 932       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 933       <require condition="CM4_FP"/>
 934       <require Tcompiler="ARMCC"/>
 935     </condition>
 936     <condition id="CM4_FP_LE_ARMCC">
 937       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 938       <require condition="CM4_FP_ARMCC"/>
 939       <require Dendian="Little-endian"/>
 940     </condition>
 941     <condition id="CM4_FP_BE_ARMCC">
 942       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 943       <require condition="CM4_FP_ARMCC"/>
 944       <require Dendian="Big-endian"/>
 945     </condition>
 946
 947     <condition id="CM7_ARMCC">
 948       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 949       <require condition="CM7"/>
 950       <require Tcompiler="ARMCC"/>
 951     </condition>
 952     <condition id="CM7_LE_ARMCC">
 953       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 954       <require condition="CM7_ARMCC"/>
 955       <require Dendian="Little-endian"/>
 956     </condition>
 957     <condition id="CM7_BE_ARMCC">
 958       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 959       <require condition="CM7_ARMCC"/>
 960       <require Dendian="Big-endian"/>
 961     </condition>
 962
 963     <condition id="CM7_FP_ARMCC">
 964       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 965       <require condition="CM7_FP"/>
 966       <require Tcompiler="ARMCC"/>
 967     </condition>
 968     <condition id="CM7_FP_LE_ARMCC">
 969       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 970       <require condition="CM7_FP_ARMCC"/>
 971       <require Dendian="Little-endian"/>
 972     </condition>
 973     <condition id="CM7_FP_BE_ARMCC">
 974       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 975       <require condition="CM7_FP_ARMCC"/>
 976       <require Dendian="Big-endian"/>
 977     </condition>
 978
 979     <condition id="CM7_SP_ARMCC">
 980       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 981       <require condition="CM7_SP"/>
 982       <require Tcompiler="ARMCC"/>
 983     </condition>
 984     <condition id="CM7_SP_LE_ARMCC">
 985       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 986       <require condition="CM7_SP_ARMCC"/>
 987       <require Dendian="Little-endian"/>
 988     </condition>
 989     <condition id="CM7_SP_BE_ARMCC">
 990       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 991       <require condition="CM7_SP_ARMCC"/>
 992       <require Dendian="Big-endian"/>
 993     </condition>
 994
 995     <condition id="CM7_DP_ARMCC">
 996       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 997       <require condition="CM7_DP"/>
 998       <require Tcompiler="ARMCC"/>
 999     </condition>
1000     <condition id="CM7_DP_LE_ARMCC">
1001       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1002       <require condition="CM7_DP_ARMCC"/>
1003       <require Dendian="Little-endian"/>
1004     </condition>
1005     <condition id="CM7_DP_BE_ARMCC">
1006       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1007       <require condition="CM7_DP_ARMCC"/>
1008       <require Dendian="Big-endian"/>
1009     </condition>
1010
1011     <condition id="CM23_ARMCC">
1012       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1013       <require condition="CM23"/>
1014       <require Tcompiler="ARMCC"/>
1015     </condition>
1016     <condition id="CM23_LE_ARMCC">
1017       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1018       <require condition="CM23_ARMCC"/>
1019       <require Dendian="Little-endian"/>
1020     </condition>
1021     <condition id="CM23_BE_ARMCC">
1022       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1023       <require condition="CM23_ARMCC"/>
1024       <require Dendian="Big-endian"/>
1025     </condition>
1026
1027     <condition id="CM33_ARMCC">
1028       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1029       <require condition="CM33"/>
1030       <require Tcompiler="ARMCC"/>
1031     </condition>
1032     <condition id="CM33_LE_ARMCC">
1033       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1034       <require condition="CM33_ARMCC"/>
1035       <require Dendian="Little-endian"/>
1036     </condition>
1037     <condition id="CM33_BE_ARMCC">
1038       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1039       <require condition="CM33_ARMCC"/>
1040       <require Dendian="Big-endian"/>
1041     </condition>
1042
1043     <condition id="CM33_FP_ARMCC">
1044       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1045       <require condition="CM33_FP"/>
1046       <require Tcompiler="ARMCC"/>
1047     </condition>
1048     <condition id="CM33_FP_LE_ARMCC">
1049       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1050       <require condition="CM33_FP_ARMCC"/>
1051       <require Dendian="Little-endian"/>
1052     </condition>
1053     <condition id="CM33_FP_BE_ARMCC">
1054       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1055       <require condition="CM33_FP_ARMCC"/>
1056       <require Dendian="Big-endian"/>
1057     </condition>
1058
1059     <condition id="CM33_NODSP_NOFPU_ARMCC">
1060       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1061       <require condition="CM33_NODSP_NOFPU"/>
1062       <require Tcompiler="ARMCC"/>
1063     </condition>
1064     <condition id="CM33_DSP_NOFPU_ARMCC">
1065       <description>CM33, DSP, no FPU, ARM Compiler</description>
1066       <require condition="CM33_DSP_NOFPU"/>
1067       <require Tcompiler="ARMCC"/>
1068     </condition>
1069     <condition id="CM33_NODSP_SP_ARMCC">
1070       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1071       <require condition="CM33_NODSP_SP"/>
1072       <require Tcompiler="ARMCC"/>
1073     </condition>
1074     <condition id="CM33_DSP_SP_ARMCC">
1075       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1076       <require condition="CM33_DSP_SP"/>
1077       <require Tcompiler="ARMCC"/>
1078     </condition>
1079     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1080       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1081       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1082       <require Dendian="Little-endian"/>
1083     </condition>
1084     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1085       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1086       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1087       <require Dendian="Little-endian"/>
1088     </condition>
1089     <condition id="CM33_NODSP_SP_LE_ARMCC">
1090       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1091       <require condition="CM33_NODSP_SP_ARMCC"/>
1092       <require Dendian="Little-endian"/>
1093     </condition>
1094     <condition id="CM33_DSP_SP_LE_ARMCC">
1095       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1096       <require condition="CM33_DSP_SP_ARMCC"/>
1097       <require Dendian="Little-endian"/>
1098     </condition>
1099
1100     <condition id="ARMv8MBL_ARMCC">
1101       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1102       <require condition="ARMv8MBL"/>
1103       <require Tcompiler="ARMCC"/>
1104     </condition>
1105     <condition id="ARMv8MBL_LE_ARMCC">
1106       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1107       <require condition="ARMv8MBL_ARMCC"/>
1108       <require Dendian="Little-endian"/>
1109     </condition>
1110     <condition id="ARMv8MBL_BE_ARMCC">
1111       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1112       <require condition="ARMv8MBL_ARMCC"/>
1113       <require Dendian="Big-endian"/>
1114     </condition>
1115
1116     <condition id="ARMv8MML_ARMCC">
1117       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1118       <require condition="ARMv8MML"/>
1119       <require Tcompiler="ARMCC"/>
1120     </condition>
1121     <condition id="ARMv8MML_LE_ARMCC">
1122       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1123       <require condition="ARMv8MML_ARMCC"/>
1124       <require Dendian="Little-endian"/>
1125     </condition>
1126     <condition id="ARMv8MML_BE_ARMCC">
1127       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1128       <require condition="ARMv8MML_ARMCC"/>
1129       <require Dendian="Big-endian"/>
1130     </condition>
1131
1132     <condition id="ARMv8MML_FP_ARMCC">
1133       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1134       <require condition="ARMv8MML_FP"/>
1135       <require Tcompiler="ARMCC"/>
1136     </condition>
1137     <condition id="ARMv8MML_FP_LE_ARMCC">
1138       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1139       <require condition="ARMv8MML_FP_ARMCC"/>
1140       <require Dendian="Little-endian"/>
1141     </condition>
1142     <condition id="ARMv8MML_FP_BE_ARMCC">
1143       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1144       <require condition="ARMv8MML_FP_ARMCC"/>
1145       <require Dendian="Big-endian"/>
1146     </condition>
1147
1148     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1149       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1150       <require condition="ARMv8MML_NODSP_NOFPU"/>
1151       <require Tcompiler="ARMCC"/>
1152     </condition>
1153     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1154       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1155       <require condition="ARMv8MML_DSP_NOFPU"/>
1156       <require Tcompiler="ARMCC"/>
1157     </condition>
1158     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1159       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1160       <require condition="ARMv8MML_NODSP_SP"/>
1161       <require Tcompiler="ARMCC"/>
1162     </condition>
1163     <condition id="ARMv8MML_DSP_SP_ARMCC">
1164       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1165       <require condition="ARMv8MML_DSP_SP"/>
1166       <require Tcompiler="ARMCC"/>
1167     </condition>
1168     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1169       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1170       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1171       <require Dendian="Little-endian"/>
1172     </condition>
1173     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1174       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1175       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1176       <require Dendian="Little-endian"/>
1177     </condition>
1178     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1179       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1180       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1181       <require Dendian="Little-endian"/>
1182     </condition>
1183     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1184       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1185       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1186       <require Dendian="Little-endian"/>
1187     </condition>
1188
1189     <!-- GCC compiler -->
1190     <condition id="CA_GCC">
1191       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1192       <require condition="ARMv7-A Device"/>
1193       <require Tcompiler="GCC"/>
1194     </condition>
1195
1196     <condition id="CM0_GCC">
1197       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1198       <require condition="CM0"/>
1199       <require Tcompiler="GCC"/>
1200     </condition>
1201     <condition id="CM0_LE_GCC">
1202       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1203       <require condition="CM0_GCC"/>
1204       <require Dendian="Little-endian"/>
1205     </condition>
1206     <condition id="CM0_BE_GCC">
1207       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1208       <require condition="CM0_GCC"/>
1209       <require Dendian="Big-endian"/>
1210     </condition>
1211
1212     <condition id="CM3_GCC">
1213       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1214       <require condition="CM3"/>
1215       <require Tcompiler="GCC"/>
1216     </condition>
1217     <condition id="CM3_LE_GCC">
1218       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1219       <require condition="CM3_GCC"/>
1220       <require Dendian="Little-endian"/>
1221     </condition>
1222     <condition id="CM3_BE_GCC">
1223       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1224       <require condition="CM3_GCC"/>
1225       <require Dendian="Big-endian"/>
1226     </condition>
1227
1228     <condition id="CM4_GCC">
1229       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1230       <require condition="CM4"/>
1231       <require Tcompiler="GCC"/>
1232     </condition>
1233     <condition id="CM4_LE_GCC">
1234       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1235       <require condition="CM4_GCC"/>
1236       <require Dendian="Little-endian"/>
1237     </condition>
1238     <condition id="CM4_BE_GCC">
1239       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1240       <require condition="CM4_GCC"/>
1241       <require Dendian="Big-endian"/>
1242     </condition>
1243
1244     <condition id="CM4_FP_GCC">
1245       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1246       <require condition="CM4_FP"/>
1247       <require Tcompiler="GCC"/>
1248     </condition>
1249     <condition id="CM4_FP_LE_GCC">
1250       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1251       <require condition="CM4_FP_GCC"/>
1252       <require Dendian="Little-endian"/>
1253     </condition>
1254     <condition id="CM4_FP_BE_GCC">
1255       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1256       <require condition="CM4_FP_GCC"/>
1257       <require Dendian="Big-endian"/>
1258     </condition>
1259
1260     <condition id="CM7_GCC">
1261       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1262       <require condition="CM7"/>
1263       <require Tcompiler="GCC"/>
1264     </condition>
1265     <condition id="CM7_LE_GCC">
1266       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1267       <require condition="CM7_GCC"/>
1268       <require Dendian="Little-endian"/>
1269     </condition>
1270     <condition id="CM7_BE_GCC">
1271       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1272       <require condition="CM7_GCC"/>
1273       <require Dendian="Big-endian"/>
1274     </condition>
1275
1276     <condition id="CM7_FP_GCC">
1277       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1278       <require condition="CM7_FP"/>
1279       <require Tcompiler="GCC"/>
1280     </condition>
1281     <condition id="CM7_FP_LE_GCC">
1282       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1283       <require condition="CM7_FP_GCC"/>
1284       <require Dendian="Little-endian"/>
1285     </condition>
1286     <condition id="CM7_FP_BE_GCC">
1287       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1288       <require condition="CM7_FP_GCC"/>
1289       <require Dendian="Big-endian"/>
1290     </condition>
1291
1292     <condition id="CM7_SP_GCC">
1293       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1294       <require condition="CM7_SP"/>
1295       <require Tcompiler="GCC"/>
1296     </condition>
1297     <condition id="CM7_SP_LE_GCC">
1298       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1299       <require condition="CM7_SP_GCC"/>
1300       <require Dendian="Little-endian"/>
1301     </condition>
1302     <condition id="CM7_SP_BE_GCC">
1303       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1304       <require condition="CM7_SP_GCC"/>
1305       <require Dendian="Big-endian"/>
1306     </condition>
1307
1308     <condition id="CM7_DP_GCC">
1309       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1310       <require condition="CM7_DP"/>
1311       <require Tcompiler="GCC"/>
1312     </condition>
1313     <condition id="CM7_DP_LE_GCC">
1314       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1315       <require condition="CM7_DP_GCC"/>
1316       <require Dendian="Little-endian"/>
1317     </condition>
1318     <condition id="CM7_DP_BE_GCC">
1319       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1320       <require condition="CM7_DP_GCC"/>
1321       <require Dendian="Big-endian"/>
1322     </condition>
1323
1324     <condition id="CM23_GCC">
1325       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1326       <require condition="CM23"/>
1327       <require Tcompiler="GCC"/>
1328     </condition>
1329     <condition id="CM23_LE_GCC">
1330       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1331       <require condition="CM23_GCC"/>
1332       <require Dendian="Little-endian"/>
1333     </condition>
1334     <condition id="CM23_BE_GCC">
1335       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1336       <require condition="CM23_GCC"/>
1337       <require Dendian="Big-endian"/>
1338     </condition>
1339
1340     <condition id="CM33_GCC">
1341       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1342       <require condition="CM33"/>
1343       <require Tcompiler="GCC"/>
1344     </condition>
1345     <condition id="CM33_LE_GCC">
1346       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1347       <require condition="CM33_GCC"/>
1348       <require Dendian="Little-endian"/>
1349     </condition>
1350     <condition id="CM33_BE_GCC">
1351       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1352       <require condition="CM33_GCC"/>
1353       <require Dendian="Big-endian"/>
1354     </condition>
1355
1356     <condition id="CM33_FP_GCC">
1357       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1358       <require condition="CM33_FP"/>
1359       <require Tcompiler="GCC"/>
1360     </condition>
1361     <condition id="CM33_FP_LE_GCC">
1362       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1363       <require condition="CM33_FP_GCC"/>
1364       <require Dendian="Little-endian"/>
1365     </condition>
1366     <condition id="CM33_FP_BE_GCC">
1367       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1368       <require condition="CM33_FP_GCC"/>
1369       <require Dendian="Big-endian"/>
1370     </condition>
1371
1372     <condition id="CM33_NODSP_NOFPU_GCC">
1373       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1374       <require condition="CM33_NODSP_NOFPU"/>
1375       <require Tcompiler="GCC"/>
1376     </condition>
1377     <condition id="CM33_DSP_NOFPU_GCC">
1378       <description>CM33, DSP, no FPU, GCC Compiler</description>
1379       <require condition="CM33_DSP_NOFPU"/>
1380       <require Tcompiler="GCC"/>
1381     </condition>
1382     <condition id="CM33_NODSP_SP_GCC">
1383       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1384       <require condition="CM33_NODSP_SP"/>
1385       <require Tcompiler="GCC"/>
1386     </condition>
1387     <condition id="CM33_DSP_SP_GCC">
1388       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1389       <require condition="CM33_DSP_SP"/>
1390       <require Tcompiler="GCC"/>
1391     </condition>
1392     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1393       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1394       <require condition="CM33_NODSP_NOFPU_GCC"/>
1395       <require Dendian="Little-endian"/>
1396     </condition>
1397     <condition id="CM33_DSP_NOFPU_LE_GCC">
1398       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1399       <require condition="CM33_DSP_NOFPU_GCC"/>
1400       <require Dendian="Little-endian"/>
1401     </condition>
1402     <condition id="CM33_NODSP_SP_LE_GCC">
1403       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1404       <require condition="CM33_NODSP_SP_GCC"/>
1405       <require Dendian="Little-endian"/>
1406     </condition>
1407     <condition id="CM33_DSP_SP_LE_GCC">
1408       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1409       <require condition="CM33_DSP_SP_GCC"/>
1410       <require Dendian="Little-endian"/>
1411     </condition>
1412
1413     <condition id="ARMv8MBL_GCC">
1414       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1415       <require condition="ARMv8MBL"/>
1416       <require Tcompiler="GCC"/>
1417     </condition>
1418     <condition id="ARMv8MBL_LE_GCC">
1419       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1420       <require condition="ARMv8MBL_GCC"/>
1421       <require Dendian="Little-endian"/>
1422     </condition>
1423     <condition id="ARMv8MBL_BE_GCC">
1424       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1425       <require condition="ARMv8MBL_GCC"/>
1426       <require Dendian="Big-endian"/>
1427     </condition>
1428
1429     <condition id="ARMv8MML_GCC">
1430       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1431       <require condition="ARMv8MML"/>
1432       <require Tcompiler="GCC"/>
1433     </condition>
1434     <condition id="ARMv8MML_LE_GCC">
1435       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1436       <require condition="ARMv8MML_GCC"/>
1437       <require Dendian="Little-endian"/>
1438     </condition>
1439     <condition id="ARMv8MML_BE_GCC">
1440       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1441       <require condition="ARMv8MML_GCC"/>
1442       <require Dendian="Big-endian"/>
1443     </condition>
1444
1445     <condition id="ARMv8MML_FP_GCC">
1446       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1447       <require condition="ARMv8MML_FP"/>
1448       <require Tcompiler="GCC"/>
1449     </condition>
1450     <condition id="ARMv8MML_FP_LE_GCC">
1451       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1452       <require condition="ARMv8MML_FP_GCC"/>
1453       <require Dendian="Little-endian"/>
1454     </condition>
1455     <condition id="ARMv8MML_FP_BE_GCC">
1456       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1457       <require condition="ARMv8MML_FP_GCC"/>
1458       <require Dendian="Big-endian"/>
1459     </condition>
1460
1461     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1462       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1463       <require condition="ARMv8MML_NODSP_NOFPU"/>
1464       <require Tcompiler="GCC"/>
1465     </condition>
1466     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1467       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1468       <require condition="ARMv8MML_DSP_NOFPU"/>
1469       <require Tcompiler="GCC"/>
1470     </condition>
1471     <condition id="ARMv8MML_NODSP_SP_GCC">
1472       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1473       <require condition="ARMv8MML_NODSP_SP"/>
1474       <require Tcompiler="GCC"/>
1475     </condition>
1476     <condition id="ARMv8MML_DSP_SP_GCC">
1477       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1478       <require condition="ARMv8MML_DSP_SP"/>
1479       <require Tcompiler="GCC"/>
1480     </condition>
1481     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1482       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1483       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1484       <require Dendian="Little-endian"/>
1485     </condition>
1486     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1487       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1488       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1489       <require Dendian="Little-endian"/>
1490     </condition>
1491     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1492       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1493       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1494       <require Dendian="Little-endian"/>
1495     </condition>
1496     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1497       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1498       <require condition="ARMv8MML_DSP_SP_GCC"/>
1499       <require Dendian="Little-endian"/>
1500     </condition>
1501
1502     <!-- IAR compiler -->
1503     <condition id="CA_IAR">
1504       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1505       <require condition="ARMv7-A Device"/>
1506       <require Tcompiler="IAR"/>
1507     </condition>
1508
1509     <condition id="CM0_IAR">
1510       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1511       <require condition="CM0"/>
1512       <require Tcompiler="IAR"/>
1513     </condition>
1514     <condition id="CM0_LE_IAR">
1515       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1516       <require condition="CM0_IAR"/>
1517       <require Dendian="Little-endian"/>
1518     </condition>
1519     <condition id="CM0_BE_IAR">
1520       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1521       <require condition="CM0_IAR"/>
1522       <require Dendian="Big-endian"/>
1523     </condition>
1524
1525     <condition id="CM3_IAR">
1526       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1527       <require condition="CM3"/>
1528       <require Tcompiler="IAR"/>
1529     </condition>
1530     <condition id="CM3_LE_IAR">
1531       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1532       <require condition="CM3_IAR"/>
1533       <require Dendian="Little-endian"/>
1534     </condition>
1535     <condition id="CM3_BE_IAR">
1536       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1537       <require condition="CM3_IAR"/>
1538       <require Dendian="Big-endian"/>
1539     </condition>
1540
1541     <condition id="CM4_IAR">
1542       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1543       <require condition="CM4"/>
1544       <require Tcompiler="IAR"/>
1545     </condition>
1546     <condition id="CM4_LE_IAR">
1547       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1548       <require condition="CM4_IAR"/>
1549       <require Dendian="Little-endian"/>
1550     </condition>
1551     <condition id="CM4_BE_IAR">
1552       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1553       <require condition="CM4_IAR"/>
1554       <require Dendian="Big-endian"/>
1555     </condition>
1556
1557     <condition id="CM4_FP_IAR">
1558       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1559       <require condition="CM4_FP"/>
1560       <require Tcompiler="IAR"/>
1561     </condition>
1562     <condition id="CM4_FP_LE_IAR">
1563       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1564       <require condition="CM4_FP_IAR"/>
1565       <require Dendian="Little-endian"/>
1566     </condition>
1567     <condition id="CM4_FP_BE_IAR">
1568       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1569       <require condition="CM4_FP_IAR"/>
1570       <require Dendian="Big-endian"/>
1571     </condition>
1572
1573     <condition id="CM7_IAR">
1574       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1575       <require condition="CM7"/>
1576       <require Tcompiler="IAR"/>
1577     </condition>
1578     <condition id="CM7_LE_IAR">
1579       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1580       <require condition="CM7_IAR"/>
1581       <require Dendian="Little-endian"/>
1582     </condition>
1583     <condition id="CM7_BE_IAR">
1584       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1585       <require condition="CM7_IAR"/>
1586       <require Dendian="Big-endian"/>
1587     </condition>
1588
1589     <condition id="CM7_FP_IAR">
1590       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1591       <require condition="CM7_FP"/>
1592       <require Tcompiler="IAR"/>
1593     </condition>
1594     <condition id="CM7_FP_LE_IAR">
1595       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1596       <require condition="CM7_FP_IAR"/>
1597       <require Dendian="Little-endian"/>
1598     </condition>
1599     <condition id="CM7_FP_BE_IAR">
1600       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1601       <require condition="CM7_FP_IAR"/>
1602       <require Dendian="Big-endian"/>
1603     </condition>
1604
1605     <condition id="CM7_SP_IAR">
1606       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1607       <require condition="CM7_SP"/>
1608       <require Tcompiler="IAR"/>
1609     </condition>
1610     <condition id="CM7_SP_LE_IAR">
1611       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1612       <require condition="CM7_SP_IAR"/>
1613       <require Dendian="Little-endian"/>
1614     </condition>
1615     <condition id="CM7_SP_BE_IAR">
1616       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1617       <require condition="CM7_SP_IAR"/>
1618       <require Dendian="Big-endian"/>
1619     </condition>
1620
1621     <condition id="CM7_DP_IAR">
1622       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1623       <require condition="CM7_DP"/>
1624       <require Tcompiler="IAR"/>
1625     </condition>
1626     <condition id="CM7_DP_LE_IAR">
1627       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1628       <require condition="CM7_DP_IAR"/>
1629       <require Dendian="Little-endian"/>
1630     </condition>
1631     <condition id="CM7_DP_BE_IAR">
1632       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1633       <require condition="CM7_DP_IAR"/>
1634       <require Dendian="Big-endian"/>
1635     </condition>
1636
1637     <!-- conditions selecting single devices and CMSIS Core -->
1638     <!-- used for component startup, GCC version is used for C-Startup -->
1639     <condition id="ARMCM0 CMSIS">
1640       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1641       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1642       <require Cclass="CMSIS" Cgroup="CORE"/>
1643     </condition>
1644     <condition id="ARMCM0 CMSIS GCC">
1645       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1646       <require condition="ARMCM0 CMSIS"/>
1647       <require condition="GCC"/>
1648     </condition>
1649
1650     <condition id="ARMCM0+ CMSIS">
1651       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1652       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1653       <require Cclass="CMSIS" Cgroup="CORE"/>
1654     </condition>
1655     <condition id="ARMCM0+ CMSIS GCC">
1656       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1657       <require condition="ARMCM0+ CMSIS"/>
1658       <require condition="GCC"/>
1659     </condition>
1660
1661     <condition id="ARMCM3 CMSIS">
1662       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1663       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1664       <require Cclass="CMSIS" Cgroup="CORE"/>
1665     </condition>
1666     <condition id="ARMCM3 CMSIS GCC">
1667       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1668       <require condition="ARMCM3 CMSIS"/>
1669       <require condition="GCC"/>
1670     </condition>
1671
1672     <condition id="ARMCM4 CMSIS">
1673       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1674       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1675       <require Cclass="CMSIS" Cgroup="CORE"/>
1676     </condition>
1677     <condition id="ARMCM4 CMSIS GCC">
1678       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1679       <require condition="ARMCM4 CMSIS"/>
1680       <require condition="GCC"/>
1681     </condition>
1682
1683     <condition id="ARMCM7 CMSIS">
1684       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1685       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1686       <require Cclass="CMSIS" Cgroup="CORE"/>
1687     </condition>
1688     <condition id="ARMCM7 CMSIS GCC">
1689       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1690       <require condition="ARMCM7 CMSIS"/>
1691       <require condition="GCC"/>
1692     </condition>
1693
1694     <condition id="ARMCM23 CMSIS">
1695       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1696       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1697       <require Cclass="CMSIS" Cgroup="CORE"/>
1698     </condition>
1699     <condition id="ARMCM23 CMSIS GCC">
1700       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1701       <require condition="ARMCM23 CMSIS"/>
1702       <require condition="GCC"/>
1703     </condition>
1704
1705     <condition id="ARMCM33 CMSIS">
1706       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1707       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1708       <require Cclass="CMSIS" Cgroup="CORE"/>
1709     </condition>
1710     <condition id="ARMCM33 CMSIS GCC">
1711       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1712       <require condition="ARMCM33 CMSIS"/>
1713       <require condition="GCC"/>
1714     </condition>
1715
1716     <condition id="ARMSC000 CMSIS">
1717       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1718       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1719       <require Cclass="CMSIS" Cgroup="CORE"/>
1720     </condition>
1721     <condition id="ARMSC000 CMSIS GCC">
1722       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1723       <require condition="ARMSC000 CMSIS"/>
1724       <require condition="GCC"/>
1725     </condition>
1726
1727     <condition id="ARMSC300 CMSIS">
1728       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1729       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1730       <require Cclass="CMSIS" Cgroup="CORE"/>
1731     </condition>
1732     <condition id="ARMSC300 CMSIS GCC">
1733       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1734       <require condition="ARMSC300 CMSIS"/>
1735       <require condition="GCC"/>
1736     </condition>
1737
1738     <condition id="ARMv8MBL CMSIS">
1739       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1740       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1741       <require Cclass="CMSIS" Cgroup="CORE"/>
1742     </condition>
1743     <condition id="ARMv8MBL CMSIS GCC">
1744       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1745       <require condition="ARMv8MBL CMSIS"/>
1746       <require condition="GCC"/>
1747     </condition>
1748
1749     <condition id="ARMv8MML CMSIS">
1750       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1751       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1752       <require Cclass="CMSIS" Cgroup="CORE"/>
1753     </condition>
1754     <condition id="ARMv8MML CMSIS GCC">
1755       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1756       <require condition="ARMv8MML CMSIS"/>
1757       <require condition="GCC"/>
1758     </condition>
1759
1760     <condition id="ARMCA5 CMSIS">
1761       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1762       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1763       <require Cclass="CMSIS" Cgroup="CORE"/>
1764     </condition>
1765
1766     <condition id="ARMCA7 CMSIS">
1767       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1768       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1769       <require Cclass="CMSIS" Cgroup="CORE"/>
1770     </condition>
1771
1772     <condition id="ARMCA9 CMSIS">
1773       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1774       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1775       <require Cclass="CMSIS" Cgroup="CORE"/>
1776     </condition>
1777
1778     <!-- CMSIS DSP -->
1779     <condition id="CMSIS DSP">
1780       <description>Components required for DSP</description>
1781       <require condition="ARMv6_7_8-M Device"/>
1782       <require condition="ARMCC GCC"/>
1783       <require Cclass="CMSIS" Cgroup="CORE"/>
1784     </condition>
1785
1786     <!-- RTOS RTX -->
1787     <condition id="RTOS RTX">
1788       <description>Components required for RTOS RTX</description>
1789       <require condition="ARMv6_7-M Device"/>
1790       <require condition="ARMCC GCC IAR"/>
1791       <require Cclass="Device" Cgroup="Startup"/>
1792       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1793     </condition>
1794     <condition id="RTOS RTX IFX">
1795       <description>Components required for RTOS RTX IFX</description>
1796       <require condition="ARMv6_7-M Device"/>
1797       <require condition="ARMCC GCC IAR"/>
1798       <require Dvendor="Infineon:7" Dname="XMC4*"/>
1799       <require Cclass="Device" Cgroup="Startup"/>
1800       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1801     </condition>
1802     <condition id="RTOS RTX5">
1803       <description>Components required for RTOS RTX5</description>
1804       <require condition="ARMv6_7_8-M Device"/>
1805       <require condition="ARMCC GCC IAR"/>
1806       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1807     </condition>
1808     <condition id="RTOS2 RTX5">
1809       <description>Components required for RTOS2 RTX5</description>
1810       <require condition="ARMv6_7_8-M Device"/>
1811       <require condition="ARMCC GCC IAR"/>
1812       <require Cclass="CMSIS"  Cgroup="CORE"/>
1813       <require Cclass="Device" Cgroup="Startup"/>
1814     </condition>
1815     <condition id="RTOS2 RTX5 v7-A">
1816       <description>Components required for RTOS2 RTX5 v7-A</description>
1817       <require condition="ARMv7-A Device"/>
1818       <require condition="ARMCC GCC IAR"/>
1819       <require Cclass="CMSIS"  Cgroup="CORE"/>
1820       <require Cclass="Device" Cgroup="Startup"/>
1821       <require Cclass="Device" Cgroup="OS Tick"/>
1822       <require Cclass="Device" Cgroup="IRQ Controller"/>
1823     </condition>
1824     <condition id="RTOS2 RTX5 Lib">
1825       <description>Components required for RTOS2 RTX5 Library</description>
1826       <require condition="ARMv6_7_8-M Device"/>
1827       <require condition="ARMCC GCC IAR"/>
1828       <require Cclass="CMSIS"  Cgroup="CORE"/>
1829       <require Cclass="Device" Cgroup="Startup"/>
1830     </condition>
1831     <condition id="RTOS2 RTX5 NS">
1832       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1833       <require condition="ARMv8-M TZ Device"/>
1834       <require condition="ARMCC GCC"/>
1835       <require Cclass="CMSIS"  Cgroup="CORE"/>
1836       <require Cclass="Device" Cgroup="Startup"/>
1837     </condition>
1838
1839     <!-- OS Tick -->
1840     <condition id="OS Tick PTIM">
1841       <description>Components required for OS Tick Private Timer</description>
1842       <require condition="CA5_CA9"/>
1843       <require Cclass="Device" Cgroup="IRQ Controller"/>
1844     </condition>
1845
1846     <condition id="OS Tick GTIM">
1847       <description>Components required for OS Tick Generic Physical Timer</description>
1848       <require condition="CA7"/>
1849       <require Cclass="Device" Cgroup="IRQ Controller"/>
1850     </condition>
1851
1852   </conditions>
1853
1854   <components>
1855     <!-- CMSIS-Core component -->
1856     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2"  condition="ARMv6_7_8-M Device" >
1857       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1858       <files>
1859         <!-- CPU independent -->
1860         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1861         <file category="include" name="CMSIS/Include/"/>
1862         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1863         <!-- Code template -->
1864         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1865         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1866       </files>
1867     </component>
1868
1869     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0"  condition="ARMv7-A Device" >
1870       <description>CMSIS-CORE for Cortex-A</description>
1871       <files>
1872         <!-- CPU independent -->
1873         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1874         <file category="include" name="CMSIS/Core_A/Include/"/>
1875       </files>
1876     </component>
1877
1878     <!-- CMSIS-Startup components -->
1879     <!-- Cortex-M0 -->
1880     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1881       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1882       <files>
1883         <!-- include folder / device header file -->
1884         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1885         <!-- startup / system file -->
1886         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1887         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1888         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1889         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1890         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1891       </files>
1892     </component>
1893     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1894       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1895       <files>
1896         <!-- include folder / device header file -->
1897         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1898         <!-- startup / system file -->
1899         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1900         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1901         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1902       </files>
1903     </component>
1904
1905     <!-- Cortex-M0+ -->
1906     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1907       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1908       <files>
1909         <!-- include folder / device header file -->
1910         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1911         <!-- startup / system file -->
1912         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1913         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1914         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1915         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1916         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1917       </files>
1918     </component>
1919     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1920       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1921       <files>
1922         <!-- include folder / device header file -->
1923         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1924         <!-- startup / system file -->
1925         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1926         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1927         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1928       </files>
1929     </component>
1930
1931     <!-- Cortex-M3 -->
1932     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1933       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1934       <files>
1935         <!-- include folder / device header file -->
1936         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1937         <!-- startup / system file -->
1938         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1939         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1940         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1941         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1942         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1943       </files>
1944     </component>
1945     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1946       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1947       <files>
1948         <!-- include folder / device header file -->
1949         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1950         <!-- startup / system file -->
1951         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1952         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1953         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1954       </files>
1955     </component>
1956
1957     <!-- Cortex-M4 -->
1958     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1959       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1960       <files>
1961         <!-- include folder / device header file -->
1962         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1963         <!-- startup / system file -->
1964         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1965         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1966         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1967         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1968         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1969       </files>
1970     </component>
1971     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1972       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1973       <files>
1974         <!-- include folder / device header file -->
1975         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1976         <!-- startup / system file -->
1977         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1978         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1979         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1980       </files>
1981     </component>
1982
1983     <!-- Cortex-M7 -->
1984     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1985       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1986       <files>
1987         <!-- include folder / device header file -->
1988         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1989         <!-- startup / system file -->
1990         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1991         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1992         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1993         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1994         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1995       </files>
1996     </component>
1997     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1998       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1999       <files>
2000         <!-- include folder / device header file -->
2001         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2002         <!-- startup / system file -->
2003         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2004         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2005         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2006       </files>
2007     </component>
2008
2009     <!-- Cortex-M23 -->
2010     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2011       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2012       <files>
2013         <!-- include folder / device header file -->
2014         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2015         <!-- startup / system file -->
2016         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2017         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2018         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2019         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2020         <!-- SAU configuration -->
2021         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2022       </files>
2023     </component>
2024     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2025       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2026       <files>
2027         <!-- include folder / device header file -->
2028         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2029         <!-- startup / system file -->
2030         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2031         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2032         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2033         <!-- SAU configuration -->
2034         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2035       </files>
2036     </component>
2037
2038     <!-- Cortex-M33 -->
2039     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2040       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2041       <files>
2042         <!-- include folder / device header file -->
2043         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2044         <!-- startup / system file -->
2045         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2046         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2047         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2048         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2049         <!-- SAU configuration -->
2050         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2051       </files>
2052     </component>
2053     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2054       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2055       <files>
2056         <!-- include folder / device header file -->
2057         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2058         <!-- startup / system file -->
2059         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2060         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2061         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2062         <!-- SAU configuration -->
2063         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2064       </files>
2065     </component>
2066
2067     <!-- Cortex-SC000 -->
2068     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2069       <description>System and Startup for Generic ARM SC000 device</description>
2070       <files>
2071         <!-- include folder / device header file -->
2072         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2073         <!-- startup / system file -->
2074         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2075         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2076         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2077         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2078         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2079       </files>
2080     </component>
2081     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2082       <description>System and Startup for Generic ARM SC000 device</description>
2083       <files>
2084         <!-- include folder / device header file -->
2085         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2086         <!-- startup / system file -->
2087         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2088         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2089         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2090       </files>
2091     </component>
2092
2093     <!-- Cortex-SC300 -->
2094     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2095       <description>System and Startup for Generic ARM SC300 device</description>
2096       <files>
2097         <!-- include folder / device header file -->
2098         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2099         <!-- startup / system file -->
2100         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2101         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2102         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2103         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2104         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2105       </files>
2106     </component>
2107     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2108       <description>System and Startup for Generic ARM SC300 device</description>
2109       <files>
2110         <!-- include folder / device header file -->
2111         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2112         <!-- startup / system file -->
2113         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2114         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2115         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2116       </files>
2117     </component>
2118
2119     <!-- ARMv8MBL -->
2120     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2121       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2122       <files>
2123         <!-- include folder / device header file -->
2124         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2125         <!-- startup / system file -->
2126         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2127         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2128         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2129         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2130         <!-- SAU configuration -->
2131         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2132       </files>
2133     </component>
2134     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2135       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2136       <files>
2137         <!-- include folder / device header file -->
2138         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2139         <!-- startup / system file -->
2140         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2141         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2142         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2143         <!-- SAU configuration -->
2144         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2145       </files>
2146     </component>
2147
2148     <!-- ARMv8MML -->
2149     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2150       <description>System and Startup for Generic ARM ARMv8MML device</description>
2151       <files>
2152         <!-- include folder / device header file -->
2153         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2154         <!-- startup / system file -->
2155         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2156         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2157         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2158         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2159         <!-- SAU configuration -->
2160         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2161       </files>
2162     </component>
2163     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2164       <description>System and Startup for Generic ARM ARMv8MML device</description>
2165       <files>
2166         <!-- include folder / device header file -->
2167         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2168         <!-- startup / system file -->
2169         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2170         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2171         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2172         <!-- SAU configuration -->
2173         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2174       </files>
2175     </component>
2176
2177     <!-- Cortex-A5 -->
2178     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2179       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2180       <files>
2181         <!-- include folder / device header file -->
2182         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2183         <!-- startup / system / mmu files -->
2184         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2185         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2186         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2187         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2188         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2189         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2190         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2191         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2192
2193       </files>
2194     </component>
2195
2196     <!-- Cortex-A7 -->
2197     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2198       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2199       <files>
2200         <!-- include folder / device header file -->
2201         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2202         <!-- startup / system / mmu files -->
2203         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2204         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2205         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2206         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2207         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2208         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2209         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2210         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2211       </files>
2212     </component>
2213
2214     <!-- Cortex-A9 -->
2215     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2216       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2217       <files>
2218         <!-- include folder / device header file -->
2219         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2220         <!-- startup / system / mmu files -->
2221         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2222         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2223         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2224         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2225         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2226         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2227         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2228         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2229         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2230         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2231       </files>
2232     </component>
2233
2234     <!-- IRQ Controller -->
2235     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2236       <description>IRQ Controller implementation using GIC</description>
2237       <files>
2238         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2239       </files>
2240     </component>
2241
2242     <!-- OS Tick -->
2243     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
2244       <description>OS Tick implementation using Private Timer</description>
2245       <files>
2246         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2247       </files>
2248     </component>
2249
2250     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2251       <description>OS Tick implementation using Generic Physical Timer</description>
2252       <files>
2253         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2254       </files>
2255     </component>
2256
2257     <!-- CMSIS-DSP component -->
2258     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2259       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2260       <files>
2261         <!-- CPU independent -->
2262         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2263         <file category="header" name="CMSIS/Include/arm_math.h"/>
2264
2265         <!-- CPU and Compiler dependent -->
2266         <!-- ARMCC -->
2267         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2268         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2269         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2270         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2271         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2272         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2273         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2274         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2275         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2276         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2277         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2278         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2279         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2280         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2281
2282         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2283         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2284         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2285         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2286         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2287         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2288         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2289         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2290         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2291         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2292         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2293         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2294
2295         <!-- GCC -->
2296         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2297         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2298         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2299         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2300         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2301         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2302         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2303
2304         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2305         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2306         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2307         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2308         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2309         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2310         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2311         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2312         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2313         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2314         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2315         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2316
2317       </files>
2318     </component>
2319
2320     <!-- CMSIS-RTOS Keil RTX component -->
2321     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2322       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2323       <RTE_Components_h>
2324         <!-- the following content goes into file 'RTE_Components.h' -->
2325         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2326         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2327       </RTE_Components_h>
2328       <files>
2329         <!-- CPU independent -->
2330         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2331         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2332         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2333
2334         <!-- RTX templates -->
2335         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2336         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2337         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2338         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2339         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2340         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2341         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2342         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2343         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2344         <!-- tool-chain specific template file -->
2345         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2346         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2347         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2348
2349         <!-- CPU and Compiler dependent -->
2350         <!-- ARMCC -->
2351         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2352         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2353         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2354         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2355         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2356         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2357         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2358         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2359         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2360         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2361         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2362         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2363         <!-- GCC -->
2364         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2365         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2366         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2367         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2368         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2369         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2370         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2371         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2372         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2373         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2374         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2375         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2376         <!-- IAR -->
2377         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2378         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2379         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2380         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2381         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2382         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2383         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2384         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2385         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2386         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2387         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2388         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2389       </files>
2390     </component>
2391     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2392     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2393       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2394       <RTE_Components_h>
2395         <!-- the following content goes into file 'RTE_Components.h' -->
2396         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2397         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2398       </RTE_Components_h>
2399       <files>
2400         <!-- CPU independent -->
2401         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2402         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2403         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2404
2405         <!-- RTX templates -->
2406         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2407         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2408         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2409         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2410         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2411         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2412         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2413         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2414         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2415         <!-- tool-chain specific template file -->
2416         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2417         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2418         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2419
2420         <!-- CPU and Compiler dependent -->
2421         <!-- ARMCC -->
2422         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2423         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2424         <!-- GCC -->
2425         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2426         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2427         <!-- IAR -->
2428       </files>
2429     </component>
2430
2431     <!-- CMSIS-RTOS Keil RTX5 component -->
2432     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.1" Capiversion="1.0.0" condition="RTOS RTX5">
2433       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2434       <RTE_Components_h>
2435         <!-- the following content goes into file 'RTE_Components.h' -->
2436         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2437         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2438       </RTE_Components_h>
2439       <files>
2440         <!-- RTX header file -->
2441         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2442         <!-- RTX compatibility module for API V1 -->
2443         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2444       </files>
2445     </component>
2446
2447     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2448     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
2449       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2450       <RTE_Components_h>
2451         <!-- the following content goes into file 'RTE_Components.h' -->
2452         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2453         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2454       </RTE_Components_h>
2455       <files>
2456         <!-- RTX documentation -->
2457         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2458
2459         <!-- RTX header files -->
2460         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2461
2462         <!-- RTX configuration -->
2463         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2464         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2465
2466         <!-- RTX templates -->
2467         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2468         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2469         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2470         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2471         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2472         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2473         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2474         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2475         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2476         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2477
2478         <!-- RTX library configuration -->
2479         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2480
2481         <!-- RTX libraries (CPU and Compiler dependent) -->
2482         <!-- ARMCC -->
2483         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2484         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2485         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2486         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2487         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2488         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2489         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2490         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2491         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2492         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2493         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2494         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2495         <!-- GCC -->
2496         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2497         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2498         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2499         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2500         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2501         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2502         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2503         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2504         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2505         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2506         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2507         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2508         <!-- IAR -->
2509         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2510         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2511         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2512         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2513         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2514         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2515       </files>
2516     </component>
2517     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2518       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2519       <RTE_Components_h>
2520         <!-- the following content goes into file 'RTE_Components.h' -->
2521         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2522         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2523         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2524       </RTE_Components_h>
2525       <files>
2526         <!-- RTX documentation -->
2527         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2528
2529         <!-- RTX header files -->
2530         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2531
2532         <!-- RTX configuration -->
2533         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2534         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2535
2536         <!-- RTX templates -->
2537         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2538         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2539         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2540         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2541         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2542         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2543         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2544         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2545         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2546         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2547
2548         <!-- RTX library configuration -->
2549         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2550
2551         <!-- RTX libraries (CPU and Compiler dependent) -->
2552         <!-- ARMCC -->
2553         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2554         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2555         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2556         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2557         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2558         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2559         <!-- GCC -->
2560         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2561         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2562         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2563         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2564         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2565         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2566       </files>
2567     </component>
2568     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5">
2569       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2570       <RTE_Components_h>
2571         <!-- the following content goes into file 'RTE_Components.h' -->
2572         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2573         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2574         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2575       </RTE_Components_h>
2576       <files>
2577         <!-- RTX documentation -->
2578         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2579
2580         <!-- RTX header files -->
2581         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2582
2583         <!-- RTX configuration -->
2584         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2585         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2586
2587         <!-- RTX templates -->
2588         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2589         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2590         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2591         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2592         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2593         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2594         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2595         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2596         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2597         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2598
2599         <!-- RTX sources (core) -->
2600         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2601         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2602         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2603         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2604         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2605         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2606         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2607         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2608         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2609         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2610         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2611         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2612         <!-- RTX sources (library configuration) -->
2613         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2614         <!-- RTX sources (handlers ARMCC) -->
2615         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2616         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2617         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2618         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2619         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2620         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2621         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2622         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2623         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2624         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2625         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2626         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2627         <!-- RTX sources (handlers GCC) -->
2628         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2629         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2630         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2631         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2632         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2633         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2634         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2635         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2636         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2637         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2638         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2639         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2640         <!-- RTX sources (handlers IAR) -->
2641         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2642         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2643         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2644         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2645         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2646         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2647         <!-- OS Tick (SysTick) -->
2648         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2649       </files>
2650     </component>
2651     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
2652       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2653       <RTE_Components_h>
2654         <!-- the following content goes into file 'RTE_Components.h' -->
2655         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2656         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2657         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2658       </RTE_Components_h>
2659       <files>
2660         <!-- RTX documentation -->
2661         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2662
2663         <!-- RTX header files -->
2664         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2665
2666         <!-- RTX configuration -->
2667         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2668         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2669
2670         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2671
2672         <!-- RTX templates -->
2673         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2674         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2675         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2676         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2677         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2678         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2679         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2680         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2681         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2682         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2683
2684         <!-- RTX sources (core) -->
2685         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2686         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2687         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2688         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2689         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2690         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2691         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2692         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2693         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2694         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2695         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2696         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2697         <!-- RTX sources (library configuration) -->
2698         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2699         <!-- RTX sources (handlers ARMCC) -->
2700         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2701         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2702         <!-- RTX sources (handlers GCC) -->
2703         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2704         <!-- RTX sources (handlers IAR) -->
2705         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2706       </files>
2707     </component>
2708     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2709       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2710       <RTE_Components_h>
2711         <!-- the following content goes into file 'RTE_Components.h' -->
2712         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2713         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2714         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2715         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2716       </RTE_Components_h>
2717       <files>
2718         <!-- RTX documentation -->
2719         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2720
2721         <!-- RTX header files -->
2722         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2723
2724         <!-- RTX configuration -->
2725         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2726         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2727
2728         <!-- RTX templates -->
2729         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2730         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2731         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2732         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2733         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2734         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2735         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2736         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2737         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2738         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2739
2740         <!-- RTX sources (core) -->
2741         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2742         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2743         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2744         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2745         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2746         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2747         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2748         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2749         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2750         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2751         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2752         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2753         <!-- RTX sources (library configuration) -->
2754         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2755         <!-- RTX sources (ARMCC handlers) -->
2756         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2757         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2758         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2759         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2760         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2761         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2762         <!-- RTX sources (GCC handlers) -->
2763         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2764         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2765         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2766         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2767         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2768         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2769         <!-- OS Tick (SysTick) -->
2770         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2771       </files>
2772     </component>
2773
2774   </components>
2775
2776   <boards>
2777     <board name="uVision Simulator" vendor="Keil">
2778       <description>uVision Simulator</description>
2779       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2780       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2781       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2782       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2783       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2784       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2785       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2786       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2787       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2788       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2789       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2790       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2791       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2792       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2793       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2794       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2795       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2796       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2797     </board>
2798
2799     <board name="Fixed Virtual Platform" vendor="ARM">
2800       <description>Fixed Virtual Platform</description>
2801       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
2802       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
2803       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
2804     </board>
2805   </boards>
2806
2807   <examples>
2808     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2809       <description>DSP_Lib Class Marks example</description>
2810       <board name="uVision Simulator" vendor="Keil"/>
2811       <project>
2812         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2813       </project>
2814       <attributes>
2815         <component Cclass="CMSIS" Cgroup="CORE"/>
2816         <component Cclass="CMSIS" Cgroup="DSP"/>
2817         <component Cclass="Device" Cgroup="Startup"/>
2818         <category>Getting Started</category>
2819       </attributes>
2820     </example>
2821
2822     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2823       <description>DSP_Lib Convolution example</description>
2824       <board name="uVision Simulator" vendor="Keil"/>
2825       <project>
2826         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2827       </project>
2828       <attributes>
2829         <component Cclass="CMSIS" Cgroup="CORE"/>
2830         <component Cclass="CMSIS" Cgroup="DSP"/>
2831         <component Cclass="Device" Cgroup="Startup"/>
2832         <category>Getting Started</category>
2833       </attributes>
2834     </example>
2835
2836     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2837       <description>DSP_Lib Dotproduct example</description>
2838       <board name="uVision Simulator" vendor="Keil"/>
2839       <project>
2840         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2841       </project>
2842       <attributes>
2843         <component Cclass="CMSIS" Cgroup="CORE"/>
2844         <component Cclass="CMSIS" Cgroup="DSP"/>
2845         <component Cclass="Device" Cgroup="Startup"/>
2846         <category>Getting Started</category>
2847       </attributes>
2848     </example>
2849
2850     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2851       <description>DSP_Lib FFT Bin example</description>
2852       <board name="uVision Simulator" vendor="Keil"/>
2853       <project>
2854         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2855       </project>
2856       <attributes>
2857         <component Cclass="CMSIS" Cgroup="CORE"/>
2858         <component Cclass="CMSIS" Cgroup="DSP"/>
2859         <component Cclass="Device" Cgroup="Startup"/>
2860         <category>Getting Started</category>
2861       </attributes>
2862     </example>
2863
2864     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2865       <description>DSP_Lib FIR example</description>
2866       <board name="uVision Simulator" vendor="Keil"/>
2867       <project>
2868         <environment name="uv" load="arm_fir_example.uvprojx"/>
2869       </project>
2870       <attributes>
2871         <component Cclass="CMSIS" Cgroup="CORE"/>
2872         <component Cclass="CMSIS" Cgroup="DSP"/>
2873         <component Cclass="Device" Cgroup="Startup"/>
2874         <category>Getting Started</category>
2875       </attributes>
2876     </example>
2877
2878     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2879       <description>DSP_Lib Graphic Equalizer example</description>
2880       <board name="uVision Simulator" vendor="Keil"/>
2881       <project>
2882         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2883       </project>
2884       <attributes>
2885         <component Cclass="CMSIS" Cgroup="CORE"/>
2886         <component Cclass="CMSIS" Cgroup="DSP"/>
2887         <component Cclass="Device" Cgroup="Startup"/>
2888         <category>Getting Started</category>
2889       </attributes>
2890     </example>
2891
2892     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2893       <description>DSP_Lib Linear Interpolation example</description>
2894       <board name="uVision Simulator" vendor="Keil"/>
2895       <project>
2896         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2897       </project>
2898       <attributes>
2899         <component Cclass="CMSIS" Cgroup="CORE"/>
2900         <component Cclass="CMSIS" Cgroup="DSP"/>
2901         <component Cclass="Device" Cgroup="Startup"/>
2902         <category>Getting Started</category>
2903       </attributes>
2904     </example>
2905
2906     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2907       <description>DSP_Lib Matrix example</description>
2908       <board name="uVision Simulator" vendor="Keil"/>
2909       <project>
2910         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2911       </project>
2912       <attributes>
2913         <component Cclass="CMSIS" Cgroup="CORE"/>
2914         <component Cclass="CMSIS" Cgroup="DSP"/>
2915         <component Cclass="Device" Cgroup="Startup"/>
2916         <category>Getting Started</category>
2917       </attributes>
2918     </example>
2919
2920     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2921       <description>DSP_Lib Signal Convergence example</description>
2922       <board name="uVision Simulator" vendor="Keil"/>
2923       <project>
2924         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2925       </project>
2926       <attributes>
2927         <component Cclass="CMSIS" Cgroup="CORE"/>
2928         <component Cclass="CMSIS" Cgroup="DSP"/>
2929         <component Cclass="Device" Cgroup="Startup"/>
2930         <category>Getting Started</category>
2931       </attributes>
2932     </example>
2933
2934     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2935       <description>DSP_Lib Sinus/Cosinus example</description>
2936       <board name="uVision Simulator" vendor="Keil"/>
2937       <project>
2938         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2939       </project>
2940       <attributes>
2941         <component Cclass="CMSIS" Cgroup="CORE"/>
2942         <component Cclass="CMSIS" Cgroup="DSP"/>
2943         <component Cclass="Device" Cgroup="Startup"/>
2944         <category>Getting Started</category>
2945       </attributes>
2946     </example>
2947
2948     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2949       <description>DSP_Lib Variance example</description>
2950       <board name="uVision Simulator" vendor="Keil"/>
2951       <project>
2952         <environment name="uv" load="arm_variance_example.uvprojx"/>
2953       </project>
2954       <attributes>
2955         <component Cclass="CMSIS" Cgroup="CORE"/>
2956         <component Cclass="CMSIS" Cgroup="DSP"/>
2957         <component Cclass="Device" Cgroup="Startup"/>
2958         <category>Getting Started</category>
2959       </attributes>
2960     </example>
2961
2962     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2963       <description>CMSIS-RTOS2 Blinky example</description>
2964       <board name="uVision Simulator" vendor="Keil"/>
2965       <project>
2966         <environment name="uv" load="Blinky.uvprojx"/>
2967       </project>
2968       <attributes>
2969         <component Cclass="CMSIS" Cgroup="CORE"/>
2970         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2971         <component Cclass="Device" Cgroup="Startup"/>
2972         <category>Getting Started</category>
2973       </attributes>
2974     </example>
2975
2976     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2977       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2978       <board name="uVision Simulator" vendor="Keil"/>
2979       <project>
2980         <environment name="uv" load="Blinky.uvprojx"/>
2981       </project>
2982       <attributes>
2983         <component Cclass="CMSIS" Cgroup="CORE"/>
2984         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2985         <component Cclass="Device" Cgroup="Startup"/>
2986         <category>Getting Started</category>
2987       </attributes>
2988     </example>
2989
2990     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
2991       <description>CMSIS-RTOS2 Message Queue Example</description>
2992       <board name="uVision Simulator" vendor="Keil"/>
2993       <project>
2994         <environment name="uv" load="MsqQueue.uvprojx"/>
2995       </project>
2996       <attributes>
2997         <component Cclass="CMSIS" Cgroup="CORE"/>
2998         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2999         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3000         <component Cclass="Device" Cgroup="Startup"/>
3001         <category>Getting Started</category>
3002       </attributes>
3003     </example>
3004
3005     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3006       <description>CMSIS-RTOS2 Memory Pool Example</description>
3007       <board name="Fixed Virtual Platform" vendor="ARM"/>
3008       <project>
3009         <environment name="uv" load="MemPool.uvprojx"/>
3010       </project>
3011       <attributes>
3012         <component Cclass="CMSIS" Cgroup="CORE"/>
3013         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3014         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3015         <component Cclass="Device" Cgroup="Startup"/>
3016         <category>Getting Started</category>
3017       </attributes>
3018     </example>
3019
3020     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3021       <description>Bare-metal secure/non-secure example without RTOS</description>
3022       <board name="uVision Simulator" vendor="Keil"/>
3023       <project>
3024         <environment name="uv" load="NoRTOS.uvmpw"/>
3025       </project>
3026       <attributes>
3027         <component Cclass="CMSIS" Cgroup="CORE"/>
3028         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3029         <component Cclass="Device" Cgroup="Startup"/>
3030         <category>Getting Started</category>
3031       </attributes>
3032     </example>
3033
3034     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3035       <description>Secure/non-secure RTOS example with thread context management</description>
3036       <board name="uVision Simulator" vendor="Keil"/>
3037       <project>
3038         <environment name="uv" load="RTOS.uvmpw"/>
3039       </project>
3040       <attributes>
3041         <component Cclass="CMSIS" Cgroup="CORE"/>
3042         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3043         <component Cclass="Device" Cgroup="Startup"/>
3044         <category>Getting Started</category>
3045       </attributes>
3046     </example>
3047
3048     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3049       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3050       <board name="uVision Simulator" vendor="Keil"/>
3051       <project>
3052         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3053       </project>
3054       <attributes>
3055         <component Cclass="CMSIS" Cgroup="CORE"/>
3056         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3057         <component Cclass="Device" Cgroup="Startup"/>
3058         <category>Getting Started</category>
3059       </attributes>
3060     </example>
3061
3062   </examples>
3063
3064 </package>