begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.2.1-dev1">
  12       Active development...
  13       CMSIS-RTOS2:
  14         - OS Tick API 1.0.1
  15     </release>
  16     <release version="5.2.0" date="2017-11-16">
  17       CMSIS-Core(M): 5.1.0 (see revision history for details)
  18         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  19         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  20       CMSIS-Core(A): 1.1.0 (see revision history for details)
  21         - Added compiler_iccarm.h.
  22         - Added additional access functions for physical timer.
  23       CMSIS-DAP: 1.2.0 (see revision history for details)
  24       CMSIS-DSP: 1.5.2 (see revision history for details)
  25       CMSIS-Driver 2.6.0(see revision history for details):
  26         - CAN Driver API V1.2.0
  27         - NAND Driver API V2.3.0
  28       CMSIS-RTOS:
  29         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  30       CMSIS-RTOS2:
  31         - API 2.1.2 (see revision history for details)
  32         - RTX 5.2.3 (see revision history for details)
  33       Devices:
  34         - Added GCC startup and linker script for Cortex-A9.
  35         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  36         - Added IAR startup code for Cortex-A9
  37     </release>
  38     <release version="5.1.1" date="2017-09-19">
  39       CMSIS-RTOS2:
  40       - RTX 5.2.1 (see revision history for details)
  41     </release>
  42     <release version="5.1.0" date="2017-08-04">
  43       CMSIS-Core(M): 5.0.2 (see revision history for details)
  44       - Changed Version Control macros to be core agnostic.
  45       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  46       CMSIS-Core(A): 1.0.0 (see revision history for details)
  47       - Initial release
  48       - IRQ Controller API 1.0.0
  49       CMSIS-Driver: 2.05 (see revision history for details)
  50       - All typedefs related to status have been made volatile.
  51       CMSIS-RTOS2:
  52       - API 2.1.1 (see revision history for details)
  53       - RTX 5.2.0 (see revision history for details)
  54       - OS Tick API 1.0.0
  55       CMSIS-DSP: 1.5.2 (see revision history for details)
  56       - Fixed GNU Compiler specific diagnostics.
  57       CMSIS-PACK: 1.5.0 (see revision history for details)
  58       - added System Description File (*.SDF) Format
  59       CMSIS-Zone: 0.0.1 (Preview)
  60       - Initial specification draft
  61     </release>
  62     <release version="5.0.1" date="2017-02-03">
  63       Package Description:
  64       - added taxonomy for Cclass RTOS
  65       CMSIS-RTOS2:
  66       - API 2.1   (see revision history for details)
  67       - RTX 5.1.0 (see revision history for details)
  68       CMSIS-Core: 5.0.1 (see revision history for details)
  69       - Added __PACKED_STRUCT macro
  70       - Added uVisior support
  71       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  72       - Updated template for secure main function (main_s.c)
  73       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  74       CMSIS-DSP: 1.5.1 (see revision history for details)
  75       - added ARMv8M DSP libraries.
  76       CMSIS-PACK:1.4.9 (see revision history for details)
  77       - added Pack Index File specification and schema file
  78     </release>
  79     <release version="5.0.0" date="2016-11-11">
  80       Changed open source license to Apache 2.0
  81       CMSIS_Core:
  82        - Added support for Cortex-M23 and Cortex-M33.
  83        - Added ARMv8-M device configurations for mainline and baseline.
  84        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  85        - Added cmsis_compiler.h to unify compiler behaviour.
  86        - Updated function SCB_EnableICache (for Cortex-M7).
  87        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  88       CMSIS-RTOS:
  89         - bug fix in RTX 4.82 (see revision history for details)
  90       CMSIS-RTOS2:
  91         - new API including compatibility layer to CMSIS-RTOS
  92         - reference implementation based on RTX5
  93         - supports all Cortex-M variants including TrustZone for ARMv8-M
  94       CMSIS-SVD:
  95        - reworked SVD format documentation
  96        - removed SVD file database documentation as SVD files are distributed in packs
  97        - updated SVDConv for Win32 and Linux
  98       CMSIS-DSP:
  99        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 100        - Added DSP libraries build projects to CMSIS pack.
 101     </release>
 102     <release version="4.5.0" date="2015-10-28">
 103       - CMSIS-Core     4.30.0  (see revision history for details)
 104       - CMSIS-DAP      1.1.0   (unchanged)
 105       - CMSIS-Driver   2.04.0  (see revision history for details)
 106       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 107       - CMSIS-PACK     1.4.1   (see revision history for details)
 108       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 109       - CMSIS-SVD      1.3.1   (see revision history for details)
 110     </release>
 111     <release version="4.4.0" date="2015-09-11">
 112       - CMSIS-Core     4.20   (see revision history for details)
 113       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 114       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 115       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 116       - CMSIS-RTOS
 117         -- API         1.02   (unchanged)
 118         -- RTX         4.79   (see revision history for details)
 119       - CMSIS-SVD      1.3.0  (see revision history for details)
 120       - CMSIS-DAP      1.1.0  (extended with SWO support)
 121     </release>
 122     <release version="4.3.0" date="2015-03-20">
 123       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 124       - CMSIS-DSP      1.4.5  (see revision history for details)
 125       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 126       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 127       - CMSIS-RTOS
 128         -- API         1.02   (unchanged)
 129         -- RTX         4.78   (see revision history for details)
 130       - CMSIS-SVD      1.2    (unchanged)
 131     </release>
 132     <release version="4.2.0" date="2014-09-24">
 133       Adding Cortex-M7 support
 134       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 135       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 136       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 137       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 138       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 139     </release>
 140     <release version="4.1.1" date="2014-06-30">
 141       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 142     </release>
 143     <release version="4.1.0" date="2014-06-12">
 144       - CMSIS-Driver   2.02  (incompatible update)
 145       - CMSIS-Pack     1.3   (see revision history for details)
 146       - CMSIS-DSP      1.4.2 (unchanged)
 147       - CMSIS-Core     3.30  (unchanged)
 148       - CMSIS-RTOS RTX 4.74  (unchanged)
 149       - CMSIS-RTOS API 1.02  (unchanged)
 150       - CMSIS-SVD      1.10  (unchanged)
 151       PACK:
 152       - removed G++ specific files from PACK
 153       - added Component Startup variant "C Startup"
 154       - added Pack Checking Utility
 155       - updated conditions to reflect tool-chain dependency
 156       - added Taxonomy for Graphics
 157       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 158     </release>
 159     <release version="4.0.0">
 160       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 161       - CMSIS-Pack     1.1   Preliminary
 162       - CMSIS-DSP      1.4.2 (see revision history for details)
 163       - CMSIS-Core     3.30  (see revision history for details)
 164       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 165       - CMSIS-RTOS API 1.02  (unchanged)
 166       - CMSIS-SVD      1.10  (unchanged)
 167     </release>
 168     <release version="3.20.4">
 169       - CMSIS-RTOS 4.74 (see revision history for details)
 170       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 171     </release>
 172     <release version="3.20.3">
 173       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 174       - CMSIS-RTOS 4.73 (see revision history for details)
 175     </release>
 176     <release version="3.20.2">
 177       - CMSIS-Pack documentation has been added
 178       - CMSIS-Drivers header and documentation have been added to PACK
 179       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 180     </release>
 181     <release version="3.20.1">
 182       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 183       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 184     </release>
 185     <release version="3.20.0">
 186       The software portions that are deployed in the application program are now under a BSD license which allows usage
 187       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 188       The individual components have been update as listed below:
 189       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 190       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 191       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 192       - CMSIS-SVD is unchanged.
 193     </release>
 194   </releases>
 195
 196   <taxonomy>
 197     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 198     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 199     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 200     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 201     <description Cclass="File System">File Drive Support and File System</description>
 202     <description Cclass="Graphics">Graphical User Interface</description>
 203     <description Cclass="Network">Network Stack using Internet Protocols</description>
 204     <description Cclass="USB">Universal Serial Bus Stack</description>
 205     <description Cclass="Compiler">Compiler Software Extensions</description>
 206     <description Cclass="RTOS">Real-time Operating System</description>
 207   </taxonomy>
 208
 209   <devices>
 210     <!-- ******************************  Cortex-M0  ****************************** -->
 211     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 212       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 213       <description>
 214 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 215 - simple, easy-to-use programmers model
 216 - highly efficient ultra-low power operation
 217 - excellent code density
 218 - deterministic, high-performance interrupt handling
 219 - upward compatibility with the rest of the Cortex-M processor family.
 220       </description>
 221       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 222       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 223       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 224       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 225
 226       <device Dname="ARMCM0">
 227         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 228         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 229       </device>
 230     </family>
 231
 232     <!-- ******************************  Cortex-M0P  ****************************** -->
 233     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 234       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 235       <description>
 236 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 237 - simple, easy-to-use programmers model
 238 - highly efficient ultra-low power operation
 239 - excellent code density
 240 - deterministic, high-performance interrupt handling
 241 - upward compatibility with the rest of the Cortex-M processor family.
 242       </description>
 243       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 244       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 245       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 246       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 247
 248       <device Dname="ARMCM0P">
 249         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 250         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 251       </device>
 252
 253       <device Dname="ARMCM0P_MPU">
 254         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 255         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 256       </device>
 257     </family>
 258
 259     <!-- ******************************  Cortex-M3  ****************************** -->
 260     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 261       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 262       <description>
 263 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 264 - simple, easy-to-use programmers model
 265 - highly efficient ultra-low power operation
 266 - excellent code density
 267 - deterministic, high-performance interrupt handling
 268 - upward compatibility with the rest of the Cortex-M processor family.
 269       </description>
 270       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 271       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 272       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 273       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 274
 275       <device Dname="ARMCM3">
 276         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 277         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 278       </device>
 279     </family>
 280
 281     <!-- ******************************  Cortex-M4  ****************************** -->
 282     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 283       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 284       <description>
 285 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 286 - simple, easy-to-use programmers model
 287 - highly efficient ultra-low power operation
 288 - excellent code density
 289 - deterministic, high-performance interrupt handling
 290 - upward compatibility with the rest of the Cortex-M processor family.
 291       </description>
 292       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 293       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 294       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 295       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 296
 297       <device Dname="ARMCM4">
 298         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 299         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 300       </device>
 301
 302       <device Dname="ARMCM4_FP">
 303         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 304         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 305       </device>
 306     </family>
 307
 308     <!-- ******************************  Cortex-M7  ****************************** -->
 309     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 310       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 311       <description>
 312 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 313 - simple, easy-to-use programmers model
 314 - highly efficient ultra-low power operation
 315 - excellent code density
 316 - deterministic, high-performance interrupt handling
 317 - upward compatibility with the rest of the Cortex-M processor family.
 318       </description>
 319       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 320       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 321       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 322       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 323
 324       <device Dname="ARMCM7">
 325         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 326         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 327       </device>
 328
 329       <device Dname="ARMCM7_SP">
 330         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 331         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 332       </device>
 333
 334       <device Dname="ARMCM7_DP">
 335         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 336         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 337       </device>
 338     </family>
 339
 340     <!-- ******************************  Cortex-M23  ********************** -->
 341     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 342       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 343       <description>
 344 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 345 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 346 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 347       </description>
 348       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 349       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 350       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 351       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 352       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 353       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 354
 355       <device Dname="ARMCM23">
 356         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 357         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 358       </device>
 359
 360       <device Dname="ARMCM23_TZ">
 361         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 362         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 363       </device>
 364     </family>
 365
 366     <!-- ******************************  Cortex-M33  ****************************** -->
 367     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 368       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 369       <description>
 370 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 371 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 372       </description>
 373       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 374       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 375       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 376       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 377       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 378       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 379
 380       <device Dname="ARMCM33">
 381         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 382         <description>
 383           no DSP Instructions, no Floating Point Unit, no TrustZone
 384         </description>
 385         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 386       </device>
 387
 388       <device Dname="ARMCM33_TZ">
 389         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 390         <description>
 391           no DSP Instructions, no Floating Point Unit, TrustZone
 392         </description>
 393         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 394       </device>
 395
 396       <device Dname="ARMCM33_DSP_FP">
 397         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 398         <description>
 399           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 400         </description>
 401         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 402       </device>
 403
 404       <device Dname="ARMCM33_DSP_FP_TZ">
 405         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 406         <description>
 407           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 408         </description>
 409         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 410       </device>
 411     </family>
 412
 413     <!-- ******************************  ARMSC000  ****************************** -->
 414     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 415       <description>
 416 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 417 - simple, easy-to-use programmers model
 418 - highly efficient ultra-low power operation
 419 - excellent code density
 420 - deterministic, high-performance interrupt handling
 421       </description>
 422       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 423       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 424       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 425       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 426
 427       <device Dname="ARMSC000">
 428         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 429         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 430       </device>
 431     </family>
 432
 433     <!-- ******************************  ARMSC300  ****************************** -->
 434     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 435       <description>
 436 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 437 - simple, easy-to-use programmers model
 438 - highly efficient ultra-low power operation
 439 - excellent code density
 440 - deterministic, high-performance interrupt handling
 441       </description>
 442       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 443       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 444       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 445       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 446
 447       <device Dname="ARMSC300">
 448         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 449         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 450       </device>
 451     </family>
 452
 453     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 454     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 455       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 456       <description>
 457 ARMv8-M Baseline based device with TrustZone
 458       </description>
 459       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 460       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 461       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 462       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 463       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 464       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 465
 466       <device Dname="ARMv8MBL">
 467         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 468         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 469       </device>
 470     </family>
 471
 472     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 473     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 474       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 475       <description>
 476 ARMv8-M Mainline based device with TrustZone
 477       </description>
 478       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 479       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 480       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 481       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 482       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 483       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 484
 485       <device Dname="ARMv8MML">
 486         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 487         <description>
 488           no DSP Instructions, no Floating Point Unit, TrustZone
 489         </description>
 490         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 491       </device>
 492
 493       <device Dname="ARMv8MML_DSP">
 494         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 495         <description>
 496           DSP Instructions, no Floating Point Unit, TrustZone
 497         </description>
 498         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 499       </device>
 500
 501       <device Dname="ARMv8MML_SP">
 502         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 503         <description>
 504           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 505         </description>
 506         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 507       </device>
 508
 509       <device Dname="ARMv8MML_DSP_SP">
 510         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 511         <description>
 512           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 513         </description>
 514         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 515       </device>
 516
 517       <device Dname="ARMv8MML_DP">
 518         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 519         <description>
 520           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 521         </description>
 522         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 523       </device>
 524
 525       <device Dname="ARMv8MML_DSP_DP">
 526         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 527         <description>
 528           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 529         </description>
 530         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 531       </device>
 532     </family>
 533
 534     <!-- ******************************  Cortex-A5  ****************************** -->
 535     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 536       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 537       <description>
 538 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 539 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 540 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 541       </description>
 542
 543       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 544       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 545
 546       <device Dname="ARMCA5">
 547         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 548         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 549       </device>
 550     </family>
 551
 552     <!-- ******************************  Cortex-A7  ****************************** -->
 553     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 554       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 555       <description>
 556 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 557 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 558 an optional integrated GIC, and an optional L2 cache controller.
 559       </description>
 560
 561       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 562       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 563
 564       <device Dname="ARMCA7">
 565         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 566         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 567       </device>
 568     </family>
 569
 570     <!-- ******************************  Cortex-A9  ****************************** -->
 571     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 572       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 573       <description>
 574 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 575 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 576 and 8-bit Java bytecodes in Jazelle state.
 577       </description>
 578
 579       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 580       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 581
 582       <device Dname="ARMCA9">
 583         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 584         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 585       </device>
 586     </family>
 587   </devices>
 588
 589
 590   <apis>
 591     <!-- CMSIS Device API -->
 592     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 593       <description>Device interrupt controller interface</description>
 594       <files>
 595         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 596       </files>
 597     </api>
 598     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 599       <description>RTOS Kernel system tick timer interface</description>
 600       <files>
 601         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 602       </files>
 603     </api>
 604     <!-- CMSIS-RTOS API -->
 605     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 606       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 607       <files>
 608         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 609       </files>
 610     </api>
 611     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.2" exclusive="1">
 612       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 613       <files>
 614         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 615         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 616       </files>
 617     </api>
 618     <!-- CMSIS Driver API -->
 619     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 620       <description>USART Driver API for Cortex-M</description>
 621       <files>
 622         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 623         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 624       </files>
 625     </api>
 626     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 627       <description>SPI Driver API for Cortex-M</description>
 628       <files>
 629         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 630         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 631       </files>
 632     </api>
 633     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 634       <description>SAI Driver API for Cortex-M</description>
 635       <files>
 636         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 637         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 638       </files>
 639     </api>
 640     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 641       <description>I2C Driver API for Cortex-M</description>
 642       <files>
 643         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 644         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 645       </files>
 646     </api>
 647     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 648       <description>CAN Driver API for Cortex-M</description>
 649       <files>
 650         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 651         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 652       </files>
 653     </api>
 654     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 655       <description>Flash Driver API for Cortex-M</description>
 656       <files>
 657         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 658         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 659       </files>
 660     </api>
 661     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 662       <description>MCI Driver API for Cortex-M</description>
 663       <files>
 664         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 665         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 666       </files>
 667     </api>
 668     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 669       <description>NAND Flash Driver API for Cortex-M</description>
 670       <files>
 671         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 672         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 673       </files>
 674     </api>
 675     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 676       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 677       <files>
 678         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 679         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 680         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 681       </files>
 682     </api>
 683     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 684       <description>Ethernet MAC Driver API for Cortex-M</description>
 685       <files>
 686         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 687         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 688       </files>
 689     </api>
 690     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 691       <description>Ethernet PHY Driver API for Cortex-M</description>
 692       <files>
 693         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 694         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 695       </files>
 696     </api>
 697     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 698       <description>USB Device Driver API for Cortex-M</description>
 699       <files>
 700         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 701         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 702       </files>
 703     </api>
 704     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 705       <description>USB Host Driver API for Cortex-M</description>
 706       <files>
 707         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 708         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 709       </files>
 710     </api>
 711   </apis>
 712
 713   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 714   <conditions>
 715     <!-- compiler -->
 716     <condition id="ARMCC6">
 717       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 718       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 719     </condition>
 720     <condition id="ARMCC5">
 721       <require Tcompiler="ARMCC" Toptions="AC5"/>
 722     </condition>
 723     <condition id="ARMCC">
 724       <require Tcompiler="ARMCC"/>
 725     </condition>
 726     <condition id="GCC">
 727       <require Tcompiler="GCC"/>
 728     </condition>
 729     <condition id="IAR">
 730       <require Tcompiler="IAR"/>
 731     </condition>
 732     <condition id="ARMCC GCC">
 733       <accept Tcompiler="ARMCC"/>
 734       <accept Tcompiler="GCC"/>
 735     </condition>
 736     <condition id="ARMCC GCC IAR">
 737       <accept Tcompiler="ARMCC"/>
 738       <accept Tcompiler="GCC"/>
 739       <accept Tcompiler="IAR"/>
 740     </condition>
 741
 742     <!-- ARM architecture -->
 743     <condition id="ARMv6-M Device">
 744       <description>ARMv6-M architecture based device</description>
 745       <accept Dcore="Cortex-M0"/>
 746       <accept Dcore="Cortex-M0+"/>
 747       <accept Dcore="SC000"/>
 748     </condition>
 749     <condition id="ARMv7-M Device">
 750       <description>ARMv7-M architecture based device</description>
 751       <accept Dcore="Cortex-M3"/>
 752       <accept Dcore="Cortex-M4"/>
 753       <accept Dcore="Cortex-M7"/>
 754       <accept Dcore="SC300"/>
 755     </condition>
 756     <condition id="ARMv8-M Device">
 757       <description>ARMv8-M architecture based device</description>
 758       <accept Dcore="ARMV8MBL"/>
 759       <accept Dcore="ARMV8MML"/>
 760       <accept Dcore="Cortex-M23"/>
 761       <accept Dcore="Cortex-M33"/>
 762     </condition>
 763     <condition id="ARMv8-M TZ Device">
 764       <description>ARMv8-M architecture based device with TrustZone</description>
 765       <require condition="ARMv8-M Device"/>
 766       <require Dtz="TZ"/>
 767     </condition>
 768     <condition id="ARMv6_7-M Device">
 769       <description>ARMv6_7-M architecture based device</description>
 770       <accept condition="ARMv6-M Device"/>
 771       <accept condition="ARMv7-M Device"/>
 772     </condition>
 773     <condition id="ARMv6_7_8-M Device">
 774       <description>ARMv6_7_8-M architecture based device</description>
 775       <accept condition="ARMv6-M Device"/>
 776       <accept condition="ARMv7-M Device"/>
 777       <accept condition="ARMv8-M Device"/>
 778     </condition>
 779     <condition id="ARMv7-A Device">
 780       <description>ARMv7-A architecture based device</description>
 781       <accept Dcore="Cortex-A5"/>
 782       <accept Dcore="Cortex-A7"/>
 783       <accept Dcore="Cortex-A9"/>
 784     </condition>
 785
 786     <!-- ARM core -->
 787     <condition id="CM0">
 788       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 789       <accept Dcore="Cortex-M0"/>
 790       <accept Dcore="Cortex-M0+"/>
 791       <accept Dcore="SC000"/>
 792     </condition>
 793     <condition id="CM3">
 794       <description>Cortex-M3 or SC300 processor based device</description>
 795       <accept Dcore="Cortex-M3"/>
 796       <accept Dcore="SC300"/>
 797     </condition>
 798     <condition id="CM4">
 799       <description>Cortex-M4 processor based device</description>
 800       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 801     </condition>
 802     <condition id="CM4_FP">
 803       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 804       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 805       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 806       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 807     </condition>
 808     <condition id="CM7">
 809       <description>Cortex-M7 processor based device</description>
 810       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 811     </condition>
 812     <condition id="CM7_FP">
 813       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 814       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 815       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 816     </condition>
 817     <condition id="CM7_SP">
 818       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 819       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 820     </condition>
 821     <condition id="CM7_DP">
 822       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 823       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 824     </condition>
 825     <condition id="CM23">
 826       <description>Cortex-M23 processor based device</description>
 827       <require Dcore="Cortex-M23"/>
 828     </condition>
 829     <condition id="CM33">
 830       <description>Cortex-M33 processor based device</description>
 831       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 832     </condition>
 833     <condition id="CM33_FP">
 834       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 835       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 836     </condition>
 837     <condition id="ARMv8MBL">
 838       <description>ARMv8-M Baseline processor based device</description>
 839       <require Dcore="ARMV8MBL"/>
 840     </condition>
 841     <condition id="ARMv8MML">
 842       <description>ARMv8-M Mainline processor based device</description>
 843       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 844     </condition>
 845     <condition id="ARMv8MML_FP">
 846       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 847       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 848       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 849     </condition>
 850
 851     <condition id="CM33_NODSP_NOFPU">
 852       <description>CM33, no DSP, no FPU</description>
 853       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 854     </condition>
 855     <condition id="CM33_DSP_NOFPU">
 856       <description>CM33, DSP, no FPU</description>
 857       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 858     </condition>
 859     <condition id="CM33_NODSP_SP">
 860       <description>CM33, no DSP, SP FPU</description>
 861       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 862     </condition>
 863     <condition id="CM33_DSP_SP">
 864       <description>CM33, DSP, SP FPU</description>
 865       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 866     </condition>
 867
 868     <condition id="ARMv8MML_NODSP_NOFPU">
 869       <description>ARMv8MML, no DSP, no FPU</description>
 870       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 871     </condition>
 872     <condition id="ARMv8MML_DSP_NOFPU">
 873       <description>ARMv8MML, DSP, no FPU</description>
 874       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 875     </condition>
 876     <condition id="ARMv8MML_NODSP_SP">
 877       <description>ARMv8MML, no DSP, SP FPU</description>
 878       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 879     </condition>
 880     <condition id="ARMv8MML_DSP_SP">
 881       <description>ARMv8MML, DSP, SP FPU</description>
 882       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 883     </condition>
 884
 885     <condition id="CA5_CA9">
 886       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 887       <accept Dcore="Cortex-A5"/>
 888       <accept Dcore="Cortex-A9"/>
 889     </condition>
 890
 891     <condition id="CA7">
 892       <description>Cortex-A7 processor based device</description>
 893       <accept Dcore="Cortex-A7"/>
 894     </condition>
 895
 896     <!-- ARMCC compiler -->
 897     <condition id="CA_ARMCC5">
 898       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 899       <require condition="ARMv7-A Device"/>
 900       <require condition="ARMCC5"/>
 901     </condition>
 902     <condition id="CA_ARMCC6">
 903       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 904       <require condition="ARMv7-A Device"/>
 905       <require condition="ARMCC6"/>
 906     </condition>
 907
 908     <condition id="CM0_ARMCC">
 909       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 910       <require condition="CM0"/>
 911       <require Tcompiler="ARMCC"/>
 912     </condition>
 913     <condition id="CM0_LE_ARMCC">
 914       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 915       <require condition="CM0_ARMCC"/>
 916       <require Dendian="Little-endian"/>
 917     </condition>
 918     <condition id="CM0_BE_ARMCC">
 919       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 920       <require condition="CM0_ARMCC"/>
 921       <require Dendian="Big-endian"/>
 922     </condition>
 923
 924     <condition id="CM3_ARMCC">
 925       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 926       <require condition="CM3"/>
 927       <require Tcompiler="ARMCC"/>
 928     </condition>
 929     <condition id="CM3_LE_ARMCC">
 930       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 931       <require condition="CM3_ARMCC"/>
 932       <require Dendian="Little-endian"/>
 933     </condition>
 934     <condition id="CM3_BE_ARMCC">
 935       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 936       <require condition="CM3_ARMCC"/>
 937       <require Dendian="Big-endian"/>
 938     </condition>
 939
 940     <condition id="CM4_ARMCC">
 941       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 942       <require condition="CM4"/>
 943       <require Tcompiler="ARMCC"/>
 944     </condition>
 945     <condition id="CM4_LE_ARMCC">
 946       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 947       <require condition="CM4_ARMCC"/>
 948       <require Dendian="Little-endian"/>
 949     </condition>
 950     <condition id="CM4_BE_ARMCC">
 951       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 952       <require condition="CM4_ARMCC"/>
 953       <require Dendian="Big-endian"/>
 954     </condition>
 955
 956     <condition id="CM4_FP_ARMCC">
 957       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 958       <require condition="CM4_FP"/>
 959       <require Tcompiler="ARMCC"/>
 960     </condition>
 961     <condition id="CM4_FP_LE_ARMCC">
 962       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 963       <require condition="CM4_FP_ARMCC"/>
 964       <require Dendian="Little-endian"/>
 965     </condition>
 966     <condition id="CM4_FP_BE_ARMCC">
 967       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 968       <require condition="CM4_FP_ARMCC"/>
 969       <require Dendian="Big-endian"/>
 970     </condition>
 971
 972     <condition id="CM7_ARMCC">
 973       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 974       <require condition="CM7"/>
 975       <require Tcompiler="ARMCC"/>
 976     </condition>
 977     <condition id="CM7_LE_ARMCC">
 978       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 979       <require condition="CM7_ARMCC"/>
 980       <require Dendian="Little-endian"/>
 981     </condition>
 982     <condition id="CM7_BE_ARMCC">
 983       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 984       <require condition="CM7_ARMCC"/>
 985       <require Dendian="Big-endian"/>
 986     </condition>
 987
 988     <condition id="CM7_FP_ARMCC">
 989       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 990       <require condition="CM7_FP"/>
 991       <require Tcompiler="ARMCC"/>
 992     </condition>
 993     <condition id="CM7_FP_LE_ARMCC">
 994       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 995       <require condition="CM7_FP_ARMCC"/>
 996       <require Dendian="Little-endian"/>
 997     </condition>
 998     <condition id="CM7_FP_BE_ARMCC">
 999       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1000       <require condition="CM7_FP_ARMCC"/>
1001       <require Dendian="Big-endian"/>
1002     </condition>
1003
1004     <condition id="CM7_SP_ARMCC">
1005       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1006       <require condition="CM7_SP"/>
1007       <require Tcompiler="ARMCC"/>
1008     </condition>
1009     <condition id="CM7_SP_LE_ARMCC">
1010       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1011       <require condition="CM7_SP_ARMCC"/>
1012       <require Dendian="Little-endian"/>
1013     </condition>
1014     <condition id="CM7_SP_BE_ARMCC">
1015       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1016       <require condition="CM7_SP_ARMCC"/>
1017       <require Dendian="Big-endian"/>
1018     </condition>
1019
1020     <condition id="CM7_DP_ARMCC">
1021       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1022       <require condition="CM7_DP"/>
1023       <require Tcompiler="ARMCC"/>
1024     </condition>
1025     <condition id="CM7_DP_LE_ARMCC">
1026       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1027       <require condition="CM7_DP_ARMCC"/>
1028       <require Dendian="Little-endian"/>
1029     </condition>
1030     <condition id="CM7_DP_BE_ARMCC">
1031       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1032       <require condition="CM7_DP_ARMCC"/>
1033       <require Dendian="Big-endian"/>
1034     </condition>
1035
1036     <condition id="CM23_ARMCC">
1037       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1038       <require condition="CM23"/>
1039       <require Tcompiler="ARMCC"/>
1040     </condition>
1041     <condition id="CM23_LE_ARMCC">
1042       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1043       <require condition="CM23_ARMCC"/>
1044       <require Dendian="Little-endian"/>
1045     </condition>
1046     <condition id="CM23_BE_ARMCC">
1047       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1048       <require condition="CM23_ARMCC"/>
1049       <require Dendian="Big-endian"/>
1050     </condition>
1051
1052     <condition id="CM33_ARMCC">
1053       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1054       <require condition="CM33"/>
1055       <require Tcompiler="ARMCC"/>
1056     </condition>
1057     <condition id="CM33_LE_ARMCC">
1058       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1059       <require condition="CM33_ARMCC"/>
1060       <require Dendian="Little-endian"/>
1061     </condition>
1062     <condition id="CM33_BE_ARMCC">
1063       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1064       <require condition="CM33_ARMCC"/>
1065       <require Dendian="Big-endian"/>
1066     </condition>
1067
1068     <condition id="CM33_FP_ARMCC">
1069       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1070       <require condition="CM33_FP"/>
1071       <require Tcompiler="ARMCC"/>
1072     </condition>
1073     <condition id="CM33_FP_LE_ARMCC">
1074       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1075       <require condition="CM33_FP_ARMCC"/>
1076       <require Dendian="Little-endian"/>
1077     </condition>
1078     <condition id="CM33_FP_BE_ARMCC">
1079       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1080       <require condition="CM33_FP_ARMCC"/>
1081       <require Dendian="Big-endian"/>
1082     </condition>
1083
1084     <condition id="CM33_NODSP_NOFPU_ARMCC">
1085       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1086       <require condition="CM33_NODSP_NOFPU"/>
1087       <require Tcompiler="ARMCC"/>
1088     </condition>
1089     <condition id="CM33_DSP_NOFPU_ARMCC">
1090       <description>CM33, DSP, no FPU, ARM Compiler</description>
1091       <require condition="CM33_DSP_NOFPU"/>
1092       <require Tcompiler="ARMCC"/>
1093     </condition>
1094     <condition id="CM33_NODSP_SP_ARMCC">
1095       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1096       <require condition="CM33_NODSP_SP"/>
1097       <require Tcompiler="ARMCC"/>
1098     </condition>
1099     <condition id="CM33_DSP_SP_ARMCC">
1100       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1101       <require condition="CM33_DSP_SP"/>
1102       <require Tcompiler="ARMCC"/>
1103     </condition>
1104     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1105       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1106       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1107       <require Dendian="Little-endian"/>
1108     </condition>
1109     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1110       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1111       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1112       <require Dendian="Little-endian"/>
1113     </condition>
1114     <condition id="CM33_NODSP_SP_LE_ARMCC">
1115       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1116       <require condition="CM33_NODSP_SP_ARMCC"/>
1117       <require Dendian="Little-endian"/>
1118     </condition>
1119     <condition id="CM33_DSP_SP_LE_ARMCC">
1120       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1121       <require condition="CM33_DSP_SP_ARMCC"/>
1122       <require Dendian="Little-endian"/>
1123     </condition>
1124
1125     <condition id="ARMv8MBL_ARMCC">
1126       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1127       <require condition="ARMv8MBL"/>
1128       <require Tcompiler="ARMCC"/>
1129     </condition>
1130     <condition id="ARMv8MBL_LE_ARMCC">
1131       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1132       <require condition="ARMv8MBL_ARMCC"/>
1133       <require Dendian="Little-endian"/>
1134     </condition>
1135     <condition id="ARMv8MBL_BE_ARMCC">
1136       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1137       <require condition="ARMv8MBL_ARMCC"/>
1138       <require Dendian="Big-endian"/>
1139     </condition>
1140
1141     <condition id="ARMv8MML_ARMCC">
1142       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1143       <require condition="ARMv8MML"/>
1144       <require Tcompiler="ARMCC"/>
1145     </condition>
1146     <condition id="ARMv8MML_LE_ARMCC">
1147       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1148       <require condition="ARMv8MML_ARMCC"/>
1149       <require Dendian="Little-endian"/>
1150     </condition>
1151     <condition id="ARMv8MML_BE_ARMCC">
1152       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1153       <require condition="ARMv8MML_ARMCC"/>
1154       <require Dendian="Big-endian"/>
1155     </condition>
1156
1157     <condition id="ARMv8MML_FP_ARMCC">
1158       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1159       <require condition="ARMv8MML_FP"/>
1160       <require Tcompiler="ARMCC"/>
1161     </condition>
1162     <condition id="ARMv8MML_FP_LE_ARMCC">
1163       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1164       <require condition="ARMv8MML_FP_ARMCC"/>
1165       <require Dendian="Little-endian"/>
1166     </condition>
1167     <condition id="ARMv8MML_FP_BE_ARMCC">
1168       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1169       <require condition="ARMv8MML_FP_ARMCC"/>
1170       <require Dendian="Big-endian"/>
1171     </condition>
1172
1173     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1174       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1175       <require condition="ARMv8MML_NODSP_NOFPU"/>
1176       <require Tcompiler="ARMCC"/>
1177     </condition>
1178     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1179       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1180       <require condition="ARMv8MML_DSP_NOFPU"/>
1181       <require Tcompiler="ARMCC"/>
1182     </condition>
1183     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1184       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1185       <require condition="ARMv8MML_NODSP_SP"/>
1186       <require Tcompiler="ARMCC"/>
1187     </condition>
1188     <condition id="ARMv8MML_DSP_SP_ARMCC">
1189       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1190       <require condition="ARMv8MML_DSP_SP"/>
1191       <require Tcompiler="ARMCC"/>
1192     </condition>
1193     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1194       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1195       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1196       <require Dendian="Little-endian"/>
1197     </condition>
1198     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1199       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1200       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1201       <require Dendian="Little-endian"/>
1202     </condition>
1203     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1204       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1205       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1206       <require Dendian="Little-endian"/>
1207     </condition>
1208     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1209       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1210       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1211       <require Dendian="Little-endian"/>
1212     </condition>
1213
1214     <!-- GCC compiler -->
1215     <condition id="CA_GCC">
1216       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1217       <require condition="ARMv7-A Device"/>
1218       <require Tcompiler="GCC"/>
1219     </condition>
1220
1221     <condition id="CM0_GCC">
1222       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1223       <require condition="CM0"/>
1224       <require Tcompiler="GCC"/>
1225     </condition>
1226     <condition id="CM0_LE_GCC">
1227       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1228       <require condition="CM0_GCC"/>
1229       <require Dendian="Little-endian"/>
1230     </condition>
1231     <condition id="CM0_BE_GCC">
1232       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1233       <require condition="CM0_GCC"/>
1234       <require Dendian="Big-endian"/>
1235     </condition>
1236
1237     <condition id="CM3_GCC">
1238       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1239       <require condition="CM3"/>
1240       <require Tcompiler="GCC"/>
1241     </condition>
1242     <condition id="CM3_LE_GCC">
1243       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1244       <require condition="CM3_GCC"/>
1245       <require Dendian="Little-endian"/>
1246     </condition>
1247     <condition id="CM3_BE_GCC">
1248       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1249       <require condition="CM3_GCC"/>
1250       <require Dendian="Big-endian"/>
1251     </condition>
1252
1253     <condition id="CM4_GCC">
1254       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1255       <require condition="CM4"/>
1256       <require Tcompiler="GCC"/>
1257     </condition>
1258     <condition id="CM4_LE_GCC">
1259       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1260       <require condition="CM4_GCC"/>
1261       <require Dendian="Little-endian"/>
1262     </condition>
1263     <condition id="CM4_BE_GCC">
1264       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1265       <require condition="CM4_GCC"/>
1266       <require Dendian="Big-endian"/>
1267     </condition>
1268
1269     <condition id="CM4_FP_GCC">
1270       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1271       <require condition="CM4_FP"/>
1272       <require Tcompiler="GCC"/>
1273     </condition>
1274     <condition id="CM4_FP_LE_GCC">
1275       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1276       <require condition="CM4_FP_GCC"/>
1277       <require Dendian="Little-endian"/>
1278     </condition>
1279     <condition id="CM4_FP_BE_GCC">
1280       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1281       <require condition="CM4_FP_GCC"/>
1282       <require Dendian="Big-endian"/>
1283     </condition>
1284
1285     <condition id="CM7_GCC">
1286       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1287       <require condition="CM7"/>
1288       <require Tcompiler="GCC"/>
1289     </condition>
1290     <condition id="CM7_LE_GCC">
1291       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1292       <require condition="CM7_GCC"/>
1293       <require Dendian="Little-endian"/>
1294     </condition>
1295     <condition id="CM7_BE_GCC">
1296       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1297       <require condition="CM7_GCC"/>
1298       <require Dendian="Big-endian"/>
1299     </condition>
1300
1301     <condition id="CM7_FP_GCC">
1302       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1303       <require condition="CM7_FP"/>
1304       <require Tcompiler="GCC"/>
1305     </condition>
1306     <condition id="CM7_FP_LE_GCC">
1307       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1308       <require condition="CM7_FP_GCC"/>
1309       <require Dendian="Little-endian"/>
1310     </condition>
1311     <condition id="CM7_FP_BE_GCC">
1312       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1313       <require condition="CM7_FP_GCC"/>
1314       <require Dendian="Big-endian"/>
1315     </condition>
1316
1317     <condition id="CM7_SP_GCC">
1318       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1319       <require condition="CM7_SP"/>
1320       <require Tcompiler="GCC"/>
1321     </condition>
1322     <condition id="CM7_SP_LE_GCC">
1323       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1324       <require condition="CM7_SP_GCC"/>
1325       <require Dendian="Little-endian"/>
1326     </condition>
1327     <condition id="CM7_SP_BE_GCC">
1328       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1329       <require condition="CM7_SP_GCC"/>
1330       <require Dendian="Big-endian"/>
1331     </condition>
1332
1333     <condition id="CM7_DP_GCC">
1334       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1335       <require condition="CM7_DP"/>
1336       <require Tcompiler="GCC"/>
1337     </condition>
1338     <condition id="CM7_DP_LE_GCC">
1339       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1340       <require condition="CM7_DP_GCC"/>
1341       <require Dendian="Little-endian"/>
1342     </condition>
1343     <condition id="CM7_DP_BE_GCC">
1344       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1345       <require condition="CM7_DP_GCC"/>
1346       <require Dendian="Big-endian"/>
1347     </condition>
1348
1349     <condition id="CM23_GCC">
1350       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1351       <require condition="CM23"/>
1352       <require Tcompiler="GCC"/>
1353     </condition>
1354     <condition id="CM23_LE_GCC">
1355       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1356       <require condition="CM23_GCC"/>
1357       <require Dendian="Little-endian"/>
1358     </condition>
1359     <condition id="CM23_BE_GCC">
1360       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1361       <require condition="CM23_GCC"/>
1362       <require Dendian="Big-endian"/>
1363     </condition>
1364
1365     <condition id="CM33_GCC">
1366       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1367       <require condition="CM33"/>
1368       <require Tcompiler="GCC"/>
1369     </condition>
1370     <condition id="CM33_LE_GCC">
1371       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1372       <require condition="CM33_GCC"/>
1373       <require Dendian="Little-endian"/>
1374     </condition>
1375     <condition id="CM33_BE_GCC">
1376       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1377       <require condition="CM33_GCC"/>
1378       <require Dendian="Big-endian"/>
1379     </condition>
1380
1381     <condition id="CM33_FP_GCC">
1382       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1383       <require condition="CM33_FP"/>
1384       <require Tcompiler="GCC"/>
1385     </condition>
1386     <condition id="CM33_FP_LE_GCC">
1387       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1388       <require condition="CM33_FP_GCC"/>
1389       <require Dendian="Little-endian"/>
1390     </condition>
1391     <condition id="CM33_FP_BE_GCC">
1392       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1393       <require condition="CM33_FP_GCC"/>
1394       <require Dendian="Big-endian"/>
1395     </condition>
1396
1397     <condition id="CM33_NODSP_NOFPU_GCC">
1398       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1399       <require condition="CM33_NODSP_NOFPU"/>
1400       <require Tcompiler="GCC"/>
1401     </condition>
1402     <condition id="CM33_DSP_NOFPU_GCC">
1403       <description>CM33, DSP, no FPU, GCC Compiler</description>
1404       <require condition="CM33_DSP_NOFPU"/>
1405       <require Tcompiler="GCC"/>
1406     </condition>
1407     <condition id="CM33_NODSP_SP_GCC">
1408       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1409       <require condition="CM33_NODSP_SP"/>
1410       <require Tcompiler="GCC"/>
1411     </condition>
1412     <condition id="CM33_DSP_SP_GCC">
1413       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1414       <require condition="CM33_DSP_SP"/>
1415       <require Tcompiler="GCC"/>
1416     </condition>
1417     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1418       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1419       <require condition="CM33_NODSP_NOFPU_GCC"/>
1420       <require Dendian="Little-endian"/>
1421     </condition>
1422     <condition id="CM33_DSP_NOFPU_LE_GCC">
1423       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1424       <require condition="CM33_DSP_NOFPU_GCC"/>
1425       <require Dendian="Little-endian"/>
1426     </condition>
1427     <condition id="CM33_NODSP_SP_LE_GCC">
1428       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1429       <require condition="CM33_NODSP_SP_GCC"/>
1430       <require Dendian="Little-endian"/>
1431     </condition>
1432     <condition id="CM33_DSP_SP_LE_GCC">
1433       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1434       <require condition="CM33_DSP_SP_GCC"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437
1438     <condition id="ARMv8MBL_GCC">
1439       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1440       <require condition="ARMv8MBL"/>
1441       <require Tcompiler="GCC"/>
1442     </condition>
1443     <condition id="ARMv8MBL_LE_GCC">
1444       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1445       <require condition="ARMv8MBL_GCC"/>
1446       <require Dendian="Little-endian"/>
1447     </condition>
1448     <condition id="ARMv8MBL_BE_GCC">
1449       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1450       <require condition="ARMv8MBL_GCC"/>
1451       <require Dendian="Big-endian"/>
1452     </condition>
1453
1454     <condition id="ARMv8MML_GCC">
1455       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1456       <require condition="ARMv8MML"/>
1457       <require Tcompiler="GCC"/>
1458     </condition>
1459     <condition id="ARMv8MML_LE_GCC">
1460       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1461       <require condition="ARMv8MML_GCC"/>
1462       <require Dendian="Little-endian"/>
1463     </condition>
1464     <condition id="ARMv8MML_BE_GCC">
1465       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1466       <require condition="ARMv8MML_GCC"/>
1467       <require Dendian="Big-endian"/>
1468     </condition>
1469
1470     <condition id="ARMv8MML_FP_GCC">
1471       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1472       <require condition="ARMv8MML_FP"/>
1473       <require Tcompiler="GCC"/>
1474     </condition>
1475     <condition id="ARMv8MML_FP_LE_GCC">
1476       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1477       <require condition="ARMv8MML_FP_GCC"/>
1478       <require Dendian="Little-endian"/>
1479     </condition>
1480     <condition id="ARMv8MML_FP_BE_GCC">
1481       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1482       <require condition="ARMv8MML_FP_GCC"/>
1483       <require Dendian="Big-endian"/>
1484     </condition>
1485
1486     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1487       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1488       <require condition="ARMv8MML_NODSP_NOFPU"/>
1489       <require Tcompiler="GCC"/>
1490     </condition>
1491     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1492       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1493       <require condition="ARMv8MML_DSP_NOFPU"/>
1494       <require Tcompiler="GCC"/>
1495     </condition>
1496     <condition id="ARMv8MML_NODSP_SP_GCC">
1497       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1498       <require condition="ARMv8MML_NODSP_SP"/>
1499       <require Tcompiler="GCC"/>
1500     </condition>
1501     <condition id="ARMv8MML_DSP_SP_GCC">
1502       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1503       <require condition="ARMv8MML_DSP_SP"/>
1504       <require Tcompiler="GCC"/>
1505     </condition>
1506     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1507       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1508       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1509       <require Dendian="Little-endian"/>
1510     </condition>
1511     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1512       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1513       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1514       <require Dendian="Little-endian"/>
1515     </condition>
1516     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1517       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1518       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1519       <require Dendian="Little-endian"/>
1520     </condition>
1521     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1522       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1523       <require condition="ARMv8MML_DSP_SP_GCC"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526
1527     <!-- IAR compiler -->
1528     <condition id="CA_IAR">
1529       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1530       <require condition="ARMv7-A Device"/>
1531       <require Tcompiler="IAR"/>
1532     </condition>
1533
1534     <condition id="CM0_IAR">
1535       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1536       <require condition="CM0"/>
1537       <require Tcompiler="IAR"/>
1538     </condition>
1539     <condition id="CM0_LE_IAR">
1540       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1541       <require condition="CM0_IAR"/>
1542       <require Dendian="Little-endian"/>
1543     </condition>
1544     <condition id="CM0_BE_IAR">
1545       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1546       <require condition="CM0_IAR"/>
1547       <require Dendian="Big-endian"/>
1548     </condition>
1549
1550     <condition id="CM3_IAR">
1551       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1552       <require condition="CM3"/>
1553       <require Tcompiler="IAR"/>
1554     </condition>
1555     <condition id="CM3_LE_IAR">
1556       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1557       <require condition="CM3_IAR"/>
1558       <require Dendian="Little-endian"/>
1559     </condition>
1560     <condition id="CM3_BE_IAR">
1561       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1562       <require condition="CM3_IAR"/>
1563       <require Dendian="Big-endian"/>
1564     </condition>
1565
1566     <condition id="CM4_IAR">
1567       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1568       <require condition="CM4"/>
1569       <require Tcompiler="IAR"/>
1570     </condition>
1571     <condition id="CM4_LE_IAR">
1572       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1573       <require condition="CM4_IAR"/>
1574       <require Dendian="Little-endian"/>
1575     </condition>
1576     <condition id="CM4_BE_IAR">
1577       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1578       <require condition="CM4_IAR"/>
1579       <require Dendian="Big-endian"/>
1580     </condition>
1581
1582     <condition id="CM4_FP_IAR">
1583       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1584       <require condition="CM4_FP"/>
1585       <require Tcompiler="IAR"/>
1586     </condition>
1587     <condition id="CM4_FP_LE_IAR">
1588       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1589       <require condition="CM4_FP_IAR"/>
1590       <require Dendian="Little-endian"/>
1591     </condition>
1592     <condition id="CM4_FP_BE_IAR">
1593       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1594       <require condition="CM4_FP_IAR"/>
1595       <require Dendian="Big-endian"/>
1596     </condition>
1597
1598     <condition id="CM7_IAR">
1599       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1600       <require condition="CM7"/>
1601       <require Tcompiler="IAR"/>
1602     </condition>
1603     <condition id="CM7_LE_IAR">
1604       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1605       <require condition="CM7_IAR"/>
1606       <require Dendian="Little-endian"/>
1607     </condition>
1608     <condition id="CM7_BE_IAR">
1609       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1610       <require condition="CM7_IAR"/>
1611       <require Dendian="Big-endian"/>
1612     </condition>
1613
1614     <condition id="CM7_FP_IAR">
1615       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1616       <require condition="CM7_FP"/>
1617       <require Tcompiler="IAR"/>
1618     </condition>
1619     <condition id="CM7_FP_LE_IAR">
1620       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1621       <require condition="CM7_FP_IAR"/>
1622       <require Dendian="Little-endian"/>
1623     </condition>
1624     <condition id="CM7_FP_BE_IAR">
1625       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1626       <require condition="CM7_FP_IAR"/>
1627       <require Dendian="Big-endian"/>
1628     </condition>
1629
1630     <condition id="CM7_SP_IAR">
1631       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1632       <require condition="CM7_SP"/>
1633       <require Tcompiler="IAR"/>
1634     </condition>
1635     <condition id="CM7_SP_LE_IAR">
1636       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1637       <require condition="CM7_SP_IAR"/>
1638       <require Dendian="Little-endian"/>
1639     </condition>
1640     <condition id="CM7_SP_BE_IAR">
1641       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1642       <require condition="CM7_SP_IAR"/>
1643       <require Dendian="Big-endian"/>
1644     </condition>
1645
1646     <condition id="CM7_DP_IAR">
1647       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1648       <require condition="CM7_DP"/>
1649       <require Tcompiler="IAR"/>
1650     </condition>
1651     <condition id="CM7_DP_LE_IAR">
1652       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1653       <require condition="CM7_DP_IAR"/>
1654       <require Dendian="Little-endian"/>
1655     </condition>
1656     <condition id="CM7_DP_BE_IAR">
1657       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1658       <require condition="CM7_DP_IAR"/>
1659       <require Dendian="Big-endian"/>
1660     </condition>
1661
1662     <condition id="CM23_IAR">
1663       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1664       <require condition="CM23"/>
1665       <require Tcompiler="IAR"/>
1666     </condition>
1667     <condition id="CM23_LE_IAR">
1668       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1669       <require condition="CM23_IAR"/>
1670       <require Dendian="Little-endian"/>
1671     </condition>
1672     <condition id="CM23_BE_IAR">
1673       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1674       <require condition="CM23_IAR"/>
1675       <require Dendian="Big-endian"/>
1676     </condition>
1677
1678     <condition id="CM33_IAR">
1679       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1680       <require condition="CM33"/>
1681       <require Tcompiler="IAR"/>
1682     </condition>
1683     <condition id="CM33_LE_IAR">
1684       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1685       <require condition="CM33_IAR"/>
1686       <require Dendian="Little-endian"/>
1687     </condition>
1688     <condition id="CM33_BE_IAR">
1689       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1690       <require condition="CM33_IAR"/>
1691       <require Dendian="Big-endian"/>
1692     </condition>
1693
1694     <condition id="CM33_FP_IAR">
1695       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1696       <require condition="CM33_FP"/>
1697       <require Tcompiler="IAR"/>
1698     </condition>
1699     <condition id="CM33_FP_LE_IAR">
1700       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1701       <require condition="CM33_FP_IAR"/>
1702       <require Dendian="Little-endian"/>
1703     </condition>
1704     <condition id="CM33_FP_BE_IAR">
1705       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1706       <require condition="CM33_FP_IAR"/>
1707       <require Dendian="Big-endian"/>
1708     </condition>
1709
1710     <condition id="CM33_NODSP_NOFPU_IAR">
1711       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1712       <require condition="CM33_NODSP_NOFPU"/>
1713       <require Tcompiler="IAR"/>
1714     </condition>
1715     <condition id="CM33_DSP_NOFPU_IAR">
1716       <description>CM33, DSP, no FPU, IAR Compiler</description>
1717       <require condition="CM33_DSP_NOFPU"/>
1718       <require Tcompiler="IAR"/>
1719     </condition>
1720     <condition id="CM33_NODSP_SP_IAR">
1721       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1722       <require condition="CM33_NODSP_SP"/>
1723       <require Tcompiler="IAR"/>
1724     </condition>
1725     <condition id="CM33_DSP_SP_IAR">
1726       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1727       <require condition="CM33_DSP_SP"/>
1728       <require Tcompiler="IAR"/>
1729     </condition>
1730     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1731       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1732       <require condition="CM33_NODSP_NOFPU_IAR"/>
1733       <require Dendian="Little-endian"/>
1734     </condition>
1735     <condition id="CM33_DSP_NOFPU_LE_IAR">
1736       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1737       <require condition="CM33_DSP_NOFPU_IAR"/>
1738       <require Dendian="Little-endian"/>
1739     </condition>
1740     <condition id="CM33_NODSP_SP_LE_IAR">
1741       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1742       <require condition="CM33_NODSP_SP_IAR"/>
1743       <require Dendian="Little-endian"/>
1744     </condition>
1745     <condition id="CM33_DSP_SP_LE_IAR">
1746       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1747       <require condition="CM33_DSP_SP_IAR"/>
1748       <require Dendian="Little-endian"/>
1749     </condition>
1750
1751     <condition id="ARMv8MBL_IAR">
1752       <description>ARMv8-M Baseline processor based device for the IAR Compiler</description>
1753       <require condition="ARMv8MBL"/>
1754       <require Tcompiler="IAR"/>
1755     </condition>
1756     <condition id="ARMv8MBL_LE_IAR">
1757       <description>ARMv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1758       <require condition="ARMv8MBL_IAR"/>
1759       <require Dendian="Little-endian"/>
1760     </condition>
1761     <condition id="ARMv8MBL_BE_IAR">
1762       <description>ARMv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1763       <require condition="ARMv8MBL_IAR"/>
1764       <require Dendian="Big-endian"/>
1765     </condition>
1766
1767     <condition id="ARMv8MML_IAR">
1768       <description>ARMv8-M Mainline processor based device for the IAR Compiler</description>
1769       <require condition="ARMv8MML"/>
1770       <require Tcompiler="IAR"/>
1771     </condition>
1772     <condition id="ARMv8MML_LE_IAR">
1773       <description>ARMv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1774       <require condition="ARMv8MML_IAR"/>
1775       <require Dendian="Little-endian"/>
1776     </condition>
1777     <condition id="ARMv8MML_BE_IAR">
1778       <description>ARMv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1779       <require condition="ARMv8MML_IAR"/>
1780       <require Dendian="Big-endian"/>
1781     </condition>
1782
1783     <condition id="ARMv8MML_FP_IAR">
1784       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1785       <require condition="ARMv8MML_FP"/>
1786       <require Tcompiler="IAR"/>
1787     </condition>
1788     <condition id="ARMv8MML_FP_LE_IAR">
1789       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1790       <require condition="ARMv8MML_FP_IAR"/>
1791       <require Dendian="Little-endian"/>
1792     </condition>
1793     <condition id="ARMv8MML_FP_BE_IAR">
1794       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1795       <require condition="ARMv8MML_FP_IAR"/>
1796       <require Dendian="Big-endian"/>
1797     </condition>
1798
1799     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1800       <description>ARMv8MML, no DSP, no FPU, IAR Compiler</description>
1801       <require condition="ARMv8MML_NODSP_NOFPU"/>
1802       <require Tcompiler="IAR"/>
1803     </condition>
1804     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1805       <description>ARMv8MML, DSP, no FPU, IAR Compiler</description>
1806       <require condition="ARMv8MML_DSP_NOFPU"/>
1807       <require Tcompiler="IAR"/>
1808     </condition>
1809     <condition id="ARMv8MML_NODSP_SP_IAR">
1810       <description>ARMv8MML, no DSP, SP FPU, IAR Compiler</description>
1811       <require condition="ARMv8MML_NODSP_SP"/>
1812       <require Tcompiler="IAR"/>
1813     </condition>
1814     <condition id="ARMv8MML_DSP_SP_IAR">
1815       <description>ARMv8MML, DSP, SP FPU, IAR Compiler</description>
1816       <require condition="ARMv8MML_DSP_SP"/>
1817       <require Tcompiler="IAR"/>
1818     </condition>
1819     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1820       <description>ARMv8MML, little endian, no DSP, no FPU, IAR Compiler</description>
1821       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1822       <require Dendian="Little-endian"/>
1823     </condition>
1824     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1825       <description>ARMv8MML, little endian, DSP, no FPU, IAR Compiler</description>
1826       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1827       <require Dendian="Little-endian"/>
1828     </condition>
1829     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1830       <description>ARMv8MML, little endian, no DSP, SP FPU, IAR Compiler</description>
1831       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1832       <require Dendian="Little-endian"/>
1833     </condition>
1834     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1835       <description>ARMv8MML, little endian, DSP, SP FPU, IAR Compiler</description>
1836       <require condition="ARMv8MML_DSP_SP_IAR"/>
1837       <require Dendian="Little-endian"/>
1838     </condition>
1839
1840     <!-- conditions selecting single devices and CMSIS Core -->
1841     <!-- used for component startup, GCC version is used for C-Startup -->
1842     <condition id="ARMCM0 CMSIS">
1843       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1844       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1845       <require Cclass="CMSIS" Cgroup="CORE"/>
1846     </condition>
1847     <condition id="ARMCM0 CMSIS GCC">
1848       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1849       <require condition="ARMCM0 CMSIS"/>
1850       <require condition="GCC"/>
1851     </condition>
1852
1853     <condition id="ARMCM0+ CMSIS">
1854       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1855       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1856       <require Cclass="CMSIS" Cgroup="CORE"/>
1857     </condition>
1858     <condition id="ARMCM0+ CMSIS GCC">
1859       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1860       <require condition="ARMCM0+ CMSIS"/>
1861       <require condition="GCC"/>
1862     </condition>
1863
1864     <condition id="ARMCM3 CMSIS">
1865       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1866       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1867       <require Cclass="CMSIS" Cgroup="CORE"/>
1868     </condition>
1869     <condition id="ARMCM3 CMSIS GCC">
1870       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1871       <require condition="ARMCM3 CMSIS"/>
1872       <require condition="GCC"/>
1873     </condition>
1874
1875     <condition id="ARMCM4 CMSIS">
1876       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1877       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1878       <require Cclass="CMSIS" Cgroup="CORE"/>
1879     </condition>
1880     <condition id="ARMCM4 CMSIS GCC">
1881       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1882       <require condition="ARMCM4 CMSIS"/>
1883       <require condition="GCC"/>
1884     </condition>
1885
1886     <condition id="ARMCM7 CMSIS">
1887       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1888       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1889       <require Cclass="CMSIS" Cgroup="CORE"/>
1890     </condition>
1891     <condition id="ARMCM7 CMSIS GCC">
1892       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1893       <require condition="ARMCM7 CMSIS"/>
1894       <require condition="GCC"/>
1895     </condition>
1896
1897     <condition id="ARMCM23 CMSIS">
1898       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1899       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1900       <require Cclass="CMSIS" Cgroup="CORE"/>
1901     </condition>
1902     <condition id="ARMCM23 CMSIS GCC">
1903       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1904       <require condition="ARMCM23 CMSIS"/>
1905       <require condition="GCC"/>
1906     </condition>
1907
1908     <condition id="ARMCM33 CMSIS">
1909       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1910       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1911       <require Cclass="CMSIS" Cgroup="CORE"/>
1912     </condition>
1913     <condition id="ARMCM33 CMSIS GCC">
1914       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1915       <require condition="ARMCM33 CMSIS"/>
1916       <require condition="GCC"/>
1917     </condition>
1918
1919     <condition id="ARMSC000 CMSIS">
1920       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1921       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1922       <require Cclass="CMSIS" Cgroup="CORE"/>
1923     </condition>
1924     <condition id="ARMSC000 CMSIS GCC">
1925       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1926       <require condition="ARMSC000 CMSIS"/>
1927       <require condition="GCC"/>
1928     </condition>
1929
1930     <condition id="ARMSC300 CMSIS">
1931       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1932       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1933       <require Cclass="CMSIS" Cgroup="CORE"/>
1934     </condition>
1935     <condition id="ARMSC300 CMSIS GCC">
1936       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1937       <require condition="ARMSC300 CMSIS"/>
1938       <require condition="GCC"/>
1939     </condition>
1940
1941     <condition id="ARMv8MBL CMSIS">
1942       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1943       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1944       <require Cclass="CMSIS" Cgroup="CORE"/>
1945     </condition>
1946     <condition id="ARMv8MBL CMSIS GCC">
1947       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1948       <require condition="ARMv8MBL CMSIS"/>
1949       <require condition="GCC"/>
1950     </condition>
1951
1952     <condition id="ARMv8MML CMSIS">
1953       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1954       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1955       <require Cclass="CMSIS" Cgroup="CORE"/>
1956     </condition>
1957     <condition id="ARMv8MML CMSIS GCC">
1958       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1959       <require condition="ARMv8MML CMSIS"/>
1960       <require condition="GCC"/>
1961     </condition>
1962
1963     <condition id="ARMCA5 CMSIS">
1964       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1965       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1966       <require Cclass="CMSIS" Cgroup="CORE"/>
1967     </condition>
1968
1969     <condition id="ARMCA7 CMSIS">
1970       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1971       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1972       <require Cclass="CMSIS" Cgroup="CORE"/>
1973     </condition>
1974
1975     <condition id="ARMCA9 CMSIS">
1976       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1977       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1978       <require Cclass="CMSIS" Cgroup="CORE"/>
1979     </condition>
1980
1981     <!-- CMSIS DSP -->
1982     <condition id="CMSIS DSP">
1983       <description>Components required for DSP</description>
1984       <require condition="ARMv6_7_8-M Device"/>
1985       <require condition="ARMCC GCC"/>
1986       <require Cclass="CMSIS" Cgroup="CORE"/>
1987     </condition>
1988
1989     <!-- RTOS RTX -->
1990     <condition id="RTOS RTX">
1991       <description>Components required for RTOS RTX</description>
1992       <require condition="ARMv6_7-M Device"/>
1993       <require condition="ARMCC GCC IAR"/>
1994       <require Cclass="Device" Cgroup="Startup"/>
1995       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1996     </condition>
1997     <condition id="RTOS RTX IFX">
1998       <description>Components required for RTOS RTX IFX</description>
1999       <require condition="ARMv6_7-M Device"/>
2000       <require condition="ARMCC GCC IAR"/>
2001       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2002       <require Cclass="Device" Cgroup="Startup"/>
2003       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2004     </condition>
2005     <condition id="RTOS RTX5">
2006       <description>Components required for RTOS RTX5</description>
2007       <require condition="ARMv6_7_8-M Device"/>
2008       <require condition="ARMCC GCC IAR"/>
2009       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2010     </condition>
2011     <condition id="RTOS2 RTX5">
2012       <description>Components required for RTOS2 RTX5</description>
2013       <require condition="ARMv6_7_8-M Device"/>
2014       <require condition="ARMCC GCC IAR"/>
2015       <require Cclass="CMSIS"  Cgroup="CORE"/>
2016       <require Cclass="Device" Cgroup="Startup"/>
2017     </condition>
2018     <condition id="RTOS2 RTX5 v7-A">
2019       <description>Components required for RTOS2 RTX5 v7-A</description>
2020       <require condition="ARMv7-A Device"/>
2021       <require condition="ARMCC GCC IAR"/>
2022       <require Cclass="CMSIS"  Cgroup="CORE"/>
2023       <require Cclass="Device" Cgroup="Startup"/>
2024       <require Cclass="Device" Cgroup="OS Tick"/>
2025       <require Cclass="Device" Cgroup="IRQ Controller"/>
2026     </condition>
2027     <condition id="RTOS2 RTX5 Lib">
2028       <description>Components required for RTOS2 RTX5 Library</description>
2029       <require condition="ARMv6_7_8-M Device"/>
2030       <require condition="ARMCC GCC IAR"/>
2031       <require Cclass="CMSIS"  Cgroup="CORE"/>
2032       <require Cclass="Device" Cgroup="Startup"/>
2033     </condition>
2034     <condition id="RTOS2 RTX5 NS">
2035       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2036       <require condition="ARMv8-M TZ Device"/>
2037       <require condition="ARMCC GCC IAR"/>
2038       <require Cclass="CMSIS"  Cgroup="CORE"/>
2039       <require Cclass="Device" Cgroup="Startup"/>
2040     </condition>
2041
2042     <!-- OS Tick -->
2043     <condition id="OS Tick PTIM">
2044       <description>Components required for OS Tick Private Timer</description>
2045       <require condition="CA5_CA9"/>
2046       <require Cclass="Device" Cgroup="IRQ Controller"/>
2047     </condition>
2048
2049     <condition id="OS Tick GTIM">
2050       <description>Components required for OS Tick Generic Physical Timer</description>
2051       <require condition="CA7"/>
2052       <require Cclass="Device" Cgroup="IRQ Controller"/>
2053     </condition>
2054
2055   </conditions>
2056
2057   <components>
2058     <!-- CMSIS-Core component -->
2059     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2"  condition="ARMv6_7_8-M Device" >
2060       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2061       <files>
2062         <!-- CPU independent -->
2063         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2064         <file category="include" name="CMSIS/Include/"/>
2065         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2066         <!-- Code template -->
2067         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2068         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2069       </files>
2070     </component>
2071
2072     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.1"  condition="ARMv7-A Device" >
2073       <description>CMSIS-CORE for Cortex-A</description>
2074       <files>
2075         <!-- CPU independent -->
2076         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2077         <file category="include" name="CMSIS/Core_A/Include/"/>
2078       </files>
2079     </component>
2080
2081     <!-- CMSIS-Startup components -->
2082     <!-- Cortex-M0 -->
2083     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2084       <description>System and Startup for Generic ARM Cortex-M0 device</description>
2085       <files>
2086         <!-- include folder / device header file -->
2087         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2088         <!-- startup / system file -->
2089         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2090         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2091         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2092         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2093         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2094       </files>
2095     </component>
2096     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2097       <description>System and Startup for Generic ARM Cortex-M0 device</description>
2098       <files>
2099         <!-- include folder / device header file -->
2100         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2101         <!-- startup / system file -->
2102         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2103         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2104         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2105       </files>
2106     </component>
2107
2108     <!-- Cortex-M0+ -->
2109     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2110       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
2111       <files>
2112         <!-- include folder / device header file -->
2113         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2114         <!-- startup / system file -->
2115         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2116         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2117         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2118         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2119         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2120       </files>
2121     </component>
2122     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2123       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
2124       <files>
2125         <!-- include folder / device header file -->
2126         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2127         <!-- startup / system file -->
2128         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2129         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2130         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2131       </files>
2132     </component>
2133
2134     <!-- Cortex-M3 -->
2135     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2136       <description>System and Startup for Generic ARM Cortex-M3 device</description>
2137       <files>
2138         <!-- include folder / device header file -->
2139         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2140         <!-- startup / system file -->
2141         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2142         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2143         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2144         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2145         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2146       </files>
2147     </component>
2148     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2149       <description>System and Startup for Generic ARM Cortex-M3 device</description>
2150       <files>
2151         <!-- include folder / device header file -->
2152         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2153         <!-- startup / system file -->
2154         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2155         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2156         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2157       </files>
2158     </component>
2159
2160     <!-- Cortex-M4 -->
2161     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2162       <description>System and Startup for Generic ARM Cortex-M4 device</description>
2163       <files>
2164         <!-- include folder / device header file -->
2165         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2166         <!-- startup / system file -->
2167         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2168         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2169         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2170         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2171         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2172       </files>
2173     </component>
2174     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2175       <description>System and Startup for Generic ARM Cortex-M4 device</description>
2176       <files>
2177         <!-- include folder / device header file -->
2178         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2179         <!-- startup / system file -->
2180         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2181         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2182         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2183       </files>
2184     </component>
2185
2186     <!-- Cortex-M7 -->
2187     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2188       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2189       <files>
2190         <!-- include folder / device header file -->
2191         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2192         <!-- startup / system file -->
2193         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2194         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2195         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2196         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2197         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2198       </files>
2199     </component>
2200     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2201       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2202       <files>
2203         <!-- include folder / device header file -->
2204         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2205         <!-- startup / system file -->
2206         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2207         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2208         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2209       </files>
2210     </component>
2211
2212     <!-- Cortex-M23 -->
2213     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2214       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2215       <files>
2216         <!-- include folder / device header file -->
2217         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2218         <!-- startup / system file -->
2219         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2220         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2221         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2222         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2223         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2224         <!-- SAU configuration -->
2225         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2226       </files>
2227     </component>
2228     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2229       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2230       <files>
2231         <!-- include folder / device header file -->
2232         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2233         <!-- startup / system file -->
2234         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2235         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2236         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2237         <!-- SAU configuration -->
2238         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2239       </files>
2240     </component>
2241
2242     <!-- Cortex-M33 -->
2243     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2244       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2245       <files>
2246         <!-- include folder / device header file -->
2247         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2248         <!-- startup / system file -->
2249         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2250         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2251         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2252         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2253         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2254         <!-- SAU configuration -->
2255         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2256       </files>
2257     </component>
2258     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2259       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2260       <files>
2261         <!-- include folder / device header file -->
2262         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2263         <!-- startup / system file -->
2264         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2265         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2266         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2267         <!-- SAU configuration -->
2268         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2269       </files>
2270     </component>
2271
2272     <!-- Cortex-SC000 -->
2273     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2274       <description>System and Startup for Generic ARM SC000 device</description>
2275       <files>
2276         <!-- include folder / device header file -->
2277         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2278         <!-- startup / system file -->
2279         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2280         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2281         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2282         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2283         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2284       </files>
2285     </component>
2286     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2287       <description>System and Startup for Generic ARM SC000 device</description>
2288       <files>
2289         <!-- include folder / device header file -->
2290         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2291         <!-- startup / system file -->
2292         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2293         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2294         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2295       </files>
2296     </component>
2297
2298     <!-- Cortex-SC300 -->
2299     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2300       <description>System and Startup for Generic ARM SC300 device</description>
2301       <files>
2302         <!-- include folder / device header file -->
2303         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2304         <!-- startup / system file -->
2305         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2306         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2307         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2308         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2309         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2310       </files>
2311     </component>
2312     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2313       <description>System and Startup for Generic ARM SC300 device</description>
2314       <files>
2315         <!-- include folder / device header file -->
2316         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2317         <!-- startup / system file -->
2318         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2319         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2320         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2321       </files>
2322     </component>
2323
2324     <!-- ARMv8MBL -->
2325     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2326       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2327       <files>
2328         <!-- include folder / device header file -->
2329         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2330         <!-- startup / system file -->
2331         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2332         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2333         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2334         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2335         <!-- SAU configuration -->
2336         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2337       </files>
2338     </component>
2339     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2340       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2341       <files>
2342         <!-- include folder / device header file -->
2343         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2344         <!-- startup / system file -->
2345         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2346         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2347         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2348         <!-- SAU configuration -->
2349         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2350       </files>
2351     </component>
2352
2353     <!-- ARMv8MML -->
2354     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2355       <description>System and Startup for Generic ARM ARMv8MML device</description>
2356       <files>
2357         <!-- include folder / device header file -->
2358         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2359         <!-- startup / system file -->
2360         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2361         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2362         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2363         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2364         <!-- SAU configuration -->
2365         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2366       </files>
2367     </component>
2368     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2369       <description>System and Startup for Generic ARM ARMv8MML device</description>
2370       <files>
2371         <!-- include folder / device header file -->
2372         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2373         <!-- startup / system file -->
2374         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2375         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2376         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2377         <!-- SAU configuration -->
2378         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2379       </files>
2380     </component>
2381
2382     <!-- Cortex-A5 -->
2383     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2384       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2385       <files>
2386         <!-- include folder / device header file -->
2387         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2388         <!-- startup / system / mmu files -->
2389         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2390         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2391         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2392         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2393         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2394         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2395         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2396         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2397         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2398         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2399         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2400         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2401
2402       </files>
2403     </component>
2404
2405     <!-- Cortex-A7 -->
2406     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2407       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2408       <files>
2409         <!-- include folder / device header file -->
2410         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2411         <!-- startup / system / mmu files -->
2412         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2413         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2414         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2415         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2416         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2417         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2418         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2419         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2420         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2421         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2422         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2423         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2424       </files>
2425     </component>
2426
2427     <!-- Cortex-A9 -->
2428     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2429       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2430       <files>
2431         <!-- include folder / device header file -->
2432         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2433         <!-- startup / system / mmu files -->
2434         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2435         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2436         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2437         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2438         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2439         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2440         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2441         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2442         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2443         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2444         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2445         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2446       </files>
2447     </component>
2448
2449     <!-- IRQ Controller -->
2450     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2451       <description>IRQ Controller implementation using GIC</description>
2452       <files>
2453         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2454       </files>
2455     </component>
2456
2457     <!-- OS Tick -->
2458     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick PTIM">
2459       <description>OS Tick implementation using Private Timer</description>
2460       <files>
2461         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2462       </files>
2463     </component>
2464
2465     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2466       <description>OS Tick implementation using Generic Physical Timer</description>
2467       <files>
2468         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2469       </files>
2470     </component>
2471
2472     <!-- CMSIS-DSP component -->
2473     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2474       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2475       <files>
2476         <!-- CPU independent -->
2477         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2478         <file category="header" name="CMSIS/Include/arm_math.h"/>
2479
2480         <!-- CPU and Compiler dependent -->
2481         <!-- ARMCC -->
2482         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2483         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2484         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2485         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2486         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2487         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2488         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2489         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2490         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2491         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2492         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2493         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2494         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2495         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2496
2497         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2498         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2499         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2500         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2501         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2502         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2503         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2504         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2505         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2506         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2507         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2508         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2509
2510         <!-- GCC -->
2511         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2512         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2513         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2514         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2515         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2516         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2517         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2518
2519         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2520         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2521         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2522         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2523         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2524         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2525         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2526         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2527         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2528         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2529         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2530         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2531
2532       </files>
2533     </component>
2534
2535     <!-- CMSIS-RTOS Keil RTX component -->
2536     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2537       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2538       <RTE_Components_h>
2539         <!-- the following content goes into file 'RTE_Components.h' -->
2540         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2541         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2542       </RTE_Components_h>
2543       <files>
2544         <!-- CPU independent -->
2545         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2546         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2547         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2548
2549         <!-- RTX templates -->
2550         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2551         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2552         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2553         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2554         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2555         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2556         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2557         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2558         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2559         <!-- tool-chain specific template file -->
2560         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2561         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2562         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2563
2564         <!-- CPU and Compiler dependent -->
2565         <!-- ARMCC -->
2566         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2567         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2568         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2569         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2570         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2571         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2572         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2573         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2574         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2575         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2576         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2577         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2578         <!-- GCC -->
2579         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2580         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2581         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2582         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2583         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2584         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2585         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2586         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2587         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2588         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2589         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2590         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2591         <!-- IAR -->
2592         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2593         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2594         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2595         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2596         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2597         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2598         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2599         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2600         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2601         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2602         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2603         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2604       </files>
2605     </component>
2606     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2607     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2608       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2609       <RTE_Components_h>
2610         <!-- the following content goes into file 'RTE_Components.h' -->
2611         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2612         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2613       </RTE_Components_h>
2614       <files>
2615         <!-- CPU independent -->
2616         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2617         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2618         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2619
2620         <!-- RTX templates -->
2621         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2622         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2623         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2624         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2625         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2626         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2627         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2628         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2629         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2630         <!-- tool-chain specific template file -->
2631         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2632         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2633         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2634
2635         <!-- CPU and Compiler dependent -->
2636         <!-- ARMCC -->
2637         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2638         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2639         <!-- GCC -->
2640         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2641         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2642         <!-- IAR -->
2643       </files>
2644     </component>
2645
2646     <!-- CMSIS-RTOS Keil RTX5 component -->
2647     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.3" Capiversion="1.0.0" condition="RTOS RTX5">
2648       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2649       <RTE_Components_h>
2650         <!-- the following content goes into file 'RTE_Components.h' -->
2651         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2652         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2653       </RTE_Components_h>
2654       <files>
2655         <!-- RTX header file -->
2656         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2657         <!-- RTX compatibility module for API V1 -->
2658         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2659       </files>
2660     </component>
2661
2662     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2663     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 Lib">
2664       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2665       <RTE_Components_h>
2666         <!-- the following content goes into file 'RTE_Components.h' -->
2667         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2668         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2669       </RTE_Components_h>
2670       <files>
2671         <!-- RTX documentation -->
2672         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2673
2674         <!-- RTX header files -->
2675         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2676
2677         <!-- RTX configuration -->
2678         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2679         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2680
2681         <!-- RTX templates -->
2682         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2683         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2684         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2685         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2686         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2687         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2688         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2689         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2690         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2691         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2692
2693         <!-- RTX library configuration -->
2694         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2695
2696         <!-- RTX libraries (CPU and Compiler dependent) -->
2697         <!-- ARMCC -->
2698         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2699         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2700         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2701         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2702         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2703         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2704         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2705         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2706         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2707         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2708         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2709         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2710         <!-- GCC -->
2711         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2712         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2713         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2714         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2715         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2716         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2717         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2718         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2719         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2720         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2721         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2722         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2723         <!-- IAR -->
2724         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2725         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2726         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2727         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2728         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2729         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2730       </files>
2731     </component>
2732     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2733       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2734       <RTE_Components_h>
2735         <!-- the following content goes into file 'RTE_Components.h' -->
2736         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2737         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2738         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2739       </RTE_Components_h>
2740       <files>
2741         <!-- RTX documentation -->
2742         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2743
2744         <!-- RTX header files -->
2745         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2746
2747         <!-- RTX configuration -->
2748         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2749         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2750
2751         <!-- RTX templates -->
2752         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2753         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2754         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2755         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2756         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2757         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2758         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2759         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2760         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2761         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2762
2763         <!-- RTX library configuration -->
2764         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2765
2766         <!-- RTX libraries (CPU and Compiler dependent) -->
2767         <!-- ARMCC -->
2768         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2769         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2770         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2771         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2772         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2773         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2774         <!-- GCC -->
2775         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2776         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2777         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2778         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2779         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2780         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2781       </files>
2782     </component>
2783     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5">
2784       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2785       <RTE_Components_h>
2786         <!-- the following content goes into file 'RTE_Components.h' -->
2787         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2788         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2789         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2790       </RTE_Components_h>
2791       <files>
2792         <!-- RTX documentation -->
2793         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2794
2795         <!-- RTX header files -->
2796         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2797
2798         <!-- RTX configuration -->
2799         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2800         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2801
2802         <!-- RTX templates -->
2803         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2804         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2805         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2806         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2807         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2808         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2809         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2810         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2811         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2812         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2813
2814         <!-- RTX sources (core) -->
2815         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2816         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2817         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2818         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2819         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2820         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2821         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2822         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2823         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2824         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2825         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2826         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2827         <!-- RTX sources (library configuration) -->
2828         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2829         <!-- RTX sources (handlers ARMCC) -->
2830         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2831         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2832         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2833         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2834         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2835         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2836         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2837         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2838         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2839         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2840         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2841         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2842         <!-- RTX sources (handlers GCC) -->
2843         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2844         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2845         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2846         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2847         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2848         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2849         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2850         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2851         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2852         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2853         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2854         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2855         <!-- RTX sources (handlers IAR) -->
2856         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2857         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2858         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2859         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2860         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2861         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2862         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
2863         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
2864         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
2865         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
2866         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
2867         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
2868         <!-- OS Tick (SysTick) -->
2869         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2870       </files>
2871     </component>
2872     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 v7-A">
2873       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2874       <RTE_Components_h>
2875         <!-- the following content goes into file 'RTE_Components.h' -->
2876         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2877         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2878         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2879       </RTE_Components_h>
2880       <files>
2881         <!-- RTX documentation -->
2882         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2883
2884         <!-- RTX header files -->
2885         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2886
2887         <!-- RTX configuration -->
2888         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2889         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2890
2891         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2892
2893         <!-- RTX templates -->
2894         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2895         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2896         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2897         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2898         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2899         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2900         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2901         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2902         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2903         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2904
2905         <!-- RTX sources (core) -->
2906         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2907         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2908         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2909         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2910         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2911         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2912         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2913         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2914         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2915         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2916         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2917         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2918         <!-- RTX sources (library configuration) -->
2919         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2920         <!-- RTX sources (handlers ARMCC) -->
2921         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2922         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2923         <!-- RTX sources (handlers GCC) -->
2924         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2925         <!-- RTX sources (handlers IAR) -->
2926         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2927       </files>
2928     </component>
2929     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2930       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2931       <RTE_Components_h>
2932         <!-- the following content goes into file 'RTE_Components.h' -->
2933         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2934         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2935         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2936         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2937       </RTE_Components_h>
2938       <files>
2939         <!-- RTX documentation -->
2940         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2941
2942         <!-- RTX header files -->
2943         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2944
2945         <!-- RTX configuration -->
2946         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2947         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2948
2949         <!-- RTX templates -->
2950         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2951         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2952         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2953         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2954         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2955         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2956         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2957         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2958         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2959         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2960
2961         <!-- RTX sources (core) -->
2962         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2963         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2964         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2965         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2966         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2967         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2968         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2969         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2970         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2971         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2972         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2973         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2974         <!-- RTX sources (library configuration) -->
2975         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2976         <!-- RTX sources (ARMCC handlers) -->
2977         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2978         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2979         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2980         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2981         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2982         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2983         <!-- RTX sources (GCC handlers) -->
2984         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2985         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2986         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2987         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2988         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2989         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2990         <!-- RTX sources (IAR handlers) -->
2991         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
2992         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
2993         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
2994         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
2995         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
2996         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
2997         <!-- OS Tick (SysTick) -->
2998         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2999       </files>
3000     </component>
3001
3002   </components>
3003
3004   <boards>
3005     <board name="uVision Simulator" vendor="Keil">
3006       <description>uVision Simulator</description>
3007       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3008       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3009       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3010       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3011       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3012       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3013       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3014       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3015       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3016       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3017       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3018       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3019       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3020       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3021       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3022       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3023       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3024       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3025       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3026     </board>
3027
3028     <board name="Fixed Virtual Platform" vendor="ARM">
3029       <description>Fixed Virtual Platform</description>
3030       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3031       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3032       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3033     </board>
3034   </boards>
3035
3036   <examples>
3037     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
3038       <description>DSP_Lib Class Marks example</description>
3039       <board name="uVision Simulator" vendor="Keil"/>
3040       <project>
3041         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3042       </project>
3043       <attributes>
3044         <component Cclass="CMSIS" Cgroup="CORE"/>
3045         <component Cclass="CMSIS" Cgroup="DSP"/>
3046         <component Cclass="Device" Cgroup="Startup"/>
3047         <category>Getting Started</category>
3048       </attributes>
3049     </example>
3050
3051     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
3052       <description>DSP_Lib Convolution example</description>
3053       <board name="uVision Simulator" vendor="Keil"/>
3054       <project>
3055         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3056       </project>
3057       <attributes>
3058         <component Cclass="CMSIS" Cgroup="CORE"/>
3059         <component Cclass="CMSIS" Cgroup="DSP"/>
3060         <component Cclass="Device" Cgroup="Startup"/>
3061         <category>Getting Started</category>
3062       </attributes>
3063     </example>
3064
3065     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
3066       <description>DSP_Lib Dotproduct example</description>
3067       <board name="uVision Simulator" vendor="Keil"/>
3068       <project>
3069         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3070       </project>
3071       <attributes>
3072         <component Cclass="CMSIS" Cgroup="CORE"/>
3073         <component Cclass="CMSIS" Cgroup="DSP"/>
3074         <component Cclass="Device" Cgroup="Startup"/>
3075         <category>Getting Started</category>
3076       </attributes>
3077     </example>
3078
3079     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
3080       <description>DSP_Lib FFT Bin example</description>
3081       <board name="uVision Simulator" vendor="Keil"/>
3082       <project>
3083         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3084       </project>
3085       <attributes>
3086         <component Cclass="CMSIS" Cgroup="CORE"/>
3087         <component Cclass="CMSIS" Cgroup="DSP"/>
3088         <component Cclass="Device" Cgroup="Startup"/>
3089         <category>Getting Started</category>
3090       </attributes>
3091     </example>
3092
3093     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
3094       <description>DSP_Lib FIR example</description>
3095       <board name="uVision Simulator" vendor="Keil"/>
3096       <project>
3097         <environment name="uv" load="arm_fir_example.uvprojx"/>
3098       </project>
3099       <attributes>
3100         <component Cclass="CMSIS" Cgroup="CORE"/>
3101         <component Cclass="CMSIS" Cgroup="DSP"/>
3102         <component Cclass="Device" Cgroup="Startup"/>
3103         <category>Getting Started</category>
3104       </attributes>
3105     </example>
3106
3107     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
3108       <description>DSP_Lib Graphic Equalizer example</description>
3109       <board name="uVision Simulator" vendor="Keil"/>
3110       <project>
3111         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3112       </project>
3113       <attributes>
3114         <component Cclass="CMSIS" Cgroup="CORE"/>
3115         <component Cclass="CMSIS" Cgroup="DSP"/>
3116         <component Cclass="Device" Cgroup="Startup"/>
3117         <category>Getting Started</category>
3118       </attributes>
3119     </example>
3120
3121     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
3122       <description>DSP_Lib Linear Interpolation example</description>
3123       <board name="uVision Simulator" vendor="Keil"/>
3124       <project>
3125         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3126       </project>
3127       <attributes>
3128         <component Cclass="CMSIS" Cgroup="CORE"/>
3129         <component Cclass="CMSIS" Cgroup="DSP"/>
3130         <component Cclass="Device" Cgroup="Startup"/>
3131         <category>Getting Started</category>
3132       </attributes>
3133     </example>
3134
3135     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
3136       <description>DSP_Lib Matrix example</description>
3137       <board name="uVision Simulator" vendor="Keil"/>
3138       <project>
3139         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3140       </project>
3141       <attributes>
3142         <component Cclass="CMSIS" Cgroup="CORE"/>
3143         <component Cclass="CMSIS" Cgroup="DSP"/>
3144         <component Cclass="Device" Cgroup="Startup"/>
3145         <category>Getting Started</category>
3146       </attributes>
3147     </example>
3148
3149     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
3150       <description>DSP_Lib Signal Convergence example</description>
3151       <board name="uVision Simulator" vendor="Keil"/>
3152       <project>
3153         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3154       </project>
3155       <attributes>
3156         <component Cclass="CMSIS" Cgroup="CORE"/>
3157         <component Cclass="CMSIS" Cgroup="DSP"/>
3158         <component Cclass="Device" Cgroup="Startup"/>
3159         <category>Getting Started</category>
3160       </attributes>
3161     </example>
3162
3163     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
3164       <description>DSP_Lib Sinus/Cosinus example</description>
3165       <board name="uVision Simulator" vendor="Keil"/>
3166       <project>
3167         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3168       </project>
3169       <attributes>
3170         <component Cclass="CMSIS" Cgroup="CORE"/>
3171         <component Cclass="CMSIS" Cgroup="DSP"/>
3172         <component Cclass="Device" Cgroup="Startup"/>
3173         <category>Getting Started</category>
3174       </attributes>
3175     </example>
3176
3177     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
3178       <description>DSP_Lib Variance example</description>
3179       <board name="uVision Simulator" vendor="Keil"/>
3180       <project>
3181         <environment name="uv" load="arm_variance_example.uvprojx"/>
3182       </project>
3183       <attributes>
3184         <component Cclass="CMSIS" Cgroup="CORE"/>
3185         <component Cclass="CMSIS" Cgroup="DSP"/>
3186         <component Cclass="Device" Cgroup="Startup"/>
3187         <category>Getting Started</category>
3188       </attributes>
3189     </example>
3190
3191     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3192       <description>CMSIS-RTOS2 Blinky example</description>
3193       <board name="uVision Simulator" vendor="Keil"/>
3194       <project>
3195         <environment name="uv" load="Blinky.uvprojx"/>
3196       </project>
3197       <attributes>
3198         <component Cclass="CMSIS" Cgroup="CORE"/>
3199         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3200         <component Cclass="Device" Cgroup="Startup"/>
3201         <category>Getting Started</category>
3202       </attributes>
3203     </example>
3204
3205     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3206       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3207       <board name="uVision Simulator" vendor="Keil"/>
3208       <project>
3209         <environment name="uv" load="Blinky.uvprojx"/>
3210       </project>
3211       <attributes>
3212         <component Cclass="CMSIS" Cgroup="CORE"/>
3213         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3214         <component Cclass="Device" Cgroup="Startup"/>
3215         <category>Getting Started</category>
3216       </attributes>
3217     </example>
3218
3219     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3220       <description>CMSIS-RTOS2 Message Queue Example</description>
3221       <board name="uVision Simulator" vendor="Keil"/>
3222       <project>
3223         <environment name="uv" load="MsqQueue.uvprojx"/>
3224       </project>
3225       <attributes>
3226         <component Cclass="CMSIS" Cgroup="CORE"/>
3227         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3228         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3229         <component Cclass="Device" Cgroup="Startup"/>
3230         <category>Getting Started</category>
3231       </attributes>
3232     </example>
3233
3234     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3235       <description>CMSIS-RTOS2 Memory Pool Example</description>
3236       <board name="Fixed Virtual Platform" vendor="ARM"/>
3237       <project>
3238         <environment name="uv" load="MemPool.uvprojx"/>
3239       </project>
3240       <attributes>
3241         <component Cclass="CMSIS" Cgroup="CORE"/>
3242         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3243         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3244         <component Cclass="Device" Cgroup="Startup"/>
3245         <category>Getting Started</category>
3246       </attributes>
3247     </example>
3248
3249     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3250       <description>Bare-metal secure/non-secure example without RTOS</description>
3251       <board name="uVision Simulator" vendor="Keil"/>
3252       <project>
3253         <environment name="uv" load="NoRTOS.uvmpw"/>
3254       </project>
3255       <attributes>
3256         <component Cclass="CMSIS" Cgroup="CORE"/>
3257         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3258         <component Cclass="Device" Cgroup="Startup"/>
3259         <category>Getting Started</category>
3260       </attributes>
3261     </example>
3262
3263     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3264       <description>Secure/non-secure RTOS example with thread context management</description>
3265       <board name="uVision Simulator" vendor="Keil"/>
3266       <project>
3267         <environment name="uv" load="RTOS.uvmpw"/>
3268       </project>
3269       <attributes>
3270         <component Cclass="CMSIS" Cgroup="CORE"/>
3271         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3272         <component Cclass="Device" Cgroup="Startup"/>
3273         <category>Getting Started</category>
3274       </attributes>
3275     </example>
3276
3277     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3278       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3279       <board name="uVision Simulator" vendor="Keil"/>
3280       <project>
3281         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3282       </project>
3283       <attributes>
3284         <component Cclass="CMSIS" Cgroup="CORE"/>
3285         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3286         <component Cclass="Device" Cgroup="Startup"/>
3287         <category>Getting Started</category>
3288       </attributes>
3289     </example>
3290
3291   </examples>
3292
3293 </package>