]> begriffs open source - cmsis/blob - CMSIS/CoreValidation/Source/cmsis_cv.c
Core(M): Aligned PSPLIM and MSPLIM access functions among compilers and device variants.
[cmsis] / CMSIS / CoreValidation / Source / cmsis_cv.c
1 /*-----------------------------------------------------------------------------
2  *      Name:         cmsis_cv.c
3  *      Purpose:      Driver validation test cases entry point
4  *----------------------------------------------------------------------------
5  *      Copyright (c) 2017 ARM Limited. All rights reserved.
6  *----------------------------------------------------------------------------*/
7 #include "cmsis_cv.h"
8 #include "RTE_Components.h"
9 #include "CV_Framework.h"
10 #include "CV_Config.h"
11
12 /*-----------------------------------------------------------------------------
13  *      Prototypes
14  *----------------------------------------------------------------------------*/
15
16 void WDT_IRQHandler(void);
17
18 /*-----------------------------------------------------------------------------
19  *      Variables declarations
20  *----------------------------------------------------------------------------*/
21
22 void (*TST_IRQHandler)(void);
23
24 void WDT_IRQHandler(void) {
25   if (TST_IRQHandler != NULL) TST_IRQHandler();
26 }
27
28 /*-----------------------------------------------------------------------------
29  *      Init test suite
30  *----------------------------------------------------------------------------*/
31 static void TS_Init (void) {
32   TST_IRQHandler = NULL;
33
34 #ifdef RTE_CV_MEASURETICKS
35   StartCortexCycleCounter();
36 #endif
37 }
38
39 /*-----------------------------------------------------------------------------
40  *      Test cases list
41  *----------------------------------------------------------------------------*/
42 static TEST_CASE TC_LIST[] = {
43 #ifdef RTE_CV_COREINSTR
44   TCD ( TC_CoreInstr_NOP,                     TC_COREINSTR_NOP_EN                ),
45   TCD ( TC_CoreInstr_REV,                     TC_COREINSTR_REV_EN                ),
46   TCD ( TC_CoreInstr_REV16,                   TC_COREINSTR_REV16_EN              ),
47   TCD ( TC_CoreInstr_REVSH,                   TC_COREINSTR_REVSH_EN              ),
48   TCD ( TC_CoreInstr_ROR,                     TC_COREINSTR_ROR_EN                ),
49   TCD ( TC_CoreInstr_RBIT,                    TC_COREINSTR_RBIT_EN               ),
50   TCD ( TC_CoreInstr_CLZ,                     TC_COREINSTR_CLZ_EN                ),
51   TCD ( TC_CoreInstr_SSAT,                    TC_COREINSTR_SSAT_EN               ),
52   TCD ( TC_CoreInstr_USAT,                    TC_COREINSTR_USAT_EN               ),
53 #endif
54 #ifdef RTE_CV_COREFUNC
55   #if defined(__CORTEX_M)
56     TCD ( TC_CoreFunc_EnDisIRQ,               TC_COREFUNC_ENDISIRQ_EN            ),
57     TCD ( TC_CoreFunc_Control,                TC_COREFUNC_CONTROL_EN             ),
58     TCD ( TC_CoreFunc_IPSR,                   TC_COREFUNC_IPSR_EN                ),
59     TCD ( TC_CoreFunc_APSR,                   TC_COREFUNC_APSR_EN                ),
60
61     TCD ( TC_CoreFunc_PSP,                    TC_COREFUNC_PSP_EN                 ),
62     TCD ( TC_CoreFunc_MSP,                    TC_COREFUNC_MSP_EN                 ),
63
64     #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
65          (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
66
67     TCD ( TC_CoreFunc_PSPLIM,                TC_COREFUNC_PSPLIM_EN               ),
68     TCD ( TC_CoreFunc_PSPLIM_NS,             TC_COREFUNC_PSPLIM_NS_EN            ),
69     TCD ( TC_CoreFunc_MSPLIM,                TC_COREFUNC_MSPLIM_EN               ),
70     TCD ( TC_CoreFunc_MSPLIM_NS,             TC_COREFUNC_MSPLIM_NS_EN            ),
71
72     #endif
73
74     TCD ( TC_CoreFunc_PRIMASK,               TC_COREFUNC_PRIMASK_EN              ),
75
76     #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
77        (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
78        (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
79
80       TCD ( TC_CoreFunc_FAULTMASK,           TC_COREFUNC_FAULTMASK_EN            ),
81       TCD ( TC_CoreFunc_BASEPRI,             TC_COREFUNC_BASEPRI_EN              ),
82
83     #endif
84
85     #if ((defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
86        (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
87
88       TCD ( TC_CoreFunc_FPSCR,               TC_COREFUNC_FPSCR_EN                ),
89
90     #endif
91   #elif defined(__CORTEX_A)
92       TCD ( TC_CoreAFunc_IRQ,                TC_COREAFUNC_IRQ                    ),
93       TCD ( TC_CoreAFunc_FPSCR,              TC_COREAFUNC_FPSCR                  ),
94       TCD ( TC_CoreAFunc_CPSR,               TC_COREAFUNC_CPSR                   ),
95       TCD ( TC_CoreAFunc_Mode,               TC_COREAFUNC_MODE                   ),
96       TCD ( TC_CoreAFunc_SP,                 TC_COREAFUNC_SP                     ),
97       TCD ( TC_CoreAFunc_SP_usr,             TC_COREAFUNC_SP_USR                 ),
98       TCD ( TC_CoreAFunc_FPEXC,              TC_COREAFUNC_FPEXC                  ),
99       TCD ( TC_CoreAFunc_ACTLR,              TC_COREAFUNC_ACTLR                  ),
100       TCD ( TC_CoreAFunc_CPACR,              TC_COREAFUNC_CPACR                  ),
101       TCD ( TC_CoreAFunc_DFSR,               TC_COREAFUNC_DFSR                   ),
102       TCD ( TC_CoreAFunc_IFSR,               TC_COREAFUNC_IFSR                   ),
103       TCD ( TC_CoreAFunc_ISR,                TC_COREAFUNC_ISR                    ),
104       TCD ( TC_CoreAFunc_CBAR,               TC_COREAFUNC_CBAR                   ),
105       TCD ( TC_CoreAFunc_TTBR0,              TC_COREAFUNC_TTBR0                  ),
106       TCD ( TC_CoreAFunc_DACR,               TC_COREAFUNC_DACR                   ),
107       TCD ( TC_CoreAFunc_SCTLR,              TC_COREAFUNC_SCTLR                  ),
108       TCD ( TC_CoreAFunc_ACTRL,              TC_COREAFUNC_ACTRL                  ),
109       TCD ( TC_CoreAFunc_MPIDR,              TC_COREAFUNC_MPIDR                  ),
110       TCD ( TC_CoreAFunc_VBAR,               TC_COREAFUNC_VBAR                   ),
111   #endif
112 #endif
113 #ifdef RTE_CV_MPUFUNC
114   TCD ( TC_MPU_SetClear,                     TC_MPU_SETCLEAR_EN                  ),
115   TCD ( TC_MPU_Load,                         TC_MPU_LOAD_EN                      ),
116 #endif
117 #ifdef RTE_CV_GENTIMER
118   TCD ( TC_GenTimer_CNTFRQ,                  TC_GENTIMER_CNTFRQ                  ),
119   TCD ( TC_GenTimer_CNTP_TVAL,               TC_GENTIMER_CNTP_TVAL               ),
120   TCD ( TC_GenTimer_CNTP_CTL,                TC_GENTIMER_CNTP_CTL                ),
121   TCD ( TC_GenTimer_CNTPCT,                  TC_GENTIMER_CNTPCT                  ),
122   TCD ( TC_GenTimer_CNTP_CVAL,               TC_GENTIMER_CNTP_CVAL               ),
123 #endif
124 };
125
126 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
127 #pragma clang diagnostic push
128 #pragma clang diagnostic ignored "-Wdate-time"
129 #endif
130 /*-----------------------------------------------------------------------------
131  *      Test suite description
132  *----------------------------------------------------------------------------*/
133 TEST_SUITE ts = {
134   __FILE__, __DATE__, __TIME__,
135   "CMSIS-CORE Test Suite",
136   TS_Init,
137   1,
138   TC_LIST,
139   ARRAY_SIZE (TC_LIST),
140 };
141 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
142 #pragma clang diagnostic pop
143 #endif