begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.1.2-dev3">
  12       Active development...
  13       CMSIS-Core(A): 1.0.1 (see revision history for details)
  14         - Added compiler_iccarm.h.
  15         - Added additional access functions for physical timer.
  16       CMSIS-RTOS2:
  17       - RTX 5.2.3 (see revision history for details)
  18       Devices:
  19        - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  20     </release>
  21     <release version="5.1.2-dev2">
  22       CMSIS-Core(M): 5.0.3 (see revision history for details)
  23       - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  24       CMSIS-RTOS2:
  25       - RTX 5.2.2 (see revision history for details)
  26     </release>
  27     <release version="5.1.2-dev1">
  28       Devices:
  29       - added GCC startup and linker script for Cortex-A9
  30       CMSIS-Core(M): 5.0.3 (see revision history for details)
  31       - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  32       - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  33       CMSIS-Core(A): 1.0.1 (see revision history for details)
  34       CMSIS-Driver:
  35       - CAN Driver API V1.2.0
  36       CMSIS-RTOS:
  37       - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata
  38       CMSIS-RTOS2:
  39       - RTX 5.2.1 (see revision history for details)
  40       - Message Queue Example
  41       - Memory Pool Example
  42     </release>
  43     <release version="5.1.1" date="2017-09-19">
  44       CMSIS-RTOS2:
  45       - RTX 5.2.1 (see revision history for details)
  46     </release>
  47     <release version="5.1.0" date="2017-08-04">
  48       CMSIS-Core(M): 5.0.2 (see revision history for details)
  49       - Changed Version Control macros to be core agnostic.
  50       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  51       CMSIS-Core(A): 1.0.0 (see revision history for details)
  52       - Initial release
  53       - IRQ Controller API 1.0.0
  54       CMSIS-Driver: 2.05 (see revision history for details)
  55       - All typedefs related to status have been made volatile.
  56       CMSIS-RTOS2:
  57       - API 2.1.1 (see revision history for details)
  58       - RTX 5.2.0 (see revision history for details)
  59       - OS Tick API 1.0.0
  60       CMSIS-DSP: 1.5.2 (see revision history for details)
  61       - Fixed GNU Compiler specific diagnostics.
  62       CMSIS-PACK: 1.5.0 (see revision history for details)
  63       - added System Description File (*.SDF) Format
  64       CMSIS-Zone: 0.0.1 (Preview)
  65       - Initial specification draft
  66     </release>
  67     <release version="5.0.1" date="2017-02-03">
  68       Package Description:
  69       - added taxonomy for Cclass RTOS
  70       CMSIS-RTOS2:
  71       - API 2.1   (see revision history for details)
  72       - RTX 5.1.0 (see revision history for details)
  73       CMSIS-Core: 5.0.1 (see revision history for details)
  74       - Added __PACKED_STRUCT macro
  75       - Added uVisior support
  76       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  77       - Updated template for secure main function (main_s.c)
  78       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  79       CMSIS-DSP: 1.5.1 (see revision history for details)
  80       - added ARMv8M DSP libraries.
  81       CMSIS-PACK:1.4.9 (see revision history for details)
  82       - added Pack Index File specification and schema file
  83     </release>
  84     <release version="5.0.0" date="2016-11-11">
  85       Changed open source license to Apache 2.0
  86       CMSIS_Core:
  87        - Added support for Cortex-M23 and Cortex-M33.
  88        - Added ARMv8-M device configurations for mainline and baseline.
  89        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  90        - Added cmsis_compiler.h to unify compiler behaviour.
  91        - Updated function SCB_EnableICache (for Cortex-M7).
  92        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  93       CMSIS-RTOS:
  94         - bug fix in RTX 4.82 (see revision history for details)
  95       CMSIS-RTOS2:
  96         - new API including compatibility layer to CMSIS-RTOS
  97         - reference implementation based on RTX5
  98         - supports all Cortex-M variants including TrustZone for ARMv8-M
  99       CMSIS-SVD:
 100        - reworked SVD format documentation
 101        - removed SVD file database documentation as SVD files are distributed in packs
 102        - updated SVDConv for Win32 and Linux
 103       CMSIS-DSP:
 104        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 105        - Added DSP libraries build projects to CMSIS pack.
 106     </release>
 107     <release version="4.5.0" date="2015-10-28">
 108       - CMSIS-Core     4.30.0  (see revision history for details)
 109       - CMSIS-DAP      1.1.0   (unchanged)
 110       - CMSIS-Driver   2.04.0  (see revision history for details)
 111       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 112       - CMSIS-PACK     1.4.1   (see revision history for details)
 113       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 114       - CMSIS-SVD      1.3.1   (see revision history for details)
 115     </release>
 116     <release version="4.4.0" date="2015-09-11">
 117       - CMSIS-Core     4.20   (see revision history for details)
 118       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 119       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 120       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 121       - CMSIS-RTOS
 122         -- API         1.02   (unchanged)
 123         -- RTX         4.79   (see revision history for details)
 124       - CMSIS-SVD      1.3.0  (see revision history for details)
 125       - CMSIS-DAP      1.1.0  (extended with SWO support)
 126     </release>
 127     <release version="4.3.0" date="2015-03-20">
 128       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 129       - CMSIS-DSP      1.4.5  (see revision history for details)
 130       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 131       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 132       - CMSIS-RTOS
 133         -- API         1.02   (unchanged)
 134         -- RTX         4.78   (see revision history for details)
 135       - CMSIS-SVD      1.2    (unchanged)
 136     </release>
 137     <release version="4.2.0" date="2014-09-24">
 138       Adding Cortex-M7 support
 139       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 140       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 141       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 142       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 143       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 144     </release>
 145     <release version="4.1.1" date="2014-06-30">
 146       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 147     </release>
 148     <release version="4.1.0" date="2014-06-12">
 149       - CMSIS-Driver   2.02  (incompatible update)
 150       - CMSIS-Pack     1.3   (see revision history for details)
 151       - CMSIS-DSP      1.4.2 (unchanged)
 152       - CMSIS-Core     3.30  (unchanged)
 153       - CMSIS-RTOS RTX 4.74  (unchanged)
 154       - CMSIS-RTOS API 1.02  (unchanged)
 155       - CMSIS-SVD      1.10  (unchanged)
 156       PACK:
 157       - removed G++ specific files from PACK
 158       - added Component Startup variant "C Startup"
 159       - added Pack Checking Utility
 160       - updated conditions to reflect tool-chain dependency
 161       - added Taxonomy for Graphics
 162       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 163     </release>
 164     <release version="4.0.0">
 165       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 166       - CMSIS-Pack     1.1   Preliminary
 167       - CMSIS-DSP      1.4.2 (see revision history for details)
 168       - CMSIS-Core     3.30  (see revision history for details)
 169       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 170       - CMSIS-RTOS API 1.02  (unchanged)
 171       - CMSIS-SVD      1.10  (unchanged)
 172     </release>
 173     <release version="3.20.4">
 174       - CMSIS-RTOS 4.74 (see revision history for details)
 175       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 176     </release>
 177     <release version="3.20.3">
 178       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 179       - CMSIS-RTOS 4.73 (see revision history for details)
 180     </release>
 181     <release version="3.20.2">
 182       - CMSIS-Pack documentation has been added
 183       - CMSIS-Drivers header and documentation have been added to PACK
 184       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 185     </release>
 186     <release version="3.20.1">
 187       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 188       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 189     </release>
 190     <release version="3.20.0">
 191       The software portions that are deployed in the application program are now under a BSD license which allows usage
 192       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 193       The individual components have been update as listed below:
 194       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 195       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 196       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 197       - CMSIS-SVD is unchanged.
 198     </release>
 199   </releases>
 200
 201   <taxonomy>
 202     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 203     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 204     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 205     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 206     <description Cclass="File System">File Drive Support and File System</description>
 207     <description Cclass="Graphics">Graphical User Interface</description>
 208     <description Cclass="Network">Network Stack using Internet Protocols</description>
 209     <description Cclass="USB">Universal Serial Bus Stack</description>
 210     <description Cclass="Compiler">Compiler Software Extensions</description>
 211     <description Cclass="RTOS">Real-time Operating System</description>
 212   </taxonomy>
 213
 214   <devices>
 215     <!-- ******************************  Cortex-M0  ****************************** -->
 216     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 217       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 218       <description>
 219 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 220 - simple, easy-to-use programmers model
 221 - highly efficient ultra-low power operation
 222 - excellent code density
 223 - deterministic, high-performance interrupt handling
 224 - upward compatibility with the rest of the Cortex-M processor family.
 225       </description>
 226       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 227       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 228       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 229       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 230
 231       <device Dname="ARMCM0">
 232         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 233         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 234       </device>
 235     </family>
 236
 237     <!-- ******************************  Cortex-M0P  ****************************** -->
 238     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 239       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 240       <description>
 241 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 242 - simple, easy-to-use programmers model
 243 - highly efficient ultra-low power operation
 244 - excellent code density
 245 - deterministic, high-performance interrupt handling
 246 - upward compatibility with the rest of the Cortex-M processor family.
 247       </description>
 248       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 249       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 250       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 251       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 252
 253       <device Dname="ARMCM0P">
 254         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 255         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 256       </device>
 257
 258       <device Dname="ARMCM0P_MPU">
 259         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 260         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 261       </device>
 262     </family>
 263
 264     <!-- ******************************  Cortex-M3  ****************************** -->
 265     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 266       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 267       <description>
 268 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 269 - simple, easy-to-use programmers model
 270 - highly efficient ultra-low power operation
 271 - excellent code density
 272 - deterministic, high-performance interrupt handling
 273 - upward compatibility with the rest of the Cortex-M processor family.
 274       </description>
 275       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 276       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 277       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 278       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 279
 280       <device Dname="ARMCM3">
 281         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 282         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 283       </device>
 284     </family>
 285
 286     <!-- ******************************  Cortex-M4  ****************************** -->
 287     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 288       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 289       <description>
 290 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 291 - simple, easy-to-use programmers model
 292 - highly efficient ultra-low power operation
 293 - excellent code density
 294 - deterministic, high-performance interrupt handling
 295 - upward compatibility with the rest of the Cortex-M processor family.
 296       </description>
 297       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 298       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 299       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 300       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 301
 302       <device Dname="ARMCM4">
 303         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 304         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 305       </device>
 306
 307       <device Dname="ARMCM4_FP">
 308         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 309         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 310       </device>
 311     </family>
 312
 313     <!-- ******************************  Cortex-M7  ****************************** -->
 314     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 315       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 316       <description>
 317 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 318 - simple, easy-to-use programmers model
 319 - highly efficient ultra-low power operation
 320 - excellent code density
 321 - deterministic, high-performance interrupt handling
 322 - upward compatibility with the rest of the Cortex-M processor family.
 323       </description>
 324       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 325       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 326       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 327       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 328
 329       <device Dname="ARMCM7">
 330         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 331         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 332       </device>
 333
 334       <device Dname="ARMCM7_SP">
 335         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 336         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 337       </device>
 338
 339       <device Dname="ARMCM7_DP">
 340         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 341         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 342       </device>
 343     </family>
 344
 345     <!-- ******************************  Cortex-M23  ********************** -->
 346     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 347       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 348       <description>
 349 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 350 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 351 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 352       </description>
 353       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 354       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 355       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 356       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 357       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 358       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 359
 360       <device Dname="ARMCM23">
 361         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 362         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 363       </device>
 364
 365       <device Dname="ARMCM23_TZ">
 366         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 367         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 368       </device>
 369     </family>
 370
 371     <!-- ******************************  Cortex-M33  ****************************** -->
 372     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 373       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 374       <description>
 375 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 376 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 377       </description>
 378       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 379       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 380       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 381       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 382       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 383       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 384
 385       <device Dname="ARMCM33">
 386         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 387         <description>
 388           no DSP Instructions, no Floating Point Unit, no TrustZone
 389         </description>
 390         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 391       </device>
 392
 393       <device Dname="ARMCM33_TZ">
 394         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 395         <description>
 396           no DSP Instructions, no Floating Point Unit, TrustZone
 397         </description>
 398         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 399       </device>
 400
 401       <device Dname="ARMCM33_DSP_FP">
 402         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 403         <description>
 404           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 405         </description>
 406         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 407       </device>
 408
 409       <device Dname="ARMCM33_DSP_FP_TZ">
 410         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 411         <description>
 412           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 413         </description>
 414         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 415       </device>
 416     </family>
 417
 418     <!-- ******************************  ARMSC000  ****************************** -->
 419     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 420       <description>
 421 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 422 - simple, easy-to-use programmers model
 423 - highly efficient ultra-low power operation
 424 - excellent code density
 425 - deterministic, high-performance interrupt handling
 426       </description>
 427       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 428       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 429       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 430       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 431
 432       <device Dname="ARMSC000">
 433         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 434         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 435       </device>
 436     </family>
 437
 438     <!-- ******************************  ARMSC300  ****************************** -->
 439     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 440       <description>
 441 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 442 - simple, easy-to-use programmers model
 443 - highly efficient ultra-low power operation
 444 - excellent code density
 445 - deterministic, high-performance interrupt handling
 446       </description>
 447       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 448       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 449       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 450       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 451
 452       <device Dname="ARMSC300">
 453         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 454         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 455       </device>
 456     </family>
 457
 458     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 459     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 460       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 461       <description>
 462 ARMv8-M Baseline based device with TrustZone
 463       </description>
 464       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 465       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 466       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 467       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 468       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 469       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 470
 471       <device Dname="ARMv8MBL">
 472         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 473         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 474       </device>
 475     </family>
 476
 477     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 478     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 479       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 480       <description>
 481 ARMv8-M Mainline based device with TrustZone
 482       </description>
 483       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 484       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 485       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 486       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 487       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 488       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 489
 490       <device Dname="ARMv8MML">
 491         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 492         <description>
 493           no DSP Instructions, no Floating Point Unit, TrustZone
 494         </description>
 495         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 496       </device>
 497
 498       <device Dname="ARMv8MML_DSP">
 499         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 500         <description>
 501           DSP Instructions, no Floating Point Unit, TrustZone
 502         </description>
 503         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 504       </device>
 505
 506       <device Dname="ARMv8MML_SP">
 507         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 508         <description>
 509           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 510         </description>
 511         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 512       </device>
 513
 514       <device Dname="ARMv8MML_DSP_SP">
 515         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 516         <description>
 517           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 518         </description>
 519         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 520       </device>
 521
 522       <device Dname="ARMv8MML_DP">
 523         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 524         <description>
 525           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 526         </description>
 527         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 528       </device>
 529
 530       <device Dname="ARMv8MML_DSP_DP">
 531         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 532         <description>
 533           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 534         </description>
 535         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 536       </device>
 537     </family>
 538
 539     <!-- ******************************  Cortex-A5  ****************************** -->
 540     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 541       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 542       <description>
 543 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 544 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 545 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 546       </description>
 547
 548       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 549       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 550
 551       <device Dname="ARMCA5">
 552         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 553         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 554       </device>
 555     </family>
 556
 557     <!-- ******************************  Cortex-A7  ****************************** -->
 558     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 559       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 560       <description>
 561 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 562 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 563 an optional integrated GIC, and an optional L2 cache controller.
 564       </description>
 565
 566       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 567       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 568
 569       <device Dname="ARMCA7">
 570         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 571         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 572       </device>
 573     </family>
 574
 575     <!-- ******************************  Cortex-A9  ****************************** -->
 576     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 577       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 578       <description>
 579 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 580 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 581 and 8-bit Java bytecodes in Jazelle state.
 582       </description>
 583
 584       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 585       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 586
 587       <device Dname="ARMCA9">
 588         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 589         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 590       </device>
 591     </family>
 592   </devices>
 593
 594
 595   <apis>
 596     <!-- CMSIS Device API -->
 597     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 598       <description>Device interrupt controller interface</description>
 599       <files>
 600         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 601       </files>
 602     </api>
 603     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
 604       <description>RTOS Kernel system tick timer interface</description>
 605       <files>
 606         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 607       </files>
 608     </api>
 609     <!-- CMSIS-RTOS API -->
 610     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 611       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 612       <files>
 613         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 614       </files>
 615     </api>
 616     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
 617       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 618       <files>
 619         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 620         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 621       </files>
 622     </api>
 623     <!-- CMSIS Driver API -->
 624     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 625       <description>USART Driver API for Cortex-M</description>
 626       <files>
 627         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 628         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 629       </files>
 630     </api>
 631     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 632       <description>SPI Driver API for Cortex-M</description>
 633       <files>
 634         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 635         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 636       </files>
 637     </api>
 638     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 639       <description>SAI Driver API for Cortex-M</description>
 640       <files>
 641         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 642         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 643       </files>
 644     </api>
 645     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 646       <description>I2C Driver API for Cortex-M</description>
 647       <files>
 648         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 649         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 650       </files>
 651     </api>
 652     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 653       <description>CAN Driver API for Cortex-M</description>
 654       <files>
 655         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 656         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 657       </files>
 658     </api>
 659     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 660       <description>Flash Driver API for Cortex-M</description>
 661       <files>
 662         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 663         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 664       </files>
 665     </api>
 666     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 667       <description>MCI Driver API for Cortex-M</description>
 668       <files>
 669         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 670         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 671       </files>
 672     </api>
 673     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 674       <description>NAND Flash Driver API for Cortex-M</description>
 675       <files>
 676         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 677         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 678       </files>
 679     </api>
 680     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 681       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 682       <files>
 683         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 684         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 685         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 686       </files>
 687     </api>
 688     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 689       <description>Ethernet MAC Driver API for Cortex-M</description>
 690       <files>
 691         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 692         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 693       </files>
 694     </api>
 695     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 696       <description>Ethernet PHY Driver API for Cortex-M</description>
 697       <files>
 698         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 699         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 700       </files>
 701     </api>
 702     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 703       <description>USB Device Driver API for Cortex-M</description>
 704       <files>
 705         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 706         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 707       </files>
 708     </api>
 709     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 710       <description>USB Host Driver API for Cortex-M</description>
 711       <files>
 712         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 713         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 714       </files>
 715     </api>
 716   </apis>
 717
 718   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 719   <conditions>
 720     <!-- compiler -->
 721     <condition id="ARMCC6">
 722       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 723       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 724     </condition>
 725     <condition id="ARMCC5">
 726       <require Tcompiler="ARMCC" Toptions="AC5"/>
 727     </condition>
 728     <condition id="ARMCC">
 729       <require Tcompiler="ARMCC"/>
 730     </condition>
 731     <condition id="GCC">
 732       <require Tcompiler="GCC"/>
 733     </condition>
 734     <condition id="IAR">
 735       <require Tcompiler="IAR"/>
 736     </condition>
 737     <condition id="ARMCC GCC">
 738       <accept Tcompiler="ARMCC"/>
 739       <accept Tcompiler="GCC"/>
 740     </condition>
 741     <condition id="ARMCC GCC IAR">
 742       <accept Tcompiler="ARMCC"/>
 743       <accept Tcompiler="GCC"/>
 744       <accept Tcompiler="IAR"/>
 745     </condition>
 746
 747     <!-- ARM architecture -->
 748     <condition id="ARMv6-M Device">
 749       <description>ARMv6-M architecture based device</description>
 750       <accept Dcore="Cortex-M0"/>
 751       <accept Dcore="Cortex-M0+"/>
 752       <accept Dcore="SC000"/>
 753     </condition>
 754     <condition id="ARMv7-M Device">
 755       <description>ARMv7-M architecture based device</description>
 756       <accept Dcore="Cortex-M3"/>
 757       <accept Dcore="Cortex-M4"/>
 758       <accept Dcore="Cortex-M7"/>
 759       <accept Dcore="SC300"/>
 760     </condition>
 761     <condition id="ARMv8-M Device">
 762       <description>ARMv8-M architecture based device</description>
 763       <accept Dcore="ARMV8MBL"/>
 764       <accept Dcore="ARMV8MML"/>
 765       <accept Dcore="Cortex-M23"/>
 766       <accept Dcore="Cortex-M33"/>
 767     </condition>
 768     <condition id="ARMv8-M TZ Device">
 769       <description>ARMv8-M architecture based device with TrustZone</description>
 770       <require condition="ARMv8-M Device"/>
 771       <require Dtz="TZ"/>
 772     </condition>
 773     <condition id="ARMv6_7-M Device">
 774       <description>ARMv6_7-M architecture based device</description>
 775       <accept condition="ARMv6-M Device"/>
 776       <accept condition="ARMv7-M Device"/>
 777     </condition>
 778     <condition id="ARMv6_7_8-M Device">
 779       <description>ARMv6_7_8-M architecture based device</description>
 780       <accept condition="ARMv6-M Device"/>
 781       <accept condition="ARMv7-M Device"/>
 782       <accept condition="ARMv8-M Device"/>
 783     </condition>
 784     <condition id="ARMv7-A Device">
 785       <description>ARMv7-A architecture based device</description>
 786       <accept Dcore="Cortex-A5"/>
 787       <accept Dcore="Cortex-A7"/>
 788       <accept Dcore="Cortex-A9"/>
 789     </condition>
 790
 791     <!-- ARM core -->
 792     <condition id="CM0">
 793       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 794       <accept Dcore="Cortex-M0"/>
 795       <accept Dcore="Cortex-M0+"/>
 796       <accept Dcore="SC000"/>
 797     </condition>
 798     <condition id="CM3">
 799       <description>Cortex-M3 or SC300 processor based device</description>
 800       <accept Dcore="Cortex-M3"/>
 801       <accept Dcore="SC300"/>
 802     </condition>
 803     <condition id="CM4">
 804       <description>Cortex-M4 processor based device</description>
 805       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 806     </condition>
 807     <condition id="CM4_FP">
 808       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 809       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 810     </condition>
 811     <condition id="CM7">
 812       <description>Cortex-M7 processor based device</description>
 813       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 814     </condition>
 815     <condition id="CM7_FP">
 816       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 817       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 818       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 819     </condition>
 820     <condition id="CM7_SP">
 821       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 822       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 823     </condition>
 824     <condition id="CM7_DP">
 825       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 826       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 827     </condition>
 828     <condition id="CM23">
 829       <description>Cortex-M23 processor based device</description>
 830       <require Dcore="Cortex-M23"/>
 831     </condition>
 832     <condition id="CM33">
 833       <description>Cortex-M33 processor based device</description>
 834       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 835     </condition>
 836     <condition id="CM33_FP">
 837       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 838       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 839     </condition>
 840     <condition id="ARMv8MBL">
 841       <description>ARMv8-M Baseline processor based device</description>
 842       <require Dcore="ARMV8MBL"/>
 843     </condition>
 844     <condition id="ARMv8MML">
 845       <description>ARMv8-M Mainline processor based device</description>
 846       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 847     </condition>
 848     <condition id="ARMv8MML_FP">
 849       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 850       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 851       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 852     </condition>
 853
 854     <condition id="CM33_NODSP_NOFPU">
 855       <description>CM33, no DSP, no FPU</description>
 856       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 857     </condition>
 858     <condition id="CM33_DSP_NOFPU">
 859       <description>CM33, DSP, no FPU</description>
 860       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 861     </condition>
 862     <condition id="CM33_NODSP_SP">
 863       <description>CM33, no DSP, SP FPU</description>
 864       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 865     </condition>
 866     <condition id="CM33_DSP_SP">
 867       <description>CM33, DSP, SP FPU</description>
 868       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 869     </condition>
 870
 871     <condition id="ARMv8MML_NODSP_NOFPU">
 872       <description>ARMv8MML, no DSP, no FPU</description>
 873       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 874     </condition>
 875     <condition id="ARMv8MML_DSP_NOFPU">
 876       <description>ARMv8MML, DSP, no FPU</description>
 877       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 878     </condition>
 879     <condition id="ARMv8MML_NODSP_SP">
 880       <description>ARMv8MML, no DSP, SP FPU</description>
 881       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 882     </condition>
 883     <condition id="ARMv8MML_DSP_SP">
 884       <description>ARMv8MML, DSP, SP FPU</description>
 885       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 886     </condition>
 887
 888     <condition id="CA5_CA9">
 889       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 890       <accept Dcore="Cortex-A5"/>
 891       <accept Dcore="Cortex-A9"/>
 892     </condition>
 893
 894     <condition id="CA7">
 895       <description>Cortex-A7 processor based device</description>
 896       <accept Dcore="Cortex-A7"/>
 897     </condition>
 898
 899     <!-- ARMCC compiler -->
 900     <condition id="CA_ARMCC5">
 901       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 902       <require condition="ARMv7-A Device"/>
 903       <require condition="ARMCC5"/>
 904     </condition>
 905     <condition id="CA_ARMCC6">
 906       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 907       <require condition="ARMv7-A Device"/>
 908       <require condition="ARMCC6"/>
 909     </condition>
 910
 911     <condition id="CM0_ARMCC">
 912       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 913       <require condition="CM0"/>
 914       <require Tcompiler="ARMCC"/>
 915     </condition>
 916     <condition id="CM0_LE_ARMCC">
 917       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 918       <require condition="CM0_ARMCC"/>
 919       <require Dendian="Little-endian"/>
 920     </condition>
 921     <condition id="CM0_BE_ARMCC">
 922       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 923       <require condition="CM0_ARMCC"/>
 924       <require Dendian="Big-endian"/>
 925     </condition>
 926
 927     <condition id="CM3_ARMCC">
 928       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 929       <require condition="CM3"/>
 930       <require Tcompiler="ARMCC"/>
 931     </condition>
 932     <condition id="CM3_LE_ARMCC">
 933       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 934       <require condition="CM3_ARMCC"/>
 935       <require Dendian="Little-endian"/>
 936     </condition>
 937     <condition id="CM3_BE_ARMCC">
 938       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 939       <require condition="CM3_ARMCC"/>
 940       <require Dendian="Big-endian"/>
 941     </condition>
 942
 943     <condition id="CM4_ARMCC">
 944       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 945       <require condition="CM4"/>
 946       <require Tcompiler="ARMCC"/>
 947     </condition>
 948     <condition id="CM4_LE_ARMCC">
 949       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 950       <require condition="CM4_ARMCC"/>
 951       <require Dendian="Little-endian"/>
 952     </condition>
 953     <condition id="CM4_BE_ARMCC">
 954       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 955       <require condition="CM4_ARMCC"/>
 956       <require Dendian="Big-endian"/>
 957     </condition>
 958
 959     <condition id="CM4_FP_ARMCC">
 960       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 961       <require condition="CM4_FP"/>
 962       <require Tcompiler="ARMCC"/>
 963     </condition>
 964     <condition id="CM4_FP_LE_ARMCC">
 965       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 966       <require condition="CM4_FP_ARMCC"/>
 967       <require Dendian="Little-endian"/>
 968     </condition>
 969     <condition id="CM4_FP_BE_ARMCC">
 970       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 971       <require condition="CM4_FP_ARMCC"/>
 972       <require Dendian="Big-endian"/>
 973     </condition>
 974
 975     <condition id="CM7_ARMCC">
 976       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 977       <require condition="CM7"/>
 978       <require Tcompiler="ARMCC"/>
 979     </condition>
 980     <condition id="CM7_LE_ARMCC">
 981       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 982       <require condition="CM7_ARMCC"/>
 983       <require Dendian="Little-endian"/>
 984     </condition>
 985     <condition id="CM7_BE_ARMCC">
 986       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 987       <require condition="CM7_ARMCC"/>
 988       <require Dendian="Big-endian"/>
 989     </condition>
 990
 991     <condition id="CM7_FP_ARMCC">
 992       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 993       <require condition="CM7_FP"/>
 994       <require Tcompiler="ARMCC"/>
 995     </condition>
 996     <condition id="CM7_FP_LE_ARMCC">
 997       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 998       <require condition="CM7_FP_ARMCC"/>
 999       <require Dendian="Little-endian"/>
1000     </condition>
1001     <condition id="CM7_FP_BE_ARMCC">
1002       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1003       <require condition="CM7_FP_ARMCC"/>
1004       <require Dendian="Big-endian"/>
1005     </condition>
1006
1007     <condition id="CM7_SP_ARMCC">
1008       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1009       <require condition="CM7_SP"/>
1010       <require Tcompiler="ARMCC"/>
1011     </condition>
1012     <condition id="CM7_SP_LE_ARMCC">
1013       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1014       <require condition="CM7_SP_ARMCC"/>
1015       <require Dendian="Little-endian"/>
1016     </condition>
1017     <condition id="CM7_SP_BE_ARMCC">
1018       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1019       <require condition="CM7_SP_ARMCC"/>
1020       <require Dendian="Big-endian"/>
1021     </condition>
1022
1023     <condition id="CM7_DP_ARMCC">
1024       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1025       <require condition="CM7_DP"/>
1026       <require Tcompiler="ARMCC"/>
1027     </condition>
1028     <condition id="CM7_DP_LE_ARMCC">
1029       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1030       <require condition="CM7_DP_ARMCC"/>
1031       <require Dendian="Little-endian"/>
1032     </condition>
1033     <condition id="CM7_DP_BE_ARMCC">
1034       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1035       <require condition="CM7_DP_ARMCC"/>
1036       <require Dendian="Big-endian"/>
1037     </condition>
1038
1039     <condition id="CM23_ARMCC">
1040       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1041       <require condition="CM23"/>
1042       <require Tcompiler="ARMCC"/>
1043     </condition>
1044     <condition id="CM23_LE_ARMCC">
1045       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1046       <require condition="CM23_ARMCC"/>
1047       <require Dendian="Little-endian"/>
1048     </condition>
1049     <condition id="CM23_BE_ARMCC">
1050       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1051       <require condition="CM23_ARMCC"/>
1052       <require Dendian="Big-endian"/>
1053     </condition>
1054
1055     <condition id="CM33_ARMCC">
1056       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1057       <require condition="CM33"/>
1058       <require Tcompiler="ARMCC"/>
1059     </condition>
1060     <condition id="CM33_LE_ARMCC">
1061       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1062       <require condition="CM33_ARMCC"/>
1063       <require Dendian="Little-endian"/>
1064     </condition>
1065     <condition id="CM33_BE_ARMCC">
1066       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1067       <require condition="CM33_ARMCC"/>
1068       <require Dendian="Big-endian"/>
1069     </condition>
1070
1071     <condition id="CM33_FP_ARMCC">
1072       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1073       <require condition="CM33_FP"/>
1074       <require Tcompiler="ARMCC"/>
1075     </condition>
1076     <condition id="CM33_FP_LE_ARMCC">
1077       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1078       <require condition="CM33_FP_ARMCC"/>
1079       <require Dendian="Little-endian"/>
1080     </condition>
1081     <condition id="CM33_FP_BE_ARMCC">
1082       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1083       <require condition="CM33_FP_ARMCC"/>
1084       <require Dendian="Big-endian"/>
1085     </condition>
1086
1087     <condition id="CM33_NODSP_NOFPU_ARMCC">
1088       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1089       <require condition="CM33_NODSP_NOFPU"/>
1090       <require Tcompiler="ARMCC"/>
1091     </condition>
1092     <condition id="CM33_DSP_NOFPU_ARMCC">
1093       <description>CM33, DSP, no FPU, ARM Compiler</description>
1094       <require condition="CM33_DSP_NOFPU"/>
1095       <require Tcompiler="ARMCC"/>
1096     </condition>
1097     <condition id="CM33_NODSP_SP_ARMCC">
1098       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1099       <require condition="CM33_NODSP_SP"/>
1100       <require Tcompiler="ARMCC"/>
1101     </condition>
1102     <condition id="CM33_DSP_SP_ARMCC">
1103       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1104       <require condition="CM33_DSP_SP"/>
1105       <require Tcompiler="ARMCC"/>
1106     </condition>
1107     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1108       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1109       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1110       <require Dendian="Little-endian"/>
1111     </condition>
1112     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1113       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1114       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1115       <require Dendian="Little-endian"/>
1116     </condition>
1117     <condition id="CM33_NODSP_SP_LE_ARMCC">
1118       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1119       <require condition="CM33_NODSP_SP_ARMCC"/>
1120       <require Dendian="Little-endian"/>
1121     </condition>
1122     <condition id="CM33_DSP_SP_LE_ARMCC">
1123       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1124       <require condition="CM33_DSP_SP_ARMCC"/>
1125       <require Dendian="Little-endian"/>
1126     </condition>
1127
1128     <condition id="ARMv8MBL_ARMCC">
1129       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1130       <require condition="ARMv8MBL"/>
1131       <require Tcompiler="ARMCC"/>
1132     </condition>
1133     <condition id="ARMv8MBL_LE_ARMCC">
1134       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1135       <require condition="ARMv8MBL_ARMCC"/>
1136       <require Dendian="Little-endian"/>
1137     </condition>
1138     <condition id="ARMv8MBL_BE_ARMCC">
1139       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1140       <require condition="ARMv8MBL_ARMCC"/>
1141       <require Dendian="Big-endian"/>
1142     </condition>
1143
1144     <condition id="ARMv8MML_ARMCC">
1145       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1146       <require condition="ARMv8MML"/>
1147       <require Tcompiler="ARMCC"/>
1148     </condition>
1149     <condition id="ARMv8MML_LE_ARMCC">
1150       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1151       <require condition="ARMv8MML_ARMCC"/>
1152       <require Dendian="Little-endian"/>
1153     </condition>
1154     <condition id="ARMv8MML_BE_ARMCC">
1155       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1156       <require condition="ARMv8MML_ARMCC"/>
1157       <require Dendian="Big-endian"/>
1158     </condition>
1159
1160     <condition id="ARMv8MML_FP_ARMCC">
1161       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1162       <require condition="ARMv8MML_FP"/>
1163       <require Tcompiler="ARMCC"/>
1164     </condition>
1165     <condition id="ARMv8MML_FP_LE_ARMCC">
1166       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1167       <require condition="ARMv8MML_FP_ARMCC"/>
1168       <require Dendian="Little-endian"/>
1169     </condition>
1170     <condition id="ARMv8MML_FP_BE_ARMCC">
1171       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1172       <require condition="ARMv8MML_FP_ARMCC"/>
1173       <require Dendian="Big-endian"/>
1174     </condition>
1175
1176     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1177       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1178       <require condition="ARMv8MML_NODSP_NOFPU"/>
1179       <require Tcompiler="ARMCC"/>
1180     </condition>
1181     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1182       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1183       <require condition="ARMv8MML_DSP_NOFPU"/>
1184       <require Tcompiler="ARMCC"/>
1185     </condition>
1186     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1187       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1188       <require condition="ARMv8MML_NODSP_SP"/>
1189       <require Tcompiler="ARMCC"/>
1190     </condition>
1191     <condition id="ARMv8MML_DSP_SP_ARMCC">
1192       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1193       <require condition="ARMv8MML_DSP_SP"/>
1194       <require Tcompiler="ARMCC"/>
1195     </condition>
1196     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1197       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1198       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1199       <require Dendian="Little-endian"/>
1200     </condition>
1201     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1202       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1203       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1204       <require Dendian="Little-endian"/>
1205     </condition>
1206     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1207       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1208       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1209       <require Dendian="Little-endian"/>
1210     </condition>
1211     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1212       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1213       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1214       <require Dendian="Little-endian"/>
1215     </condition>
1216
1217     <!-- GCC compiler -->
1218     <condition id="CA_GCC">
1219       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1220       <require condition="ARMv7-A Device"/>
1221       <require Tcompiler="GCC"/>
1222     </condition>
1223
1224     <condition id="CM0_GCC">
1225       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1226       <require condition="CM0"/>
1227       <require Tcompiler="GCC"/>
1228     </condition>
1229     <condition id="CM0_LE_GCC">
1230       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1231       <require condition="CM0_GCC"/>
1232       <require Dendian="Little-endian"/>
1233     </condition>
1234     <condition id="CM0_BE_GCC">
1235       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1236       <require condition="CM0_GCC"/>
1237       <require Dendian="Big-endian"/>
1238     </condition>
1239
1240     <condition id="CM3_GCC">
1241       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1242       <require condition="CM3"/>
1243       <require Tcompiler="GCC"/>
1244     </condition>
1245     <condition id="CM3_LE_GCC">
1246       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1247       <require condition="CM3_GCC"/>
1248       <require Dendian="Little-endian"/>
1249     </condition>
1250     <condition id="CM3_BE_GCC">
1251       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1252       <require condition="CM3_GCC"/>
1253       <require Dendian="Big-endian"/>
1254     </condition>
1255
1256     <condition id="CM4_GCC">
1257       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1258       <require condition="CM4"/>
1259       <require Tcompiler="GCC"/>
1260     </condition>
1261     <condition id="CM4_LE_GCC">
1262       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1263       <require condition="CM4_GCC"/>
1264       <require Dendian="Little-endian"/>
1265     </condition>
1266     <condition id="CM4_BE_GCC">
1267       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1268       <require condition="CM4_GCC"/>
1269       <require Dendian="Big-endian"/>
1270     </condition>
1271
1272     <condition id="CM4_FP_GCC">
1273       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1274       <require condition="CM4_FP"/>
1275       <require Tcompiler="GCC"/>
1276     </condition>
1277     <condition id="CM4_FP_LE_GCC">
1278       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1279       <require condition="CM4_FP_GCC"/>
1280       <require Dendian="Little-endian"/>
1281     </condition>
1282     <condition id="CM4_FP_BE_GCC">
1283       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1284       <require condition="CM4_FP_GCC"/>
1285       <require Dendian="Big-endian"/>
1286     </condition>
1287
1288     <condition id="CM7_GCC">
1289       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1290       <require condition="CM7"/>
1291       <require Tcompiler="GCC"/>
1292     </condition>
1293     <condition id="CM7_LE_GCC">
1294       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1295       <require condition="CM7_GCC"/>
1296       <require Dendian="Little-endian"/>
1297     </condition>
1298     <condition id="CM7_BE_GCC">
1299       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1300       <require condition="CM7_GCC"/>
1301       <require Dendian="Big-endian"/>
1302     </condition>
1303
1304     <condition id="CM7_FP_GCC">
1305       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1306       <require condition="CM7_FP"/>
1307       <require Tcompiler="GCC"/>
1308     </condition>
1309     <condition id="CM7_FP_LE_GCC">
1310       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1311       <require condition="CM7_FP_GCC"/>
1312       <require Dendian="Little-endian"/>
1313     </condition>
1314     <condition id="CM7_FP_BE_GCC">
1315       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1316       <require condition="CM7_FP_GCC"/>
1317       <require Dendian="Big-endian"/>
1318     </condition>
1319
1320     <condition id="CM7_SP_GCC">
1321       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1322       <require condition="CM7_SP"/>
1323       <require Tcompiler="GCC"/>
1324     </condition>
1325     <condition id="CM7_SP_LE_GCC">
1326       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1327       <require condition="CM7_SP_GCC"/>
1328       <require Dendian="Little-endian"/>
1329     </condition>
1330     <condition id="CM7_SP_BE_GCC">
1331       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1332       <require condition="CM7_SP_GCC"/>
1333       <require Dendian="Big-endian"/>
1334     </condition>
1335
1336     <condition id="CM7_DP_GCC">
1337       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1338       <require condition="CM7_DP"/>
1339       <require Tcompiler="GCC"/>
1340     </condition>
1341     <condition id="CM7_DP_LE_GCC">
1342       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1343       <require condition="CM7_DP_GCC"/>
1344       <require Dendian="Little-endian"/>
1345     </condition>
1346     <condition id="CM7_DP_BE_GCC">
1347       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1348       <require condition="CM7_DP_GCC"/>
1349       <require Dendian="Big-endian"/>
1350     </condition>
1351
1352     <condition id="CM23_GCC">
1353       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1354       <require condition="CM23"/>
1355       <require Tcompiler="GCC"/>
1356     </condition>
1357     <condition id="CM23_LE_GCC">
1358       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1359       <require condition="CM23_GCC"/>
1360       <require Dendian="Little-endian"/>
1361     </condition>
1362     <condition id="CM23_BE_GCC">
1363       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1364       <require condition="CM23_GCC"/>
1365       <require Dendian="Big-endian"/>
1366     </condition>
1367
1368     <condition id="CM33_GCC">
1369       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1370       <require condition="CM33"/>
1371       <require Tcompiler="GCC"/>
1372     </condition>
1373     <condition id="CM33_LE_GCC">
1374       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1375       <require condition="CM33_GCC"/>
1376       <require Dendian="Little-endian"/>
1377     </condition>
1378     <condition id="CM33_BE_GCC">
1379       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1380       <require condition="CM33_GCC"/>
1381       <require Dendian="Big-endian"/>
1382     </condition>
1383
1384     <condition id="CM33_FP_GCC">
1385       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1386       <require condition="CM33_FP"/>
1387       <require Tcompiler="GCC"/>
1388     </condition>
1389     <condition id="CM33_FP_LE_GCC">
1390       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1391       <require condition="CM33_FP_GCC"/>
1392       <require Dendian="Little-endian"/>
1393     </condition>
1394     <condition id="CM33_FP_BE_GCC">
1395       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1396       <require condition="CM33_FP_GCC"/>
1397       <require Dendian="Big-endian"/>
1398     </condition>
1399
1400     <condition id="CM33_NODSP_NOFPU_GCC">
1401       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1402       <require condition="CM33_NODSP_NOFPU"/>
1403       <require Tcompiler="GCC"/>
1404     </condition>
1405     <condition id="CM33_DSP_NOFPU_GCC">
1406       <description>CM33, DSP, no FPU, GCC Compiler</description>
1407       <require condition="CM33_DSP_NOFPU"/>
1408       <require Tcompiler="GCC"/>
1409     </condition>
1410     <condition id="CM33_NODSP_SP_GCC">
1411       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1412       <require condition="CM33_NODSP_SP"/>
1413       <require Tcompiler="GCC"/>
1414     </condition>
1415     <condition id="CM33_DSP_SP_GCC">
1416       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1417       <require condition="CM33_DSP_SP"/>
1418       <require Tcompiler="GCC"/>
1419     </condition>
1420     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1421       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1422       <require condition="CM33_NODSP_NOFPU_GCC"/>
1423       <require Dendian="Little-endian"/>
1424     </condition>
1425     <condition id="CM33_DSP_NOFPU_LE_GCC">
1426       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1427       <require condition="CM33_DSP_NOFPU_GCC"/>
1428       <require Dendian="Little-endian"/>
1429     </condition>
1430     <condition id="CM33_NODSP_SP_LE_GCC">
1431       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1432       <require condition="CM33_NODSP_SP_GCC"/>
1433       <require Dendian="Little-endian"/>
1434     </condition>
1435     <condition id="CM33_DSP_SP_LE_GCC">
1436       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1437       <require condition="CM33_DSP_SP_GCC"/>
1438       <require Dendian="Little-endian"/>
1439     </condition>
1440
1441     <condition id="ARMv8MBL_GCC">
1442       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1443       <require condition="ARMv8MBL"/>
1444       <require Tcompiler="GCC"/>
1445     </condition>
1446     <condition id="ARMv8MBL_LE_GCC">
1447       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1448       <require condition="ARMv8MBL_GCC"/>
1449       <require Dendian="Little-endian"/>
1450     </condition>
1451     <condition id="ARMv8MBL_BE_GCC">
1452       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1453       <require condition="ARMv8MBL_GCC"/>
1454       <require Dendian="Big-endian"/>
1455     </condition>
1456
1457     <condition id="ARMv8MML_GCC">
1458       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1459       <require condition="ARMv8MML"/>
1460       <require Tcompiler="GCC"/>
1461     </condition>
1462     <condition id="ARMv8MML_LE_GCC">
1463       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1464       <require condition="ARMv8MML_GCC"/>
1465       <require Dendian="Little-endian"/>
1466     </condition>
1467     <condition id="ARMv8MML_BE_GCC">
1468       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1469       <require condition="ARMv8MML_GCC"/>
1470       <require Dendian="Big-endian"/>
1471     </condition>
1472
1473     <condition id="ARMv8MML_FP_GCC">
1474       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1475       <require condition="ARMv8MML_FP"/>
1476       <require Tcompiler="GCC"/>
1477     </condition>
1478     <condition id="ARMv8MML_FP_LE_GCC">
1479       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1480       <require condition="ARMv8MML_FP_GCC"/>
1481       <require Dendian="Little-endian"/>
1482     </condition>
1483     <condition id="ARMv8MML_FP_BE_GCC">
1484       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1485       <require condition="ARMv8MML_FP_GCC"/>
1486       <require Dendian="Big-endian"/>
1487     </condition>
1488
1489     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1490       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1491       <require condition="ARMv8MML_NODSP_NOFPU"/>
1492       <require Tcompiler="GCC"/>
1493     </condition>
1494     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1495       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1496       <require condition="ARMv8MML_DSP_NOFPU"/>
1497       <require Tcompiler="GCC"/>
1498     </condition>
1499     <condition id="ARMv8MML_NODSP_SP_GCC">
1500       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1501       <require condition="ARMv8MML_NODSP_SP"/>
1502       <require Tcompiler="GCC"/>
1503     </condition>
1504     <condition id="ARMv8MML_DSP_SP_GCC">
1505       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1506       <require condition="ARMv8MML_DSP_SP"/>
1507       <require Tcompiler="GCC"/>
1508     </condition>
1509     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1510       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1511       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1512       <require Dendian="Little-endian"/>
1513     </condition>
1514     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1515       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1516       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1517       <require Dendian="Little-endian"/>
1518     </condition>
1519     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1520       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1521       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1522       <require Dendian="Little-endian"/>
1523     </condition>
1524     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1525       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1526       <require condition="ARMv8MML_DSP_SP_GCC"/>
1527       <require Dendian="Little-endian"/>
1528     </condition>
1529
1530     <!-- IAR compiler -->
1531     <condition id="CA_IAR">
1532       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1533       <require condition="ARMv7-A Device"/>
1534       <require Tcompiler="IAR"/>
1535     </condition>
1536
1537     <condition id="CM0_IAR">
1538       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1539       <require condition="CM0"/>
1540       <require Tcompiler="IAR"/>
1541     </condition>
1542     <condition id="CM0_LE_IAR">
1543       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1544       <require condition="CM0_IAR"/>
1545       <require Dendian="Little-endian"/>
1546     </condition>
1547     <condition id="CM0_BE_IAR">
1548       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1549       <require condition="CM0_IAR"/>
1550       <require Dendian="Big-endian"/>
1551     </condition>
1552
1553     <condition id="CM3_IAR">
1554       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1555       <require condition="CM3"/>
1556       <require Tcompiler="IAR"/>
1557     </condition>
1558     <condition id="CM3_LE_IAR">
1559       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1560       <require condition="CM3_IAR"/>
1561       <require Dendian="Little-endian"/>
1562     </condition>
1563     <condition id="CM3_BE_IAR">
1564       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1565       <require condition="CM3_IAR"/>
1566       <require Dendian="Big-endian"/>
1567     </condition>
1568
1569     <condition id="CM4_IAR">
1570       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1571       <require condition="CM4"/>
1572       <require Tcompiler="IAR"/>
1573     </condition>
1574     <condition id="CM4_LE_IAR">
1575       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1576       <require condition="CM4_IAR"/>
1577       <require Dendian="Little-endian"/>
1578     </condition>
1579     <condition id="CM4_BE_IAR">
1580       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1581       <require condition="CM4_IAR"/>
1582       <require Dendian="Big-endian"/>
1583     </condition>
1584
1585     <condition id="CM4_FP_IAR">
1586       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1587       <require condition="CM4_FP"/>
1588       <require Tcompiler="IAR"/>
1589     </condition>
1590     <condition id="CM4_FP_LE_IAR">
1591       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1592       <require condition="CM4_FP_IAR"/>
1593       <require Dendian="Little-endian"/>
1594     </condition>
1595     <condition id="CM4_FP_BE_IAR">
1596       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1597       <require condition="CM4_FP_IAR"/>
1598       <require Dendian="Big-endian"/>
1599     </condition>
1600
1601     <condition id="CM7_IAR">
1602       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1603       <require condition="CM7"/>
1604       <require Tcompiler="IAR"/>
1605     </condition>
1606     <condition id="CM7_LE_IAR">
1607       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1608       <require condition="CM7_IAR"/>
1609       <require Dendian="Little-endian"/>
1610     </condition>
1611     <condition id="CM7_BE_IAR">
1612       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1613       <require condition="CM7_IAR"/>
1614       <require Dendian="Big-endian"/>
1615     </condition>
1616
1617     <condition id="CM7_FP_IAR">
1618       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1619       <require condition="CM7_FP"/>
1620       <require Tcompiler="IAR"/>
1621     </condition>
1622     <condition id="CM7_FP_LE_IAR">
1623       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1624       <require condition="CM7_FP_IAR"/>
1625       <require Dendian="Little-endian"/>
1626     </condition>
1627     <condition id="CM7_FP_BE_IAR">
1628       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1629       <require condition="CM7_FP_IAR"/>
1630       <require Dendian="Big-endian"/>
1631     </condition>
1632
1633     <condition id="CM7_SP_IAR">
1634       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1635       <require condition="CM7_SP"/>
1636       <require Tcompiler="IAR"/>
1637     </condition>
1638     <condition id="CM7_SP_LE_IAR">
1639       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1640       <require condition="CM7_SP_IAR"/>
1641       <require Dendian="Little-endian"/>
1642     </condition>
1643     <condition id="CM7_SP_BE_IAR">
1644       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1645       <require condition="CM7_SP_IAR"/>
1646       <require Dendian="Big-endian"/>
1647     </condition>
1648
1649     <condition id="CM7_DP_IAR">
1650       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1651       <require condition="CM7_DP"/>
1652       <require Tcompiler="IAR"/>
1653     </condition>
1654     <condition id="CM7_DP_LE_IAR">
1655       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1656       <require condition="CM7_DP_IAR"/>
1657       <require Dendian="Little-endian"/>
1658     </condition>
1659     <condition id="CM7_DP_BE_IAR">
1660       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1661       <require condition="CM7_DP_IAR"/>
1662       <require Dendian="Big-endian"/>
1663     </condition>
1664
1665     <!-- conditions selecting single devices and CMSIS Core -->
1666     <!-- used for component startup, GCC version is used for C-Startup -->
1667     <condition id="ARMCM0 CMSIS">
1668       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1669       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1670       <require Cclass="CMSIS" Cgroup="CORE"/>
1671     </condition>
1672     <condition id="ARMCM0 CMSIS GCC">
1673       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1674       <require condition="ARMCM0 CMSIS"/>
1675       <require condition="GCC"/>
1676     </condition>
1677
1678     <condition id="ARMCM0+ CMSIS">
1679       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1680       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1681       <require Cclass="CMSIS" Cgroup="CORE"/>
1682     </condition>
1683     <condition id="ARMCM0+ CMSIS GCC">
1684       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1685       <require condition="ARMCM0+ CMSIS"/>
1686       <require condition="GCC"/>
1687     </condition>
1688
1689     <condition id="ARMCM3 CMSIS">
1690       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1691       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1692       <require Cclass="CMSIS" Cgroup="CORE"/>
1693     </condition>
1694     <condition id="ARMCM3 CMSIS GCC">
1695       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1696       <require condition="ARMCM3 CMSIS"/>
1697       <require condition="GCC"/>
1698     </condition>
1699
1700     <condition id="ARMCM4 CMSIS">
1701       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1702       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1703       <require Cclass="CMSIS" Cgroup="CORE"/>
1704     </condition>
1705     <condition id="ARMCM4 CMSIS GCC">
1706       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1707       <require condition="ARMCM4 CMSIS"/>
1708       <require condition="GCC"/>
1709     </condition>
1710
1711     <condition id="ARMCM7 CMSIS">
1712       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1713       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1714       <require Cclass="CMSIS" Cgroup="CORE"/>
1715     </condition>
1716     <condition id="ARMCM7 CMSIS GCC">
1717       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1718       <require condition="ARMCM7 CMSIS"/>
1719       <require condition="GCC"/>
1720     </condition>
1721
1722     <condition id="ARMCM23 CMSIS">
1723       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1724       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1725       <require Cclass="CMSIS" Cgroup="CORE"/>
1726     </condition>
1727     <condition id="ARMCM23 CMSIS GCC">
1728       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1729       <require condition="ARMCM23 CMSIS"/>
1730       <require condition="GCC"/>
1731     </condition>
1732
1733     <condition id="ARMCM33 CMSIS">
1734       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1735       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1736       <require Cclass="CMSIS" Cgroup="CORE"/>
1737     </condition>
1738     <condition id="ARMCM33 CMSIS GCC">
1739       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1740       <require condition="ARMCM33 CMSIS"/>
1741       <require condition="GCC"/>
1742     </condition>
1743
1744     <condition id="ARMSC000 CMSIS">
1745       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1746       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1747       <require Cclass="CMSIS" Cgroup="CORE"/>
1748     </condition>
1749     <condition id="ARMSC000 CMSIS GCC">
1750       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1751       <require condition="ARMSC000 CMSIS"/>
1752       <require condition="GCC"/>
1753     </condition>
1754
1755     <condition id="ARMSC300 CMSIS">
1756       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1757       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1758       <require Cclass="CMSIS" Cgroup="CORE"/>
1759     </condition>
1760     <condition id="ARMSC300 CMSIS GCC">
1761       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1762       <require condition="ARMSC300 CMSIS"/>
1763       <require condition="GCC"/>
1764     </condition>
1765
1766     <condition id="ARMv8MBL CMSIS">
1767       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1768       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1769       <require Cclass="CMSIS" Cgroup="CORE"/>
1770     </condition>
1771     <condition id="ARMv8MBL CMSIS GCC">
1772       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1773       <require condition="ARMv8MBL CMSIS"/>
1774       <require condition="GCC"/>
1775     </condition>
1776
1777     <condition id="ARMv8MML CMSIS">
1778       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1779       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1780       <require Cclass="CMSIS" Cgroup="CORE"/>
1781     </condition>
1782     <condition id="ARMv8MML CMSIS GCC">
1783       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1784       <require condition="ARMv8MML CMSIS"/>
1785       <require condition="GCC"/>
1786     </condition>
1787
1788     <condition id="ARMCA5 CMSIS">
1789       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1790       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1791       <require Cclass="CMSIS" Cgroup="CORE"/>
1792     </condition>
1793
1794     <condition id="ARMCA7 CMSIS">
1795       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1796       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1797       <require Cclass="CMSIS" Cgroup="CORE"/>
1798     </condition>
1799
1800     <condition id="ARMCA9 CMSIS">
1801       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1802       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1803       <require Cclass="CMSIS" Cgroup="CORE"/>
1804     </condition>
1805
1806     <!-- CMSIS DSP -->
1807     <condition id="CMSIS DSP">
1808       <description>Components required for DSP</description>
1809       <require condition="ARMv6_7_8-M Device"/>
1810       <require condition="ARMCC GCC"/>
1811       <require Cclass="CMSIS" Cgroup="CORE"/>
1812     </condition>
1813
1814     <!-- RTOS RTX -->
1815     <condition id="RTOS RTX">
1816       <description>Components required for RTOS RTX</description>
1817       <require condition="ARMv6_7-M Device"/>
1818       <require condition="ARMCC GCC IAR"/>
1819       <require Cclass="Device" Cgroup="Startup"/>
1820       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1821     </condition>
1822     <condition id="RTOS RTX IFX">
1823       <description>Components required for RTOS RTX IFX</description>
1824       <require condition="ARMv6_7-M Device"/>
1825       <require condition="ARMCC GCC IAR"/>
1826       <require Dvendor="Infineon:7" Dname="XMC4*"/>
1827       <require Cclass="Device" Cgroup="Startup"/>
1828       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1829     </condition>
1830     <condition id="RTOS RTX5">
1831       <description>Components required for RTOS RTX5</description>
1832       <require condition="ARMv6_7_8-M Device"/>
1833       <require condition="ARMCC GCC IAR"/>
1834       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1835     </condition>
1836     <condition id="RTOS2 RTX5">
1837       <description>Components required for RTOS2 RTX5</description>
1838       <require condition="ARMv6_7_8-M Device"/>
1839       <require condition="ARMCC GCC IAR"/>
1840       <require Cclass="CMSIS"  Cgroup="CORE"/>
1841       <require Cclass="Device" Cgroup="Startup"/>
1842     </condition>
1843     <condition id="RTOS2 RTX5 v7-A">
1844       <description>Components required for RTOS2 RTX5 v7-A</description>
1845       <require condition="ARMv7-A Device"/>
1846       <require condition="ARMCC GCC IAR"/>
1847       <require Cclass="CMSIS"  Cgroup="CORE"/>
1848       <require Cclass="Device" Cgroup="Startup"/>
1849       <require Cclass="Device" Cgroup="OS Tick"/>
1850       <require Cclass="Device" Cgroup="IRQ Controller"/>
1851     </condition>
1852     <condition id="RTOS2 RTX5 Lib">
1853       <description>Components required for RTOS2 RTX5 Library</description>
1854       <require condition="ARMv6_7_8-M Device"/>
1855       <require condition="ARMCC GCC IAR"/>
1856       <require Cclass="CMSIS"  Cgroup="CORE"/>
1857       <require Cclass="Device" Cgroup="Startup"/>
1858     </condition>
1859     <condition id="RTOS2 RTX5 NS">
1860       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1861       <require condition="ARMv8-M TZ Device"/>
1862       <require condition="ARMCC GCC"/>
1863       <require Cclass="CMSIS"  Cgroup="CORE"/>
1864       <require Cclass="Device" Cgroup="Startup"/>
1865     </condition>
1866
1867     <!-- OS Tick -->
1868     <condition id="OS Tick PTIM">
1869       <description>Components required for OS Tick Private Timer</description>
1870       <require condition="CA5_CA9"/>
1871       <require Cclass="Device" Cgroup="IRQ Controller"/>
1872     </condition>
1873
1874     <condition id="OS Tick GTIM">
1875       <description>Components required for OS Tick Generic Physical Timer</description>
1876       <require condition="CA7"/>
1877       <require Cclass="Device" Cgroup="IRQ Controller"/>
1878     </condition>
1879
1880   </conditions>
1881
1882   <components>
1883     <!-- CMSIS-Core component -->
1884     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2"  condition="ARMv6_7_8-M Device" >
1885       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1886       <files>
1887         <!-- CPU independent -->
1888         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1889         <file category="include" name="CMSIS/Include/"/>
1890         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1891         <!-- Code template -->
1892         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1893         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1894       </files>
1895     </component>
1896
1897     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.1"  condition="ARMv7-A Device" >
1898       <description>CMSIS-CORE for Cortex-A</description>
1899       <files>
1900         <!-- CPU independent -->
1901         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1902         <file category="include" name="CMSIS/Core_A/Include/"/>
1903       </files>
1904     </component>
1905
1906     <!-- CMSIS-Startup components -->
1907     <!-- Cortex-M0 -->
1908     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1909       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1910       <files>
1911         <!-- include folder / device header file -->
1912         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1913         <!-- startup / system file -->
1914         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1915         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1916         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1917         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1918         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1919       </files>
1920     </component>
1921     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1922       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1923       <files>
1924         <!-- include folder / device header file -->
1925         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1926         <!-- startup / system file -->
1927         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1928         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1929         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1930       </files>
1931     </component>
1932
1933     <!-- Cortex-M0+ -->
1934     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1935       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1936       <files>
1937         <!-- include folder / device header file -->
1938         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1939         <!-- startup / system file -->
1940         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1941         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1942         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1943         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1944         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1945       </files>
1946     </component>
1947     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1948       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1949       <files>
1950         <!-- include folder / device header file -->
1951         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1952         <!-- startup / system file -->
1953         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1954         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1955         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1956       </files>
1957     </component>
1958
1959     <!-- Cortex-M3 -->
1960     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1961       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1962       <files>
1963         <!-- include folder / device header file -->
1964         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1965         <!-- startup / system file -->
1966         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1967         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1968         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1969         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1970         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1971       </files>
1972     </component>
1973     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1974       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1975       <files>
1976         <!-- include folder / device header file -->
1977         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1978         <!-- startup / system file -->
1979         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1980         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1981         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1982       </files>
1983     </component>
1984
1985     <!-- Cortex-M4 -->
1986     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1987       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1988       <files>
1989         <!-- include folder / device header file -->
1990         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1991         <!-- startup / system file -->
1992         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1993         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1994         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1995         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1996         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1997       </files>
1998     </component>
1999     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2000       <description>System and Startup for Generic ARM Cortex-M4 device</description>
2001       <files>
2002         <!-- include folder / device header file -->
2003         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2004         <!-- startup / system file -->
2005         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2006         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2007         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2008       </files>
2009     </component>
2010
2011     <!-- Cortex-M7 -->
2012     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2013       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2014       <files>
2015         <!-- include folder / device header file -->
2016         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2017         <!-- startup / system file -->
2018         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2019         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2020         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2021         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2022         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2023       </files>
2024     </component>
2025     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2026       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2027       <files>
2028         <!-- include folder / device header file -->
2029         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2030         <!-- startup / system file -->
2031         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2032         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2033         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2034       </files>
2035     </component>
2036
2037     <!-- Cortex-M23 -->
2038     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2039       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2040       <files>
2041         <!-- include folder / device header file -->
2042         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2043         <!-- startup / system file -->
2044         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2045         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2046         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2047         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2048         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2049         <!-- SAU configuration -->
2050         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2051       </files>
2052     </component>
2053     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2054       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2055       <files>
2056         <!-- include folder / device header file -->
2057         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2058         <!-- startup / system file -->
2059         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2060         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2061         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2062         <!-- SAU configuration -->
2063         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2064       </files>
2065     </component>
2066
2067     <!-- Cortex-M33 -->
2068     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2069       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2070       <files>
2071         <!-- include folder / device header file -->
2072         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2073         <!-- startup / system file -->
2074         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2075         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2076         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2077         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2078         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2079         <!-- SAU configuration -->
2080         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2081       </files>
2082     </component>
2083     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2084       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2085       <files>
2086         <!-- include folder / device header file -->
2087         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2088         <!-- startup / system file -->
2089         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2090         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2091         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2092         <!-- SAU configuration -->
2093         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2094       </files>
2095     </component>
2096
2097     <!-- Cortex-SC000 -->
2098     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2099       <description>System and Startup for Generic ARM SC000 device</description>
2100       <files>
2101         <!-- include folder / device header file -->
2102         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2103         <!-- startup / system file -->
2104         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2105         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2106         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2107         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2108         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2109       </files>
2110     </component>
2111     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2112       <description>System and Startup for Generic ARM SC000 device</description>
2113       <files>
2114         <!-- include folder / device header file -->
2115         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2116         <!-- startup / system file -->
2117         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2118         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2119         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2120       </files>
2121     </component>
2122
2123     <!-- Cortex-SC300 -->
2124     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2125       <description>System and Startup for Generic ARM SC300 device</description>
2126       <files>
2127         <!-- include folder / device header file -->
2128         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2129         <!-- startup / system file -->
2130         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2131         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2132         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2133         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2134         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2135       </files>
2136     </component>
2137     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2138       <description>System and Startup for Generic ARM SC300 device</description>
2139       <files>
2140         <!-- include folder / device header file -->
2141         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2142         <!-- startup / system file -->
2143         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2144         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2145         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2146       </files>
2147     </component>
2148
2149     <!-- ARMv8MBL -->
2150     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2151       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2152       <files>
2153         <!-- include folder / device header file -->
2154         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2155         <!-- startup / system file -->
2156         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2157         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2158         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2159         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2160         <!-- SAU configuration -->
2161         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2162       </files>
2163     </component>
2164     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2165       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2166       <files>
2167         <!-- include folder / device header file -->
2168         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2169         <!-- startup / system file -->
2170         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2171         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2172         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2173         <!-- SAU configuration -->
2174         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2175       </files>
2176     </component>
2177
2178     <!-- ARMv8MML -->
2179     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2180       <description>System and Startup for Generic ARM ARMv8MML device</description>
2181       <files>
2182         <!-- include folder / device header file -->
2183         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2184         <!-- startup / system file -->
2185         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2186         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2187         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2188         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2189         <!-- SAU configuration -->
2190         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2191       </files>
2192     </component>
2193     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2194       <description>System and Startup for Generic ARM ARMv8MML device</description>
2195       <files>
2196         <!-- include folder / device header file -->
2197         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2198         <!-- startup / system file -->
2199         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2200         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2201         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2202         <!-- SAU configuration -->
2203         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2204       </files>
2205     </component>
2206
2207     <!-- Cortex-A5 -->
2208     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2209       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2210       <files>
2211         <!-- include folder / device header file -->
2212         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2213         <!-- startup / system / mmu files -->
2214         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2215         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2216         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2217         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2218         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2219         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2220         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2221         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2222         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2223         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2224
2225       </files>
2226     </component>
2227
2228     <!-- Cortex-A7 -->
2229     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2230       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2231       <files>
2232         <!-- include folder / device header file -->
2233         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2234         <!-- startup / system / mmu files -->
2235         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2236         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2237         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2238         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2239         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2240         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2241         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2242         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2243         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2244         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2245       </files>
2246     </component>
2247
2248     <!-- Cortex-A9 -->
2249     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2250       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2251       <files>
2252         <!-- include folder / device header file -->
2253         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2254         <!-- startup / system / mmu files -->
2255         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2256         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2257         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2258         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2259         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2260         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2261         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2262         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2263         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2264         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2265       </files>
2266     </component>
2267
2268     <!-- IRQ Controller -->
2269     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2270       <description>IRQ Controller implementation using GIC</description>
2271       <files>
2272         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2273       </files>
2274     </component>
2275
2276     <!-- OS Tick -->
2277     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
2278       <description>OS Tick implementation using Private Timer</description>
2279       <files>
2280         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2281       </files>
2282     </component>
2283
2284     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2285       <description>OS Tick implementation using Generic Physical Timer</description>
2286       <files>
2287         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2288       </files>
2289     </component>
2290
2291     <!-- CMSIS-DSP component -->
2292     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2293       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2294       <files>
2295         <!-- CPU independent -->
2296         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2297         <file category="header" name="CMSIS/Include/arm_math.h"/>
2298
2299         <!-- CPU and Compiler dependent -->
2300         <!-- ARMCC -->
2301         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2302         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2303         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2304         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2305         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2306         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2307         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2308         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2309         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2310         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2311         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2312         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2313         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2314         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2315
2316         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2317         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2318         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2319         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2320         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2321         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2322         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2323         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2324         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2325         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2326         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2327         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2328
2329         <!-- GCC -->
2330         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2331         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2332         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2333         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2334         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2335         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2336         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2337
2338         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2339         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2340         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2341         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2342         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2343         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2344         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2345         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2346         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2347         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2348         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2349         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2350
2351       </files>
2352     </component>
2353
2354     <!-- CMSIS-RTOS Keil RTX component -->
2355     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2356       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2357       <RTE_Components_h>
2358         <!-- the following content goes into file 'RTE_Components.h' -->
2359         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2360         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2361       </RTE_Components_h>
2362       <files>
2363         <!-- CPU independent -->
2364         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2365         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2366         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2367
2368         <!-- RTX templates -->
2369         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2370         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2371         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2372         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2373         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2374         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2375         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2376         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2377         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2378         <!-- tool-chain specific template file -->
2379         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2380         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2381         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2382
2383         <!-- CPU and Compiler dependent -->
2384         <!-- ARMCC -->
2385         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2386         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2387         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2388         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2389         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2390         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2391         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2392         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2393         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2394         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2395         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2396         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2397         <!-- GCC -->
2398         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2399         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2400         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2401         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2402         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2403         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2404         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2405         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2406         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2407         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2408         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2409         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2410         <!-- IAR -->
2411         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2412         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2413         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2414         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2415         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2416         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2417         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2418         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2419         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2420         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2421         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2422         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2423       </files>
2424     </component>
2425     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2426     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2427       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2428       <RTE_Components_h>
2429         <!-- the following content goes into file 'RTE_Components.h' -->
2430         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2431         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2432       </RTE_Components_h>
2433       <files>
2434         <!-- CPU independent -->
2435         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2436         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2437         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2438
2439         <!-- RTX templates -->
2440         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2441         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2442         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2443         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2444         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2445         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2446         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2447         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2448         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2449         <!-- tool-chain specific template file -->
2450         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2451         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2452         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2453
2454         <!-- CPU and Compiler dependent -->
2455         <!-- ARMCC -->
2456         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2457         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2458         <!-- GCC -->
2459         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2460         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2461         <!-- IAR -->
2462       </files>
2463     </component>
2464
2465     <!-- CMSIS-RTOS Keil RTX5 component -->
2466     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.3" Capiversion="1.0.0" condition="RTOS RTX5">
2467       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2468       <RTE_Components_h>
2469         <!-- the following content goes into file 'RTE_Components.h' -->
2470         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2471         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2472       </RTE_Components_h>
2473       <files>
2474         <!-- RTX header file -->
2475         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2476         <!-- RTX compatibility module for API V1 -->
2477         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2478       </files>
2479     </component>
2480
2481     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2482     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.3" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
2483       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2484       <RTE_Components_h>
2485         <!-- the following content goes into file 'RTE_Components.h' -->
2486         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2487         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2488       </RTE_Components_h>
2489       <files>
2490         <!-- RTX documentation -->
2491         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2492
2493         <!-- RTX header files -->
2494         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2495
2496         <!-- RTX configuration -->
2497         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2498         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2499
2500         <!-- RTX templates -->
2501         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2502         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2503         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2504         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2505         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2506         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2507         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2508         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2509         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2510         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2511
2512         <!-- RTX library configuration -->
2513         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2514
2515         <!-- RTX libraries (CPU and Compiler dependent) -->
2516         <!-- ARMCC -->
2517         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2518         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2519         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2520         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2521         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2522         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2523         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2524         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2525         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2526         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2527         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2528         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2529         <!-- GCC -->
2530         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2531         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2532         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2533         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2534         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2535         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2536         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2537         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2538         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2539         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2540         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2541         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2542         <!-- IAR -->
2543         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2544         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2545         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2546         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2547         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2548         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2549       </files>
2550     </component>
2551     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.3" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2552       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2553       <RTE_Components_h>
2554         <!-- the following content goes into file 'RTE_Components.h' -->
2555         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2556         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2557         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2558       </RTE_Components_h>
2559       <files>
2560         <!-- RTX documentation -->
2561         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2562
2563         <!-- RTX header files -->
2564         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2565
2566         <!-- RTX configuration -->
2567         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2568         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2569
2570         <!-- RTX templates -->
2571         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2572         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2573         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2574         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2575         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2576         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2577         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2578         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2579         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2580         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2581
2582         <!-- RTX library configuration -->
2583         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2584
2585         <!-- RTX libraries (CPU and Compiler dependent) -->
2586         <!-- ARMCC -->
2587         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2588         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2589         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2590         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2591         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2592         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2593         <!-- GCC -->
2594         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2595         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2596         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2597         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2598         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2599         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2600       </files>
2601     </component>
2602     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.1" condition="RTOS2 RTX5">
2603       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2604       <RTE_Components_h>
2605         <!-- the following content goes into file 'RTE_Components.h' -->
2606         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2607         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2608         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2609       </RTE_Components_h>
2610       <files>
2611         <!-- RTX documentation -->
2612         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2613
2614         <!-- RTX header files -->
2615         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2616
2617         <!-- RTX configuration -->
2618         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2619         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2620
2621         <!-- RTX templates -->
2622         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2623         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2624         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2625         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2626         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2627         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2628         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2629         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2630         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2631         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2632
2633         <!-- RTX sources (core) -->
2634         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2635         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2636         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2637         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2638         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2639         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2640         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2641         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2642         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2643         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2644         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2645         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2646         <!-- RTX sources (library configuration) -->
2647         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2648         <!-- RTX sources (handlers ARMCC) -->
2649         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2650         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2651         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2652         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2653         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2654         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2655         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2656         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2657         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2658         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2659         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2660         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2661         <!-- RTX sources (handlers GCC) -->
2662         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2663         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2664         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2665         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2666         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2667         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2668         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2669         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2670         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2671         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2672         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2673         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2674         <!-- RTX sources (handlers IAR) -->
2675         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2676         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2677         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2678         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2679         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2680         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2681         <!-- OS Tick (SysTick) -->
2682         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2683       </files>
2684     </component>
2685     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
2686       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2687       <RTE_Components_h>
2688         <!-- the following content goes into file 'RTE_Components.h' -->
2689         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2690         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2691         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2692       </RTE_Components_h>
2693       <files>
2694         <!-- RTX documentation -->
2695         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2696
2697         <!-- RTX header files -->
2698         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2699
2700         <!-- RTX configuration -->
2701         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2702         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2703
2704         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2705
2706         <!-- RTX templates -->
2707         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2708         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2709         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2710         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2711         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2712         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2713         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2714         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2715         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2716         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2717
2718         <!-- RTX sources (core) -->
2719         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2720         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2721         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2722         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2724         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2725         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2726         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2727         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2728         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2729         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2730         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2731         <!-- RTX sources (library configuration) -->
2732         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2733         <!-- RTX sources (handlers ARMCC) -->
2734         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2735         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2736         <!-- RTX sources (handlers GCC) -->
2737         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2738         <!-- RTX sources (handlers IAR) -->
2739         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2740       </files>
2741     </component>
2742     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.3" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2743       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2744       <RTE_Components_h>
2745         <!-- the following content goes into file 'RTE_Components.h' -->
2746         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2747         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2748         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2749         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2750       </RTE_Components_h>
2751       <files>
2752         <!-- RTX documentation -->
2753         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2754
2755         <!-- RTX header files -->
2756         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2757
2758         <!-- RTX configuration -->
2759         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2760         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2761
2762         <!-- RTX templates -->
2763         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2764         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2765         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2766         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2767         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2768         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2769         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2770         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2771         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2772         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2773
2774         <!-- RTX sources (core) -->
2775         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2776         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2777         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2778         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2779         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2780         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2781         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2782         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2783         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2784         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2785         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2786         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2787         <!-- RTX sources (library configuration) -->
2788         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2789         <!-- RTX sources (ARMCC handlers) -->
2790         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2791         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2792         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2793         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2794         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2795         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2796         <!-- RTX sources (GCC handlers) -->
2797         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2798         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2799         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2800         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2801         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2802         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2803         <!-- OS Tick (SysTick) -->
2804         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2805       </files>
2806     </component>
2807
2808   </components>
2809
2810   <boards>
2811     <board name="uVision Simulator" vendor="Keil">
2812       <description>uVision Simulator</description>
2813       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2814       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2815       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
2816       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2817       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2818       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2819       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2820       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2821       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2822       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2823       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2824       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2825       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2826       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2827       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2828       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2829       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2830       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2831       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2832     </board>
2833
2834     <board name="Fixed Virtual Platform" vendor="ARM">
2835       <description>Fixed Virtual Platform</description>
2836       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
2837       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
2838       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
2839     </board>
2840   </boards>
2841
2842   <examples>
2843     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2844       <description>DSP_Lib Class Marks example</description>
2845       <board name="uVision Simulator" vendor="Keil"/>
2846       <project>
2847         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2848       </project>
2849       <attributes>
2850         <component Cclass="CMSIS" Cgroup="CORE"/>
2851         <component Cclass="CMSIS" Cgroup="DSP"/>
2852         <component Cclass="Device" Cgroup="Startup"/>
2853         <category>Getting Started</category>
2854       </attributes>
2855     </example>
2856
2857     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2858       <description>DSP_Lib Convolution example</description>
2859       <board name="uVision Simulator" vendor="Keil"/>
2860       <project>
2861         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2862       </project>
2863       <attributes>
2864         <component Cclass="CMSIS" Cgroup="CORE"/>
2865         <component Cclass="CMSIS" Cgroup="DSP"/>
2866         <component Cclass="Device" Cgroup="Startup"/>
2867         <category>Getting Started</category>
2868       </attributes>
2869     </example>
2870
2871     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2872       <description>DSP_Lib Dotproduct example</description>
2873       <board name="uVision Simulator" vendor="Keil"/>
2874       <project>
2875         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2876       </project>
2877       <attributes>
2878         <component Cclass="CMSIS" Cgroup="CORE"/>
2879         <component Cclass="CMSIS" Cgroup="DSP"/>
2880         <component Cclass="Device" Cgroup="Startup"/>
2881         <category>Getting Started</category>
2882       </attributes>
2883     </example>
2884
2885     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2886       <description>DSP_Lib FFT Bin example</description>
2887       <board name="uVision Simulator" vendor="Keil"/>
2888       <project>
2889         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2890       </project>
2891       <attributes>
2892         <component Cclass="CMSIS" Cgroup="CORE"/>
2893         <component Cclass="CMSIS" Cgroup="DSP"/>
2894         <component Cclass="Device" Cgroup="Startup"/>
2895         <category>Getting Started</category>
2896       </attributes>
2897     </example>
2898
2899     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2900       <description>DSP_Lib FIR example</description>
2901       <board name="uVision Simulator" vendor="Keil"/>
2902       <project>
2903         <environment name="uv" load="arm_fir_example.uvprojx"/>
2904       </project>
2905       <attributes>
2906         <component Cclass="CMSIS" Cgroup="CORE"/>
2907         <component Cclass="CMSIS" Cgroup="DSP"/>
2908         <component Cclass="Device" Cgroup="Startup"/>
2909         <category>Getting Started</category>
2910       </attributes>
2911     </example>
2912
2913     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2914       <description>DSP_Lib Graphic Equalizer example</description>
2915       <board name="uVision Simulator" vendor="Keil"/>
2916       <project>
2917         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2918       </project>
2919       <attributes>
2920         <component Cclass="CMSIS" Cgroup="CORE"/>
2921         <component Cclass="CMSIS" Cgroup="DSP"/>
2922         <component Cclass="Device" Cgroup="Startup"/>
2923         <category>Getting Started</category>
2924       </attributes>
2925     </example>
2926
2927     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2928       <description>DSP_Lib Linear Interpolation example</description>
2929       <board name="uVision Simulator" vendor="Keil"/>
2930       <project>
2931         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2932       </project>
2933       <attributes>
2934         <component Cclass="CMSIS" Cgroup="CORE"/>
2935         <component Cclass="CMSIS" Cgroup="DSP"/>
2936         <component Cclass="Device" Cgroup="Startup"/>
2937         <category>Getting Started</category>
2938       </attributes>
2939     </example>
2940
2941     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2942       <description>DSP_Lib Matrix example</description>
2943       <board name="uVision Simulator" vendor="Keil"/>
2944       <project>
2945         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2946       </project>
2947       <attributes>
2948         <component Cclass="CMSIS" Cgroup="CORE"/>
2949         <component Cclass="CMSIS" Cgroup="DSP"/>
2950         <component Cclass="Device" Cgroup="Startup"/>
2951         <category>Getting Started</category>
2952       </attributes>
2953     </example>
2954
2955     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2956       <description>DSP_Lib Signal Convergence example</description>
2957       <board name="uVision Simulator" vendor="Keil"/>
2958       <project>
2959         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2960       </project>
2961       <attributes>
2962         <component Cclass="CMSIS" Cgroup="CORE"/>
2963         <component Cclass="CMSIS" Cgroup="DSP"/>
2964         <component Cclass="Device" Cgroup="Startup"/>
2965         <category>Getting Started</category>
2966       </attributes>
2967     </example>
2968
2969     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2970       <description>DSP_Lib Sinus/Cosinus example</description>
2971       <board name="uVision Simulator" vendor="Keil"/>
2972       <project>
2973         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2974       </project>
2975       <attributes>
2976         <component Cclass="CMSIS" Cgroup="CORE"/>
2977         <component Cclass="CMSIS" Cgroup="DSP"/>
2978         <component Cclass="Device" Cgroup="Startup"/>
2979         <category>Getting Started</category>
2980       </attributes>
2981     </example>
2982
2983     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2984       <description>DSP_Lib Variance example</description>
2985       <board name="uVision Simulator" vendor="Keil"/>
2986       <project>
2987         <environment name="uv" load="arm_variance_example.uvprojx"/>
2988       </project>
2989       <attributes>
2990         <component Cclass="CMSIS" Cgroup="CORE"/>
2991         <component Cclass="CMSIS" Cgroup="DSP"/>
2992         <component Cclass="Device" Cgroup="Startup"/>
2993         <category>Getting Started</category>
2994       </attributes>
2995     </example>
2996
2997     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2998       <description>CMSIS-RTOS2 Blinky example</description>
2999       <board name="uVision Simulator" vendor="Keil"/>
3000       <project>
3001         <environment name="uv" load="Blinky.uvprojx"/>
3002       </project>
3003       <attributes>
3004         <component Cclass="CMSIS" Cgroup="CORE"/>
3005         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3006         <component Cclass="Device" Cgroup="Startup"/>
3007         <category>Getting Started</category>
3008       </attributes>
3009     </example>
3010
3011     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3012       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3013       <board name="uVision Simulator" vendor="Keil"/>
3014       <project>
3015         <environment name="uv" load="Blinky.uvprojx"/>
3016       </project>
3017       <attributes>
3018         <component Cclass="CMSIS" Cgroup="CORE"/>
3019         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3020         <component Cclass="Device" Cgroup="Startup"/>
3021         <category>Getting Started</category>
3022       </attributes>
3023     </example>
3024
3025     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3026       <description>CMSIS-RTOS2 Message Queue Example</description>
3027       <board name="uVision Simulator" vendor="Keil"/>
3028       <project>
3029         <environment name="uv" load="MsqQueue.uvprojx"/>
3030       </project>
3031       <attributes>
3032         <component Cclass="CMSIS" Cgroup="CORE"/>
3033         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3034         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3035         <component Cclass="Device" Cgroup="Startup"/>
3036         <category>Getting Started</category>
3037       </attributes>
3038     </example>
3039
3040     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3041       <description>CMSIS-RTOS2 Memory Pool Example</description>
3042       <board name="Fixed Virtual Platform" vendor="ARM"/>
3043       <project>
3044         <environment name="uv" load="MemPool.uvprojx"/>
3045       </project>
3046       <attributes>
3047         <component Cclass="CMSIS" Cgroup="CORE"/>
3048         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3049         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3050         <component Cclass="Device" Cgroup="Startup"/>
3051         <category>Getting Started</category>
3052       </attributes>
3053     </example>
3054
3055     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3056       <description>Bare-metal secure/non-secure example without RTOS</description>
3057       <board name="uVision Simulator" vendor="Keil"/>
3058       <project>
3059         <environment name="uv" load="NoRTOS.uvmpw"/>
3060       </project>
3061       <attributes>
3062         <component Cclass="CMSIS" Cgroup="CORE"/>
3063         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3064         <component Cclass="Device" Cgroup="Startup"/>
3065         <category>Getting Started</category>
3066       </attributes>
3067     </example>
3068
3069     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3070       <description>Secure/non-secure RTOS example with thread context management</description>
3071       <board name="uVision Simulator" vendor="Keil"/>
3072       <project>
3073         <environment name="uv" load="RTOS.uvmpw"/>
3074       </project>
3075       <attributes>
3076         <component Cclass="CMSIS" Cgroup="CORE"/>
3077         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3078         <component Cclass="Device" Cgroup="Startup"/>
3079         <category>Getting Started</category>
3080       </attributes>
3081     </example>
3082
3083     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3084       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3085       <board name="uVision Simulator" vendor="Keil"/>
3086       <project>
3087         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3088       </project>
3089       <attributes>
3090         <component Cclass="CMSIS" Cgroup="CORE"/>
3091         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3092         <component Cclass="Device" Cgroup="Startup"/>
3093         <category>Getting Started</category>
3094       </attributes>
3095     </example>
3096
3097   </examples>
3098
3099 </package>