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  43    <div id="projectname">CMSIS-Core (Cortex-A)
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  52    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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 129 <a href="#nested-classes">Data Structures</a>  </div>
 130   <div class="headertitle"><div class="title">Current Program Status Register (CPSR)<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a></div></div></div>
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 133
 134 <p>The Current Program Status Register (CPSR) holds processor status and control information.
 135 <a href="#details">More...</a></p>
 136 <table class="memberdecls">
 137 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="groups" name="groups"></a>
 138 Content</h2></td></tr>
 139 <tr class="memitem:group__CMSIS__CPSR__BITS"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html">CPSR Bits</a></td></tr>
 140 <tr class="memdesc:group__CMSIS__CPSR__BITS"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit position and mask macros. <br /></td></tr>
 141 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 142 <tr class="memitem:group__CMSIS__CPSR__M"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__M.html">CPSR M field values</a></td></tr>
 143 <tr class="memdesc:group__CMSIS__CPSR__M"><td class="mdescLeft">&#160;</td><td class="mdescRight">Valid values for CPSR M field. <br /></td></tr>
 144 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 145 </table><table class="memberdecls">
 146 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
 147 Data Structures</h2></td></tr>
 148 <tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionCPSR__Type.html">CPSR_Type</a></td></tr>
 149 <tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit field declaration for CPSR layout.  <a href="unionCPSR__Type.html#details">More...</a><br /></td></tr>
 150 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 151 </table>
 152 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 153 <p>The Current Program Status Register (CPSR) holds processor status and control information. </p>
 154 <p>The individual register bits have the following meaning:</p>
 155 <table class="markdownTable">
 156 <tr class="markdownTableHead">
 157 <th class="markdownTableHeadLeft">Bits   </th><th class="markdownTableHeadLeft">Name   </th><th class="markdownTableHeadLeft">Function    </th></tr>
 158 <tr class="markdownTableRowOdd">
 159 <td class="markdownTableBodyLeft">[31]   </td><td class="markdownTableBodyLeft">N   </td><td class="markdownTableBodyLeft">Negative condition code flag    </td></tr>
 160 <tr class="markdownTableRowEven">
 161 <td class="markdownTableBodyLeft">[30]   </td><td class="markdownTableBodyLeft">Z   </td><td class="markdownTableBodyLeft">Zero condition code flag    </td></tr>
 162 <tr class="markdownTableRowOdd">
 163 <td class="markdownTableBodyLeft">[29]   </td><td class="markdownTableBodyLeft">C   </td><td class="markdownTableBodyLeft">Carry condition code flag    </td></tr>
 164 <tr class="markdownTableRowEven">
 165 <td class="markdownTableBodyLeft">[28]   </td><td class="markdownTableBodyLeft">V   </td><td class="markdownTableBodyLeft">Overflow condition code flag    </td></tr>
 166 <tr class="markdownTableRowOdd">
 167 <td class="markdownTableBodyLeft">[27]   </td><td class="markdownTableBodyLeft">Q   </td><td class="markdownTableBodyLeft">Cumulative saturation bit    </td></tr>
 168 <tr class="markdownTableRowEven">
 169 <td class="markdownTableBodyLeft">[26:25]   </td><td class="markdownTableBodyLeft">IT[1:0]   </td><td class="markdownTableBodyLeft">If-Then execution state bits for the Thumb IT (If-Then) instruction    </td></tr>
 170 <tr class="markdownTableRowOdd">
 171 <td class="markdownTableBodyLeft">[24]   </td><td class="markdownTableBodyLeft">J   </td><td class="markdownTableBodyLeft">Jazelle bit    </td></tr>
 172 <tr class="markdownTableRowEven">
 173 <td class="markdownTableBodyLeft">[19:16]   </td><td class="markdownTableBodyLeft">GE   </td><td class="markdownTableBodyLeft">Greater than or Equal flags    </td></tr>
 174 <tr class="markdownTableRowOdd">
 175 <td class="markdownTableBodyLeft">[15:10]   </td><td class="markdownTableBodyLeft">IT[7:2]   </td><td class="markdownTableBodyLeft">If-Then execution state bits for the Thumb IT (If-Then) instruction    </td></tr>
 176 <tr class="markdownTableRowEven">
 177 <td class="markdownTableBodyLeft">[9]   </td><td class="markdownTableBodyLeft">E   </td><td class="markdownTableBodyLeft">Endianness execution state bit: 0 - Little-endian, 1 - Big-endian    </td></tr>
 178 <tr class="markdownTableRowOdd">
 179 <td class="markdownTableBodyLeft">[8]   </td><td class="markdownTableBodyLeft">A   </td><td class="markdownTableBodyLeft">Asynchronous abort mask bit    </td></tr>
 180 <tr class="markdownTableRowEven">
 181 <td class="markdownTableBodyLeft">[7]   </td><td class="markdownTableBodyLeft">I   </td><td class="markdownTableBodyLeft">IRQ mask bit    </td></tr>
 182 <tr class="markdownTableRowOdd">
 183 <td class="markdownTableBodyLeft">[6]   </td><td class="markdownTableBodyLeft">F   </td><td class="markdownTableBodyLeft">FIRQ mask bit    </td></tr>
 184 <tr class="markdownTableRowEven">
 185 <td class="markdownTableBodyLeft">[5]   </td><td class="markdownTableBodyLeft">T   </td><td class="markdownTableBodyLeft">Thumb execution state bit    </td></tr>
 186 <tr class="markdownTableRowOdd">
 187 <td class="markdownTableBodyLeft">[4:0]   </td><td class="markdownTableBodyLeft">M   </td><td class="markdownTableBodyLeft"><a class="el" href="group__CMSIS__CPSR__M.html">Mode field</a>   </td></tr>
 188 </table>
 189 <p>Consider using <a class="el" href="group__CMSIS__Core__RegAccFunctions.html#gaa4bddbd2091b8fb234ae43d290e69e78">__get_CPSR</a> and <a class="el" href="group__CMSIS__Core__RegAccFunctions.html#ga48f0cfea7413b74bd90986762383c1cd">__set_CPSR</a> for accessing this register. </p>
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