begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Common Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.8.1">
  12       Active development ...
  13       CMSIS-DSP: 1.10.0 (see revision history for details)
  14       CMSIS-NN: 3.1.0 (see revision history for details)
  15        - Support for int16 convolution and fully connected for reference implementation
  16        - Support for DSP extension optimization for int16 convolution and fully connected
  17        - Support dilation for int8 convolution
  18        - Support dilation for int8 depthwise convolution
  19        - Support for int16 depthwise conv for reference implementation including dilation
  20        - Support for int16 average and max pooling for reference implementation
  21       CMSIS-RTOS2:
  22         - RTX 5.5.4 (see revision history for details)
  23     </release>
  24     <release version="5.8.0" date="2021-06-24">
  25       CMSIS-Core(M): 5.5.0 (see revision history for details)
  26         - Updated GCC LinkerDescription, GCC Assembler startup
  27         - Added Armv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  28         - Changed C-Startup to default Startup.
  29         - Updated Armv8-M Assembler startup to use GAS syntax
  30           Note: Updating existing projects may need manual user interaction!
  31       CMSIS-Core(A): 1.2.1 (see revision history for details)
  32         - Bugfixes for Cortex-A32
  33       CMSIS-DAP: 2.1.0 (see revision history for details)
  34         - Enhanced DAP_Info
  35         - Added extra UART support
  36       CMSIS-DSP: 1.9.0 (see revision history for details)
  37         - Purged pre-built libs from Git
  38         - Enhanced support for f16 datatype
  39         - Fixed couple of GCC issues
  40       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  41         - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  42         - Added optimization for SVDF kernel
  43         - Improved MVE performance for fully Connected and max pool operator
  44         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  45         - Expanded existing unit test suite along with support for FVP
  46         - Removed Examples folder
  47       CMSIS-RTOS2:
  48         - RTX 5.5.3 (see revision history for details)
  49           - CVE-2021-27431 vulnerability mitigation.
  50           - Enhanced stack overrun checking.
  51           - Various bug fixes and improvements.
  52       CMSIS-Pack: 1.7.2 (see revision history for details)
  53         - Support for Microchip XC32 compiler
  54         - Support for Custom Datapath Extension
  55     </release>
  56     <release version="5.7.0" date="2020-04-09">
  57       CMSIS-Build: 0.9.0 (beta)
  58         - Draft for CMSIS Project description (CPRJ)
  59       CMSIS-Core(M): 5.4.0 (see revision history for details)
  60         - Cortex-M55 cpu support
  61         - Enhanced MVE support for Armv8.1-MML
  62         - Fixed device config define checks.
  63         - L1 Cache functions for Armv7-M and later
  64       CMSIS-Core(A): 1.2.0 (see revision history for details)
  65         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  66         - Added missing DSP intrinsics
  67         - Reworked assembly intrinsics: volatile, barriers and clobber
  68       CMSIS-DSP: 1.8.0 (see revision history for details)
  69         - Added new functions and function groups
  70         - Added MVE support
  71       CMSIS-NN: 1.3.0 (see revision history for details)
  72         - Added MVE support
  73         - Further optimizations for kernels using DSP extension
  74       CMSIS-RTOS2:
  75         - RTX 5.5.2 (see revision history for details)
  76       CMSIS-Driver: 2.8.0
  77         - Added VIO API 0.1.0 (Preview)
  78         - removed volatile from status related typedefs in APIs
  79         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  80       CMSIS-Pack: 1.6.3 (see revision history for details)
  81         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  82       Devices:
  83         - ARMCM55 device
  84         - ARMv81MML startup code recognizing __MVE_USED macro
  85         - Refactored vector table references for all Cortex-M devices
  86         - Reworked ARMCM* C-StartUp files.
  87         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  88       Utilities:
  89         Attention: Linux binaries moved to Linux64 folder!
  90         - SVDConv 3.3.35
  91         - PackChk 1.3.89
  92     </release>
  93     <release version="5.6.0" date="2019-07-10">
  94       CMSIS-Core(M): 5.3.0 (see revision history for details)
  95         - Added provisions for compiler-independent C startup code.
  96       CMSIS-Core(A): 1.1.4 (see revision history for details)
  97         - Fixed __FPU_Enable.
  98       CMSIS-DSP: 1.7.0 (see revision history for details)
  99         - New Neon versions of f32 functions
 100         - Python wrapper
 101         - Preliminary cmake build
 102         - Compilation flags for FFTs
 103         - Changes to arm_math.h
 104       CMSIS-NN: 1.2.0 (see revision history for details)
 105         - New function for depthwise convolution with asymmetric quantization.
 106         - New support functions for requantization.
 107       CMSIS-RTOS:
 108         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
 109       CMSIS-RTOS2:
 110         - RTX 5.5.1 (see revision history for details)
 111       CMSIS-Driver: 2.7.1
 112         - WiFi Interface API 1.0.0
 113       Devices:
 114         - Generalized C startup code for all Cortex-M family devices.
 115         - Updated Cortex-A default memory regions and MMU configurations
 116         - Moved Cortex-A memory and system config files to avoid include path issues
 117     </release>
 118     <release version="5.5.1" date="2019-03-20">
 119       The following folders are deprecated
 120         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 121
 122       CMSIS-Core(M): 5.2.1 (see revision history for details)
 123         - Fixed compilation issue in cmsis_armclang_ltm.h
 124     </release>
 125     <release version="5.5.0" date="2019-03-18">
 126       The following folders have been removed:
 127         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 128         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 129       The following folders are deprecated
 130         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 131
 132       CMSIS-Core(M): 5.2.0 (see revision history for details)
 133         - Reworked Stack/Heap configuration for ARM startup files.
 134         - Added Cortex-M35P device support.
 135         - Added generic Armv8.1-M Mainline device support.
 136       CMSIS-Core(A): 1.1.3 (see revision history for details)
 137       CMSIS-DSP: 1.6.0 (see revision history for details)
 138         - reworked DSP library source files
 139         - reworked DSP library documentation
 140         - Changed DSP folder structure
 141         - moved DSP libraries to folder ./DSP/Lib
 142         - ARM DSP Libraries are built with ARMCLANG
 143         - Added DSP Libraries Source variant
 144       CMSIS-RTOS2:
 145         - RTX 5.5.0 (see revision history for details)
 146       CMSIS-Driver: 2.7.0
 147         - Added WiFi Interface API 1.0.0-beta
 148         - Added components for project specific driver implementations
 149       CMSIS-Pack: 1.6.0 (see revision history for details)
 150       Devices:
 151         - Added Cortex-M35P and ARMv81MML device templates.
 152         - Fixed C-Startup Code for GCC (aligned with other compilers)
 153       Utilities:
 154         - SVDConv 3.3.25
 155         - PackChk 1.3.82
 156     </release>
 157     <release version="5.4.0" date="2018-08-01">
 158       Aligned pack structure with repository.
 159       The following folders are deprecated:
 160         - CMSIS/Include/
 161         - CMSIS/DSP_Lib/
 162
 163       CMSIS-Core(M): 5.1.2 (see revision history for details)
 164         - Added Cortex-M1 support (beta).
 165       CMSIS-Core(A): 1.1.2 (see revision history for details)
 166       CMSIS-NN: 1.1.0
 167         - Added new math functions.
 168       CMSIS-RTOS2:
 169         - API 2.1.3 (see revision history for details)
 170         - RTX 5.4.0 (see revision history for details)
 171           * Updated exception handling on Cortex-A
 172       CMSIS-Driver:
 173         - Flash Driver API V2.2.0
 174       Utilities:
 175         - SVDConv 3.3.21
 176         - PackChk 1.3.71
 177     </release>
 178     <release version="5.3.0" date="2018-02-22">
 179       Updated Arm company brand.
 180       CMSIS-Core(M): 5.1.1 (see revision history for details)
 181       CMSIS-Core(A): 1.1.1 (see revision history for details)
 182       CMSIS-DAP: 2.0.0 (see revision history for details)
 183       CMSIS-NN: 1.0.0
 184         - Initial contribution of the bare metal Neural Network Library.
 185       CMSIS-RTOS2:
 186         - RTX 5.3.0 (see revision history for details)
 187         - OS Tick API 1.0.1
 188     </release>
 189     <release version="5.2.0" date="2017-11-16">
 190       CMSIS-Core(M): 5.1.0 (see revision history for details)
 191         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 192         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 193       CMSIS-Core(A): 1.1.0 (see revision history for details)
 194         - Added compiler_iccarm.h.
 195         - Added additional access functions for physical timer.
 196       CMSIS-DAP: 1.2.0 (see revision history for details)
 197       CMSIS-DSP: 1.5.2 (see revision history for details)
 198       CMSIS-Driver: 2.6.0 (see revision history for details)
 199         - CAN Driver API V1.2.0
 200         - NAND Driver API V2.3.0
 201       CMSIS-RTOS:
 202         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 203       CMSIS-RTOS2:
 204         - API 2.1.2 (see revision history for details)
 205         - RTX 5.2.3 (see revision history for details)
 206       Devices:
 207         - Added GCC startup and linker script for Cortex-A9.
 208         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 209         - Added IAR startup code for Cortex-A9
 210     </release>
 211     <release version="5.1.1" date="2017-09-19">
 212       CMSIS-RTOS2:
 213       - RTX 5.2.1 (see revision history for details)
 214     </release>
 215     <release version="5.1.0" date="2017-08-04">
 216       CMSIS-Core(M): 5.0.2 (see revision history for details)
 217       - Changed Version Control macros to be core agnostic.
 218       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 219       CMSIS-Core(A): 1.0.0 (see revision history for details)
 220       - Initial release
 221       - IRQ Controller API 1.0.0
 222       CMSIS-Driver: 2.05 (see revision history for details)
 223       - All typedefs related to status have been made volatile.
 224       CMSIS-RTOS2:
 225       - API 2.1.1 (see revision history for details)
 226       - RTX 5.2.0 (see revision history for details)
 227       - OS Tick API 1.0.0
 228       CMSIS-DSP: 1.5.2 (see revision history for details)
 229       - Fixed GNU Compiler specific diagnostics.
 230       CMSIS-Pack: 1.5.0 (see revision history for details)
 231       - added System Description File (*.SDF) Format
 232       CMSIS-Zone: 0.0.1 (Preview)
 233       - Initial specification draft
 234     </release>
 235     <release version="5.0.1" date="2017-02-03">
 236       Package Description:
 237       - added taxonomy for Cclass RTOS
 238       CMSIS-RTOS2:
 239       - API 2.1   (see revision history for details)
 240       - RTX 5.1.0 (see revision history for details)
 241       CMSIS-Core: 5.0.1 (see revision history for details)
 242       - Added __PACKED_STRUCT macro
 243       - Added uVisior support
 244       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 245       - Updated template for secure main function (main_s.c)
 246       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 247       CMSIS-DSP: 1.5.1 (see revision history for details)
 248       - added ARMv8M DSP libraries.
 249       CMSIS-Pack:1.4.9 (see revision history for details)
 250       - added Pack Index File specification and schema file
 251     </release>
 252     <release version="5.0.0" date="2016-11-11">
 253       Changed open source license to Apache 2.0
 254       CMSIS_Core:
 255        - Added support for Cortex-M23 and Cortex-M33.
 256        - Added ARMv8-M device configurations for mainline and baseline.
 257        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 258        - Added cmsis_compiler.h to unify compiler behaviour.
 259        - Updated function SCB_EnableICache (for Cortex-M7).
 260        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 261       CMSIS-RTOS:
 262         - bug fix in RTX 4.82 (see revision history for details)
 263       CMSIS-RTOS2:
 264         - new API including compatibility layer to CMSIS-RTOS
 265         - reference implementation based on RTX5
 266         - supports all Cortex-M variants including TrustZone for ARMv8-M
 267       CMSIS-SVD:
 268        - reworked SVD format documentation
 269        - removed SVD file database documentation as SVD files are distributed in packs
 270        - updated SVDConv for Win32 and Linux
 271       CMSIS-DSP:
 272        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 273        - Added DSP libraries build projects to CMSIS pack.
 274     </release>
 275     <release version="4.5.0" date="2015-10-28">
 276       - CMSIS-Core     4.30.0  (see revision history for details)
 277       - CMSIS-DAP      1.1.0   (unchanged)
 278       - CMSIS-Driver   2.04.0  (see revision history for details)
 279       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 280       - CMSIS-Pack     1.4.1   (see revision history for details)
 281       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 282       - CMSIS-SVD      1.3.1   (see revision history for details)
 283     </release>
 284     <release version="4.4.0" date="2015-09-11">
 285       - CMSIS-Core     4.20   (see revision history for details)
 286       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 287       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 288       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 289       - CMSIS-RTOS
 290         -- API         1.02   (unchanged)
 291         -- RTX         4.79   (see revision history for details)
 292       - CMSIS-SVD      1.3.0  (see revision history for details)
 293       - CMSIS-DAP      1.1.0  (extended with SWO support)
 294     </release>
 295     <release version="4.3.0" date="2015-03-20">
 296       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 297       - CMSIS-DSP      1.4.5  (see revision history for details)
 298       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 299       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 300       - CMSIS-RTOS
 301         -- API         1.02   (unchanged)
 302         -- RTX         4.78   (see revision history for details)
 303       - CMSIS-SVD      1.2    (unchanged)
 304     </release>
 305     <release version="4.2.0" date="2014-09-24">
 306       Adding Cortex-M7 support
 307       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 308       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 309       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 310       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 311       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 312     </release>
 313     <release version="4.1.1" date="2014-06-30">
 314       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 315     </release>
 316     <release version="4.1.0" date="2014-06-12">
 317       - CMSIS-Driver   2.02  (incompatible update)
 318       - CMSIS-Pack     1.3   (see revision history for details)
 319       - CMSIS-DSP      1.4.2 (unchanged)
 320       - CMSIS-Core     3.30  (unchanged)
 321       - CMSIS-RTOS RTX 4.74  (unchanged)
 322       - CMSIS-RTOS API 1.02  (unchanged)
 323       - CMSIS-SVD      1.10  (unchanged)
 324       PACK:
 325       - removed G++ specific files from PACK
 326       - added Component Startup variant "C Startup"
 327       - added Pack Checking Utility
 328       - updated conditions to reflect tool-chain dependency
 329       - added Taxonomy for Graphics
 330       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 331     </release>
 332     <!-- release version="4.0.0">
 333       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 334       - CMSIS-Pack     1.1   Preliminary
 335       - CMSIS-DSP      1.4.2 (see revision history for details)
 336       - CMSIS-Core     3.30  (see revision history for details)
 337       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 338       - CMSIS-RTOS API 1.02  (unchanged)
 339       - CMSIS-SVD      1.10  (unchanged)
 340     </release -->
 341     <release version="3.20.4" date="2014-02-20">
 342       - CMSIS-RTOS 4.74 (see revision history for details)
 343       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 344     </release>
 345     <!-- release version="3.20.3">
 346       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 347       - CMSIS-RTOS 4.73 (see revision history for details)
 348     </release -->
 349     <!-- release version="3.20.2">
 350       - CMSIS-Pack documentation has been added
 351       - CMSIS-Drivers header and documentation have been added to PACK
 352       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 353     </release -->
 354     <!-- release version="3.20.1">
 355       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 356       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 357     </release -->
 358     <!-- release version="3.20.0">
 359       The software portions that are deployed in the application program are now under a BSD license which allows usage
 360       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 361       The individual components have been update as listed below:
 362       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 363       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 364       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 365       - CMSIS-SVD is unchanged.
 366     </release -->
 367   </releases>
 368
 369   <taxonomy>
 370     <description Cclass="Audio">Software components for audio processing</description>
 371     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 372     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 373     <description Cclass="Compiler">Compiler Software Extensions</description>
 374     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 375     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 376     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 377     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 378     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 379     <description Cclass="File System">File Drive Support and File System</description>
 380     <description Cclass="IoT Client">IoT cloud client connector</description>
 381     <description Cclass="IoT Service">IoT specific services</description>
 382     <description Cclass="IoT Utility">IoT specific software utility</description>
 383     <description Cclass="Graphics">Graphical User Interface</description>
 384     <description Cclass="Network">Network Stack using Internet Protocols</description>
 385     <description Cclass="RTOS">Real-time Operating System</description>
 386     <description Cclass="Security">Encryption for secure communication or storage</description>
 387     <description Cclass="USB">Universal Serial Bus Stack</description>
 388     <description Cclass="Utility">Generic software utility components</description>
 389   </taxonomy>
 390
 391   <devices>
 392     <!-- ******************************  Cortex-M0  ****************************** -->
 393     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 394       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 395       <description>
 396 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 397 - simple, easy-to-use programmers model
 398 - highly efficient ultra-low power operation
 399 - excellent code density
 400 - deterministic, high-performance interrupt handling
 401 - upward compatibility with the rest of the Cortex-M processor family.
 402       </description>
 403       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 404       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 405       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 406       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 407
 408       <device Dname="ARMCM0">
 409         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 410         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 411       </device>
 412     </family>
 413
 414     <!-- ******************************  Cortex-M0P  ****************************** -->
 415     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 416       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 417       <description>
 418 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 419 - simple, easy-to-use programmers model
 420 - highly efficient ultra-low power operation
 421 - excellent code density
 422 - deterministic, high-performance interrupt handling
 423 - upward compatibility with the rest of the Cortex-M processor family.
 424       </description>
 425       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 426       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 427       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 428       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 429
 430       <device Dname="ARMCM0P">
 431         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 432         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 433       </device>
 434
 435       <device Dname="ARMCM0P_MPU">
 436         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 437         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 438       </device>
 439     </family>
 440
 441     <!-- ******************************  Cortex-M1  ****************************** -->
 442     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 443       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 444       <description>
 445 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 446 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 447       </description>
 448       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 449       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 450       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 451       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 452
 453       <device Dname="ARMCM1">
 454         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 455         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 456       </device>
 457     </family>
 458
 459     <!-- ******************************  Cortex-M3  ****************************** -->
 460     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 461       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 462       <description>
 463 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 464 - simple, easy-to-use programmers model
 465 - highly efficient ultra-low power operation
 466 - excellent code density
 467 - deterministic, high-performance interrupt handling
 468 - upward compatibility with the rest of the Cortex-M processor family.
 469       </description>
 470       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 471       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 472       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 473       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 474
 475       <device Dname="ARMCM3">
 476         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 477         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 478       </device>
 479     </family>
 480
 481     <!-- ******************************  Cortex-M4  ****************************** -->
 482     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 483       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 484       <description>
 485 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 486 - simple, easy-to-use programmers model
 487 - highly efficient ultra-low power operation
 488 - excellent code density
 489 - deterministic, high-performance interrupt handling
 490 - upward compatibility with the rest of the Cortex-M processor family.
 491       </description>
 492       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 493       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 494       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 495       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 496
 497       <device Dname="ARMCM4">
 498         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 499         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 500       </device>
 501
 502       <device Dname="ARMCM4_FP">
 503         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 504         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 505       </device>
 506     </family>
 507
 508     <!-- ******************************  Cortex-M7  ****************************** -->
 509     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 510       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 511       <description>
 512 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 513 - simple, easy-to-use programmers model
 514 - highly efficient ultra-low power operation
 515 - excellent code density
 516 - deterministic, high-performance interrupt handling
 517 - upward compatibility with the rest of the Cortex-M processor family.
 518       </description>
 519       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 520       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 521       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 522       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 523
 524       <device Dname="ARMCM7">
 525         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 526         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 527       </device>
 528
 529       <device Dname="ARMCM7_SP">
 530         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 531         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 532       </device>
 533
 534       <device Dname="ARMCM7_DP">
 535         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 536         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 537       </device>
 538     </family>
 539
 540     <!-- ******************************  Cortex-M23  ********************** -->
 541     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 542       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 543       <description>
 544 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 545 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 546 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 547       </description>
 548       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 549       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 550       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 551       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 552       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 553       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 554
 555       <device Dname="ARMCM23">
 556         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 557         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 558       </device>
 559
 560       <device Dname="ARMCM23_TZ">
 561         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 562         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 563       </device>
 564     </family>
 565
 566     <!-- ******************************  Cortex-M33  ****************************** -->
 567     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 568       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 569       <description>
 570 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 571 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 572       </description>
 573       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 574       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 575       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 576       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 577       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 578       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 579
 580       <device Dname="ARMCM33">
 581         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 582         <description>
 583           no DSP Instructions, no Floating Point Unit, no TrustZone
 584         </description>
 585         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 586       </device>
 587
 588       <device Dname="ARMCM33_TZ">
 589         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 590         <description>
 591           no DSP Instructions, no Floating Point Unit, TrustZone
 592         </description>
 593         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 594       </device>
 595
 596       <device Dname="ARMCM33_DSP_FP">
 597         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 598         <description>
 599           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 600         </description>
 601         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 602       </device>
 603
 604       <device Dname="ARMCM33_DSP_FP_TZ">
 605         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 606         <description>
 607           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 608         </description>
 609         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 610       </device>
 611     </family>
 612
 613     <!-- ******************************  Cortex-M35P  ****************************** -->
 614     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 615       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 616       <description>
 617 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 618 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 619       </description>
 620
 621       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 622       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 623       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 624       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 625       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 626       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 627
 628       <device Dname="ARMCM35P">
 629         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 630         <description>
 631           no DSP Instructions, no Floating Point Unit, no TrustZone
 632         </description>
 633         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 634       </device>
 635
 636       <device Dname="ARMCM35P_TZ">
 637         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 638         <description>
 639           no DSP Instructions, no Floating Point Unit, TrustZone
 640         </description>
 641         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 642       </device>
 643
 644       <device Dname="ARMCM35P_DSP_FP">
 645         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 646         <description>
 647           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 648         </description>
 649         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 650       </device>
 651
 652       <device Dname="ARMCM35P_DSP_FP_TZ">
 653         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 654         <description>
 655           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 656         </description>
 657         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 658       </device>
 659     </family>
 660
 661     <!-- ******************************  Cortex-M55  ****************************** -->
 662     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 663       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 664       <description>
 665 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 666 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 667 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 668       </description>
 669
 670       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 671       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 672       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 673       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 674       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 675       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 676
 677       <device Dname="ARMCM55">
 678         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 679         <description>
 680           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 681         </description>
 682         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 683       </device>
 684     </family>
 685
 686     <!-- ******************************  ARMSC000  ****************************** -->
 687     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 688       <description>
 689 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 690 - simple, easy-to-use programmers model
 691 - highly efficient ultra-low power operation
 692 - excellent code density
 693 - deterministic, high-performance interrupt handling
 694       </description>
 695       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 696       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 697       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 698       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 699
 700       <device Dname="ARMSC000">
 701         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 702         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 703       </device>
 704     </family>
 705
 706     <!-- ******************************  ARMSC300  ****************************** -->
 707     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 708       <description>
 709 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 710 - simple, easy-to-use programmers model
 711 - highly efficient ultra-low power operation
 712 - excellent code density
 713 - deterministic, high-performance interrupt handling
 714       </description>
 715       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 716       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 717       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 718       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 719
 720       <device Dname="ARMSC300">
 721         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 722         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 723       </device>
 724     </family>
 725
 726     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 727     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 728       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 729       <description>
 730 Armv8-M Baseline based device with TrustZone
 731       </description>
 732       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 733       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 734       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 735       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 736       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 737       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 738
 739       <device Dname="ARMv8MBL">
 740         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 741         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 742       </device>
 743     </family>
 744
 745     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 746     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 747       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 748       <description>
 749 Armv8-M Mainline based device with TrustZone
 750       </description>
 751       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 752       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 753       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 754       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 755       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 756       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 757
 758       <device Dname="ARMv8MML">
 759         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 760         <description>
 761           no DSP Instructions, no Floating Point Unit, TrustZone
 762         </description>
 763         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 764       </device>
 765
 766       <device Dname="ARMv8MML_DSP">
 767         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 768         <description>
 769           DSP Instructions, no Floating Point Unit, TrustZone
 770         </description>
 771         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 772       </device>
 773
 774       <device Dname="ARMv8MML_SP">
 775         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 776         <description>
 777           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 778         </description>
 779         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 780       </device>
 781
 782       <device Dname="ARMv8MML_DSP_SP">
 783         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 784         <description>
 785           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 786         </description>
 787         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 788       </device>
 789
 790       <device Dname="ARMv8MML_DP">
 791         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 792         <description>
 793           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 794         </description>
 795         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 796       </device>
 797
 798       <device Dname="ARMv8MML_DSP_DP">
 799         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 800         <description>
 801           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 802         </description>
 803         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 804       </device>
 805     </family>
 806
 807     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 808     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 809       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 810       <description>
 811 Armv8.1-M Mainline based device with TrustZone and MVE
 812       </description>
 813       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 814       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 815       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 816       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 817       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 818       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 819
 820
 821       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 822         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 823         <description>
 824           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 825         </description>
 826         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 827       </device>
 828     </family>
 829
 830     <!-- ******************************  Cortex-A5  ****************************** -->
 831     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 832       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 833       <description>
 834 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 835 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 836 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 837       </description>
 838
 839       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 840       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 841       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 842       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 843
 844       <device Dname="ARMCA5">
 845         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 846         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 847       </device>
 848     </family>
 849
 850     <!-- ******************************  Cortex-A7  ****************************** -->
 851     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 852       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 853       <description>
 854 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 855 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 856 an optional integrated GIC, and an optional L2 cache controller.
 857       </description>
 858
 859       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 860       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 861       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 862       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 863
 864       <device Dname="ARMCA7">
 865         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 866         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 867       </device>
 868     </family>
 869
 870     <!-- ******************************  Cortex-A9  ****************************** -->
 871     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 872       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 873       <description>
 874 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 875 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 876 and 8-bit Java bytecodes in Jazelle state.
 877       </description>
 878
 879       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 880       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 881       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 882       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 883
 884       <device Dname="ARMCA9">
 885         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 886         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 887       </device>
 888     </family>
 889   </devices>
 890
 891
 892   <apis>
 893     <!-- CMSIS Device API -->
 894     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 895       <description>Device interrupt controller interface</description>
 896       <files>
 897         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 898       </files>
 899     </api>
 900     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 901       <description>RTOS Kernel system tick timer interface</description>
 902       <files>
 903         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 904       </files>
 905     </api>
 906     <!-- CMSIS-RTOS API -->
 907     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 908       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 909       <files>
 910         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 911       </files>
 912     </api>
 913     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 914       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 915       <files>
 916         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 917         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 918       </files>
 919     </api>
 920     <!-- CMSIS Driver API -->
 921     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 922       <description>USART Driver API for Cortex-M</description>
 923       <files>
 924         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 925         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 926       </files>
 927     </api>
 928     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 929       <description>SPI Driver API for Cortex-M</description>
 930       <files>
 931         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 932         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 933       </files>
 934     </api>
 935     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 936       <description>SAI Driver API for Cortex-M</description>
 937       <files>
 938         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 939         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 940       </files>
 941     </api>
 942     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 943       <description>I2C Driver API for Cortex-M</description>
 944       <files>
 945         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 946         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 947       </files>
 948     </api>
 949     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 950       <description>CAN Driver API for Cortex-M</description>
 951       <files>
 952         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 953         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 954       </files>
 955     </api>
 956     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 957       <description>Flash Driver API for Cortex-M</description>
 958       <files>
 959         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 960         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 961       </files>
 962     </api>
 963     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 964       <description>MCI Driver API for Cortex-M</description>
 965       <files>
 966         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 967         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 968       </files>
 969     </api>
 970     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 971       <description>NAND Flash Driver API for Cortex-M</description>
 972       <files>
 973         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 974         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 975       </files>
 976     </api>
 977     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 978       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 979       <files>
 980         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 981         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 982         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 983       </files>
 984     </api>
 985     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 986       <description>Ethernet MAC Driver API for Cortex-M</description>
 987       <files>
 988         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 989         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 990       </files>
 991     </api>
 992     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 993       <description>Ethernet PHY Driver API for Cortex-M</description>
 994       <files>
 995         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 996         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 997       </files>
 998     </api>
 999     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
1000       <description>USB Device Driver API for Cortex-M</description>
1001       <files>
1002         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
1003         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
1004       </files>
1005     </api>
1006     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
1007       <description>USB Host Driver API for Cortex-M</description>
1008       <files>
1009         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
1010         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
1011       </files>
1012     </api>
1013     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
1014       <description>WiFi driver</description>
1015       <files>
1016         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
1017         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
1018       </files>
1019     </api>
1020     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
1021       <description>Virtual I/O</description>
1022       <files>
1023         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1024         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1025         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1026       </files>
1027     </api>
1028   </apis>
1029
1030   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1031   <conditions>
1032     <!-- compiler -->
1033     <condition id="ARMCC6">
1034       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1035       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1036     </condition>
1037     <condition id="ARMCC5">
1038       <require Tcompiler="ARMCC" Toptions="AC5"/>
1039     </condition>
1040     <condition id="ARMCC">
1041       <require Tcompiler="ARMCC"/>
1042     </condition>
1043     <condition id="GCC">
1044       <require Tcompiler="GCC"/>
1045     </condition>
1046     <condition id="IAR">
1047       <require Tcompiler="IAR"/>
1048     </condition>
1049     <condition id="ARMCC GCC">
1050       <accept Tcompiler="ARMCC"/>
1051       <accept Tcompiler="GCC"/>
1052     </condition>
1053     <condition id="ARMCC GCC IAR">
1054       <accept Tcompiler="ARMCC"/>
1055       <accept Tcompiler="GCC"/>
1056       <accept Tcompiler="IAR"/>
1057     </condition>
1058
1059     <!-- Arm architecture -->
1060     <condition id="ARMv6-M Device">
1061       <description>Armv6-M architecture based device</description>
1062       <accept Dcore="Cortex-M0"/>
1063       <accept Dcore="Cortex-M1"/>
1064       <accept Dcore="Cortex-M0+"/>
1065       <accept Dcore="SC000"/>
1066     </condition>
1067     <condition id="ARMv7-M Device">
1068       <description>Armv7-M architecture based device</description>
1069       <accept Dcore="Cortex-M3"/>
1070       <accept Dcore="Cortex-M4"/>
1071       <accept Dcore="Cortex-M7"/>
1072       <accept Dcore="SC300"/>
1073     </condition>
1074     <condition id="ARMv8-M Device">
1075       <description>Armv8-M architecture based device</description>
1076       <accept Dcore="ARMV8MBL"/>
1077       <accept Dcore="ARMV8MML"/>
1078       <accept Dcore="ARMV81MML"/>
1079       <accept Dcore="Cortex-M23"/>
1080       <accept Dcore="Cortex-M33"/>
1081       <accept Dcore="Cortex-M35P"/>
1082       <accept Dcore="Cortex-M55"/>
1083     </condition>
1084     <condition id="ARMv6_7-M Device">
1085       <description>Armv6_7-M architecture based device</description>
1086       <accept condition="ARMv6-M Device"/>
1087       <accept condition="ARMv7-M Device"/>
1088     </condition>
1089     <condition id="ARMv6_7_8-M Device">
1090       <description>Armv6_7_8-M architecture based device</description>
1091       <accept condition="ARMv6-M Device"/>
1092       <accept condition="ARMv7-M Device"/>
1093       <accept condition="ARMv8-M Device"/>
1094     </condition>
1095     <condition id="ARMv7-A Device">
1096       <description>Armv7-A architecture based device</description>
1097       <accept Dcore="Cortex-A5"/>
1098       <accept Dcore="Cortex-A7"/>
1099       <accept Dcore="Cortex-A9"/>
1100     </condition>
1101
1102     <condition id="TrustZone">
1103       <description>TrustZone</description>
1104       <require Dtz="TZ"/>
1105     </condition>
1106     <condition id="TZ Secure">
1107       <description>TrustZone (Secure)</description>
1108       <require Dtz="TZ"/>
1109       <require Dsecure="Secure"/>
1110     </condition>
1111     <condition id="TZ Non-secure">
1112       <description>TrustZone (Non-secure)</description>
1113       <require Dtz="TZ"/>
1114       <accept Dsecure="Non-secure"/>
1115       <accept Dsecure="TZ-disabled"/>
1116     </condition>
1117     <condition id="TZ Unavailable">
1118       <description>TrustZone not available</description>
1119       <deny Dtz="TZ"/>
1120     </condition>
1121
1122     <!-- ARM core -->
1123     <condition id="CM0">
1124       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1125       <accept Dcore="Cortex-M0"/>
1126       <accept Dcore="Cortex-M0+"/>
1127       <accept Dcore="SC000"/>
1128     </condition>
1129     <condition id="CM1">
1130       <description>Cortex-M1</description>
1131       <require Dcore="Cortex-M1"/>
1132     </condition>
1133     <condition id="CM3">
1134       <description>Cortex-M3 or SC300 processor based device</description>
1135       <accept Dcore="Cortex-M3"/>
1136       <accept Dcore="SC300"/>
1137     </condition>
1138     <condition id="CM4">
1139       <description>Cortex-M4 processor based device</description>
1140       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1141     </condition>
1142     <condition id="CM4_FP">
1143       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1144       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1145       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1146       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1147     </condition>
1148     <condition id="CM7">
1149       <description>Cortex-M7 processor based device</description>
1150       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1151     </condition>
1152     <condition id="CM7_FP">
1153       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1154       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1155       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1156     </condition>
1157     <condition id="CM23">
1158       <description>Cortex-M23 processor based device</description>
1159       <require Dcore="Cortex-M23"/>
1160     </condition>
1161     <condition id="CM33">
1162       <description>Cortex-M33 processor based device</description>
1163       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1164     </condition>
1165     <condition id="CM33_FP">
1166       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1167       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1168     </condition>
1169     <condition id="CM35P">
1170       <description>Cortex-M35P processor based device</description>
1171       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1172     </condition>
1173     <condition id="CM35P_FP">
1174       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1175       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1176     </condition>
1177     <condition id="ARMv8MBL">
1178       <description>Armv8-M Baseline processor based device</description>
1179       <require Dcore="ARMV8MBL"/>
1180     </condition>
1181     <condition id="ARMv8MML">
1182       <description>Armv8-M Mainline processor based device</description>
1183       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1184     </condition>
1185     <condition id="ARMv8MML_FP">
1186       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1187       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1188       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1189     </condition>
1190
1191     <condition id="CM55_NOFPU_NOMVE">
1192       <description>Cortex-M55, no FPU, no MVE</description>
1193       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1194     </condition>
1195     <condition id="CM55_NOFPU_MVE">
1196       <description>Cortex-M55, no FPU, MVE</description>
1197       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1198       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1199     </condition>
1200     <condition id="CM55_FPU">
1201       <description>Cortex-M55, FPU</description>
1202       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1203       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1204     </condition>
1205
1206     <condition id="CA5_CA9">
1207       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1208       <accept Dcore="Cortex-A5"/>
1209       <accept Dcore="Cortex-A9"/>
1210     </condition>
1211
1212     <condition id="CA7">
1213       <description>Cortex-A7 processor based device</description>
1214       <accept Dcore="Cortex-A7"/>
1215     </condition>
1216
1217     <!-- ARMCC compiler -->
1218     <condition id="CA_ARMCC5">
1219       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1220       <require condition="ARMv7-A Device"/>
1221       <require condition="ARMCC5"/>
1222     </condition>
1223     <condition id="CA_ARMCC6">
1224       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1225       <require condition="ARMv7-A Device"/>
1226       <require condition="ARMCC6"/>
1227     </condition>
1228
1229     <condition id="CM0_ARMCC">
1230       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1231       <require condition="CM0"/>
1232       <require Tcompiler="ARMCC"/>
1233     </condition>
1234     <condition id="CM0_ARMCC5">
1235       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 5</description>
1236       <require condition="CM0"/>
1237       <require condition="ARMCC5"/>
1238     </condition>
1239     <condition id="CM0_ARMCC6">
1240       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 6</description>
1241       <require condition="CM0"/>
1242       <require condition="ARMCC6"/>
1243     </condition>
1244     <condition id="CM0_LE_ARMCC">
1245       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1246       <require condition="CM0_ARMCC"/>
1247       <require Dendian="Little-endian"/>
1248     </condition>
1249     <condition id="CM0_BE_ARMCC">
1250       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1251       <require condition="CM0_ARMCC"/>
1252       <require Dendian="Big-endian"/>
1253     </condition>
1254
1255     <condition id="CM1_ARMCC">
1256       <description>Cortex-M1 based device for the Arm Compiler</description>
1257       <require condition="CM1"/>
1258       <require Tcompiler="ARMCC"/>
1259     </condition>
1260     <condition id="CM1_ARMCC5">
1261       <description>Cortex-M1 based device for the Arm Compiler 5</description>
1262       <require condition="CM1"/>
1263       <require condition="ARMCC5"/>
1264     </condition>
1265     <condition id="CM1_ARMCC6">
1266       <description>Cortex-M1 based device for the Arm Compiler 6</description>
1267       <require condition="CM1"/>
1268       <require condition="ARMCC6"/>
1269     </condition>
1270     <condition id="CM1_LE_ARMCC">
1271       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1272       <require condition="CM1_ARMCC"/>
1273       <require Dendian="Little-endian"/>
1274     </condition>
1275     <condition id="CM1_BE_ARMCC">
1276       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1277       <require condition="CM1_ARMCC"/>
1278       <require Dendian="Big-endian"/>
1279     </condition>
1280
1281     <condition id="CM3_ARMCC">
1282       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1283       <require condition="CM3"/>
1284       <require Tcompiler="ARMCC"/>
1285     </condition>
1286     <condition id="CM3_ARMCC5">
1287       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 5</description>
1288       <require condition="CM3"/>
1289       <require condition="ARMCC5"/>
1290     </condition>
1291     <condition id="CM3_ARMCC6">
1292       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 6</description>
1293       <require condition="CM3"/>
1294       <require condition="ARMCC6"/>
1295     </condition>
1296     <condition id="CM3_LE_ARMCC">
1297       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1298       <require condition="CM3_ARMCC"/>
1299       <require Dendian="Little-endian"/>
1300     </condition>
1301     <condition id="CM3_BE_ARMCC">
1302       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1303       <require condition="CM3_ARMCC"/>
1304       <require Dendian="Big-endian"/>
1305     </condition>
1306
1307     <condition id="CM4_ARMCC">
1308       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1309       <require condition="CM4"/>
1310       <require Tcompiler="ARMCC"/>
1311     </condition>
1312     <condition id="CM4_ARMCC5">
1313       <description>Cortex-M4 processor based device for the Arm Compiler 5</description>
1314       <require condition="CM4"/>
1315       <require condition="ARMCC5"/>
1316     </condition>
1317     <condition id="CM4_ARMCC6">
1318       <description>Cortex-M4 processor based device for the Arm Compiler 6</description>
1319       <require condition="CM4"/>
1320       <require condition="ARMCC6"/>
1321     </condition>
1322     <condition id="CM4_LE_ARMCC">
1323       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1324       <require condition="CM4_ARMCC"/>
1325       <require Dendian="Little-endian"/>
1326     </condition>
1327     <condition id="CM4_BE_ARMCC">
1328       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1329       <require condition="CM4_ARMCC"/>
1330       <require Dendian="Big-endian"/>
1331     </condition>
1332
1333     <condition id="CM4_FP_ARMCC">
1334       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1335       <require condition="CM4_FP"/>
1336       <require Tcompiler="ARMCC"/>
1337     </condition>
1338     <condition id="CM4_FP_ARMCC5">
1339       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1340       <require condition="CM4_FP"/>
1341       <require condition="ARMCC5"/>
1342     </condition>
1343     <condition id="CM4_FP_ARMCC6">
1344       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1345       <require condition="CM4_FP"/>
1346       <require condition="ARMCC6"/>
1347     </condition>
1348     <condition id="CM4_FP_LE_ARMCC">
1349       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1350       <require condition="CM4_FP_ARMCC"/>
1351       <require Dendian="Little-endian"/>
1352     </condition>
1353     <condition id="CM4_FP_BE_ARMCC">
1354       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1355       <require condition="CM4_FP_ARMCC"/>
1356       <require Dendian="Big-endian"/>
1357     </condition>
1358
1359     <condition id="CM7_ARMCC">
1360       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1361       <require condition="CM7"/>
1362       <require Tcompiler="ARMCC"/>
1363     </condition>
1364     <condition id="CM7_ARMCC5">
1365       <description>Cortex-M7 processor based device for the Arm Compiler 5</description>
1366       <require condition="CM7"/>
1367       <require condition="ARMCC5"/>
1368     </condition>
1369     <condition id="CM7_ARMCC6">
1370       <description>Cortex-M7 processor based device for the Arm Compiler 6</description>
1371       <require condition="CM7"/>
1372       <require condition="ARMCC6"/>
1373     </condition>
1374     <condition id="CM7_LE_ARMCC">
1375       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1376       <require condition="CM7_ARMCC"/>
1377       <require Dendian="Little-endian"/>
1378     </condition>
1379     <condition id="CM7_BE_ARMCC">
1380       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1381       <require condition="CM7_ARMCC"/>
1382       <require Dendian="Big-endian"/>
1383     </condition>
1384
1385     <condition id="CM7_FP_ARMCC">
1386       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1387       <require condition="CM7_FP"/>
1388       <require Tcompiler="ARMCC"/>
1389     </condition>
1390     <condition id="CM7_FP_ARMCC5">
1391       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1392       <require condition="CM7_FP"/>
1393       <require condition="ARMCC5"/>
1394     </condition>
1395     <condition id="CM7_FP_ARMCC6">
1396       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1397       <require condition="CM7_FP"/>
1398       <require condition="ARMCC6"/>
1399     </condition>
1400     <condition id="CM7_FP_LE_ARMCC">
1401       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1402       <require condition="CM7_FP_ARMCC"/>
1403       <require Dendian="Little-endian"/>
1404     </condition>
1405     <condition id="CM7_FP_BE_ARMCC">
1406       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1407       <require condition="CM7_FP_ARMCC"/>
1408       <require Dendian="Big-endian"/>
1409     </condition>
1410
1411     <condition id="CM23_ARMCC">
1412       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1413       <require condition="CM23"/>
1414       <require Tcompiler="ARMCC"/>
1415     </condition>
1416     <condition id="CM23_LE_ARMCC">
1417       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1418       <require condition="CM23_ARMCC"/>
1419       <require Dendian="Little-endian"/>
1420     </condition>
1421
1422     <condition id="CM33_ARMCC">
1423       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1424       <require condition="CM33"/>
1425       <require Tcompiler="ARMCC"/>
1426     </condition>
1427     <condition id="CM33_LE_ARMCC">
1428       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1429       <require condition="CM33_ARMCC"/>
1430       <require Dendian="Little-endian"/>
1431     </condition>
1432
1433     <condition id="CM33_FP_ARMCC">
1434       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1435       <require condition="CM33_FP"/>
1436       <require Tcompiler="ARMCC"/>
1437     </condition>
1438     <condition id="CM33_FP_LE_ARMCC">
1439       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1440       <require condition="CM33_FP_ARMCC"/>
1441       <require Dendian="Little-endian"/>
1442     </condition>
1443
1444     <condition id="CM35P_ARMCC">
1445       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1446       <require condition="CM35P"/>
1447       <require Tcompiler="ARMCC"/>
1448     </condition>
1449     <condition id="CM35P_LE_ARMCC">
1450       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1451       <require condition="CM35P_ARMCC"/>
1452       <require Dendian="Little-endian"/>
1453     </condition>
1454
1455     <condition id="CM35P_FP_ARMCC">
1456       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1457       <require condition="CM35P_FP"/>
1458       <require Tcompiler="ARMCC"/>
1459     </condition>
1460     <condition id="CM35P_FP_LE_ARMCC">
1461       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1462       <require condition="CM35P_FP_ARMCC"/>
1463       <require Dendian="Little-endian"/>
1464     </condition>
1465
1466     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1467       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1468       <require condition="CM55_NOFPU_NOMVE"/>
1469       <require Tcompiler="ARMCC"/>
1470     </condition>
1471     <condition id="CM55_NOFPU_MVE_ARMCC">
1472       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1473       <require condition="CM55_NOFPU_MVE"/>
1474       <require Tcompiler="ARMCC"/>
1475     </condition>
1476     <condition id="CM55_FPU_ARMCC">
1477       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1478       <require condition="CM55_FPU"/>
1479       <require Tcompiler="ARMCC"/>
1480     </condition>
1481     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1482       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1483       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1484       <require Dendian="Little-endian"/>
1485     </condition>
1486     <condition id="CM55_FPU_LE_ARMCC">
1487       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1488       <require condition="CM55_FPU_ARMCC"/>
1489       <require Dendian="Little-endian"/>
1490     </condition>
1491
1492     <condition id="ARMv8MBL_ARMCC">
1493       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1494       <require condition="ARMv8MBL"/>
1495       <require Tcompiler="ARMCC"/>
1496     </condition>
1497     <condition id="ARMv8MBL_LE_ARMCC">
1498       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1499       <require condition="ARMv8MBL_ARMCC"/>
1500       <require Dendian="Little-endian"/>
1501     </condition>
1502
1503     <condition id="ARMv8MML_ARMCC">
1504       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1505       <require condition="ARMv8MML"/>
1506       <require Tcompiler="ARMCC"/>
1507     </condition>
1508     <condition id="ARMv8MML_LE_ARMCC">
1509       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1510       <require condition="ARMv8MML_ARMCC"/>
1511       <require Dendian="Little-endian"/>
1512     </condition>
1513
1514     <condition id="ARMv8MML_FP_ARMCC">
1515       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1516       <require condition="ARMv8MML_FP"/>
1517       <require Tcompiler="ARMCC"/>
1518     </condition>
1519     <condition id="ARMv8MML_FP_LE_ARMCC">
1520       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1521       <require condition="ARMv8MML_FP_ARMCC"/>
1522       <require Dendian="Little-endian"/>
1523     </condition>
1524
1525     <condition id="TZ Secure ARMCC6">
1526       <description>TrustZone (Secure), Arm Compiler</description>
1527       <require condition="TZ Secure"/>
1528       <require condition="ARMCC6"/>
1529     </condition>
1530     <condition id="TZ Non-secure ARMCC6">
1531       <description>TrustZone (Non-secure), Arm Compiler</description>
1532       <require condition="TZ Non-secure"/>
1533       <require condition="ARMCC6"/>
1534     </condition>
1535     <condition id="TZ Unavailable ARMCC6">
1536       <description>TrustZone not available, Arm Compiler</description>
1537       <require condition="TZ Unavailable"/>
1538       <require condition="ARMCC6"/>
1539     </condition>
1540
1541     <!-- GCC compiler -->
1542     <condition id="CA_GCC">
1543       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1544       <require condition="ARMv7-A Device"/>
1545       <require Tcompiler="GCC"/>
1546     </condition>
1547
1548     <condition id="CM0_GCC">
1549       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1550       <require condition="CM0"/>
1551       <require Tcompiler="GCC"/>
1552     </condition>
1553     <condition id="CM0_LE_GCC">
1554       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1555       <require condition="CM0_GCC"/>
1556       <require Dendian="Little-endian"/>
1557     </condition>
1558     <condition id="CM0_BE_GCC">
1559       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1560       <require condition="CM0_GCC"/>
1561       <require Dendian="Big-endian"/>
1562     </condition>
1563
1564     <condition id="CM1_GCC">
1565       <description>Cortex-M1 based device for the GCC Compiler</description>
1566       <require condition="CM1"/>
1567       <require Tcompiler="GCC"/>
1568     </condition>
1569     <condition id="CM1_LE_GCC">
1570       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1571       <require condition="CM1_GCC"/>
1572       <require Dendian="Little-endian"/>
1573     </condition>
1574     <condition id="CM1_BE_GCC">
1575       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1576       <require condition="CM1_GCC"/>
1577       <require Dendian="Big-endian"/>
1578     </condition>
1579
1580     <condition id="CM3_GCC">
1581       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1582       <require condition="CM3"/>
1583       <require Tcompiler="GCC"/>
1584     </condition>
1585     <condition id="CM3_LE_GCC">
1586       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1587       <require condition="CM3_GCC"/>
1588       <require Dendian="Little-endian"/>
1589     </condition>
1590     <condition id="CM3_BE_GCC">
1591       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1592       <require condition="CM3_GCC"/>
1593       <require Dendian="Big-endian"/>
1594     </condition>
1595
1596     <condition id="CM4_GCC">
1597       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1598       <require condition="CM4"/>
1599       <require Tcompiler="GCC"/>
1600     </condition>
1601     <condition id="CM4_LE_GCC">
1602       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1603       <require condition="CM4_GCC"/>
1604       <require Dendian="Little-endian"/>
1605     </condition>
1606     <condition id="CM4_BE_GCC">
1607       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1608       <require condition="CM4_GCC"/>
1609       <require Dendian="Big-endian"/>
1610     </condition>
1611
1612     <condition id="CM4_FP_GCC">
1613       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1614       <require condition="CM4_FP"/>
1615       <require Tcompiler="GCC"/>
1616     </condition>
1617     <condition id="CM4_FP_LE_GCC">
1618       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1619       <require condition="CM4_FP_GCC"/>
1620       <require Dendian="Little-endian"/>
1621     </condition>
1622     <condition id="CM4_FP_BE_GCC">
1623       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1624       <require condition="CM4_FP_GCC"/>
1625       <require Dendian="Big-endian"/>
1626     </condition>
1627
1628     <condition id="CM7_GCC">
1629       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1630       <require condition="CM7"/>
1631       <require Tcompiler="GCC"/>
1632     </condition>
1633     <condition id="CM7_LE_GCC">
1634       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1635       <require condition="CM7_GCC"/>
1636       <require Dendian="Little-endian"/>
1637     </condition>
1638     <condition id="CM7_BE_GCC">
1639       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1640       <require condition="CM7_GCC"/>
1641       <require Dendian="Big-endian"/>
1642     </condition>
1643
1644     <condition id="CM7_FP_GCC">
1645       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1646       <require condition="CM7_FP"/>
1647       <require Tcompiler="GCC"/>
1648     </condition>
1649     <condition id="CM7_FP_LE_GCC">
1650       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1651       <require condition="CM7_FP_GCC"/>
1652       <require Dendian="Little-endian"/>
1653     </condition>
1654     <condition id="CM7_FP_BE_GCC">
1655       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1656       <require condition="CM7_FP_GCC"/>
1657       <require Dendian="Big-endian"/>
1658     </condition>
1659
1660     <condition id="CM23_GCC">
1661       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1662       <require condition="CM23"/>
1663       <require Tcompiler="GCC"/>
1664     </condition>
1665     <condition id="CM23_LE_GCC">
1666       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1667       <require condition="CM23_GCC"/>
1668       <require Dendian="Little-endian"/>
1669     </condition>
1670
1671     <condition id="CM33_GCC">
1672       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1673       <require condition="CM33"/>
1674       <require Tcompiler="GCC"/>
1675     </condition>
1676     <condition id="CM33_LE_GCC">
1677       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1678       <require condition="CM33_GCC"/>
1679       <require Dendian="Little-endian"/>
1680     </condition>
1681
1682     <condition id="CM33_FP_GCC">
1683       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1684       <require condition="CM33_FP"/>
1685       <require Tcompiler="GCC"/>
1686     </condition>
1687     <condition id="CM33_FP_LE_GCC">
1688       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1689       <require condition="CM33_FP_GCC"/>
1690       <require Dendian="Little-endian"/>
1691     </condition>
1692
1693     <condition id="CM35P_GCC">
1694       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1695       <require condition="CM35P"/>
1696       <require Tcompiler="GCC"/>
1697     </condition>
1698     <condition id="CM35P_LE_GCC">
1699       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1700       <require condition="CM35P_GCC"/>
1701       <require Dendian="Little-endian"/>
1702     </condition>
1703
1704     <condition id="CM35P_FP_GCC">
1705       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1706       <require condition="CM35P_FP"/>
1707       <require Tcompiler="GCC"/>
1708     </condition>
1709     <condition id="CM35P_FP_LE_GCC">
1710       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1711       <require condition="CM35P_FP_GCC"/>
1712       <require Dendian="Little-endian"/>
1713     </condition>
1714
1715     <condition id="CM55_NOFPU_NOMVE_GCC">
1716       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1717       <require condition="CM55_NOFPU_NOMVE"/>
1718       <require Tcompiler="GCC"/>
1719     </condition>
1720     <condition id="CM55_NOFPU_MVE_GCC">
1721       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1722       <require condition="CM55_NOFPU_MVE"/>
1723       <require Tcompiler="GCC"/>
1724     </condition>
1725     <condition id="CM55_FPU_GCC">
1726       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1727       <require condition="CM55_FPU"/>
1728       <require Tcompiler="GCC"/>
1729     </condition>
1730     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1731       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1732       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1733       <require Dendian="Little-endian"/>
1734     </condition>
1735     <condition id="CM55_FPU_LE_GCC">
1736       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1737       <require condition="CM55_FPU_GCC"/>
1738       <require Dendian="Little-endian"/>
1739     </condition>
1740
1741     <condition id="ARMv8MBL_GCC">
1742       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1743       <require condition="ARMv8MBL"/>
1744       <require Tcompiler="GCC"/>
1745     </condition>
1746     <condition id="ARMv8MBL_LE_GCC">
1747       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1748       <require condition="ARMv8MBL_GCC"/>
1749       <require Dendian="Little-endian"/>
1750     </condition>
1751
1752     <condition id="ARMv8MML_GCC">
1753       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1754       <require condition="ARMv8MML"/>
1755       <require Tcompiler="GCC"/>
1756     </condition>
1757     <condition id="ARMv8MML_LE_GCC">
1758       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1759       <require condition="ARMv8MML_GCC"/>
1760       <require Dendian="Little-endian"/>
1761     </condition>
1762
1763     <condition id="ARMv8MML_FP_GCC">
1764       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1765       <require condition="ARMv8MML_FP"/>
1766       <require Tcompiler="GCC"/>
1767     </condition>
1768     <condition id="ARMv8MML_FP_LE_GCC">
1769       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1770       <require condition="ARMv8MML_FP_GCC"/>
1771       <require Dendian="Little-endian"/>
1772     </condition>
1773
1774     <!-- IAR compiler -->
1775     <condition id="CA_IAR">
1776       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1777       <require condition="ARMv7-A Device"/>
1778       <require Tcompiler="IAR"/>
1779     </condition>
1780
1781     <condition id="CM0_IAR">
1782       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1783       <require condition="CM0"/>
1784       <require Tcompiler="IAR"/>
1785     </condition>
1786     <condition id="CM0_LE_IAR">
1787       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1788       <require condition="CM0_IAR"/>
1789       <require Dendian="Little-endian"/>
1790     </condition>
1791     <condition id="CM0_BE_IAR">
1792       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1793       <require condition="CM0_IAR"/>
1794       <require Dendian="Big-endian"/>
1795     </condition>
1796
1797     <condition id="CM1_IAR">
1798       <description>Cortex-M1 based device for the IAR Compiler</description>
1799       <require condition="CM1"/>
1800       <require Tcompiler="IAR"/>
1801     </condition>
1802     <condition id="CM1_LE_IAR">
1803       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1804       <require condition="CM1_IAR"/>
1805       <require Dendian="Little-endian"/>
1806     </condition>
1807     <condition id="CM1_BE_IAR">
1808       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1809       <require condition="CM1_IAR"/>
1810       <require Dendian="Big-endian"/>
1811     </condition>
1812
1813     <condition id="CM3_IAR">
1814       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1815       <require condition="CM3"/>
1816       <require Tcompiler="IAR"/>
1817     </condition>
1818     <condition id="CM3_LE_IAR">
1819       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1820       <require condition="CM3_IAR"/>
1821       <require Dendian="Little-endian"/>
1822     </condition>
1823     <condition id="CM3_BE_IAR">
1824       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1825       <require condition="CM3_IAR"/>
1826       <require Dendian="Big-endian"/>
1827     </condition>
1828
1829     <condition id="CM4_IAR">
1830       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1831       <require condition="CM4"/>
1832       <require Tcompiler="IAR"/>
1833     </condition>
1834     <condition id="CM4_LE_IAR">
1835       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1836       <require condition="CM4_IAR"/>
1837       <require Dendian="Little-endian"/>
1838     </condition>
1839     <condition id="CM4_BE_IAR">
1840       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1841       <require condition="CM4_IAR"/>
1842       <require Dendian="Big-endian"/>
1843     </condition>
1844
1845     <condition id="CM4_FP_IAR">
1846       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1847       <require condition="CM4_FP"/>
1848       <require Tcompiler="IAR"/>
1849     </condition>
1850     <condition id="CM4_FP_LE_IAR">
1851       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1852       <require condition="CM4_FP_IAR"/>
1853       <require Dendian="Little-endian"/>
1854     </condition>
1855     <condition id="CM4_FP_BE_IAR">
1856       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1857       <require condition="CM4_FP_IAR"/>
1858       <require Dendian="Big-endian"/>
1859     </condition>
1860
1861     <condition id="CM7_IAR">
1862       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1863       <require condition="CM7"/>
1864       <require Tcompiler="IAR"/>
1865     </condition>
1866     <condition id="CM7_LE_IAR">
1867       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1868       <require condition="CM7_IAR"/>
1869       <require Dendian="Little-endian"/>
1870     </condition>
1871     <condition id="CM7_BE_IAR">
1872       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1873       <require condition="CM7_IAR"/>
1874       <require Dendian="Big-endian"/>
1875     </condition>
1876
1877     <condition id="CM7_FP_IAR">
1878       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1879       <require condition="CM7_FP"/>
1880       <require Tcompiler="IAR"/>
1881     </condition>
1882     <condition id="CM7_FP_LE_IAR">
1883       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1884       <require condition="CM7_FP_IAR"/>
1885       <require Dendian="Little-endian"/>
1886     </condition>
1887     <condition id="CM7_FP_BE_IAR">
1888       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1889       <require condition="CM7_FP_IAR"/>
1890       <require Dendian="Big-endian"/>
1891     </condition>
1892
1893     <condition id="CM23_IAR">
1894       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1895       <require condition="CM23"/>
1896       <require Tcompiler="IAR"/>
1897     </condition>
1898     <condition id="CM23_LE_IAR">
1899       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1900       <require condition="CM23_IAR"/>
1901       <require Dendian="Little-endian"/>
1902     </condition>
1903
1904     <condition id="CM33_IAR">
1905       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1906       <require condition="CM33"/>
1907       <require Tcompiler="IAR"/>
1908     </condition>
1909     <condition id="CM33_LE_IAR">
1910       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1911       <require condition="CM33_IAR"/>
1912       <require Dendian="Little-endian"/>
1913     </condition>
1914
1915     <condition id="CM33_FP_IAR">
1916       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1917       <require condition="CM33_FP"/>
1918       <require Tcompiler="IAR"/>
1919     </condition>
1920     <condition id="CM33_FP_LE_IAR">
1921       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1922       <require condition="CM33_FP_IAR"/>
1923       <require Dendian="Little-endian"/>
1924     </condition>
1925
1926     <condition id="CM35P_IAR">
1927       <description>Cortex-M35P processor based device for the IAR Compiler</description>
1928       <require condition="CM35P"/>
1929       <require Tcompiler="IAR"/>
1930     </condition>
1931     <condition id="CM35P_LE_IAR">
1932       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
1933       <require condition="CM35P_IAR"/>
1934       <require Dendian="Little-endian"/>
1935     </condition>
1936
1937     <condition id="CM35P_FP_IAR">
1938       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
1939       <require condition="CM35P_FP"/>
1940       <require Tcompiler="IAR"/>
1941     </condition>
1942     <condition id="CM35P_FP_LE_IAR">
1943       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1944       <require condition="CM35P_FP_IAR"/>
1945       <require Dendian="Little-endian"/>
1946     </condition>
1947
1948     <condition id="CM55_NOFPU_NOMVE_IAR">
1949       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
1950       <require condition="CM55_NOFPU_NOMVE"/>
1951       <require Tcompiler="IAR"/>
1952     </condition>
1953     <condition id="CM55_NOFPU_MVE_IAR">
1954       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
1955       <require condition="CM55_NOFPU_MVE"/>
1956       <require Tcompiler="IAR"/>
1957     </condition>
1958     <condition id="CM55_FPU_IAR">
1959       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
1960       <require condition="CM55_FPU"/>
1961       <require Tcompiler="IAR"/>
1962     </condition>
1963     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
1964       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
1965       <require condition="CM55_NOFPU_NOMVE_IAR"/>
1966       <require Dendian="Little-endian"/>
1967     </condition>
1968     <condition id="CM55_FPU_LE_IAR">
1969       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
1970       <require condition="CM55_FPU_IAR"/>
1971       <require Dendian="Little-endian"/>
1972     </condition>
1973
1974     <condition id="ARMv8MBL_IAR">
1975       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1976       <require condition="ARMv8MBL"/>
1977       <require Tcompiler="IAR"/>
1978     </condition>
1979     <condition id="ARMv8MBL_LE_IAR">
1980       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1981       <require condition="ARMv8MBL_IAR"/>
1982       <require Dendian="Little-endian"/>
1983     </condition>
1984
1985     <condition id="ARMv8MML_IAR">
1986       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1987       <require condition="ARMv8MML"/>
1988       <require Tcompiler="IAR"/>
1989     </condition>
1990     <condition id="ARMv8MML_LE_IAR">
1991       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1992       <require condition="ARMv8MML_IAR"/>
1993       <require Dendian="Little-endian"/>
1994     </condition>
1995
1996     <condition id="ARMv8MML_FP_IAR">
1997       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1998       <require condition="ARMv8MML_FP"/>
1999       <require Tcompiler="IAR"/>
2000     </condition>
2001     <condition id="ARMv8MML_FP_LE_IAR">
2002       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2003       <require condition="ARMv8MML_FP_IAR"/>
2004       <require Dendian="Little-endian"/>
2005     </condition>
2006
2007     <!-- conditions selecting single devices and CMSIS Core -->
2008     <condition id="ARMCM0 CMSIS">
2009       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2010       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2011       <require Cclass="CMSIS" Cgroup="CORE"/>
2012     </condition>
2013
2014     <condition id="ARMCM0+ CMSIS">
2015       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2016       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2017       <require Cclass="CMSIS" Cgroup="CORE"/>
2018     </condition>
2019
2020     <condition id="ARMCM1 CMSIS">
2021       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2022       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2023       <require Cclass="CMSIS" Cgroup="CORE"/>
2024     </condition>
2025
2026     <condition id="ARMCM3 CMSIS">
2027       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2028       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2029       <require Cclass="CMSIS" Cgroup="CORE"/>
2030     </condition>
2031
2032     <condition id="ARMCM4 CMSIS">
2033       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2034       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2035       <require Cclass="CMSIS" Cgroup="CORE"/>
2036     </condition>
2037
2038     <condition id="ARMCM7 CMSIS">
2039       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2040       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2041       <require Cclass="CMSIS" Cgroup="CORE"/>
2042     </condition>
2043
2044     <condition id="ARMCM23 CMSIS">
2045       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2046       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2047       <require Cclass="CMSIS" Cgroup="CORE"/>
2048     </condition>
2049
2050     <condition id="ARMCM33 CMSIS">
2051       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2052       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2053       <require Cclass="CMSIS" Cgroup="CORE"/>
2054     </condition>
2055
2056     <condition id="ARMCM35P CMSIS">
2057       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2058       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2059       <require Cclass="CMSIS" Cgroup="CORE"/>
2060     </condition>
2061
2062     <condition id="ARMCM55 CMSIS">
2063       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2064       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2065       <require Cclass="CMSIS" Cgroup="CORE"/>
2066     </condition>
2067
2068     <condition id="ARMSC000 CMSIS">
2069       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2070       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2071       <require Cclass="CMSIS" Cgroup="CORE"/>
2072     </condition>
2073
2074     <condition id="ARMSC300 CMSIS">
2075       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2076       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2077       <require Cclass="CMSIS" Cgroup="CORE"/>
2078     </condition>
2079
2080     <condition id="ARMv8MBL CMSIS">
2081       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2082       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2083       <require Cclass="CMSIS" Cgroup="CORE"/>
2084     </condition>
2085
2086     <condition id="ARMv8MML CMSIS">
2087       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2088       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2089       <require Cclass="CMSIS" Cgroup="CORE"/>
2090     </condition>
2091
2092     <condition id="ARMv81MML CMSIS">
2093       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2094       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2095       <require Cclass="CMSIS" Cgroup="CORE"/>
2096     </condition>
2097
2098     <condition id="ARMCA5 CMSIS">
2099       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2100       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2101       <require Cclass="CMSIS" Cgroup="CORE"/>
2102     </condition>
2103
2104     <condition id="ARMCA7 CMSIS">
2105       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2106       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2107       <require Cclass="CMSIS" Cgroup="CORE"/>
2108     </condition>
2109
2110     <condition id="ARMCA9 CMSIS">
2111       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2112       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2113       <require Cclass="CMSIS" Cgroup="CORE"/>
2114     </condition>
2115
2116     <!-- CMSIS DSP -->
2117     <condition id="CMSIS DSP">
2118       <description>Components required for DSP</description>
2119       <require condition="ARMv6_7_8-M Device"/>
2120       <require condition="ARMCC GCC IAR"/>
2121       <require Cclass="CMSIS" Cgroup="CORE"/>
2122     </condition>
2123
2124     <!-- CMSIS NN -->
2125     <condition id="CMSIS NN">
2126       <description>Components required for NN</description>
2127       <require Cclass="CMSIS" Cgroup="DSP"/>
2128     </condition>
2129
2130     <!-- RTOS RTX -->
2131     <condition id="RTOS RTX">
2132       <description>Components required for RTOS RTX</description>
2133       <require condition="ARMv6_7-M Device"/>
2134       <require condition="ARMCC GCC IAR"/>
2135       <require Cclass="Device" Cgroup="Startup"/>
2136       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2137     </condition>
2138     <condition id="RTOS RTX IFX">
2139       <description>Components required for RTOS RTX IFX</description>
2140       <require condition="ARMv6_7-M Device"/>
2141       <require condition="ARMCC GCC IAR"/>
2142       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2143       <require Cclass="Device" Cgroup="Startup"/>
2144       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2145     </condition>
2146     <condition id="RTOS RTX5">
2147       <description>Components required for RTOS RTX5</description>
2148       <require condition="ARMv6_7_8-M Device"/>
2149       <require condition="ARMCC GCC IAR"/>
2150       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2151     </condition>
2152     <condition id="RTOS2 RTX5">
2153       <description>Components required for RTOS2 RTX5</description>
2154       <require condition="ARMv6_7_8-M Device"/>
2155       <require condition="ARMCC GCC IAR"/>
2156       <require Cclass="CMSIS"  Cgroup="CORE"/>
2157       <require Cclass="Device" Cgroup="Startup"/>
2158     </condition>
2159     <condition id="RTOS2 RTX5 v7-A">
2160       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2161       <require condition="ARMv7-A Device"/>
2162       <require condition="ARMCC GCC IAR"/>
2163       <require Cclass="CMSIS"  Cgroup="CORE"/>
2164       <require Cclass="Device" Cgroup="Startup"/>
2165       <require Cclass="Device" Cgroup="OS Tick"/>
2166       <require Cclass="Device" Cgroup="IRQ Controller"/>
2167     </condition>
2168     <condition id="RTOS2 RTX5 NS">
2169       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2170       <require condition="ARMv8-M Device"/>
2171       <require condition="TZ Non-secure"/>
2172       <require condition="ARMCC GCC IAR"/>
2173       <require Cclass="CMSIS"  Cgroup="CORE"/>
2174       <require Cclass="Device" Cgroup="Startup"/>
2175     </condition>
2176
2177     <!-- OS Tick -->
2178     <condition id="OS Tick PTIM">
2179       <description>Components required for OS Tick Private Timer</description>
2180       <require condition="CA5_CA9"/>
2181       <require Cclass="Device" Cgroup="IRQ Controller"/>
2182     </condition>
2183
2184     <condition id="OS Tick GTIM">
2185       <description>Components required for OS Tick Generic Physical Timer</description>
2186       <require condition="CA7"/>
2187       <require Cclass="Device" Cgroup="IRQ Controller"/>
2188     </condition>
2189
2190   </conditions>
2191
2192   <components>
2193     <!-- CMSIS-Core component -->
2194     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.5.0"  condition="ARMv6_7_8-M Device" >
2195       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2196       <files>
2197         <!-- CPU independent -->
2198         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2199         <file category="include" name="CMSIS/Core/Include/"/>
2200         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2201         <!-- Code template -->
2202         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2203         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2204       </files>
2205     </component>
2206
2207     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.1"  condition="ARMv7-A Device" >
2208       <description>CMSIS-CORE for Cortex-A</description>
2209       <files>
2210         <!-- CPU independent -->
2211         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2212         <file category="include" name="CMSIS/Core_A/Include/"/>
2213       </files>
2214     </component>
2215
2216     <!-- CMSIS-Startup components -->
2217     <!-- Cortex-M0 -->
2218     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
2219       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2220       <files>
2221         <!-- include folder / device header file -->
2222         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2223         <!-- startup / system file -->
2224         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2225         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2226         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2227         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2228         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2229       </files>
2230     </component>
2231     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2232       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2233       <files>
2234         <!-- include folder / device header file -->
2235         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2236         <!-- startup / system file -->
2237         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2238         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.2.0" attr="config" condition="GCC"/>
2239         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2240         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2241         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2242       </files>
2243     </component>
2244
2245     <!-- Cortex-M0+ -->
2246     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
2247       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2248       <files>
2249         <!-- include folder / device header file -->
2250         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2251         <!-- startup / system file -->
2252         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2253         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2254         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2255         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2256         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2257       </files>
2258     </component>
2259     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM0+ CMSIS">
2260       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2261       <files>
2262         <!-- include folder / device header file -->
2263         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2264         <!-- startup / system file -->
2265         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2266         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.2.0" attr="config" condition="GCC"/>
2267         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2268         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2269         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2270       </files>
2271     </component>
2272
2273     <!-- Cortex-M1 -->
2274     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
2275       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2276       <files>
2277         <!-- include folder / device header file -->
2278         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2279         <!-- startup / system file -->
2280         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2281         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2282         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2283         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2284         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2285       </files>
2286     </component>
2287     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2288       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2289       <files>
2290         <!-- include folder / device header file -->
2291         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2292         <!-- startup / system file -->
2293         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2294         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.2.0" attr="config" condition="GCC"/>
2295         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2296         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2297         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2298       </files>
2299     </component>
2300
2301     <!-- Cortex-M3 -->
2302     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
2303       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2304       <files>
2305         <!-- include folder / device header file -->
2306         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2307         <!-- startup / system file -->
2308         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2309         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2310         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2311         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2312         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2313       </files>
2314     </component>
2315     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2316       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2317       <files>
2318         <!-- include folder / device header file -->
2319         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2320         <!-- startup / system file -->
2321         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2322         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.2.0" attr="config" condition="GCC"/>
2323         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2324         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2325         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2326       </files>
2327     </component>
2328
2329     <!-- Cortex-M4 -->
2330     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
2331       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2332       <files>
2333         <!-- include folder / device header file -->
2334         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2335         <!-- startup / system file -->
2336         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2337         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2338         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2339         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2340        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2341       </files>
2342     </component>
2343     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2344       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2345       <files>
2346         <!-- include folder / device header file -->
2347         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2348         <!-- startup / system file -->
2349         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2350         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.2.0" attr="config" condition="GCC"/>
2351         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2352         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2353         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2354       </files>
2355     </component>
2356
2357     <!-- Cortex-M7 -->
2358     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
2359       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2360       <files>
2361         <!-- include folder / device header file -->
2362         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2363         <!-- startup / system file -->
2364         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2365         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2366         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2367         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2368         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2369       </files>
2370     </component>
2371     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2372       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2373       <files>
2374         <!-- include folder / device header file -->
2375         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2376         <!-- startup / system file -->
2377         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2378         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.2.0" attr="config" condition="GCC"/>
2379         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2380         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2381         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2382       </files>
2383     </component>
2384
2385     <!-- Cortex-M23 -->
2386     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
2387       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2388       <files>
2389         <!-- include folder / device header file -->
2390         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2391         <!-- startup / system file -->
2392         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
2393         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2394         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2395         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2396         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2397         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2398         <!-- SAU configuration -->
2399         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2400       </files>
2401     </component>
2402     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
2403       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2404       <files>
2405         <!-- include folder / device header file -->
2406         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2407         <!-- startup / system file -->
2408         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2409         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2410         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2411         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2412         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
2413         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2414         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
2415         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2416         <!-- SAU configuration -->
2417         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2418       </files>
2419     </component>
2420
2421     <!-- Cortex-M33 -->
2422     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
2423       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2424       <files>
2425         <!-- include folder / device header file -->
2426         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2427         <!-- startup / system file -->
2428         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
2429         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2430         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2431         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2432         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2433         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2434         <!-- SAU configuration -->
2435         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2436       </files>
2437     </component>
2438     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
2439       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2440       <files>
2441         <!-- include folder / device header file -->
2442         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2443         <!-- startup / system file -->
2444         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2445         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2446         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2447         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2448         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.3.0" attr="config" condition="GCC"/>
2449         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2450         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
2451         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2452         <!-- SAU configuration -->
2453         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2454       </files>
2455     </component>
2456
2457     <!-- Cortex-M35P -->
2458     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
2459       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2460       <files>
2461         <!-- include folder / device header file -->
2462         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2463         <!-- startup / system file -->
2464         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
2465         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2466         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2467         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2468         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2469         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2470         <!-- SAU configuration -->
2471         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2472       </files>
2473     </component>
2474     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
2475       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2476       <files>
2477         <!-- include folder / device header file -->
2478         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2479         <!-- startup / system file -->
2480         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2481         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2482         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2483         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2484         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.3.0" attr="config" condition="GCC"/>
2485         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2486         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
2487         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2488         <!-- SAU configuration -->
2489         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2490       </files>
2491     </component>
2492
2493     <!-- Cortex-M55 -->
2494     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
2495       <description>System and Startup for Generic Cortex-M55 device</description>
2496       <files>
2497         <!-- include folder / device header file -->
2498         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2499         <!-- startup / system file -->
2500         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
2501         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2502         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2503         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2504         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2505         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.1" attr="config"/>
2506         <!-- SAU configuration -->
2507         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2508       </files>
2509     </component>
2510
2511     <!-- Cortex-SC000 -->
2512     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2513       <description>System and Startup for Generic Arm SC000 device</description>
2514       <files>
2515         <!-- include folder / device header file -->
2516         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2517         <!-- startup / system file -->
2518         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2519         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2520         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2521         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2522         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2523       </files>
2524     </component>
2525     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2526       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2527       <files>
2528         <!-- include folder / device header file -->
2529         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2530         <!-- startup / system file -->
2531         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2532         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.2.0" attr="config" condition="GCC"/>
2533         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2534         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2535         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2536       </files>
2537     </component>
2538
2539     <!-- Cortex-SC300 -->
2540     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2541       <description>System and Startup for Generic Arm SC300 device</description>
2542       <files>
2543         <!-- include folder / device header file -->
2544         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2545         <!-- startup / system file -->
2546         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2547         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2548         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2549         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2550         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2551       </files>
2552     </component>
2553     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2554       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2555       <files>
2556         <!-- include folder / device header file -->
2557         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2558         <!-- startup / system file -->
2559         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2560         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.2.0" attr="config" condition="GCC"/>
2561         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2562         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2563         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2564       </files>
2565     </component>
2566
2567     <!-- ARMv8MBL -->
2568     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2569       <description>System and Startup for Generic Armv8-M Baseline device</description>
2570       <files>
2571         <!-- include folder / device header file -->
2572         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2573         <!-- startup / system file -->
2574         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2575         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2576         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2577         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2578         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2579         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2580         <!-- SAU configuration -->
2581         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2582       </files>
2583     </component>
2584     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2585       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2586       <files>
2587         <!-- include folder / device header file -->
2588         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2589         <!-- startup / system file -->
2590         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2591         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2592         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2593         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2594         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2595         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2596         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2597         <!-- SAU configuration -->
2598         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2599       </files>
2600     </component>
2601
2602     <!-- ARMv8MML -->
2603     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2604       <description>System and Startup for Generic Armv8-M Mainline device</description>
2605       <files>
2606         <!-- include folder / device header file -->
2607         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2608         <!-- startup / system file -->
2609         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2610         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2611         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2612         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2613         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2614         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2615         <!-- SAU configuration -->
2616         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2617       </files>
2618     </component>
2619     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2620       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2621       <files>
2622         <!-- include folder / device header file -->
2623         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2624         <!-- startup / system file -->
2625         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2626         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2627         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2628         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2629         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.3.0" attr="config" condition="GCC"/>
2630         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2631         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2632         <!-- SAU configuration -->
2633         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2634       </files>
2635     </component>
2636
2637     <!-- ARMv81MML -->
2638     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2639       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2640       <files>
2641         <!-- include folder / device header file -->
2642         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2643         <!-- startup / system file -->
2644         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2645         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2646         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2647         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2648         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2649         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2650         <!-- SAU configuration -->
2651         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2652       </files>
2653     </component>
2654
2655     <!-- Cortex-A5 -->
2656     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA5 CMSIS">
2657       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2658       <files>
2659         <!-- include folder / device header file -->
2660         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2661         <!-- startup / system / mmu files -->
2662         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2663         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2664         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2665         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2666         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.1" attr="config" condition="GCC"/>
2667         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2668         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2669         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2670         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2671         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2672         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2673         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2674
2675       </files>
2676     </component>
2677
2678     <!-- Cortex-A7 -->
2679     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA7 CMSIS">
2680       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2681       <files>
2682         <!-- include folder / device header file -->
2683         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2684         <!-- startup / system / mmu files -->
2685         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2686         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2687         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2688         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2689         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.1" attr="config" condition="GCC"/>
2690         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2691         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2692         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2693         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2694         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2695         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2696         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2697       </files>
2698     </component>
2699
2700     <!-- Cortex-A9 -->
2701     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.2" condition="ARMCA9 CMSIS">
2702       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2703       <files>
2704         <!-- include folder / device header file -->
2705         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2706         <!-- startup / system / mmu files -->
2707         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2708         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2709         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2710         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2711         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.1" attr="config" condition="GCC"/>
2712         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2713         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2714         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2715         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2716         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2717         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2718         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2719       </files>
2720     </component>
2721
2722     <!-- IRQ Controller -->
2723     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2724       <description>IRQ Controller implementation using GIC</description>
2725       <files>
2726         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2727       </files>
2728     </component>
2729
2730     <!-- OS Tick -->
2731     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2732       <description>OS Tick implementation using Private Timer</description>
2733       <files>
2734         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2735       </files>
2736     </component>
2737
2738     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2739       <description>OS Tick implementation using Generic Physical Timer</description>
2740       <files>
2741         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2742       </files>
2743     </component>
2744
2745     <!-- CMSIS-DSP component -->
2746     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.10.0-dev" isDefaultVariant="true" condition="CMSIS DSP">
2747       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2748       <files>
2749         <!-- CPU independent -->
2750         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
2751         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
2752         <file category="header"   name="CMSIS/DSP/Include/arm_math_f16.h"/>
2753         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables.h"/>
2754         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables_f16.h"/>
2755         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs.h"/>
2756         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs_f16.h"/>
2757
2758         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
2759         <file category="include"  name="CMSIS/DSP/Include/"/>
2760
2761         <!-- DSP sources (core) -->
2762         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
2763
2764         <file category="source"   name="CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c"/>
2765
2766         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
2767         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
2768         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
2769         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
2770         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
2771         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
2772         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
2773         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
2774         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
2775         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
2776         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
2777         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
2778
2779         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c"/>
2780
2781         <!-- DSP sources F16 versions -->
2782         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c"/>
2783         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c"/>
2784         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c"/>
2785         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTablesF16.c"/>
2786         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c"/>
2787         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c"/>
2788         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c"/>
2789         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c"/>
2790         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c"/>
2791         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c"/>
2792         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c"/>
2793         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c"/>
2794         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c"/>
2795
2796         <!-- Compute Library for Cortex-A -->
2797         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
2798         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
2799       </files>
2800     </component>
2801
2802     <!-- CMSIS-NN component -->
2803     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="3.0.0" condition="CMSIS NN">
2804       <description>CMSIS-NN Neural Network Library</description>
2805       <files>
2806         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2807         <file category="header" name="CMSIS/NN/Include/arm_nn_types.h"/>
2808         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2809         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
2810         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
2811
2812         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2813         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2814         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2815         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
2816         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
2817         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
2818         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
2819         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2820         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c"/>
2821         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2822         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2823         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
2824         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
2825         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s16.c"/>
2826         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_fast_s16.c"/>
2827         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
2828         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
2829         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s16.c"/>
2830         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
2831         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
2832         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2833         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2834         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
2835         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c"/>
2836         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c"/>
2837         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2838         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2839         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
2840         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2841         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2842         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
2843         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
2844         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
2845         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
2846         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c"/>
2847         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
2848         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s16.c"/>
2849         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
2850         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s16.c"/>
2851         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2852         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
2853         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
2854         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
2855         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2856         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2857         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2858         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2859         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
2860         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2861         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2862         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
2863         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c"/>
2864         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c"/>
2865         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
2866         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
2867         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
2868         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c"/>
2869         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c"/>
2870         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
2871         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
2872         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2873         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c"/>
2874         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2875         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
2876         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2877         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
2878         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
2879         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s16.c"/>
2880         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2881         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2882         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2883         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2884         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2885         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2886         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2887         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
2888         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
2889         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2890         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
2891       </files>
2892     </component>
2893
2894     <!-- CMSIS-RTOS Keil RTX component -->
2895     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2896       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2897       <RTE_Components_h>
2898         <!-- the following content goes into file 'RTE_Components.h' -->
2899         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2900         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2901       </RTE_Components_h>
2902       <files>
2903         <!-- CPU independent -->
2904         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2905         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2906         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2907
2908         <!-- RTX templates -->
2909         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2910         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2911         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2912         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2913         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2914         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2915         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2916         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2917         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2918         <!-- tool-chain specific template file -->
2919         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2920         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2921         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2922
2923         <!-- CPU and Compiler dependent -->
2924         <!-- ARMCC -->
2925         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2926         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2927         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2928         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2929         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2930         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2931         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2932         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2933         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2934         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2935         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2936         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2937         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2938         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2939         <!-- GCC -->
2940         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2941         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2942         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2943         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2944         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2945         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2946         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2947         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2948         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2949         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2950         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2951         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2952         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2953         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2954         <!-- IAR -->
2955         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2956         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2957         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2958         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2959         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2960         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2961         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2962         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2963         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2964         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2965         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2966         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2967         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2968         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2969       </files>
2970     </component>
2971     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2972     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2973       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2974       <RTE_Components_h>
2975         <!-- the following content goes into file 'RTE_Components.h' -->
2976         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2977         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2978       </RTE_Components_h>
2979       <files>
2980         <!-- CPU independent -->
2981         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2982         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2983         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2984
2985         <!-- RTX templates -->
2986         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2987         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2988         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2989         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2990         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2991         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2992         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2993         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2994         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2995         <!-- tool-chain specific template file -->
2996         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2997         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2998         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2999
3000         <!-- CPU and Compiler dependent -->
3001         <!-- ARMCC -->
3002         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3003         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3004         <!-- GCC -->
3005         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3006         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3007         <!-- IAR -->
3008       </files>
3009     </component>
3010
3011     <!-- CMSIS-RTOS Keil RTX5 component -->
3012     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.4" Capiversion="1.0.0" condition="RTOS RTX5">
3013       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3014       <RTE_Components_h>
3015         <!-- the following content goes into file 'RTE_Components.h' -->
3016         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3017         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3018       </RTE_Components_h>
3019       <files>
3020         <!-- RTX header file -->
3021         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3022         <!-- RTX compatibility module for API V1 -->
3023         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3024       </files>
3025     </component>
3026
3027     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3028     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
3029       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3030       <RTE_Components_h>
3031         <!-- the following content goes into file 'RTE_Components.h' -->
3032         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3033         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3034       </RTE_Components_h>
3035       <files>
3036         <!-- RTX documentation -->
3037         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3038
3039         <!-- RTX header files -->
3040         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3041
3042         <!-- RTX configuration -->
3043         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3044         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3045
3046         <!-- RTX templates -->
3047         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3048         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3049         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3050         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3051         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3052         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3053         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3054         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3055         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3056         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3057
3058         <!-- RTX library configuration -->
3059         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3060
3061         <!-- RTX libraries (CPU and Compiler dependent) -->
3062         <!-- ARMCC -->
3063         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3064         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3065         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3066         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3067         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3068         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3069         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3070         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3071         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3072         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3073         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3074         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3075         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3076         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3077         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3078         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3079         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3080         <!-- GCC -->
3081         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3082         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3083         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3084         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3085         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3086         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3087         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3088         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3089         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3090         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3091         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3092         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3093         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3094         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3095         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3096         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3097         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3098         <!-- IAR -->
3099         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3100         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3101         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3102         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3103         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3104         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3105         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3106         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3107         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3108         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3109         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3110         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3111         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3112         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3113         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3114         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3115         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3116       </files>
3117     </component>
3118     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3119       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3120       <RTE_Components_h>
3121         <!-- the following content goes into file 'RTE_Components.h' -->
3122         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3123         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3124         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3125       </RTE_Components_h>
3126       <files>
3127         <!-- RTX documentation -->
3128         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3129
3130         <!-- RTX header files -->
3131         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3132
3133         <!-- RTX configuration -->
3134         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3135         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3136
3137         <!-- RTX templates -->
3138         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3139         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3140         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3141         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3142         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3143         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3144         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3145         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3146         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3147         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3148
3149         <!-- RTX library configuration -->
3150         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3151
3152         <!-- RTX libraries (CPU and Compiler dependent) -->
3153         <!-- ARMCC -->
3154         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3155         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3156         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3157         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3158         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3159         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3160         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3161         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3162         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3163         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3164         <!-- GCC -->
3165         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3166         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3167         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3168         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3169         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3170         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3171         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3172         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3173         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3174         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3175         <!-- IAR -->
3176         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3177         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3178         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3179         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3180         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3181         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3182         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3183         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3184         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3185         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3186       </files>
3187     </component>
3188     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
3189       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3190       <RTE_Components_h>
3191         <!-- the following content goes into file 'RTE_Components.h' -->
3192         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3193         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3194         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3195       </RTE_Components_h>
3196       <files>
3197         <!-- RTX documentation -->
3198         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3199
3200         <!-- RTX header files -->
3201         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3202
3203         <!-- RTX configuration -->
3204         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3205         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3206
3207         <!-- RTX templates -->
3208         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3209         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3210         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3211         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3212         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3213         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3214         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3215         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3216         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3217         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3218
3219         <!-- RTX sources (core) -->
3220         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3221         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3222         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3223         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3224         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3225         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3227         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3229         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3230         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3231         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3232         <!-- RTX sources (library configuration) -->
3233         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3234         <!-- RTX sources (handlers ARMCC) -->
3235         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM0_ARMCC5"/>
3236         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_ARMCC6"/>
3237         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM1_ARMCC5"/>
3238         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_ARMCC6"/>
3239         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM3_ARMCC5"/>
3240         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_ARMCC6"/>
3241         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_ARMCC5"/>
3242         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_ARMCC6"/>
3243         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_FP_ARMCC5"/>
3244         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_ARMCC6"/>
3245         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_ARMCC5"/>
3246         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_ARMCC6"/>
3247         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_FP_ARMCC5"/>
3248         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_ARMCC6"/>
3249         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3250         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3251         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3252         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3253         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3254         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3255         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3256         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3257         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3258         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3259         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3260         <!-- RTX sources (handlers GCC) -->
3261         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_GCC"/>
3262         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_GCC"/>
3263         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_GCC"/>
3264         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_GCC"/>
3265         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_GCC"/>
3266         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_GCC"/>
3267         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_GCC"/>
3268         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3269         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3270         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3271         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3272         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3273         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3274         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3275         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3276         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3277         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3278         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3279         <!-- RTX sources (handlers IAR) -->
3280         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM0_IAR"/>
3281         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM1_IAR"/>
3282         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM3_IAR"/>
3283         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_IAR"/>
3284         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_FP_IAR"/>
3285         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_IAR"/>
3286         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_FP_IAR"/>
3287         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3288         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3289         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3290         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3291         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3292         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3293         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3294         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3295         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3296         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3297         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3298         <!-- OS Tick (SysTick) -->
3299         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3300       </files>
3301     </component>
3302     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3303       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3304       <RTE_Components_h>
3305         <!-- the following content goes into file 'RTE_Components.h' -->
3306         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3307         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3308         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3309       </RTE_Components_h>
3310       <files>
3311         <!-- RTX documentation -->
3312         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3313
3314         <!-- RTX header files -->
3315         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3316
3317         <!-- RTX configuration -->
3318         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3319         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3320
3321         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3322
3323         <!-- RTX templates -->
3324         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3325         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3326         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3327         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3328         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3329         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3330         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3331         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3332         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3333         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3334
3335         <!-- RTX sources (core) -->
3336         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3337         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3338         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3339         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3340         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3341         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3342         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3343         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3344         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3345         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3346         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3347         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3348         <!-- RTX sources (library configuration) -->
3349         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3350         <!-- RTX sources (handlers ARMCC) -->
3351         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="CA_ARMCC5"/>
3352         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_ARMCC6"/>
3353         <!-- RTX sources (handlers GCC) -->
3354         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_GCC"/>
3355         <!-- RTX sources (handlers IAR) -->
3356         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="CA_IAR"/>
3357       </files>
3358     </component>
3359     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3360       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3361       <RTE_Components_h>
3362         <!-- the following content goes into file 'RTE_Components.h' -->
3363         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3364         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3365         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3366         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3367       </RTE_Components_h>
3368       <files>
3369         <!-- RTX documentation -->
3370         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3371
3372         <!-- RTX header files -->
3373         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3374
3375         <!-- RTX configuration -->
3376         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3377         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3378
3379         <!-- RTX templates -->
3380         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3381         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3382         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3383         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3384         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3385         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3386         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3387         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3388         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3389         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3390
3391         <!-- RTX sources (core) -->
3392         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3393         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3394         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3395         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3396         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3397         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3398         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3399         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3400         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3401         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3402         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3403         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3404         <!-- RTX sources (library configuration) -->
3405         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3406         <!-- RTX sources (ARMCC handlers) -->
3407         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3409         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3410         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3411         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3412         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3413         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3414         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3415         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3416         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3418         <!-- RTX sources (GCC handlers) -->
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3420         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3421         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3422         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3423         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3424         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3425         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3426         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3427         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3428         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3429         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3430         <!-- RTX sources (IAR handlers) -->
3431         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3432         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3433         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3434         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3435         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3436         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3437         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3438         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3439         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3440         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3441         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3442         <!-- OS Tick (SysTick) -->
3443         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3444       </files>
3445     </component>
3446
3447     <!-- CMSIS-Driver Custom components -->
3448     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3449       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3450       <files>
3451         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3452         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3453       </files>
3454     </component>
3455     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3456       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3457       <files>
3458         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3459         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3460       </files>
3461     </component>
3462     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3463       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3464       <files>
3465         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3466         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3467       </files>
3468     </component>
3469     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3470       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3471       <files>
3472         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3473         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3474       </files>
3475     </component>
3476     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3477       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3478       <files>
3479         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3480         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3481       </files>
3482     </component>
3483     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3484       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3485       <files>
3486         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3487         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3488       </files>
3489     </component>
3490     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3491       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3492       <files>
3493         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3494         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3495       </files>
3496     </component>
3497     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3498       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3499       <files>
3500         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3501         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3502       </files>
3503     </component>
3504     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3505       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3506       <files>
3507         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3508         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3509         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3510         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3511       </files>
3512     </component>
3513     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3514       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3515       <files>
3516         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3517         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3518       </files>
3519     </component>
3520     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3521       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3522       <files>
3523         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3524         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3525       </files>
3526     </component>
3527     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3528       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3529       <files>
3530         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3531         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3532       </files>
3533     </component>
3534     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3535       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3536       <files>
3537         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3538         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3539       </files>
3540     </component>
3541     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3542       <description>Access to #include Driver_WiFi.h file</description>
3543       <files>
3544         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3545         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3546       </files>
3547     </component>
3548
3549     <!-- VIO components -->
3550     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3551       <description>Virtual I/O custom implementation template</description>
3552       <files>
3553         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3554       </files>
3555     </component>
3556     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3557       <description>Virtual I/O implementation using memory only</description>
3558       <files>
3559         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3560       </files>
3561     </component>
3562
3563   </components>
3564
3565   <boards>
3566     <board name="uVision Simulator" vendor="Keil">
3567       <description>uVision Simulator</description>
3568       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3569       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3570       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3571       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3572       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3573       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3574       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3575       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3576       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3577       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3578       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3579       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3580       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3581       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3582       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3583       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3584       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3585       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3586       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3587       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3588       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3589       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3590       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3591       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3592       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3593       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3594     </board>
3595
3596     <board name="EWARM Simulator" vendor="IAR">
3597       <description>EWARM Simulator</description>
3598       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3599       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3600       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3601       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3602       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3603       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3604       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3605       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3606       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3607       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3608       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3609       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3610       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3611       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3612       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3613       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3614       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3615       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3616       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3617       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3618       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3619       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3620       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3621       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3622       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3623       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3624     </board>
3625   </boards>
3626
3627   <examples>
3628     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
3629       <description>DSP_Lib Bayes example</description>
3630       <board name="uVision Simulator" vendor="Keil"/>
3631       <project>
3632         <environment name="uv" load="arm_bayes_example.uvprojx"/>
3633       </project>
3634       <attributes>
3635         <component Cclass="CMSIS" Cgroup="CORE"/>
3636         <component Cclass="CMSIS" Cgroup="DSP"/>
3637         <component Cclass="Device" Cgroup="Startup"/>
3638         <category>Getting Started</category>
3639       </attributes>
3640     </example>
3641
3642     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3643       <description>DSP_Lib Class Marks example</description>
3644       <board name="uVision Simulator" vendor="Keil"/>
3645       <project>
3646         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3647       </project>
3648       <attributes>
3649         <component Cclass="CMSIS" Cgroup="CORE"/>
3650         <component Cclass="CMSIS" Cgroup="DSP"/>
3651         <component Cclass="Device" Cgroup="Startup"/>
3652         <category>Getting Started</category>
3653       </attributes>
3654     </example>
3655
3656     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3657       <description>DSP_Lib Convolution example</description>
3658       <board name="uVision Simulator" vendor="Keil"/>
3659       <project>
3660         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3661       </project>
3662       <attributes>
3663         <component Cclass="CMSIS" Cgroup="CORE"/>
3664         <component Cclass="CMSIS" Cgroup="DSP"/>
3665         <component Cclass="Device" Cgroup="Startup"/>
3666         <category>Getting Started</category>
3667       </attributes>
3668     </example>
3669
3670     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3671       <description>DSP_Lib Dotproduct example</description>
3672       <board name="uVision Simulator" vendor="Keil"/>
3673       <project>
3674         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3675       </project>
3676       <attributes>
3677         <component Cclass="CMSIS" Cgroup="CORE"/>
3678         <component Cclass="CMSIS" Cgroup="DSP"/>
3679         <component Cclass="Device" Cgroup="Startup"/>
3680         <category>Getting Started</category>
3681       </attributes>
3682     </example>
3683
3684     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3685       <description>DSP_Lib FFT Bin example</description>
3686       <board name="uVision Simulator" vendor="Keil"/>
3687       <project>
3688         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3689       </project>
3690       <attributes>
3691         <component Cclass="CMSIS" Cgroup="CORE"/>
3692         <component Cclass="CMSIS" Cgroup="DSP"/>
3693         <component Cclass="Device" Cgroup="Startup"/>
3694         <category>Getting Started</category>
3695       </attributes>
3696     </example>
3697
3698     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3699       <description>DSP_Lib FIR example</description>
3700       <board name="uVision Simulator" vendor="Keil"/>
3701       <project>
3702         <environment name="uv" load="arm_fir_example.uvprojx"/>
3703       </project>
3704       <attributes>
3705         <component Cclass="CMSIS" Cgroup="CORE"/>
3706         <component Cclass="CMSIS" Cgroup="DSP"/>
3707         <component Cclass="Device" Cgroup="Startup"/>
3708         <category>Getting Started</category>
3709       </attributes>
3710     </example>
3711
3712     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3713       <description>DSP_Lib Graphic Equalizer example</description>
3714       <board name="uVision Simulator" vendor="Keil"/>
3715       <project>
3716         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3717       </project>
3718       <attributes>
3719         <component Cclass="CMSIS" Cgroup="CORE"/>
3720         <component Cclass="CMSIS" Cgroup="DSP"/>
3721         <component Cclass="Device" Cgroup="Startup"/>
3722         <category>Getting Started</category>
3723       </attributes>
3724     </example>
3725
3726     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3727       <description>DSP_Lib Linear Interpolation example</description>
3728       <board name="uVision Simulator" vendor="Keil"/>
3729       <project>
3730         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3731       </project>
3732       <attributes>
3733         <component Cclass="CMSIS" Cgroup="CORE"/>
3734         <component Cclass="CMSIS" Cgroup="DSP"/>
3735         <component Cclass="Device" Cgroup="Startup"/>
3736         <category>Getting Started</category>
3737       </attributes>
3738     </example>
3739
3740     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3741       <description>DSP_Lib Matrix example</description>
3742       <board name="uVision Simulator" vendor="Keil"/>
3743       <project>
3744         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3745       </project>
3746       <attributes>
3747         <component Cclass="CMSIS" Cgroup="CORE"/>
3748         <component Cclass="CMSIS" Cgroup="DSP"/>
3749         <component Cclass="Device" Cgroup="Startup"/>
3750         <category>Getting Started</category>
3751       </attributes>
3752     </example>
3753
3754     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3755       <description>DSP_Lib Signal Convergence example</description>
3756       <board name="uVision Simulator" vendor="Keil"/>
3757       <project>
3758         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3759       </project>
3760       <attributes>
3761         <component Cclass="CMSIS" Cgroup="CORE"/>
3762         <component Cclass="CMSIS" Cgroup="DSP"/>
3763         <component Cclass="Device" Cgroup="Startup"/>
3764         <category>Getting Started</category>
3765       </attributes>
3766     </example>
3767
3768     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3769       <description>DSP_Lib Sinus/Cosinus example</description>
3770       <board name="uVision Simulator" vendor="Keil"/>
3771       <project>
3772         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3773       </project>
3774       <attributes>
3775         <component Cclass="CMSIS" Cgroup="CORE"/>
3776         <component Cclass="CMSIS" Cgroup="DSP"/>
3777         <component Cclass="Device" Cgroup="Startup"/>
3778         <category>Getting Started</category>
3779       </attributes>
3780     </example>
3781
3782     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
3783       <description>DSP_Lib SVM example</description>
3784       <board name="uVision Simulator" vendor="Keil"/>
3785       <project>
3786         <environment name="uv" load="arm_svm_example.uvprojx"/>
3787       </project>
3788       <attributes>
3789         <component Cclass="CMSIS" Cgroup="CORE"/>
3790         <component Cclass="CMSIS" Cgroup="DSP"/>
3791         <component Cclass="Device" Cgroup="Startup"/>
3792         <category>Getting Started</category>
3793       </attributes>
3794     </example>
3795
3796     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3797       <description>DSP_Lib Variance example</description>
3798       <board name="uVision Simulator" vendor="Keil"/>
3799       <project>
3800         <environment name="uv" load="arm_variance_example.uvprojx"/>
3801       </project>
3802       <attributes>
3803         <component Cclass="CMSIS" Cgroup="CORE"/>
3804         <component Cclass="CMSIS" Cgroup="DSP"/>
3805         <component Cclass="Device" Cgroup="Startup"/>
3806         <category>Getting Started</category>
3807       </attributes>
3808     </example>
3809
3810     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3811       <description>CMSIS-RTOS2 Blinky example</description>
3812       <board name="uVision Simulator" vendor="Keil"/>
3813       <project>
3814         <environment name="uv" load="Blinky.uvprojx"/>
3815       </project>
3816       <attributes>
3817         <component Cclass="CMSIS" Cgroup="CORE"/>
3818         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3819         <component Cclass="Device" Cgroup="Startup"/>
3820         <category>Getting Started</category>
3821       </attributes>
3822     </example>
3823
3824     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3825       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3826       <board name="uVision Simulator" vendor="Keil"/>
3827       <project>
3828         <environment name="uv" load="Blinky.uvprojx"/>
3829       </project>
3830       <attributes>
3831         <component Cclass="CMSIS" Cgroup="CORE"/>
3832         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3833         <component Cclass="Device" Cgroup="Startup"/>
3834         <category>Getting Started</category>
3835       </attributes>
3836     </example>
3837
3838     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3839       <description>CMSIS-RTOS2 Message Queue Example</description>
3840       <board name="uVision Simulator" vendor="Keil"/>
3841       <project>
3842         <environment name="uv" load="MsqQueue.uvprojx"/>
3843       </project>
3844       <attributes>
3845         <component Cclass="CMSIS" Cgroup="CORE"/>
3846         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3847         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3848         <component Cclass="Device" Cgroup="Startup"/>
3849         <category>Getting Started</category>
3850       </attributes>
3851     </example>
3852
3853     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3854       <description>CMSIS-RTOS2 Memory Pool Example</description>
3855       <board name="uVision Simulator" vendor="Keil"/>
3856       <project>
3857         <environment name="uv" load="MemPool.uvprojx"/>
3858       </project>
3859       <attributes>
3860         <component Cclass="CMSIS" Cgroup="CORE"/>
3861         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3862         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3863         <component Cclass="Device" Cgroup="Startup"/>
3864         <category>Getting Started</category>
3865       </attributes>
3866     </example>
3867
3868     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3869       <description>Bare-metal secure/non-secure example without RTOS</description>
3870       <board name="uVision Simulator" vendor="Keil"/>
3871       <project>
3872         <environment name="uv" load="NoRTOS.uvmpw"/>
3873       </project>
3874       <attributes>
3875         <component Cclass="CMSIS" Cgroup="CORE"/>
3876         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3877         <component Cclass="Device" Cgroup="Startup"/>
3878         <category>Getting Started</category>
3879       </attributes>
3880     </example>
3881
3882     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3883       <description>Secure/non-secure RTOS example with thread context management</description>
3884       <board name="uVision Simulator" vendor="Keil"/>
3885       <project>
3886         <environment name="uv" load="RTOS.uvmpw"/>
3887       </project>
3888       <attributes>
3889         <component Cclass="CMSIS" Cgroup="CORE"/>
3890         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3891         <component Cclass="Device" Cgroup="Startup"/>
3892         <category>Getting Started</category>
3893       </attributes>
3894     </example>
3895
3896     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3897       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3898       <board name="uVision Simulator" vendor="Keil"/>
3899       <project>
3900         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3901       </project>
3902       <attributes>
3903         <component Cclass="CMSIS" Cgroup="CORE"/>
3904         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3905         <component Cclass="Device" Cgroup="Startup"/>
3906         <category>Getting Started</category>
3907       </attributes>
3908     </example>
3909
3910     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
3911       <description>CMSIS-RTOS2 Blinky example</description>
3912       <board name="EWARM Simulator" vendor="IAR"/>
3913       <project>
3914         <environment name="iar" load="Blinky/Blinky.ewp"/>
3915       </project>
3916       <attributes>
3917         <component Cclass="CMSIS" Cgroup="CORE"/>
3918         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3919         <component Cclass="Device" Cgroup="Startup"/>
3920         <category>Getting Started</category>
3921       </attributes>
3922     </example>
3923
3924     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
3925       <description>CMSIS-RTOS2 Message Queue Example</description>
3926       <board name="EWARM Simulator" vendor="IAR"/>
3927       <project>
3928         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
3929       </project>
3930       <attributes>
3931         <component Cclass="CMSIS" Cgroup="CORE"/>
3932         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3933         <component Cclass="Device" Cgroup="Startup"/>
3934         <category>Getting Started</category>
3935       </attributes>
3936     </example>
3937
3938   </examples>
3939
3940 </package>