1 /*-----------------------------------------------------------------------------
3 * Purpose: cmsis_cv header
4 *----------------------------------------------------------------------------
5 * Copyright (c) 2017 ARM Limited. All rights reserved.
6 *----------------------------------------------------------------------------*/
11 #include "CV_Config.h"
13 /* Expansion macro used to create CMSIS Driver references */
14 #define EXPAND_SYMBOL(name, port) name##port
15 #define CREATE_SYMBOL(name, port) EXPAND_SYMBOL(name, port)
19 extern uint32_t SIM_CYCCNT;
22 // SVC interrupt callback
23 extern void (*TST_IRQHandler)(void);
26 extern void cmsis_cv (void);
29 #ifdef RTE_CV_COREINSTR
30 extern void TC_CoreInstr_NOP (void);
31 extern void TC_CoreInstr_REV (void);
32 extern void TC_CoreInstr_REV16 (void);
33 extern void TC_CoreInstr_REVSH (void);
34 extern void TC_CoreInstr_ROR (void);
35 extern void TC_CoreInstr_RBIT (void);
36 extern void TC_CoreInstr_CLZ (void);
37 extern void TC_CoreInstr_SSAT (void);
38 extern void TC_CoreInstr_USAT (void);
41 #ifdef RTE_CV_COREFUNC
42 #if defined(__CORTEX_M)
43 extern void TC_CoreFunc_EnDisIRQ (void);
44 extern void TC_CoreFunc_Control (void);
45 extern void TC_CoreFunc_IPSR (void);
46 extern void TC_CoreFunc_APSR (void);
47 extern void TC_CoreFunc_PSP (void);
48 extern void TC_CoreFunc_MSP (void);
50 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
51 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
53 extern void TC_CoreFunc_PSPLIM (void);
54 extern void TC_CoreFunc_PSPLIM_NS (void);
55 extern void TC_CoreFunc_MSPLIM (void);
56 extern void TC_CoreFunc_MSPLIM_NS (void);
60 extern void TC_CoreFunc_PRIMASK (void);
62 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
63 (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
64 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
66 extern void TC_CoreFunc_FAULTMASK (void);
67 extern void TC_CoreFunc_BASEPRI (void);
71 #if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
72 (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
74 extern void TC_CoreFunc_FPSCR (void);
77 #elif defined(__CORTEX_A)
78 extern void TC_CoreAFunc_IRQ (void);
79 extern void TC_CoreAFunc_FPSCR (void);
80 extern void TC_CoreAFunc_CPSR (void);
81 extern void TC_CoreAFunc_Mode (void);
82 extern void TC_CoreAFunc_SP (void);
83 extern void TC_CoreAFunc_SP_usr (void);
84 extern void TC_CoreAFunc_FPEXC (void);
85 extern void TC_CoreAFunc_ACTLR (void);
86 extern void TC_CoreAFunc_CPACR (void);
87 extern void TC_CoreAFunc_DFSR (void);
88 extern void TC_CoreAFunc_IFSR (void);
89 extern void TC_CoreAFunc_ISR (void);
90 extern void TC_CoreAFunc_CBAR (void);
91 extern void TC_CoreAFunc_TTBR0 (void);
92 extern void TC_CoreAFunc_DACR (void);
93 extern void TC_CoreAFunc_SCTLR (void);
94 extern void TC_CoreAFunc_ACTRL (void);
95 extern void TC_CoreAFunc_MPIDR (void);
96 extern void TC_CoreAFunc_VBAR (void);
97 extern void TC_CoreAFunc_MVBAR (void);
101 #ifdef RTE_CV_MPUFUNC
102 #if defined(__MPU_PRESENT) && __MPU_PRESENT
103 extern void TC_MPU_SetClear (void);
104 extern void TC_MPU_Load (void);
108 #ifdef RTE_CV_GENTIMER
109 extern void TC_GenTimer_CNTFRQ (void);
110 extern void TC_GenTimer_CNTP_TVAL (void);
111 extern void TC_GenTimer_CNTP_CTL (void);
112 extern void TC_GenTimer_CNTPCT(void);
113 extern void TC_GenTimer_CNTP_CVAL(void);
116 #ifdef RTE_CV_L1CACHE
117 extern void TC_L1Cache_EnDisable(void);
118 extern void TC_L1Cache_EnDisableBTAC(void);
119 extern void TC_L1Cache_log2_up(void);
120 extern void TC_L1Cache_InvalidateDCacheAll(void);
121 extern void TC_L1Cache_CleanDCacheAll(void);
122 extern void TC_L1Cache_CleanInvalidateDCacheAll(void);
125 #endif /* __CMSIS_CV_H */