begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.5.2-dev0">
  12       Active development...
  13       CMSIS-RTOS2:
  14         - RTX 5.5.1 (see revision history for details)
  15     </release>
  16     <release version="5.5.1" date="2019-03-20">
  17       The following folders are deprecated
  18         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  19
  20       CMSIS-Core(M): 5.2.1 (see revision history for details)
  21         - Fixed compilation issue in cmsis_armclang_ltm.h
  22     </release>
  23     <release version="5.5.0" date="2019-03-18">
  24       The following folders have been removed:
  25         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  26         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  27       The following folders are deprecated
  28         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  29
  30       CMSIS-Core(M): 5.2.0 (see revision history for details)
  31         - Reworked Stack/Heap configuration for ARM startup files.
  32         - Added Cortex-M35P device support.
  33         - Added generic Armv8.1-M Mainline device support.
  34       CMSIS-Core(A): 1.1.3 (see revision history for details)
  35       CMSIS-DSP: 1.6.0 (see revision history for details)
  36         - reworked DSP library source files
  37         - reworked DSP library documentation
  38         - Changed DSP folder structure
  39         - moved DSP libraries to folder ./DSP/Lib
  40         - ARM DSP Libraries are built with ARMCLANG
  41         - Added DSP Libraries Source variant
  42       CMSIS-RTOS2:
  43         - RTX 5.5.0 (see revision history for details)
  44       CMSIS-Driver: 2.7.0
  45         - Added WiFi Interface API 1.0.0-beta
  46         - Added components for project specific driver implementations
  47       CMSIS-Pack: 1.6.0 (see revision history for details)
  48       Devices:
  49         - Added Cortex-M35P and ARMv81MML device templates.
  50         - Fixed C-Startup Code for GCC (aligned with other compilers)
  51       Utilities:
  52         - SVDConv 3.3.25
  53         - PackChk 1.3.82
  54     </release>
  55     <release version="5.4.0" date="2018-08-01">
  56       Aligned pack structure with repository.
  57       The following folders are deprecated:
  58         - CMSIS/Include/
  59         - CMSIS/DSP_Lib/
  60
  61       CMSIS-Core(M): 5.1.2 (see revision history for details)
  62         - Added Cortex-M1 support (beta).
  63       CMSIS-Core(A): 1.1.2 (see revision history for details)
  64       CMSIS-NN: 1.1.0
  65         - Added new math functions.
  66       CMSIS-RTOS2:
  67         - API 2.1.3 (see revision history for details)
  68         - RTX 5.4.0 (see revision history for details)
  69           * Updated exception handling on Cortex-A
  70       CMSIS-Driver:
  71         - Flash Driver API V2.2.0
  72       Utilities:
  73         - SVDConv 3.3.21
  74         - PackChk 1.3.71
  75     </release>
  76     <release version="5.3.0" date="2018-02-22">
  77       Updated Arm company brand.
  78       CMSIS-Core(M): 5.1.1 (see revision history for details)
  79       CMSIS-Core(A): 1.1.1 (see revision history for details)
  80       CMSIS-DAP: 2.0.0 (see revision history for details)
  81       CMSIS-NN: 1.0.0
  82         - Initial contribution of the bare metal Neural Network Library.
  83       CMSIS-RTOS2:
  84         - RTX 5.3.0 (see revision history for details)
  85         - OS Tick API 1.0.1
  86     </release>
  87     <release version="5.2.0" date="2017-11-16">
  88       CMSIS-Core(M): 5.1.0 (see revision history for details)
  89         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  90         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  91       CMSIS-Core(A): 1.1.0 (see revision history for details)
  92         - Added compiler_iccarm.h.
  93         - Added additional access functions for physical timer.
  94       CMSIS-DAP: 1.2.0 (see revision history for details)
  95       CMSIS-DSP: 1.5.2 (see revision history for details)
  96       CMSIS-Driver: 2.6.0 (see revision history for details)
  97         - CAN Driver API V1.2.0
  98         - NAND Driver API V2.3.0
  99       CMSIS-RTOS:
 100         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 101       CMSIS-RTOS2:
 102         - API 2.1.2 (see revision history for details)
 103         - RTX 5.2.3 (see revision history for details)
 104       Devices:
 105         - Added GCC startup and linker script for Cortex-A9.
 106         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 107         - Added IAR startup code for Cortex-A9
 108     </release>
 109     <release version="5.1.1" date="2017-09-19">
 110       CMSIS-RTOS2:
 111       - RTX 5.2.1 (see revision history for details)
 112     </release>
 113     <release version="5.1.0" date="2017-08-04">
 114       CMSIS-Core(M): 5.0.2 (see revision history for details)
 115       - Changed Version Control macros to be core agnostic.
 116       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 117       CMSIS-Core(A): 1.0.0 (see revision history for details)
 118       - Initial release
 119       - IRQ Controller API 1.0.0
 120       CMSIS-Driver: 2.05 (see revision history for details)
 121       - All typedefs related to status have been made volatile.
 122       CMSIS-RTOS2:
 123       - API 2.1.1 (see revision history for details)
 124       - RTX 5.2.0 (see revision history for details)
 125       - OS Tick API 1.0.0
 126       CMSIS-DSP: 1.5.2 (see revision history for details)
 127       - Fixed GNU Compiler specific diagnostics.
 128       CMSIS-Pack: 1.5.0 (see revision history for details)
 129       - added System Description File (*.SDF) Format
 130       CMSIS-Zone: 0.0.1 (Preview)
 131       - Initial specification draft
 132     </release>
 133     <release version="5.0.1" date="2017-02-03">
 134       Package Description:
 135       - added taxonomy for Cclass RTOS
 136       CMSIS-RTOS2:
 137       - API 2.1   (see revision history for details)
 138       - RTX 5.1.0 (see revision history for details)
 139       CMSIS-Core: 5.0.1 (see revision history for details)
 140       - Added __PACKED_STRUCT macro
 141       - Added uVisior support
 142       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 143       - Updated template for secure main function (main_s.c)
 144       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 145       CMSIS-DSP: 1.5.1 (see revision history for details)
 146       - added ARMv8M DSP libraries.
 147       CMSIS-Pack:1.4.9 (see revision history for details)
 148       - added Pack Index File specification and schema file
 149     </release>
 150     <release version="5.0.0" date="2016-11-11">
 151       Changed open source license to Apache 2.0
 152       CMSIS_Core:
 153        - Added support for Cortex-M23 and Cortex-M33.
 154        - Added ARMv8-M device configurations for mainline and baseline.
 155        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 156        - Added cmsis_compiler.h to unify compiler behaviour.
 157        - Updated function SCB_EnableICache (for Cortex-M7).
 158        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 159       CMSIS-RTOS:
 160         - bug fix in RTX 4.82 (see revision history for details)
 161       CMSIS-RTOS2:
 162         - new API including compatibility layer to CMSIS-RTOS
 163         - reference implementation based on RTX5
 164         - supports all Cortex-M variants including TrustZone for ARMv8-M
 165       CMSIS-SVD:
 166        - reworked SVD format documentation
 167        - removed SVD file database documentation as SVD files are distributed in packs
 168        - updated SVDConv for Win32 and Linux
 169       CMSIS-DSP:
 170        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 171        - Added DSP libraries build projects to CMSIS pack.
 172     </release>
 173     <release version="4.5.0" date="2015-10-28">
 174       - CMSIS-Core     4.30.0  (see revision history for details)
 175       - CMSIS-DAP      1.1.0   (unchanged)
 176       - CMSIS-Driver   2.04.0  (see revision history for details)
 177       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 178       - CMSIS-Pack     1.4.1   (see revision history for details)
 179       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 180       - CMSIS-SVD      1.3.1   (see revision history for details)
 181     </release>
 182     <release version="4.4.0" date="2015-09-11">
 183       - CMSIS-Core     4.20   (see revision history for details)
 184       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 185       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 186       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 187       - CMSIS-RTOS
 188         -- API         1.02   (unchanged)
 189         -- RTX         4.79   (see revision history for details)
 190       - CMSIS-SVD      1.3.0  (see revision history for details)
 191       - CMSIS-DAP      1.1.0  (extended with SWO support)
 192     </release>
 193     <release version="4.3.0" date="2015-03-20">
 194       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 195       - CMSIS-DSP      1.4.5  (see revision history for details)
 196       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 197       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 198       - CMSIS-RTOS
 199         -- API         1.02   (unchanged)
 200         -- RTX         4.78   (see revision history for details)
 201       - CMSIS-SVD      1.2    (unchanged)
 202     </release>
 203     <release version="4.2.0" date="2014-09-24">
 204       Adding Cortex-M7 support
 205       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 206       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 207       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 208       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 209       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 210     </release>
 211     <release version="4.1.1" date="2014-06-30">
 212       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 213     </release>
 214     <release version="4.1.0" date="2014-06-12">
 215       - CMSIS-Driver   2.02  (incompatible update)
 216       - CMSIS-Pack     1.3   (see revision history for details)
 217       - CMSIS-DSP      1.4.2 (unchanged)
 218       - CMSIS-Core     3.30  (unchanged)
 219       - CMSIS-RTOS RTX 4.74  (unchanged)
 220       - CMSIS-RTOS API 1.02  (unchanged)
 221       - CMSIS-SVD      1.10  (unchanged)
 222       PACK:
 223       - removed G++ specific files from PACK
 224       - added Component Startup variant "C Startup"
 225       - added Pack Checking Utility
 226       - updated conditions to reflect tool-chain dependency
 227       - added Taxonomy for Graphics
 228       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 229     </release>
 230     <release version="4.0.0">
 231       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 232       - CMSIS-Pack     1.1   Preliminary
 233       - CMSIS-DSP      1.4.2 (see revision history for details)
 234       - CMSIS-Core     3.30  (see revision history for details)
 235       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 236       - CMSIS-RTOS API 1.02  (unchanged)
 237       - CMSIS-SVD      1.10  (unchanged)
 238     </release>
 239     <release version="3.20.4">
 240       - CMSIS-RTOS 4.74 (see revision history for details)
 241       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 242     </release>
 243     <release version="3.20.3">
 244       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 245       - CMSIS-RTOS 4.73 (see revision history for details)
 246     </release>
 247     <release version="3.20.2">
 248       - CMSIS-Pack documentation has been added
 249       - CMSIS-Drivers header and documentation have been added to PACK
 250       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 251     </release>
 252     <release version="3.20.1">
 253       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 254       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 255     </release>
 256     <release version="3.20.0">
 257       The software portions that are deployed in the application program are now under a BSD license which allows usage
 258       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 259       The individual components have been update as listed below:
 260       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 261       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 262       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 263       - CMSIS-SVD is unchanged.
 264     </release>
 265   </releases>
 266
 267   <taxonomy>
 268     <description Cclass="Audio">Software components for audio processing</description>
 269     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 270     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 271     <description Cclass="Compiler">Compiler Software Extensions</description>
 272     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 273     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 274     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 275     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 276     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 277     <description Cclass="File System">File Drive Support and File System</description>
 278     <description Cclass="IoT Client">IoT cloud client connector</description>
 279     <description Cclass="IoT Utility">IoT specific software utility</description>
 280     <description Cclass="Graphics">Graphical User Interface</description>
 281     <description Cclass="Network">Network Stack using Internet Protocols</description>
 282     <description Cclass="RTOS">Real-time Operating System</description>
 283     <description Cclass="Security">Encryption for secure communication or storage</description>
 284     <description Cclass="USB">Universal Serial Bus Stack</description>
 285     <description Cclass="Utility">Generic software utility components</description>
 286   </taxonomy>
 287
 288   <devices>
 289     <!-- ******************************  Cortex-M0  ****************************** -->
 290     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 291       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 292       <description>
 293 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 294 - simple, easy-to-use programmers model
 295 - highly efficient ultra-low power operation
 296 - excellent code density
 297 - deterministic, high-performance interrupt handling
 298 - upward compatibility with the rest of the Cortex-M processor family.
 299       </description>
 300       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 301       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 302       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 303       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 304
 305       <device Dname="ARMCM0">
 306         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 307         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 308       </device>
 309     </family>
 310
 311     <!-- ******************************  Cortex-M0P  ****************************** -->
 312     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 313       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 314       <description>
 315 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 316 - simple, easy-to-use programmers model
 317 - highly efficient ultra-low power operation
 318 - excellent code density
 319 - deterministic, high-performance interrupt handling
 320 - upward compatibility with the rest of the Cortex-M processor family.
 321       </description>
 322       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 323       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 324       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 325       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 326
 327       <device Dname="ARMCM0P">
 328         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 329         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 330       </device>
 331
 332       <device Dname="ARMCM0P_MPU">
 333         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 334         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 335       </device>
 336     </family>
 337
 338     <!-- ******************************  Cortex-M1  ****************************** -->
 339     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 340       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 341       <description>
 342 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 343 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 344       </description>
 345       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 346       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 347       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 348       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 349
 350       <device Dname="ARMCM1">
 351         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 352         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 353       </device>
 354     </family>
 355
 356     <!-- ******************************  Cortex-M3  ****************************** -->
 357     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 358       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 359       <description>
 360 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 361 - simple, easy-to-use programmers model
 362 - highly efficient ultra-low power operation
 363 - excellent code density
 364 - deterministic, high-performance interrupt handling
 365 - upward compatibility with the rest of the Cortex-M processor family.
 366       </description>
 367       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 368       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 369       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 370       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 371
 372       <device Dname="ARMCM3">
 373         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 374         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 375       </device>
 376     </family>
 377
 378     <!-- ******************************  Cortex-M4  ****************************** -->
 379     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 380       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 381       <description>
 382 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 383 - simple, easy-to-use programmers model
 384 - highly efficient ultra-low power operation
 385 - excellent code density
 386 - deterministic, high-performance interrupt handling
 387 - upward compatibility with the rest of the Cortex-M processor family.
 388       </description>
 389       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 390       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 391       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 392       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 393
 394       <device Dname="ARMCM4">
 395         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 396         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 397       </device>
 398
 399       <device Dname="ARMCM4_FP">
 400         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 401         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 402       </device>
 403     </family>
 404
 405     <!-- ******************************  Cortex-M7  ****************************** -->
 406     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 407       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 408       <description>
 409 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 410 - simple, easy-to-use programmers model
 411 - highly efficient ultra-low power operation
 412 - excellent code density
 413 - deterministic, high-performance interrupt handling
 414 - upward compatibility with the rest of the Cortex-M processor family.
 415       </description>
 416       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 417       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 418       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 419       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 420
 421       <device Dname="ARMCM7">
 422         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 423         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 424       </device>
 425
 426       <device Dname="ARMCM7_SP">
 427         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 428         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 429       </device>
 430
 431       <device Dname="ARMCM7_DP">
 432         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 433         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 434       </device>
 435     </family>
 436
 437     <!-- ******************************  Cortex-M23  ********************** -->
 438     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 439       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 440       <description>
 441 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 442 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 443 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 444       </description>
 445       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 446       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 447       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 448       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 449       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 450       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 451
 452       <device Dname="ARMCM23">
 453         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 454         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 455       </device>
 456
 457       <device Dname="ARMCM23_TZ">
 458         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 459         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 460       </device>
 461     </family>
 462
 463     <!-- ******************************  Cortex-M33  ****************************** -->
 464     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 465       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 466       <description>
 467 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 468 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 469       </description>
 470       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 471       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 472       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 473       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 474       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 475       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 476
 477       <device Dname="ARMCM33">
 478         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 479         <description>
 480           no DSP Instructions, no Floating Point Unit, no TrustZone
 481         </description>
 482         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 483       </device>
 484
 485       <device Dname="ARMCM33_TZ">
 486         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 487         <description>
 488           no DSP Instructions, no Floating Point Unit, TrustZone
 489         </description>
 490         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 491       </device>
 492
 493       <device Dname="ARMCM33_DSP_FP">
 494         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 495         <description>
 496           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 497         </description>
 498         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 499       </device>
 500
 501       <device Dname="ARMCM33_DSP_FP_TZ">
 502         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 503         <description>
 504           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 505         </description>
 506         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 507       </device>
 508     </family>
 509
 510     <!-- ******************************  Cortex-M35P  ****************************** -->
 511     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 512       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 513       <description>
 514 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 515 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 516       </description>
 517
 518       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 519       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 520       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 521       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 522       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 523       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 524
 525       <device Dname="ARMCM35P">
 526         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 527         <description>
 528           no DSP Instructions, no Floating Point Unit, no TrustZone
 529         </description>
 530         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 531       </device>
 532
 533       <device Dname="ARMCM35P_TZ">
 534         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 535         <description>
 536           no DSP Instructions, no Floating Point Unit, TrustZone
 537         </description>
 538         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 539       </device>
 540
 541       <device Dname="ARMCM35P_DSP_FP">
 542         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 543         <description>
 544           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 545         </description>
 546         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 547       </device>
 548
 549       <device Dname="ARMCM35P_DSP_FP_TZ">
 550         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 551         <description>
 552           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 553         </description>
 554         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 555       </device>
 556     </family>
 557
 558     <!-- ******************************  ARMSC000  ****************************** -->
 559     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 560       <description>
 561 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 562 - simple, easy-to-use programmers model
 563 - highly efficient ultra-low power operation
 564 - excellent code density
 565 - deterministic, high-performance interrupt handling
 566       </description>
 567       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 568       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 569       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 570       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 571
 572       <device Dname="ARMSC000">
 573         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 574         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 575       </device>
 576     </family>
 577
 578     <!-- ******************************  ARMSC300  ****************************** -->
 579     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 580       <description>
 581 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 582 - simple, easy-to-use programmers model
 583 - highly efficient ultra-low power operation
 584 - excellent code density
 585 - deterministic, high-performance interrupt handling
 586       </description>
 587       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 588       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 589       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 590       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 591
 592       <device Dname="ARMSC300">
 593         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 594         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 595       </device>
 596     </family>
 597
 598     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 599     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 600       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 601       <description>
 602 Armv8-M Baseline based device with TrustZone
 603       </description>
 604       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 605       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 606       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 607       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 608       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 609       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 610
 611       <device Dname="ARMv8MBL">
 612         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 613         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 614       </device>
 615     </family>
 616
 617     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 618     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 619       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 620       <description>
 621 Armv8-M Mainline based device with TrustZone
 622       </description>
 623       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 624       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 625       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 626       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 627       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 628       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 629
 630       <device Dname="ARMv8MML">
 631         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 632         <description>
 633           no DSP Instructions, no Floating Point Unit, TrustZone
 634         </description>
 635         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 636       </device>
 637
 638       <device Dname="ARMv8MML_DSP">
 639         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 640         <description>
 641           DSP Instructions, no Floating Point Unit, TrustZone
 642         </description>
 643         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 644       </device>
 645
 646       <device Dname="ARMv8MML_SP">
 647         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 648         <description>
 649           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 650         </description>
 651         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 652       </device>
 653
 654       <device Dname="ARMv8MML_DSP_SP">
 655         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 656         <description>
 657           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 658         </description>
 659         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 660       </device>
 661
 662       <device Dname="ARMv8MML_DP">
 663         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 664         <description>
 665           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 666         </description>
 667         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 668       </device>
 669
 670       <device Dname="ARMv8MML_DSP_DP">
 671         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 672         <description>
 673           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 674         </description>
 675         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 676       </device>
 677     </family>
 678
 679     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 680     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 681       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 682       <description>
 683 Armv8.1-M Mainline based device with TrustZone and MVE
 684       </description>
 685       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 686       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 687       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 688       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 689       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 690       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 691
 692
 693       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 694         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 695         <description>
 696           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 697         </description>
 698         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 699       </device>
 700     </family>
 701
 702     <!-- ******************************  Cortex-A5  ****************************** -->
 703     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 704       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 705       <description>
 706 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 707 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 708 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 709       </description>
 710
 711       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 712       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 713
 714       <device Dname="ARMCA5">
 715         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 716         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 717       </device>
 718     </family>
 719
 720     <!-- ******************************  Cortex-A7  ****************************** -->
 721     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 722       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 723       <description>
 724 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 725 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 726 an optional integrated GIC, and an optional L2 cache controller.
 727       </description>
 728
 729       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 730       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 731
 732       <device Dname="ARMCA7">
 733         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 734         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 735       </device>
 736     </family>
 737
 738     <!-- ******************************  Cortex-A9  ****************************** -->
 739     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 740       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 741       <description>
 742 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 743 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 744 and 8-bit Java bytecodes in Jazelle state.
 745       </description>
 746
 747       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 748       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 749
 750       <device Dname="ARMCA9">
 751         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 752         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 753       </device>
 754     </family>
 755   </devices>
 756
 757
 758   <apis>
 759     <!-- CMSIS Device API -->
 760     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 761       <description>Device interrupt controller interface</description>
 762       <files>
 763         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 764       </files>
 765     </api>
 766     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 767       <description>RTOS Kernel system tick timer interface</description>
 768       <files>
 769         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 770       </files>
 771     </api>
 772     <!-- CMSIS-RTOS API -->
 773     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 774       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 775       <files>
 776         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 777       </files>
 778     </api>
 779     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 780       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 781       <files>
 782         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 783         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 784       </files>
 785     </api>
 786     <!-- CMSIS Driver API -->
 787     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 788       <description>USART Driver API for Cortex-M</description>
 789       <files>
 790         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 791         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 792       </files>
 793     </api>
 794     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 795       <description>SPI Driver API for Cortex-M</description>
 796       <files>
 797         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 798         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 799       </files>
 800     </api>
 801     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 802       <description>SAI Driver API for Cortex-M</description>
 803       <files>
 804         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 805         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 806       </files>
 807     </api>
 808     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 809       <description>I2C Driver API for Cortex-M</description>
 810       <files>
 811         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 812         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 813       </files>
 814     </api>
 815     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 816       <description>CAN Driver API for Cortex-M</description>
 817       <files>
 818         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 819         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 820       </files>
 821     </api>
 822     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 823       <description>Flash Driver API for Cortex-M</description>
 824       <files>
 825         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 826         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 827       </files>
 828     </api>
 829     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 830       <description>MCI Driver API for Cortex-M</description>
 831       <files>
 832         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 833         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 834       </files>
 835     </api>
 836     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 837       <description>NAND Flash Driver API for Cortex-M</description>
 838       <files>
 839         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 840         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 841       </files>
 842     </api>
 843     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 844       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 845       <files>
 846         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 847         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 848         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 849       </files>
 850     </api>
 851     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 852       <description>Ethernet MAC Driver API for Cortex-M</description>
 853       <files>
 854         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 855         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 856       </files>
 857     </api>
 858     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 859       <description>Ethernet PHY Driver API for Cortex-M</description>
 860       <files>
 861         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 862         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 863       </files>
 864     </api>
 865     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 866       <description>USB Device Driver API for Cortex-M</description>
 867       <files>
 868         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 869         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 870       </files>
 871     </api>
 872     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 873       <description>USB Host Driver API for Cortex-M</description>
 874       <files>
 875         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 876         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 877       </files>
 878     </api>
 879     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0-beta" exclusive="0">
 880       <description>WiFi driver</description>
 881       <files>
 882         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 883         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 884       </files>
 885     </api>
 886   </apis>
 887
 888   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 889   <conditions>
 890     <!-- compiler -->
 891     <condition id="ARMCC6">
 892       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 893       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 894     </condition>
 895     <condition id="ARMCC5">
 896       <require Tcompiler="ARMCC" Toptions="AC5"/>
 897     </condition>
 898     <condition id="ARMCC">
 899       <require Tcompiler="ARMCC"/>
 900     </condition>
 901     <condition id="GCC">
 902       <require Tcompiler="GCC"/>
 903     </condition>
 904     <condition id="IAR">
 905       <require Tcompiler="IAR"/>
 906     </condition>
 907     <condition id="ARMCC GCC">
 908       <accept Tcompiler="ARMCC"/>
 909       <accept Tcompiler="GCC"/>
 910     </condition>
 911     <condition id="ARMCC GCC IAR">
 912       <accept Tcompiler="ARMCC"/>
 913       <accept Tcompiler="GCC"/>
 914       <accept Tcompiler="IAR"/>
 915     </condition>
 916
 917     <!-- Arm architecture -->
 918     <condition id="ARMv6-M Device">
 919       <description>Armv6-M architecture based device</description>
 920       <accept Dcore="Cortex-M0"/>
 921       <accept Dcore="Cortex-M1"/>
 922       <accept Dcore="Cortex-M0+"/>
 923       <accept Dcore="SC000"/>
 924     </condition>
 925     <condition id="ARMv7-M Device">
 926       <description>Armv7-M architecture based device</description>
 927       <accept Dcore="Cortex-M3"/>
 928       <accept Dcore="Cortex-M4"/>
 929       <accept Dcore="Cortex-M7"/>
 930       <accept Dcore="SC300"/>
 931     </condition>
 932     <condition id="ARMv8-M Device">
 933       <description>Armv8-M architecture based device</description>
 934       <accept Dcore="ARMV8MBL"/>
 935       <accept Dcore="ARMV8MML"/>
 936       <accept Dcore="ARMV81MML"/>
 937       <accept Dcore="Cortex-M23"/>
 938       <accept Dcore="Cortex-M33"/>
 939       <accept Dcore="Cortex-M35P"/>
 940     </condition>
 941     <condition id="ARMv8-M TZ Device">
 942       <description>Armv8-M architecture based device with TrustZone</description>
 943       <require condition="ARMv8-M Device"/>
 944       <require Dtz="TZ"/>
 945     </condition>
 946     <condition id="ARMv6_7-M Device">
 947       <description>Armv6_7-M architecture based device</description>
 948       <accept condition="ARMv6-M Device"/>
 949       <accept condition="ARMv7-M Device"/>
 950     </condition>
 951     <condition id="ARMv6_7_8-M Device">
 952       <description>Armv6_7_8-M architecture based device</description>
 953       <accept condition="ARMv6-M Device"/>
 954       <accept condition="ARMv7-M Device"/>
 955       <accept condition="ARMv8-M Device"/>
 956     </condition>
 957     <condition id="ARMv7-A Device">
 958       <description>Armv7-A architecture based device</description>
 959       <accept Dcore="Cortex-A5"/>
 960       <accept Dcore="Cortex-A7"/>
 961       <accept Dcore="Cortex-A9"/>
 962     </condition>
 963
 964     <!-- ARM core -->
 965     <condition id="CM0">
 966       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 967       <accept Dcore="Cortex-M0"/>
 968       <accept Dcore="Cortex-M0+"/>
 969       <accept Dcore="SC000"/>
 970     </condition>
 971     <condition id="CM1">
 972       <description>Cortex-M1</description>
 973       <require Dcore="Cortex-M1"/>
 974     </condition>
 975     <condition id="CM3">
 976       <description>Cortex-M3 or SC300 processor based device</description>
 977       <accept Dcore="Cortex-M3"/>
 978       <accept Dcore="SC300"/>
 979     </condition>
 980     <condition id="CM4">
 981       <description>Cortex-M4 processor based device</description>
 982       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 983     </condition>
 984     <condition id="CM4_FP">
 985       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 986       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 987       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 988       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 989     </condition>
 990     <condition id="CM7">
 991       <description>Cortex-M7 processor based device</description>
 992       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 993     </condition>
 994     <condition id="CM7_FP">
 995       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 996       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 997       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 998     </condition>
 999     <condition id="CM7_SP">
1000       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1001       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1002     </condition>
1003     <condition id="CM7_DP">
1004       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1005       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1006     </condition>
1007     <condition id="CM23">
1008       <description>Cortex-M23 processor based device</description>
1009       <require Dcore="Cortex-M23"/>
1010     </condition>
1011     <condition id="CM33">
1012       <description>Cortex-M33 processor based device</description>
1013       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1014     </condition>
1015     <condition id="CM33_FP">
1016       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1017       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1018     </condition>
1019     <condition id="CM35P">
1020       <description>Cortex-M35P processor based device</description>
1021       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1022     </condition>
1023     <condition id="CM35P_FP">
1024       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1025       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1026     </condition>
1027     <condition id="ARMv8MBL">
1028       <description>Armv8-M Baseline processor based device</description>
1029       <require Dcore="ARMV8MBL"/>
1030     </condition>
1031     <condition id="ARMv8MML">
1032       <description>Armv8-M Mainline processor based device</description>
1033       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1034     </condition>
1035     <condition id="ARMv8MML_FP">
1036       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1037       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1038       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1039     </condition>
1040
1041     <condition id="CM33_NODSP_NOFPU">
1042       <description>CM33, no DSP, no FPU</description>
1043       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1044     </condition>
1045     <condition id="CM33_DSP_NOFPU">
1046       <description>CM33, DSP, no FPU</description>
1047       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1048     </condition>
1049     <condition id="CM33_NODSP_SP">
1050       <description>CM33, no DSP, SP FPU</description>
1051       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1052     </condition>
1053     <condition id="CM33_DSP_SP">
1054       <description>CM33, DSP, SP FPU</description>
1055       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1056     </condition>
1057
1058     <condition id="CM35P_NODSP_NOFPU">
1059       <description>CM35P, no DSP, no FPU</description>
1060       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1061     </condition>
1062     <condition id="CM35P_DSP_NOFPU">
1063       <description>CM35P, DSP, no FPU</description>
1064       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1065     </condition>
1066     <condition id="CM35P_NODSP_SP">
1067       <description>CM35P, no DSP, SP FPU</description>
1068       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1069     </condition>
1070     <condition id="CM35P_DSP_SP">
1071       <description>CM35P, DSP, SP FPU</description>
1072       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1073     </condition>
1074
1075     <condition id="ARMv8MML_NODSP_NOFPU">
1076       <description>Armv8-M Mainline, no DSP, no FPU</description>
1077       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1078     </condition>
1079     <condition id="ARMv8MML_DSP_NOFPU">
1080       <description>Armv8-M Mainline, DSP, no FPU</description>
1081       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1082     </condition>
1083     <condition id="ARMv8MML_NODSP_SP">
1084       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1085       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1086     </condition>
1087     <condition id="ARMv8MML_DSP_SP">
1088       <description>Armv8-M Mainline, DSP, SP FPU</description>
1089       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1090     </condition>
1091
1092     <condition id="ARMv81MML">
1093       <description>Armv8.1-M Mainline</description>
1094       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1095     </condition>
1096
1097     <condition id="CA5_CA9">
1098       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1099       <accept Dcore="Cortex-A5"/>
1100       <accept Dcore="Cortex-A9"/>
1101     </condition>
1102
1103     <condition id="CA7">
1104       <description>Cortex-A7 processor based device</description>
1105       <accept Dcore="Cortex-A7"/>
1106     </condition>
1107
1108     <!-- ARMCC compiler -->
1109     <condition id="CA_ARMCC5">
1110       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1111       <require condition="ARMv7-A Device"/>
1112       <require condition="ARMCC5"/>
1113     </condition>
1114     <condition id="CA_ARMCC6">
1115       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1116       <require condition="ARMv7-A Device"/>
1117       <require condition="ARMCC6"/>
1118     </condition>
1119
1120     <condition id="CM0_ARMCC">
1121       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1122       <require condition="CM0"/>
1123       <require Tcompiler="ARMCC"/>
1124     </condition>
1125     <condition id="CM0_LE_ARMCC">
1126       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1127       <require condition="CM0_ARMCC"/>
1128       <require Dendian="Little-endian"/>
1129     </condition>
1130     <condition id="CM0_BE_ARMCC">
1131       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1132       <require condition="CM0_ARMCC"/>
1133       <require Dendian="Big-endian"/>
1134     </condition>
1135
1136     <condition id="CM1_ARMCC">
1137       <description>Cortex-M1 based device for the Arm Compiler</description>
1138       <require condition="CM1"/>
1139       <require Tcompiler="ARMCC"/>
1140     </condition>
1141     <condition id="CM1_LE_ARMCC">
1142       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1143       <require condition="CM1_ARMCC"/>
1144       <require Dendian="Little-endian"/>
1145     </condition>
1146     <condition id="CM1_BE_ARMCC">
1147       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1148       <require condition="CM1_ARMCC"/>
1149       <require Dendian="Big-endian"/>
1150     </condition>
1151
1152     <condition id="CM3_ARMCC">
1153       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1154       <require condition="CM3"/>
1155       <require Tcompiler="ARMCC"/>
1156     </condition>
1157     <condition id="CM3_LE_ARMCC">
1158       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1159       <require condition="CM3_ARMCC"/>
1160       <require Dendian="Little-endian"/>
1161     </condition>
1162     <condition id="CM3_BE_ARMCC">
1163       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1164       <require condition="CM3_ARMCC"/>
1165       <require Dendian="Big-endian"/>
1166     </condition>
1167
1168     <condition id="CM4_ARMCC">
1169       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1170       <require condition="CM4"/>
1171       <require Tcompiler="ARMCC"/>
1172     </condition>
1173     <condition id="CM4_LE_ARMCC">
1174       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1175       <require condition="CM4_ARMCC"/>
1176       <require Dendian="Little-endian"/>
1177     </condition>
1178     <condition id="CM4_BE_ARMCC">
1179       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1180       <require condition="CM4_ARMCC"/>
1181       <require Dendian="Big-endian"/>
1182     </condition>
1183
1184     <condition id="CM4_FP_ARMCC">
1185       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1186       <require condition="CM4_FP"/>
1187       <require Tcompiler="ARMCC"/>
1188     </condition>
1189     <condition id="CM4_FP_LE_ARMCC">
1190       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1191       <require condition="CM4_FP_ARMCC"/>
1192       <require Dendian="Little-endian"/>
1193     </condition>
1194     <condition id="CM4_FP_BE_ARMCC">
1195       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1196       <require condition="CM4_FP_ARMCC"/>
1197       <require Dendian="Big-endian"/>
1198     </condition>
1199
1200     <condition id="CM7_ARMCC">
1201       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1202       <require condition="CM7"/>
1203       <require Tcompiler="ARMCC"/>
1204     </condition>
1205     <condition id="CM7_LE_ARMCC">
1206       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1207       <require condition="CM7_ARMCC"/>
1208       <require Dendian="Little-endian"/>
1209     </condition>
1210     <condition id="CM7_BE_ARMCC">
1211       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1212       <require condition="CM7_ARMCC"/>
1213       <require Dendian="Big-endian"/>
1214     </condition>
1215
1216     <condition id="CM7_FP_ARMCC">
1217       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1218       <require condition="CM7_FP"/>
1219       <require Tcompiler="ARMCC"/>
1220     </condition>
1221     <condition id="CM7_FP_LE_ARMCC">
1222       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1223       <require condition="CM7_FP_ARMCC"/>
1224       <require Dendian="Little-endian"/>
1225     </condition>
1226     <condition id="CM7_FP_BE_ARMCC">
1227       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1228       <require condition="CM7_FP_ARMCC"/>
1229       <require Dendian="Big-endian"/>
1230     </condition>
1231
1232     <condition id="CM7_SP_ARMCC">
1233       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1234       <require condition="CM7_SP"/>
1235       <require Tcompiler="ARMCC"/>
1236     </condition>
1237     <condition id="CM7_SP_LE_ARMCC">
1238       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1239       <require condition="CM7_SP_ARMCC"/>
1240       <require Dendian="Little-endian"/>
1241     </condition>
1242     <condition id="CM7_SP_BE_ARMCC">
1243       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1244       <require condition="CM7_SP_ARMCC"/>
1245       <require Dendian="Big-endian"/>
1246     </condition>
1247
1248     <condition id="CM7_DP_ARMCC">
1249       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1250       <require condition="CM7_DP"/>
1251       <require Tcompiler="ARMCC"/>
1252     </condition>
1253     <condition id="CM7_DP_LE_ARMCC">
1254       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1255       <require condition="CM7_DP_ARMCC"/>
1256       <require Dendian="Little-endian"/>
1257     </condition>
1258     <condition id="CM7_DP_BE_ARMCC">
1259       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1260       <require condition="CM7_DP_ARMCC"/>
1261       <require Dendian="Big-endian"/>
1262     </condition>
1263
1264     <condition id="CM23_ARMCC">
1265       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1266       <require condition="CM23"/>
1267       <require Tcompiler="ARMCC"/>
1268     </condition>
1269     <condition id="CM23_LE_ARMCC">
1270       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1271       <require condition="CM23_ARMCC"/>
1272       <require Dendian="Little-endian"/>
1273     </condition>
1274     <condition id="CM23_BE_ARMCC">
1275       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1276       <require condition="CM23_ARMCC"/>
1277       <require Dendian="Big-endian"/>
1278     </condition>
1279
1280     <condition id="CM33_ARMCC">
1281       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1282       <require condition="CM33"/>
1283       <require Tcompiler="ARMCC"/>
1284     </condition>
1285     <condition id="CM33_LE_ARMCC">
1286       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1287       <require condition="CM33_ARMCC"/>
1288       <require Dendian="Little-endian"/>
1289     </condition>
1290     <condition id="CM33_BE_ARMCC">
1291       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1292       <require condition="CM33_ARMCC"/>
1293       <require Dendian="Big-endian"/>
1294     </condition>
1295
1296     <condition id="CM33_FP_ARMCC">
1297       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1298       <require condition="CM33_FP"/>
1299       <require Tcompiler="ARMCC"/>
1300     </condition>
1301     <condition id="CM33_FP_LE_ARMCC">
1302       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1303       <require condition="CM33_FP_ARMCC"/>
1304       <require Dendian="Little-endian"/>
1305     </condition>
1306     <condition id="CM33_FP_BE_ARMCC">
1307       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1308       <require condition="CM33_FP_ARMCC"/>
1309       <require Dendian="Big-endian"/>
1310     </condition>
1311
1312     <condition id="CM33_NODSP_NOFPU_ARMCC">
1313       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1314       <require condition="CM33_NODSP_NOFPU"/>
1315       <require Tcompiler="ARMCC"/>
1316     </condition>
1317     <condition id="CM33_DSP_NOFPU_ARMCC">
1318       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1319       <require condition="CM33_DSP_NOFPU"/>
1320       <require Tcompiler="ARMCC"/>
1321     </condition>
1322     <condition id="CM33_NODSP_SP_ARMCC">
1323       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1324       <require condition="CM33_NODSP_SP"/>
1325       <require Tcompiler="ARMCC"/>
1326     </condition>
1327     <condition id="CM33_DSP_SP_ARMCC">
1328       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1329       <require condition="CM33_DSP_SP"/>
1330       <require Tcompiler="ARMCC"/>
1331     </condition>
1332     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1333       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1334       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1335       <require Dendian="Little-endian"/>
1336     </condition>
1337     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1338       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1339       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1340       <require Dendian="Little-endian"/>
1341     </condition>
1342     <condition id="CM33_NODSP_SP_LE_ARMCC">
1343       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1344       <require condition="CM33_NODSP_SP_ARMCC"/>
1345       <require Dendian="Little-endian"/>
1346     </condition>
1347     <condition id="CM33_DSP_SP_LE_ARMCC">
1348       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1349       <require condition="CM33_DSP_SP_ARMCC"/>
1350       <require Dendian="Little-endian"/>
1351     </condition>
1352
1353     <condition id="CM35P_ARMCC">
1354       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1355       <require condition="CM35P"/>
1356       <require Tcompiler="ARMCC"/>
1357     </condition>
1358     <condition id="CM35P_LE_ARMCC">
1359       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1360       <require condition="CM35P_ARMCC"/>
1361       <require Dendian="Little-endian"/>
1362     </condition>
1363     <condition id="CM35P_BE_ARMCC">
1364       <description>Cortex-M35P processor based device in big endian mode for the Arm Compiler</description>
1365       <require condition="CM35P_ARMCC"/>
1366       <require Dendian="Big-endian"/>
1367     </condition>
1368
1369     <condition id="CM35P_FP_ARMCC">
1370       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1371       <require condition="CM35P_FP"/>
1372       <require Tcompiler="ARMCC"/>
1373     </condition>
1374     <condition id="CM35P_FP_LE_ARMCC">
1375       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1376       <require condition="CM35P_FP_ARMCC"/>
1377       <require Dendian="Little-endian"/>
1378     </condition>
1379     <condition id="CM35P_FP_BE_ARMCC">
1380       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1381       <require condition="CM35P_FP_ARMCC"/>
1382       <require Dendian="Big-endian"/>
1383     </condition>
1384
1385     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1386       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1387       <require condition="CM35P_NODSP_NOFPU"/>
1388       <require Tcompiler="ARMCC"/>
1389     </condition>
1390     <condition id="CM35P_DSP_NOFPU_ARMCC">
1391       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1392       <require condition="CM35P_DSP_NOFPU"/>
1393       <require Tcompiler="ARMCC"/>
1394     </condition>
1395     <condition id="CM35P_NODSP_SP_ARMCC">
1396       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1397       <require condition="CM35P_NODSP_SP"/>
1398       <require Tcompiler="ARMCC"/>
1399     </condition>
1400     <condition id="CM35P_DSP_SP_ARMCC">
1401       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1402       <require condition="CM35P_DSP_SP"/>
1403       <require Tcompiler="ARMCC"/>
1404     </condition>
1405     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1406       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1407       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1408       <require Dendian="Little-endian"/>
1409     </condition>
1410     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1411       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1412       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1413       <require Dendian="Little-endian"/>
1414     </condition>
1415     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1416       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1417       <require condition="CM35P_NODSP_SP_ARMCC"/>
1418       <require Dendian="Little-endian"/>
1419     </condition>
1420     <condition id="CM35P_DSP_SP_LE_ARMCC">
1421       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1422       <require condition="CM35P_DSP_SP_ARMCC"/>
1423       <require Dendian="Little-endian"/>
1424     </condition>
1425
1426     <condition id="ARMv8MBL_ARMCC">
1427       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1428       <require condition="ARMv8MBL"/>
1429       <require Tcompiler="ARMCC"/>
1430     </condition>
1431     <condition id="ARMv8MBL_LE_ARMCC">
1432       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1433       <require condition="ARMv8MBL_ARMCC"/>
1434       <require Dendian="Little-endian"/>
1435     </condition>
1436     <condition id="ARMv8MBL_BE_ARMCC">
1437       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1438       <require condition="ARMv8MBL_ARMCC"/>
1439       <require Dendian="Big-endian"/>
1440     </condition>
1441
1442     <condition id="ARMv8MML_ARMCC">
1443       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1444       <require condition="ARMv8MML"/>
1445       <require Tcompiler="ARMCC"/>
1446     </condition>
1447     <condition id="ARMv8MML_LE_ARMCC">
1448       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1449       <require condition="ARMv8MML_ARMCC"/>
1450       <require Dendian="Little-endian"/>
1451     </condition>
1452     <condition id="ARMv8MML_BE_ARMCC">
1453       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1454       <require condition="ARMv8MML_ARMCC"/>
1455       <require Dendian="Big-endian"/>
1456     </condition>
1457
1458     <condition id="ARMv8MML_FP_ARMCC">
1459       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1460       <require condition="ARMv8MML_FP"/>
1461       <require Tcompiler="ARMCC"/>
1462     </condition>
1463     <condition id="ARMv8MML_FP_LE_ARMCC">
1464       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1465       <require condition="ARMv8MML_FP_ARMCC"/>
1466       <require Dendian="Little-endian"/>
1467     </condition>
1468     <condition id="ARMv8MML_FP_BE_ARMCC">
1469       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1470       <require condition="ARMv8MML_FP_ARMCC"/>
1471       <require Dendian="Big-endian"/>
1472     </condition>
1473
1474     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1475       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1476       <require condition="ARMv8MML_NODSP_NOFPU"/>
1477       <require Tcompiler="ARMCC"/>
1478     </condition>
1479     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1480       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1481       <require condition="ARMv8MML_DSP_NOFPU"/>
1482       <require Tcompiler="ARMCC"/>
1483     </condition>
1484     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1485       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1486       <require condition="ARMv8MML_NODSP_SP"/>
1487       <require Tcompiler="ARMCC"/>
1488     </condition>
1489     <condition id="ARMv8MML_DSP_SP_ARMCC">
1490       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1491       <require condition="ARMv8MML_DSP_SP"/>
1492       <require Tcompiler="ARMCC"/>
1493     </condition>
1494     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1495       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1496       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1497       <require Dendian="Little-endian"/>
1498     </condition>
1499     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1500       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1501       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1502       <require Dendian="Little-endian"/>
1503     </condition>
1504     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1505       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1506       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1507       <require Dendian="Little-endian"/>
1508     </condition>
1509     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1510       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1511       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1512       <require Dendian="Little-endian"/>
1513     </condition>
1514
1515     <!-- GCC compiler -->
1516     <condition id="CA_GCC">
1517       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1518       <require condition="ARMv7-A Device"/>
1519       <require Tcompiler="GCC"/>
1520     </condition>
1521
1522     <condition id="CM0_GCC">
1523       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1524       <require condition="CM0"/>
1525       <require Tcompiler="GCC"/>
1526     </condition>
1527     <condition id="CM0_LE_GCC">
1528       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1529       <require condition="CM0_GCC"/>
1530       <require Dendian="Little-endian"/>
1531     </condition>
1532     <condition id="CM0_BE_GCC">
1533       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1534       <require condition="CM0_GCC"/>
1535       <require Dendian="Big-endian"/>
1536     </condition>
1537
1538     <condition id="CM1_GCC">
1539       <description>Cortex-M1 based device for the GCC Compiler</description>
1540       <require condition="CM1"/>
1541       <require Tcompiler="GCC"/>
1542     </condition>
1543     <condition id="CM1_LE_GCC">
1544       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1545       <require condition="CM1_GCC"/>
1546       <require Dendian="Little-endian"/>
1547     </condition>
1548     <condition id="CM1_BE_GCC">
1549       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1550       <require condition="CM1_GCC"/>
1551       <require Dendian="Big-endian"/>
1552     </condition>
1553
1554     <condition id="CM3_GCC">
1555       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1556       <require condition="CM3"/>
1557       <require Tcompiler="GCC"/>
1558     </condition>
1559     <condition id="CM3_LE_GCC">
1560       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1561       <require condition="CM3_GCC"/>
1562       <require Dendian="Little-endian"/>
1563     </condition>
1564     <condition id="CM3_BE_GCC">
1565       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1566       <require condition="CM3_GCC"/>
1567       <require Dendian="Big-endian"/>
1568     </condition>
1569
1570     <condition id="CM4_GCC">
1571       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1572       <require condition="CM4"/>
1573       <require Tcompiler="GCC"/>
1574     </condition>
1575     <condition id="CM4_LE_GCC">
1576       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1577       <require condition="CM4_GCC"/>
1578       <require Dendian="Little-endian"/>
1579     </condition>
1580     <condition id="CM4_BE_GCC">
1581       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1582       <require condition="CM4_GCC"/>
1583       <require Dendian="Big-endian"/>
1584     </condition>
1585
1586     <condition id="CM4_FP_GCC">
1587       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1588       <require condition="CM4_FP"/>
1589       <require Tcompiler="GCC"/>
1590     </condition>
1591     <condition id="CM4_FP_LE_GCC">
1592       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1593       <require condition="CM4_FP_GCC"/>
1594       <require Dendian="Little-endian"/>
1595     </condition>
1596     <condition id="CM4_FP_BE_GCC">
1597       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1598       <require condition="CM4_FP_GCC"/>
1599       <require Dendian="Big-endian"/>
1600     </condition>
1601
1602     <condition id="CM7_GCC">
1603       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1604       <require condition="CM7"/>
1605       <require Tcompiler="GCC"/>
1606     </condition>
1607     <condition id="CM7_LE_GCC">
1608       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1609       <require condition="CM7_GCC"/>
1610       <require Dendian="Little-endian"/>
1611     </condition>
1612     <condition id="CM7_BE_GCC">
1613       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1614       <require condition="CM7_GCC"/>
1615       <require Dendian="Big-endian"/>
1616     </condition>
1617
1618     <condition id="CM7_FP_GCC">
1619       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1620       <require condition="CM7_FP"/>
1621       <require Tcompiler="GCC"/>
1622     </condition>
1623     <condition id="CM7_FP_LE_GCC">
1624       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1625       <require condition="CM7_FP_GCC"/>
1626       <require Dendian="Little-endian"/>
1627     </condition>
1628     <condition id="CM7_FP_BE_GCC">
1629       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1630       <require condition="CM7_FP_GCC"/>
1631       <require Dendian="Big-endian"/>
1632     </condition>
1633
1634     <condition id="CM7_SP_GCC">
1635       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1636       <require condition="CM7_SP"/>
1637       <require Tcompiler="GCC"/>
1638     </condition>
1639     <condition id="CM7_SP_LE_GCC">
1640       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1641       <require condition="CM7_SP_GCC"/>
1642       <require Dendian="Little-endian"/>
1643     </condition>
1644     <condition id="CM7_SP_BE_GCC">
1645       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1646       <require condition="CM7_SP_GCC"/>
1647       <require Dendian="Big-endian"/>
1648     </condition>
1649
1650     <condition id="CM7_DP_GCC">
1651       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1652       <require condition="CM7_DP"/>
1653       <require Tcompiler="GCC"/>
1654     </condition>
1655     <condition id="CM7_DP_LE_GCC">
1656       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1657       <require condition="CM7_DP_GCC"/>
1658       <require Dendian="Little-endian"/>
1659     </condition>
1660     <condition id="CM7_DP_BE_GCC">
1661       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1662       <require condition="CM7_DP_GCC"/>
1663       <require Dendian="Big-endian"/>
1664     </condition>
1665
1666     <condition id="CM23_GCC">
1667       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1668       <require condition="CM23"/>
1669       <require Tcompiler="GCC"/>
1670     </condition>
1671     <condition id="CM23_LE_GCC">
1672       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1673       <require condition="CM23_GCC"/>
1674       <require Dendian="Little-endian"/>
1675     </condition>
1676     <condition id="CM23_BE_GCC">
1677       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1678       <require condition="CM23_GCC"/>
1679       <require Dendian="Big-endian"/>
1680     </condition>
1681
1682     <condition id="CM33_GCC">
1683       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1684       <require condition="CM33"/>
1685       <require Tcompiler="GCC"/>
1686     </condition>
1687     <condition id="CM33_LE_GCC">
1688       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1689       <require condition="CM33_GCC"/>
1690       <require Dendian="Little-endian"/>
1691     </condition>
1692     <condition id="CM33_BE_GCC">
1693       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1694       <require condition="CM33_GCC"/>
1695       <require Dendian="Big-endian"/>
1696     </condition>
1697
1698     <condition id="CM33_FP_GCC">
1699       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1700       <require condition="CM33_FP"/>
1701       <require Tcompiler="GCC"/>
1702     </condition>
1703     <condition id="CM33_FP_LE_GCC">
1704       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1705       <require condition="CM33_FP_GCC"/>
1706       <require Dendian="Little-endian"/>
1707     </condition>
1708     <condition id="CM33_FP_BE_GCC">
1709       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1710       <require condition="CM33_FP_GCC"/>
1711       <require Dendian="Big-endian"/>
1712     </condition>
1713
1714     <condition id="CM33_NODSP_NOFPU_GCC">
1715       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1716       <require condition="CM33_NODSP_NOFPU"/>
1717       <require Tcompiler="GCC"/>
1718     </condition>
1719     <condition id="CM33_DSP_NOFPU_GCC">
1720       <description>CM33, DSP, no FPU, GCC Compiler</description>
1721       <require condition="CM33_DSP_NOFPU"/>
1722       <require Tcompiler="GCC"/>
1723     </condition>
1724     <condition id="CM33_NODSP_SP_GCC">
1725       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1726       <require condition="CM33_NODSP_SP"/>
1727       <require Tcompiler="GCC"/>
1728     </condition>
1729     <condition id="CM33_DSP_SP_GCC">
1730       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1731       <require condition="CM33_DSP_SP"/>
1732       <require Tcompiler="GCC"/>
1733     </condition>
1734     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1735       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1736       <require condition="CM33_NODSP_NOFPU_GCC"/>
1737       <require Dendian="Little-endian"/>
1738     </condition>
1739     <condition id="CM33_DSP_NOFPU_LE_GCC">
1740       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1741       <require condition="CM33_DSP_NOFPU_GCC"/>
1742       <require Dendian="Little-endian"/>
1743     </condition>
1744     <condition id="CM33_NODSP_SP_LE_GCC">
1745       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1746       <require condition="CM33_NODSP_SP_GCC"/>
1747       <require Dendian="Little-endian"/>
1748     </condition>
1749     <condition id="CM33_DSP_SP_LE_GCC">
1750       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1751       <require condition="CM33_DSP_SP_GCC"/>
1752       <require Dendian="Little-endian"/>
1753     </condition>
1754
1755     <condition id="CM35P_GCC">
1756       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1757       <require condition="CM35P"/>
1758       <require Tcompiler="GCC"/>
1759     </condition>
1760     <condition id="CM35P_LE_GCC">
1761       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1762       <require condition="CM35P_GCC"/>
1763       <require Dendian="Little-endian"/>
1764     </condition>
1765     <condition id="CM35P_BE_GCC">
1766       <description>Cortex-M35P processor based device in big endian mode for the GCC Compiler</description>
1767       <require condition="CM35P_GCC"/>
1768       <require Dendian="Big-endian"/>
1769     </condition>
1770
1771     <condition id="CM35P_FP_GCC">
1772       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1773       <require condition="CM35P_FP"/>
1774       <require Tcompiler="GCC"/>
1775     </condition>
1776     <condition id="CM35P_FP_LE_GCC">
1777       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1778       <require condition="CM35P_FP_GCC"/>
1779       <require Dendian="Little-endian"/>
1780     </condition>
1781     <condition id="CM35P_FP_BE_GCC">
1782       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1783       <require condition="CM35P_FP_GCC"/>
1784       <require Dendian="Big-endian"/>
1785     </condition>
1786
1787     <condition id="CM35P_NODSP_NOFPU_GCC">
1788       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1789       <require condition="CM35P_NODSP_NOFPU"/>
1790       <require Tcompiler="GCC"/>
1791     </condition>
1792     <condition id="CM35P_DSP_NOFPU_GCC">
1793       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1794       <require condition="CM35P_DSP_NOFPU"/>
1795       <require Tcompiler="GCC"/>
1796     </condition>
1797     <condition id="CM35P_NODSP_SP_GCC">
1798       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1799       <require condition="CM35P_NODSP_SP"/>
1800       <require Tcompiler="GCC"/>
1801     </condition>
1802     <condition id="CM35P_DSP_SP_GCC">
1803       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1804       <require condition="CM35P_DSP_SP"/>
1805       <require Tcompiler="GCC"/>
1806     </condition>
1807     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1808       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1809       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1810       <require Dendian="Little-endian"/>
1811     </condition>
1812     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1813       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1814       <require condition="CM35P_DSP_NOFPU_GCC"/>
1815       <require Dendian="Little-endian"/>
1816     </condition>
1817     <condition id="CM35P_NODSP_SP_LE_GCC">
1818       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1819       <require condition="CM35P_NODSP_SP_GCC"/>
1820       <require Dendian="Little-endian"/>
1821     </condition>
1822     <condition id="CM35P_DSP_SP_LE_GCC">
1823       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1824       <require condition="CM35P_DSP_SP_GCC"/>
1825       <require Dendian="Little-endian"/>
1826     </condition>
1827
1828     <condition id="ARMv8MBL_GCC">
1829       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1830       <require condition="ARMv8MBL"/>
1831       <require Tcompiler="GCC"/>
1832     </condition>
1833     <condition id="ARMv8MBL_LE_GCC">
1834       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1835       <require condition="ARMv8MBL_GCC"/>
1836       <require Dendian="Little-endian"/>
1837     </condition>
1838     <condition id="ARMv8MBL_BE_GCC">
1839       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1840       <require condition="ARMv8MBL_GCC"/>
1841       <require Dendian="Big-endian"/>
1842     </condition>
1843
1844     <condition id="ARMv8MML_GCC">
1845       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1846       <require condition="ARMv8MML"/>
1847       <require Tcompiler="GCC"/>
1848     </condition>
1849     <condition id="ARMv8MML_LE_GCC">
1850       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1851       <require condition="ARMv8MML_GCC"/>
1852       <require Dendian="Little-endian"/>
1853     </condition>
1854     <condition id="ARMv8MML_BE_GCC">
1855       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1856       <require condition="ARMv8MML_GCC"/>
1857       <require Dendian="Big-endian"/>
1858     </condition>
1859
1860     <condition id="ARMv8MML_FP_GCC">
1861       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1862       <require condition="ARMv8MML_FP"/>
1863       <require Tcompiler="GCC"/>
1864     </condition>
1865     <condition id="ARMv8MML_FP_LE_GCC">
1866       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1867       <require condition="ARMv8MML_FP_GCC"/>
1868       <require Dendian="Little-endian"/>
1869     </condition>
1870     <condition id="ARMv8MML_FP_BE_GCC">
1871       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1872       <require condition="ARMv8MML_FP_GCC"/>
1873       <require Dendian="Big-endian"/>
1874     </condition>
1875
1876     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1877       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1878       <require condition="ARMv8MML_NODSP_NOFPU"/>
1879       <require Tcompiler="GCC"/>
1880     </condition>
1881     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1882       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1883       <require condition="ARMv8MML_DSP_NOFPU"/>
1884       <require Tcompiler="GCC"/>
1885     </condition>
1886     <condition id="ARMv8MML_NODSP_SP_GCC">
1887       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1888       <require condition="ARMv8MML_NODSP_SP"/>
1889       <require Tcompiler="GCC"/>
1890     </condition>
1891     <condition id="ARMv8MML_DSP_SP_GCC">
1892       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1893       <require condition="ARMv8MML_DSP_SP"/>
1894       <require Tcompiler="GCC"/>
1895     </condition>
1896     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1897       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1898       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1899       <require Dendian="Little-endian"/>
1900     </condition>
1901     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1902       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1903       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1904       <require Dendian="Little-endian"/>
1905     </condition>
1906     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1907       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1908       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1909       <require Dendian="Little-endian"/>
1910     </condition>
1911     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1912       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1913       <require condition="ARMv8MML_DSP_SP_GCC"/>
1914       <require Dendian="Little-endian"/>
1915     </condition>
1916
1917     <!-- IAR compiler -->
1918     <condition id="CA_IAR">
1919       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1920       <require condition="ARMv7-A Device"/>
1921       <require Tcompiler="IAR"/>
1922     </condition>
1923
1924     <condition id="CM0_IAR">
1925       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1926       <require condition="CM0"/>
1927       <require Tcompiler="IAR"/>
1928     </condition>
1929     <condition id="CM0_LE_IAR">
1930       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1931       <require condition="CM0_IAR"/>
1932       <require Dendian="Little-endian"/>
1933     </condition>
1934     <condition id="CM0_BE_IAR">
1935       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1936       <require condition="CM0_IAR"/>
1937       <require Dendian="Big-endian"/>
1938     </condition>
1939
1940     <condition id="CM1_IAR">
1941       <description>Cortex-M1 based device for the IAR Compiler</description>
1942       <require condition="CM1"/>
1943       <require Tcompiler="IAR"/>
1944     </condition>
1945     <condition id="CM1_LE_IAR">
1946       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1947       <require condition="CM1_IAR"/>
1948       <require Dendian="Little-endian"/>
1949     </condition>
1950     <condition id="CM1_BE_IAR">
1951       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1952       <require condition="CM1_IAR"/>
1953       <require Dendian="Big-endian"/>
1954     </condition>
1955
1956     <condition id="CM3_IAR">
1957       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1958       <require condition="CM3"/>
1959       <require Tcompiler="IAR"/>
1960     </condition>
1961     <condition id="CM3_LE_IAR">
1962       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1963       <require condition="CM3_IAR"/>
1964       <require Dendian="Little-endian"/>
1965     </condition>
1966     <condition id="CM3_BE_IAR">
1967       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1968       <require condition="CM3_IAR"/>
1969       <require Dendian="Big-endian"/>
1970     </condition>
1971
1972     <condition id="CM4_IAR">
1973       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1974       <require condition="CM4"/>
1975       <require Tcompiler="IAR"/>
1976     </condition>
1977     <condition id="CM4_LE_IAR">
1978       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1979       <require condition="CM4_IAR"/>
1980       <require Dendian="Little-endian"/>
1981     </condition>
1982     <condition id="CM4_BE_IAR">
1983       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1984       <require condition="CM4_IAR"/>
1985       <require Dendian="Big-endian"/>
1986     </condition>
1987
1988     <condition id="CM4_FP_IAR">
1989       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1990       <require condition="CM4_FP"/>
1991       <require Tcompiler="IAR"/>
1992     </condition>
1993     <condition id="CM4_FP_LE_IAR">
1994       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1995       <require condition="CM4_FP_IAR"/>
1996       <require Dendian="Little-endian"/>
1997     </condition>
1998     <condition id="CM4_FP_BE_IAR">
1999       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2000       <require condition="CM4_FP_IAR"/>
2001       <require Dendian="Big-endian"/>
2002     </condition>
2003
2004     <condition id="CM7_IAR">
2005       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2006       <require condition="CM7"/>
2007       <require Tcompiler="IAR"/>
2008     </condition>
2009     <condition id="CM7_LE_IAR">
2010       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2011       <require condition="CM7_IAR"/>
2012       <require Dendian="Little-endian"/>
2013     </condition>
2014     <condition id="CM7_BE_IAR">
2015       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2016       <require condition="CM7_IAR"/>
2017       <require Dendian="Big-endian"/>
2018     </condition>
2019
2020     <condition id="CM7_FP_IAR">
2021       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2022       <require condition="CM7_FP"/>
2023       <require Tcompiler="IAR"/>
2024     </condition>
2025     <condition id="CM7_FP_LE_IAR">
2026       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2027       <require condition="CM7_FP_IAR"/>
2028       <require Dendian="Little-endian"/>
2029     </condition>
2030     <condition id="CM7_FP_BE_IAR">
2031       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2032       <require condition="CM7_FP_IAR"/>
2033       <require Dendian="Big-endian"/>
2034     </condition>
2035
2036     <condition id="CM7_SP_IAR">
2037       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2038       <require condition="CM7_SP"/>
2039       <require Tcompiler="IAR"/>
2040     </condition>
2041     <condition id="CM7_SP_LE_IAR">
2042       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2043       <require condition="CM7_SP_IAR"/>
2044       <require Dendian="Little-endian"/>
2045     </condition>
2046     <condition id="CM7_SP_BE_IAR">
2047       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2048       <require condition="CM7_SP_IAR"/>
2049       <require Dendian="Big-endian"/>
2050     </condition>
2051
2052     <condition id="CM7_DP_IAR">
2053       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2054       <require condition="CM7_DP"/>
2055       <require Tcompiler="IAR"/>
2056     </condition>
2057     <condition id="CM7_DP_LE_IAR">
2058       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2059       <require condition="CM7_DP_IAR"/>
2060       <require Dendian="Little-endian"/>
2061     </condition>
2062     <condition id="CM7_DP_BE_IAR">
2063       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2064       <require condition="CM7_DP_IAR"/>
2065       <require Dendian="Big-endian"/>
2066     </condition>
2067
2068     <condition id="CM23_IAR">
2069       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2070       <require condition="CM23"/>
2071       <require Tcompiler="IAR"/>
2072     </condition>
2073     <condition id="CM23_LE_IAR">
2074       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2075       <require condition="CM23_IAR"/>
2076       <require Dendian="Little-endian"/>
2077     </condition>
2078     <condition id="CM23_BE_IAR">
2079       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
2080       <require condition="CM23_IAR"/>
2081       <require Dendian="Big-endian"/>
2082     </condition>
2083
2084     <condition id="CM33_IAR">
2085       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2086       <require condition="CM33"/>
2087       <require Tcompiler="IAR"/>
2088     </condition>
2089     <condition id="CM33_LE_IAR">
2090       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2091       <require condition="CM33_IAR"/>
2092       <require Dendian="Little-endian"/>
2093     </condition>
2094     <condition id="CM33_BE_IAR">
2095       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
2096       <require condition="CM33_IAR"/>
2097       <require Dendian="Big-endian"/>
2098     </condition>
2099
2100     <condition id="CM33_FP_IAR">
2101       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2102       <require condition="CM33_FP"/>
2103       <require Tcompiler="IAR"/>
2104     </condition>
2105     <condition id="CM33_FP_LE_IAR">
2106       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2107       <require condition="CM33_FP_IAR"/>
2108       <require Dendian="Little-endian"/>
2109     </condition>
2110     <condition id="CM33_FP_BE_IAR">
2111       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2112       <require condition="CM33_FP_IAR"/>
2113       <require Dendian="Big-endian"/>
2114     </condition>
2115
2116     <condition id="CM33_NODSP_NOFPU_IAR">
2117       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2118       <require condition="CM33_NODSP_NOFPU"/>
2119       <require Tcompiler="IAR"/>
2120     </condition>
2121     <condition id="CM33_DSP_NOFPU_IAR">
2122       <description>CM33, DSP, no FPU, IAR Compiler</description>
2123       <require condition="CM33_DSP_NOFPU"/>
2124       <require Tcompiler="IAR"/>
2125     </condition>
2126     <condition id="CM33_NODSP_SP_IAR">
2127       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2128       <require condition="CM33_NODSP_SP"/>
2129       <require Tcompiler="IAR"/>
2130     </condition>
2131     <condition id="CM33_DSP_SP_IAR">
2132       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2133       <require condition="CM33_DSP_SP"/>
2134       <require Tcompiler="IAR"/>
2135     </condition>
2136     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2137       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2138       <require condition="CM33_NODSP_NOFPU_IAR"/>
2139       <require Dendian="Little-endian"/>
2140     </condition>
2141     <condition id="CM33_DSP_NOFPU_LE_IAR">
2142       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2143       <require condition="CM33_DSP_NOFPU_IAR"/>
2144       <require Dendian="Little-endian"/>
2145     </condition>
2146     <condition id="CM33_NODSP_SP_LE_IAR">
2147       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2148       <require condition="CM33_NODSP_SP_IAR"/>
2149       <require Dendian="Little-endian"/>
2150     </condition>
2151     <condition id="CM33_DSP_SP_LE_IAR">
2152       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2153       <require condition="CM33_DSP_SP_IAR"/>
2154       <require Dendian="Little-endian"/>
2155     </condition>
2156
2157     <condition id="CM35P_IAR">
2158       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2159       <require condition="CM35P"/>
2160       <require Tcompiler="IAR"/>
2161     </condition>
2162     <condition id="CM35P_LE_IAR">
2163       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2164       <require condition="CM35P_IAR"/>
2165       <require Dendian="Little-endian"/>
2166     </condition>
2167     <condition id="CM35P_BE_IAR">
2168       <description>Cortex-M35P processor based device in big endian mode for the IAR Compiler</description>
2169       <require condition="CM35P_IAR"/>
2170       <require Dendian="Big-endian"/>
2171     </condition>
2172
2173     <condition id="CM35P_FP_IAR">
2174       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2175       <require condition="CM35P_FP"/>
2176       <require Tcompiler="IAR"/>
2177     </condition>
2178     <condition id="CM35P_FP_LE_IAR">
2179       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2180       <require condition="CM35P_FP_IAR"/>
2181       <require Dendian="Little-endian"/>
2182     </condition>
2183     <condition id="CM35P_FP_BE_IAR">
2184       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2185       <require condition="CM35P_FP_IAR"/>
2186       <require Dendian="Big-endian"/>
2187     </condition>
2188
2189     <condition id="CM35P_NODSP_NOFPU_IAR">
2190       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2191       <require condition="CM35P_NODSP_NOFPU"/>
2192       <require Tcompiler="IAR"/>
2193     </condition>
2194     <condition id="CM35P_DSP_NOFPU_IAR">
2195       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2196       <require condition="CM35P_DSP_NOFPU"/>
2197       <require Tcompiler="IAR"/>
2198     </condition>
2199     <condition id="CM35P_NODSP_SP_IAR">
2200       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2201       <require condition="CM35P_NODSP_SP"/>
2202       <require Tcompiler="IAR"/>
2203     </condition>
2204     <condition id="CM35P_DSP_SP_IAR">
2205       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2206       <require condition="CM35P_DSP_SP"/>
2207       <require Tcompiler="IAR"/>
2208     </condition>
2209     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2210       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2211       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2212       <require Dendian="Little-endian"/>
2213     </condition>
2214     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2215       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2216       <require condition="CM35P_DSP_NOFPU_IAR"/>
2217       <require Dendian="Little-endian"/>
2218     </condition>
2219     <condition id="CM35P_NODSP_SP_LE_IAR">
2220       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2221       <require condition="CM35P_NODSP_SP_IAR"/>
2222       <require Dendian="Little-endian"/>
2223     </condition>
2224     <condition id="CM35P_DSP_SP_LE_IAR">
2225       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2226       <require condition="CM35P_DSP_SP_IAR"/>
2227       <require Dendian="Little-endian"/>
2228     </condition>
2229
2230     <condition id="ARMv8MBL_IAR">
2231       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2232       <require condition="ARMv8MBL"/>
2233       <require Tcompiler="IAR"/>
2234     </condition>
2235     <condition id="ARMv8MBL_LE_IAR">
2236       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2237       <require condition="ARMv8MBL_IAR"/>
2238       <require Dendian="Little-endian"/>
2239     </condition>
2240     <condition id="ARMv8MBL_BE_IAR">
2241       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
2242       <require condition="ARMv8MBL_IAR"/>
2243       <require Dendian="Big-endian"/>
2244     </condition>
2245
2246     <condition id="ARMv8MML_IAR">
2247       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2248       <require condition="ARMv8MML"/>
2249       <require Tcompiler="IAR"/>
2250     </condition>
2251     <condition id="ARMv8MML_LE_IAR">
2252       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2253       <require condition="ARMv8MML_IAR"/>
2254       <require Dendian="Little-endian"/>
2255     </condition>
2256     <condition id="ARMv8MML_BE_IAR">
2257       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
2258       <require condition="ARMv8MML_IAR"/>
2259       <require Dendian="Big-endian"/>
2260     </condition>
2261
2262     <condition id="ARMv8MML_FP_IAR">
2263       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2264       <require condition="ARMv8MML_FP"/>
2265       <require Tcompiler="IAR"/>
2266     </condition>
2267     <condition id="ARMv8MML_FP_LE_IAR">
2268       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2269       <require condition="ARMv8MML_FP_IAR"/>
2270       <require Dendian="Little-endian"/>
2271     </condition>
2272     <condition id="ARMv8MML_FP_BE_IAR">
2273       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2274       <require condition="ARMv8MML_FP_IAR"/>
2275       <require Dendian="Big-endian"/>
2276     </condition>
2277
2278     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2279       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2280       <require condition="ARMv8MML_NODSP_NOFPU"/>
2281       <require Tcompiler="IAR"/>
2282     </condition>
2283     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2284       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2285       <require condition="ARMv8MML_DSP_NOFPU"/>
2286       <require Tcompiler="IAR"/>
2287     </condition>
2288     <condition id="ARMv8MML_NODSP_SP_IAR">
2289       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2290       <require condition="ARMv8MML_NODSP_SP"/>
2291       <require Tcompiler="IAR"/>
2292     </condition>
2293     <condition id="ARMv8MML_DSP_SP_IAR">
2294       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2295       <require condition="ARMv8MML_DSP_SP"/>
2296       <require Tcompiler="IAR"/>
2297     </condition>
2298     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2299       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2300       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2301       <require Dendian="Little-endian"/>
2302     </condition>
2303     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2304       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2305       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2306       <require Dendian="Little-endian"/>
2307     </condition>
2308     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2309       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2310       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2311       <require Dendian="Little-endian"/>
2312     </condition>
2313     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2314       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2315       <require condition="ARMv8MML_DSP_SP_IAR"/>
2316       <require Dendian="Little-endian"/>
2317     </condition>
2318
2319     <!-- conditions selecting single devices and CMSIS Core -->
2320     <!-- used for component startup, GCC version is used for C-Startup -->
2321     <condition id="ARMCM0 CMSIS">
2322       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2323       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2324       <require Cclass="CMSIS" Cgroup="CORE"/>
2325     </condition>
2326     <condition id="ARMCM0 CMSIS GCC">
2327       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
2328       <require condition="ARMCM0 CMSIS"/>
2329       <require condition="GCC"/>
2330     </condition>
2331
2332     <condition id="ARMCM0+ CMSIS">
2333       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2334       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2335       <require Cclass="CMSIS" Cgroup="CORE"/>
2336     </condition>
2337     <condition id="ARMCM0+ CMSIS GCC">
2338       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
2339       <require condition="ARMCM0+ CMSIS"/>
2340       <require condition="GCC"/>
2341     </condition>
2342
2343     <condition id="ARMCM1 CMSIS">
2344       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2345       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2346       <require Cclass="CMSIS" Cgroup="CORE"/>
2347     </condition>
2348     <condition id="ARMCM1 CMSIS GCC">
2349       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
2350       <require condition="ARMCM1 CMSIS"/>
2351       <require condition="GCC"/>
2352     </condition>
2353
2354     <condition id="ARMCM3 CMSIS">
2355       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2356       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2357       <require Cclass="CMSIS" Cgroup="CORE"/>
2358     </condition>
2359     <condition id="ARMCM3 CMSIS GCC">
2360       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
2361       <require condition="ARMCM3 CMSIS"/>
2362       <require condition="GCC"/>
2363     </condition>
2364
2365     <condition id="ARMCM4 CMSIS">
2366       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2367       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2368       <require Cclass="CMSIS" Cgroup="CORE"/>
2369     </condition>
2370     <condition id="ARMCM4 CMSIS GCC">
2371       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
2372       <require condition="ARMCM4 CMSIS"/>
2373       <require condition="GCC"/>
2374     </condition>
2375
2376     <condition id="ARMCM7 CMSIS">
2377       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2378       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2379       <require Cclass="CMSIS" Cgroup="CORE"/>
2380     </condition>
2381     <condition id="ARMCM7 CMSIS GCC">
2382       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2383       <require condition="ARMCM7 CMSIS"/>
2384       <require condition="GCC"/>
2385     </condition>
2386
2387     <condition id="ARMCM23 CMSIS">
2388       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2389       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2390       <require Cclass="CMSIS" Cgroup="CORE"/>
2391     </condition>
2392     <condition id="ARMCM23 CMSIS GCC">
2393       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2394       <require condition="ARMCM23 CMSIS"/>
2395       <require condition="GCC"/>
2396     </condition>
2397
2398     <condition id="ARMCM33 CMSIS">
2399       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2400       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2401       <require Cclass="CMSIS" Cgroup="CORE"/>
2402     </condition>
2403     <condition id="ARMCM33 CMSIS GCC">
2404       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2405       <require condition="ARMCM33 CMSIS"/>
2406       <require condition="GCC"/>
2407     </condition>
2408
2409     <condition id="ARMCM35P CMSIS">
2410       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2411       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2412       <require Cclass="CMSIS" Cgroup="CORE"/>
2413     </condition>
2414     <condition id="ARMCM35P CMSIS GCC">
2415       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core requiring GCC</description>
2416       <require condition="ARMCM35P CMSIS"/>
2417       <require condition="GCC"/>
2418     </condition>
2419
2420     <condition id="ARMSC000 CMSIS">
2421       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2422       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2423       <require Cclass="CMSIS" Cgroup="CORE"/>
2424     </condition>
2425     <condition id="ARMSC000 CMSIS GCC">
2426       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2427       <require condition="ARMSC000 CMSIS"/>
2428       <require condition="GCC"/>
2429     </condition>
2430
2431     <condition id="ARMSC300 CMSIS">
2432       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2433       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2434       <require Cclass="CMSIS" Cgroup="CORE"/>
2435     </condition>
2436     <condition id="ARMSC300 CMSIS GCC">
2437       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2438       <require condition="ARMSC300 CMSIS"/>
2439       <require condition="GCC"/>
2440     </condition>
2441
2442     <condition id="ARMv8MBL CMSIS">
2443       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2444       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2445       <require Cclass="CMSIS" Cgroup="CORE"/>
2446     </condition>
2447     <condition id="ARMv8MBL CMSIS GCC">
2448       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2449       <require condition="ARMv8MBL CMSIS"/>
2450       <require condition="GCC"/>
2451     </condition>
2452
2453     <condition id="ARMv8MML CMSIS">
2454       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2455       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2456       <require Cclass="CMSIS" Cgroup="CORE"/>
2457     </condition>
2458     <condition id="ARMv8MML CMSIS GCC">
2459       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2460       <require condition="ARMv8MML CMSIS"/>
2461       <require condition="GCC"/>
2462     </condition>
2463
2464     <condition id="ARMv81MML CMSIS">
2465       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2466       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2467       <require Cclass="CMSIS" Cgroup="CORE"/>
2468     </condition>
2469     <condition id="ARMv81MML CMSIS GCC">
2470       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2471       <require condition="ARMv81MML CMSIS"/>
2472       <require condition="GCC"/>
2473     </condition>
2474
2475     <condition id="ARMCA5 CMSIS">
2476       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2477       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2478       <require Cclass="CMSIS" Cgroup="CORE"/>
2479     </condition>
2480
2481     <condition id="ARMCA7 CMSIS">
2482       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2483       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2484       <require Cclass="CMSIS" Cgroup="CORE"/>
2485     </condition>
2486
2487     <condition id="ARMCA9 CMSIS">
2488       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2489       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2490       <require Cclass="CMSIS" Cgroup="CORE"/>
2491     </condition>
2492
2493     <!-- CMSIS DSP -->
2494     <condition id="CMSIS DSP">
2495       <description>Components required for DSP</description>
2496       <require condition="ARMv6_7_8-M Device"/>
2497       <require condition="ARMCC GCC IAR"/>
2498       <require Cclass="CMSIS" Cgroup="CORE"/>
2499     </condition>
2500
2501     <!-- CMSIS NN -->
2502     <condition id="CMSIS NN">
2503       <description>Components required for NN</description>
2504       <require condition="CMSIS DSP"/>
2505     </condition>
2506
2507     <!-- RTOS RTX -->
2508     <condition id="RTOS RTX">
2509       <description>Components required for RTOS RTX</description>
2510       <require condition="ARMv6_7-M Device"/>
2511       <require condition="ARMCC GCC IAR"/>
2512       <require Cclass="Device" Cgroup="Startup"/>
2513       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2514     </condition>
2515     <condition id="RTOS RTX IFX">
2516       <description>Components required for RTOS RTX IFX</description>
2517       <require condition="ARMv6_7-M Device"/>
2518       <require condition="ARMCC GCC IAR"/>
2519       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2520       <require Cclass="Device" Cgroup="Startup"/>
2521       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2522     </condition>
2523     <condition id="RTOS RTX5">
2524       <description>Components required for RTOS RTX5</description>
2525       <require condition="ARMv6_7_8-M Device"/>
2526       <require condition="ARMCC GCC IAR"/>
2527       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2528     </condition>
2529     <condition id="RTOS2 RTX5">
2530       <description>Components required for RTOS2 RTX5</description>
2531       <require condition="ARMv6_7_8-M Device"/>
2532       <require condition="ARMCC GCC IAR"/>
2533       <require Cclass="CMSIS"  Cgroup="CORE"/>
2534       <require Cclass="Device" Cgroup="Startup"/>
2535     </condition>
2536     <condition id="RTOS2 RTX5 v7-A">
2537       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2538       <require condition="ARMv7-A Device"/>
2539       <require condition="ARMCC GCC IAR"/>
2540       <require Cclass="CMSIS"  Cgroup="CORE"/>
2541       <require Cclass="Device" Cgroup="Startup"/>
2542       <require Cclass="Device" Cgroup="OS Tick"/>
2543       <require Cclass="Device" Cgroup="IRQ Controller"/>
2544     </condition>
2545     <condition id="RTOS2 RTX5 Lib">
2546       <description>Components required for RTOS2 RTX5 Library</description>
2547       <require condition="ARMv6_7_8-M Device"/>
2548       <require condition="ARMCC GCC IAR"/>
2549       <require Cclass="CMSIS"  Cgroup="CORE"/>
2550       <require Cclass="Device" Cgroup="Startup"/>
2551     </condition>
2552     <condition id="RTOS2 RTX5 NS">
2553       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2554       <require condition="ARMv8-M TZ Device"/>
2555       <require condition="ARMCC GCC IAR"/>
2556       <require Cclass="CMSIS"  Cgroup="CORE"/>
2557       <require Cclass="Device" Cgroup="Startup"/>
2558     </condition>
2559
2560     <!-- OS Tick -->
2561     <condition id="OS Tick PTIM">
2562       <description>Components required for OS Tick Private Timer</description>
2563       <require condition="CA5_CA9"/>
2564       <require Cclass="Device" Cgroup="IRQ Controller"/>
2565     </condition>
2566
2567     <condition id="OS Tick GTIM">
2568       <description>Components required for OS Tick Generic Physical Timer</description>
2569       <require condition="CA7"/>
2570       <require Cclass="Device" Cgroup="IRQ Controller"/>
2571     </condition>
2572
2573   </conditions>
2574
2575   <components>
2576     <!-- CMSIS-Core component -->
2577     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.2.0"  condition="ARMv6_7_8-M Device" >
2578       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2579       <files>
2580         <!-- CPU independent -->
2581         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2582         <file category="include" name="CMSIS/Core/Include/"/>
2583         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2584         <!-- Code template -->
2585         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2586         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2587       </files>
2588     </component>
2589
2590     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.3"  condition="ARMv7-A Device" >
2591       <description>CMSIS-CORE for Cortex-A</description>
2592       <files>
2593         <!-- CPU independent -->
2594         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2595         <file category="include" name="CMSIS/Core_A/Include/"/>
2596       </files>
2597     </component>
2598
2599     <!-- CMSIS-Startup components -->
2600     <!-- Cortex-M0 -->
2601     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM0 CMSIS">
2602       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2603       <files>
2604         <!-- include folder / device header file -->
2605         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2606         <!-- startup / system file -->
2607         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2608         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.1.0" attr="config" condition="GCC"/>
2609         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2610         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2611         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2612       </files>
2613     </component>
2614     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM0 CMSIS GCC">
2615       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2616       <files>
2617         <!-- include folder / device header file -->
2618         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2619         <!-- startup / system file -->
2620         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.1.0" attr="config" condition="GCC"/>
2621         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2622         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2623       </files>
2624     </component>
2625
2626     <!-- Cortex-M0+ -->
2627     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM0+ CMSIS">
2628       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2629       <files>
2630         <!-- include folder / device header file -->
2631         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2632         <!-- startup / system file -->
2633         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2634         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.1.0" attr="config" condition="GCC"/>
2635         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2636         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2637         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2638       </files>
2639     </component>
2640     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM0+ CMSIS GCC">
2641       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2642       <files>
2643         <!-- include folder / device header file -->
2644         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2645         <!-- startup / system file -->
2646         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.1.0" attr="config" condition="GCC"/>
2647         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2648         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2649       </files>
2650     </component>
2651
2652     <!-- Cortex-M1 -->
2653     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM1 CMSIS">
2654       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2655       <files>
2656         <!-- include folder / device header file -->
2657         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2658         <!-- startup / system file -->
2659         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2660         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.1.0" attr="config" condition="GCC"/>
2661         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2662         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2663         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2664       </files>
2665     </component>
2666     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM1 CMSIS GCC">
2667       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2668       <files>
2669         <!-- include folder / device header file -->
2670         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2671         <!-- startup / system file -->
2672         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.1.0" attr="config" condition="GCC"/>
2673         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2674         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2675       </files>
2676     </component>
2677
2678     <!-- Cortex-M3 -->
2679     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM3 CMSIS">
2680       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2681       <files>
2682         <!-- include folder / device header file -->
2683         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2684         <!-- startup / system file -->
2685         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2686         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.1.0" attr="config" condition="GCC"/>
2687         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2688         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2689         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2690       </files>
2691     </component>
2692     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM3 CMSIS GCC">
2693       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2694       <files>
2695         <!-- include folder / device header file -->
2696         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2697         <!-- startup / system file -->
2698         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.1.0" attr="config" condition="GCC"/>
2699         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2700         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2701       </files>
2702     </component>
2703
2704     <!-- Cortex-M4 -->
2705     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM4 CMSIS">
2706       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2707       <files>
2708         <!-- include folder / device header file -->
2709         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2710         <!-- startup / system file -->
2711         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2712         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.1.0" attr="config" condition="GCC"/>
2713         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2714         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2715         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2716       </files>
2717     </component>
2718     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM4 CMSIS GCC">
2719       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2720       <files>
2721         <!-- include folder / device header file -->
2722         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2723         <!-- startup / system file -->
2724         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.1.0" attr="config" condition="GCC"/>
2725         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2726         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2727       </files>
2728     </component>
2729
2730     <!-- Cortex-M7 -->
2731     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM7 CMSIS">
2732       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2733       <files>
2734         <!-- include folder / device header file -->
2735         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2736         <!-- startup / system file -->
2737         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2738         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.1.0" attr="config" condition="GCC"/>
2739         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2740         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2741         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2742       </files>
2743     </component>
2744     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM7 CMSIS GCC">
2745       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2746       <files>
2747         <!-- include folder / device header file -->
2748         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2749         <!-- startup / system file -->
2750         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.1.0" attr="config" condition="GCC"/>
2751         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2752         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2753       </files>
2754     </component>
2755
2756     <!-- Cortex-M23 -->
2757     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2758       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2759       <files>
2760         <!-- include folder / device header file -->
2761         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2762         <!-- startup / system file -->
2763         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2764         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.1.0" attr="config" condition="GCC"/>
2765         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2766         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2767         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2768         <!-- SAU configuration -->
2769         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2770       </files>
2771     </component>
2772     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2773       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2774       <files>
2775         <!-- include folder / device header file -->
2776         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2777         <!-- startup / system file -->
2778         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.1.0" attr="config" condition="GCC"/>
2779         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2780         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2781         <!-- SAU configuration -->
2782         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2783       </files>
2784     </component>
2785
2786     <!-- Cortex-M33 -->
2787     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2788       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2789       <files>
2790         <!-- include folder / device header file -->
2791         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2792         <!-- startup / system file -->
2793         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2794         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.1.0" attr="config" condition="GCC"/>
2795         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2796         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2797         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2798         <!-- SAU configuration -->
2799         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2800       </files>
2801     </component>
2802     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2803       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2804       <files>
2805         <!-- include folder / device header file -->
2806         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2807         <!-- startup / system file -->
2808         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.1.0" attr="config" condition="GCC"/>
2809         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2810         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2811         <!-- SAU configuration -->
2812         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2813       </files>
2814     </component>
2815
2816     <!-- Cortex-M35P -->
2817     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM35P CMSIS">
2818       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2819       <files>
2820         <!-- include folder / device header file -->
2821         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2822         <!-- startup / system file -->
2823         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2824         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.0" attr="config" condition="GCC"/>
2825         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2826         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="IAR"/>
2827         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2828         <!-- SAU configuration -->
2829         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2830       </files>
2831     </component>
2832     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM35P CMSIS GCC">
2833       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2834       <files>
2835         <!-- include folder / device header file -->
2836         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2837         <!-- startup / system file -->
2838         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.c"         version="1.0.0" attr="config" condition="GCC"/>
2839         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2840         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2841         <!-- SAU configuration -->
2842         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2843       </files>
2844     </component>
2845
2846     <!-- Cortex-SC000 -->
2847     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMSC000 CMSIS">
2848       <description>System and Startup for Generic Arm SC000 device</description>
2849       <files>
2850         <!-- include folder / device header file -->
2851         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2852         <!-- startup / system file -->
2853         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2854         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.1.0" attr="config" condition="GCC"/>
2855         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2856         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2857         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2858       </files>
2859     </component>
2860     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMSC000 CMSIS GCC">
2861       <description>System and Startup for Generic Arm SC000 device</description>
2862       <files>
2863         <!-- include folder / device header file -->
2864         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2865         <!-- startup / system file -->
2866         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.1.0" attr="config" condition="GCC"/>
2867         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2868         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2869       </files>
2870     </component>
2871
2872     <!-- Cortex-SC300 -->
2873     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMSC300 CMSIS">
2874       <description>System and Startup for Generic Arm SC300 device</description>
2875       <files>
2876         <!-- include folder / device header file -->
2877         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2878         <!-- startup / system file -->
2879         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2880         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.1.0" attr="config" condition="GCC"/>
2881         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2882         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2883         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2884       </files>
2885     </component>
2886     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMSC300 CMSIS GCC">
2887       <description>System and Startup for Generic Arm SC300 device</description>
2888       <files>
2889         <!-- include folder / device header file -->
2890         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2891         <!-- startup / system file -->
2892         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.1.0" attr="config" condition="GCC"/>
2893         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2894         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2895       </files>
2896     </component>
2897
2898     <!-- ARMv8MBL -->
2899     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2900       <description>System and Startup for Generic Armv8-M Baseline device</description>
2901       <files>
2902         <!-- include folder / device header file -->
2903         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2904         <!-- startup / system file -->
2905         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2906         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.1.0" attr="config" condition="GCC"/>
2907         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2908         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2909         <!-- SAU configuration -->
2910         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2911       </files>
2912     </component>
2913     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2914       <description>System and Startup for Generic Armv8-M Baseline device</description>
2915       <files>
2916         <!-- include folder / device header file -->
2917         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2918         <!-- startup / system file -->
2919         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.1.0" attr="config" condition="GCC"/>
2920         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2921         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2922         <!-- SAU configuration -->
2923         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2924       </files>
2925     </component>
2926
2927     <!-- ARMv8MML -->
2928     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2929       <description>System and Startup for Generic Armv8-M Mainline device</description>
2930       <files>
2931         <!-- include folder / device header file -->
2932         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2933         <!-- startup / system file -->
2934         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2935         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.1.0" attr="config" condition="GCC"/>
2936         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2937         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2938         <!-- SAU configuration -->
2939         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2940       </files>
2941     </component>
2942     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2943       <description>System and Startup for Generic Armv8-M Mainline device</description>
2944       <files>
2945         <!-- include folder / device header file -->
2946         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2947         <!-- startup / system file -->
2948         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.1.0" attr="config" condition="GCC"/>
2949         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2950         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2951         <!-- SAU configuration -->
2952         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2953       </files>
2954     </component>
2955
2956     <!-- ARMv81MML -->
2957     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv81MML CMSIS">
2958       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2959       <files>
2960         <!-- include folder / device header file -->
2961         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2962         <file category="header"       name="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h"/>
2963         <!-- startup / system file -->
2964         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/ARM/startup_ARMv81MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2965         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2966         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2967         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/IAR/startup_ARMv81MML.s"         version="1.0.0" attr="config" condition="IAR"/>
2968         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2969         <!-- SAU configuration -->
2970         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2971       </files>
2972     </component>
2973     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv81MML CMSIS GCC">
2974       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2975       <files>
2976         <!-- include folder / device header file -->
2977         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2978         <!-- startup / system file -->
2979         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2980         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2981         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2982         <!-- SAU configuration -->
2983         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2984       </files>
2985     </component>
2986
2987     <!-- Cortex-A5 -->
2988     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2989       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2990       <files>
2991         <!-- include folder / device header file -->
2992         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2993         <!-- startup / system / mmu files -->
2994         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2995         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2996         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2997         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2998         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2999         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3000         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3001         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3002         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3003         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
3004         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
3005         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
3006
3007       </files>
3008     </component>
3009
3010     <!-- Cortex-A7 -->
3011     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3012       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3013       <files>
3014         <!-- include folder / device header file -->
3015         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3016         <!-- startup / system / mmu files -->
3017         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3018         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3019         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3020         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3021         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3022         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3023         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3024         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3025         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3026         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
3027         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
3028         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
3029       </files>
3030     </component>
3031
3032     <!-- Cortex-A9 -->
3033     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3034       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3035       <files>
3036         <!-- include folder / device header file -->
3037         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3038         <!-- startup / system / mmu files -->
3039         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3040         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3041         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3042         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3043         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3044         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3045         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3046         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3047         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3048         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
3049         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
3050         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
3051       </files>
3052     </component>
3053
3054     <!-- IRQ Controller -->
3055     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3056       <description>IRQ Controller implementation using GIC</description>
3057       <files>
3058         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3059       </files>
3060     </component>
3061
3062     <!-- OS Tick -->
3063     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3064       <description>OS Tick implementation using Private Timer</description>
3065       <files>
3066         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3067       </files>
3068     </component>
3069
3070     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3071       <description>OS Tick implementation using Generic Physical Timer</description>
3072       <files>
3073         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3074       </files>
3075     </component>
3076
3077     <!-- CMSIS-DSP component -->
3078     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.6.0" isDefaultVariant="true" condition="CMSIS DSP">
3079       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3080       <files>
3081         <!-- CPU independent -->
3082         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3083         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3084
3085         <!-- CPU and Compiler dependent -->
3086         <!-- ARMCC -->
3087         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3088         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3089         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3090         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3091         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3092         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3093         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3094         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3095         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3096         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3097         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3098         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3099         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3100         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3101         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3102         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3103
3104         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3105         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3106         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3107         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3108         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3109         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3110         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3111         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3112         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3113         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3114         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3115         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3116         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3117         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3118         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3119         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3120
3121         <!-- GCC -->
3122         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3123         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3124         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3125         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3126         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3127         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3128         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3129         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3130
3131         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3132         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3133         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3134         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3135         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3136         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3137         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3138         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3139         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3140         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3141         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3142         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3143         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3144         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3145         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3146         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3147
3148         <!-- IAR -->
3149         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3150         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3151         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3152         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3153         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3154         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3155         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3156         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3157         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3158         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3159         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3160         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3161         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3162         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3163         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3164         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3165
3166         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3167         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3168         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3169         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3170         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3171         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3172         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3173         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3174         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3175         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3176         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3177         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3178         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3179         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3180         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3181         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3182
3183       </files>
3184     </component>
3185     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.6.0" condition="CMSIS DSP">
3186       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3187       <files>
3188         <!-- CPU independent -->
3189         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3190         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3191
3192         <!-- RTX sources (core) -->
3193         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3194         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3195         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3196         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3197         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3198         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3199         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3200         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3201         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3202         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3203
3204       </files>
3205     </component>
3206
3207     <!-- CMSIS-NN component -->
3208     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.1.0" condition="CMSIS NN">
3209       <description>CMSIS-NN Neural Network Library</description>
3210       <files>
3211         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3212         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3213
3214         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3215         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3216         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3217         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3218
3219         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3220         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3221         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3222         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3223         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3224         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3225         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3226         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3227         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3228         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3229         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3230         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3231
3232         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3233         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3234         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3235         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3236         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3237         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3238
3239         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3240         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3241         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3242         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3243         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3244
3245         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3246
3247         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3248         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3249       </files>
3250     </component>
3251
3252     <!-- CMSIS-RTOS Keil RTX component -->
3253     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3254       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3255       <RTE_Components_h>
3256         <!-- the following content goes into file 'RTE_Components.h' -->
3257         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3258         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3259       </RTE_Components_h>
3260       <files>
3261         <!-- CPU independent -->
3262         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3263         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3264         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3265
3266         <!-- RTX templates -->
3267         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3268         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3269         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3270         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3271         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3272         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3273         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3274         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3275         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3276         <!-- tool-chain specific template file -->
3277         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3278         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3279         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3280
3281         <!-- CPU and Compiler dependent -->
3282         <!-- ARMCC -->
3283         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3284         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3285         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3286         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3287         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3288         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3289         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3290         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3291         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3292         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3293         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3294         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3295         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3296         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3297         <!-- GCC -->
3298         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3299         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3300         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3301         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3302         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3303         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3304         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3305         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3306         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3307         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3308         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3309         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3310         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3311         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3312         <!-- IAR -->
3313         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3314         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3315         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3316         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3317         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3318         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3319         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3320         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3321         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3322         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3323         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3324         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3325         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3326         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3327       </files>
3328     </component>
3329     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3330     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
3331       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3332       <RTE_Components_h>
3333         <!-- the following content goes into file 'RTE_Components.h' -->
3334         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3335         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3336       </RTE_Components_h>
3337       <files>
3338         <!-- CPU independent -->
3339         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3340         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3341         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3342
3343         <!-- RTX templates -->
3344         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3345         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3346         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3347         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3348         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3349         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3350         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3351         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3352         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3353         <!-- tool-chain specific template file -->
3354         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3355         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3356         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3357
3358         <!-- CPU and Compiler dependent -->
3359         <!-- ARMCC -->
3360         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3361         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3362         <!-- GCC -->
3363         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3364         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3365         <!-- IAR -->
3366       </files>
3367     </component>
3368
3369     <!-- CMSIS-RTOS Keil RTX5 component -->
3370     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.1" Capiversion="1.0.0" condition="RTOS RTX5">
3371       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3372       <RTE_Components_h>
3373         <!-- the following content goes into file 'RTE_Components.h' -->
3374         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3375         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3376       </RTE_Components_h>
3377       <files>
3378         <!-- RTX header file -->
3379         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3380         <!-- RTX compatibility module for API V1 -->
3381         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3382       </files>
3383     </component>
3384
3385     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3386     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3387       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3388       <RTE_Components_h>
3389         <!-- the following content goes into file 'RTE_Components.h' -->
3390         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3391         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3392       </RTE_Components_h>
3393       <files>
3394         <!-- RTX documentation -->
3395         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3396
3397         <!-- RTX header files -->
3398         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3399
3400         <!-- RTX configuration -->
3401         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3402         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3403
3404         <!-- RTX templates -->
3405         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3406         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3407         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3408         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3409         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3413         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3414         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3415
3416         <!-- RTX library configuration -->
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3418
3419         <!-- RTX libraries (CPU and Compiler dependent) -->
3420         <!-- ARMCC -->
3421         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3422         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3423         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3424         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3425         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3426         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3427         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3428         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3429         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3430         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3431         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3432         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3433         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3434         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3435         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3436         <!-- GCC -->
3437         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3438         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3439         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3440         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3441         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3442         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3443         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3444         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3445         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3446         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3447         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3448         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3449         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3450         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3451         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3452         <!-- IAR -->
3453         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3454         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3455         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3456         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3457         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3458         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3459         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3460         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3461         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3462         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3463         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3464         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3465         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3466         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3467         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3468       </files>
3469     </component>
3470     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3471       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3472       <RTE_Components_h>
3473         <!-- the following content goes into file 'RTE_Components.h' -->
3474         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3475         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3476         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3477       </RTE_Components_h>
3478       <files>
3479         <!-- RTX documentation -->
3480         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3481
3482         <!-- RTX header files -->
3483         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3484
3485         <!-- RTX configuration -->
3486         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3487         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3488
3489         <!-- RTX templates -->
3490         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3491         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3492         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3493         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3494         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3495         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3496         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3497         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3498         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3499         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3500
3501         <!-- RTX library configuration -->
3502         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3503
3504         <!-- RTX libraries (CPU and Compiler dependent) -->
3505         <!-- ARMCC -->
3506         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3507         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3508         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3509         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3510         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3512         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3513         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3514         <!-- GCC -->
3515         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3517         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3521         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3523         <!-- IAR -->
3524         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3525         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3526         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3527         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3528         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3529         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3530         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3531         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3532       </files>
3533     </component>
3534     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5">
3535       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3536       <RTE_Components_h>
3537         <!-- the following content goes into file 'RTE_Components.h' -->
3538         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3539         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3540         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3541       </RTE_Components_h>
3542       <files>
3543         <!-- RTX documentation -->
3544         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3545
3546         <!-- RTX header files -->
3547         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3548
3549         <!-- RTX configuration -->
3550         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3551         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3552
3553         <!-- RTX templates -->
3554         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3555         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3556         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3557         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3558         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3559         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3560         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3561         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3562         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3563         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3564
3565         <!-- RTX sources (core) -->
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3569         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3571         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3578         <!-- RTX sources (library configuration) -->
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3580         <!-- RTX sources (handlers ARMCC) -->
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3596         <!-- RTX sources (handlers GCC) -->
3597         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3603         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3604         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3605         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3606         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3607         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3608         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3609         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3610         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3611         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3612         <!-- RTX sources (handlers IAR) -->
3613         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3614         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3615         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3616         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3617         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3618         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3619         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3620         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3621         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3622         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3623         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3624         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3625         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3626         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3627         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3628         <!-- OS Tick (SysTick) -->
3629         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3630       </files>
3631     </component>
3632     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3633       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3634       <RTE_Components_h>
3635         <!-- the following content goes into file 'RTE_Components.h' -->
3636         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3637         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3638         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3639       </RTE_Components_h>
3640       <files>
3641         <!-- RTX documentation -->
3642         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3643
3644         <!-- RTX header files -->
3645         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3646
3647         <!-- RTX configuration -->
3648         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3649         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3650
3651         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3652
3653         <!-- RTX templates -->
3654         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3655         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3656         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3657         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3658         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3659         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3660         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3661         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3662         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3663         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3664
3665         <!-- RTX sources (core) -->
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3669         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3671         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3672         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3673         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3674         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3676         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3678         <!-- RTX sources (library configuration) -->
3679         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3680         <!-- RTX sources (handlers ARMCC) -->
3681         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3682         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3683         <!-- RTX sources (handlers GCC) -->
3684         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3685         <!-- RTX sources (handlers IAR) -->
3686         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3687       </files>
3688     </component>
3689     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3690       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3691       <RTE_Components_h>
3692         <!-- the following content goes into file 'RTE_Components.h' -->
3693         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3694         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3695         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3696         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3697       </RTE_Components_h>
3698       <files>
3699         <!-- RTX documentation -->
3700         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3701
3702         <!-- RTX header files -->
3703         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3704
3705         <!-- RTX configuration -->
3706         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3707         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3708
3709         <!-- RTX templates -->
3710         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3711         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3712         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3713         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3714         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3715         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3716         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3717         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3718         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3719         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3720
3721         <!-- RTX sources (core) -->
3722         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3724         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3725         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3726         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3727         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3728         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3729         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3730         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3731         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3732         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3733         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3734         <!-- RTX sources (library configuration) -->
3735         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3736         <!-- RTX sources (ARMCC handlers) -->
3737         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3738         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3739         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3740         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3741         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3742         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3743         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3745         <!-- RTX sources (GCC handlers) -->
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3747         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3748         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3752         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3754         <!-- RTX sources (IAR handlers) -->
3755         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3757         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3760         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3763         <!-- OS Tick (SysTick) -->
3764         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3765       </files>
3766     </component>
3767
3768     <!-- CMSIS-Driver Custom components -->
3769     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3770       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3771       <files>
3772         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3773         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3774       </files>
3775     </component>
3776     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3777       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3778       <files>
3779         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3780         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3781       </files>
3782     </component>
3783     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3784       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3785       <files>
3786         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3787         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3788       </files>
3789     </component>
3790     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3791       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3792       <files>
3793         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3794         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3795       </files>
3796     </component>
3797     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3798       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3799       <files>
3800         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3801         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3802       </files>
3803     </component>
3804     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3805       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3806       <files>
3807         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3808         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3809       </files>
3810     </component>
3811     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3812       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3813       <files>
3814         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3815         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3816       </files>
3817     </component>
3818     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3819       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3820       <files>
3821         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3822         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3823       </files>
3824     </component>
3825     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3826       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3827       <files>
3828         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3829         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3830         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3831         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3832       </files>
3833     </component>
3834     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3835       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3836       <files>
3837         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3838         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3839       </files>
3840     </component>
3841     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3842       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3843       <files>
3844         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3845         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3846       </files>
3847     </component>
3848     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3849       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3850       <files>
3851         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3852         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3853       </files>
3854     </component>
3855     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3856       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3857       <files>
3858         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3859         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3860       </files>
3861     </component>
3862     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0-beta" Capiversion="1.0.0-beta">
3863       <description>Access to #include Driver_WiFi.h file</description>
3864       <files>
3865         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3866         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3867       </files>
3868     </component>
3869   </components>
3870
3871   <boards>
3872     <board name="uVision Simulator" vendor="Keil">
3873       <description>uVision Simulator</description>
3874       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3875       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3876       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3877       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3878       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3879       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3880       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3881       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3882       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3883       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3884       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3885       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3886       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3887       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3888       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3889       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3890       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3891       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3892       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3893       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3894       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3895       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3896       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3897       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3898     </board>
3899
3900     <board name="EWARM Simulator" vendor="IAR">
3901       <description>EWARM Simulator</description>
3902       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3903       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3904       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3905       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3906       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3907       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3908       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3909       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3910       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3911       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3912       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3913       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3914       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3915       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3916       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3917       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3918       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3919       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3920       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3921       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3922       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3923       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3924       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3925       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3926     </board>
3927   </boards>
3928
3929   <examples>
3930     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3931       <description>DSP_Lib Class Marks example</description>
3932       <board name="uVision Simulator" vendor="Keil"/>
3933       <project>
3934         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3935       </project>
3936       <attributes>
3937         <component Cclass="CMSIS" Cgroup="CORE"/>
3938         <component Cclass="CMSIS" Cgroup="DSP"/>
3939         <component Cclass="Device" Cgroup="Startup"/>
3940         <category>Getting Started</category>
3941       </attributes>
3942     </example>
3943
3944     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3945       <description>DSP_Lib Convolution example</description>
3946       <board name="uVision Simulator" vendor="Keil"/>
3947       <project>
3948         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3949       </project>
3950       <attributes>
3951         <component Cclass="CMSIS" Cgroup="CORE"/>
3952         <component Cclass="CMSIS" Cgroup="DSP"/>
3953         <component Cclass="Device" Cgroup="Startup"/>
3954         <category>Getting Started</category>
3955       </attributes>
3956     </example>
3957
3958     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3959       <description>DSP_Lib Dotproduct example</description>
3960       <board name="uVision Simulator" vendor="Keil"/>
3961       <project>
3962         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3963       </project>
3964       <attributes>
3965         <component Cclass="CMSIS" Cgroup="CORE"/>
3966         <component Cclass="CMSIS" Cgroup="DSP"/>
3967         <component Cclass="Device" Cgroup="Startup"/>
3968         <category>Getting Started</category>
3969       </attributes>
3970     </example>
3971
3972     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3973       <description>DSP_Lib FFT Bin example</description>
3974       <board name="uVision Simulator" vendor="Keil"/>
3975       <project>
3976         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3977       </project>
3978       <attributes>
3979         <component Cclass="CMSIS" Cgroup="CORE"/>
3980         <component Cclass="CMSIS" Cgroup="DSP"/>
3981         <component Cclass="Device" Cgroup="Startup"/>
3982         <category>Getting Started</category>
3983       </attributes>
3984     </example>
3985
3986     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3987       <description>DSP_Lib FIR example</description>
3988       <board name="uVision Simulator" vendor="Keil"/>
3989       <project>
3990         <environment name="uv" load="arm_fir_example.uvprojx"/>
3991       </project>
3992       <attributes>
3993         <component Cclass="CMSIS" Cgroup="CORE"/>
3994         <component Cclass="CMSIS" Cgroup="DSP"/>
3995         <component Cclass="Device" Cgroup="Startup"/>
3996         <category>Getting Started</category>
3997       </attributes>
3998     </example>
3999
4000     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4001       <description>DSP_Lib Graphic Equalizer example</description>
4002       <board name="uVision Simulator" vendor="Keil"/>
4003       <project>
4004         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4005       </project>
4006       <attributes>
4007         <component Cclass="CMSIS" Cgroup="CORE"/>
4008         <component Cclass="CMSIS" Cgroup="DSP"/>
4009         <component Cclass="Device" Cgroup="Startup"/>
4010         <category>Getting Started</category>
4011       </attributes>
4012     </example>
4013
4014     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4015       <description>DSP_Lib Linear Interpolation example</description>
4016       <board name="uVision Simulator" vendor="Keil"/>
4017       <project>
4018         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4019       </project>
4020       <attributes>
4021         <component Cclass="CMSIS" Cgroup="CORE"/>
4022         <component Cclass="CMSIS" Cgroup="DSP"/>
4023         <component Cclass="Device" Cgroup="Startup"/>
4024         <category>Getting Started</category>
4025       </attributes>
4026     </example>
4027
4028     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4029       <description>DSP_Lib Matrix example</description>
4030       <board name="uVision Simulator" vendor="Keil"/>
4031       <project>
4032         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4033       </project>
4034       <attributes>
4035         <component Cclass="CMSIS" Cgroup="CORE"/>
4036         <component Cclass="CMSIS" Cgroup="DSP"/>
4037         <component Cclass="Device" Cgroup="Startup"/>
4038         <category>Getting Started</category>
4039       </attributes>
4040     </example>
4041
4042     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4043       <description>DSP_Lib Signal Convergence example</description>
4044       <board name="uVision Simulator" vendor="Keil"/>
4045       <project>
4046         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4047       </project>
4048       <attributes>
4049         <component Cclass="CMSIS" Cgroup="CORE"/>
4050         <component Cclass="CMSIS" Cgroup="DSP"/>
4051         <component Cclass="Device" Cgroup="Startup"/>
4052         <category>Getting Started</category>
4053       </attributes>
4054     </example>
4055
4056     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4057       <description>DSP_Lib Sinus/Cosinus example</description>
4058       <board name="uVision Simulator" vendor="Keil"/>
4059       <project>
4060         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4061       </project>
4062       <attributes>
4063         <component Cclass="CMSIS" Cgroup="CORE"/>
4064         <component Cclass="CMSIS" Cgroup="DSP"/>
4065         <component Cclass="Device" Cgroup="Startup"/>
4066         <category>Getting Started</category>
4067       </attributes>
4068     </example>
4069
4070     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4071       <description>DSP_Lib Variance example</description>
4072       <board name="uVision Simulator" vendor="Keil"/>
4073       <project>
4074         <environment name="uv" load="arm_variance_example.uvprojx"/>
4075       </project>
4076       <attributes>
4077         <component Cclass="CMSIS" Cgroup="CORE"/>
4078         <component Cclass="CMSIS" Cgroup="DSP"/>
4079         <component Cclass="Device" Cgroup="Startup"/>
4080         <category>Getting Started</category>
4081       </attributes>
4082     </example>
4083
4084     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4085       <description>Neural Network CIFAR10 example</description>
4086       <board name="uVision Simulator" vendor="Keil"/>
4087       <project>
4088         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4089       </project>
4090       <attributes>
4091         <component Cclass="CMSIS" Cgroup="CORE"/>
4092         <component Cclass="CMSIS" Cgroup="DSP"/>
4093         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4094         <component Cclass="Device" Cgroup="Startup"/>
4095         <category>Getting Started</category>
4096       </attributes>
4097     </example>
4098
4099     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4100       <description>Neural Network CIFAR10 example</description>
4101       <board name="EWARM Simulator" vendor="IAR"/>
4102       <project>
4103         <environment name="iar" load="NN-example-cifar10.ewp"/>
4104       </project>
4105       <attributes>
4106         <component Cclass="CMSIS" Cgroup="CORE"/>
4107         <component Cclass="CMSIS" Cgroup="DSP"/>
4108         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4109         <component Cclass="Device" Cgroup="Startup"/>
4110         <category>Getting Started</category>
4111       </attributes>
4112     </example>
4113
4114     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4115       <description>Neural Network GRU example</description>
4116       <board name="uVision Simulator" vendor="Keil"/>
4117       <project>
4118         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4119       </project>
4120       <attributes>
4121         <component Cclass="CMSIS" Cgroup="CORE"/>
4122         <component Cclass="CMSIS" Cgroup="DSP"/>
4123         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4124         <component Cclass="Device" Cgroup="Startup"/>
4125         <category>Getting Started</category>
4126       </attributes>
4127     </example>
4128
4129     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4130       <description>Neural Network GRU example</description>
4131       <board name="EWARM Simulator" vendor="IAR"/>
4132       <project>
4133         <environment name="iar" load="NN-example-gru.ewp"/>
4134       </project>
4135       <attributes>
4136         <component Cclass="CMSIS" Cgroup="CORE"/>
4137         <component Cclass="CMSIS" Cgroup="DSP"/>
4138         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4139         <component Cclass="Device" Cgroup="Startup"/>
4140         <category>Getting Started</category>
4141       </attributes>
4142     </example>
4143
4144     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4145       <description>CMSIS-RTOS2 Blinky example</description>
4146       <board name="uVision Simulator" vendor="Keil"/>
4147       <project>
4148         <environment name="uv" load="Blinky.uvprojx"/>
4149       </project>
4150       <attributes>
4151         <component Cclass="CMSIS" Cgroup="CORE"/>
4152         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4153         <component Cclass="Device" Cgroup="Startup"/>
4154         <category>Getting Started</category>
4155       </attributes>
4156     </example>
4157
4158     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4159       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4160       <board name="uVision Simulator" vendor="Keil"/>
4161       <project>
4162         <environment name="uv" load="Blinky.uvprojx"/>
4163       </project>
4164       <attributes>
4165         <component Cclass="CMSIS" Cgroup="CORE"/>
4166         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4167         <component Cclass="Device" Cgroup="Startup"/>
4168         <category>Getting Started</category>
4169       </attributes>
4170     </example>
4171
4172     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4173       <description>CMSIS-RTOS2 Message Queue Example</description>
4174       <board name="uVision Simulator" vendor="Keil"/>
4175       <project>
4176         <environment name="uv" load="MsqQueue.uvprojx"/>
4177       </project>
4178       <attributes>
4179         <component Cclass="CMSIS" Cgroup="CORE"/>
4180         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4181         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4182         <component Cclass="Device" Cgroup="Startup"/>
4183         <category>Getting Started</category>
4184       </attributes>
4185     </example>
4186
4187     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4188       <description>CMSIS-RTOS2 Memory Pool Example</description>
4189       <board name="uVision Simulator" vendor="Keil"/>
4190       <project>
4191         <environment name="uv" load="MemPool.uvprojx"/>
4192       </project>
4193       <attributes>
4194         <component Cclass="CMSIS" Cgroup="CORE"/>
4195         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4196         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4197         <component Cclass="Device" Cgroup="Startup"/>
4198         <category>Getting Started</category>
4199       </attributes>
4200     </example>
4201
4202     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4203       <description>Bare-metal secure/non-secure example without RTOS</description>
4204       <board name="uVision Simulator" vendor="Keil"/>
4205       <project>
4206         <environment name="uv" load="NoRTOS.uvmpw"/>
4207       </project>
4208       <attributes>
4209         <component Cclass="CMSIS" Cgroup="CORE"/>
4210         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4211         <component Cclass="Device" Cgroup="Startup"/>
4212         <category>Getting Started</category>
4213       </attributes>
4214     </example>
4215
4216     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4217       <description>Secure/non-secure RTOS example with thread context management</description>
4218       <board name="uVision Simulator" vendor="Keil"/>
4219       <project>
4220         <environment name="uv" load="RTOS.uvmpw"/>
4221       </project>
4222       <attributes>
4223         <component Cclass="CMSIS" Cgroup="CORE"/>
4224         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4225         <component Cclass="Device" Cgroup="Startup"/>
4226         <category>Getting Started</category>
4227       </attributes>
4228     </example>
4229
4230     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4231       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4232       <board name="uVision Simulator" vendor="Keil"/>
4233       <project>
4234         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4235       </project>
4236       <attributes>
4237         <component Cclass="CMSIS" Cgroup="CORE"/>
4238         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4239         <component Cclass="Device" Cgroup="Startup"/>
4240         <category>Getting Started</category>
4241       </attributes>
4242     </example>
4243
4244   </examples>
4245
4246 </package>