begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.5.2-dev0">
  12       Active development...
  13     </release>
  14     <release version="5.5.1" date="2019-03-20">
  15       The following folders are deprecated
  16         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  17
  18       CMSIS-Core(M): 5.2.1 (see revision history for details)
  19         - Fixed compilation issue in cmsis_armclang_ltm.h
  20     </release>
  21     <release version="5.5.0" date="2019-03-18">
  22       The following folders have been removed:
  23         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  24         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  25       The following folders are deprecated
  26         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  27
  28       CMSIS-Core(M): 5.2.0 (see revision history for details)
  29         - Reworked Stack/Heap configuration for ARM startup files.
  30         - Added Cortex-M35P device support.
  31         - Added generic Armv8.1-M Mainline device support.
  32       CMSIS-Core(A): 1.1.3 (see revision history for details)
  33       CMSIS-DSP: 1.6.0 (see revision history for details)
  34         - reworked DSP library source files
  35         - reworked DSP library documentation
  36         - Changed DSP folder structure
  37         - moved DSP libraries to folder ./DSP/Lib
  38         - ARM DSP Libraries are built with ARMCLANG
  39         - Added DSP Libraries Source variant
  40       CMSIS-RTOS2:
  41         - RTX 5.5.0 (see revision history for details)
  42       CMSIS-Driver: 2.7.0
  43         - Added WiFi Interface API 1.0.0-beta
  44         - Added components for project specific driver implementations
  45       CMSIS-Pack: 1.6.0 (see revision history for details)
  46       Devices:
  47         - Added Cortex-M35P and ARMv81MML device templates.
  48         - Fixed C-Startup Code for GCC (aligned with other compilers)
  49       Utilities:
  50         - SVDConv 3.3.25
  51         - PackChk 1.3.82
  52     </release>
  53     <release version="5.4.0" date="2018-08-01">
  54       Aligned pack structure with repository.
  55       The following folders are deprecated:
  56         - CMSIS/Include/
  57         - CMSIS/DSP_Lib/
  58
  59       CMSIS-Core(M): 5.1.2 (see revision history for details)
  60         - Added Cortex-M1 support (beta).
  61       CMSIS-Core(A): 1.1.2 (see revision history for details)
  62       CMSIS-NN: 1.1.0
  63         - Added new math functions.
  64       CMSIS-RTOS2:
  65         - API 2.1.3 (see revision history for details)
  66         - RTX 5.4.0 (see revision history for details)
  67           * Updated exception handling on Cortex-A
  68       CMSIS-Driver:
  69         - Flash Driver API V2.2.0
  70       Utilities:
  71         - SVDConv 3.3.21
  72         - PackChk 1.3.71
  73     </release>
  74     <release version="5.3.0" date="2018-02-22">
  75       Updated Arm company brand.
  76       CMSIS-Core(M): 5.1.1 (see revision history for details)
  77       CMSIS-Core(A): 1.1.1 (see revision history for details)
  78       CMSIS-DAP: 2.0.0 (see revision history for details)
  79       CMSIS-NN: 1.0.0
  80         - Initial contribution of the bare metal Neural Network Library.
  81       CMSIS-RTOS2:
  82         - RTX 5.3.0 (see revision history for details)
  83         - OS Tick API 1.0.1
  84     </release>
  85     <release version="5.2.0" date="2017-11-16">
  86       CMSIS-Core(M): 5.1.0 (see revision history for details)
  87         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  88         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  89       CMSIS-Core(A): 1.1.0 (see revision history for details)
  90         - Added compiler_iccarm.h.
  91         - Added additional access functions for physical timer.
  92       CMSIS-DAP: 1.2.0 (see revision history for details)
  93       CMSIS-DSP: 1.5.2 (see revision history for details)
  94       CMSIS-Driver: 2.6.0 (see revision history for details)
  95         - CAN Driver API V1.2.0
  96         - NAND Driver API V2.3.0
  97       CMSIS-RTOS:
  98         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  99       CMSIS-RTOS2:
 100         - API 2.1.2 (see revision history for details)
 101         - RTX 5.2.3 (see revision history for details)
 102       Devices:
 103         - Added GCC startup and linker script for Cortex-A9.
 104         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 105         - Added IAR startup code for Cortex-A9
 106     </release>
 107     <release version="5.1.1" date="2017-09-19">
 108       CMSIS-RTOS2:
 109       - RTX 5.2.1 (see revision history for details)
 110     </release>
 111     <release version="5.1.0" date="2017-08-04">
 112       CMSIS-Core(M): 5.0.2 (see revision history for details)
 113       - Changed Version Control macros to be core agnostic.
 114       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 115       CMSIS-Core(A): 1.0.0 (see revision history for details)
 116       - Initial release
 117       - IRQ Controller API 1.0.0
 118       CMSIS-Driver: 2.05 (see revision history for details)
 119       - All typedefs related to status have been made volatile.
 120       CMSIS-RTOS2:
 121       - API 2.1.1 (see revision history for details)
 122       - RTX 5.2.0 (see revision history for details)
 123       - OS Tick API 1.0.0
 124       CMSIS-DSP: 1.5.2 (see revision history for details)
 125       - Fixed GNU Compiler specific diagnostics.
 126       CMSIS-Pack: 1.5.0 (see revision history for details)
 127       - added System Description File (*.SDF) Format
 128       CMSIS-Zone: 0.0.1 (Preview)
 129       - Initial specification draft
 130     </release>
 131     <release version="5.0.1" date="2017-02-03">
 132       Package Description:
 133       - added taxonomy for Cclass RTOS
 134       CMSIS-RTOS2:
 135       - API 2.1   (see revision history for details)
 136       - RTX 5.1.0 (see revision history for details)
 137       CMSIS-Core: 5.0.1 (see revision history for details)
 138       - Added __PACKED_STRUCT macro
 139       - Added uVisior support
 140       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 141       - Updated template for secure main function (main_s.c)
 142       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 143       CMSIS-DSP: 1.5.1 (see revision history for details)
 144       - added ARMv8M DSP libraries.
 145       CMSIS-Pack:1.4.9 (see revision history for details)
 146       - added Pack Index File specification and schema file
 147     </release>
 148     <release version="5.0.0" date="2016-11-11">
 149       Changed open source license to Apache 2.0
 150       CMSIS_Core:
 151        - Added support for Cortex-M23 and Cortex-M33.
 152        - Added ARMv8-M device configurations for mainline and baseline.
 153        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 154        - Added cmsis_compiler.h to unify compiler behaviour.
 155        - Updated function SCB_EnableICache (for Cortex-M7).
 156        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 157       CMSIS-RTOS:
 158         - bug fix in RTX 4.82 (see revision history for details)
 159       CMSIS-RTOS2:
 160         - new API including compatibility layer to CMSIS-RTOS
 161         - reference implementation based on RTX5
 162         - supports all Cortex-M variants including TrustZone for ARMv8-M
 163       CMSIS-SVD:
 164        - reworked SVD format documentation
 165        - removed SVD file database documentation as SVD files are distributed in packs
 166        - updated SVDConv for Win32 and Linux
 167       CMSIS-DSP:
 168        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 169        - Added DSP libraries build projects to CMSIS pack.
 170     </release>
 171     <release version="4.5.0" date="2015-10-28">
 172       - CMSIS-Core     4.30.0  (see revision history for details)
 173       - CMSIS-DAP      1.1.0   (unchanged)
 174       - CMSIS-Driver   2.04.0  (see revision history for details)
 175       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 176       - CMSIS-Pack     1.4.1   (see revision history for details)
 177       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 178       - CMSIS-SVD      1.3.1   (see revision history for details)
 179     </release>
 180     <release version="4.4.0" date="2015-09-11">
 181       - CMSIS-Core     4.20   (see revision history for details)
 182       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 183       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 184       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 185       - CMSIS-RTOS
 186         -- API         1.02   (unchanged)
 187         -- RTX         4.79   (see revision history for details)
 188       - CMSIS-SVD      1.3.0  (see revision history for details)
 189       - CMSIS-DAP      1.1.0  (extended with SWO support)
 190     </release>
 191     <release version="4.3.0" date="2015-03-20">
 192       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 193       - CMSIS-DSP      1.4.5  (see revision history for details)
 194       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 195       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 196       - CMSIS-RTOS
 197         -- API         1.02   (unchanged)
 198         -- RTX         4.78   (see revision history for details)
 199       - CMSIS-SVD      1.2    (unchanged)
 200     </release>
 201     <release version="4.2.0" date="2014-09-24">
 202       Adding Cortex-M7 support
 203       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 204       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 205       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 206       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 207       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 208     </release>
 209     <release version="4.1.1" date="2014-06-30">
 210       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 211     </release>
 212     <release version="4.1.0" date="2014-06-12">
 213       - CMSIS-Driver   2.02  (incompatible update)
 214       - CMSIS-Pack     1.3   (see revision history for details)
 215       - CMSIS-DSP      1.4.2 (unchanged)
 216       - CMSIS-Core     3.30  (unchanged)
 217       - CMSIS-RTOS RTX 4.74  (unchanged)
 218       - CMSIS-RTOS API 1.02  (unchanged)
 219       - CMSIS-SVD      1.10  (unchanged)
 220       PACK:
 221       - removed G++ specific files from PACK
 222       - added Component Startup variant "C Startup"
 223       - added Pack Checking Utility
 224       - updated conditions to reflect tool-chain dependency
 225       - added Taxonomy for Graphics
 226       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 227     </release>
 228     <release version="4.0.0">
 229       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 230       - CMSIS-Pack     1.1   Preliminary
 231       - CMSIS-DSP      1.4.2 (see revision history for details)
 232       - CMSIS-Core     3.30  (see revision history for details)
 233       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 234       - CMSIS-RTOS API 1.02  (unchanged)
 235       - CMSIS-SVD      1.10  (unchanged)
 236     </release>
 237     <release version="3.20.4">
 238       - CMSIS-RTOS 4.74 (see revision history for details)
 239       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 240     </release>
 241     <release version="3.20.3">
 242       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 243       - CMSIS-RTOS 4.73 (see revision history for details)
 244     </release>
 245     <release version="3.20.2">
 246       - CMSIS-Pack documentation has been added
 247       - CMSIS-Drivers header and documentation have been added to PACK
 248       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 249     </release>
 250     <release version="3.20.1">
 251       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 252       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 253     </release>
 254     <release version="3.20.0">
 255       The software portions that are deployed in the application program are now under a BSD license which allows usage
 256       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 257       The individual components have been update as listed below:
 258       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 259       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 260       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 261       - CMSIS-SVD is unchanged.
 262     </release>
 263   </releases>
 264
 265   <taxonomy>
 266     <description Cclass="Audio">Software components for audio processing</description>
 267     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 268     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 269     <description Cclass="Compiler">Compiler Software Extensions</description>
 270     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 271     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 272     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 273     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 274     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 275     <description Cclass="File System">File Drive Support and File System</description>
 276     <description Cclass="IoT Client">IoT cloud client connector</description>
 277     <description Cclass="IoT Utility">IoT specific software utility</description>
 278     <description Cclass="Graphics">Graphical User Interface</description>
 279     <description Cclass="Network">Network Stack using Internet Protocols</description>
 280     <description Cclass="RTOS">Real-time Operating System</description>
 281     <description Cclass="Security">Encryption for secure communication or storage</description>
 282     <description Cclass="USB">Universal Serial Bus Stack</description>
 283     <description Cclass="Utility">Generic software utility components</description>
 284   </taxonomy>
 285
 286   <devices>
 287     <!-- ******************************  Cortex-M0  ****************************** -->
 288     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 289       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 290       <description>
 291 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 292 - simple, easy-to-use programmers model
 293 - highly efficient ultra-low power operation
 294 - excellent code density
 295 - deterministic, high-performance interrupt handling
 296 - upward compatibility with the rest of the Cortex-M processor family.
 297       </description>
 298       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 299       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 300       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 301       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 302
 303       <device Dname="ARMCM0">
 304         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 305         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 306       </device>
 307     </family>
 308
 309     <!-- ******************************  Cortex-M0P  ****************************** -->
 310     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 311       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 312       <description>
 313 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 314 - simple, easy-to-use programmers model
 315 - highly efficient ultra-low power operation
 316 - excellent code density
 317 - deterministic, high-performance interrupt handling
 318 - upward compatibility with the rest of the Cortex-M processor family.
 319       </description>
 320       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 321       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 322       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 323       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 324
 325       <device Dname="ARMCM0P">
 326         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 327         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 328       </device>
 329
 330       <device Dname="ARMCM0P_MPU">
 331         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 332         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 333       </device>
 334     </family>
 335
 336     <!-- ******************************  Cortex-M1  ****************************** -->
 337     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 338       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 339       <description>
 340 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 341 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 342       </description>
 343       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 344       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 345       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 346       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 347
 348       <device Dname="ARMCM1">
 349         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 350         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 351       </device>
 352     </family>
 353
 354     <!-- ******************************  Cortex-M3  ****************************** -->
 355     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 356       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 357       <description>
 358 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 359 - simple, easy-to-use programmers model
 360 - highly efficient ultra-low power operation
 361 - excellent code density
 362 - deterministic, high-performance interrupt handling
 363 - upward compatibility with the rest of the Cortex-M processor family.
 364       </description>
 365       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 366       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 367       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 368       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 369
 370       <device Dname="ARMCM3">
 371         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 372         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 373       </device>
 374     </family>
 375
 376     <!-- ******************************  Cortex-M4  ****************************** -->
 377     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 378       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 379       <description>
 380 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 381 - simple, easy-to-use programmers model
 382 - highly efficient ultra-low power operation
 383 - excellent code density
 384 - deterministic, high-performance interrupt handling
 385 - upward compatibility with the rest of the Cortex-M processor family.
 386       </description>
 387       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 388       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 389       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 390       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 391
 392       <device Dname="ARMCM4">
 393         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 394         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 395       </device>
 396
 397       <device Dname="ARMCM4_FP">
 398         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 399         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 400       </device>
 401     </family>
 402
 403     <!-- ******************************  Cortex-M7  ****************************** -->
 404     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 405       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 406       <description>
 407 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 408 - simple, easy-to-use programmers model
 409 - highly efficient ultra-low power operation
 410 - excellent code density
 411 - deterministic, high-performance interrupt handling
 412 - upward compatibility with the rest of the Cortex-M processor family.
 413       </description>
 414       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 415       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 416       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 417       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 418
 419       <device Dname="ARMCM7">
 420         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 421         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 422       </device>
 423
 424       <device Dname="ARMCM7_SP">
 425         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 426         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 427       </device>
 428
 429       <device Dname="ARMCM7_DP">
 430         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 431         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 432       </device>
 433     </family>
 434
 435     <!-- ******************************  Cortex-M23  ********************** -->
 436     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 437       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 438       <description>
 439 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 440 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 441 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 442       </description>
 443       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 444       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 445       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 446       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 447       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 448       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 449
 450       <device Dname="ARMCM23">
 451         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 452         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 453       </device>
 454
 455       <device Dname="ARMCM23_TZ">
 456         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 457         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 458       </device>
 459     </family>
 460
 461     <!-- ******************************  Cortex-M33  ****************************** -->
 462     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 463       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 464       <description>
 465 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 466 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 467       </description>
 468       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 469       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 470       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 471       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 472       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 473       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 474
 475       <device Dname="ARMCM33">
 476         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 477         <description>
 478           no DSP Instructions, no Floating Point Unit, no TrustZone
 479         </description>
 480         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 481       </device>
 482
 483       <device Dname="ARMCM33_TZ">
 484         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 485         <description>
 486           no DSP Instructions, no Floating Point Unit, TrustZone
 487         </description>
 488         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 489       </device>
 490
 491       <device Dname="ARMCM33_DSP_FP">
 492         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 493         <description>
 494           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 495         </description>
 496         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 497       </device>
 498
 499       <device Dname="ARMCM33_DSP_FP_TZ">
 500         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 501         <description>
 502           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 503         </description>
 504         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 505       </device>
 506     </family>
 507
 508     <!-- ******************************  Cortex-M35P  ****************************** -->
 509     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 510       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 511       <description>
 512 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 513 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 514       </description>
 515
 516       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 517       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 518       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 519       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 520       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 521       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 522
 523       <device Dname="ARMCM35P">
 524         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 525         <description>
 526           no DSP Instructions, no Floating Point Unit, no TrustZone
 527         </description>
 528         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 529       </device>
 530
 531       <device Dname="ARMCM35P_TZ">
 532         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 533         <description>
 534           no DSP Instructions, no Floating Point Unit, TrustZone
 535         </description>
 536         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 537       </device>
 538
 539       <device Dname="ARMCM35P_DSP_FP">
 540         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 541         <description>
 542           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 543         </description>
 544         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 545       </device>
 546
 547       <device Dname="ARMCM35P_DSP_FP_TZ">
 548         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 549         <description>
 550           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 551         </description>
 552         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 553       </device>
 554     </family>
 555
 556     <!-- ******************************  ARMSC000  ****************************** -->
 557     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 558       <description>
 559 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 560 - simple, easy-to-use programmers model
 561 - highly efficient ultra-low power operation
 562 - excellent code density
 563 - deterministic, high-performance interrupt handling
 564       </description>
 565       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 566       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 567       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 568       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 569
 570       <device Dname="ARMSC000">
 571         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 572         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 573       </device>
 574     </family>
 575
 576     <!-- ******************************  ARMSC300  ****************************** -->
 577     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 578       <description>
 579 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 580 - simple, easy-to-use programmers model
 581 - highly efficient ultra-low power operation
 582 - excellent code density
 583 - deterministic, high-performance interrupt handling
 584       </description>
 585       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 586       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 587       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 588       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 589
 590       <device Dname="ARMSC300">
 591         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 592         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 593       </device>
 594     </family>
 595
 596     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 597     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 598       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 599       <description>
 600 Armv8-M Baseline based device with TrustZone
 601       </description>
 602       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 603       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 604       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 605       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 606       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 607       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 608
 609       <device Dname="ARMv8MBL">
 610         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 611         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 612       </device>
 613     </family>
 614
 615     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 616     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 617       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 618       <description>
 619 Armv8-M Mainline based device with TrustZone
 620       </description>
 621       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 622       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 623       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 624       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 625       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 626       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 627
 628       <device Dname="ARMv8MML">
 629         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 630         <description>
 631           no DSP Instructions, no Floating Point Unit, TrustZone
 632         </description>
 633         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 634       </device>
 635
 636       <device Dname="ARMv8MML_DSP">
 637         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 638         <description>
 639           DSP Instructions, no Floating Point Unit, TrustZone
 640         </description>
 641         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 642       </device>
 643
 644       <device Dname="ARMv8MML_SP">
 645         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 646         <description>
 647           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 648         </description>
 649         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 650       </device>
 651
 652       <device Dname="ARMv8MML_DSP_SP">
 653         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 654         <description>
 655           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 656         </description>
 657         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 658       </device>
 659
 660       <device Dname="ARMv8MML_DP">
 661         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 662         <description>
 663           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 664         </description>
 665         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 666       </device>
 667
 668       <device Dname="ARMv8MML_DSP_DP">
 669         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 670         <description>
 671           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 672         </description>
 673         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 674       </device>
 675     </family>
 676
 677     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 678     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 679       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 680       <description>
 681 Armv8.1-M Mainline based device with TrustZone and MVE
 682       </description>
 683       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 684       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 685       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 686       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 687       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 688       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 689
 690
 691       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 692         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 693         <description>
 694           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 695         </description>
 696         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 697       </device>
 698     </family>
 699
 700     <!-- ******************************  Cortex-A5  ****************************** -->
 701     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 702       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 703       <description>
 704 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 705 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 706 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 707       </description>
 708
 709       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 710       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 711
 712       <device Dname="ARMCA5">
 713         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 714         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 715       </device>
 716     </family>
 717
 718     <!-- ******************************  Cortex-A7  ****************************** -->
 719     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 720       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 721       <description>
 722 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 723 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 724 an optional integrated GIC, and an optional L2 cache controller.
 725       </description>
 726
 727       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 728       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 729
 730       <device Dname="ARMCA7">
 731         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 732         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 733       </device>
 734     </family>
 735
 736     <!-- ******************************  Cortex-A9  ****************************** -->
 737     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 738       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 739       <description>
 740 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 741 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 742 and 8-bit Java bytecodes in Jazelle state.
 743       </description>
 744
 745       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 746       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 747
 748       <device Dname="ARMCA9">
 749         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 750         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 751       </device>
 752     </family>
 753   </devices>
 754
 755
 756   <apis>
 757     <!-- CMSIS Device API -->
 758     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 759       <description>Device interrupt controller interface</description>
 760       <files>
 761         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 762       </files>
 763     </api>
 764     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 765       <description>RTOS Kernel system tick timer interface</description>
 766       <files>
 767         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 768       </files>
 769     </api>
 770     <!-- CMSIS-RTOS API -->
 771     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 772       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 773       <files>
 774         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 775       </files>
 776     </api>
 777     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 778       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 779       <files>
 780         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 781         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 782       </files>
 783     </api>
 784     <!-- CMSIS Driver API -->
 785     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 786       <description>USART Driver API for Cortex-M</description>
 787       <files>
 788         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 789         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 790       </files>
 791     </api>
 792     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 793       <description>SPI Driver API for Cortex-M</description>
 794       <files>
 795         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 796         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 797       </files>
 798     </api>
 799     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 800       <description>SAI Driver API for Cortex-M</description>
 801       <files>
 802         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 803         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 804       </files>
 805     </api>
 806     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 807       <description>I2C Driver API for Cortex-M</description>
 808       <files>
 809         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 810         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 811       </files>
 812     </api>
 813     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 814       <description>CAN Driver API for Cortex-M</description>
 815       <files>
 816         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 817         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 818       </files>
 819     </api>
 820     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 821       <description>Flash Driver API for Cortex-M</description>
 822       <files>
 823         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 824         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 825       </files>
 826     </api>
 827     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 828       <description>MCI Driver API for Cortex-M</description>
 829       <files>
 830         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 831         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 832       </files>
 833     </api>
 834     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 835       <description>NAND Flash Driver API for Cortex-M</description>
 836       <files>
 837         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 838         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 839       </files>
 840     </api>
 841     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 842       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 843       <files>
 844         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 845         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 846         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 847       </files>
 848     </api>
 849     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 850       <description>Ethernet MAC Driver API for Cortex-M</description>
 851       <files>
 852         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 853         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 854       </files>
 855     </api>
 856     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 857       <description>Ethernet PHY Driver API for Cortex-M</description>
 858       <files>
 859         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 860         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 861       </files>
 862     </api>
 863     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 864       <description>USB Device Driver API for Cortex-M</description>
 865       <files>
 866         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 867         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 868       </files>
 869     </api>
 870     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 871       <description>USB Host Driver API for Cortex-M</description>
 872       <files>
 873         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 874         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 875       </files>
 876     </api>
 877     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0-beta" exclusive="0">
 878       <description>WiFi driver</description>
 879       <files>
 880         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 881         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 882       </files>
 883     </api>
 884   </apis>
 885
 886   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 887   <conditions>
 888     <!-- compiler -->
 889     <condition id="ARMCC6">
 890       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 891       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 892     </condition>
 893     <condition id="ARMCC5">
 894       <require Tcompiler="ARMCC" Toptions="AC5"/>
 895     </condition>
 896     <condition id="ARMCC">
 897       <require Tcompiler="ARMCC"/>
 898     </condition>
 899     <condition id="GCC">
 900       <require Tcompiler="GCC"/>
 901     </condition>
 902     <condition id="IAR">
 903       <require Tcompiler="IAR"/>
 904     </condition>
 905     <condition id="ARMCC GCC">
 906       <accept Tcompiler="ARMCC"/>
 907       <accept Tcompiler="GCC"/>
 908     </condition>
 909     <condition id="ARMCC GCC IAR">
 910       <accept Tcompiler="ARMCC"/>
 911       <accept Tcompiler="GCC"/>
 912       <accept Tcompiler="IAR"/>
 913     </condition>
 914
 915     <!-- Arm architecture -->
 916     <condition id="ARMv6-M Device">
 917       <description>Armv6-M architecture based device</description>
 918       <accept Dcore="Cortex-M0"/>
 919       <accept Dcore="Cortex-M1"/>
 920       <accept Dcore="Cortex-M0+"/>
 921       <accept Dcore="SC000"/>
 922     </condition>
 923     <condition id="ARMv7-M Device">
 924       <description>Armv7-M architecture based device</description>
 925       <accept Dcore="Cortex-M3"/>
 926       <accept Dcore="Cortex-M4"/>
 927       <accept Dcore="Cortex-M7"/>
 928       <accept Dcore="SC300"/>
 929     </condition>
 930     <condition id="ARMv8-M Device">
 931       <description>Armv8-M architecture based device</description>
 932       <accept Dcore="ARMV8MBL"/>
 933       <accept Dcore="ARMV8MML"/>
 934       <accept Dcore="ARMV81MML"/>
 935       <accept Dcore="Cortex-M23"/>
 936       <accept Dcore="Cortex-M33"/>
 937       <accept Dcore="Cortex-M35P"/>
 938     </condition>
 939     <condition id="ARMv8-M TZ Device">
 940       <description>Armv8-M architecture based device with TrustZone</description>
 941       <require condition="ARMv8-M Device"/>
 942       <require Dtz="TZ"/>
 943     </condition>
 944     <condition id="ARMv6_7-M Device">
 945       <description>Armv6_7-M architecture based device</description>
 946       <accept condition="ARMv6-M Device"/>
 947       <accept condition="ARMv7-M Device"/>
 948     </condition>
 949     <condition id="ARMv6_7_8-M Device">
 950       <description>Armv6_7_8-M architecture based device</description>
 951       <accept condition="ARMv6-M Device"/>
 952       <accept condition="ARMv7-M Device"/>
 953       <accept condition="ARMv8-M Device"/>
 954     </condition>
 955     <condition id="ARMv7-A Device">
 956       <description>Armv7-A architecture based device</description>
 957       <accept Dcore="Cortex-A5"/>
 958       <accept Dcore="Cortex-A7"/>
 959       <accept Dcore="Cortex-A9"/>
 960     </condition>
 961
 962     <!-- ARM core -->
 963     <condition id="CM0">
 964       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 965       <accept Dcore="Cortex-M0"/>
 966       <accept Dcore="Cortex-M0+"/>
 967       <accept Dcore="SC000"/>
 968     </condition>
 969     <condition id="CM1">
 970       <description>Cortex-M1</description>
 971       <require Dcore="Cortex-M1"/>
 972     </condition>
 973     <condition id="CM3">
 974       <description>Cortex-M3 or SC300 processor based device</description>
 975       <accept Dcore="Cortex-M3"/>
 976       <accept Dcore="SC300"/>
 977     </condition>
 978     <condition id="CM4">
 979       <description>Cortex-M4 processor based device</description>
 980       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 981     </condition>
 982     <condition id="CM4_FP">
 983       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 984       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 985       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 986       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 987     </condition>
 988     <condition id="CM7">
 989       <description>Cortex-M7 processor based device</description>
 990       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 991     </condition>
 992     <condition id="CM7_FP">
 993       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 994       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 995       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 996     </condition>
 997     <condition id="CM7_SP">
 998       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 999       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1000     </condition>
1001     <condition id="CM7_DP">
1002       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1003       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1004     </condition>
1005     <condition id="CM23">
1006       <description>Cortex-M23 processor based device</description>
1007       <require Dcore="Cortex-M23"/>
1008     </condition>
1009     <condition id="CM33">
1010       <description>Cortex-M33 processor based device</description>
1011       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1012     </condition>
1013     <condition id="CM33_FP">
1014       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1015       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1016     </condition>
1017     <condition id="CM35P">
1018       <description>Cortex-M35P processor based device</description>
1019       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1020     </condition>
1021     <condition id="CM35P_FP">
1022       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1023       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1024     </condition>
1025     <condition id="ARMv8MBL">
1026       <description>Armv8-M Baseline processor based device</description>
1027       <require Dcore="ARMV8MBL"/>
1028     </condition>
1029     <condition id="ARMv8MML">
1030       <description>Armv8-M Mainline processor based device</description>
1031       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1032     </condition>
1033     <condition id="ARMv8MML_FP">
1034       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1035       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1036       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1037     </condition>
1038
1039     <condition id="CM33_NODSP_NOFPU">
1040       <description>CM33, no DSP, no FPU</description>
1041       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1042     </condition>
1043     <condition id="CM33_DSP_NOFPU">
1044       <description>CM33, DSP, no FPU</description>
1045       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1046     </condition>
1047     <condition id="CM33_NODSP_SP">
1048       <description>CM33, no DSP, SP FPU</description>
1049       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1050     </condition>
1051     <condition id="CM33_DSP_SP">
1052       <description>CM33, DSP, SP FPU</description>
1053       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1054     </condition>
1055
1056     <condition id="CM35P_NODSP_NOFPU">
1057       <description>CM35P, no DSP, no FPU</description>
1058       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1059     </condition>
1060     <condition id="CM35P_DSP_NOFPU">
1061       <description>CM35P, DSP, no FPU</description>
1062       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1063     </condition>
1064     <condition id="CM35P_NODSP_SP">
1065       <description>CM35P, no DSP, SP FPU</description>
1066       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1067     </condition>
1068     <condition id="CM35P_DSP_SP">
1069       <description>CM35P, DSP, SP FPU</description>
1070       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1071     </condition>
1072
1073     <condition id="ARMv8MML_NODSP_NOFPU">
1074       <description>Armv8-M Mainline, no DSP, no FPU</description>
1075       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1076     </condition>
1077     <condition id="ARMv8MML_DSP_NOFPU">
1078       <description>Armv8-M Mainline, DSP, no FPU</description>
1079       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1080     </condition>
1081     <condition id="ARMv8MML_NODSP_SP">
1082       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1083       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1084     </condition>
1085     <condition id="ARMv8MML_DSP_SP">
1086       <description>Armv8-M Mainline, DSP, SP FPU</description>
1087       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1088     </condition>
1089
1090     <condition id="ARMv81MML">
1091       <description>Armv8.1-M Mainline</description>
1092       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1093     </condition>
1094
1095     <condition id="CA5_CA9">
1096       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1097       <accept Dcore="Cortex-A5"/>
1098       <accept Dcore="Cortex-A9"/>
1099     </condition>
1100
1101     <condition id="CA7">
1102       <description>Cortex-A7 processor based device</description>
1103       <accept Dcore="Cortex-A7"/>
1104     </condition>
1105
1106     <!-- ARMCC compiler -->
1107     <condition id="CA_ARMCC5">
1108       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1109       <require condition="ARMv7-A Device"/>
1110       <require condition="ARMCC5"/>
1111     </condition>
1112     <condition id="CA_ARMCC6">
1113       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1114       <require condition="ARMv7-A Device"/>
1115       <require condition="ARMCC6"/>
1116     </condition>
1117
1118     <condition id="CM0_ARMCC">
1119       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1120       <require condition="CM0"/>
1121       <require Tcompiler="ARMCC"/>
1122     </condition>
1123     <condition id="CM0_LE_ARMCC">
1124       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1125       <require condition="CM0_ARMCC"/>
1126       <require Dendian="Little-endian"/>
1127     </condition>
1128     <condition id="CM0_BE_ARMCC">
1129       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1130       <require condition="CM0_ARMCC"/>
1131       <require Dendian="Big-endian"/>
1132     </condition>
1133
1134     <condition id="CM1_ARMCC">
1135       <description>Cortex-M1 based device for the Arm Compiler</description>
1136       <require condition="CM1"/>
1137       <require Tcompiler="ARMCC"/>
1138     </condition>
1139     <condition id="CM1_LE_ARMCC">
1140       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1141       <require condition="CM1_ARMCC"/>
1142       <require Dendian="Little-endian"/>
1143     </condition>
1144     <condition id="CM1_BE_ARMCC">
1145       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1146       <require condition="CM1_ARMCC"/>
1147       <require Dendian="Big-endian"/>
1148     </condition>
1149
1150     <condition id="CM3_ARMCC">
1151       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1152       <require condition="CM3"/>
1153       <require Tcompiler="ARMCC"/>
1154     </condition>
1155     <condition id="CM3_LE_ARMCC">
1156       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1157       <require condition="CM3_ARMCC"/>
1158       <require Dendian="Little-endian"/>
1159     </condition>
1160     <condition id="CM3_BE_ARMCC">
1161       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1162       <require condition="CM3_ARMCC"/>
1163       <require Dendian="Big-endian"/>
1164     </condition>
1165
1166     <condition id="CM4_ARMCC">
1167       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1168       <require condition="CM4"/>
1169       <require Tcompiler="ARMCC"/>
1170     </condition>
1171     <condition id="CM4_LE_ARMCC">
1172       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1173       <require condition="CM4_ARMCC"/>
1174       <require Dendian="Little-endian"/>
1175     </condition>
1176     <condition id="CM4_BE_ARMCC">
1177       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1178       <require condition="CM4_ARMCC"/>
1179       <require Dendian="Big-endian"/>
1180     </condition>
1181
1182     <condition id="CM4_FP_ARMCC">
1183       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1184       <require condition="CM4_FP"/>
1185       <require Tcompiler="ARMCC"/>
1186     </condition>
1187     <condition id="CM4_FP_LE_ARMCC">
1188       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1189       <require condition="CM4_FP_ARMCC"/>
1190       <require Dendian="Little-endian"/>
1191     </condition>
1192     <condition id="CM4_FP_BE_ARMCC">
1193       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1194       <require condition="CM4_FP_ARMCC"/>
1195       <require Dendian="Big-endian"/>
1196     </condition>
1197
1198     <condition id="CM7_ARMCC">
1199       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1200       <require condition="CM7"/>
1201       <require Tcompiler="ARMCC"/>
1202     </condition>
1203     <condition id="CM7_LE_ARMCC">
1204       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1205       <require condition="CM7_ARMCC"/>
1206       <require Dendian="Little-endian"/>
1207     </condition>
1208     <condition id="CM7_BE_ARMCC">
1209       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1210       <require condition="CM7_ARMCC"/>
1211       <require Dendian="Big-endian"/>
1212     </condition>
1213
1214     <condition id="CM7_FP_ARMCC">
1215       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1216       <require condition="CM7_FP"/>
1217       <require Tcompiler="ARMCC"/>
1218     </condition>
1219     <condition id="CM7_FP_LE_ARMCC">
1220       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1221       <require condition="CM7_FP_ARMCC"/>
1222       <require Dendian="Little-endian"/>
1223     </condition>
1224     <condition id="CM7_FP_BE_ARMCC">
1225       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1226       <require condition="CM7_FP_ARMCC"/>
1227       <require Dendian="Big-endian"/>
1228     </condition>
1229
1230     <condition id="CM7_SP_ARMCC">
1231       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1232       <require condition="CM7_SP"/>
1233       <require Tcompiler="ARMCC"/>
1234     </condition>
1235     <condition id="CM7_SP_LE_ARMCC">
1236       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1237       <require condition="CM7_SP_ARMCC"/>
1238       <require Dendian="Little-endian"/>
1239     </condition>
1240     <condition id="CM7_SP_BE_ARMCC">
1241       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1242       <require condition="CM7_SP_ARMCC"/>
1243       <require Dendian="Big-endian"/>
1244     </condition>
1245
1246     <condition id="CM7_DP_ARMCC">
1247       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1248       <require condition="CM7_DP"/>
1249       <require Tcompiler="ARMCC"/>
1250     </condition>
1251     <condition id="CM7_DP_LE_ARMCC">
1252       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1253       <require condition="CM7_DP_ARMCC"/>
1254       <require Dendian="Little-endian"/>
1255     </condition>
1256     <condition id="CM7_DP_BE_ARMCC">
1257       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1258       <require condition="CM7_DP_ARMCC"/>
1259       <require Dendian="Big-endian"/>
1260     </condition>
1261
1262     <condition id="CM23_ARMCC">
1263       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1264       <require condition="CM23"/>
1265       <require Tcompiler="ARMCC"/>
1266     </condition>
1267     <condition id="CM23_LE_ARMCC">
1268       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1269       <require condition="CM23_ARMCC"/>
1270       <require Dendian="Little-endian"/>
1271     </condition>
1272     <condition id="CM23_BE_ARMCC">
1273       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1274       <require condition="CM23_ARMCC"/>
1275       <require Dendian="Big-endian"/>
1276     </condition>
1277
1278     <condition id="CM33_ARMCC">
1279       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1280       <require condition="CM33"/>
1281       <require Tcompiler="ARMCC"/>
1282     </condition>
1283     <condition id="CM33_LE_ARMCC">
1284       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1285       <require condition="CM33_ARMCC"/>
1286       <require Dendian="Little-endian"/>
1287     </condition>
1288     <condition id="CM33_BE_ARMCC">
1289       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1290       <require condition="CM33_ARMCC"/>
1291       <require Dendian="Big-endian"/>
1292     </condition>
1293
1294     <condition id="CM33_FP_ARMCC">
1295       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1296       <require condition="CM33_FP"/>
1297       <require Tcompiler="ARMCC"/>
1298     </condition>
1299     <condition id="CM33_FP_LE_ARMCC">
1300       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1301       <require condition="CM33_FP_ARMCC"/>
1302       <require Dendian="Little-endian"/>
1303     </condition>
1304     <condition id="CM33_FP_BE_ARMCC">
1305       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1306       <require condition="CM33_FP_ARMCC"/>
1307       <require Dendian="Big-endian"/>
1308     </condition>
1309
1310     <condition id="CM33_NODSP_NOFPU_ARMCC">
1311       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1312       <require condition="CM33_NODSP_NOFPU"/>
1313       <require Tcompiler="ARMCC"/>
1314     </condition>
1315     <condition id="CM33_DSP_NOFPU_ARMCC">
1316       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1317       <require condition="CM33_DSP_NOFPU"/>
1318       <require Tcompiler="ARMCC"/>
1319     </condition>
1320     <condition id="CM33_NODSP_SP_ARMCC">
1321       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1322       <require condition="CM33_NODSP_SP"/>
1323       <require Tcompiler="ARMCC"/>
1324     </condition>
1325     <condition id="CM33_DSP_SP_ARMCC">
1326       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1327       <require condition="CM33_DSP_SP"/>
1328       <require Tcompiler="ARMCC"/>
1329     </condition>
1330     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1331       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1332       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1333       <require Dendian="Little-endian"/>
1334     </condition>
1335     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1336       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1337       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1338       <require Dendian="Little-endian"/>
1339     </condition>
1340     <condition id="CM33_NODSP_SP_LE_ARMCC">
1341       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1342       <require condition="CM33_NODSP_SP_ARMCC"/>
1343       <require Dendian="Little-endian"/>
1344     </condition>
1345     <condition id="CM33_DSP_SP_LE_ARMCC">
1346       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1347       <require condition="CM33_DSP_SP_ARMCC"/>
1348       <require Dendian="Little-endian"/>
1349     </condition>
1350
1351     <condition id="CM35P_ARMCC">
1352       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1353       <require condition="CM35P"/>
1354       <require Tcompiler="ARMCC"/>
1355     </condition>
1356     <condition id="CM35P_LE_ARMCC">
1357       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1358       <require condition="CM35P_ARMCC"/>
1359       <require Dendian="Little-endian"/>
1360     </condition>
1361     <condition id="CM35P_BE_ARMCC">
1362       <description>Cortex-M35P processor based device in big endian mode for the Arm Compiler</description>
1363       <require condition="CM35P_ARMCC"/>
1364       <require Dendian="Big-endian"/>
1365     </condition>
1366
1367     <condition id="CM35P_FP_ARMCC">
1368       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1369       <require condition="CM35P_FP"/>
1370       <require Tcompiler="ARMCC"/>
1371     </condition>
1372     <condition id="CM35P_FP_LE_ARMCC">
1373       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1374       <require condition="CM35P_FP_ARMCC"/>
1375       <require Dendian="Little-endian"/>
1376     </condition>
1377     <condition id="CM35P_FP_BE_ARMCC">
1378       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1379       <require condition="CM35P_FP_ARMCC"/>
1380       <require Dendian="Big-endian"/>
1381     </condition>
1382
1383     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1384       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1385       <require condition="CM35P_NODSP_NOFPU"/>
1386       <require Tcompiler="ARMCC"/>
1387     </condition>
1388     <condition id="CM35P_DSP_NOFPU_ARMCC">
1389       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1390       <require condition="CM35P_DSP_NOFPU"/>
1391       <require Tcompiler="ARMCC"/>
1392     </condition>
1393     <condition id="CM35P_NODSP_SP_ARMCC">
1394       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1395       <require condition="CM35P_NODSP_SP"/>
1396       <require Tcompiler="ARMCC"/>
1397     </condition>
1398     <condition id="CM35P_DSP_SP_ARMCC">
1399       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1400       <require condition="CM35P_DSP_SP"/>
1401       <require Tcompiler="ARMCC"/>
1402     </condition>
1403     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1404       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1405       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1406       <require Dendian="Little-endian"/>
1407     </condition>
1408     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1409       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1410       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1411       <require Dendian="Little-endian"/>
1412     </condition>
1413     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1414       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1415       <require condition="CM35P_NODSP_SP_ARMCC"/>
1416       <require Dendian="Little-endian"/>
1417     </condition>
1418     <condition id="CM35P_DSP_SP_LE_ARMCC">
1419       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1420       <require condition="CM35P_DSP_SP_ARMCC"/>
1421       <require Dendian="Little-endian"/>
1422     </condition>
1423
1424     <condition id="ARMv8MBL_ARMCC">
1425       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1426       <require condition="ARMv8MBL"/>
1427       <require Tcompiler="ARMCC"/>
1428     </condition>
1429     <condition id="ARMv8MBL_LE_ARMCC">
1430       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1431       <require condition="ARMv8MBL_ARMCC"/>
1432       <require Dendian="Little-endian"/>
1433     </condition>
1434     <condition id="ARMv8MBL_BE_ARMCC">
1435       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1436       <require condition="ARMv8MBL_ARMCC"/>
1437       <require Dendian="Big-endian"/>
1438     </condition>
1439
1440     <condition id="ARMv8MML_ARMCC">
1441       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1442       <require condition="ARMv8MML"/>
1443       <require Tcompiler="ARMCC"/>
1444     </condition>
1445     <condition id="ARMv8MML_LE_ARMCC">
1446       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1447       <require condition="ARMv8MML_ARMCC"/>
1448       <require Dendian="Little-endian"/>
1449     </condition>
1450     <condition id="ARMv8MML_BE_ARMCC">
1451       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1452       <require condition="ARMv8MML_ARMCC"/>
1453       <require Dendian="Big-endian"/>
1454     </condition>
1455
1456     <condition id="ARMv8MML_FP_ARMCC">
1457       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1458       <require condition="ARMv8MML_FP"/>
1459       <require Tcompiler="ARMCC"/>
1460     </condition>
1461     <condition id="ARMv8MML_FP_LE_ARMCC">
1462       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1463       <require condition="ARMv8MML_FP_ARMCC"/>
1464       <require Dendian="Little-endian"/>
1465     </condition>
1466     <condition id="ARMv8MML_FP_BE_ARMCC">
1467       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1468       <require condition="ARMv8MML_FP_ARMCC"/>
1469       <require Dendian="Big-endian"/>
1470     </condition>
1471
1472     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1473       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1474       <require condition="ARMv8MML_NODSP_NOFPU"/>
1475       <require Tcompiler="ARMCC"/>
1476     </condition>
1477     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1478       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1479       <require condition="ARMv8MML_DSP_NOFPU"/>
1480       <require Tcompiler="ARMCC"/>
1481     </condition>
1482     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1483       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1484       <require condition="ARMv8MML_NODSP_SP"/>
1485       <require Tcompiler="ARMCC"/>
1486     </condition>
1487     <condition id="ARMv8MML_DSP_SP_ARMCC">
1488       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1489       <require condition="ARMv8MML_DSP_SP"/>
1490       <require Tcompiler="ARMCC"/>
1491     </condition>
1492     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1493       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1494       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1495       <require Dendian="Little-endian"/>
1496     </condition>
1497     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1498       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1499       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1500       <require Dendian="Little-endian"/>
1501     </condition>
1502     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1503       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1504       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1505       <require Dendian="Little-endian"/>
1506     </condition>
1507     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1508       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1509       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1510       <require Dendian="Little-endian"/>
1511     </condition>
1512
1513     <!-- GCC compiler -->
1514     <condition id="CA_GCC">
1515       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1516       <require condition="ARMv7-A Device"/>
1517       <require Tcompiler="GCC"/>
1518     </condition>
1519
1520     <condition id="CM0_GCC">
1521       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1522       <require condition="CM0"/>
1523       <require Tcompiler="GCC"/>
1524     </condition>
1525     <condition id="CM0_LE_GCC">
1526       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1527       <require condition="CM0_GCC"/>
1528       <require Dendian="Little-endian"/>
1529     </condition>
1530     <condition id="CM0_BE_GCC">
1531       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1532       <require condition="CM0_GCC"/>
1533       <require Dendian="Big-endian"/>
1534     </condition>
1535
1536     <condition id="CM1_GCC">
1537       <description>Cortex-M1 based device for the GCC Compiler</description>
1538       <require condition="CM1"/>
1539       <require Tcompiler="GCC"/>
1540     </condition>
1541     <condition id="CM1_LE_GCC">
1542       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1543       <require condition="CM1_GCC"/>
1544       <require Dendian="Little-endian"/>
1545     </condition>
1546     <condition id="CM1_BE_GCC">
1547       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1548       <require condition="CM1_GCC"/>
1549       <require Dendian="Big-endian"/>
1550     </condition>
1551
1552     <condition id="CM3_GCC">
1553       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1554       <require condition="CM3"/>
1555       <require Tcompiler="GCC"/>
1556     </condition>
1557     <condition id="CM3_LE_GCC">
1558       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1559       <require condition="CM3_GCC"/>
1560       <require Dendian="Little-endian"/>
1561     </condition>
1562     <condition id="CM3_BE_GCC">
1563       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1564       <require condition="CM3_GCC"/>
1565       <require Dendian="Big-endian"/>
1566     </condition>
1567
1568     <condition id="CM4_GCC">
1569       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1570       <require condition="CM4"/>
1571       <require Tcompiler="GCC"/>
1572     </condition>
1573     <condition id="CM4_LE_GCC">
1574       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1575       <require condition="CM4_GCC"/>
1576       <require Dendian="Little-endian"/>
1577     </condition>
1578     <condition id="CM4_BE_GCC">
1579       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1580       <require condition="CM4_GCC"/>
1581       <require Dendian="Big-endian"/>
1582     </condition>
1583
1584     <condition id="CM4_FP_GCC">
1585       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1586       <require condition="CM4_FP"/>
1587       <require Tcompiler="GCC"/>
1588     </condition>
1589     <condition id="CM4_FP_LE_GCC">
1590       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1591       <require condition="CM4_FP_GCC"/>
1592       <require Dendian="Little-endian"/>
1593     </condition>
1594     <condition id="CM4_FP_BE_GCC">
1595       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1596       <require condition="CM4_FP_GCC"/>
1597       <require Dendian="Big-endian"/>
1598     </condition>
1599
1600     <condition id="CM7_GCC">
1601       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1602       <require condition="CM7"/>
1603       <require Tcompiler="GCC"/>
1604     </condition>
1605     <condition id="CM7_LE_GCC">
1606       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1607       <require condition="CM7_GCC"/>
1608       <require Dendian="Little-endian"/>
1609     </condition>
1610     <condition id="CM7_BE_GCC">
1611       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1612       <require condition="CM7_GCC"/>
1613       <require Dendian="Big-endian"/>
1614     </condition>
1615
1616     <condition id="CM7_FP_GCC">
1617       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1618       <require condition="CM7_FP"/>
1619       <require Tcompiler="GCC"/>
1620     </condition>
1621     <condition id="CM7_FP_LE_GCC">
1622       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1623       <require condition="CM7_FP_GCC"/>
1624       <require Dendian="Little-endian"/>
1625     </condition>
1626     <condition id="CM7_FP_BE_GCC">
1627       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1628       <require condition="CM7_FP_GCC"/>
1629       <require Dendian="Big-endian"/>
1630     </condition>
1631
1632     <condition id="CM7_SP_GCC">
1633       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1634       <require condition="CM7_SP"/>
1635       <require Tcompiler="GCC"/>
1636     </condition>
1637     <condition id="CM7_SP_LE_GCC">
1638       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1639       <require condition="CM7_SP_GCC"/>
1640       <require Dendian="Little-endian"/>
1641     </condition>
1642     <condition id="CM7_SP_BE_GCC">
1643       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1644       <require condition="CM7_SP_GCC"/>
1645       <require Dendian="Big-endian"/>
1646     </condition>
1647
1648     <condition id="CM7_DP_GCC">
1649       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1650       <require condition="CM7_DP"/>
1651       <require Tcompiler="GCC"/>
1652     </condition>
1653     <condition id="CM7_DP_LE_GCC">
1654       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1655       <require condition="CM7_DP_GCC"/>
1656       <require Dendian="Little-endian"/>
1657     </condition>
1658     <condition id="CM7_DP_BE_GCC">
1659       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1660       <require condition="CM7_DP_GCC"/>
1661       <require Dendian="Big-endian"/>
1662     </condition>
1663
1664     <condition id="CM23_GCC">
1665       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1666       <require condition="CM23"/>
1667       <require Tcompiler="GCC"/>
1668     </condition>
1669     <condition id="CM23_LE_GCC">
1670       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1671       <require condition="CM23_GCC"/>
1672       <require Dendian="Little-endian"/>
1673     </condition>
1674     <condition id="CM23_BE_GCC">
1675       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1676       <require condition="CM23_GCC"/>
1677       <require Dendian="Big-endian"/>
1678     </condition>
1679
1680     <condition id="CM33_GCC">
1681       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1682       <require condition="CM33"/>
1683       <require Tcompiler="GCC"/>
1684     </condition>
1685     <condition id="CM33_LE_GCC">
1686       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1687       <require condition="CM33_GCC"/>
1688       <require Dendian="Little-endian"/>
1689     </condition>
1690     <condition id="CM33_BE_GCC">
1691       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1692       <require condition="CM33_GCC"/>
1693       <require Dendian="Big-endian"/>
1694     </condition>
1695
1696     <condition id="CM33_FP_GCC">
1697       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1698       <require condition="CM33_FP"/>
1699       <require Tcompiler="GCC"/>
1700     </condition>
1701     <condition id="CM33_FP_LE_GCC">
1702       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1703       <require condition="CM33_FP_GCC"/>
1704       <require Dendian="Little-endian"/>
1705     </condition>
1706     <condition id="CM33_FP_BE_GCC">
1707       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1708       <require condition="CM33_FP_GCC"/>
1709       <require Dendian="Big-endian"/>
1710     </condition>
1711
1712     <condition id="CM33_NODSP_NOFPU_GCC">
1713       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1714       <require condition="CM33_NODSP_NOFPU"/>
1715       <require Tcompiler="GCC"/>
1716     </condition>
1717     <condition id="CM33_DSP_NOFPU_GCC">
1718       <description>CM33, DSP, no FPU, GCC Compiler</description>
1719       <require condition="CM33_DSP_NOFPU"/>
1720       <require Tcompiler="GCC"/>
1721     </condition>
1722     <condition id="CM33_NODSP_SP_GCC">
1723       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1724       <require condition="CM33_NODSP_SP"/>
1725       <require Tcompiler="GCC"/>
1726     </condition>
1727     <condition id="CM33_DSP_SP_GCC">
1728       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1729       <require condition="CM33_DSP_SP"/>
1730       <require Tcompiler="GCC"/>
1731     </condition>
1732     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1733       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1734       <require condition="CM33_NODSP_NOFPU_GCC"/>
1735       <require Dendian="Little-endian"/>
1736     </condition>
1737     <condition id="CM33_DSP_NOFPU_LE_GCC">
1738       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1739       <require condition="CM33_DSP_NOFPU_GCC"/>
1740       <require Dendian="Little-endian"/>
1741     </condition>
1742     <condition id="CM33_NODSP_SP_LE_GCC">
1743       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1744       <require condition="CM33_NODSP_SP_GCC"/>
1745       <require Dendian="Little-endian"/>
1746     </condition>
1747     <condition id="CM33_DSP_SP_LE_GCC">
1748       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1749       <require condition="CM33_DSP_SP_GCC"/>
1750       <require Dendian="Little-endian"/>
1751     </condition>
1752
1753     <condition id="CM35P_GCC">
1754       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1755       <require condition="CM35P"/>
1756       <require Tcompiler="GCC"/>
1757     </condition>
1758     <condition id="CM35P_LE_GCC">
1759       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1760       <require condition="CM35P_GCC"/>
1761       <require Dendian="Little-endian"/>
1762     </condition>
1763     <condition id="CM35P_BE_GCC">
1764       <description>Cortex-M35P processor based device in big endian mode for the GCC Compiler</description>
1765       <require condition="CM35P_GCC"/>
1766       <require Dendian="Big-endian"/>
1767     </condition>
1768
1769     <condition id="CM35P_FP_GCC">
1770       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1771       <require condition="CM35P_FP"/>
1772       <require Tcompiler="GCC"/>
1773     </condition>
1774     <condition id="CM35P_FP_LE_GCC">
1775       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1776       <require condition="CM35P_FP_GCC"/>
1777       <require Dendian="Little-endian"/>
1778     </condition>
1779     <condition id="CM35P_FP_BE_GCC">
1780       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1781       <require condition="CM35P_FP_GCC"/>
1782       <require Dendian="Big-endian"/>
1783     </condition>
1784
1785     <condition id="CM35P_NODSP_NOFPU_GCC">
1786       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1787       <require condition="CM35P_NODSP_NOFPU"/>
1788       <require Tcompiler="GCC"/>
1789     </condition>
1790     <condition id="CM35P_DSP_NOFPU_GCC">
1791       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1792       <require condition="CM35P_DSP_NOFPU"/>
1793       <require Tcompiler="GCC"/>
1794     </condition>
1795     <condition id="CM35P_NODSP_SP_GCC">
1796       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1797       <require condition="CM35P_NODSP_SP"/>
1798       <require Tcompiler="GCC"/>
1799     </condition>
1800     <condition id="CM35P_DSP_SP_GCC">
1801       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1802       <require condition="CM35P_DSP_SP"/>
1803       <require Tcompiler="GCC"/>
1804     </condition>
1805     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1806       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1807       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1808       <require Dendian="Little-endian"/>
1809     </condition>
1810     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1811       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1812       <require condition="CM35P_DSP_NOFPU_GCC"/>
1813       <require Dendian="Little-endian"/>
1814     </condition>
1815     <condition id="CM35P_NODSP_SP_LE_GCC">
1816       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1817       <require condition="CM35P_NODSP_SP_GCC"/>
1818       <require Dendian="Little-endian"/>
1819     </condition>
1820     <condition id="CM35P_DSP_SP_LE_GCC">
1821       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1822       <require condition="CM35P_DSP_SP_GCC"/>
1823       <require Dendian="Little-endian"/>
1824     </condition>
1825
1826     <condition id="ARMv8MBL_GCC">
1827       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1828       <require condition="ARMv8MBL"/>
1829       <require Tcompiler="GCC"/>
1830     </condition>
1831     <condition id="ARMv8MBL_LE_GCC">
1832       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1833       <require condition="ARMv8MBL_GCC"/>
1834       <require Dendian="Little-endian"/>
1835     </condition>
1836     <condition id="ARMv8MBL_BE_GCC">
1837       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1838       <require condition="ARMv8MBL_GCC"/>
1839       <require Dendian="Big-endian"/>
1840     </condition>
1841
1842     <condition id="ARMv8MML_GCC">
1843       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1844       <require condition="ARMv8MML"/>
1845       <require Tcompiler="GCC"/>
1846     </condition>
1847     <condition id="ARMv8MML_LE_GCC">
1848       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1849       <require condition="ARMv8MML_GCC"/>
1850       <require Dendian="Little-endian"/>
1851     </condition>
1852     <condition id="ARMv8MML_BE_GCC">
1853       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1854       <require condition="ARMv8MML_GCC"/>
1855       <require Dendian="Big-endian"/>
1856     </condition>
1857
1858     <condition id="ARMv8MML_FP_GCC">
1859       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1860       <require condition="ARMv8MML_FP"/>
1861       <require Tcompiler="GCC"/>
1862     </condition>
1863     <condition id="ARMv8MML_FP_LE_GCC">
1864       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1865       <require condition="ARMv8MML_FP_GCC"/>
1866       <require Dendian="Little-endian"/>
1867     </condition>
1868     <condition id="ARMv8MML_FP_BE_GCC">
1869       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1870       <require condition="ARMv8MML_FP_GCC"/>
1871       <require Dendian="Big-endian"/>
1872     </condition>
1873
1874     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1875       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1876       <require condition="ARMv8MML_NODSP_NOFPU"/>
1877       <require Tcompiler="GCC"/>
1878     </condition>
1879     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1880       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1881       <require condition="ARMv8MML_DSP_NOFPU"/>
1882       <require Tcompiler="GCC"/>
1883     </condition>
1884     <condition id="ARMv8MML_NODSP_SP_GCC">
1885       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1886       <require condition="ARMv8MML_NODSP_SP"/>
1887       <require Tcompiler="GCC"/>
1888     </condition>
1889     <condition id="ARMv8MML_DSP_SP_GCC">
1890       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1891       <require condition="ARMv8MML_DSP_SP"/>
1892       <require Tcompiler="GCC"/>
1893     </condition>
1894     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1895       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1896       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1897       <require Dendian="Little-endian"/>
1898     </condition>
1899     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1900       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1901       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1902       <require Dendian="Little-endian"/>
1903     </condition>
1904     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1905       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1906       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1907       <require Dendian="Little-endian"/>
1908     </condition>
1909     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1910       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1911       <require condition="ARMv8MML_DSP_SP_GCC"/>
1912       <require Dendian="Little-endian"/>
1913     </condition>
1914
1915     <!-- IAR compiler -->
1916     <condition id="CA_IAR">
1917       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1918       <require condition="ARMv7-A Device"/>
1919       <require Tcompiler="IAR"/>
1920     </condition>
1921
1922     <condition id="CM0_IAR">
1923       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1924       <require condition="CM0"/>
1925       <require Tcompiler="IAR"/>
1926     </condition>
1927     <condition id="CM0_LE_IAR">
1928       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1929       <require condition="CM0_IAR"/>
1930       <require Dendian="Little-endian"/>
1931     </condition>
1932     <condition id="CM0_BE_IAR">
1933       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1934       <require condition="CM0_IAR"/>
1935       <require Dendian="Big-endian"/>
1936     </condition>
1937
1938     <condition id="CM1_IAR">
1939       <description>Cortex-M1 based device for the IAR Compiler</description>
1940       <require condition="CM1"/>
1941       <require Tcompiler="IAR"/>
1942     </condition>
1943     <condition id="CM1_LE_IAR">
1944       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1945       <require condition="CM1_IAR"/>
1946       <require Dendian="Little-endian"/>
1947     </condition>
1948     <condition id="CM1_BE_IAR">
1949       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1950       <require condition="CM1_IAR"/>
1951       <require Dendian="Big-endian"/>
1952     </condition>
1953
1954     <condition id="CM3_IAR">
1955       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1956       <require condition="CM3"/>
1957       <require Tcompiler="IAR"/>
1958     </condition>
1959     <condition id="CM3_LE_IAR">
1960       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1961       <require condition="CM3_IAR"/>
1962       <require Dendian="Little-endian"/>
1963     </condition>
1964     <condition id="CM3_BE_IAR">
1965       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1966       <require condition="CM3_IAR"/>
1967       <require Dendian="Big-endian"/>
1968     </condition>
1969
1970     <condition id="CM4_IAR">
1971       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1972       <require condition="CM4"/>
1973       <require Tcompiler="IAR"/>
1974     </condition>
1975     <condition id="CM4_LE_IAR">
1976       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1977       <require condition="CM4_IAR"/>
1978       <require Dendian="Little-endian"/>
1979     </condition>
1980     <condition id="CM4_BE_IAR">
1981       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1982       <require condition="CM4_IAR"/>
1983       <require Dendian="Big-endian"/>
1984     </condition>
1985
1986     <condition id="CM4_FP_IAR">
1987       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1988       <require condition="CM4_FP"/>
1989       <require Tcompiler="IAR"/>
1990     </condition>
1991     <condition id="CM4_FP_LE_IAR">
1992       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1993       <require condition="CM4_FP_IAR"/>
1994       <require Dendian="Little-endian"/>
1995     </condition>
1996     <condition id="CM4_FP_BE_IAR">
1997       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1998       <require condition="CM4_FP_IAR"/>
1999       <require Dendian="Big-endian"/>
2000     </condition>
2001
2002     <condition id="CM7_IAR">
2003       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2004       <require condition="CM7"/>
2005       <require Tcompiler="IAR"/>
2006     </condition>
2007     <condition id="CM7_LE_IAR">
2008       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2009       <require condition="CM7_IAR"/>
2010       <require Dendian="Little-endian"/>
2011     </condition>
2012     <condition id="CM7_BE_IAR">
2013       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2014       <require condition="CM7_IAR"/>
2015       <require Dendian="Big-endian"/>
2016     </condition>
2017
2018     <condition id="CM7_FP_IAR">
2019       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2020       <require condition="CM7_FP"/>
2021       <require Tcompiler="IAR"/>
2022     </condition>
2023     <condition id="CM7_FP_LE_IAR">
2024       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2025       <require condition="CM7_FP_IAR"/>
2026       <require Dendian="Little-endian"/>
2027     </condition>
2028     <condition id="CM7_FP_BE_IAR">
2029       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2030       <require condition="CM7_FP_IAR"/>
2031       <require Dendian="Big-endian"/>
2032     </condition>
2033
2034     <condition id="CM7_SP_IAR">
2035       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2036       <require condition="CM7_SP"/>
2037       <require Tcompiler="IAR"/>
2038     </condition>
2039     <condition id="CM7_SP_LE_IAR">
2040       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2041       <require condition="CM7_SP_IAR"/>
2042       <require Dendian="Little-endian"/>
2043     </condition>
2044     <condition id="CM7_SP_BE_IAR">
2045       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2046       <require condition="CM7_SP_IAR"/>
2047       <require Dendian="Big-endian"/>
2048     </condition>
2049
2050     <condition id="CM7_DP_IAR">
2051       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2052       <require condition="CM7_DP"/>
2053       <require Tcompiler="IAR"/>
2054     </condition>
2055     <condition id="CM7_DP_LE_IAR">
2056       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2057       <require condition="CM7_DP_IAR"/>
2058       <require Dendian="Little-endian"/>
2059     </condition>
2060     <condition id="CM7_DP_BE_IAR">
2061       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2062       <require condition="CM7_DP_IAR"/>
2063       <require Dendian="Big-endian"/>
2064     </condition>
2065
2066     <condition id="CM23_IAR">
2067       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2068       <require condition="CM23"/>
2069       <require Tcompiler="IAR"/>
2070     </condition>
2071     <condition id="CM23_LE_IAR">
2072       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2073       <require condition="CM23_IAR"/>
2074       <require Dendian="Little-endian"/>
2075     </condition>
2076     <condition id="CM23_BE_IAR">
2077       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
2078       <require condition="CM23_IAR"/>
2079       <require Dendian="Big-endian"/>
2080     </condition>
2081
2082     <condition id="CM33_IAR">
2083       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2084       <require condition="CM33"/>
2085       <require Tcompiler="IAR"/>
2086     </condition>
2087     <condition id="CM33_LE_IAR">
2088       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2089       <require condition="CM33_IAR"/>
2090       <require Dendian="Little-endian"/>
2091     </condition>
2092     <condition id="CM33_BE_IAR">
2093       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
2094       <require condition="CM33_IAR"/>
2095       <require Dendian="Big-endian"/>
2096     </condition>
2097
2098     <condition id="CM33_FP_IAR">
2099       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2100       <require condition="CM33_FP"/>
2101       <require Tcompiler="IAR"/>
2102     </condition>
2103     <condition id="CM33_FP_LE_IAR">
2104       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2105       <require condition="CM33_FP_IAR"/>
2106       <require Dendian="Little-endian"/>
2107     </condition>
2108     <condition id="CM33_FP_BE_IAR">
2109       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2110       <require condition="CM33_FP_IAR"/>
2111       <require Dendian="Big-endian"/>
2112     </condition>
2113
2114     <condition id="CM33_NODSP_NOFPU_IAR">
2115       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2116       <require condition="CM33_NODSP_NOFPU"/>
2117       <require Tcompiler="IAR"/>
2118     </condition>
2119     <condition id="CM33_DSP_NOFPU_IAR">
2120       <description>CM33, DSP, no FPU, IAR Compiler</description>
2121       <require condition="CM33_DSP_NOFPU"/>
2122       <require Tcompiler="IAR"/>
2123     </condition>
2124     <condition id="CM33_NODSP_SP_IAR">
2125       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2126       <require condition="CM33_NODSP_SP"/>
2127       <require Tcompiler="IAR"/>
2128     </condition>
2129     <condition id="CM33_DSP_SP_IAR">
2130       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2131       <require condition="CM33_DSP_SP"/>
2132       <require Tcompiler="IAR"/>
2133     </condition>
2134     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2135       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2136       <require condition="CM33_NODSP_NOFPU_IAR"/>
2137       <require Dendian="Little-endian"/>
2138     </condition>
2139     <condition id="CM33_DSP_NOFPU_LE_IAR">
2140       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2141       <require condition="CM33_DSP_NOFPU_IAR"/>
2142       <require Dendian="Little-endian"/>
2143     </condition>
2144     <condition id="CM33_NODSP_SP_LE_IAR">
2145       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2146       <require condition="CM33_NODSP_SP_IAR"/>
2147       <require Dendian="Little-endian"/>
2148     </condition>
2149     <condition id="CM33_DSP_SP_LE_IAR">
2150       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2151       <require condition="CM33_DSP_SP_IAR"/>
2152       <require Dendian="Little-endian"/>
2153     </condition>
2154
2155     <condition id="CM35P_IAR">
2156       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2157       <require condition="CM35P"/>
2158       <require Tcompiler="IAR"/>
2159     </condition>
2160     <condition id="CM35P_LE_IAR">
2161       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2162       <require condition="CM35P_IAR"/>
2163       <require Dendian="Little-endian"/>
2164     </condition>
2165     <condition id="CM35P_BE_IAR">
2166       <description>Cortex-M35P processor based device in big endian mode for the IAR Compiler</description>
2167       <require condition="CM35P_IAR"/>
2168       <require Dendian="Big-endian"/>
2169     </condition>
2170
2171     <condition id="CM35P_FP_IAR">
2172       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2173       <require condition="CM35P_FP"/>
2174       <require Tcompiler="IAR"/>
2175     </condition>
2176     <condition id="CM35P_FP_LE_IAR">
2177       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2178       <require condition="CM35P_FP_IAR"/>
2179       <require Dendian="Little-endian"/>
2180     </condition>
2181     <condition id="CM35P_FP_BE_IAR">
2182       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2183       <require condition="CM35P_FP_IAR"/>
2184       <require Dendian="Big-endian"/>
2185     </condition>
2186
2187     <condition id="CM35P_NODSP_NOFPU_IAR">
2188       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2189       <require condition="CM35P_NODSP_NOFPU"/>
2190       <require Tcompiler="IAR"/>
2191     </condition>
2192     <condition id="CM35P_DSP_NOFPU_IAR">
2193       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2194       <require condition="CM35P_DSP_NOFPU"/>
2195       <require Tcompiler="IAR"/>
2196     </condition>
2197     <condition id="CM35P_NODSP_SP_IAR">
2198       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2199       <require condition="CM35P_NODSP_SP"/>
2200       <require Tcompiler="IAR"/>
2201     </condition>
2202     <condition id="CM35P_DSP_SP_IAR">
2203       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2204       <require condition="CM35P_DSP_SP"/>
2205       <require Tcompiler="IAR"/>
2206     </condition>
2207     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2208       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2209       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2210       <require Dendian="Little-endian"/>
2211     </condition>
2212     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2213       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2214       <require condition="CM35P_DSP_NOFPU_IAR"/>
2215       <require Dendian="Little-endian"/>
2216     </condition>
2217     <condition id="CM35P_NODSP_SP_LE_IAR">
2218       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2219       <require condition="CM35P_NODSP_SP_IAR"/>
2220       <require Dendian="Little-endian"/>
2221     </condition>
2222     <condition id="CM35P_DSP_SP_LE_IAR">
2223       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2224       <require condition="CM35P_DSP_SP_IAR"/>
2225       <require Dendian="Little-endian"/>
2226     </condition>
2227
2228     <condition id="ARMv8MBL_IAR">
2229       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2230       <require condition="ARMv8MBL"/>
2231       <require Tcompiler="IAR"/>
2232     </condition>
2233     <condition id="ARMv8MBL_LE_IAR">
2234       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2235       <require condition="ARMv8MBL_IAR"/>
2236       <require Dendian="Little-endian"/>
2237     </condition>
2238     <condition id="ARMv8MBL_BE_IAR">
2239       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
2240       <require condition="ARMv8MBL_IAR"/>
2241       <require Dendian="Big-endian"/>
2242     </condition>
2243
2244     <condition id="ARMv8MML_IAR">
2245       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2246       <require condition="ARMv8MML"/>
2247       <require Tcompiler="IAR"/>
2248     </condition>
2249     <condition id="ARMv8MML_LE_IAR">
2250       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2251       <require condition="ARMv8MML_IAR"/>
2252       <require Dendian="Little-endian"/>
2253     </condition>
2254     <condition id="ARMv8MML_BE_IAR">
2255       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
2256       <require condition="ARMv8MML_IAR"/>
2257       <require Dendian="Big-endian"/>
2258     </condition>
2259
2260     <condition id="ARMv8MML_FP_IAR">
2261       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2262       <require condition="ARMv8MML_FP"/>
2263       <require Tcompiler="IAR"/>
2264     </condition>
2265     <condition id="ARMv8MML_FP_LE_IAR">
2266       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2267       <require condition="ARMv8MML_FP_IAR"/>
2268       <require Dendian="Little-endian"/>
2269     </condition>
2270     <condition id="ARMv8MML_FP_BE_IAR">
2271       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2272       <require condition="ARMv8MML_FP_IAR"/>
2273       <require Dendian="Big-endian"/>
2274     </condition>
2275
2276     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2277       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2278       <require condition="ARMv8MML_NODSP_NOFPU"/>
2279       <require Tcompiler="IAR"/>
2280     </condition>
2281     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2282       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2283       <require condition="ARMv8MML_DSP_NOFPU"/>
2284       <require Tcompiler="IAR"/>
2285     </condition>
2286     <condition id="ARMv8MML_NODSP_SP_IAR">
2287       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2288       <require condition="ARMv8MML_NODSP_SP"/>
2289       <require Tcompiler="IAR"/>
2290     </condition>
2291     <condition id="ARMv8MML_DSP_SP_IAR">
2292       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2293       <require condition="ARMv8MML_DSP_SP"/>
2294       <require Tcompiler="IAR"/>
2295     </condition>
2296     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2297       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2298       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2299       <require Dendian="Little-endian"/>
2300     </condition>
2301     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2302       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2303       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2304       <require Dendian="Little-endian"/>
2305     </condition>
2306     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2307       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2308       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2309       <require Dendian="Little-endian"/>
2310     </condition>
2311     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2312       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2313       <require condition="ARMv8MML_DSP_SP_IAR"/>
2314       <require Dendian="Little-endian"/>
2315     </condition>
2316
2317     <!-- conditions selecting single devices and CMSIS Core -->
2318     <!-- used for component startup, GCC version is used for C-Startup -->
2319     <condition id="ARMCM0 CMSIS">
2320       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2321       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2322       <require Cclass="CMSIS" Cgroup="CORE"/>
2323     </condition>
2324     <condition id="ARMCM0 CMSIS GCC">
2325       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
2326       <require condition="ARMCM0 CMSIS"/>
2327       <require condition="GCC"/>
2328     </condition>
2329
2330     <condition id="ARMCM0+ CMSIS">
2331       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2332       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2333       <require Cclass="CMSIS" Cgroup="CORE"/>
2334     </condition>
2335     <condition id="ARMCM0+ CMSIS GCC">
2336       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
2337       <require condition="ARMCM0+ CMSIS"/>
2338       <require condition="GCC"/>
2339     </condition>
2340
2341     <condition id="ARMCM1 CMSIS">
2342       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2343       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2344       <require Cclass="CMSIS" Cgroup="CORE"/>
2345     </condition>
2346     <condition id="ARMCM1 CMSIS GCC">
2347       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
2348       <require condition="ARMCM1 CMSIS"/>
2349       <require condition="GCC"/>
2350     </condition>
2351
2352     <condition id="ARMCM3 CMSIS">
2353       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2354       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2355       <require Cclass="CMSIS" Cgroup="CORE"/>
2356     </condition>
2357     <condition id="ARMCM3 CMSIS GCC">
2358       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
2359       <require condition="ARMCM3 CMSIS"/>
2360       <require condition="GCC"/>
2361     </condition>
2362
2363     <condition id="ARMCM4 CMSIS">
2364       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2365       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2366       <require Cclass="CMSIS" Cgroup="CORE"/>
2367     </condition>
2368     <condition id="ARMCM4 CMSIS GCC">
2369       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
2370       <require condition="ARMCM4 CMSIS"/>
2371       <require condition="GCC"/>
2372     </condition>
2373
2374     <condition id="ARMCM7 CMSIS">
2375       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2376       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2377       <require Cclass="CMSIS" Cgroup="CORE"/>
2378     </condition>
2379     <condition id="ARMCM7 CMSIS GCC">
2380       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2381       <require condition="ARMCM7 CMSIS"/>
2382       <require condition="GCC"/>
2383     </condition>
2384
2385     <condition id="ARMCM23 CMSIS">
2386       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2387       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2388       <require Cclass="CMSIS" Cgroup="CORE"/>
2389     </condition>
2390     <condition id="ARMCM23 CMSIS GCC">
2391       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2392       <require condition="ARMCM23 CMSIS"/>
2393       <require condition="GCC"/>
2394     </condition>
2395
2396     <condition id="ARMCM33 CMSIS">
2397       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2398       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2399       <require Cclass="CMSIS" Cgroup="CORE"/>
2400     </condition>
2401     <condition id="ARMCM33 CMSIS GCC">
2402       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2403       <require condition="ARMCM33 CMSIS"/>
2404       <require condition="GCC"/>
2405     </condition>
2406
2407     <condition id="ARMCM35P CMSIS">
2408       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2409       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2410       <require Cclass="CMSIS" Cgroup="CORE"/>
2411     </condition>
2412     <condition id="ARMCM35P CMSIS GCC">
2413       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core requiring GCC</description>
2414       <require condition="ARMCM35P CMSIS"/>
2415       <require condition="GCC"/>
2416     </condition>
2417
2418     <condition id="ARMSC000 CMSIS">
2419       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2420       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2421       <require Cclass="CMSIS" Cgroup="CORE"/>
2422     </condition>
2423     <condition id="ARMSC000 CMSIS GCC">
2424       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2425       <require condition="ARMSC000 CMSIS"/>
2426       <require condition="GCC"/>
2427     </condition>
2428
2429     <condition id="ARMSC300 CMSIS">
2430       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2431       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2432       <require Cclass="CMSIS" Cgroup="CORE"/>
2433     </condition>
2434     <condition id="ARMSC300 CMSIS GCC">
2435       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2436       <require condition="ARMSC300 CMSIS"/>
2437       <require condition="GCC"/>
2438     </condition>
2439
2440     <condition id="ARMv8MBL CMSIS">
2441       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2442       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2443       <require Cclass="CMSIS" Cgroup="CORE"/>
2444     </condition>
2445     <condition id="ARMv8MBL CMSIS GCC">
2446       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2447       <require condition="ARMv8MBL CMSIS"/>
2448       <require condition="GCC"/>
2449     </condition>
2450
2451     <condition id="ARMv8MML CMSIS">
2452       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2453       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2454       <require Cclass="CMSIS" Cgroup="CORE"/>
2455     </condition>
2456     <condition id="ARMv8MML CMSIS GCC">
2457       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2458       <require condition="ARMv8MML CMSIS"/>
2459       <require condition="GCC"/>
2460     </condition>
2461
2462     <condition id="ARMv81MML CMSIS">
2463       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2464       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2465       <require Cclass="CMSIS" Cgroup="CORE"/>
2466     </condition>
2467     <condition id="ARMv81MML CMSIS GCC">
2468       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2469       <require condition="ARMv81MML CMSIS"/>
2470       <require condition="GCC"/>
2471     </condition>
2472
2473     <condition id="ARMCA5 CMSIS">
2474       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2475       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2476       <require Cclass="CMSIS" Cgroup="CORE"/>
2477     </condition>
2478
2479     <condition id="ARMCA7 CMSIS">
2480       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2481       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2482       <require Cclass="CMSIS" Cgroup="CORE"/>
2483     </condition>
2484
2485     <condition id="ARMCA9 CMSIS">
2486       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2487       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2488       <require Cclass="CMSIS" Cgroup="CORE"/>
2489     </condition>
2490
2491     <!-- CMSIS DSP -->
2492     <condition id="CMSIS DSP">
2493       <description>Components required for DSP</description>
2494       <require condition="ARMv6_7_8-M Device"/>
2495       <require condition="ARMCC GCC IAR"/>
2496       <require Cclass="CMSIS" Cgroup="CORE"/>
2497     </condition>
2498
2499     <!-- CMSIS NN -->
2500     <condition id="CMSIS NN">
2501       <description>Components required for NN</description>
2502       <require condition="CMSIS DSP"/>
2503     </condition>
2504
2505     <!-- RTOS RTX -->
2506     <condition id="RTOS RTX">
2507       <description>Components required for RTOS RTX</description>
2508       <require condition="ARMv6_7-M Device"/>
2509       <require condition="ARMCC GCC IAR"/>
2510       <require Cclass="Device" Cgroup="Startup"/>
2511       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2512     </condition>
2513     <condition id="RTOS RTX IFX">
2514       <description>Components required for RTOS RTX IFX</description>
2515       <require condition="ARMv6_7-M Device"/>
2516       <require condition="ARMCC GCC IAR"/>
2517       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2518       <require Cclass="Device" Cgroup="Startup"/>
2519       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2520     </condition>
2521     <condition id="RTOS RTX5">
2522       <description>Components required for RTOS RTX5</description>
2523       <require condition="ARMv6_7_8-M Device"/>
2524       <require condition="ARMCC GCC IAR"/>
2525       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2526     </condition>
2527     <condition id="RTOS2 RTX5">
2528       <description>Components required for RTOS2 RTX5</description>
2529       <require condition="ARMv6_7_8-M Device"/>
2530       <require condition="ARMCC GCC IAR"/>
2531       <require Cclass="CMSIS"  Cgroup="CORE"/>
2532       <require Cclass="Device" Cgroup="Startup"/>
2533     </condition>
2534     <condition id="RTOS2 RTX5 v7-A">
2535       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2536       <require condition="ARMv7-A Device"/>
2537       <require condition="ARMCC GCC IAR"/>
2538       <require Cclass="CMSIS"  Cgroup="CORE"/>
2539       <require Cclass="Device" Cgroup="Startup"/>
2540       <require Cclass="Device" Cgroup="OS Tick"/>
2541       <require Cclass="Device" Cgroup="IRQ Controller"/>
2542     </condition>
2543     <condition id="RTOS2 RTX5 Lib">
2544       <description>Components required for RTOS2 RTX5 Library</description>
2545       <require condition="ARMv6_7_8-M Device"/>
2546       <require condition="ARMCC GCC IAR"/>
2547       <require Cclass="CMSIS"  Cgroup="CORE"/>
2548       <require Cclass="Device" Cgroup="Startup"/>
2549     </condition>
2550     <condition id="RTOS2 RTX5 NS">
2551       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2552       <require condition="ARMv8-M TZ Device"/>
2553       <require condition="ARMCC GCC IAR"/>
2554       <require Cclass="CMSIS"  Cgroup="CORE"/>
2555       <require Cclass="Device" Cgroup="Startup"/>
2556     </condition>
2557
2558     <!-- OS Tick -->
2559     <condition id="OS Tick PTIM">
2560       <description>Components required for OS Tick Private Timer</description>
2561       <require condition="CA5_CA9"/>
2562       <require Cclass="Device" Cgroup="IRQ Controller"/>
2563     </condition>
2564
2565     <condition id="OS Tick GTIM">
2566       <description>Components required for OS Tick Generic Physical Timer</description>
2567       <require condition="CA7"/>
2568       <require Cclass="Device" Cgroup="IRQ Controller"/>
2569     </condition>
2570
2571   </conditions>
2572
2573   <components>
2574     <!-- CMSIS-Core component -->
2575     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.2.0"  condition="ARMv6_7_8-M Device" >
2576       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2577       <files>
2578         <!-- CPU independent -->
2579         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2580         <file category="include" name="CMSIS/Core/Include/"/>
2581         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2582         <!-- Code template -->
2583         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2584         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2585       </files>
2586     </component>
2587
2588     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.3"  condition="ARMv7-A Device" >
2589       <description>CMSIS-CORE for Cortex-A</description>
2590       <files>
2591         <!-- CPU independent -->
2592         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2593         <file category="include" name="CMSIS/Core_A/Include/"/>
2594       </files>
2595     </component>
2596
2597     <!-- CMSIS-Startup components -->
2598     <!-- Cortex-M0 -->
2599     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM0 CMSIS">
2600       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2601       <files>
2602         <!-- include folder / device header file -->
2603         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2604         <!-- startup / system file -->
2605         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2606         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.1.0" attr="config" condition="GCC"/>
2607         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2608         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2609         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2610       </files>
2611     </component>
2612     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM0 CMSIS GCC">
2613       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2614       <files>
2615         <!-- include folder / device header file -->
2616         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2617         <!-- startup / system file -->
2618         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.1.0" attr="config" condition="GCC"/>
2619         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2620         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2621       </files>
2622     </component>
2623
2624     <!-- Cortex-M0+ -->
2625     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM0+ CMSIS">
2626       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2627       <files>
2628         <!-- include folder / device header file -->
2629         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2630         <!-- startup / system file -->
2631         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2632         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.1.0" attr="config" condition="GCC"/>
2633         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2634         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2635         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2636       </files>
2637     </component>
2638     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM0+ CMSIS GCC">
2639       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2640       <files>
2641         <!-- include folder / device header file -->
2642         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2643         <!-- startup / system file -->
2644         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.1.0" attr="config" condition="GCC"/>
2645         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2646         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2647       </files>
2648     </component>
2649
2650     <!-- Cortex-M1 -->
2651     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM1 CMSIS">
2652       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2653       <files>
2654         <!-- include folder / device header file -->
2655         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2656         <!-- startup / system file -->
2657         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2658         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.1.0" attr="config" condition="GCC"/>
2659         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2660         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2661         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2662       </files>
2663     </component>
2664     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM1 CMSIS GCC">
2665       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2666       <files>
2667         <!-- include folder / device header file -->
2668         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2669         <!-- startup / system file -->
2670         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.1.0" attr="config" condition="GCC"/>
2671         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2672         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2673       </files>
2674     </component>
2675
2676     <!-- Cortex-M3 -->
2677     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM3 CMSIS">
2678       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2679       <files>
2680         <!-- include folder / device header file -->
2681         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2682         <!-- startup / system file -->
2683         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2684         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.1.0" attr="config" condition="GCC"/>
2685         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2686         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2687         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2688       </files>
2689     </component>
2690     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM3 CMSIS GCC">
2691       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2692       <files>
2693         <!-- include folder / device header file -->
2694         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2695         <!-- startup / system file -->
2696         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.1.0" attr="config" condition="GCC"/>
2697         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2698         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2699       </files>
2700     </component>
2701
2702     <!-- Cortex-M4 -->
2703     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM4 CMSIS">
2704       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2705       <files>
2706         <!-- include folder / device header file -->
2707         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2708         <!-- startup / system file -->
2709         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2710         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.1.0" attr="config" condition="GCC"/>
2711         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2712         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2713         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2714       </files>
2715     </component>
2716     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM4 CMSIS GCC">
2717       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2718       <files>
2719         <!-- include folder / device header file -->
2720         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2721         <!-- startup / system file -->
2722         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.1.0" attr="config" condition="GCC"/>
2723         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2724         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2725       </files>
2726     </component>
2727
2728     <!-- Cortex-M7 -->
2729     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM7 CMSIS">
2730       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2731       <files>
2732         <!-- include folder / device header file -->
2733         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2734         <!-- startup / system file -->
2735         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2736         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.1.0" attr="config" condition="GCC"/>
2737         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2738         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2739         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2740       </files>
2741     </component>
2742     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM7 CMSIS GCC">
2743       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2744       <files>
2745         <!-- include folder / device header file -->
2746         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2747         <!-- startup / system file -->
2748         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.1.0" attr="config" condition="GCC"/>
2749         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2750         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2751       </files>
2752     </component>
2753
2754     <!-- Cortex-M23 -->
2755     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2756       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2757       <files>
2758         <!-- include folder / device header file -->
2759         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2760         <!-- startup / system file -->
2761         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2762         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.1.0" attr="config" condition="GCC"/>
2763         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2764         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2765         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2766         <!-- SAU configuration -->
2767         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2768       </files>
2769     </component>
2770     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2771       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2772       <files>
2773         <!-- include folder / device header file -->
2774         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2775         <!-- startup / system file -->
2776         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.1.0" attr="config" condition="GCC"/>
2777         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2778         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2779         <!-- SAU configuration -->
2780         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2781       </files>
2782     </component>
2783
2784     <!-- Cortex-M33 -->
2785     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2786       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2787       <files>
2788         <!-- include folder / device header file -->
2789         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2790         <!-- startup / system file -->
2791         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2792         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.1.0" attr="config" condition="GCC"/>
2793         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2794         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2795         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2796         <!-- SAU configuration -->
2797         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2798       </files>
2799     </component>
2800     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2801       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2802       <files>
2803         <!-- include folder / device header file -->
2804         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2805         <!-- startup / system file -->
2806         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.1.0" attr="config" condition="GCC"/>
2807         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2808         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2809         <!-- SAU configuration -->
2810         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2811       </files>
2812     </component>
2813
2814     <!-- Cortex-M35P -->
2815     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM35P CMSIS">
2816       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2817       <files>
2818         <!-- include folder / device header file -->
2819         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2820         <!-- startup / system file -->
2821         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2822         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.0" attr="config" condition="GCC"/>
2823         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2824         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="IAR"/>
2825         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2826         <!-- SAU configuration -->
2827         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2828       </files>
2829     </component>
2830     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM35P CMSIS GCC">
2831       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2832       <files>
2833         <!-- include folder / device header file -->
2834         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2835         <!-- startup / system file -->
2836         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.c"         version="1.0.0" attr="config" condition="GCC"/>
2837         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2838         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2839         <!-- SAU configuration -->
2840         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2841       </files>
2842     </component>
2843
2844     <!-- Cortex-SC000 -->
2845     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMSC000 CMSIS">
2846       <description>System and Startup for Generic Arm SC000 device</description>
2847       <files>
2848         <!-- include folder / device header file -->
2849         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2850         <!-- startup / system file -->
2851         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2852         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.1.0" attr="config" condition="GCC"/>
2853         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2854         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2855         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2856       </files>
2857     </component>
2858     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMSC000 CMSIS GCC">
2859       <description>System and Startup for Generic Arm SC000 device</description>
2860       <files>
2861         <!-- include folder / device header file -->
2862         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2863         <!-- startup / system file -->
2864         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.1.0" attr="config" condition="GCC"/>
2865         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2866         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2867       </files>
2868     </component>
2869
2870     <!-- Cortex-SC300 -->
2871     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMSC300 CMSIS">
2872       <description>System and Startup for Generic Arm SC300 device</description>
2873       <files>
2874         <!-- include folder / device header file -->
2875         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2876         <!-- startup / system file -->
2877         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2878         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.1.0" attr="config" condition="GCC"/>
2879         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2880         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2881         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2882       </files>
2883     </component>
2884     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMSC300 CMSIS GCC">
2885       <description>System and Startup for Generic Arm SC300 device</description>
2886       <files>
2887         <!-- include folder / device header file -->
2888         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2889         <!-- startup / system file -->
2890         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.1.0" attr="config" condition="GCC"/>
2891         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2892         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2893       </files>
2894     </component>
2895
2896     <!-- ARMv8MBL -->
2897     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2898       <description>System and Startup for Generic Armv8-M Baseline device</description>
2899       <files>
2900         <!-- include folder / device header file -->
2901         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2902         <!-- startup / system file -->
2903         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2904         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.1.0" attr="config" condition="GCC"/>
2905         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2906         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2907         <!-- SAU configuration -->
2908         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2909       </files>
2910     </component>
2911     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2912       <description>System and Startup for Generic Armv8-M Baseline device</description>
2913       <files>
2914         <!-- include folder / device header file -->
2915         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2916         <!-- startup / system file -->
2917         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.1.0" attr="config" condition="GCC"/>
2918         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2919         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2920         <!-- SAU configuration -->
2921         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2922       </files>
2923     </component>
2924
2925     <!-- ARMv8MML -->
2926     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2927       <description>System and Startup for Generic Armv8-M Mainline device</description>
2928       <files>
2929         <!-- include folder / device header file -->
2930         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2931         <!-- startup / system file -->
2932         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2933         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.1.0" attr="config" condition="GCC"/>
2934         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2935         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2936         <!-- SAU configuration -->
2937         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2938       </files>
2939     </component>
2940     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2941       <description>System and Startup for Generic Armv8-M Mainline device</description>
2942       <files>
2943         <!-- include folder / device header file -->
2944         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2945         <!-- startup / system file -->
2946         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.1.0" attr="config" condition="GCC"/>
2947         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2948         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2949         <!-- SAU configuration -->
2950         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2951       </files>
2952     </component>
2953
2954     <!-- ARMv81MML -->
2955     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv81MML CMSIS">
2956       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2957       <files>
2958         <!-- include folder / device header file -->
2959         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2960         <file category="header"       name="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h"/>
2961         <!-- startup / system file -->
2962         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/ARM/startup_ARMv81MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2963         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2964         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2965         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/IAR/startup_ARMv81MML.s"         version="1.0.0" attr="config" condition="IAR"/>
2966         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2967         <!-- SAU configuration -->
2968         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2969       </files>
2970     </component>
2971     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv81MML CMSIS GCC">
2972       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2973       <files>
2974         <!-- include folder / device header file -->
2975         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2976         <!-- startup / system file -->
2977         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2978         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2979         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2980         <!-- SAU configuration -->
2981         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2982       </files>
2983     </component>
2984
2985     <!-- Cortex-A5 -->
2986     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2987       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2988       <files>
2989         <!-- include folder / device header file -->
2990         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2991         <!-- startup / system / mmu files -->
2992         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2993         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2994         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2995         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2996         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2997         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2998         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2999         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3000         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3001         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
3002         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
3003         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
3004
3005       </files>
3006     </component>
3007
3008     <!-- Cortex-A7 -->
3009     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3010       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3011       <files>
3012         <!-- include folder / device header file -->
3013         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3014         <!-- startup / system / mmu files -->
3015         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3016         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3017         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3018         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3019         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3020         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3021         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3022         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3023         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3024         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
3025         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
3026         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
3027       </files>
3028     </component>
3029
3030     <!-- Cortex-A9 -->
3031     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3032       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3033       <files>
3034         <!-- include folder / device header file -->
3035         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3036         <!-- startup / system / mmu files -->
3037         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3038         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3039         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3040         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3041         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3042         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3043         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3044         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3045         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3046         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
3047         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
3048         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
3049       </files>
3050     </component>
3051
3052     <!-- IRQ Controller -->
3053     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3054       <description>IRQ Controller implementation using GIC</description>
3055       <files>
3056         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3057       </files>
3058     </component>
3059
3060     <!-- OS Tick -->
3061     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3062       <description>OS Tick implementation using Private Timer</description>
3063       <files>
3064         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3065       </files>
3066     </component>
3067
3068     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3069       <description>OS Tick implementation using Generic Physical Timer</description>
3070       <files>
3071         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3072       </files>
3073     </component>
3074
3075     <!-- CMSIS-DSP component -->
3076     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.6.0" isDefaultVariant="true" condition="CMSIS DSP">
3077       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3078       <files>
3079         <!-- CPU independent -->
3080         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3081         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3082
3083         <!-- CPU and Compiler dependent -->
3084         <!-- ARMCC -->
3085         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3086         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3087         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3088         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3089         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3090         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3091         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3092         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3093         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3094         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3095         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3096         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3097         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3098         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3099         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3100         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3101
3102         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3103         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3104         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3105         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3106         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3107         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3108         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3109         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3110         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3111         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3112         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3113         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3114         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3115         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3116         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3117         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3118
3119         <!-- GCC -->
3120         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3121         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3122         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3123         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3124         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3125         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3126         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3127         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3128
3129         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3130         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3131         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3132         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3133         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3134         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3135         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3136         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3137         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3138         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3139         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3140         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3141         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3142         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3143         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3144         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3145
3146         <!-- IAR -->
3147         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3148         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3149         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3150         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3151         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3152         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3153         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3154         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3155         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3156         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3157         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3158         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3159         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3160         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3161         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3162         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3163
3164         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3165         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3166         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3167         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3168         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3169         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3170         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3171         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3172         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3173         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3174         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3175         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3176         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3177         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3178         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3179         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3180
3181       </files>
3182     </component>
3183     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.6.0" condition="CMSIS DSP">
3184       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3185       <files>
3186         <!-- CPU independent -->
3187         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3188         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3189
3190         <!-- RTX sources (core) -->
3191         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3192         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3193         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3194         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3195         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3196         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3197         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3198         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3199         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3200         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3201
3202       </files>
3203     </component>
3204
3205     <!-- CMSIS-NN component -->
3206     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.1.0" condition="CMSIS NN">
3207       <description>CMSIS-NN Neural Network Library</description>
3208       <files>
3209         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3210         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3211
3212         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3213         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3214         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3215         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3216
3217         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3218         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3219         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3220         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3221         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3222         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3223         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3224         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3225         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3226         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3227         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3228         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3229
3230         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3231         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3232         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3233         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3234         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3235         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3236
3237         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3238         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3239         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3240         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3241         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3242
3243         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3244
3245         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3246         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3247       </files>
3248     </component>
3249
3250     <!-- CMSIS-RTOS Keil RTX component -->
3251     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3252       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3253       <RTE_Components_h>
3254         <!-- the following content goes into file 'RTE_Components.h' -->
3255         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3256         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3257       </RTE_Components_h>
3258       <files>
3259         <!-- CPU independent -->
3260         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3261         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3262         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3263
3264         <!-- RTX templates -->
3265         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3266         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3267         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3268         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3269         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3270         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3271         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3272         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3273         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3274         <!-- tool-chain specific template file -->
3275         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3276         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3277         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3278
3279         <!-- CPU and Compiler dependent -->
3280         <!-- ARMCC -->
3281         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3282         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3283         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3284         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3285         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3286         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3287         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3288         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3289         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3290         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3291         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3292         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3293         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3294         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3295         <!-- GCC -->
3296         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3297         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3298         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3299         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3300         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3301         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3302         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3303         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3304         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3305         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3306         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3307         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3308         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3309         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3310         <!-- IAR -->
3311         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3312         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3313         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3314         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3315         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3316         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3317         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3318         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3319         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3320         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3321         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3322         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3323         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3324         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3325       </files>
3326     </component>
3327     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3328     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
3329       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3330       <RTE_Components_h>
3331         <!-- the following content goes into file 'RTE_Components.h' -->
3332         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3333         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3334       </RTE_Components_h>
3335       <files>
3336         <!-- CPU independent -->
3337         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3338         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3339         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3340
3341         <!-- RTX templates -->
3342         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3343         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3344         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3345         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3346         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3347         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3348         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3349         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3350         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3351         <!-- tool-chain specific template file -->
3352         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3353         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3354         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3355
3356         <!-- CPU and Compiler dependent -->
3357         <!-- ARMCC -->
3358         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3359         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3360         <!-- GCC -->
3361         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3362         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3363         <!-- IAR -->
3364       </files>
3365     </component>
3366
3367     <!-- CMSIS-RTOS Keil RTX5 component -->
3368     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.0" Capiversion="1.0.0" condition="RTOS RTX5">
3369       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3370       <RTE_Components_h>
3371         <!-- the following content goes into file 'RTE_Components.h' -->
3372         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3373         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3374       </RTE_Components_h>
3375       <files>
3376         <!-- RTX header file -->
3377         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3378         <!-- RTX compatibility module for API V1 -->
3379         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3380       </files>
3381     </component>
3382
3383     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3384     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3385       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3386       <RTE_Components_h>
3387         <!-- the following content goes into file 'RTE_Components.h' -->
3388         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3389         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3390       </RTE_Components_h>
3391       <files>
3392         <!-- RTX documentation -->
3393         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3394
3395         <!-- RTX header files -->
3396         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3397
3398         <!-- RTX configuration -->
3399         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3400         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3401
3402         <!-- RTX templates -->
3403         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3404         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3405         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3406         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3407         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3408         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3409         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3412         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3413
3414         <!-- RTX library configuration -->
3415         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3416
3417         <!-- RTX libraries (CPU and Compiler dependent) -->
3418         <!-- ARMCC -->
3419         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3420         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3421         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3422         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3423         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3424         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3425         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3426         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3427         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3428         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3429         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3430         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3431         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3432         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3433         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3434         <!-- GCC -->
3435         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3436         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3437         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3438         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3439         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3440         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3441         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3442         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3443         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3444         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3445         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3446         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3447         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3448         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3449         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3450         <!-- IAR -->
3451         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3452         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3453         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3454         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3455         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3456         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3457         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3458         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3459         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3460         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3461         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3462         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3463         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3464         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3465         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3466       </files>
3467     </component>
3468     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3469       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3470       <RTE_Components_h>
3471         <!-- the following content goes into file 'RTE_Components.h' -->
3472         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3473         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3474         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3475       </RTE_Components_h>
3476       <files>
3477         <!-- RTX documentation -->
3478         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3479
3480         <!-- RTX header files -->
3481         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3482
3483         <!-- RTX configuration -->
3484         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3485         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3486
3487         <!-- RTX templates -->
3488         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3489         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3490         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3491         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3492         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3493         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3494         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3495         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3496         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3497         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3498
3499         <!-- RTX library configuration -->
3500         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3501
3502         <!-- RTX libraries (CPU and Compiler dependent) -->
3503         <!-- ARMCC -->
3504         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3505         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3506         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3507         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3508         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3509         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3510         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3512         <!-- GCC -->
3513         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3514         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3515         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3517         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3521         <!-- IAR -->
3522         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3523         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3524         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3525         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3526         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3527         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3528         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3529         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3530       </files>
3531     </component>
3532     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
3533       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3534       <RTE_Components_h>
3535         <!-- the following content goes into file 'RTE_Components.h' -->
3536         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3537         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3538         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3539       </RTE_Components_h>
3540       <files>
3541         <!-- RTX documentation -->
3542         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3543
3544         <!-- RTX header files -->
3545         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3546
3547         <!-- RTX configuration -->
3548         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3549         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3550
3551         <!-- RTX templates -->
3552         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3553         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3554         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3555         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3556         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3557         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3558         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3559         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3560         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3561         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3562
3563         <!-- RTX sources (core) -->
3564         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3565         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3569         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3571         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3576         <!-- RTX sources (library configuration) -->
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3578         <!-- RTX sources (handlers ARMCC) -->
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3594         <!-- RTX sources (handlers GCC) -->
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3596         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3597         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3603         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3604         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3605         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3606         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3607         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3608         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3609         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3610         <!-- RTX sources (handlers IAR) -->
3611         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3612         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3613         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3614         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3615         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3616         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3617         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3618         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3619         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3620         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3621         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3622         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3623         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3624         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3625         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3626         <!-- OS Tick (SysTick) -->
3627         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3628       </files>
3629     </component>
3630     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3631       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3632       <RTE_Components_h>
3633         <!-- the following content goes into file 'RTE_Components.h' -->
3634         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3635         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3636         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3637       </RTE_Components_h>
3638       <files>
3639         <!-- RTX documentation -->
3640         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3641
3642         <!-- RTX header files -->
3643         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3644
3645         <!-- RTX configuration -->
3646         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3647         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3648
3649         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3650
3651         <!-- RTX templates -->
3652         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3653         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3654         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3655         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3656         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3657         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3658         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3659         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3660         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3661         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3662
3663         <!-- RTX sources (core) -->
3664         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3665         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3669         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3671         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3672         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3673         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3674         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3676         <!-- RTX sources (library configuration) -->
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3678         <!-- RTX sources (handlers ARMCC) -->
3679         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3680         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3681         <!-- RTX sources (handlers GCC) -->
3682         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3683         <!-- RTX sources (handlers IAR) -->
3684         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3685       </files>
3686     </component>
3687     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3688       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3689       <RTE_Components_h>
3690         <!-- the following content goes into file 'RTE_Components.h' -->
3691         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3692         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3693         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3694         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3695       </RTE_Components_h>
3696       <files>
3697         <!-- RTX documentation -->
3698         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3699
3700         <!-- RTX header files -->
3701         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3702
3703         <!-- RTX configuration -->
3704         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3705         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3706
3707         <!-- RTX templates -->
3708         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3709         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3710         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3711         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3712         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3713         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3714         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3715         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3716         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3717         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3718
3719         <!-- RTX sources (core) -->
3720         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3721         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3722         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3724         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3725         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3726         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3727         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3728         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3729         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3730         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3731         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3732         <!-- RTX sources (library configuration) -->
3733         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3734         <!-- RTX sources (ARMCC handlers) -->
3735         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3736         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3737         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3738         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3739         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3740         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3741         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3742         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3743         <!-- RTX sources (GCC handlers) -->
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3745         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3747         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3748         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3752         <!-- RTX sources (IAR handlers) -->
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3754         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3755         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3757         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3760         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3761         <!-- OS Tick (SysTick) -->
3762         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3763       </files>
3764     </component>
3765
3766     <!-- CMSIS-Driver Custom components -->
3767     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3768       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3769       <files>
3770         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3771         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3772       </files>
3773     </component>
3774     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3775       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3776       <files>
3777         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3778         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3779       </files>
3780     </component>
3781     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3782       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3783       <files>
3784         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3785         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3786       </files>
3787     </component>
3788     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3789       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3790       <files>
3791         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3792         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3793       </files>
3794     </component>
3795     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3796       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3797       <files>
3798         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3799         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3800       </files>
3801     </component>
3802     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3803       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3804       <files>
3805         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3806         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3807       </files>
3808     </component>
3809     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3810       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3811       <files>
3812         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3813         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3814       </files>
3815     </component>
3816     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3817       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3818       <files>
3819         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3820         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3821       </files>
3822     </component>
3823     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3824       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3825       <files>
3826         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3827         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3828         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3829         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3830       </files>
3831     </component>
3832     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3833       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3834       <files>
3835         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3836         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3837       </files>
3838     </component>
3839     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3840       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3841       <files>
3842         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3843         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3844       </files>
3845     </component>
3846     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3847       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3848       <files>
3849         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3850         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3851       </files>
3852     </component>
3853     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3854       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3855       <files>
3856         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3857         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3858       </files>
3859     </component>
3860     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0-beta" Capiversion="1.0.0-beta">
3861       <description>Access to #include Driver_WiFi.h file</description>
3862       <files>
3863         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3864         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3865       </files>
3866     </component>
3867   </components>
3868
3869   <boards>
3870     <board name="uVision Simulator" vendor="Keil">
3871       <description>uVision Simulator</description>
3872       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3873       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3874       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3875       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3876       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3877       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3878       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3879       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3880       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3881       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3882       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3883       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3884       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3885       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3886       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3887       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3888       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3889       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3890       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3891       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3892       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3893       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3894       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3895       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3896     </board>
3897
3898     <board name="EWARM Simulator" vendor="IAR">
3899       <description>EWARM Simulator</description>
3900       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3901       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3902       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3903       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3904       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3905       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3906       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3907       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3908       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3909       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3910       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3911       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3912       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3913       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3914       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3915       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3916       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3917       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3918       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3919       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3920       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3921       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3922       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3923       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3924     </board>
3925   </boards>
3926
3927   <examples>
3928     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3929       <description>DSP_Lib Class Marks example</description>
3930       <board name="uVision Simulator" vendor="Keil"/>
3931       <project>
3932         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3933       </project>
3934       <attributes>
3935         <component Cclass="CMSIS" Cgroup="CORE"/>
3936         <component Cclass="CMSIS" Cgroup="DSP"/>
3937         <component Cclass="Device" Cgroup="Startup"/>
3938         <category>Getting Started</category>
3939       </attributes>
3940     </example>
3941
3942     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3943       <description>DSP_Lib Convolution example</description>
3944       <board name="uVision Simulator" vendor="Keil"/>
3945       <project>
3946         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3947       </project>
3948       <attributes>
3949         <component Cclass="CMSIS" Cgroup="CORE"/>
3950         <component Cclass="CMSIS" Cgroup="DSP"/>
3951         <component Cclass="Device" Cgroup="Startup"/>
3952         <category>Getting Started</category>
3953       </attributes>
3954     </example>
3955
3956     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3957       <description>DSP_Lib Dotproduct example</description>
3958       <board name="uVision Simulator" vendor="Keil"/>
3959       <project>
3960         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3961       </project>
3962       <attributes>
3963         <component Cclass="CMSIS" Cgroup="CORE"/>
3964         <component Cclass="CMSIS" Cgroup="DSP"/>
3965         <component Cclass="Device" Cgroup="Startup"/>
3966         <category>Getting Started</category>
3967       </attributes>
3968     </example>
3969
3970     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3971       <description>DSP_Lib FFT Bin example</description>
3972       <board name="uVision Simulator" vendor="Keil"/>
3973       <project>
3974         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3975       </project>
3976       <attributes>
3977         <component Cclass="CMSIS" Cgroup="CORE"/>
3978         <component Cclass="CMSIS" Cgroup="DSP"/>
3979         <component Cclass="Device" Cgroup="Startup"/>
3980         <category>Getting Started</category>
3981       </attributes>
3982     </example>
3983
3984     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3985       <description>DSP_Lib FIR example</description>
3986       <board name="uVision Simulator" vendor="Keil"/>
3987       <project>
3988         <environment name="uv" load="arm_fir_example.uvprojx"/>
3989       </project>
3990       <attributes>
3991         <component Cclass="CMSIS" Cgroup="CORE"/>
3992         <component Cclass="CMSIS" Cgroup="DSP"/>
3993         <component Cclass="Device" Cgroup="Startup"/>
3994         <category>Getting Started</category>
3995       </attributes>
3996     </example>
3997
3998     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3999       <description>DSP_Lib Graphic Equalizer example</description>
4000       <board name="uVision Simulator" vendor="Keil"/>
4001       <project>
4002         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4003       </project>
4004       <attributes>
4005         <component Cclass="CMSIS" Cgroup="CORE"/>
4006         <component Cclass="CMSIS" Cgroup="DSP"/>
4007         <component Cclass="Device" Cgroup="Startup"/>
4008         <category>Getting Started</category>
4009       </attributes>
4010     </example>
4011
4012     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4013       <description>DSP_Lib Linear Interpolation example</description>
4014       <board name="uVision Simulator" vendor="Keil"/>
4015       <project>
4016         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4017       </project>
4018       <attributes>
4019         <component Cclass="CMSIS" Cgroup="CORE"/>
4020         <component Cclass="CMSIS" Cgroup="DSP"/>
4021         <component Cclass="Device" Cgroup="Startup"/>
4022         <category>Getting Started</category>
4023       </attributes>
4024     </example>
4025
4026     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4027       <description>DSP_Lib Matrix example</description>
4028       <board name="uVision Simulator" vendor="Keil"/>
4029       <project>
4030         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4031       </project>
4032       <attributes>
4033         <component Cclass="CMSIS" Cgroup="CORE"/>
4034         <component Cclass="CMSIS" Cgroup="DSP"/>
4035         <component Cclass="Device" Cgroup="Startup"/>
4036         <category>Getting Started</category>
4037       </attributes>
4038     </example>
4039
4040     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4041       <description>DSP_Lib Signal Convergence example</description>
4042       <board name="uVision Simulator" vendor="Keil"/>
4043       <project>
4044         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4045       </project>
4046       <attributes>
4047         <component Cclass="CMSIS" Cgroup="CORE"/>
4048         <component Cclass="CMSIS" Cgroup="DSP"/>
4049         <component Cclass="Device" Cgroup="Startup"/>
4050         <category>Getting Started</category>
4051       </attributes>
4052     </example>
4053
4054     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4055       <description>DSP_Lib Sinus/Cosinus example</description>
4056       <board name="uVision Simulator" vendor="Keil"/>
4057       <project>
4058         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4059       </project>
4060       <attributes>
4061         <component Cclass="CMSIS" Cgroup="CORE"/>
4062         <component Cclass="CMSIS" Cgroup="DSP"/>
4063         <component Cclass="Device" Cgroup="Startup"/>
4064         <category>Getting Started</category>
4065       </attributes>
4066     </example>
4067
4068     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4069       <description>DSP_Lib Variance example</description>
4070       <board name="uVision Simulator" vendor="Keil"/>
4071       <project>
4072         <environment name="uv" load="arm_variance_example.uvprojx"/>
4073       </project>
4074       <attributes>
4075         <component Cclass="CMSIS" Cgroup="CORE"/>
4076         <component Cclass="CMSIS" Cgroup="DSP"/>
4077         <component Cclass="Device" Cgroup="Startup"/>
4078         <category>Getting Started</category>
4079       </attributes>
4080     </example>
4081
4082     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4083       <description>Neural Network CIFAR10 example</description>
4084       <board name="uVision Simulator" vendor="Keil"/>
4085       <project>
4086         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4087       </project>
4088       <attributes>
4089         <component Cclass="CMSIS" Cgroup="CORE"/>
4090         <component Cclass="CMSIS" Cgroup="DSP"/>
4091         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4092         <component Cclass="Device" Cgroup="Startup"/>
4093         <category>Getting Started</category>
4094       </attributes>
4095     </example>
4096
4097     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4098       <description>Neural Network CIFAR10 example</description>
4099       <board name="EWARM Simulator" vendor="IAR"/>
4100       <project>
4101         <environment name="iar" load="NN-example-cifar10.ewp"/>
4102       </project>
4103       <attributes>
4104         <component Cclass="CMSIS" Cgroup="CORE"/>
4105         <component Cclass="CMSIS" Cgroup="DSP"/>
4106         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4107         <component Cclass="Device" Cgroup="Startup"/>
4108         <category>Getting Started</category>
4109       </attributes>
4110     </example>
4111
4112     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4113       <description>Neural Network GRU example</description>
4114       <board name="uVision Simulator" vendor="Keil"/>
4115       <project>
4116         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4117       </project>
4118       <attributes>
4119         <component Cclass="CMSIS" Cgroup="CORE"/>
4120         <component Cclass="CMSIS" Cgroup="DSP"/>
4121         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4122         <component Cclass="Device" Cgroup="Startup"/>
4123         <category>Getting Started</category>
4124       </attributes>
4125     </example>
4126
4127     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4128       <description>Neural Network GRU example</description>
4129       <board name="EWARM Simulator" vendor="IAR"/>
4130       <project>
4131         <environment name="iar" load="NN-example-gru.ewp"/>
4132       </project>
4133       <attributes>
4134         <component Cclass="CMSIS" Cgroup="CORE"/>
4135         <component Cclass="CMSIS" Cgroup="DSP"/>
4136         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4137         <component Cclass="Device" Cgroup="Startup"/>
4138         <category>Getting Started</category>
4139       </attributes>
4140     </example>
4141
4142     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4143       <description>CMSIS-RTOS2 Blinky example</description>
4144       <board name="uVision Simulator" vendor="Keil"/>
4145       <project>
4146         <environment name="uv" load="Blinky.uvprojx"/>
4147       </project>
4148       <attributes>
4149         <component Cclass="CMSIS" Cgroup="CORE"/>
4150         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4151         <component Cclass="Device" Cgroup="Startup"/>
4152         <category>Getting Started</category>
4153       </attributes>
4154     </example>
4155
4156     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4157       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4158       <board name="uVision Simulator" vendor="Keil"/>
4159       <project>
4160         <environment name="uv" load="Blinky.uvprojx"/>
4161       </project>
4162       <attributes>
4163         <component Cclass="CMSIS" Cgroup="CORE"/>
4164         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4165         <component Cclass="Device" Cgroup="Startup"/>
4166         <category>Getting Started</category>
4167       </attributes>
4168     </example>
4169
4170     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4171       <description>CMSIS-RTOS2 Message Queue Example</description>
4172       <board name="uVision Simulator" vendor="Keil"/>
4173       <project>
4174         <environment name="uv" load="MsqQueue.uvprojx"/>
4175       </project>
4176       <attributes>
4177         <component Cclass="CMSIS" Cgroup="CORE"/>
4178         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4179         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4180         <component Cclass="Device" Cgroup="Startup"/>
4181         <category>Getting Started</category>
4182       </attributes>
4183     </example>
4184
4185     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4186       <description>CMSIS-RTOS2 Memory Pool Example</description>
4187       <board name="uVision Simulator" vendor="Keil"/>
4188       <project>
4189         <environment name="uv" load="MemPool.uvprojx"/>
4190       </project>
4191       <attributes>
4192         <component Cclass="CMSIS" Cgroup="CORE"/>
4193         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4194         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4195         <component Cclass="Device" Cgroup="Startup"/>
4196         <category>Getting Started</category>
4197       </attributes>
4198     </example>
4199
4200     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4201       <description>Bare-metal secure/non-secure example without RTOS</description>
4202       <board name="uVision Simulator" vendor="Keil"/>
4203       <project>
4204         <environment name="uv" load="NoRTOS.uvmpw"/>
4205       </project>
4206       <attributes>
4207         <component Cclass="CMSIS" Cgroup="CORE"/>
4208         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4209         <component Cclass="Device" Cgroup="Startup"/>
4210         <category>Getting Started</category>
4211       </attributes>
4212     </example>
4213
4214     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4215       <description>Secure/non-secure RTOS example with thread context management</description>
4216       <board name="uVision Simulator" vendor="Keil"/>
4217       <project>
4218         <environment name="uv" load="RTOS.uvmpw"/>
4219       </project>
4220       <attributes>
4221         <component Cclass="CMSIS" Cgroup="CORE"/>
4222         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4223         <component Cclass="Device" Cgroup="Startup"/>
4224         <category>Getting Started</category>
4225       </attributes>
4226     </example>
4227
4228     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4229       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4230       <board name="uVision Simulator" vendor="Keil"/>
4231       <project>
4232         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4233       </project>
4234       <attributes>
4235         <component Cclass="CMSIS" Cgroup="CORE"/>
4236         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4237         <component Cclass="Device" Cgroup="Startup"/>
4238         <category>Getting Started</category>
4239       </attributes>
4240     </example>
4241
4242   </examples>
4243
4244 </package>