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 132   <div class="headertitle"><div class="title">ARM_MPU_Region_t Struct Reference<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for Armv6-M/v7-M</a> &#124; <a class="el" href="group__mpu8__functions.html">MPU Functions for Armv8-M</a></div></div></div>
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 134 <div class="contents">
 135
 136 <p>Setup information of a single MPU Region.
 137  <a href="structARM__MPU__Region__t.html#details">More...</a></p>
 138 <table class="memberdecls">
 139 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
 140 Data Fields</h2></td></tr>
 141 <tr class="memitem:afe7a7721aa08988d915670efa432cdd2"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a></td></tr>
 142 <tr class="memdesc:afe7a7721aa08988d915670efa432cdd2"><td class="mdescLeft">&#160;</td><td class="mdescRight">The region base address register value (<a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">RBAR</a>)  <br /></td></tr>
 143 <tr class="separator:afe7a7721aa08988d915670efa432cdd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 144 <tr class="memitem:a6a3e404b403c8df611f27d902d745d8d"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html#a6a3e404b403c8df611f27d902d745d8d">RASR</a></td></tr>
 145 <tr class="memdesc:a6a3e404b403c8df611f27d902d745d8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">The region attribute and size register value (<a class="el" href="structMPU__Type.html#a8f00c4a5e31b0a8d103ed3b0732c17a3">RASR</a>), see <a class="el" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>.  <br /></td></tr>
 146 <tr class="separator:a6a3e404b403c8df611f27d902d745d8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 147 <tr class="memitem:ab5d3a650dbffd0b272bf7df5b140e8a8"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8">RLAR</a></td></tr>
 148 <tr class="separator:ab5d3a650dbffd0b272bf7df5b140e8a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 149 </table>
 150 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 151 <div class="textblock"><p>Setup information of a single MPU Region. </p>
 152 <p>The typedef <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> allows to define a MPU table (array of MPU regions) with pre-compiled register values. Such tables enable efficient MPU setup using the function <a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a>.</p>
 153 <p><b>Example:</b> See <a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a></p>
 154 <p>Struct for a single MPU Region </p>
 155 </div><h2 class="groupheader">Field Documentation</h2>
 156 <a id="a6a3e404b403c8df611f27d902d745d8d" name="a6a3e404b403c8df611f27d902d745d8d"></a>
 157 <h2 class="memtitle"><span class="permalink"><a href="#a6a3e404b403c8df611f27d902d745d8d">&#9670;&#160;</a></span>RASR</h2>
 158
 159 <div class="memitem">
 160 <div class="memproto">
 161       <table class="memname">
 162         <tr>
 163           <td class="memname">ARM_MPU_Region_t::RASR</td>
 164         </tr>
 165       </table>
 166 </div><div class="memdoc">
 167
 168 <p>The region attribute and size register value (<a class="el" href="structMPU__Type.html#a8f00c4a5e31b0a8d103ed3b0732c17a3">RASR</a>), see <a class="el" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>. </p>
 169 <p>This value specifies region attributes and size. Use the <a class="el" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a> macro to compose this value. </p>
 170
 171 </div>
 172 </div>
 173 <a id="afe7a7721aa08988d915670efa432cdd2" name="afe7a7721aa08988d915670efa432cdd2"></a>
 174 <h2 class="memtitle"><span class="permalink"><a href="#afe7a7721aa08988d915670efa432cdd2">&#9670;&#160;</a></span>RBAR</h2>
 175
 176 <div class="memitem">
 177 <div class="memproto">
 178       <table class="memname">
 179         <tr>
 180           <td class="memname">uint32_t ARM_MPU_Region_t::RBAR</td>
 181         </tr>
 182       </table>
 183 </div><div class="memdoc">
 184
 185 <p>The region base address register value (<a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">RBAR</a>) </p>
 186 <p>Region Base Address Register value</p>
 187 <p>This value specifies the start address of the MPU protected memory region. The address must be a multiple of the region size (size aligned).</p>
 188 <p>See <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">MPU_Type::RBAR</a> for details about field bit format. </p>
 189
 190 </div>
 191 </div>
 192 <a id="ab5d3a650dbffd0b272bf7df5b140e8a8" name="ab5d3a650dbffd0b272bf7df5b140e8a8"></a>
 193 <h2 class="memtitle"><span class="permalink"><a href="#ab5d3a650dbffd0b272bf7df5b140e8a8">&#9670;&#160;</a></span>RLAR</h2>
 194
 195 <div class="memitem">
 196 <div class="memproto">
 197       <table class="memname">
 198         <tr>
 199           <td class="memname">uint32_t ARM_MPU_Region_t::RLAR</td>
 200         </tr>
 201       </table>
 202 </div><div class="memdoc">
 203 <p>Region Limit Address Register value </p>
 204
 205 </div>
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