begriffs open source - cmsis/blob - main/Core_A/html/irq__ctrl_8h.html

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 131 <a href="#define-members">Macros</a> &#124;
 132 <a href="#typedef-members">Typedefs</a> &#124;
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 134   <div class="headertitle"><div class="title">irq_ctrl.h File Reference</div></div>
 135 </div><!--header-->
 136 <div class="contents">
 137
 138 <p>Interrupt Controller API header file.
 139 <a href="#details">More...</a></p>
 140 <table class="memberdecls">
 141 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
 142 Macros</h2></td></tr>
 143 <tr class="memitem:ad98f7b2e49c628cc86ee5ad15f5b28a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#ad98f7b2e49c628cc86ee5ad15f5b28a6">IRQ_CTRL_H_</a></td></tr>
 144 <tr class="separator:ad98f7b2e49c628cc86ee5ad15f5b28a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 145 <tr class="memitem:aed032df21f11e8715f5c4deeeb56cc36"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#aed032df21f11e8715f5c4deeeb56cc36">IRQHANDLER_T</a></td></tr>
 146 <tr class="separator:aed032df21f11e8715f5c4deeeb56cc36"><td class="memSeparator" colspan="2">&#160;</td></tr>
 147 <tr class="memitem:a258c398eec8109370a1bacac5ce2518b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#a258c398eec8109370a1bacac5ce2518b">IRQN_ID_T</a></td></tr>
 148 <tr class="separator:a258c398eec8109370a1bacac5ce2518b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 149 <tr class="memitem:ace17913944cf0218141e51beaada4053"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>&#160;&#160;&#160;(0U)</td></tr>
 150 <tr class="separator:ace17913944cf0218141e51beaada4053"><td class="memSeparator" colspan="2">&#160;</td></tr>
 151 <tr class="memitem:a2fafbaf2f6da5241ad97af6c493fa218"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#a2fafbaf2f6da5241ad97af6c493fa218">IRQ_MODE_TRIG_Msk</a>&#160;&#160;&#160;(0x07UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 152 <tr class="separator:a2fafbaf2f6da5241ad97af6c493fa218"><td class="memSeparator" colspan="2">&#160;</td></tr>
 153 <tr class="memitem:gabc31ba71612436a6ccc49342f35fec58"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gabc31ba71612436a6ccc49342f35fec58">IRQ_MODE_TRIG_LEVEL</a>&#160;&#160;&#160;(0x00UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 154 <tr class="memdesc:gabc31ba71612436a6ccc49342f35fec58"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: level triggered interrupt.  <br /></td></tr>
 155 <tr class="separator:gabc31ba71612436a6ccc49342f35fec58"><td class="memSeparator" colspan="2">&#160;</td></tr>
 156 <tr class="memitem:ga326df9e34f6447583895a6f809ee160a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga326df9e34f6447583895a6f809ee160a">IRQ_MODE_TRIG_LEVEL_LOW</a>&#160;&#160;&#160;(0x01UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 157 <tr class="memdesc:ga326df9e34f6447583895a6f809ee160a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: low level triggered interrupt.  <br /></td></tr>
 158 <tr class="separator:ga326df9e34f6447583895a6f809ee160a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 159 <tr class="memitem:gafeb539b2a564ca35abc57f87d71e7206"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gafeb539b2a564ca35abc57f87d71e7206">IRQ_MODE_TRIG_LEVEL_HIGH</a>&#160;&#160;&#160;(0x02UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 160 <tr class="memdesc:gafeb539b2a564ca35abc57f87d71e7206"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: high level triggered interrupt.  <br /></td></tr>
 161 <tr class="separator:gafeb539b2a564ca35abc57f87d71e7206"><td class="memSeparator" colspan="2">&#160;</td></tr>
 162 <tr class="memitem:gaa9a8e0968a4ccd57eb7544a16d05f24d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaa9a8e0968a4ccd57eb7544a16d05f24d">IRQ_MODE_TRIG_EDGE</a>&#160;&#160;&#160;(0x04UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 163 <tr class="memdesc:gaa9a8e0968a4ccd57eb7544a16d05f24d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: edge triggered interrupt.  <br /></td></tr>
 164 <tr class="separator:gaa9a8e0968a4ccd57eb7544a16d05f24d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 165 <tr class="memitem:ga2dbbbb7100be0fee6e048cd3deb50e28"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga2dbbbb7100be0fee6e048cd3deb50e28">IRQ_MODE_TRIG_EDGE_RISING</a>&#160;&#160;&#160;(0x05UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 166 <tr class="memdesc:ga2dbbbb7100be0fee6e048cd3deb50e28"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: rising edge triggered interrupt.  <br /></td></tr>
 167 <tr class="separator:ga2dbbbb7100be0fee6e048cd3deb50e28"><td class="memSeparator" colspan="2">&#160;</td></tr>
 168 <tr class="memitem:ga99e0f3f6945991d50e766b19e71e0222"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga99e0f3f6945991d50e766b19e71e0222">IRQ_MODE_TRIG_EDGE_FALLING</a>&#160;&#160;&#160;(0x06UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 169 <tr class="memdesc:ga99e0f3f6945991d50e766b19e71e0222"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: falling edge triggered interrupt.  <br /></td></tr>
 170 <tr class="separator:ga99e0f3f6945991d50e766b19e71e0222"><td class="memSeparator" colspan="2">&#160;</td></tr>
 171 <tr class="memitem:ga8b0142ff767a9b1b1287e638eacf707b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga8b0142ff767a9b1b1287e638eacf707b">IRQ_MODE_TRIG_EDGE_BOTH</a>&#160;&#160;&#160;(0x07UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 172 <tr class="memdesc:ga8b0142ff767a9b1b1287e638eacf707b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: rising and falling edge triggered interrupt.  <br /></td></tr>
 173 <tr class="separator:ga8b0142ff767a9b1b1287e638eacf707b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 174 <tr class="memitem:a7560513ef6a445642b5ed76eabf2a1b2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>&#160;&#160;&#160;(3U)</td></tr>
 175 <tr class="separator:a7560513ef6a445642b5ed76eabf2a1b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 176 <tr class="memitem:a7b0581db3736a143cd582cd2457bf3cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#a7b0581db3736a143cd582cd2457bf3cc">IRQ_MODE_TYPE_Msk</a>&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td></tr>
 177 <tr class="separator:a7b0581db3736a143cd582cd2457bf3cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
 178 <tr class="memitem:gab0d022bbd15beb1a6578b5535d95f9cf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gab0d022bbd15beb1a6578b5535d95f9cf">IRQ_MODE_TYPE_IRQ</a>&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td></tr>
 179 <tr class="memdesc:gab0d022bbd15beb1a6578b5535d95f9cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Type: interrupt source triggers CPU IRQ line.  <br /></td></tr>
 180 <tr class="separator:gab0d022bbd15beb1a6578b5535d95f9cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 181 <tr class="memitem:gaec01a80010bc42b1482388ce3ae4d2a3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaec01a80010bc42b1482388ce3ae4d2a3">IRQ_MODE_TYPE_FIQ</a>&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td></tr>
 182 <tr class="memdesc:gaec01a80010bc42b1482388ce3ae4d2a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Type: interrupt source triggers CPU FIQ line.  <br /></td></tr>
 183 <tr class="separator:gaec01a80010bc42b1482388ce3ae4d2a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 184 <tr class="memitem:af14ca343d349887ab691d51aab1662ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>&#160;&#160;&#160;(4U)</td></tr>
 185 <tr class="separator:af14ca343d349887ab691d51aab1662ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
 186 <tr class="memitem:afdc87f9fda2bafac2b0399ebdb39bf3e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#afdc87f9fda2bafac2b0399ebdb39bf3e">IRQ_MODE_DOMAIN_Msk</a>&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td></tr>
 187 <tr class="separator:afdc87f9fda2bafac2b0399ebdb39bf3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 188 <tr class="memitem:ga7498851a6a7f3e2c5e087041617f5be7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga7498851a6a7f3e2c5e087041617f5be7">IRQ_MODE_DOMAIN_NONSECURE</a>&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td></tr>
 189 <tr class="memdesc:ga7498851a6a7f3e2c5e087041617f5be7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Domain: interrupt is targeting non-secure domain.  <br /></td></tr>
 190 <tr class="separator:ga7498851a6a7f3e2c5e087041617f5be7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 191 <tr class="memitem:ga15cdeb10ef2b8081c5cd7a87e22e65e6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga15cdeb10ef2b8081c5cd7a87e22e65e6">IRQ_MODE_DOMAIN_SECURE</a>&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td></tr>
 192 <tr class="memdesc:ga15cdeb10ef2b8081c5cd7a87e22e65e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Domain: interrupt is targeting secure domain.  <br /></td></tr>
 193 <tr class="separator:ga15cdeb10ef2b8081c5cd7a87e22e65e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 194 <tr class="memitem:ab7527409c193021e65aaf4d519caea46"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>&#160;&#160;&#160;(5U)</td></tr>
 195 <tr class="separator:ab7527409c193021e65aaf4d519caea46"><td class="memSeparator" colspan="2">&#160;</td></tr>
 196 <tr class="memitem:a96f739279c27f3e56ede4f28de4a48d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#a96f739279c27f3e56ede4f28de4a48d8">IRQ_MODE_CPU_Msk</a>&#160;&#160;&#160;(0xFFUL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 197 <tr class="separator:a96f739279c27f3e56ede4f28de4a48d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 198 <tr class="memitem:gad3d0505689768247c67495b7359e147f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gad3d0505689768247c67495b7359e147f">IRQ_MODE_CPU_ALL</a>&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 199 <tr class="memdesc:gad3d0505689768247c67495b7359e147f"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets all CPUs.  <br /></td></tr>
 200 <tr class="separator:gad3d0505689768247c67495b7359e147f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 201 <tr class="memitem:gacb276aa0488a9bf1aa56e1072d2a15a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gacb276aa0488a9bf1aa56e1072d2a15a5">IRQ_MODE_CPU_0</a>&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 202 <tr class="memdesc:gacb276aa0488a9bf1aa56e1072d2a15a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 0.  <br /></td></tr>
 203 <tr class="separator:gacb276aa0488a9bf1aa56e1072d2a15a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 204 <tr class="memitem:gab09616a5ccd05d75d81ab80a37387a9a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gab09616a5ccd05d75d81ab80a37387a9a">IRQ_MODE_CPU_1</a>&#160;&#160;&#160;(0x02UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 205 <tr class="memdesc:gab09616a5ccd05d75d81ab80a37387a9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 1.  <br /></td></tr>
 206 <tr class="separator:gab09616a5ccd05d75d81ab80a37387a9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 207 <tr class="memitem:ga3c8c5ec0226d772c3200d9efa2d3bf1a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga3c8c5ec0226d772c3200d9efa2d3bf1a">IRQ_MODE_CPU_2</a>&#160;&#160;&#160;(0x04UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 208 <tr class="memdesc:ga3c8c5ec0226d772c3200d9efa2d3bf1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 2.  <br /></td></tr>
 209 <tr class="separator:ga3c8c5ec0226d772c3200d9efa2d3bf1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 210 <tr class="memitem:ga7fe46ac2f03063dc5ed2ca793c9cca85"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga7fe46ac2f03063dc5ed2ca793c9cca85">IRQ_MODE_CPU_3</a>&#160;&#160;&#160;(0x08UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 211 <tr class="memdesc:ga7fe46ac2f03063dc5ed2ca793c9cca85"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 3.  <br /></td></tr>
 212 <tr class="separator:ga7fe46ac2f03063dc5ed2ca793c9cca85"><td class="memSeparator" colspan="2">&#160;</td></tr>
 213 <tr class="memitem:ga4d428c7ab66cb22eb375a109735e9a3a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga4d428c7ab66cb22eb375a109735e9a3a">IRQ_MODE_CPU_4</a>&#160;&#160;&#160;(0x10UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 214 <tr class="memdesc:ga4d428c7ab66cb22eb375a109735e9a3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 4.  <br /></td></tr>
 215 <tr class="separator:ga4d428c7ab66cb22eb375a109735e9a3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 216 <tr class="memitem:ga94faa9eab45bbc6fa6b2a3c9d92bbb37"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga94faa9eab45bbc6fa6b2a3c9d92bbb37">IRQ_MODE_CPU_5</a>&#160;&#160;&#160;(0x20UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 217 <tr class="memdesc:ga94faa9eab45bbc6fa6b2a3c9d92bbb37"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 5.  <br /></td></tr>
 218 <tr class="separator:ga94faa9eab45bbc6fa6b2a3c9d92bbb37"><td class="memSeparator" colspan="2">&#160;</td></tr>
 219 <tr class="memitem:gadb512fc8a31bc771c3ce0d006b821bb9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gadb512fc8a31bc771c3ce0d006b821bb9">IRQ_MODE_CPU_6</a>&#160;&#160;&#160;(0x40UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 220 <tr class="memdesc:gadb512fc8a31bc771c3ce0d006b821bb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 6.  <br /></td></tr>
 221 <tr class="separator:gadb512fc8a31bc771c3ce0d006b821bb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 222 <tr class="memitem:gaa66525a1ee05c56f367540b2135e81ed"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaa66525a1ee05c56f367540b2135e81ed">IRQ_MODE_CPU_7</a>&#160;&#160;&#160;(0x80UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 223 <tr class="memdesc:gaa66525a1ee05c56f367540b2135e81ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 7.  <br /></td></tr>
 224 <tr class="separator:gaa66525a1ee05c56f367540b2135e81ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
 225 <tr class="memitem:a8762d04e7c5660e967c4a4de0bd225cf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#a8762d04e7c5660e967c4a4de0bd225cf">IRQ_MODE_MODEL_Pos</a>&#160;&#160;&#160;(13U)</td></tr>
 226 <tr class="separator:a8762d04e7c5660e967c4a4de0bd225cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 227 <tr class="memitem:a43b2d354adbc6e577504c483b93f68b2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#a43b2d354adbc6e577504c483b93f68b2">IRQ_MODE_MODEL_Msk</a>&#160;&#160;&#160;(0x1UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a8762d04e7c5660e967c4a4de0bd225cf">IRQ_MODE_MODEL_Pos</a>)</td></tr>
 228 <tr class="separator:a43b2d354adbc6e577504c483b93f68b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 229 <tr class="memitem:a945e56c21271cae944d993885cd5882d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#a945e56c21271cae944d993885cd5882d">IRQ_MODE_MODEL_NN</a>&#160;&#160;&#160;(0x0UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a8762d04e7c5660e967c4a4de0bd225cf">IRQ_MODE_MODEL_Pos</a>)</td></tr>
 230 <tr class="memdesc:a945e56c21271cae944d993885cd5882d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Corresponding interrupt is handled using the N-N model.  <br /></td></tr>
 231 <tr class="separator:a945e56c21271cae944d993885cd5882d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 232 <tr class="memitem:a547d14c0b2299524f2ad4bb47f65059a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#a547d14c0b2299524f2ad4bb47f65059a">IRQ_MODE_MODEL_1N</a>&#160;&#160;&#160;(0x1UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a8762d04e7c5660e967c4a4de0bd225cf">IRQ_MODE_MODEL_Pos</a>)</td></tr>
 233 <tr class="memdesc:a547d14c0b2299524f2ad4bb47f65059a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Corresponding interrupt is handled using the 1-N model.  <br /></td></tr>
 234 <tr class="separator:a547d14c0b2299524f2ad4bb47f65059a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 235 <tr class="memitem:gaacb93ae158e548c54698a7230647804a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaacb93ae158e548c54698a7230647804a">IRQ_MODE_ERROR</a>&#160;&#160;&#160;(0x80000000UL)</td></tr>
 236 <tr class="memdesc:gaacb93ae158e548c54698a7230647804a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit indicating mode value error.  <br /></td></tr>
 237 <tr class="separator:gaacb93ae158e548c54698a7230647804a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 238 <tr class="memitem:gabaa4e91ab84dbe5f669080af6d0d81fa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__priority__defs.html#gabaa4e91ab84dbe5f669080af6d0d81fa">IRQ_PRIORITY_Msk</a>&#160;&#160;&#160;(0x0000FFFFUL)</td></tr>
 239 <tr class="memdesc:gabaa4e91ab84dbe5f669080af6d0d81fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt priority value bit-mask.  <br /></td></tr>
 240 <tr class="separator:gabaa4e91ab84dbe5f669080af6d0d81fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
 241 <tr class="memitem:ga47b19866dc05c58c6923c313b371f881"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__priority__defs.html#ga47b19866dc05c58c6923c313b371f881">IRQ_PRIORITY_ERROR</a>&#160;&#160;&#160;(0x80000000UL)</td></tr>
 242 <tr class="memdesc:ga47b19866dc05c58c6923c313b371f881"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit indicating priority value error.  <br /></td></tr>
 243 <tr class="separator:ga47b19866dc05c58c6923c313b371f881"><td class="memSeparator" colspan="2">&#160;</td></tr>
 244 </table><table class="memberdecls">
 245 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="typedef-members" name="typedef-members"></a>
 246 Typedefs</h2></td></tr>
 247 <tr class="memitem:a27589275c894aa295615df4764404b98"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#a27589275c894aa295615df4764404b98">IRQHandler_t</a>) (void)</td></tr>
 248 <tr class="memdesc:a27589275c894aa295615df4764404b98"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt handler data type.  <br /></td></tr>
 249 <tr class="separator:a27589275c894aa295615df4764404b98"><td class="memSeparator" colspan="2">&#160;</td></tr>
 250 <tr class="memitem:ac62964c04a7fed2c84aeea9e34f415e2"><td class="memItemLeft" align="right" valign="top">typedef int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a></td></tr>
 251 <tr class="memdesc:ac62964c04a7fed2c84aeea9e34f415e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt ID number data type.  <br /></td></tr>
 252 <tr class="separator:ac62964c04a7fed2c84aeea9e34f415e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 253 </table><table class="memberdecls">
 254 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 255 Functions</h2></td></tr>
 256 <tr class="memitem:ga03ea5d5d67a89acff8a5b02286795a99"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga03ea5d5d67a89acff8a5b02286795a99">IRQ_Initialize</a> (void)</td></tr>
 257 <tr class="memdesc:ga03ea5d5d67a89acff8a5b02286795a99"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize interrupt controller.  <br /></td></tr>
 258 <tr class="separator:ga03ea5d5d67a89acff8a5b02286795a99"><td class="memSeparator" colspan="2">&#160;</td></tr>
 259 <tr class="memitem:gac1fcc16fb8e488d315cfa496f1d71db3"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#gac1fcc16fb8e488d315cfa496f1d71db3">IRQ_SetHandler</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn, <a class="el" href="irq__ctrl_8h.html#a27589275c894aa295615df4764404b98">IRQHandler_t</a> handler)</td></tr>
 260 <tr class="memdesc:gac1fcc16fb8e488d315cfa496f1d71db3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Register interrupt handler.  <br /></td></tr>
 261 <tr class="separator:gac1fcc16fb8e488d315cfa496f1d71db3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 262 <tr class="memitem:gaa2a2df8fbc7bad465ada49bd690f65d5"><td class="memItemLeft" align="right" valign="top"><a class="el" href="irq__ctrl_8h.html#a27589275c894aa295615df4764404b98">IRQHandler_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#gaa2a2df8fbc7bad465ada49bd690f65d5">IRQ_GetHandler</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn)</td></tr>
 263 <tr class="memdesc:gaa2a2df8fbc7bad465ada49bd690f65d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the registered interrupt handler.  <br /></td></tr>
 264 <tr class="separator:gaa2a2df8fbc7bad465ada49bd690f65d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 265 <tr class="memitem:ga4ad780a3dc23a1b6222de8adcd7c20a7"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga4ad780a3dc23a1b6222de8adcd7c20a7">IRQ_Enable</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn)</td></tr>
 266 <tr class="memdesc:ga4ad780a3dc23a1b6222de8adcd7c20a7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable interrupt.  <br /></td></tr>
 267 <tr class="separator:ga4ad780a3dc23a1b6222de8adcd7c20a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 268 <tr class="memitem:ga544cf4ae0159cc17e259d55898528248"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga544cf4ae0159cc17e259d55898528248">IRQ_Disable</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn)</td></tr>
 269 <tr class="memdesc:ga544cf4ae0159cc17e259d55898528248"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable interrupt.  <br /></td></tr>
 270 <tr class="separator:ga544cf4ae0159cc17e259d55898528248"><td class="memSeparator" colspan="2">&#160;</td></tr>
 271 <tr class="memitem:ga8913613a9075a35410af0eb7b275d9e2"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga8913613a9075a35410af0eb7b275d9e2">IRQ_GetEnableState</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn)</td></tr>
 272 <tr class="memdesc:ga8913613a9075a35410af0eb7b275d9e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get interrupt enable state.  <br /></td></tr>
 273 <tr class="separator:ga8913613a9075a35410af0eb7b275d9e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 274 <tr class="memitem:gab35da69354d2e515931580a1308a3a85"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#gab35da69354d2e515931580a1308a3a85">IRQ_SetMode</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn, uint32_t mode)</td></tr>
 275 <tr class="memdesc:gab35da69354d2e515931580a1308a3a85"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure interrupt request mode.  <br /></td></tr>
 276 <tr class="separator:gab35da69354d2e515931580a1308a3a85"><td class="memSeparator" colspan="2">&#160;</td></tr>
 277 <tr class="memitem:gadba142ee49ae8f52f76b603c926ad711"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#gadba142ee49ae8f52f76b603c926ad711">IRQ_GetMode</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn)</td></tr>
 278 <tr class="memdesc:gadba142ee49ae8f52f76b603c926ad711"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get interrupt mode configuration.  <br /></td></tr>
 279 <tr class="separator:gadba142ee49ae8f52f76b603c926ad711"><td class="memSeparator" colspan="2">&#160;</td></tr>
 280 <tr class="memitem:ga1664e9fc682c3ace4b721906d6ce2b3d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga1664e9fc682c3ace4b721906d6ce2b3d">IRQ_GetActiveIRQ</a> (void)</td></tr>
 281 <tr class="memdesc:ga1664e9fc682c3ace4b721906d6ce2b3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get ID number of current interrupt request (IRQ).  <br /></td></tr>
 282 <tr class="separator:ga1664e9fc682c3ace4b721906d6ce2b3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 283 <tr class="memitem:ga1376a5cf6ff38344a9bbbae080af5a0f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga1376a5cf6ff38344a9bbbae080af5a0f">IRQ_GetActiveFIQ</a> (void)</td></tr>
 284 <tr class="memdesc:ga1376a5cf6ff38344a9bbbae080af5a0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get ID number of current fast interrupt request (FIQ).  <br /></td></tr>
 285 <tr class="separator:ga1376a5cf6ff38344a9bbbae080af5a0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 286 <tr class="memitem:ga55638c35efdc7a197b51165929ef0c10"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga55638c35efdc7a197b51165929ef0c10">IRQ_EndOfInterrupt</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn)</td></tr>
 287 <tr class="memdesc:ga55638c35efdc7a197b51165929ef0c10"><td class="mdescLeft">&#160;</td><td class="mdescRight">Signal end of interrupt processing.  <br /></td></tr>
 288 <tr class="separator:ga55638c35efdc7a197b51165929ef0c10"><td class="memSeparator" colspan="2">&#160;</td></tr>
 289 <tr class="memitem:ga88aedf1dee1061783e6c05c535e7b6c4"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga88aedf1dee1061783e6c05c535e7b6c4">IRQ_SetPending</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn)</td></tr>
 290 <tr class="memdesc:ga88aedf1dee1061783e6c05c535e7b6c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set interrupt pending flag.  <br /></td></tr>
 291 <tr class="separator:ga88aedf1dee1061783e6c05c535e7b6c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 292 <tr class="memitem:gaa399f9169f136b3930f0d50247aa22fc"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#gaa399f9169f136b3930f0d50247aa22fc">IRQ_GetPending</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn)</td></tr>
 293 <tr class="memdesc:gaa399f9169f136b3930f0d50247aa22fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get interrupt pending flag.  <br /></td></tr>
 294 <tr class="separator:gaa399f9169f136b3930f0d50247aa22fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
 295 <tr class="memitem:gaad6b03f73b3d3ea2ccbb122484e8bd36"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#gaad6b03f73b3d3ea2ccbb122484e8bd36">IRQ_ClearPending</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn)</td></tr>
 296 <tr class="memdesc:gaad6b03f73b3d3ea2ccbb122484e8bd36"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear interrupt pending flag.  <br /></td></tr>
 297 <tr class="separator:gaad6b03f73b3d3ea2ccbb122484e8bd36"><td class="memSeparator" colspan="2">&#160;</td></tr>
 298 <tr class="memitem:gaa90aed20ac94420fff4bbbf55c12d4c2"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#gaa90aed20ac94420fff4bbbf55c12d4c2">IRQ_SetPriority</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn, uint32_t priority)</td></tr>
 299 <tr class="memdesc:gaa90aed20ac94420fff4bbbf55c12d4c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set interrupt priority value.  <br /></td></tr>
 300 <tr class="separator:gaa90aed20ac94420fff4bbbf55c12d4c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 301 <tr class="memitem:ga0a6a18c8fa2bc3183598439b56c507c3"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga0a6a18c8fa2bc3183598439b56c507c3">IRQ_GetPriority</a> (<a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a> irqn)</td></tr>
 302 <tr class="memdesc:ga0a6a18c8fa2bc3183598439b56c507c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get interrupt priority.  <br /></td></tr>
 303 <tr class="separator:ga0a6a18c8fa2bc3183598439b56c507c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 304 <tr class="memitem:ga3a79888f72bd1db45f0b9a59dbaa2337"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga3a79888f72bd1db45f0b9a59dbaa2337">IRQ_SetPriorityMask</a> (uint32_t priority)</td></tr>
 305 <tr class="memdesc:ga3a79888f72bd1db45f0b9a59dbaa2337"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set priority masking threshold.  <br /></td></tr>
 306 <tr class="separator:ga3a79888f72bd1db45f0b9a59dbaa2337"><td class="memSeparator" colspan="2">&#160;</td></tr>
 307 <tr class="memitem:ga77632ae73f1ba46c4a9a0c12e6bc4869"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga77632ae73f1ba46c4a9a0c12e6bc4869">IRQ_GetPriorityMask</a> (void)</td></tr>
 308 <tr class="memdesc:ga77632ae73f1ba46c4a9a0c12e6bc4869"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get priority masking threshold.  <br /></td></tr>
 309 <tr class="separator:ga77632ae73f1ba46c4a9a0c12e6bc4869"><td class="memSeparator" colspan="2">&#160;</td></tr>
 310 <tr class="memitem:gabaa4074988ea9e30523f7ed5a86953c2"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#gabaa4074988ea9e30523f7ed5a86953c2">IRQ_SetPriorityGroupBits</a> (uint32_t bits)</td></tr>
 311 <tr class="memdesc:gabaa4074988ea9e30523f7ed5a86953c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set priority grouping field split point.  <br /></td></tr>
 312 <tr class="separator:gabaa4074988ea9e30523f7ed5a86953c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 313 <tr class="memitem:ga061da812739bdba1e32765ed6501b83c"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__ctrl__gr.html#ga061da812739bdba1e32765ed6501b83c">IRQ_GetPriorityGroupBits</a> (void)</td></tr>
 314 <tr class="memdesc:ga061da812739bdba1e32765ed6501b83c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get priority grouping field split point.  <br /></td></tr>
 315 <tr class="separator:ga061da812739bdba1e32765ed6501b83c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 316 </table>
 317 <a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
 318 <div class="textblock"><dl class="section version"><dt>Version</dt><dd>V1.1.0 </dd></dl>
 319 <dl class="section date"><dt>Date</dt><dd>03. March 2020 </dd></dl>
 320 </div><h2 class="groupheader">Macro Definition Documentation</h2>
 321 <a id="ad98f7b2e49c628cc86ee5ad15f5b28a6" name="ad98f7b2e49c628cc86ee5ad15f5b28a6"></a>
 322 <h2 class="memtitle"><span class="permalink"><a href="#ad98f7b2e49c628cc86ee5ad15f5b28a6">&#9670;&#160;</a></span>IRQ_CTRL_H_</h2>
 323
 324 <div class="memitem">
 325 <div class="memproto">
 326       <table class="memname">
 327         <tr>
 328           <td class="memname">#define IRQ_CTRL_H_</td>
 329         </tr>
 330       </table>
 331 </div><div class="memdoc">
 332
 333 </div>
 334 </div>
 335 <a id="a96f739279c27f3e56ede4f28de4a48d8" name="a96f739279c27f3e56ede4f28de4a48d8"></a>
 336 <h2 class="memtitle"><span class="permalink"><a href="#a96f739279c27f3e56ede4f28de4a48d8">&#9670;&#160;</a></span>IRQ_MODE_CPU_Msk</h2>
 337
 338 <div class="memitem">
 339 <div class="memproto">
 340       <table class="memname">
 341         <tr>
 342           <td class="memname">#define IRQ_MODE_CPU_Msk&#160;&#160;&#160;(0xFFUL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
 343         </tr>
 344       </table>
 345 </div><div class="memdoc">
 346
 347 </div>
 348 </div>
 349 <a id="ab7527409c193021e65aaf4d519caea46" name="ab7527409c193021e65aaf4d519caea46"></a>
 350 <h2 class="memtitle"><span class="permalink"><a href="#ab7527409c193021e65aaf4d519caea46">&#9670;&#160;</a></span>IRQ_MODE_CPU_Pos</h2>
 351
 352 <div class="memitem">
 353 <div class="memproto">
 354       <table class="memname">
 355         <tr>
 356           <td class="memname">#define IRQ_MODE_CPU_Pos&#160;&#160;&#160;(5U)</td>
 357         </tr>
 358       </table>
 359 </div><div class="memdoc">
 360
 361 </div>
 362 </div>
 363 <a id="afdc87f9fda2bafac2b0399ebdb39bf3e" name="afdc87f9fda2bafac2b0399ebdb39bf3e"></a>
 364 <h2 class="memtitle"><span class="permalink"><a href="#afdc87f9fda2bafac2b0399ebdb39bf3e">&#9670;&#160;</a></span>IRQ_MODE_DOMAIN_Msk</h2>
 365
 366 <div class="memitem">
 367 <div class="memproto">
 368       <table class="memname">
 369         <tr>
 370           <td class="memname">#define IRQ_MODE_DOMAIN_Msk&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td>
 371         </tr>
 372       </table>
 373 </div><div class="memdoc">
 374
 375 </div>
 376 </div>
 377 <a id="af14ca343d349887ab691d51aab1662ce" name="af14ca343d349887ab691d51aab1662ce"></a>
 378 <h2 class="memtitle"><span class="permalink"><a href="#af14ca343d349887ab691d51aab1662ce">&#9670;&#160;</a></span>IRQ_MODE_DOMAIN_Pos</h2>
 379
 380 <div class="memitem">
 381 <div class="memproto">
 382       <table class="memname">
 383         <tr>
 384           <td class="memname">#define IRQ_MODE_DOMAIN_Pos&#160;&#160;&#160;(4U)</td>
 385         </tr>
 386       </table>
 387 </div><div class="memdoc">
 388
 389 </div>
 390 </div>
 391 <a id="a547d14c0b2299524f2ad4bb47f65059a" name="a547d14c0b2299524f2ad4bb47f65059a"></a>
 392 <h2 class="memtitle"><span class="permalink"><a href="#a547d14c0b2299524f2ad4bb47f65059a">&#9670;&#160;</a></span>IRQ_MODE_MODEL_1N</h2>
 393
 394 <div class="memitem">
 395 <div class="memproto">
 396       <table class="memname">
 397         <tr>
 398           <td class="memname">#define IRQ_MODE_MODEL_1N&#160;&#160;&#160;(0x1UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a8762d04e7c5660e967c4a4de0bd225cf">IRQ_MODE_MODEL_Pos</a>)</td>
 399         </tr>
 400       </table>
 401 </div><div class="memdoc">
 402
 403 </div>
 404 </div>
 405 <a id="a43b2d354adbc6e577504c483b93f68b2" name="a43b2d354adbc6e577504c483b93f68b2"></a>
 406 <h2 class="memtitle"><span class="permalink"><a href="#a43b2d354adbc6e577504c483b93f68b2">&#9670;&#160;</a></span>IRQ_MODE_MODEL_Msk</h2>
 407
 408 <div class="memitem">
 409 <div class="memproto">
 410       <table class="memname">
 411         <tr>
 412           <td class="memname">#define IRQ_MODE_MODEL_Msk&#160;&#160;&#160;(0x1UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a8762d04e7c5660e967c4a4de0bd225cf">IRQ_MODE_MODEL_Pos</a>)</td>
 413         </tr>
 414       </table>
 415 </div><div class="memdoc">
 416
 417 </div>
 418 </div>
 419 <a id="a945e56c21271cae944d993885cd5882d" name="a945e56c21271cae944d993885cd5882d"></a>
 420 <h2 class="memtitle"><span class="permalink"><a href="#a945e56c21271cae944d993885cd5882d">&#9670;&#160;</a></span>IRQ_MODE_MODEL_NN</h2>
 421
 422 <div class="memitem">
 423 <div class="memproto">
 424       <table class="memname">
 425         <tr>
 426           <td class="memname">#define IRQ_MODE_MODEL_NN&#160;&#160;&#160;(0x0UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a8762d04e7c5660e967c4a4de0bd225cf">IRQ_MODE_MODEL_Pos</a>)</td>
 427         </tr>
 428       </table>
 429 </div><div class="memdoc">
 430
 431 </div>
 432 </div>
 433 <a id="a8762d04e7c5660e967c4a4de0bd225cf" name="a8762d04e7c5660e967c4a4de0bd225cf"></a>
 434 <h2 class="memtitle"><span class="permalink"><a href="#a8762d04e7c5660e967c4a4de0bd225cf">&#9670;&#160;</a></span>IRQ_MODE_MODEL_Pos</h2>
 435
 436 <div class="memitem">
 437 <div class="memproto">
 438       <table class="memname">
 439         <tr>
 440           <td class="memname">#define IRQ_MODE_MODEL_Pos&#160;&#160;&#160;(13U)</td>
 441         </tr>
 442       </table>
 443 </div><div class="memdoc">
 444
 445 </div>
 446 </div>
 447 <a id="a2fafbaf2f6da5241ad97af6c493fa218" name="a2fafbaf2f6da5241ad97af6c493fa218"></a>
 448 <h2 class="memtitle"><span class="permalink"><a href="#a2fafbaf2f6da5241ad97af6c493fa218">&#9670;&#160;</a></span>IRQ_MODE_TRIG_Msk</h2>
 449
 450 <div class="memitem">
 451 <div class="memproto">
 452       <table class="memname">
 453         <tr>
 454           <td class="memname">#define IRQ_MODE_TRIG_Msk&#160;&#160;&#160;(0x07UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
 455         </tr>
 456       </table>
 457 </div><div class="memdoc">
 458
 459 </div>
 460 </div>
 461 <a id="ace17913944cf0218141e51beaada4053" name="ace17913944cf0218141e51beaada4053"></a>
 462 <h2 class="memtitle"><span class="permalink"><a href="#ace17913944cf0218141e51beaada4053">&#9670;&#160;</a></span>IRQ_MODE_TRIG_Pos</h2>
 463
 464 <div class="memitem">
 465 <div class="memproto">
 466       <table class="memname">
 467         <tr>
 468           <td class="memname">#define IRQ_MODE_TRIG_Pos&#160;&#160;&#160;(0U)</td>
 469         </tr>
 470       </table>
 471 </div><div class="memdoc">
 472
 473 </div>
 474 </div>
 475 <a id="a7b0581db3736a143cd582cd2457bf3cc" name="a7b0581db3736a143cd582cd2457bf3cc"></a>
 476 <h2 class="memtitle"><span class="permalink"><a href="#a7b0581db3736a143cd582cd2457bf3cc">&#9670;&#160;</a></span>IRQ_MODE_TYPE_Msk</h2>
 477
 478 <div class="memitem">
 479 <div class="memproto">
 480       <table class="memname">
 481         <tr>
 482           <td class="memname">#define IRQ_MODE_TYPE_Msk&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td>
 483         </tr>
 484       </table>
 485 </div><div class="memdoc">
 486
 487 </div>
 488 </div>
 489 <a id="a7560513ef6a445642b5ed76eabf2a1b2" name="a7560513ef6a445642b5ed76eabf2a1b2"></a>
 490 <h2 class="memtitle"><span class="permalink"><a href="#a7560513ef6a445642b5ed76eabf2a1b2">&#9670;&#160;</a></span>IRQ_MODE_TYPE_Pos</h2>
 491
 492 <div class="memitem">
 493 <div class="memproto">
 494       <table class="memname">
 495         <tr>
 496           <td class="memname">#define IRQ_MODE_TYPE_Pos&#160;&#160;&#160;(3U)</td>
 497         </tr>
 498       </table>
 499 </div><div class="memdoc">
 500
 501 </div>
 502 </div>
 503 <a id="aed032df21f11e8715f5c4deeeb56cc36" name="aed032df21f11e8715f5c4deeeb56cc36"></a>
 504 <h2 class="memtitle"><span class="permalink"><a href="#aed032df21f11e8715f5c4deeeb56cc36">&#9670;&#160;</a></span>IRQHANDLER_T</h2>
 505
 506 <div class="memitem">
 507 <div class="memproto">
 508       <table class="memname">
 509         <tr>
 510           <td class="memname">#define IRQHANDLER_T</td>
 511         </tr>
 512       </table>
 513 </div><div class="memdoc">
 514
 515 </div>
 516 </div>
 517 <a id="a258c398eec8109370a1bacac5ce2518b" name="a258c398eec8109370a1bacac5ce2518b"></a>
 518 <h2 class="memtitle"><span class="permalink"><a href="#a258c398eec8109370a1bacac5ce2518b">&#9670;&#160;</a></span>IRQN_ID_T</h2>
 519
 520 <div class="memitem">
 521 <div class="memproto">
 522       <table class="memname">
 523         <tr>
 524           <td class="memname">#define IRQN_ID_T</td>
 525         </tr>
 526       </table>
 527 </div><div class="memdoc">
 528
 529 </div>
 530 </div>
 531 <h2 class="groupheader">Typedef Documentation</h2>
 532 <a id="a27589275c894aa295615df4764404b98" name="a27589275c894aa295615df4764404b98"></a>
 533 <h2 class="memtitle"><span class="permalink"><a href="#a27589275c894aa295615df4764404b98">&#9670;&#160;</a></span>IRQHandler_t</h2>
 534
 535 <div class="memitem">
 536 <div class="memproto">
 537       <table class="memname">
 538         <tr>
 539           <td class="memname">typedef void(* IRQHandler_t) (void)</td>
 540         </tr>
 541       </table>
 542 </div><div class="memdoc">
 543
 544 </div>
 545 </div>
 546 <a id="ac62964c04a7fed2c84aeea9e34f415e2" name="ac62964c04a7fed2c84aeea9e34f415e2"></a>
 547 <h2 class="memtitle"><span class="permalink"><a href="#ac62964c04a7fed2c84aeea9e34f415e2">&#9670;&#160;</a></span>IRQn_ID_t</h2>
 548
 549 <div class="memitem">
 550 <div class="memproto">
 551       <table class="memname">
 552         <tr>
 553           <td class="memname">typedef int32_t <a class="el" href="irq__ctrl_8h.html#ac62964c04a7fed2c84aeea9e34f415e2">IRQn_ID_t</a></td>
 554         </tr>
 555       </table>
 556 </div><div class="memdoc">
 557
 558 </div>
 559 </div>
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