begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.5.2-dev5">
  12       Active development...
  13       CMSIS-Core(A): 1.1.4 (see revision history for details)
  14        - Fixed __FPU_Enable.
  15       CMSIS-Core(M): 5.3.0 (see revision history for details)
  16        - Added provisions for compiler-independent C startup code.
  17       CMSIS-RTOS:
  18         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  19       CMSIS-RTOS2:
  20         - RTX 5.5.1 (see revision history for details)
  21       CMSIS-Driver: 2.7.0
  22         - Updated WiFi Interface API 1.0.0-beta
  23       Devices:
  24        - Generalized C startup code for all Cortex-M familiy devices.
  25        - Updated Core(A) default memory regions and MMU configurations
  26        - Moved Core(A) memory and system config files to avoid include path issues
  27     </release>
  28     <release version="5.5.1" date="2019-03-20">
  29       The following folders are deprecated
  30         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  31
  32       CMSIS-Core(M): 5.2.1 (see revision history for details)
  33         - Fixed compilation issue in cmsis_armclang_ltm.h
  34     </release>
  35     <release version="5.5.0" date="2019-03-18">
  36       The following folders have been removed:
  37         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  38         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  39       The following folders are deprecated
  40         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  41
  42       CMSIS-Core(M): 5.2.0 (see revision history for details)
  43         - Reworked Stack/Heap configuration for ARM startup files.
  44         - Added Cortex-M35P device support.
  45         - Added generic Armv8.1-M Mainline device support.
  46       CMSIS-Core(A): 1.1.3 (see revision history for details)
  47       CMSIS-DSP: 1.6.0 (see revision history for details)
  48         - reworked DSP library source files
  49         - reworked DSP library documentation
  50         - Changed DSP folder structure
  51         - moved DSP libraries to folder ./DSP/Lib
  52         - ARM DSP Libraries are built with ARMCLANG
  53         - Added DSP Libraries Source variant
  54       CMSIS-RTOS2:
  55         - RTX 5.5.0 (see revision history for details)
  56       CMSIS-Driver: 2.7.0
  57         - Added WiFi Interface API 1.0.0-beta
  58         - Added components for project specific driver implementations
  59       CMSIS-Pack: 1.6.0 (see revision history for details)
  60       Devices:
  61         - Added Cortex-M35P and ARMv81MML device templates.
  62         - Fixed C-Startup Code for GCC (aligned with other compilers)
  63       Utilities:
  64         - SVDConv 3.3.25
  65         - PackChk 1.3.82
  66     </release>
  67     <release version="5.4.0" date="2018-08-01">
  68       Aligned pack structure with repository.
  69       The following folders are deprecated:
  70         - CMSIS/Include/
  71         - CMSIS/DSP_Lib/
  72
  73       CMSIS-Core(M): 5.1.2 (see revision history for details)
  74         - Added Cortex-M1 support (beta).
  75       CMSIS-Core(A): 1.1.2 (see revision history for details)
  76       CMSIS-NN: 1.1.0
  77         - Added new math functions.
  78       CMSIS-RTOS2:
  79         - API 2.1.3 (see revision history for details)
  80         - RTX 5.4.0 (see revision history for details)
  81           * Updated exception handling on Cortex-A
  82       CMSIS-Driver:
  83         - Flash Driver API V2.2.0
  84       Utilities:
  85         - SVDConv 3.3.21
  86         - PackChk 1.3.71
  87     </release>
  88     <release version="5.3.0" date="2018-02-22">
  89       Updated Arm company brand.
  90       CMSIS-Core(M): 5.1.1 (see revision history for details)
  91       CMSIS-Core(A): 1.1.1 (see revision history for details)
  92       CMSIS-DAP: 2.0.0 (see revision history for details)
  93       CMSIS-NN: 1.0.0
  94         - Initial contribution of the bare metal Neural Network Library.
  95       CMSIS-RTOS2:
  96         - RTX 5.3.0 (see revision history for details)
  97         - OS Tick API 1.0.1
  98     </release>
  99     <release version="5.2.0" date="2017-11-16">
 100       CMSIS-Core(M): 5.1.0 (see revision history for details)
 101         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 102         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 103       CMSIS-Core(A): 1.1.0 (see revision history for details)
 104         - Added compiler_iccarm.h.
 105         - Added additional access functions for physical timer.
 106       CMSIS-DAP: 1.2.0 (see revision history for details)
 107       CMSIS-DSP: 1.5.2 (see revision history for details)
 108       CMSIS-Driver: 2.6.0 (see revision history for details)
 109         - CAN Driver API V1.2.0
 110         - NAND Driver API V2.3.0
 111       CMSIS-RTOS:
 112         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 113       CMSIS-RTOS2:
 114         - API 2.1.2 (see revision history for details)
 115         - RTX 5.2.3 (see revision history for details)
 116       Devices:
 117         - Added GCC startup and linker script for Cortex-A9.
 118         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 119         - Added IAR startup code for Cortex-A9
 120     </release>
 121     <release version="5.1.1" date="2017-09-19">
 122       CMSIS-RTOS2:
 123       - RTX 5.2.1 (see revision history for details)
 124     </release>
 125     <release version="5.1.0" date="2017-08-04">
 126       CMSIS-Core(M): 5.0.2 (see revision history for details)
 127       - Changed Version Control macros to be core agnostic.
 128       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 129       CMSIS-Core(A): 1.0.0 (see revision history for details)
 130       - Initial release
 131       - IRQ Controller API 1.0.0
 132       CMSIS-Driver: 2.05 (see revision history for details)
 133       - All typedefs related to status have been made volatile.
 134       CMSIS-RTOS2:
 135       - API 2.1.1 (see revision history for details)
 136       - RTX 5.2.0 (see revision history for details)
 137       - OS Tick API 1.0.0
 138       CMSIS-DSP: 1.5.2 (see revision history for details)
 139       - Fixed GNU Compiler specific diagnostics.
 140       CMSIS-Pack: 1.5.0 (see revision history for details)
 141       - added System Description File (*.SDF) Format
 142       CMSIS-Zone: 0.0.1 (Preview)
 143       - Initial specification draft
 144     </release>
 145     <release version="5.0.1" date="2017-02-03">
 146       Package Description:
 147       - added taxonomy for Cclass RTOS
 148       CMSIS-RTOS2:
 149       - API 2.1   (see revision history for details)
 150       - RTX 5.1.0 (see revision history for details)
 151       CMSIS-Core: 5.0.1 (see revision history for details)
 152       - Added __PACKED_STRUCT macro
 153       - Added uVisior support
 154       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 155       - Updated template for secure main function (main_s.c)
 156       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 157       CMSIS-DSP: 1.5.1 (see revision history for details)
 158       - added ARMv8M DSP libraries.
 159       CMSIS-Pack:1.4.9 (see revision history for details)
 160       - added Pack Index File specification and schema file
 161     </release>
 162     <release version="5.0.0" date="2016-11-11">
 163       Changed open source license to Apache 2.0
 164       CMSIS_Core:
 165        - Added support for Cortex-M23 and Cortex-M33.
 166        - Added ARMv8-M device configurations for mainline and baseline.
 167        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 168        - Added cmsis_compiler.h to unify compiler behaviour.
 169        - Updated function SCB_EnableICache (for Cortex-M7).
 170        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 171       CMSIS-RTOS:
 172         - bug fix in RTX 4.82 (see revision history for details)
 173       CMSIS-RTOS2:
 174         - new API including compatibility layer to CMSIS-RTOS
 175         - reference implementation based on RTX5
 176         - supports all Cortex-M variants including TrustZone for ARMv8-M
 177       CMSIS-SVD:
 178        - reworked SVD format documentation
 179        - removed SVD file database documentation as SVD files are distributed in packs
 180        - updated SVDConv for Win32 and Linux
 181       CMSIS-DSP:
 182        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 183        - Added DSP libraries build projects to CMSIS pack.
 184     </release>
 185     <release version="4.5.0" date="2015-10-28">
 186       - CMSIS-Core     4.30.0  (see revision history for details)
 187       - CMSIS-DAP      1.1.0   (unchanged)
 188       - CMSIS-Driver   2.04.0  (see revision history for details)
 189       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 190       - CMSIS-Pack     1.4.1   (see revision history for details)
 191       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 192       - CMSIS-SVD      1.3.1   (see revision history for details)
 193     </release>
 194     <release version="4.4.0" date="2015-09-11">
 195       - CMSIS-Core     4.20   (see revision history for details)
 196       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 197       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 198       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 199       - CMSIS-RTOS
 200         -- API         1.02   (unchanged)
 201         -- RTX         4.79   (see revision history for details)
 202       - CMSIS-SVD      1.3.0  (see revision history for details)
 203       - CMSIS-DAP      1.1.0  (extended with SWO support)
 204     </release>
 205     <release version="4.3.0" date="2015-03-20">
 206       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 207       - CMSIS-DSP      1.4.5  (see revision history for details)
 208       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 209       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 210       - CMSIS-RTOS
 211         -- API         1.02   (unchanged)
 212         -- RTX         4.78   (see revision history for details)
 213       - CMSIS-SVD      1.2    (unchanged)
 214     </release>
 215     <release version="4.2.0" date="2014-09-24">
 216       Adding Cortex-M7 support
 217       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 218       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 219       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 220       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 221       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 222     </release>
 223     <release version="4.1.1" date="2014-06-30">
 224       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 225     </release>
 226     <release version="4.1.0" date="2014-06-12">
 227       - CMSIS-Driver   2.02  (incompatible update)
 228       - CMSIS-Pack     1.3   (see revision history for details)
 229       - CMSIS-DSP      1.4.2 (unchanged)
 230       - CMSIS-Core     3.30  (unchanged)
 231       - CMSIS-RTOS RTX 4.74  (unchanged)
 232       - CMSIS-RTOS API 1.02  (unchanged)
 233       - CMSIS-SVD      1.10  (unchanged)
 234       PACK:
 235       - removed G++ specific files from PACK
 236       - added Component Startup variant "C Startup"
 237       - added Pack Checking Utility
 238       - updated conditions to reflect tool-chain dependency
 239       - added Taxonomy for Graphics
 240       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 241     </release>
 242     <release version="4.0.0">
 243       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 244       - CMSIS-Pack     1.1   Preliminary
 245       - CMSIS-DSP      1.4.2 (see revision history for details)
 246       - CMSIS-Core     3.30  (see revision history for details)
 247       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 248       - CMSIS-RTOS API 1.02  (unchanged)
 249       - CMSIS-SVD      1.10  (unchanged)
 250     </release>
 251     <release version="3.20.4">
 252       - CMSIS-RTOS 4.74 (see revision history for details)
 253       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 254     </release>
 255     <release version="3.20.3">
 256       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 257       - CMSIS-RTOS 4.73 (see revision history for details)
 258     </release>
 259     <release version="3.20.2">
 260       - CMSIS-Pack documentation has been added
 261       - CMSIS-Drivers header and documentation have been added to PACK
 262       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 263     </release>
 264     <release version="3.20.1">
 265       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 266       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 267     </release>
 268     <release version="3.20.0">
 269       The software portions that are deployed in the application program are now under a BSD license which allows usage
 270       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 271       The individual components have been update as listed below:
 272       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 273       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 274       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 275       - CMSIS-SVD is unchanged.
 276     </release>
 277   </releases>
 278
 279   <taxonomy>
 280     <description Cclass="Audio">Software components for audio processing</description>
 281     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 282     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 283     <description Cclass="Compiler">Compiler Software Extensions</description>
 284     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 285     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 286     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 287     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 288     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 289     <description Cclass="File System">File Drive Support and File System</description>
 290     <description Cclass="IoT Client">IoT cloud client connector</description>
 291     <description Cclass="IoT Utility">IoT specific software utility</description>
 292     <description Cclass="Graphics">Graphical User Interface</description>
 293     <description Cclass="Network">Network Stack using Internet Protocols</description>
 294     <description Cclass="RTOS">Real-time Operating System</description>
 295     <description Cclass="Security">Encryption for secure communication or storage</description>
 296     <description Cclass="USB">Universal Serial Bus Stack</description>
 297     <description Cclass="Utility">Generic software utility components</description>
 298   </taxonomy>
 299
 300   <devices>
 301     <!-- ******************************  Cortex-M0  ****************************** -->
 302     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 303       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 304       <description>
 305 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 306 - simple, easy-to-use programmers model
 307 - highly efficient ultra-low power operation
 308 - excellent code density
 309 - deterministic, high-performance interrupt handling
 310 - upward compatibility with the rest of the Cortex-M processor family.
 311       </description>
 312       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 313       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 314       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 315       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 316
 317       <device Dname="ARMCM0">
 318         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 319         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 320       </device>
 321     </family>
 322
 323     <!-- ******************************  Cortex-M0P  ****************************** -->
 324     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 325       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 326       <description>
 327 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 328 - simple, easy-to-use programmers model
 329 - highly efficient ultra-low power operation
 330 - excellent code density
 331 - deterministic, high-performance interrupt handling
 332 - upward compatibility with the rest of the Cortex-M processor family.
 333       </description>
 334       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 335       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 336       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 337       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 338
 339       <device Dname="ARMCM0P">
 340         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 341         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 342       </device>
 343
 344       <device Dname="ARMCM0P_MPU">
 345         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 346         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 347       </device>
 348     </family>
 349
 350     <!-- ******************************  Cortex-M1  ****************************** -->
 351     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 352       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 353       <description>
 354 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 355 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 356       </description>
 357       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 358       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 359       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 360       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 361
 362       <device Dname="ARMCM1">
 363         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 364         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 365       </device>
 366     </family>
 367
 368     <!-- ******************************  Cortex-M3  ****************************** -->
 369     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 370       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 371       <description>
 372 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 373 - simple, easy-to-use programmers model
 374 - highly efficient ultra-low power operation
 375 - excellent code density
 376 - deterministic, high-performance interrupt handling
 377 - upward compatibility with the rest of the Cortex-M processor family.
 378       </description>
 379       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 380       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 381       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 382       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 383
 384       <device Dname="ARMCM3">
 385         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 386         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 387       </device>
 388     </family>
 389
 390     <!-- ******************************  Cortex-M4  ****************************** -->
 391     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 392       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 393       <description>
 394 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 395 - simple, easy-to-use programmers model
 396 - highly efficient ultra-low power operation
 397 - excellent code density
 398 - deterministic, high-performance interrupt handling
 399 - upward compatibility with the rest of the Cortex-M processor family.
 400       </description>
 401       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 402       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 403       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 404       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 405
 406       <device Dname="ARMCM4">
 407         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 408         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 409       </device>
 410
 411       <device Dname="ARMCM4_FP">
 412         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 413         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 414       </device>
 415     </family>
 416
 417     <!-- ******************************  Cortex-M7  ****************************** -->
 418     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 419       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 420       <description>
 421 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 422 - simple, easy-to-use programmers model
 423 - highly efficient ultra-low power operation
 424 - excellent code density
 425 - deterministic, high-performance interrupt handling
 426 - upward compatibility with the rest of the Cortex-M processor family.
 427       </description>
 428       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 429       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 430       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 431       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 432
 433       <device Dname="ARMCM7">
 434         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 435         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 436       </device>
 437
 438       <device Dname="ARMCM7_SP">
 439         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 440         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 441       </device>
 442
 443       <device Dname="ARMCM7_DP">
 444         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 445         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 446       </device>
 447     </family>
 448
 449     <!-- ******************************  Cortex-M23  ********************** -->
 450     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 451       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 452       <description>
 453 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 454 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 455 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 456       </description>
 457       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 458       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 459       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 460       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 461       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 462       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 463
 464       <device Dname="ARMCM23">
 465         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 466         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 467       </device>
 468
 469       <device Dname="ARMCM23_TZ">
 470         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 471         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 472       </device>
 473     </family>
 474
 475     <!-- ******************************  Cortex-M33  ****************************** -->
 476     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 477       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 478       <description>
 479 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 480 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 481       </description>
 482       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 483       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 484       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 485       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 486       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 487       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 488
 489       <device Dname="ARMCM33">
 490         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 491         <description>
 492           no DSP Instructions, no Floating Point Unit, no TrustZone
 493         </description>
 494         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 495       </device>
 496
 497       <device Dname="ARMCM33_TZ">
 498         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 499         <description>
 500           no DSP Instructions, no Floating Point Unit, TrustZone
 501         </description>
 502         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 503       </device>
 504
 505       <device Dname="ARMCM33_DSP_FP">
 506         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 507         <description>
 508           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 509         </description>
 510         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 511       </device>
 512
 513       <device Dname="ARMCM33_DSP_FP_TZ">
 514         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 515         <description>
 516           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 517         </description>
 518         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 519       </device>
 520     </family>
 521
 522     <!-- ******************************  Cortex-M35P  ****************************** -->
 523     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 524       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 525       <description>
 526 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 527 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 528       </description>
 529
 530       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 531       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 532       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 533       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 534       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 535       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 536
 537       <device Dname="ARMCM35P">
 538         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 539         <description>
 540           no DSP Instructions, no Floating Point Unit, no TrustZone
 541         </description>
 542         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 543       </device>
 544
 545       <device Dname="ARMCM35P_TZ">
 546         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 547         <description>
 548           no DSP Instructions, no Floating Point Unit, TrustZone
 549         </description>
 550         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 551       </device>
 552
 553       <device Dname="ARMCM35P_DSP_FP">
 554         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 555         <description>
 556           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 557         </description>
 558         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 559       </device>
 560
 561       <device Dname="ARMCM35P_DSP_FP_TZ">
 562         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 563         <description>
 564           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 565         </description>
 566         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 567       </device>
 568     </family>
 569
 570     <!-- ******************************  ARMSC000  ****************************** -->
 571     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 572       <description>
 573 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 574 - simple, easy-to-use programmers model
 575 - highly efficient ultra-low power operation
 576 - excellent code density
 577 - deterministic, high-performance interrupt handling
 578       </description>
 579       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 580       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 581       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 582       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 583
 584       <device Dname="ARMSC000">
 585         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 586         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 587       </device>
 588     </family>
 589
 590     <!-- ******************************  ARMSC300  ****************************** -->
 591     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 592       <description>
 593 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 594 - simple, easy-to-use programmers model
 595 - highly efficient ultra-low power operation
 596 - excellent code density
 597 - deterministic, high-performance interrupt handling
 598       </description>
 599       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 600       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 601       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 602       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 603
 604       <device Dname="ARMSC300">
 605         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 606         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 607       </device>
 608     </family>
 609
 610     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 611     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 612       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 613       <description>
 614 Armv8-M Baseline based device with TrustZone
 615       </description>
 616       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 617       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 618       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 619       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 620       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 621       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 622
 623       <device Dname="ARMv8MBL">
 624         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 625         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 626       </device>
 627     </family>
 628
 629     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 630     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 631       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 632       <description>
 633 Armv8-M Mainline based device with TrustZone
 634       </description>
 635       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 636       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 637       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 638       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 639       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 640       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 641
 642       <device Dname="ARMv8MML">
 643         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 644         <description>
 645           no DSP Instructions, no Floating Point Unit, TrustZone
 646         </description>
 647         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 648       </device>
 649
 650       <device Dname="ARMv8MML_DSP">
 651         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 652         <description>
 653           DSP Instructions, no Floating Point Unit, TrustZone
 654         </description>
 655         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 656       </device>
 657
 658       <device Dname="ARMv8MML_SP">
 659         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 660         <description>
 661           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 662         </description>
 663         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 664       </device>
 665
 666       <device Dname="ARMv8MML_DSP_SP">
 667         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 668         <description>
 669           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 670         </description>
 671         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 672       </device>
 673
 674       <device Dname="ARMv8MML_DP">
 675         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 676         <description>
 677           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 678         </description>
 679         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 680       </device>
 681
 682       <device Dname="ARMv8MML_DSP_DP">
 683         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 684         <description>
 685           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 686         </description>
 687         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 688       </device>
 689     </family>
 690
 691     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 692     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 693       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 694       <description>
 695 Armv8.1-M Mainline based device with TrustZone and MVE
 696       </description>
 697       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 698       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 699       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 700       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 701       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 702       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 703
 704
 705       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 706         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 707         <description>
 708           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 709         </description>
 710         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 711       </device>
 712     </family>
 713
 714     <!-- ******************************  Cortex-A5  ****************************** -->
 715     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 716       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 717       <description>
 718 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 719 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 720 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 721       </description>
 722
 723       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 724       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 725       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 726       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 727
 728       <device Dname="ARMCA5">
 729         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 730         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 731       </device>
 732     </family>
 733
 734     <!-- ******************************  Cortex-A7  ****************************** -->
 735     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 736       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 737       <description>
 738 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 739 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 740 an optional integrated GIC, and an optional L2 cache controller.
 741       </description>
 742
 743       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 744       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 745       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 746       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 747
 748       <device Dname="ARMCA7">
 749         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 750         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 751       </device>
 752     </family>
 753
 754     <!-- ******************************  Cortex-A9  ****************************** -->
 755     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 756       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 757       <description>
 758 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 759 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 760 and 8-bit Java bytecodes in Jazelle state.
 761       </description>
 762
 763       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 764       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 765       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 766       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 767
 768       <device Dname="ARMCA9">
 769         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 770         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 771       </device>
 772     </family>
 773   </devices>
 774
 775
 776   <apis>
 777     <!-- CMSIS Device API -->
 778     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 779       <description>Device interrupt controller interface</description>
 780       <files>
 781         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 782       </files>
 783     </api>
 784     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 785       <description>RTOS Kernel system tick timer interface</description>
 786       <files>
 787         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 788       </files>
 789     </api>
 790     <!-- CMSIS-RTOS API -->
 791     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 792       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 793       <files>
 794         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 795       </files>
 796     </api>
 797     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 798       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 799       <files>
 800         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 801         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 802       </files>
 803     </api>
 804     <!-- CMSIS Driver API -->
 805     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 806       <description>USART Driver API for Cortex-M</description>
 807       <files>
 808         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 809         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 810       </files>
 811     </api>
 812     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 813       <description>SPI Driver API for Cortex-M</description>
 814       <files>
 815         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 816         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 817       </files>
 818     </api>
 819     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 820       <description>SAI Driver API for Cortex-M</description>
 821       <files>
 822         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 823         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 824       </files>
 825     </api>
 826     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 827       <description>I2C Driver API for Cortex-M</description>
 828       <files>
 829         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 830         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 831       </files>
 832     </api>
 833     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 834       <description>CAN Driver API for Cortex-M</description>
 835       <files>
 836         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 837         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 838       </files>
 839     </api>
 840     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 841       <description>Flash Driver API for Cortex-M</description>
 842       <files>
 843         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 844         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 845       </files>
 846     </api>
 847     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 848       <description>MCI Driver API for Cortex-M</description>
 849       <files>
 850         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 851         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 852       </files>
 853     </api>
 854     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 855       <description>NAND Flash Driver API for Cortex-M</description>
 856       <files>
 857         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 858         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 859       </files>
 860     </api>
 861     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 862       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 863       <files>
 864         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 865         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 866         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 867       </files>
 868     </api>
 869     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 870       <description>Ethernet MAC Driver API for Cortex-M</description>
 871       <files>
 872         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 873         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 874       </files>
 875     </api>
 876     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 877       <description>Ethernet PHY Driver API for Cortex-M</description>
 878       <files>
 879         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 880         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 881       </files>
 882     </api>
 883     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 884       <description>USB Device Driver API for Cortex-M</description>
 885       <files>
 886         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 887         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 888       </files>
 889     </api>
 890     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 891       <description>USB Host Driver API for Cortex-M</description>
 892       <files>
 893         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 894         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 895       </files>
 896     </api>
 897     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0-beta" exclusive="0">
 898       <description>WiFi driver</description>
 899       <files>
 900         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 901         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 902       </files>
 903     </api>
 904   </apis>
 905
 906   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 907   <conditions>
 908     <!-- compiler -->
 909     <condition id="ARMCC6">
 910       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 911       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 912     </condition>
 913     <condition id="ARMCC5">
 914       <require Tcompiler="ARMCC" Toptions="AC5"/>
 915     </condition>
 916     <condition id="ARMCC">
 917       <require Tcompiler="ARMCC"/>
 918     </condition>
 919     <condition id="GCC">
 920       <require Tcompiler="GCC"/>
 921     </condition>
 922     <condition id="IAR">
 923       <require Tcompiler="IAR"/>
 924     </condition>
 925     <condition id="ARMCC GCC">
 926       <accept Tcompiler="ARMCC"/>
 927       <accept Tcompiler="GCC"/>
 928     </condition>
 929     <condition id="ARMCC GCC IAR">
 930       <accept Tcompiler="ARMCC"/>
 931       <accept Tcompiler="GCC"/>
 932       <accept Tcompiler="IAR"/>
 933     </condition>
 934
 935     <!-- Arm architecture -->
 936     <condition id="ARMv6-M Device">
 937       <description>Armv6-M architecture based device</description>
 938       <accept Dcore="Cortex-M0"/>
 939       <accept Dcore="Cortex-M1"/>
 940       <accept Dcore="Cortex-M0+"/>
 941       <accept Dcore="SC000"/>
 942     </condition>
 943     <condition id="ARMv7-M Device">
 944       <description>Armv7-M architecture based device</description>
 945       <accept Dcore="Cortex-M3"/>
 946       <accept Dcore="Cortex-M4"/>
 947       <accept Dcore="Cortex-M7"/>
 948       <accept Dcore="SC300"/>
 949     </condition>
 950     <condition id="ARMv8-M Device">
 951       <description>Armv8-M architecture based device</description>
 952       <accept Dcore="ARMV8MBL"/>
 953       <accept Dcore="ARMV8MML"/>
 954       <accept Dcore="ARMV81MML"/>
 955       <accept Dcore="Cortex-M23"/>
 956       <accept Dcore="Cortex-M33"/>
 957       <accept Dcore="Cortex-M35P"/>
 958     </condition>
 959     <condition id="ARMv8-M TZ Device">
 960       <description>Armv8-M architecture based device with TrustZone</description>
 961       <require condition="ARMv8-M Device"/>
 962       <require Dtz="TZ"/>
 963     </condition>
 964     <condition id="ARMv6_7-M Device">
 965       <description>Armv6_7-M architecture based device</description>
 966       <accept condition="ARMv6-M Device"/>
 967       <accept condition="ARMv7-M Device"/>
 968     </condition>
 969     <condition id="ARMv6_7_8-M Device">
 970       <description>Armv6_7_8-M architecture based device</description>
 971       <accept condition="ARMv6-M Device"/>
 972       <accept condition="ARMv7-M Device"/>
 973       <accept condition="ARMv8-M Device"/>
 974     </condition>
 975     <condition id="ARMv7-A Device">
 976       <description>Armv7-A architecture based device</description>
 977       <accept Dcore="Cortex-A5"/>
 978       <accept Dcore="Cortex-A7"/>
 979       <accept Dcore="Cortex-A9"/>
 980     </condition>
 981
 982     <!-- ARM core -->
 983     <condition id="CM0">
 984       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 985       <accept Dcore="Cortex-M0"/>
 986       <accept Dcore="Cortex-M0+"/>
 987       <accept Dcore="SC000"/>
 988     </condition>
 989     <condition id="CM1">
 990       <description>Cortex-M1</description>
 991       <require Dcore="Cortex-M1"/>
 992     </condition>
 993     <condition id="CM3">
 994       <description>Cortex-M3 or SC300 processor based device</description>
 995       <accept Dcore="Cortex-M3"/>
 996       <accept Dcore="SC300"/>
 997     </condition>
 998     <condition id="CM4">
 999       <description>Cortex-M4 processor based device</description>
1000       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1001     </condition>
1002     <condition id="CM4_FP">
1003       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1004       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1005       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1006       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1007     </condition>
1008     <condition id="CM7">
1009       <description>Cortex-M7 processor based device</description>
1010       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1011     </condition>
1012     <condition id="CM7_FP">
1013       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1014       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1015       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1016     </condition>
1017     <condition id="CM7_SP">
1018       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1019       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1020     </condition>
1021     <condition id="CM7_DP">
1022       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1023       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1024     </condition>
1025     <condition id="CM23">
1026       <description>Cortex-M23 processor based device</description>
1027       <require Dcore="Cortex-M23"/>
1028     </condition>
1029     <condition id="CM33">
1030       <description>Cortex-M33 processor based device</description>
1031       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1032     </condition>
1033     <condition id="CM33_FP">
1034       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1035       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1036     </condition>
1037     <condition id="CM35P">
1038       <description>Cortex-M35P processor based device</description>
1039       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1040     </condition>
1041     <condition id="CM35P_FP">
1042       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1043       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1044     </condition>
1045     <condition id="ARMv8MBL">
1046       <description>Armv8-M Baseline processor based device</description>
1047       <require Dcore="ARMV8MBL"/>
1048     </condition>
1049     <condition id="ARMv8MML">
1050       <description>Armv8-M Mainline processor based device</description>
1051       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1052     </condition>
1053     <condition id="ARMv8MML_FP">
1054       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1055       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1056       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1057     </condition>
1058
1059     <condition id="CM33_NODSP_NOFPU">
1060       <description>CM33, no DSP, no FPU</description>
1061       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1062     </condition>
1063     <condition id="CM33_DSP_NOFPU">
1064       <description>CM33, DSP, no FPU</description>
1065       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1066     </condition>
1067     <condition id="CM33_NODSP_SP">
1068       <description>CM33, no DSP, SP FPU</description>
1069       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1070     </condition>
1071     <condition id="CM33_DSP_SP">
1072       <description>CM33, DSP, SP FPU</description>
1073       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1074     </condition>
1075
1076     <condition id="CM35P_NODSP_NOFPU">
1077       <description>CM35P, no DSP, no FPU</description>
1078       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1079     </condition>
1080     <condition id="CM35P_DSP_NOFPU">
1081       <description>CM35P, DSP, no FPU</description>
1082       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1083     </condition>
1084     <condition id="CM35P_NODSP_SP">
1085       <description>CM35P, no DSP, SP FPU</description>
1086       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1087     </condition>
1088     <condition id="CM35P_DSP_SP">
1089       <description>CM35P, DSP, SP FPU</description>
1090       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1091     </condition>
1092
1093     <condition id="ARMv8MML_NODSP_NOFPU">
1094       <description>Armv8-M Mainline, no DSP, no FPU</description>
1095       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1096     </condition>
1097     <condition id="ARMv8MML_DSP_NOFPU">
1098       <description>Armv8-M Mainline, DSP, no FPU</description>
1099       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1100     </condition>
1101     <condition id="ARMv8MML_NODSP_SP">
1102       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1103       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1104     </condition>
1105     <condition id="ARMv8MML_DSP_SP">
1106       <description>Armv8-M Mainline, DSP, SP FPU</description>
1107       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1108     </condition>
1109
1110     <condition id="ARMv81MML">
1111       <description>Armv8.1-M Mainline</description>
1112       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1113     </condition>
1114
1115     <condition id="CA5_CA9">
1116       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1117       <accept Dcore="Cortex-A5"/>
1118       <accept Dcore="Cortex-A9"/>
1119     </condition>
1120
1121     <condition id="CA7">
1122       <description>Cortex-A7 processor based device</description>
1123       <accept Dcore="Cortex-A7"/>
1124     </condition>
1125
1126     <!-- ARMCC compiler -->
1127     <condition id="CA_ARMCC5">
1128       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1129       <require condition="ARMv7-A Device"/>
1130       <require condition="ARMCC5"/>
1131     </condition>
1132     <condition id="CA_ARMCC6">
1133       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1134       <require condition="ARMv7-A Device"/>
1135       <require condition="ARMCC6"/>
1136     </condition>
1137
1138     <condition id="CM0_ARMCC">
1139       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1140       <require condition="CM0"/>
1141       <require Tcompiler="ARMCC"/>
1142     </condition>
1143     <condition id="CM0_LE_ARMCC">
1144       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1145       <require condition="CM0_ARMCC"/>
1146       <require Dendian="Little-endian"/>
1147     </condition>
1148     <condition id="CM0_BE_ARMCC">
1149       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1150       <require condition="CM0_ARMCC"/>
1151       <require Dendian="Big-endian"/>
1152     </condition>
1153
1154     <condition id="CM1_ARMCC">
1155       <description>Cortex-M1 based device for the Arm Compiler</description>
1156       <require condition="CM1"/>
1157       <require Tcompiler="ARMCC"/>
1158     </condition>
1159     <condition id="CM1_LE_ARMCC">
1160       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1161       <require condition="CM1_ARMCC"/>
1162       <require Dendian="Little-endian"/>
1163     </condition>
1164     <condition id="CM1_BE_ARMCC">
1165       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1166       <require condition="CM1_ARMCC"/>
1167       <require Dendian="Big-endian"/>
1168     </condition>
1169
1170     <condition id="CM3_ARMCC">
1171       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1172       <require condition="CM3"/>
1173       <require Tcompiler="ARMCC"/>
1174     </condition>
1175     <condition id="CM3_LE_ARMCC">
1176       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1177       <require condition="CM3_ARMCC"/>
1178       <require Dendian="Little-endian"/>
1179     </condition>
1180     <condition id="CM3_BE_ARMCC">
1181       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1182       <require condition="CM3_ARMCC"/>
1183       <require Dendian="Big-endian"/>
1184     </condition>
1185
1186     <condition id="CM4_ARMCC">
1187       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1188       <require condition="CM4"/>
1189       <require Tcompiler="ARMCC"/>
1190     </condition>
1191     <condition id="CM4_LE_ARMCC">
1192       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1193       <require condition="CM4_ARMCC"/>
1194       <require Dendian="Little-endian"/>
1195     </condition>
1196     <condition id="CM4_BE_ARMCC">
1197       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1198       <require condition="CM4_ARMCC"/>
1199       <require Dendian="Big-endian"/>
1200     </condition>
1201
1202     <condition id="CM4_FP_ARMCC">
1203       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1204       <require condition="CM4_FP"/>
1205       <require Tcompiler="ARMCC"/>
1206     </condition>
1207     <condition id="CM4_FP_LE_ARMCC">
1208       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1209       <require condition="CM4_FP_ARMCC"/>
1210       <require Dendian="Little-endian"/>
1211     </condition>
1212     <condition id="CM4_FP_BE_ARMCC">
1213       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1214       <require condition="CM4_FP_ARMCC"/>
1215       <require Dendian="Big-endian"/>
1216     </condition>
1217
1218     <condition id="CM7_ARMCC">
1219       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1220       <require condition="CM7"/>
1221       <require Tcompiler="ARMCC"/>
1222     </condition>
1223     <condition id="CM7_LE_ARMCC">
1224       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1225       <require condition="CM7_ARMCC"/>
1226       <require Dendian="Little-endian"/>
1227     </condition>
1228     <condition id="CM7_BE_ARMCC">
1229       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1230       <require condition="CM7_ARMCC"/>
1231       <require Dendian="Big-endian"/>
1232     </condition>
1233
1234     <condition id="CM7_FP_ARMCC">
1235       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1236       <require condition="CM7_FP"/>
1237       <require Tcompiler="ARMCC"/>
1238     </condition>
1239     <condition id="CM7_FP_LE_ARMCC">
1240       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1241       <require condition="CM7_FP_ARMCC"/>
1242       <require Dendian="Little-endian"/>
1243     </condition>
1244     <condition id="CM7_FP_BE_ARMCC">
1245       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1246       <require condition="CM7_FP_ARMCC"/>
1247       <require Dendian="Big-endian"/>
1248     </condition>
1249
1250     <condition id="CM7_SP_ARMCC">
1251       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1252       <require condition="CM7_SP"/>
1253       <require Tcompiler="ARMCC"/>
1254     </condition>
1255     <condition id="CM7_SP_LE_ARMCC">
1256       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1257       <require condition="CM7_SP_ARMCC"/>
1258       <require Dendian="Little-endian"/>
1259     </condition>
1260     <condition id="CM7_SP_BE_ARMCC">
1261       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1262       <require condition="CM7_SP_ARMCC"/>
1263       <require Dendian="Big-endian"/>
1264     </condition>
1265
1266     <condition id="CM7_DP_ARMCC">
1267       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1268       <require condition="CM7_DP"/>
1269       <require Tcompiler="ARMCC"/>
1270     </condition>
1271     <condition id="CM7_DP_LE_ARMCC">
1272       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1273       <require condition="CM7_DP_ARMCC"/>
1274       <require Dendian="Little-endian"/>
1275     </condition>
1276     <condition id="CM7_DP_BE_ARMCC">
1277       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1278       <require condition="CM7_DP_ARMCC"/>
1279       <require Dendian="Big-endian"/>
1280     </condition>
1281
1282     <condition id="CM23_ARMCC">
1283       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1284       <require condition="CM23"/>
1285       <require Tcompiler="ARMCC"/>
1286     </condition>
1287     <condition id="CM23_LE_ARMCC">
1288       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1289       <require condition="CM23_ARMCC"/>
1290       <require Dendian="Little-endian"/>
1291     </condition>
1292     <condition id="CM23_BE_ARMCC">
1293       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1294       <require condition="CM23_ARMCC"/>
1295       <require Dendian="Big-endian"/>
1296     </condition>
1297
1298     <condition id="CM33_ARMCC">
1299       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1300       <require condition="CM33"/>
1301       <require Tcompiler="ARMCC"/>
1302     </condition>
1303     <condition id="CM33_LE_ARMCC">
1304       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1305       <require condition="CM33_ARMCC"/>
1306       <require Dendian="Little-endian"/>
1307     </condition>
1308     <condition id="CM33_BE_ARMCC">
1309       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1310       <require condition="CM33_ARMCC"/>
1311       <require Dendian="Big-endian"/>
1312     </condition>
1313
1314     <condition id="CM33_FP_ARMCC">
1315       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1316       <require condition="CM33_FP"/>
1317       <require Tcompiler="ARMCC"/>
1318     </condition>
1319     <condition id="CM33_FP_LE_ARMCC">
1320       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1321       <require condition="CM33_FP_ARMCC"/>
1322       <require Dendian="Little-endian"/>
1323     </condition>
1324     <condition id="CM33_FP_BE_ARMCC">
1325       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1326       <require condition="CM33_FP_ARMCC"/>
1327       <require Dendian="Big-endian"/>
1328     </condition>
1329
1330     <condition id="CM33_NODSP_NOFPU_ARMCC">
1331       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1332       <require condition="CM33_NODSP_NOFPU"/>
1333       <require Tcompiler="ARMCC"/>
1334     </condition>
1335     <condition id="CM33_DSP_NOFPU_ARMCC">
1336       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1337       <require condition="CM33_DSP_NOFPU"/>
1338       <require Tcompiler="ARMCC"/>
1339     </condition>
1340     <condition id="CM33_NODSP_SP_ARMCC">
1341       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1342       <require condition="CM33_NODSP_SP"/>
1343       <require Tcompiler="ARMCC"/>
1344     </condition>
1345     <condition id="CM33_DSP_SP_ARMCC">
1346       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1347       <require condition="CM33_DSP_SP"/>
1348       <require Tcompiler="ARMCC"/>
1349     </condition>
1350     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1351       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1352       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1353       <require Dendian="Little-endian"/>
1354     </condition>
1355     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1356       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1357       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1358       <require Dendian="Little-endian"/>
1359     </condition>
1360     <condition id="CM33_NODSP_SP_LE_ARMCC">
1361       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1362       <require condition="CM33_NODSP_SP_ARMCC"/>
1363       <require Dendian="Little-endian"/>
1364     </condition>
1365     <condition id="CM33_DSP_SP_LE_ARMCC">
1366       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1367       <require condition="CM33_DSP_SP_ARMCC"/>
1368       <require Dendian="Little-endian"/>
1369     </condition>
1370
1371     <condition id="CM35P_ARMCC">
1372       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1373       <require condition="CM35P"/>
1374       <require Tcompiler="ARMCC"/>
1375     </condition>
1376     <condition id="CM35P_LE_ARMCC">
1377       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1378       <require condition="CM35P_ARMCC"/>
1379       <require Dendian="Little-endian"/>
1380     </condition>
1381     <condition id="CM35P_BE_ARMCC">
1382       <description>Cortex-M35P processor based device in big endian mode for the Arm Compiler</description>
1383       <require condition="CM35P_ARMCC"/>
1384       <require Dendian="Big-endian"/>
1385     </condition>
1386
1387     <condition id="CM35P_FP_ARMCC">
1388       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1389       <require condition="CM35P_FP"/>
1390       <require Tcompiler="ARMCC"/>
1391     </condition>
1392     <condition id="CM35P_FP_LE_ARMCC">
1393       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1394       <require condition="CM35P_FP_ARMCC"/>
1395       <require Dendian="Little-endian"/>
1396     </condition>
1397     <condition id="CM35P_FP_BE_ARMCC">
1398       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1399       <require condition="CM35P_FP_ARMCC"/>
1400       <require Dendian="Big-endian"/>
1401     </condition>
1402
1403     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1404       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1405       <require condition="CM35P_NODSP_NOFPU"/>
1406       <require Tcompiler="ARMCC"/>
1407     </condition>
1408     <condition id="CM35P_DSP_NOFPU_ARMCC">
1409       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1410       <require condition="CM35P_DSP_NOFPU"/>
1411       <require Tcompiler="ARMCC"/>
1412     </condition>
1413     <condition id="CM35P_NODSP_SP_ARMCC">
1414       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1415       <require condition="CM35P_NODSP_SP"/>
1416       <require Tcompiler="ARMCC"/>
1417     </condition>
1418     <condition id="CM35P_DSP_SP_ARMCC">
1419       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1420       <require condition="CM35P_DSP_SP"/>
1421       <require Tcompiler="ARMCC"/>
1422     </condition>
1423     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1424       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1425       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1426       <require Dendian="Little-endian"/>
1427     </condition>
1428     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1429       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1430       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1431       <require Dendian="Little-endian"/>
1432     </condition>
1433     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1434       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1435       <require condition="CM35P_NODSP_SP_ARMCC"/>
1436       <require Dendian="Little-endian"/>
1437     </condition>
1438     <condition id="CM35P_DSP_SP_LE_ARMCC">
1439       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1440       <require condition="CM35P_DSP_SP_ARMCC"/>
1441       <require Dendian="Little-endian"/>
1442     </condition>
1443
1444     <condition id="ARMv8MBL_ARMCC">
1445       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1446       <require condition="ARMv8MBL"/>
1447       <require Tcompiler="ARMCC"/>
1448     </condition>
1449     <condition id="ARMv8MBL_LE_ARMCC">
1450       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1451       <require condition="ARMv8MBL_ARMCC"/>
1452       <require Dendian="Little-endian"/>
1453     </condition>
1454     <condition id="ARMv8MBL_BE_ARMCC">
1455       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1456       <require condition="ARMv8MBL_ARMCC"/>
1457       <require Dendian="Big-endian"/>
1458     </condition>
1459
1460     <condition id="ARMv8MML_ARMCC">
1461       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1462       <require condition="ARMv8MML"/>
1463       <require Tcompiler="ARMCC"/>
1464     </condition>
1465     <condition id="ARMv8MML_LE_ARMCC">
1466       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1467       <require condition="ARMv8MML_ARMCC"/>
1468       <require Dendian="Little-endian"/>
1469     </condition>
1470     <condition id="ARMv8MML_BE_ARMCC">
1471       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1472       <require condition="ARMv8MML_ARMCC"/>
1473       <require Dendian="Big-endian"/>
1474     </condition>
1475
1476     <condition id="ARMv8MML_FP_ARMCC">
1477       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1478       <require condition="ARMv8MML_FP"/>
1479       <require Tcompiler="ARMCC"/>
1480     </condition>
1481     <condition id="ARMv8MML_FP_LE_ARMCC">
1482       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1483       <require condition="ARMv8MML_FP_ARMCC"/>
1484       <require Dendian="Little-endian"/>
1485     </condition>
1486     <condition id="ARMv8MML_FP_BE_ARMCC">
1487       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1488       <require condition="ARMv8MML_FP_ARMCC"/>
1489       <require Dendian="Big-endian"/>
1490     </condition>
1491
1492     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1493       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1494       <require condition="ARMv8MML_NODSP_NOFPU"/>
1495       <require Tcompiler="ARMCC"/>
1496     </condition>
1497     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1498       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1499       <require condition="ARMv8MML_DSP_NOFPU"/>
1500       <require Tcompiler="ARMCC"/>
1501     </condition>
1502     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1503       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1504       <require condition="ARMv8MML_NODSP_SP"/>
1505       <require Tcompiler="ARMCC"/>
1506     </condition>
1507     <condition id="ARMv8MML_DSP_SP_ARMCC">
1508       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1509       <require condition="ARMv8MML_DSP_SP"/>
1510       <require Tcompiler="ARMCC"/>
1511     </condition>
1512     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1513       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1514       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1515       <require Dendian="Little-endian"/>
1516     </condition>
1517     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1518       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1519       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1520       <require Dendian="Little-endian"/>
1521     </condition>
1522     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1523       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1524       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1525       <require Dendian="Little-endian"/>
1526     </condition>
1527     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1528       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1529       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1530       <require Dendian="Little-endian"/>
1531     </condition>
1532
1533     <!-- GCC compiler -->
1534     <condition id="CA_GCC">
1535       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1536       <require condition="ARMv7-A Device"/>
1537       <require Tcompiler="GCC"/>
1538     </condition>
1539
1540     <condition id="CM0_GCC">
1541       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1542       <require condition="CM0"/>
1543       <require Tcompiler="GCC"/>
1544     </condition>
1545     <condition id="CM0_LE_GCC">
1546       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1547       <require condition="CM0_GCC"/>
1548       <require Dendian="Little-endian"/>
1549     </condition>
1550     <condition id="CM0_BE_GCC">
1551       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1552       <require condition="CM0_GCC"/>
1553       <require Dendian="Big-endian"/>
1554     </condition>
1555
1556     <condition id="CM1_GCC">
1557       <description>Cortex-M1 based device for the GCC Compiler</description>
1558       <require condition="CM1"/>
1559       <require Tcompiler="GCC"/>
1560     </condition>
1561     <condition id="CM1_LE_GCC">
1562       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1563       <require condition="CM1_GCC"/>
1564       <require Dendian="Little-endian"/>
1565     </condition>
1566     <condition id="CM1_BE_GCC">
1567       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1568       <require condition="CM1_GCC"/>
1569       <require Dendian="Big-endian"/>
1570     </condition>
1571
1572     <condition id="CM3_GCC">
1573       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1574       <require condition="CM3"/>
1575       <require Tcompiler="GCC"/>
1576     </condition>
1577     <condition id="CM3_LE_GCC">
1578       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1579       <require condition="CM3_GCC"/>
1580       <require Dendian="Little-endian"/>
1581     </condition>
1582     <condition id="CM3_BE_GCC">
1583       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1584       <require condition="CM3_GCC"/>
1585       <require Dendian="Big-endian"/>
1586     </condition>
1587
1588     <condition id="CM4_GCC">
1589       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1590       <require condition="CM4"/>
1591       <require Tcompiler="GCC"/>
1592     </condition>
1593     <condition id="CM4_LE_GCC">
1594       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1595       <require condition="CM4_GCC"/>
1596       <require Dendian="Little-endian"/>
1597     </condition>
1598     <condition id="CM4_BE_GCC">
1599       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1600       <require condition="CM4_GCC"/>
1601       <require Dendian="Big-endian"/>
1602     </condition>
1603
1604     <condition id="CM4_FP_GCC">
1605       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1606       <require condition="CM4_FP"/>
1607       <require Tcompiler="GCC"/>
1608     </condition>
1609     <condition id="CM4_FP_LE_GCC">
1610       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1611       <require condition="CM4_FP_GCC"/>
1612       <require Dendian="Little-endian"/>
1613     </condition>
1614     <condition id="CM4_FP_BE_GCC">
1615       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1616       <require condition="CM4_FP_GCC"/>
1617       <require Dendian="Big-endian"/>
1618     </condition>
1619
1620     <condition id="CM7_GCC">
1621       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1622       <require condition="CM7"/>
1623       <require Tcompiler="GCC"/>
1624     </condition>
1625     <condition id="CM7_LE_GCC">
1626       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1627       <require condition="CM7_GCC"/>
1628       <require Dendian="Little-endian"/>
1629     </condition>
1630     <condition id="CM7_BE_GCC">
1631       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1632       <require condition="CM7_GCC"/>
1633       <require Dendian="Big-endian"/>
1634     </condition>
1635
1636     <condition id="CM7_FP_GCC">
1637       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1638       <require condition="CM7_FP"/>
1639       <require Tcompiler="GCC"/>
1640     </condition>
1641     <condition id="CM7_FP_LE_GCC">
1642       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1643       <require condition="CM7_FP_GCC"/>
1644       <require Dendian="Little-endian"/>
1645     </condition>
1646     <condition id="CM7_FP_BE_GCC">
1647       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1648       <require condition="CM7_FP_GCC"/>
1649       <require Dendian="Big-endian"/>
1650     </condition>
1651
1652     <condition id="CM7_SP_GCC">
1653       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1654       <require condition="CM7_SP"/>
1655       <require Tcompiler="GCC"/>
1656     </condition>
1657     <condition id="CM7_SP_LE_GCC">
1658       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1659       <require condition="CM7_SP_GCC"/>
1660       <require Dendian="Little-endian"/>
1661     </condition>
1662     <condition id="CM7_SP_BE_GCC">
1663       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1664       <require condition="CM7_SP_GCC"/>
1665       <require Dendian="Big-endian"/>
1666     </condition>
1667
1668     <condition id="CM7_DP_GCC">
1669       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1670       <require condition="CM7_DP"/>
1671       <require Tcompiler="GCC"/>
1672     </condition>
1673     <condition id="CM7_DP_LE_GCC">
1674       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1675       <require condition="CM7_DP_GCC"/>
1676       <require Dendian="Little-endian"/>
1677     </condition>
1678     <condition id="CM7_DP_BE_GCC">
1679       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1680       <require condition="CM7_DP_GCC"/>
1681       <require Dendian="Big-endian"/>
1682     </condition>
1683
1684     <condition id="CM23_GCC">
1685       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1686       <require condition="CM23"/>
1687       <require Tcompiler="GCC"/>
1688     </condition>
1689     <condition id="CM23_LE_GCC">
1690       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1691       <require condition="CM23_GCC"/>
1692       <require Dendian="Little-endian"/>
1693     </condition>
1694     <condition id="CM23_BE_GCC">
1695       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1696       <require condition="CM23_GCC"/>
1697       <require Dendian="Big-endian"/>
1698     </condition>
1699
1700     <condition id="CM33_GCC">
1701       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1702       <require condition="CM33"/>
1703       <require Tcompiler="GCC"/>
1704     </condition>
1705     <condition id="CM33_LE_GCC">
1706       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1707       <require condition="CM33_GCC"/>
1708       <require Dendian="Little-endian"/>
1709     </condition>
1710     <condition id="CM33_BE_GCC">
1711       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1712       <require condition="CM33_GCC"/>
1713       <require Dendian="Big-endian"/>
1714     </condition>
1715
1716     <condition id="CM33_FP_GCC">
1717       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1718       <require condition="CM33_FP"/>
1719       <require Tcompiler="GCC"/>
1720     </condition>
1721     <condition id="CM33_FP_LE_GCC">
1722       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1723       <require condition="CM33_FP_GCC"/>
1724       <require Dendian="Little-endian"/>
1725     </condition>
1726     <condition id="CM33_FP_BE_GCC">
1727       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1728       <require condition="CM33_FP_GCC"/>
1729       <require Dendian="Big-endian"/>
1730     </condition>
1731
1732     <condition id="CM33_NODSP_NOFPU_GCC">
1733       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1734       <require condition="CM33_NODSP_NOFPU"/>
1735       <require Tcompiler="GCC"/>
1736     </condition>
1737     <condition id="CM33_DSP_NOFPU_GCC">
1738       <description>CM33, DSP, no FPU, GCC Compiler</description>
1739       <require condition="CM33_DSP_NOFPU"/>
1740       <require Tcompiler="GCC"/>
1741     </condition>
1742     <condition id="CM33_NODSP_SP_GCC">
1743       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1744       <require condition="CM33_NODSP_SP"/>
1745       <require Tcompiler="GCC"/>
1746     </condition>
1747     <condition id="CM33_DSP_SP_GCC">
1748       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1749       <require condition="CM33_DSP_SP"/>
1750       <require Tcompiler="GCC"/>
1751     </condition>
1752     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1753       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1754       <require condition="CM33_NODSP_NOFPU_GCC"/>
1755       <require Dendian="Little-endian"/>
1756     </condition>
1757     <condition id="CM33_DSP_NOFPU_LE_GCC">
1758       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1759       <require condition="CM33_DSP_NOFPU_GCC"/>
1760       <require Dendian="Little-endian"/>
1761     </condition>
1762     <condition id="CM33_NODSP_SP_LE_GCC">
1763       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1764       <require condition="CM33_NODSP_SP_GCC"/>
1765       <require Dendian="Little-endian"/>
1766     </condition>
1767     <condition id="CM33_DSP_SP_LE_GCC">
1768       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1769       <require condition="CM33_DSP_SP_GCC"/>
1770       <require Dendian="Little-endian"/>
1771     </condition>
1772
1773     <condition id="CM35P_GCC">
1774       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1775       <require condition="CM35P"/>
1776       <require Tcompiler="GCC"/>
1777     </condition>
1778     <condition id="CM35P_LE_GCC">
1779       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1780       <require condition="CM35P_GCC"/>
1781       <require Dendian="Little-endian"/>
1782     </condition>
1783     <condition id="CM35P_BE_GCC">
1784       <description>Cortex-M35P processor based device in big endian mode for the GCC Compiler</description>
1785       <require condition="CM35P_GCC"/>
1786       <require Dendian="Big-endian"/>
1787     </condition>
1788
1789     <condition id="CM35P_FP_GCC">
1790       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1791       <require condition="CM35P_FP"/>
1792       <require Tcompiler="GCC"/>
1793     </condition>
1794     <condition id="CM35P_FP_LE_GCC">
1795       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1796       <require condition="CM35P_FP_GCC"/>
1797       <require Dendian="Little-endian"/>
1798     </condition>
1799     <condition id="CM35P_FP_BE_GCC">
1800       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1801       <require condition="CM35P_FP_GCC"/>
1802       <require Dendian="Big-endian"/>
1803     </condition>
1804
1805     <condition id="CM35P_NODSP_NOFPU_GCC">
1806       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1807       <require condition="CM35P_NODSP_NOFPU"/>
1808       <require Tcompiler="GCC"/>
1809     </condition>
1810     <condition id="CM35P_DSP_NOFPU_GCC">
1811       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1812       <require condition="CM35P_DSP_NOFPU"/>
1813       <require Tcompiler="GCC"/>
1814     </condition>
1815     <condition id="CM35P_NODSP_SP_GCC">
1816       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1817       <require condition="CM35P_NODSP_SP"/>
1818       <require Tcompiler="GCC"/>
1819     </condition>
1820     <condition id="CM35P_DSP_SP_GCC">
1821       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1822       <require condition="CM35P_DSP_SP"/>
1823       <require Tcompiler="GCC"/>
1824     </condition>
1825     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1826       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1827       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1828       <require Dendian="Little-endian"/>
1829     </condition>
1830     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1831       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1832       <require condition="CM35P_DSP_NOFPU_GCC"/>
1833       <require Dendian="Little-endian"/>
1834     </condition>
1835     <condition id="CM35P_NODSP_SP_LE_GCC">
1836       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1837       <require condition="CM35P_NODSP_SP_GCC"/>
1838       <require Dendian="Little-endian"/>
1839     </condition>
1840     <condition id="CM35P_DSP_SP_LE_GCC">
1841       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1842       <require condition="CM35P_DSP_SP_GCC"/>
1843       <require Dendian="Little-endian"/>
1844     </condition>
1845
1846     <condition id="ARMv8MBL_GCC">
1847       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1848       <require condition="ARMv8MBL"/>
1849       <require Tcompiler="GCC"/>
1850     </condition>
1851     <condition id="ARMv8MBL_LE_GCC">
1852       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1853       <require condition="ARMv8MBL_GCC"/>
1854       <require Dendian="Little-endian"/>
1855     </condition>
1856     <condition id="ARMv8MBL_BE_GCC">
1857       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1858       <require condition="ARMv8MBL_GCC"/>
1859       <require Dendian="Big-endian"/>
1860     </condition>
1861
1862     <condition id="ARMv8MML_GCC">
1863       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1864       <require condition="ARMv8MML"/>
1865       <require Tcompiler="GCC"/>
1866     </condition>
1867     <condition id="ARMv8MML_LE_GCC">
1868       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1869       <require condition="ARMv8MML_GCC"/>
1870       <require Dendian="Little-endian"/>
1871     </condition>
1872     <condition id="ARMv8MML_BE_GCC">
1873       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1874       <require condition="ARMv8MML_GCC"/>
1875       <require Dendian="Big-endian"/>
1876     </condition>
1877
1878     <condition id="ARMv8MML_FP_GCC">
1879       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1880       <require condition="ARMv8MML_FP"/>
1881       <require Tcompiler="GCC"/>
1882     </condition>
1883     <condition id="ARMv8MML_FP_LE_GCC">
1884       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1885       <require condition="ARMv8MML_FP_GCC"/>
1886       <require Dendian="Little-endian"/>
1887     </condition>
1888     <condition id="ARMv8MML_FP_BE_GCC">
1889       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1890       <require condition="ARMv8MML_FP_GCC"/>
1891       <require Dendian="Big-endian"/>
1892     </condition>
1893
1894     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1895       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1896       <require condition="ARMv8MML_NODSP_NOFPU"/>
1897       <require Tcompiler="GCC"/>
1898     </condition>
1899     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1900       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1901       <require condition="ARMv8MML_DSP_NOFPU"/>
1902       <require Tcompiler="GCC"/>
1903     </condition>
1904     <condition id="ARMv8MML_NODSP_SP_GCC">
1905       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1906       <require condition="ARMv8MML_NODSP_SP"/>
1907       <require Tcompiler="GCC"/>
1908     </condition>
1909     <condition id="ARMv8MML_DSP_SP_GCC">
1910       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1911       <require condition="ARMv8MML_DSP_SP"/>
1912       <require Tcompiler="GCC"/>
1913     </condition>
1914     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1915       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1916       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1917       <require Dendian="Little-endian"/>
1918     </condition>
1919     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1920       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1921       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1922       <require Dendian="Little-endian"/>
1923     </condition>
1924     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1925       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1926       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1927       <require Dendian="Little-endian"/>
1928     </condition>
1929     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1930       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1931       <require condition="ARMv8MML_DSP_SP_GCC"/>
1932       <require Dendian="Little-endian"/>
1933     </condition>
1934
1935     <!-- IAR compiler -->
1936     <condition id="CA_IAR">
1937       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1938       <require condition="ARMv7-A Device"/>
1939       <require Tcompiler="IAR"/>
1940     </condition>
1941
1942     <condition id="CM0_IAR">
1943       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1944       <require condition="CM0"/>
1945       <require Tcompiler="IAR"/>
1946     </condition>
1947     <condition id="CM0_LE_IAR">
1948       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1949       <require condition="CM0_IAR"/>
1950       <require Dendian="Little-endian"/>
1951     </condition>
1952     <condition id="CM0_BE_IAR">
1953       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1954       <require condition="CM0_IAR"/>
1955       <require Dendian="Big-endian"/>
1956     </condition>
1957
1958     <condition id="CM1_IAR">
1959       <description>Cortex-M1 based device for the IAR Compiler</description>
1960       <require condition="CM1"/>
1961       <require Tcompiler="IAR"/>
1962     </condition>
1963     <condition id="CM1_LE_IAR">
1964       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1965       <require condition="CM1_IAR"/>
1966       <require Dendian="Little-endian"/>
1967     </condition>
1968     <condition id="CM1_BE_IAR">
1969       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1970       <require condition="CM1_IAR"/>
1971       <require Dendian="Big-endian"/>
1972     </condition>
1973
1974     <condition id="CM3_IAR">
1975       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1976       <require condition="CM3"/>
1977       <require Tcompiler="IAR"/>
1978     </condition>
1979     <condition id="CM3_LE_IAR">
1980       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1981       <require condition="CM3_IAR"/>
1982       <require Dendian="Little-endian"/>
1983     </condition>
1984     <condition id="CM3_BE_IAR">
1985       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1986       <require condition="CM3_IAR"/>
1987       <require Dendian="Big-endian"/>
1988     </condition>
1989
1990     <condition id="CM4_IAR">
1991       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1992       <require condition="CM4"/>
1993       <require Tcompiler="IAR"/>
1994     </condition>
1995     <condition id="CM4_LE_IAR">
1996       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1997       <require condition="CM4_IAR"/>
1998       <require Dendian="Little-endian"/>
1999     </condition>
2000     <condition id="CM4_BE_IAR">
2001       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2002       <require condition="CM4_IAR"/>
2003       <require Dendian="Big-endian"/>
2004     </condition>
2005
2006     <condition id="CM4_FP_IAR">
2007       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2008       <require condition="CM4_FP"/>
2009       <require Tcompiler="IAR"/>
2010     </condition>
2011     <condition id="CM4_FP_LE_IAR">
2012       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2013       <require condition="CM4_FP_IAR"/>
2014       <require Dendian="Little-endian"/>
2015     </condition>
2016     <condition id="CM4_FP_BE_IAR">
2017       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2018       <require condition="CM4_FP_IAR"/>
2019       <require Dendian="Big-endian"/>
2020     </condition>
2021
2022     <condition id="CM7_IAR">
2023       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2024       <require condition="CM7"/>
2025       <require Tcompiler="IAR"/>
2026     </condition>
2027     <condition id="CM7_LE_IAR">
2028       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2029       <require condition="CM7_IAR"/>
2030       <require Dendian="Little-endian"/>
2031     </condition>
2032     <condition id="CM7_BE_IAR">
2033       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2034       <require condition="CM7_IAR"/>
2035       <require Dendian="Big-endian"/>
2036     </condition>
2037
2038     <condition id="CM7_FP_IAR">
2039       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2040       <require condition="CM7_FP"/>
2041       <require Tcompiler="IAR"/>
2042     </condition>
2043     <condition id="CM7_FP_LE_IAR">
2044       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2045       <require condition="CM7_FP_IAR"/>
2046       <require Dendian="Little-endian"/>
2047     </condition>
2048     <condition id="CM7_FP_BE_IAR">
2049       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2050       <require condition="CM7_FP_IAR"/>
2051       <require Dendian="Big-endian"/>
2052     </condition>
2053
2054     <condition id="CM7_SP_IAR">
2055       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2056       <require condition="CM7_SP"/>
2057       <require Tcompiler="IAR"/>
2058     </condition>
2059     <condition id="CM7_SP_LE_IAR">
2060       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2061       <require condition="CM7_SP_IAR"/>
2062       <require Dendian="Little-endian"/>
2063     </condition>
2064     <condition id="CM7_SP_BE_IAR">
2065       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2066       <require condition="CM7_SP_IAR"/>
2067       <require Dendian="Big-endian"/>
2068     </condition>
2069
2070     <condition id="CM7_DP_IAR">
2071       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2072       <require condition="CM7_DP"/>
2073       <require Tcompiler="IAR"/>
2074     </condition>
2075     <condition id="CM7_DP_LE_IAR">
2076       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2077       <require condition="CM7_DP_IAR"/>
2078       <require Dendian="Little-endian"/>
2079     </condition>
2080     <condition id="CM7_DP_BE_IAR">
2081       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2082       <require condition="CM7_DP_IAR"/>
2083       <require Dendian="Big-endian"/>
2084     </condition>
2085
2086     <condition id="CM23_IAR">
2087       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2088       <require condition="CM23"/>
2089       <require Tcompiler="IAR"/>
2090     </condition>
2091     <condition id="CM23_LE_IAR">
2092       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2093       <require condition="CM23_IAR"/>
2094       <require Dendian="Little-endian"/>
2095     </condition>
2096     <condition id="CM23_BE_IAR">
2097       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
2098       <require condition="CM23_IAR"/>
2099       <require Dendian="Big-endian"/>
2100     </condition>
2101
2102     <condition id="CM33_IAR">
2103       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2104       <require condition="CM33"/>
2105       <require Tcompiler="IAR"/>
2106     </condition>
2107     <condition id="CM33_LE_IAR">
2108       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2109       <require condition="CM33_IAR"/>
2110       <require Dendian="Little-endian"/>
2111     </condition>
2112     <condition id="CM33_BE_IAR">
2113       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
2114       <require condition="CM33_IAR"/>
2115       <require Dendian="Big-endian"/>
2116     </condition>
2117
2118     <condition id="CM33_FP_IAR">
2119       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2120       <require condition="CM33_FP"/>
2121       <require Tcompiler="IAR"/>
2122     </condition>
2123     <condition id="CM33_FP_LE_IAR">
2124       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2125       <require condition="CM33_FP_IAR"/>
2126       <require Dendian="Little-endian"/>
2127     </condition>
2128     <condition id="CM33_FP_BE_IAR">
2129       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2130       <require condition="CM33_FP_IAR"/>
2131       <require Dendian="Big-endian"/>
2132     </condition>
2133
2134     <condition id="CM33_NODSP_NOFPU_IAR">
2135       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2136       <require condition="CM33_NODSP_NOFPU"/>
2137       <require Tcompiler="IAR"/>
2138     </condition>
2139     <condition id="CM33_DSP_NOFPU_IAR">
2140       <description>CM33, DSP, no FPU, IAR Compiler</description>
2141       <require condition="CM33_DSP_NOFPU"/>
2142       <require Tcompiler="IAR"/>
2143     </condition>
2144     <condition id="CM33_NODSP_SP_IAR">
2145       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2146       <require condition="CM33_NODSP_SP"/>
2147       <require Tcompiler="IAR"/>
2148     </condition>
2149     <condition id="CM33_DSP_SP_IAR">
2150       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2151       <require condition="CM33_DSP_SP"/>
2152       <require Tcompiler="IAR"/>
2153     </condition>
2154     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2155       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2156       <require condition="CM33_NODSP_NOFPU_IAR"/>
2157       <require Dendian="Little-endian"/>
2158     </condition>
2159     <condition id="CM33_DSP_NOFPU_LE_IAR">
2160       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2161       <require condition="CM33_DSP_NOFPU_IAR"/>
2162       <require Dendian="Little-endian"/>
2163     </condition>
2164     <condition id="CM33_NODSP_SP_LE_IAR">
2165       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2166       <require condition="CM33_NODSP_SP_IAR"/>
2167       <require Dendian="Little-endian"/>
2168     </condition>
2169     <condition id="CM33_DSP_SP_LE_IAR">
2170       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2171       <require condition="CM33_DSP_SP_IAR"/>
2172       <require Dendian="Little-endian"/>
2173     </condition>
2174
2175     <condition id="CM35P_IAR">
2176       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2177       <require condition="CM35P"/>
2178       <require Tcompiler="IAR"/>
2179     </condition>
2180     <condition id="CM35P_LE_IAR">
2181       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2182       <require condition="CM35P_IAR"/>
2183       <require Dendian="Little-endian"/>
2184     </condition>
2185     <condition id="CM35P_BE_IAR">
2186       <description>Cortex-M35P processor based device in big endian mode for the IAR Compiler</description>
2187       <require condition="CM35P_IAR"/>
2188       <require Dendian="Big-endian"/>
2189     </condition>
2190
2191     <condition id="CM35P_FP_IAR">
2192       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2193       <require condition="CM35P_FP"/>
2194       <require Tcompiler="IAR"/>
2195     </condition>
2196     <condition id="CM35P_FP_LE_IAR">
2197       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2198       <require condition="CM35P_FP_IAR"/>
2199       <require Dendian="Little-endian"/>
2200     </condition>
2201     <condition id="CM35P_FP_BE_IAR">
2202       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2203       <require condition="CM35P_FP_IAR"/>
2204       <require Dendian="Big-endian"/>
2205     </condition>
2206
2207     <condition id="CM35P_NODSP_NOFPU_IAR">
2208       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2209       <require condition="CM35P_NODSP_NOFPU"/>
2210       <require Tcompiler="IAR"/>
2211     </condition>
2212     <condition id="CM35P_DSP_NOFPU_IAR">
2213       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2214       <require condition="CM35P_DSP_NOFPU"/>
2215       <require Tcompiler="IAR"/>
2216     </condition>
2217     <condition id="CM35P_NODSP_SP_IAR">
2218       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2219       <require condition="CM35P_NODSP_SP"/>
2220       <require Tcompiler="IAR"/>
2221     </condition>
2222     <condition id="CM35P_DSP_SP_IAR">
2223       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2224       <require condition="CM35P_DSP_SP"/>
2225       <require Tcompiler="IAR"/>
2226     </condition>
2227     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2228       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2229       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2230       <require Dendian="Little-endian"/>
2231     </condition>
2232     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2233       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2234       <require condition="CM35P_DSP_NOFPU_IAR"/>
2235       <require Dendian="Little-endian"/>
2236     </condition>
2237     <condition id="CM35P_NODSP_SP_LE_IAR">
2238       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2239       <require condition="CM35P_NODSP_SP_IAR"/>
2240       <require Dendian="Little-endian"/>
2241     </condition>
2242     <condition id="CM35P_DSP_SP_LE_IAR">
2243       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2244       <require condition="CM35P_DSP_SP_IAR"/>
2245       <require Dendian="Little-endian"/>
2246     </condition>
2247
2248     <condition id="ARMv8MBL_IAR">
2249       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2250       <require condition="ARMv8MBL"/>
2251       <require Tcompiler="IAR"/>
2252     </condition>
2253     <condition id="ARMv8MBL_LE_IAR">
2254       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2255       <require condition="ARMv8MBL_IAR"/>
2256       <require Dendian="Little-endian"/>
2257     </condition>
2258     <condition id="ARMv8MBL_BE_IAR">
2259       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
2260       <require condition="ARMv8MBL_IAR"/>
2261       <require Dendian="Big-endian"/>
2262     </condition>
2263
2264     <condition id="ARMv8MML_IAR">
2265       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2266       <require condition="ARMv8MML"/>
2267       <require Tcompiler="IAR"/>
2268     </condition>
2269     <condition id="ARMv8MML_LE_IAR">
2270       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2271       <require condition="ARMv8MML_IAR"/>
2272       <require Dendian="Little-endian"/>
2273     </condition>
2274     <condition id="ARMv8MML_BE_IAR">
2275       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
2276       <require condition="ARMv8MML_IAR"/>
2277       <require Dendian="Big-endian"/>
2278     </condition>
2279
2280     <condition id="ARMv8MML_FP_IAR">
2281       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2282       <require condition="ARMv8MML_FP"/>
2283       <require Tcompiler="IAR"/>
2284     </condition>
2285     <condition id="ARMv8MML_FP_LE_IAR">
2286       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2287       <require condition="ARMv8MML_FP_IAR"/>
2288       <require Dendian="Little-endian"/>
2289     </condition>
2290     <condition id="ARMv8MML_FP_BE_IAR">
2291       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2292       <require condition="ARMv8MML_FP_IAR"/>
2293       <require Dendian="Big-endian"/>
2294     </condition>
2295
2296     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2297       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2298       <require condition="ARMv8MML_NODSP_NOFPU"/>
2299       <require Tcompiler="IAR"/>
2300     </condition>
2301     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2302       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2303       <require condition="ARMv8MML_DSP_NOFPU"/>
2304       <require Tcompiler="IAR"/>
2305     </condition>
2306     <condition id="ARMv8MML_NODSP_SP_IAR">
2307       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2308       <require condition="ARMv8MML_NODSP_SP"/>
2309       <require Tcompiler="IAR"/>
2310     </condition>
2311     <condition id="ARMv8MML_DSP_SP_IAR">
2312       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2313       <require condition="ARMv8MML_DSP_SP"/>
2314       <require Tcompiler="IAR"/>
2315     </condition>
2316     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2317       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2318       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2319       <require Dendian="Little-endian"/>
2320     </condition>
2321     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2322       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2323       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2324       <require Dendian="Little-endian"/>
2325     </condition>
2326     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2327       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2328       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2329       <require Dendian="Little-endian"/>
2330     </condition>
2331     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2332       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2333       <require condition="ARMv8MML_DSP_SP_IAR"/>
2334       <require Dendian="Little-endian"/>
2335     </condition>
2336
2337     <!-- conditions selecting single devices and CMSIS Core -->
2338     <!-- used for component startup, GCC version is used for C-Startup -->
2339     <condition id="ARMCM0 CMSIS">
2340       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2341       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2342       <require Cclass="CMSIS" Cgroup="CORE"/>
2343     </condition>
2344     <condition id="ARMCM0 CMSIS GCC">
2345       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
2346       <require condition="ARMCM0 CMSIS"/>
2347       <require condition="GCC"/>
2348     </condition>
2349
2350     <condition id="ARMCM0+ CMSIS">
2351       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2352       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2353       <require Cclass="CMSIS" Cgroup="CORE"/>
2354     </condition>
2355     <condition id="ARMCM0+ CMSIS GCC">
2356       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
2357       <require condition="ARMCM0+ CMSIS"/>
2358       <require condition="GCC"/>
2359     </condition>
2360
2361     <condition id="ARMCM1 CMSIS">
2362       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2363       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2364       <require Cclass="CMSIS" Cgroup="CORE"/>
2365     </condition>
2366     <condition id="ARMCM1 CMSIS GCC">
2367       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
2368       <require condition="ARMCM1 CMSIS"/>
2369       <require condition="GCC"/>
2370     </condition>
2371
2372     <condition id="ARMCM3 CMSIS">
2373       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2374       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2375       <require Cclass="CMSIS" Cgroup="CORE"/>
2376     </condition>
2377     <condition id="ARMCM3 CMSIS GCC">
2378       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
2379       <require condition="ARMCM3 CMSIS"/>
2380       <require condition="GCC"/>
2381     </condition>
2382
2383     <condition id="ARMCM4 CMSIS">
2384       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2385       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2386       <require Cclass="CMSIS" Cgroup="CORE"/>
2387     </condition>
2388     <condition id="ARMCM4 CMSIS GCC">
2389       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
2390       <require condition="ARMCM4 CMSIS"/>
2391       <require condition="GCC"/>
2392     </condition>
2393
2394     <condition id="ARMCM7 CMSIS">
2395       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2396       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2397       <require Cclass="CMSIS" Cgroup="CORE"/>
2398     </condition>
2399     <condition id="ARMCM7 CMSIS GCC">
2400       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2401       <require condition="ARMCM7 CMSIS"/>
2402       <require condition="GCC"/>
2403     </condition>
2404
2405     <condition id="ARMCM23 CMSIS">
2406       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2407       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2408       <require Cclass="CMSIS" Cgroup="CORE"/>
2409     </condition>
2410     <condition id="ARMCM23 CMSIS GCC">
2411       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2412       <require condition="ARMCM23 CMSIS"/>
2413       <require condition="GCC"/>
2414     </condition>
2415
2416     <condition id="ARMCM33 CMSIS">
2417       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2418       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2419       <require Cclass="CMSIS" Cgroup="CORE"/>
2420     </condition>
2421     <condition id="ARMCM33 CMSIS GCC">
2422       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2423       <require condition="ARMCM33 CMSIS"/>
2424       <require condition="GCC"/>
2425     </condition>
2426
2427     <condition id="ARMCM35P CMSIS">
2428       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2429       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2430       <require Cclass="CMSIS" Cgroup="CORE"/>
2431     </condition>
2432     <condition id="ARMCM35P CMSIS GCC">
2433       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core requiring GCC</description>
2434       <require condition="ARMCM35P CMSIS"/>
2435       <require condition="GCC"/>
2436     </condition>
2437
2438     <condition id="ARMSC000 CMSIS">
2439       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2440       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2441       <require Cclass="CMSIS" Cgroup="CORE"/>
2442     </condition>
2443     <condition id="ARMSC000 CMSIS GCC">
2444       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2445       <require condition="ARMSC000 CMSIS"/>
2446       <require condition="GCC"/>
2447     </condition>
2448
2449     <condition id="ARMSC300 CMSIS">
2450       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2451       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2452       <require Cclass="CMSIS" Cgroup="CORE"/>
2453     </condition>
2454     <condition id="ARMSC300 CMSIS GCC">
2455       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2456       <require condition="ARMSC300 CMSIS"/>
2457       <require condition="GCC"/>
2458     </condition>
2459
2460     <condition id="ARMv8MBL CMSIS">
2461       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2462       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2463       <require Cclass="CMSIS" Cgroup="CORE"/>
2464     </condition>
2465     <condition id="ARMv8MBL CMSIS GCC">
2466       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2467       <require condition="ARMv8MBL CMSIS"/>
2468       <require condition="GCC"/>
2469     </condition>
2470
2471     <condition id="ARMv8MML CMSIS">
2472       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2473       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2474       <require Cclass="CMSIS" Cgroup="CORE"/>
2475     </condition>
2476     <condition id="ARMv8MML CMSIS GCC">
2477       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2478       <require condition="ARMv8MML CMSIS"/>
2479       <require condition="GCC"/>
2480     </condition>
2481
2482     <condition id="ARMv81MML CMSIS">
2483       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2484       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2485       <require Cclass="CMSIS" Cgroup="CORE"/>
2486     </condition>
2487     <condition id="ARMv81MML CMSIS GCC">
2488       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2489       <require condition="ARMv81MML CMSIS"/>
2490       <require condition="GCC"/>
2491     </condition>
2492
2493     <condition id="ARMCA5 CMSIS">
2494       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2495       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2496       <require Cclass="CMSIS" Cgroup="CORE"/>
2497     </condition>
2498
2499     <condition id="ARMCA7 CMSIS">
2500       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2501       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2502       <require Cclass="CMSIS" Cgroup="CORE"/>
2503     </condition>
2504
2505     <condition id="ARMCA9 CMSIS">
2506       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2507       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2508       <require Cclass="CMSIS" Cgroup="CORE"/>
2509     </condition>
2510
2511     <!-- CMSIS DSP -->
2512     <condition id="CMSIS DSP">
2513       <description>Components required for DSP</description>
2514       <require condition="ARMv6_7_8-M Device"/>
2515       <require condition="ARMCC GCC IAR"/>
2516       <require Cclass="CMSIS" Cgroup="CORE"/>
2517     </condition>
2518
2519     <!-- CMSIS NN -->
2520     <condition id="CMSIS NN">
2521       <description>Components required for NN</description>
2522       <require condition="CMSIS DSP"/>
2523     </condition>
2524
2525     <!-- RTOS RTX -->
2526     <condition id="RTOS RTX">
2527       <description>Components required for RTOS RTX</description>
2528       <require condition="ARMv6_7-M Device"/>
2529       <require condition="ARMCC GCC IAR"/>
2530       <require Cclass="Device" Cgroup="Startup"/>
2531       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2532     </condition>
2533     <condition id="RTOS RTX IFX">
2534       <description>Components required for RTOS RTX IFX</description>
2535       <require condition="ARMv6_7-M Device"/>
2536       <require condition="ARMCC GCC IAR"/>
2537       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2538       <require Cclass="Device" Cgroup="Startup"/>
2539       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2540     </condition>
2541     <condition id="RTOS RTX5">
2542       <description>Components required for RTOS RTX5</description>
2543       <require condition="ARMv6_7_8-M Device"/>
2544       <require condition="ARMCC GCC IAR"/>
2545       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2546     </condition>
2547     <condition id="RTOS2 RTX5">
2548       <description>Components required for RTOS2 RTX5</description>
2549       <require condition="ARMv6_7_8-M Device"/>
2550       <require condition="ARMCC GCC IAR"/>
2551       <require Cclass="CMSIS"  Cgroup="CORE"/>
2552       <require Cclass="Device" Cgroup="Startup"/>
2553     </condition>
2554     <condition id="RTOS2 RTX5 v7-A">
2555       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2556       <require condition="ARMv7-A Device"/>
2557       <require condition="ARMCC GCC IAR"/>
2558       <require Cclass="CMSIS"  Cgroup="CORE"/>
2559       <require Cclass="Device" Cgroup="Startup"/>
2560       <require Cclass="Device" Cgroup="OS Tick"/>
2561       <require Cclass="Device" Cgroup="IRQ Controller"/>
2562     </condition>
2563     <condition id="RTOS2 RTX5 Lib">
2564       <description>Components required for RTOS2 RTX5 Library</description>
2565       <require condition="ARMv6_7_8-M Device"/>
2566       <require condition="ARMCC GCC IAR"/>
2567       <require Cclass="CMSIS"  Cgroup="CORE"/>
2568       <require Cclass="Device" Cgroup="Startup"/>
2569     </condition>
2570     <condition id="RTOS2 RTX5 NS">
2571       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2572       <require condition="ARMv8-M TZ Device"/>
2573       <require condition="ARMCC GCC IAR"/>
2574       <require Cclass="CMSIS"  Cgroup="CORE"/>
2575       <require Cclass="Device" Cgroup="Startup"/>
2576     </condition>
2577
2578     <!-- OS Tick -->
2579     <condition id="OS Tick PTIM">
2580       <description>Components required for OS Tick Private Timer</description>
2581       <require condition="CA5_CA9"/>
2582       <require Cclass="Device" Cgroup="IRQ Controller"/>
2583     </condition>
2584
2585     <condition id="OS Tick GTIM">
2586       <description>Components required for OS Tick Generic Physical Timer</description>
2587       <require condition="CA7"/>
2588       <require Cclass="Device" Cgroup="IRQ Controller"/>
2589     </condition>
2590
2591   </conditions>
2592
2593   <components>
2594     <!-- CMSIS-Core component -->
2595     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.2.0"  condition="ARMv6_7_8-M Device" >
2596       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2597       <files>
2598         <!-- CPU independent -->
2599         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2600         <file category="include" name="CMSIS/Core/Include/"/>
2601         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2602         <!-- Code template -->
2603         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2604         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2605       </files>
2606     </component>
2607
2608     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.3"  condition="ARMv7-A Device" >
2609       <description>CMSIS-CORE for Cortex-A</description>
2610       <files>
2611         <!-- CPU independent -->
2612         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2613         <file category="include" name="CMSIS/Core_A/Include/"/>
2614       </files>
2615     </component>
2616
2617     <!-- CMSIS-Startup components -->
2618     <!-- Cortex-M0 -->
2619     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM0 CMSIS">
2620       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2621       <files>
2622         <!-- include folder / device header file -->
2623         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2624         <!-- startup / system file -->
2625         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.0" attr="config"/>
2626         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2627         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2628         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2629         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2630       </files>
2631     </component>
2632     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM0 CMSIS">
2633       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2634       <files>
2635         <!-- include folder / device header file -->
2636         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2637         <!-- startup / system file -->
2638         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2639         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.0" attr="config" condition="GCC"/>
2640         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2641         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2642         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2643       </files>
2644     </component>
2645
2646     <!-- Cortex-M0+ -->
2647     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM0+ CMSIS">
2648       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2649       <files>
2650         <!-- include folder / device header file -->
2651         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2652         <!-- startup / system file -->
2653         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.0" attr="config"/>
2654         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2655         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2656         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2657         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2658       </files>
2659     </component>
2660     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM0+ CMSIS">
2661       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2662       <files>
2663         <!-- include folder / device header file -->
2664         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2665         <!-- startup / system file -->
2666         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2667         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.0" attr="config" condition="GCC"/>
2668         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2669         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2670         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2671       </files>
2672     </component>
2673
2674     <!-- Cortex-M1 -->
2675     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM1 CMSIS">
2676       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2677       <files>
2678         <!-- include folder / device header file -->
2679         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2680         <!-- startup / system file -->
2681         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.0" attr="config"/>
2682         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2683         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2684         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2685         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2686       </files>
2687     </component>
2688     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM1 CMSIS">
2689       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2690       <files>
2691         <!-- include folder / device header file -->
2692         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2693         <!-- startup / system file -->
2694         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2695         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.0" attr="config" condition="GCC"/>
2696         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2697         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2698         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2699       </files>
2700     </component>
2701
2702     <!-- Cortex-M3 -->
2703     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM3 CMSIS">
2704       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2705       <files>
2706         <!-- include folder / device header file -->
2707         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2708         <!-- startup / system file -->
2709         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.0" attr="config"/>
2710         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2711         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2712         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2713         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2714       </files>
2715     </component>
2716     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM3 CMSIS">
2717       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2718       <files>
2719         <!-- include folder / device header file -->
2720         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2721         <!-- startup / system file -->
2722         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2723         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.0" attr="config" condition="GCC"/>
2724         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2725         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2726         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2727       </files>
2728     </component>
2729
2730     <!-- Cortex-M4 -->
2731     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM4 CMSIS">
2732       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2733       <files>
2734         <!-- include folder / device header file -->
2735         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2736         <!-- startup / system file -->
2737         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.0" attr="config"/>
2738         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2739         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2740         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2741        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2742       </files>
2743     </component>
2744     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM4 CMSIS">
2745       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2746       <files>
2747         <!-- include folder / device header file -->
2748         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2749         <!-- startup / system file -->
2750         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2751         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.0" attr="config" condition="GCC"/>
2752         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2753         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2754         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2755       </files>
2756     </component>
2757
2758     <!-- Cortex-M7 -->
2759     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM7 CMSIS">
2760       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2761       <files>
2762         <!-- include folder / device header file -->
2763         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2764         <!-- startup / system file -->
2765         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.0" attr="config"/>
2766         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2767         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2768         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2769         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2770       </files>
2771     </component>
2772     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM7 CMSIS">
2773       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2774       <files>
2775         <!-- include folder / device header file -->
2776         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2777         <!-- startup / system file -->
2778         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2779         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.0" attr="config" condition="GCC"/>
2780         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2781         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2782         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2783       </files>
2784     </component>
2785
2786     <!-- Cortex-M23 -->
2787     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM23 CMSIS">
2788       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2789       <files>
2790         <!-- include folder / device header file -->
2791         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2792         <!-- startup / system file -->
2793         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.0" attr="config"/>
2794         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2795         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2796         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.0" attr="config"/>
2797         <!-- SAU configuration -->
2798         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2799       </files>
2800     </component>
2801     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM23 CMSIS">
2802       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2803       <files>
2804         <!-- include folder / device header file -->
2805         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2806         <!-- startup / system file -->
2807         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2808         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.0" attr="config" condition="GCC"/>
2809         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2810         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2811         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2812         <!-- SAU configuration -->
2813         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2814       </files>
2815     </component>
2816
2817     <!-- Cortex-M33 -->
2818     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM33 CMSIS">
2819       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2820       <files>
2821         <!-- include folder / device header file -->
2822         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2823         <!-- startup / system file -->
2824         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.0" attr="config"/>
2825         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2826         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2827         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2828         <!-- SAU configuration -->
2829         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2830       </files>
2831     </component>
2832     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM33 CMSIS">
2833       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2834       <files>
2835         <!-- include folder / device header file -->
2836         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2837         <!-- startup / system file -->
2838         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2839         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="GCC"/>
2840         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2841         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2842         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2843         <!-- SAU configuration -->
2844         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2845       </files>
2846     </component>
2847
2848     <!-- Cortex-M35P -->
2849     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM35P CMSIS">
2850       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2851       <files>
2852         <!-- include folder / device header file -->
2853         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2854         <!-- startup / system file -->
2855         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.0" attr="config"/>
2856         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2857         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2858         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2859         <!-- SAU configuration -->
2860         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2861       </files>
2862     </component>
2863     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM35P CMSIS">
2864       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2865       <files>
2866         <!-- include folder / device header file -->
2867         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2868         <!-- startup / system file -->
2869         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2870         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.0" attr="config" condition="GCC"/>
2871         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2872         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2873         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2874         <!-- SAU configuration -->
2875         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2876       </files>
2877     </component>
2878
2879     <!-- Cortex-SC000 -->
2880     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMSC000 CMSIS">
2881       <description>System and Startup for Generic Arm SC000 device</description>
2882       <files>
2883         <!-- include folder / device header file -->
2884         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2885         <!-- startup / system file -->
2886         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.0" attr="config"/>
2887         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2888         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2889         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2890         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2891       </files>
2892     </component>
2893     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMSC000 CMSIS">
2894       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2895       <files>
2896         <!-- include folder / device header file -->
2897         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2898         <!-- startup / system file -->
2899         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2900         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.0" attr="config" condition="GCC"/>
2901         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2902         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2903         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2904       </files>
2905     </component>
2906
2907     <!-- Cortex-SC300 -->
2908     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMSC300 CMSIS">
2909       <description>System and Startup for Generic Arm SC300 device</description>
2910       <files>
2911         <!-- include folder / device header file -->
2912         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2913         <!-- startup / system file -->
2914         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.0" attr="config"/>
2915         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2916         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2917         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2918         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2919       </files>
2920     </component>
2921     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMSC300 CMSIS">
2922       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2923       <files>
2924         <!-- include folder / device header file -->
2925         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2926         <!-- startup / system file -->
2927         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2928         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.0" attr="config" condition="GCC"/>
2929         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2930         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2931         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2932       </files>
2933     </component>
2934
2935     <!-- ARMv8MBL -->
2936     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMv8MBL CMSIS">
2937       <description>System and Startup for Generic Armv8-M Baseline device</description>
2938       <files>
2939         <!-- include folder / device header file -->
2940         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2941         <!-- startup / system file -->
2942         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.0" attr="config"/>
2943         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2944         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2945         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.0" attr="config"/>
2946         <!-- SAU configuration -->
2947         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2948       </files>
2949     </component>
2950     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MBL CMSIS">
2951       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2952       <files>
2953         <!-- include folder / device header file -->
2954         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2955         <!-- startup / system file -->
2956         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2957         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.0" attr="config" condition="GCC"/>
2958         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2959         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2960         <!-- SAU configuration -->
2961         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2962       </files>
2963     </component>
2964
2965     <!-- ARMv8MML -->
2966     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMv8MML CMSIS">
2967       <description>System and Startup for Generic Armv8-M Mainline device</description>
2968       <files>
2969         <!-- include folder / device header file -->
2970         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2971         <!-- startup / system file -->
2972         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.0" attr="config"/>
2973         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2974         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2975         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2976         <!-- SAU configuration -->
2977         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2978       </files>
2979     </component>
2980     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MML CMSIS">
2981       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2982       <files>
2983         <!-- include folder / device header file -->
2984         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2985         <!-- startup / system file -->
2986         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2987         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="GCC"/>
2988         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2989         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2990         <!-- SAU configuration -->
2991         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2992       </files>
2993     </component>
2994
2995     <!-- ARMv81MML -->
2996     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMv81MML CMSIS">
2997       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2998       <files>
2999         <!-- include folder / device header file -->
3000         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
3001         <!-- startup / system file -->
3002         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.0" attr="config"/>
3003         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"               version="1.0.0" attr="config" condition="ARMCC6"/>
3004         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
3005         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
3006         <!-- SAU configuration -->
3007         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
3008       </files>
3009     </component>
3010
3011     <!-- Cortex-A5 -->
3012     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
3013       <description>System and Startup for Generic Arm Cortex-A5 device</description>
3014       <files>
3015         <!-- include folder / device header file -->
3016         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
3017         <!-- startup / system / mmu files -->
3018         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3019         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3020         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3021         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3022         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
3023         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3024         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3025         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3026         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3027         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
3028         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
3029         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.0.0" attr="config"/>
3030
3031       </files>
3032     </component>
3033
3034     <!-- Cortex-A7 -->
3035     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3036       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3037       <files>
3038         <!-- include folder / device header file -->
3039         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3040         <!-- startup / system / mmu files -->
3041         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3042         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3043         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3044         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3045         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3046         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3047         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3048         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3049         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3050         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
3051         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
3052         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.0.0" attr="config"/>
3053       </files>
3054     </component>
3055
3056     <!-- Cortex-A9 -->
3057     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3058       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3059       <files>
3060         <!-- include folder / device header file -->
3061         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3062         <!-- startup / system / mmu files -->
3063         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3064         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3065         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3066         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3067         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3068         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3069         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3070         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3071         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3072         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
3073         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3074         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.0.0" attr="config"/>
3075       </files>
3076     </component>
3077
3078     <!-- IRQ Controller -->
3079     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3080       <description>IRQ Controller implementation using GIC</description>
3081       <files>
3082         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3083       </files>
3084     </component>
3085
3086     <!-- OS Tick -->
3087     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3088       <description>OS Tick implementation using Private Timer</description>
3089       <files>
3090         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3091       </files>
3092     </component>
3093
3094     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3095       <description>OS Tick implementation using Generic Physical Timer</description>
3096       <files>
3097         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3098       </files>
3099     </component>
3100
3101     <!-- CMSIS-DSP component -->
3102     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.6.0" isDefaultVariant="true" condition="CMSIS DSP">
3103       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3104       <files>
3105         <!-- CPU independent -->
3106         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3107         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3108
3109         <!-- CPU and Compiler dependent -->
3110         <!-- ARMCC -->
3111         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3112         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3113         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3114         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3115         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3116         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3117         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3118         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3119         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3120         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3121         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3122         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3123         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3124         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3125         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3126         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3127
3128         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3129         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3130         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3131         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3132         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3133         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3134         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3135         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3136         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3137         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3138         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3139         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3140         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3141         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3142         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3143         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3144
3145         <!-- GCC -->
3146         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3147         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3148         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3149         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3150         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3151         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3152         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3153         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3154
3155         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3156         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3157         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3158         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3159         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3160         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3161         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3162         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3163         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3164         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3165         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3166         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3167         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3168         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3169         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3170         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3171
3172         <!-- IAR -->
3173         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3174         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3175         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3176         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3177         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3178         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3179         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3180         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3181         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3182         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3183         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3184         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3185         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3186         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3187         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3188         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3189
3190         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3191         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3192         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3193         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3194         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3195         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3196         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3197         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3198         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3199         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3200         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3201         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3202         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3203         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3204         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3205         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3206
3207       </files>
3208     </component>
3209     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.6.0" condition="CMSIS DSP">
3210       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3211       <files>
3212         <!-- CPU independent -->
3213         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3214         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3215
3216         <!-- DSP sources (core) -->
3217         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3218         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3219         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3220         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3221         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3222         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3223         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3224         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3225         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3226         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3227
3228       </files>
3229     </component>
3230
3231     <!-- CMSIS-NN component -->
3232     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.1.0" condition="CMSIS NN">
3233       <description>CMSIS-NN Neural Network Library</description>
3234       <files>
3235         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3236         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3237
3238         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3239         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3240         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3241         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3242
3243         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3244         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3245         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3246         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3247         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3248         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3249         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3250         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3251         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3252         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3253         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3254         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3255
3256         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3257         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3258         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3259         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3260         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3261         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3262
3263         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3264         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3265         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3266         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3267         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3268
3269         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3270
3271         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3272         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3273       </files>
3274     </component>
3275
3276     <!-- CMSIS-RTOS Keil RTX component -->
3277     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3278       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3279       <RTE_Components_h>
3280         <!-- the following content goes into file 'RTE_Components.h' -->
3281         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3282         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3283       </RTE_Components_h>
3284       <files>
3285         <!-- CPU independent -->
3286         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3287         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3288         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3289
3290         <!-- RTX templates -->
3291         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3292         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3293         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3294         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3295         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3296         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3297         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3298         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3299         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3300         <!-- tool-chain specific template file -->
3301         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3302         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3303         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3304
3305         <!-- CPU and Compiler dependent -->
3306         <!-- ARMCC -->
3307         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3308         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3309         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3310         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3311         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3312         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3313         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3314         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3315         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3316         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3317         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3318         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3319         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3320         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3321         <!-- GCC -->
3322         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3323         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3324         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3325         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3326         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3327         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3328         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3329         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3330         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3331         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3332         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3333         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3334         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3335         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3336         <!-- IAR -->
3337         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3338         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3339         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3340         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3341         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3342         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3343         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3344         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3345         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3346         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3347         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3348         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3349         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3350         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3351       </files>
3352     </component>
3353     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3354     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3355       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3356       <RTE_Components_h>
3357         <!-- the following content goes into file 'RTE_Components.h' -->
3358         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3359         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3360       </RTE_Components_h>
3361       <files>
3362         <!-- CPU independent -->
3363         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3364         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3365         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3366
3367         <!-- RTX templates -->
3368         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3369         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3370         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3371         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3372         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3373         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3374         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3375         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3376         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3377         <!-- tool-chain specific template file -->
3378         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3379         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3380         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3381
3382         <!-- CPU and Compiler dependent -->
3383         <!-- ARMCC -->
3384         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3385         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3386         <!-- GCC -->
3387         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3388         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3389         <!-- IAR -->
3390       </files>
3391     </component>
3392
3393     <!-- CMSIS-RTOS Keil RTX5 component -->
3394     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.1" Capiversion="1.0.0" condition="RTOS RTX5">
3395       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3396       <RTE_Components_h>
3397         <!-- the following content goes into file 'RTE_Components.h' -->
3398         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3399         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3400       </RTE_Components_h>
3401       <files>
3402         <!-- RTX header file -->
3403         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3404         <!-- RTX compatibility module for API V1 -->
3405         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3406       </files>
3407     </component>
3408
3409     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3410     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3411       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3412       <RTE_Components_h>
3413         <!-- the following content goes into file 'RTE_Components.h' -->
3414         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3415         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3416       </RTE_Components_h>
3417       <files>
3418         <!-- RTX documentation -->
3419         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3420
3421         <!-- RTX header files -->
3422         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3423
3424         <!-- RTX configuration -->
3425         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3426         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3427
3428         <!-- RTX templates -->
3429         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3430         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3431         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3432         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3433         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3434         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3435         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3436         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3437         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3438         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3439
3440         <!-- RTX library configuration -->
3441         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3442
3443         <!-- RTX libraries (CPU and Compiler dependent) -->
3444         <!-- ARMCC -->
3445         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3446         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3447         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3448         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3449         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3450         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3451         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3452         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3453         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3454         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3455         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3456         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3457         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3458         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3459         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3460         <!-- GCC -->
3461         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3462         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3463         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3464         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3465         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3466         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3467         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3468         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3469         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3470         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3471         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3472         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3473         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3474         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3475         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3476         <!-- IAR -->
3477         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3478         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3479         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3480         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3481         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3482         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3483         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3484         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3485         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3486         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3487         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3488         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3489         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3490         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3491         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3492       </files>
3493     </component>
3494     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3495       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3496       <RTE_Components_h>
3497         <!-- the following content goes into file 'RTE_Components.h' -->
3498         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3499         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3500         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3501       </RTE_Components_h>
3502       <files>
3503         <!-- RTX documentation -->
3504         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3505
3506         <!-- RTX header files -->
3507         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3508
3509         <!-- RTX configuration -->
3510         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3511         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3512
3513         <!-- RTX templates -->
3514         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3515         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3516         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3517         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3518         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3519         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3520         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3521         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3522         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3523         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3524
3525         <!-- RTX library configuration -->
3526         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3527
3528         <!-- RTX libraries (CPU and Compiler dependent) -->
3529         <!-- ARMCC -->
3530         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3531         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3532         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3533         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3534         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3535         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3536         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3537         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3538         <!-- GCC -->
3539         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3540         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3541         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3542         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3543         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3544         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3545         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3546         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3547         <!-- IAR -->
3548         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3549         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3550         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3551         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3552         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3553         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3554         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3555         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3556       </files>
3557     </component>
3558     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5">
3559       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3560       <RTE_Components_h>
3561         <!-- the following content goes into file 'RTE_Components.h' -->
3562         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3563         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3564         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3565       </RTE_Components_h>
3566       <files>
3567         <!-- RTX documentation -->
3568         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3569
3570         <!-- RTX header files -->
3571         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3572
3573         <!-- RTX configuration -->
3574         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3575         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3576
3577         <!-- RTX templates -->
3578         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3579         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3580         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3581         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3582         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3583         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3584         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3585         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3586         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3587         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3588
3589         <!-- RTX sources (core) -->
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3596         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3597         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3602         <!-- RTX sources (library configuration) -->
3603         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3604         <!-- RTX sources (handlers ARMCC) -->
3605         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3606         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3607         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3608         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3609         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3610         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3611         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3612         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3613         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3614         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3615         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3616         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3617         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3618         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3619         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3620         <!-- RTX sources (handlers GCC) -->
3621         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3622         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3623         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3624         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3625         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3626         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3627         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3628         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3629         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3630         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3631         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3632         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3633         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3634         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3635         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3636         <!-- RTX sources (handlers IAR) -->
3637         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3638         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3639         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3640         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3641         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3642         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3643         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3644         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3645         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3646         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3647         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3648         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3649         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3650         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3651         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3652         <!-- OS Tick (SysTick) -->
3653         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3654       </files>
3655     </component>
3656     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3657       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3658       <RTE_Components_h>
3659         <!-- the following content goes into file 'RTE_Components.h' -->
3660         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3661         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3662         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3663       </RTE_Components_h>
3664       <files>
3665         <!-- RTX documentation -->
3666         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3667
3668         <!-- RTX header files -->
3669         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3670
3671         <!-- RTX configuration -->
3672         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3673         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3674
3675         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3676
3677         <!-- RTX templates -->
3678         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3679         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3680         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3681         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3682         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3683         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3684         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3685         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3686         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3687         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3688
3689         <!-- RTX sources (core) -->
3690         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3691         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3692         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3693         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3694         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3695         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3696         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3697         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3698         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3699         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3700         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3701         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3702         <!-- RTX sources (library configuration) -->
3703         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3704         <!-- RTX sources (handlers ARMCC) -->
3705         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3706         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3707         <!-- RTX sources (handlers GCC) -->
3708         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3709         <!-- RTX sources (handlers IAR) -->
3710         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3711       </files>
3712     </component>
3713     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3714       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3715       <RTE_Components_h>
3716         <!-- the following content goes into file 'RTE_Components.h' -->
3717         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3718         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3719         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3720         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3721       </RTE_Components_h>
3722       <files>
3723         <!-- RTX documentation -->
3724         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3725
3726         <!-- RTX header files -->
3727         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3728
3729         <!-- RTX configuration -->
3730         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3731         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3732
3733         <!-- RTX templates -->
3734         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3735         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3736         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3737         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3738         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3739         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3740         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3741         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3742         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3743         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3744
3745         <!-- RTX sources (core) -->
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3747         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3748         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3752         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3754         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3755         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3757         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3758         <!-- RTX sources (library configuration) -->
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3760         <!-- RTX sources (ARMCC handlers) -->
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3763         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3764         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3765         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3766         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3767         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3768         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3769         <!-- RTX sources (GCC handlers) -->
3770         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3771         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3772         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3773         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3774         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3775         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3776         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3777         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3778         <!-- RTX sources (IAR handlers) -->
3779         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3780         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3781         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3782         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3783         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3784         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3785         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3786         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3787         <!-- OS Tick (SysTick) -->
3788         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3789       </files>
3790     </component>
3791
3792     <!-- CMSIS-Driver Custom components -->
3793     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3794       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3795       <files>
3796         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3797         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3798       </files>
3799     </component>
3800     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3801       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3802       <files>
3803         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3804         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3805       </files>
3806     </component>
3807     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3808       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3809       <files>
3810         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3811         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3812       </files>
3813     </component>
3814     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3815       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3816       <files>
3817         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3818         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3819       </files>
3820     </component>
3821     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3822       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3823       <files>
3824         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3825         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3826       </files>
3827     </component>
3828     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3829       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3830       <files>
3831         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3832         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3833       </files>
3834     </component>
3835     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3836       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3837       <files>
3838         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3839         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3840       </files>
3841     </component>
3842     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3843       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3844       <files>
3845         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3846         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3847       </files>
3848     </component>
3849     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3850       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3851       <files>
3852         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3853         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3854         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3855         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3856       </files>
3857     </component>
3858     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3859       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3860       <files>
3861         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3862         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3863       </files>
3864     </component>
3865     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3866       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3867       <files>
3868         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3869         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3870       </files>
3871     </component>
3872     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3873       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3874       <files>
3875         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3876         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3877       </files>
3878     </component>
3879     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3880       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3881       <files>
3882         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3883         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3884       </files>
3885     </component>
3886     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0-beta" Capiversion="1.0.0-beta">
3887       <description>Access to #include Driver_WiFi.h file</description>
3888       <files>
3889         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3890         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3891       </files>
3892     </component>
3893   </components>
3894
3895   <boards>
3896     <board name="uVision Simulator" vendor="Keil">
3897       <description>uVision Simulator</description>
3898       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3899       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3900       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3901       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3902       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3903       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3904       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3905       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3906       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3907       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3908       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3909       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3910       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3911       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3912       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3913       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3914       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3915       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3916       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3917       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3918       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3919       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3920       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3921       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3922     </board>
3923
3924     <board name="EWARM Simulator" vendor="IAR">
3925       <description>EWARM Simulator</description>
3926       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3927       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3928       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3929       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3930       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3931       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3932       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3933       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3934       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3935       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3936       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3937       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3938       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3939       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3940       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3941       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3942       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3943       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3944       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3945       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3946       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3947       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3948       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3949       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3950     </board>
3951   </boards>
3952
3953   <examples>
3954     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3955       <description>DSP_Lib Class Marks example</description>
3956       <board name="uVision Simulator" vendor="Keil"/>
3957       <project>
3958         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3959       </project>
3960       <attributes>
3961         <component Cclass="CMSIS" Cgroup="CORE"/>
3962         <component Cclass="CMSIS" Cgroup="DSP"/>
3963         <component Cclass="Device" Cgroup="Startup"/>
3964         <category>Getting Started</category>
3965       </attributes>
3966     </example>
3967
3968     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3969       <description>DSP_Lib Convolution example</description>
3970       <board name="uVision Simulator" vendor="Keil"/>
3971       <project>
3972         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3973       </project>
3974       <attributes>
3975         <component Cclass="CMSIS" Cgroup="CORE"/>
3976         <component Cclass="CMSIS" Cgroup="DSP"/>
3977         <component Cclass="Device" Cgroup="Startup"/>
3978         <category>Getting Started</category>
3979       </attributes>
3980     </example>
3981
3982     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3983       <description>DSP_Lib Dotproduct example</description>
3984       <board name="uVision Simulator" vendor="Keil"/>
3985       <project>
3986         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3987       </project>
3988       <attributes>
3989         <component Cclass="CMSIS" Cgroup="CORE"/>
3990         <component Cclass="CMSIS" Cgroup="DSP"/>
3991         <component Cclass="Device" Cgroup="Startup"/>
3992         <category>Getting Started</category>
3993       </attributes>
3994     </example>
3995
3996     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3997       <description>DSP_Lib FFT Bin example</description>
3998       <board name="uVision Simulator" vendor="Keil"/>
3999       <project>
4000         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
4001       </project>
4002       <attributes>
4003         <component Cclass="CMSIS" Cgroup="CORE"/>
4004         <component Cclass="CMSIS" Cgroup="DSP"/>
4005         <component Cclass="Device" Cgroup="Startup"/>
4006         <category>Getting Started</category>
4007       </attributes>
4008     </example>
4009
4010     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4011       <description>DSP_Lib FIR example</description>
4012       <board name="uVision Simulator" vendor="Keil"/>
4013       <project>
4014         <environment name="uv" load="arm_fir_example.uvprojx"/>
4015       </project>
4016       <attributes>
4017         <component Cclass="CMSIS" Cgroup="CORE"/>
4018         <component Cclass="CMSIS" Cgroup="DSP"/>
4019         <component Cclass="Device" Cgroup="Startup"/>
4020         <category>Getting Started</category>
4021       </attributes>
4022     </example>
4023
4024     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4025       <description>DSP_Lib Graphic Equalizer example</description>
4026       <board name="uVision Simulator" vendor="Keil"/>
4027       <project>
4028         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4029       </project>
4030       <attributes>
4031         <component Cclass="CMSIS" Cgroup="CORE"/>
4032         <component Cclass="CMSIS" Cgroup="DSP"/>
4033         <component Cclass="Device" Cgroup="Startup"/>
4034         <category>Getting Started</category>
4035       </attributes>
4036     </example>
4037
4038     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4039       <description>DSP_Lib Linear Interpolation example</description>
4040       <board name="uVision Simulator" vendor="Keil"/>
4041       <project>
4042         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4043       </project>
4044       <attributes>
4045         <component Cclass="CMSIS" Cgroup="CORE"/>
4046         <component Cclass="CMSIS" Cgroup="DSP"/>
4047         <component Cclass="Device" Cgroup="Startup"/>
4048         <category>Getting Started</category>
4049       </attributes>
4050     </example>
4051
4052     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4053       <description>DSP_Lib Matrix example</description>
4054       <board name="uVision Simulator" vendor="Keil"/>
4055       <project>
4056         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4057       </project>
4058       <attributes>
4059         <component Cclass="CMSIS" Cgroup="CORE"/>
4060         <component Cclass="CMSIS" Cgroup="DSP"/>
4061         <component Cclass="Device" Cgroup="Startup"/>
4062         <category>Getting Started</category>
4063       </attributes>
4064     </example>
4065
4066     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4067       <description>DSP_Lib Signal Convergence example</description>
4068       <board name="uVision Simulator" vendor="Keil"/>
4069       <project>
4070         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4071       </project>
4072       <attributes>
4073         <component Cclass="CMSIS" Cgroup="CORE"/>
4074         <component Cclass="CMSIS" Cgroup="DSP"/>
4075         <component Cclass="Device" Cgroup="Startup"/>
4076         <category>Getting Started</category>
4077       </attributes>
4078     </example>
4079
4080     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4081       <description>DSP_Lib Sinus/Cosinus example</description>
4082       <board name="uVision Simulator" vendor="Keil"/>
4083       <project>
4084         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4085       </project>
4086       <attributes>
4087         <component Cclass="CMSIS" Cgroup="CORE"/>
4088         <component Cclass="CMSIS" Cgroup="DSP"/>
4089         <component Cclass="Device" Cgroup="Startup"/>
4090         <category>Getting Started</category>
4091       </attributes>
4092     </example>
4093
4094     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4095       <description>DSP_Lib Variance example</description>
4096       <board name="uVision Simulator" vendor="Keil"/>
4097       <project>
4098         <environment name="uv" load="arm_variance_example.uvprojx"/>
4099       </project>
4100       <attributes>
4101         <component Cclass="CMSIS" Cgroup="CORE"/>
4102         <component Cclass="CMSIS" Cgroup="DSP"/>
4103         <component Cclass="Device" Cgroup="Startup"/>
4104         <category>Getting Started</category>
4105       </attributes>
4106     </example>
4107
4108     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4109       <description>Neural Network CIFAR10 example</description>
4110       <board name="uVision Simulator" vendor="Keil"/>
4111       <project>
4112         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4113       </project>
4114       <attributes>
4115         <component Cclass="CMSIS" Cgroup="CORE"/>
4116         <component Cclass="CMSIS" Cgroup="DSP"/>
4117         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4118         <component Cclass="Device" Cgroup="Startup"/>
4119         <category>Getting Started</category>
4120       </attributes>
4121     </example>
4122
4123     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4124       <description>Neural Network CIFAR10 example</description>
4125       <board name="EWARM Simulator" vendor="IAR"/>
4126       <project>
4127         <environment name="iar" load="NN-example-cifar10.ewp"/>
4128       </project>
4129       <attributes>
4130         <component Cclass="CMSIS" Cgroup="CORE"/>
4131         <component Cclass="CMSIS" Cgroup="DSP"/>
4132         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4133         <component Cclass="Device" Cgroup="Startup"/>
4134         <category>Getting Started</category>
4135       </attributes>
4136     </example>
4137
4138     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4139       <description>Neural Network GRU example</description>
4140       <board name="uVision Simulator" vendor="Keil"/>
4141       <project>
4142         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4143       </project>
4144       <attributes>
4145         <component Cclass="CMSIS" Cgroup="CORE"/>
4146         <component Cclass="CMSIS" Cgroup="DSP"/>
4147         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4148         <component Cclass="Device" Cgroup="Startup"/>
4149         <category>Getting Started</category>
4150       </attributes>
4151     </example>
4152
4153     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4154       <description>Neural Network GRU example</description>
4155       <board name="EWARM Simulator" vendor="IAR"/>
4156       <project>
4157         <environment name="iar" load="NN-example-gru.ewp"/>
4158       </project>
4159       <attributes>
4160         <component Cclass="CMSIS" Cgroup="CORE"/>
4161         <component Cclass="CMSIS" Cgroup="DSP"/>
4162         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4163         <component Cclass="Device" Cgroup="Startup"/>
4164         <category>Getting Started</category>
4165       </attributes>
4166     </example>
4167
4168     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4169       <description>CMSIS-RTOS2 Blinky example</description>
4170       <board name="uVision Simulator" vendor="Keil"/>
4171       <project>
4172         <environment name="uv" load="Blinky.uvprojx"/>
4173       </project>
4174       <attributes>
4175         <component Cclass="CMSIS" Cgroup="CORE"/>
4176         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4177         <component Cclass="Device" Cgroup="Startup"/>
4178         <category>Getting Started</category>
4179       </attributes>
4180     </example>
4181
4182     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4183       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4184       <board name="uVision Simulator" vendor="Keil"/>
4185       <project>
4186         <environment name="uv" load="Blinky.uvprojx"/>
4187       </project>
4188       <attributes>
4189         <component Cclass="CMSIS" Cgroup="CORE"/>
4190         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4191         <component Cclass="Device" Cgroup="Startup"/>
4192         <category>Getting Started</category>
4193       </attributes>
4194     </example>
4195
4196     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4197       <description>CMSIS-RTOS2 Message Queue Example</description>
4198       <board name="uVision Simulator" vendor="Keil"/>
4199       <project>
4200         <environment name="uv" load="MsqQueue.uvprojx"/>
4201       </project>
4202       <attributes>
4203         <component Cclass="CMSIS" Cgroup="CORE"/>
4204         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4205         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4206         <component Cclass="Device" Cgroup="Startup"/>
4207         <category>Getting Started</category>
4208       </attributes>
4209     </example>
4210
4211     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4212       <description>CMSIS-RTOS2 Memory Pool Example</description>
4213       <board name="uVision Simulator" vendor="Keil"/>
4214       <project>
4215         <environment name="uv" load="MemPool.uvprojx"/>
4216       </project>
4217       <attributes>
4218         <component Cclass="CMSIS" Cgroup="CORE"/>
4219         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4220         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4221         <component Cclass="Device" Cgroup="Startup"/>
4222         <category>Getting Started</category>
4223       </attributes>
4224     </example>
4225
4226     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4227       <description>Bare-metal secure/non-secure example without RTOS</description>
4228       <board name="uVision Simulator" vendor="Keil"/>
4229       <project>
4230         <environment name="uv" load="NoRTOS.uvmpw"/>
4231       </project>
4232       <attributes>
4233         <component Cclass="CMSIS" Cgroup="CORE"/>
4234         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4235         <component Cclass="Device" Cgroup="Startup"/>
4236         <category>Getting Started</category>
4237       </attributes>
4238     </example>
4239
4240     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4241       <description>Secure/non-secure RTOS example with thread context management</description>
4242       <board name="uVision Simulator" vendor="Keil"/>
4243       <project>
4244         <environment name="uv" load="RTOS.uvmpw"/>
4245       </project>
4246       <attributes>
4247         <component Cclass="CMSIS" Cgroup="CORE"/>
4248         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4249         <component Cclass="Device" Cgroup="Startup"/>
4250         <category>Getting Started</category>
4251       </attributes>
4252     </example>
4253
4254     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4255       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4256       <board name="uVision Simulator" vendor="Keil"/>
4257       <project>
4258         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4259       </project>
4260       <attributes>
4261         <component Cclass="CMSIS" Cgroup="CORE"/>
4262         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4263         <component Cclass="Device" Cgroup="Startup"/>
4264         <category>Getting Started</category>
4265       </attributes>
4266     </example>
4267
4268   </examples>
4269
4270 </package>