begriffs open source - cmsis/blob - main/Core_A/html/group__GIC__functions.html

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 128 <a href="#nested-classes">Data Structures</a> &#124;
 129 <a href="#define-members">Macros</a> &#124;
 130 <a href="#func-members">Functions</a>  </div>
 131   <div class="headertitle"><div class="title">Generic Interrupt Controller Functions<div class="ingroups"><a class="el" href="group__CMSIS__Core__FunctionInterface.html">Core Peripherals</a></div></div></div>
 132 </div><!--header-->
 133 <div class="contents">
 134
 135 <p>The Generic Interrupt Controller Functions grant access to the configuration, control and status registers of the Generic Interrupt Controller (GIC).
 136 <a href="#details">More...</a></p>
 137 <table class="memberdecls">
 138 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
 139 Data Structures</h2></td></tr>
 140 <tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structGICInterface__Type.html">GICInterface_Type</a></td></tr>
 141 <tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Structure type to access the Generic Interrupt Controller Interface (GICC)  <a href="structGICInterface__Type.html#details">More...</a><br /></td></tr>
 142 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 143 <tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structGICDistributor__Type.html">GICDistributor_Type</a></td></tr>
 144 <tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Structure type to access the Generic Interrupt Controller Distributor (GICD)  <a href="structGICDistributor__Type.html#details">More...</a><br /></td></tr>
 145 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 146 </table><table class="memberdecls">
 147 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
 148 Macros</h2></td></tr>
 149 <tr class="memitem:ga82e193c0016a9377274756b2673464a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga82e193c0016a9377274756b2673464a6">GICDistributor</a>&#160;&#160;&#160;((<a class="el" href="structGICDistributor__Type.html">GICDistributor_Type</a>      *)     GIC_DISTRIBUTOR_BASE )</td></tr>
 150 <tr class="memdesc:ga82e193c0016a9377274756b2673464a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">GIC Distributor register set access pointer.  <br /></td></tr>
 151 <tr class="separator:ga82e193c0016a9377274756b2673464a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 152 <tr class="memitem:ga31a083dbdc5cb84178dbf184286180e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga31a083dbdc5cb84178dbf184286180e3">GICInterface</a>&#160;&#160;&#160;((<a class="el" href="structGICInterface__Type.html">GICInterface_Type</a>        *)     GIC_INTERFACE_BASE )</td></tr>
 153 <tr class="memdesc:ga31a083dbdc5cb84178dbf184286180e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">GIC Interface register set access pointer.  <br /></td></tr>
 154 <tr class="separator:ga31a083dbdc5cb84178dbf184286180e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 155 </table><table class="memberdecls">
 156 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 157 Functions</h2></td></tr>
 158 <tr class="memitem:ga0f44df6823e90178183257e096e5cac6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga0f44df6823e90178183257e096e5cac6">GIC_EnableDistributor</a> (void)</td></tr>
 159 <tr class="memdesc:ga0f44df6823e90178183257e096e5cac6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the interrupt distributor using the GIC's CTLR register.  <br /></td></tr>
 160 <tr class="separator:ga0f44df6823e90178183257e096e5cac6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 161 <tr class="memitem:ga363311538d4a4d750197b9936505d466"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga363311538d4a4d750197b9936505d466">GIC_DisableDistributor</a> (void)</td></tr>
 162 <tr class="memdesc:ga363311538d4a4d750197b9936505d466"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the interrupt distributor using the GIC's CTLR register.  <br /></td></tr>
 163 <tr class="separator:ga363311538d4a4d750197b9936505d466"><td class="memSeparator" colspan="2">&#160;</td></tr>
 164 <tr class="memitem:ga7d93d39736ef5e379e6511430ee6e75f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga7d93d39736ef5e379e6511430ee6e75f">GIC_DistributorInfo</a> (void)</td></tr>
 165 <tr class="memdesc:ga7d93d39736ef5e379e6511430ee6e75f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the GIC's TYPER register.  <br /></td></tr>
 166 <tr class="separator:ga7d93d39736ef5e379e6511430ee6e75f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 167 <tr class="memitem:ga1481d0cdf78f8c93fb2a710a519c4dc6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga1481d0cdf78f8c93fb2a710a519c4dc6">GIC_DistributorImplementer</a> (void)</td></tr>
 168 <tr class="memdesc:ga1481d0cdf78f8c93fb2a710a519c4dc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads the GIC's IIDR register.  <br /></td></tr>
 169 <tr class="separator:ga1481d0cdf78f8c93fb2a710a519c4dc6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 170 <tr class="memitem:gae86bba705d0d4ef812b84d29d7b3ca2b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gae86bba705d0d4ef812b84d29d7b3ca2b">GIC_SetTarget</a> (IRQn_Type IRQn, uint32_t cpu_target)</td></tr>
 171 <tr class="memdesc:gae86bba705d0d4ef812b84d29d7b3ca2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the GIC's ITARGETSR register for the given interrupt.  <br /></td></tr>
 172 <tr class="separator:gae86bba705d0d4ef812b84d29d7b3ca2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 173 <tr class="memitem:gafccf881f9517592f30489bcabcb738a8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gafccf881f9517592f30489bcabcb738a8">GIC_GetTarget</a> (IRQn_Type IRQn)</td></tr>
 174 <tr class="memdesc:gafccf881f9517592f30489bcabcb738a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the GIC's ITARGETSR register.  <br /></td></tr>
 175 <tr class="separator:gafccf881f9517592f30489bcabcb738a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 176 <tr class="memitem:ga758e5600d7f891e4f2f551bb45d07fce"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga758e5600d7f891e4f2f551bb45d07fce">GIC_EnableInterface</a> (void)</td></tr>
 177 <tr class="memdesc:ga758e5600d7f891e4f2f551bb45d07fce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the CPU's interrupt interface.  <br /></td></tr>
 178 <tr class="separator:ga758e5600d7f891e4f2f551bb45d07fce"><td class="memSeparator" colspan="2">&#160;</td></tr>
 179 <tr class="memitem:ga0605877ad627c1f4320e518725fd103e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga0605877ad627c1f4320e518725fd103e">GIC_DisableInterface</a> (void)</td></tr>
 180 <tr class="memdesc:ga0605877ad627c1f4320e518725fd103e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the CPU's interrupt interface.  <br /></td></tr>
 181 <tr class="separator:ga0605877ad627c1f4320e518725fd103e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 182 <tr class="memitem:gafc08bbc58b25fef0d24003313fd16eb8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> IRQn_Type&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gafc08bbc58b25fef0d24003313fd16eb8">GIC_AcknowledgePending</a> (void)</td></tr>
 183 <tr class="memdesc:gafc08bbc58b25fef0d24003313fd16eb8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the CPU's IAR register.  <br /></td></tr>
 184 <tr class="separator:gafc08bbc58b25fef0d24003313fd16eb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 185 <tr class="memitem:gac23f090f572a058b4a737f6613ded9cd"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gac23f090f572a058b4a737f6613ded9cd">GIC_EndInterrupt</a> (IRQn_Type IRQn)</td></tr>
 186 <tr class="memdesc:gac23f090f572a058b4a737f6613ded9cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes the given interrupt number to the CPU's EOIR register.  <br /></td></tr>
 187 <tr class="separator:gac23f090f572a058b4a737f6613ded9cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
 188 <tr class="memitem:gaeba215d9c4ec3599e0a168800288c3f3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gaeba215d9c4ec3599e0a168800288c3f3">GIC_EnableIRQ</a> (IRQn_Type IRQn)</td></tr>
 189 <tr class="memdesc:gaeba215d9c4ec3599e0a168800288c3f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables the given interrupt using GIC's ISENABLER register.  <br /></td></tr>
 190 <tr class="separator:gaeba215d9c4ec3599e0a168800288c3f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 191 <tr class="memitem:ga2102399d255690c0674209a6faeec13d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga2102399d255690c0674209a6faeec13d">GIC_DisableIRQ</a> (IRQn_Type IRQn)</td></tr>
 192 <tr class="memdesc:ga2102399d255690c0674209a6faeec13d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disables the given interrupt using GIC's ICENABLER register.  <br /></td></tr>
 193 <tr class="separator:ga2102399d255690c0674209a6faeec13d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 194 <tr class="memitem:ga18fbddf7f3594df141c97f61a71da47c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga18fbddf7f3594df141c97f61a71da47c">GIC_SetPendingIRQ</a> (IRQn_Type IRQn)</td></tr>
 195 <tr class="memdesc:ga18fbddf7f3594df141c97f61a71da47c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the given interrupt as pending using GIC's ISPENDR register.  <br /></td></tr>
 196 <tr class="separator:ga18fbddf7f3594df141c97f61a71da47c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 197 <tr class="memitem:ga5ad17ad70f23d1ff36015ffac33d383d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga5ad17ad70f23d1ff36015ffac33d383d">GIC_ClearPendingIRQ</a> (IRQn_Type IRQn)</td></tr>
 198 <tr class="memdesc:ga5ad17ad70f23d1ff36015ffac33d383d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clears the given interrupt from being pending using GIC's ICPENDR register.  <br /></td></tr>
 199 <tr class="separator:ga5ad17ad70f23d1ff36015ffac33d383d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 200 <tr class="memitem:ga27b9862b58290276851ec669cabf0f71"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71">GIC_SetPriority</a> (IRQn_Type IRQn, uint32_t priority)</td></tr>
 201 <tr class="memdesc:ga27b9862b58290276851ec669cabf0f71"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the priority for the given interrupt in the GIC's IPRIORITYR register.  <br /></td></tr>
 202 <tr class="separator:ga27b9862b58290276851ec669cabf0f71"><td class="memSeparator" colspan="2">&#160;</td></tr>
 203 <tr class="memitem:ga397048004654f792649742f95bf8ae67"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga397048004654f792649742f95bf8ae67">GIC_GetPriority</a> (IRQn_Type IRQn)</td></tr>
 204 <tr class="memdesc:ga397048004654f792649742f95bf8ae67"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the current interrupt priority from GIC's IPRIORITYR register.  <br /></td></tr>
 205 <tr class="separator:ga397048004654f792649742f95bf8ae67"><td class="memSeparator" colspan="2">&#160;</td></tr>
 206 <tr class="memitem:gaa5eb0e76dbc89596e1ce47ddb9edc4a0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gaa5eb0e76dbc89596e1ce47ddb9edc4a0">GIC_SetInterfacePriorityMask</a> (uint32_t priority)</td></tr>
 207 <tr class="memdesc:gaa5eb0e76dbc89596e1ce47ddb9edc4a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the interrupt priority mask using CPU's PMR register.  <br /></td></tr>
 208 <tr class="separator:gaa5eb0e76dbc89596e1ce47ddb9edc4a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 210 <tr class="memdesc:ga2c5f9e5637560fc9d5c29d772580a728"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the current interrupt priority mask from CPU's PMR register.  <br /></td></tr>
 211 <tr class="separator:ga2c5f9e5637560fc9d5c29d772580a728"><td class="memSeparator" colspan="2">&#160;</td></tr>
 212 <tr class="memitem:ga5dfedeb5403656a77e0fef4e1cc2c0c6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga5dfedeb5403656a77e0fef4e1cc2c0c6">GIC_SetBinaryPoint</a> (uint32_t binary_point)</td></tr>
 213 <tr class="memdesc:ga5dfedeb5403656a77e0fef4e1cc2c0c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the group priority and subpriority split point using CPU's BPR register.  <br /></td></tr>
 214 <tr class="separator:ga5dfedeb5403656a77e0fef4e1cc2c0c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 216 <tr class="memdesc:gaa7046d8206ddd4696716726e68f85906"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the current group priority and subpriority split point from CPU's BPR register.  <br /></td></tr>
 217 <tr class="separator:gaa7046d8206ddd4696716726e68f85906"><td class="memSeparator" colspan="2">&#160;</td></tr>
 218 <tr class="memitem:gabc88483ecf94a2c222b644ecfa60eb9f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gabc88483ecf94a2c222b644ecfa60eb9f">GIC_GetIRQStatus</a> (IRQn_Type IRQn)</td></tr>
 219 <tr class="memdesc:gabc88483ecf94a2c222b644ecfa60eb9f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the status for a given interrupt.  <br /></td></tr>
 220 <tr class="separator:gabc88483ecf94a2c222b644ecfa60eb9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 221 <tr class="memitem:ga2de8850780af26e802ee4cc43e9da6e9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga2de8850780af26e802ee4cc43e9da6e9">GIC_SendSGI</a> (IRQn_Type IRQn, uint32_t target_list, uint32_t filter_list)</td></tr>
 222 <tr class="memdesc:ga2de8850780af26e802ee4cc43e9da6e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generate a software interrupt using GIC's SGIR register.  <br /></td></tr>
 223 <tr class="separator:ga2de8850780af26e802ee4cc43e9da6e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 224 <tr class="memitem:ga8bb27e1bab132a8df44190adb996c2a1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga8bb27e1bab132a8df44190adb996c2a1">GIC_GetHighPendingIRQ</a> (void)</td></tr>
 225 <tr class="memdesc:ga8bb27e1bab132a8df44190adb996c2a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the interrupt number of the highest interrupt pending from CPU's HPPIR register.  <br /></td></tr>
 226 <tr class="separator:ga8bb27e1bab132a8df44190adb996c2a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 227 <tr class="memitem:gaba1b2665cdda47fc0bc3d7b90690dc50"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gaba1b2665cdda47fc0bc3d7b90690dc50">GIC_GetInterfaceId</a> (void)</td></tr>
 228 <tr class="memdesc:gaba1b2665cdda47fc0bc3d7b90690dc50"><td class="mdescLeft">&#160;</td><td class="mdescRight">Provides information about the implementer and revision of the CPU interface.  <br /></td></tr>
 229 <tr class="separator:gaba1b2665cdda47fc0bc3d7b90690dc50"><td class="memSeparator" colspan="2">&#160;</td></tr>
 230 <tr class="memitem:ga07acd03d02683bb6e33e7f57f5f371d1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga07acd03d02683bb6e33e7f57f5f371d1">GIC_DistInit</a> (void)</td></tr>
 231 <tr class="memdesc:ga07acd03d02683bb6e33e7f57f5f371d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the interrupt distributor.  <br /></td></tr>
 232 <tr class="separator:ga07acd03d02683bb6e33e7f57f5f371d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 233 <tr class="memitem:ga1c93f8af9f428cda8ec066bf4bfbade9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga1c93f8af9f428cda8ec066bf4bfbade9">GIC_CPUInterfaceInit</a> (void)</td></tr>
 234 <tr class="memdesc:ga1c93f8af9f428cda8ec066bf4bfbade9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the CPU's interrupt interface.  <br /></td></tr>
 235 <tr class="separator:ga1c93f8af9f428cda8ec066bf4bfbade9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 236 <tr class="memitem:ga818881f69aae3eef6eb996bee6f6c63e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga818881f69aae3eef6eb996bee6f6c63e">GIC_Enable</a> (void)</td></tr>
 237 <tr class="memdesc:ga818881f69aae3eef6eb996bee6f6c63e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize and enable the GIC.  <br /></td></tr>
 238 <tr class="separator:ga818881f69aae3eef6eb996bee6f6c63e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 239 </table>
 240 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 241 <p>Reference: <a href="http://infocenter.arm.com/help/topic/com.arm.doc.ihi0069c/index.html">Generic Interrupt Controller Architecture Specificaton</a>.</p>
 242 <p>The following table shows the register naming of CMSIS in correlation with various technical reference manuals.</p>
 243 <table class="markdownTable">
 244 <tr class="markdownTableHead">
 245 <th class="markdownTableHeadLeft">CMSIS Register Name   </th><th class="markdownTableHeadLeft">Cortex-A5 TRM   </th><th class="markdownTableHeadLeft">Cortex-A7 TRM   </th><th class="markdownTableHeadLeft">Cortex-A9 TRM    </th></tr>
 246 <tr class="markdownTableRowOdd">
 247 <td class="markdownTableBodyLeft"><b>GIC Distributor</b>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 248 <tr class="markdownTableRowEven">
 249 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a6ca67d9838ab3425864207c3a0399bd7">GICDistributor-&gt;CTLR</a>   </td><td class="markdownTableBodyLeft">ICDDCR   </td><td class="markdownTableBodyLeft">GICD_CTLR   </td><td class="markdownTableBodyLeft">ICDDCR    </td></tr>
 250 <tr class="markdownTableRowOdd">
 251 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a405823d97dc90dd9d397a3980e2cd207">GICDistributor-&gt;TYPER</a>   </td><td class="markdownTableBodyLeft">ICDICTR   </td><td class="markdownTableBodyLeft">GICD_TYPER   </td><td class="markdownTableBodyLeft">ICDICTR    </td></tr>
 252 <tr class="markdownTableRowEven">
 253 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#acebf65dae4cb82cd3c7deeefca9c9722">GICDistributor-&gt;IIDR</a>   </td><td class="markdownTableBodyLeft">ICDIIDR   </td><td class="markdownTableBodyLeft">GICD_IIDR   </td><td class="markdownTableBodyLeft">ICDIIDR    </td></tr>
 254 <tr class="markdownTableRowOdd">
 255 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#ae24f260e27065660a2059803293084f2">GICDistributor-&gt;STATUSR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 256 <tr class="markdownTableRowEven">
 257 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#afbdd372578e2cd6f998320282cc8ed25">GICDistributor-&gt;SETSPI_NSR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 258 <tr class="markdownTableRowOdd">
 259 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a2f584d3fbeaa355faf234f2ee57d1168">GICDistributor-&gt;CLRSPI_NSR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 260 <tr class="markdownTableRowEven">
 261 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a6a9effdd633c6e75651d9f53caace306">GICDistributor-&gt;IGROUPR[]</a>   </td><td class="markdownTableBodyLeft">ICDISR   </td><td class="markdownTableBodyLeft">GICD_IGROUPRn   </td><td class="markdownTableBodyLeft">ICDISRn    </td></tr>
 262 <tr class="markdownTableRowOdd">
 263 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a1da3a2066b64644a0bb8a3066075ba87">GICDistributor-&gt;ISENABLER[]</a>   </td><td class="markdownTableBodyLeft">ICDISER   </td><td class="markdownTableBodyLeft">GICD_ISENABLERn   </td><td class="markdownTableBodyLeft">ICDISERn    </td></tr>
 264 <tr class="markdownTableRowEven">
 265 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a390fa9f2f460951b2c6094932d890807">GICDistributor-&gt;ICENABLER[]</a>   </td><td class="markdownTableBodyLeft">ICDICER   </td><td class="markdownTableBodyLeft">GICD_ICENABLERn   </td><td class="markdownTableBodyLeft">ICDICERn    </td></tr>
 266 <tr class="markdownTableRowOdd">
 267 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a1c15cd75ce30d8946792e2a1a19556a5">GICDistributor-&gt;ISPENDR[]</a>   </td><td class="markdownTableBodyLeft">ICDISPR   </td><td class="markdownTableBodyLeft">GICD_ISPENDRn   </td><td class="markdownTableBodyLeft">ICDISPRn    </td></tr>
 268 <tr class="markdownTableRowEven">
 269 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a0155cb4637845258e4ee76cd93cca2a6">GICDistributor-&gt;ICPENDR[]</a>   </td><td class="markdownTableBodyLeft">ICDICPR   </td><td class="markdownTableBodyLeft">GICD_ICPENDRn   </td><td class="markdownTableBodyLeft">ICDICPRn    </td></tr>
 270 <tr class="markdownTableRowOdd">
 271 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a5eb8e1ef5a88293e2759c41f6057ccc4">GICDistributor-&gt;ISACTIVER[]</a>   </td><td class="markdownTableBodyLeft">ICDABR   </td><td class="markdownTableBodyLeft">GICD_ISACTIVERn   </td><td class="markdownTableBodyLeft">ICDABRn    </td></tr>
 272 <tr class="markdownTableRowEven">
 273 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#ac0fd4c1ad19b5a332e403bb9966ba967">GICDistributor-&gt;ICACTIVER[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICD_ICACTIVERn   </td><td class="markdownTableBodyLeft"></td></tr>
 274 <tr class="markdownTableRowOdd">
 275 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a08fa902293567e85dc6398dab58afaa9">GICDistributor-&gt;IPRIORITYR[]</a>   </td><td class="markdownTableBodyLeft">ICDIPR   </td><td class="markdownTableBodyLeft">GICD_IPRIORITYRn   </td><td class="markdownTableBodyLeft">ICDIPRn    </td></tr>
 276 <tr class="markdownTableRowEven">
 277 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a6f1b07d48d3a9199f2effec8492f721c">GICDistributor-&gt;ITARGETSR[]</a>   </td><td class="markdownTableBodyLeft">ICDIPTR   </td><td class="markdownTableBodyLeft">GICD_ITARGETSRn   </td><td class="markdownTableBodyLeft">ICDIPTRn    </td></tr>
 278 <tr class="markdownTableRowOdd">
 279 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a9b306a630388c795d3cd32fc2e23a2b5">GICDistributor-&gt;ICFGR[]</a>   </td><td class="markdownTableBodyLeft">ICDICFR   </td><td class="markdownTableBodyLeft">GICD_ICFGRn   </td><td class="markdownTableBodyLeft">ICDICFRn    </td></tr>
 280 <tr class="markdownTableRowEven">
 281 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#ae9eeb19ca95d0b95828f1f98700b5689">GICDistributor-&gt;IGRPMODR[0]</a>   </td><td class="markdownTableBodyLeft">ICDPPIS   </td><td class="markdownTableBodyLeft">GICD_PPISR   </td><td class="markdownTableBodyLeft">ppi_status    </td></tr>
 282 <tr class="markdownTableRowOdd">
 283 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#ae9eeb19ca95d0b95828f1f98700b5689">GICDistributor-&gt;IGRPMODR[31:1]</a>   </td><td class="markdownTableBodyLeft">ICDSPIS   </td><td class="markdownTableBodyLeft">GICD_SPISRn   </td><td class="markdownTableBodyLeft">spi_status    </td></tr>
 284 <tr class="markdownTableRowEven">
 285 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a644abefb7064e434db20cc6dab5fe5f1">GICDistributor-&gt;NSACR[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 286 <tr class="markdownTableRowOdd">
 287 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a6ac65c4a5394926cc9518753a00d4da1">GICDistributor-&gt;SGIR</a>   </td><td class="markdownTableBodyLeft">ICDSGIR   </td><td class="markdownTableBodyLeft">GICD_SGIR   </td><td class="markdownTableBodyLeft">ICDSGIR    </td></tr>
 288 <tr class="markdownTableRowEven">
 289 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a644a70cf4c12093c0277ce01f194b69b">GICDistributor-&gt;CPENDSGIR[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICD_CPENDSGIRn   </td><td class="markdownTableBodyLeft"></td></tr>
 290 <tr class="markdownTableRowOdd">
 291 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#ae40b4a50d9766c2bbf57441f68094f41">GICDistributor-&gt;SPENDSGIR[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICD_SPENDSGIRn   </td><td class="markdownTableBodyLeft"></td></tr>
 292 <tr class="markdownTableRowEven">
 293 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a73e0c679e5f45710deea474ab0d39cdb">GICDistributor-&gt;IROUTER[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 294 <tr class="markdownTableRowOdd">
 295 <td class="markdownTableBodyLeft"><b>GIC Interface</b>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 296 <tr class="markdownTableRowEven">
 297 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a5969edab40aa24e4d96e072af187a3a9">GICInterface-&gt;CTLR</a>   </td><td class="markdownTableBodyLeft">ICPICR   </td><td class="markdownTableBodyLeft">GICC_CTLR   </td><td class="markdownTableBodyLeft">ICCICR    </td></tr>
 298 <tr class="markdownTableRowOdd">
 299 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a0edadabc6e3ce1f36d820f0b52bc143b">GICInterface-&gt;PMR</a>   </td><td class="markdownTableBodyLeft">ICCIPMR   </td><td class="markdownTableBodyLeft">GICC_PMRn   </td><td class="markdownTableBodyLeft">ICCPMR    </td></tr>
 300 <tr class="markdownTableRowEven">
 301 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a949317484547dc1db89c9f7ab40d1829">GICInterface-&gt;BPR</a>   </td><td class="markdownTableBodyLeft">ICCBPR   </td><td class="markdownTableBodyLeft">GICC_BPR   </td><td class="markdownTableBodyLeft">ICCBPR    </td></tr>
 302 <tr class="markdownTableRowOdd">
 303 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#aa48569605fc0c163e1db35321b4c76ea">GICInterface-&gt;IAR</a>   </td><td class="markdownTableBodyLeft">ICCIAR   </td><td class="markdownTableBodyLeft">GICC_IAR   </td><td class="markdownTableBodyLeft">ICCIAR    </td></tr>
 304 <tr class="markdownTableRowEven">
 305 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a4b9baa43aae026438bad64e63df17cdb">GICInterface-&gt;EOIR</a>   </td><td class="markdownTableBodyLeft">ICCEOIR   </td><td class="markdownTableBodyLeft">GICC_EOIR   </td><td class="markdownTableBodyLeft">ICCEOIR    </td></tr>
 306 <tr class="markdownTableRowOdd">
 307 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a37762d42768ecb3d1302f34abc7f2821">GICInterface-&gt;RPR</a>   </td><td class="markdownTableBodyLeft">ICCRPR   </td><td class="markdownTableBodyLeft">GICC_RPR   </td><td class="markdownTableBodyLeft">ICCRPR    </td></tr>
 308 <tr class="markdownTableRowEven">
 309 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#af793cd280a74bf73cca8c4fedfc329d6">GICInterface-&gt;HPPIR</a>   </td><td class="markdownTableBodyLeft">ICCHPIR   </td><td class="markdownTableBodyLeft">GICC_HPPIR   </td><td class="markdownTableBodyLeft">ICCHPIR    </td></tr>
 310 <tr class="markdownTableRowOdd">
 311 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a6d3ca9eaae5e0ac38f20846a1e67180d">GICInterface-&gt;ABPR</a>   </td><td class="markdownTableBodyLeft">ICCABPR   </td><td class="markdownTableBodyLeft">GICC_ABPR   </td><td class="markdownTableBodyLeft">ICCABPR    </td></tr>
 312 <tr class="markdownTableRowEven">
 313 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a849e9ead6e9ced78dc6f0ba9256dd5a6">GICInterface-&gt;AIAR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_AIAR   </td><td class="markdownTableBodyLeft"></td></tr>
 314 <tr class="markdownTableRowOdd">
 315 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a89d5a920c2b91b4b7bd0312ba4c38a89">GICInterface-&gt;AEOIR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_AEOIR   </td><td class="markdownTableBodyLeft"></td></tr>
 316 <tr class="markdownTableRowEven">
 317 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a12f25dec95ab3dd13a477573fab4b9c8">GICInterface-&gt;AHPPIR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_AHPPIR   </td><td class="markdownTableBodyLeft"></td></tr>
 318 <tr class="markdownTableRowOdd">
 319 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#abd978b408fb69b7887be2c422f48ce7e">GICInterface-&gt;STATUSR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 320 <tr class="markdownTableRowEven">
 321 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#aebae4bdcd3930372d639b85c5c9301e8">GICInterface-&gt;APR[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_APR0   </td><td class="markdownTableBodyLeft"></td></tr>
 322 <tr class="markdownTableRowOdd">
 323 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#ade3473ace2a8bf7c79a0251457be20f4">GICInterface-&gt;NSAPR[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_NSAPR0   </td><td class="markdownTableBodyLeft"></td></tr>
 324 <tr class="markdownTableRowEven">
 325 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#aee78d0b6f64a7b47fbd730aabfcc86cf">GICInterface-&gt;IIDR</a>   </td><td class="markdownTableBodyLeft">ICCIIDR   </td><td class="markdownTableBodyLeft">GICC_IIDR   </td><td class="markdownTableBodyLeft">ICCIDR    </td></tr>
 326 <tr class="markdownTableRowOdd">
 327 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a554bd1f88421df3189c664b9fd9c02aa">GICInterface-&gt;DIR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_DIR   </td><td class="markdownTableBodyLeft"></td></tr>
 328 </table>
 329 <h2 class="groupheader">Macro Definition Documentation</h2>
 330 <a id="ga82e193c0016a9377274756b2673464a6" name="ga82e193c0016a9377274756b2673464a6"></a>
 331 <h2 class="memtitle"><span class="permalink"><a href="#ga82e193c0016a9377274756b2673464a6">&#9670;&#160;</a></span>GICDistributor</h2>
 332
 333 <div class="memitem">
 334 <div class="memproto">
 335       <table class="memname">
 336         <tr>
 337           <td class="memname">#define GICDistributor&#160;&#160;&#160;((<a class="el" href="structGICDistributor__Type.html">GICDistributor_Type</a>      *)     GIC_DISTRIBUTOR_BASE )</td>
 338         </tr>
 339       </table>
 340 </div><div class="memdoc">
 341 <p>Use GICDistributor to access the GIC Distributor registers.</p>
 342 <p><b>Example:</b> </p><div class="fragment"><div class="line"><a class="code hl_define" href="group__GIC__functions.html#ga82e193c0016a9377274756b2673464a6">GICDistributor</a>-&gt;CTRL |= 1; <span class="comment">// Enable group 0 interrupts</span></div>
 343 <div class="ttc" id="agroup__GIC__functions_html_ga82e193c0016a9377274756b2673464a6"><div class="ttname"><a href="group__GIC__functions.html#ga82e193c0016a9377274756b2673464a6">GICDistributor</a></div><div class="ttdeci">#define GICDistributor</div><div class="ttdoc">GIC Distributor register set access pointer.</div></div>
 344 </div><!-- fragment -->
 345 </div>
 346 </div>
 347 <a id="ga31a083dbdc5cb84178dbf184286180e3" name="ga31a083dbdc5cb84178dbf184286180e3"></a>
 348 <h2 class="memtitle"><span class="permalink"><a href="#ga31a083dbdc5cb84178dbf184286180e3">&#9670;&#160;</a></span>GICInterface</h2>
 349
 350 <div class="memitem">
 351 <div class="memproto">
 352       <table class="memname">
 353         <tr>
 354           <td class="memname">#define GICInterface&#160;&#160;&#160;((<a class="el" href="structGICInterface__Type.html">GICInterface_Type</a>        *)     GIC_INTERFACE_BASE )</td>
 355         </tr>
 356       </table>
 357 </div><div class="memdoc">
 358 <p>Use GICInterface to access the GIC Interface registers.</p>
 359 <p><b>Example:</b> </p><div class="fragment"><div class="line"><a class="code hl_define" href="group__GIC__functions.html#ga31a083dbdc5cb84178dbf184286180e3">GICInterface</a>-&gt;CTLR |= 1; <span class="comment">// Enable interrupt signaling</span></div>
 360 <div class="ttc" id="agroup__GIC__functions_html_ga31a083dbdc5cb84178dbf184286180e3"><div class="ttname"><a href="group__GIC__functions.html#ga31a083dbdc5cb84178dbf184286180e3">GICInterface</a></div><div class="ttdeci">#define GICInterface</div><div class="ttdoc">GIC Interface register set access pointer.</div></div>
 361 </div><!-- fragment -->
 362 </div>
 363 </div>
 364 <h2 class="groupheader">Function Documentation</h2>
 365 <a id="gafc08bbc58b25fef0d24003313fd16eb8" name="gafc08bbc58b25fef0d24003313fd16eb8"></a>
 366 <h2 class="memtitle"><span class="permalink"><a href="#gafc08bbc58b25fef0d24003313fd16eb8">&#9670;&#160;</a></span>GIC_AcknowledgePending()</h2>
 367
 368 <div class="memitem">
 369 <div class="memproto">
 370       <table class="memname">
 371         <tr>
 372           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> IRQn_Type GIC_AcknowledgePending </td>
 373           <td>(</td>
 374           <td class="paramtype">void&#160;</td>
 375           <td class="paramname"></td><td>)</td>
 376           <td></td>
 377         </tr>
 378       </table>
 379 </div><div class="memdoc">
 380 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICInterface__Type.html#aa48569605fc0c163e1db35321b4c76ea" title="Offset: 0x00C (R/ ) Interrupt Acknowledge Register.">GICInterface_Type::IAR</a></dd></dl>
 381 <p>Provides the interrupt number of the highest priority interrupt pending. A read of this register acts as an acknowledge for the interrupt.</p>
 382 <p>The read returns a spurious interrupt number of 1023 if any of the following apply:</p><ul>
 383 <li>Forwarding of interrupts by the Distributor to the CPU interface is disabled.</li>
 384 <li>Signaling of interrupts by the CPU interface to the connected PE is disabled.</li>
 385 <li>There are no pending interrupts on the CPU interface with sufficient priority for the interface to signal it to the PE.</li>
 386 </ul>
 387 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#gac23f090f572a058b4a737f6613ded9cd" title="Writes the given interrupt number to the CPU&#39;s EOIR register.">GIC_EndInterrupt</a> </dd></dl>
 388
 389 </div>
 390 </div>
 391 <a id="ga5ad17ad70f23d1ff36015ffac33d383d" name="ga5ad17ad70f23d1ff36015ffac33d383d"></a>
 392 <h2 class="memtitle"><span class="permalink"><a href="#ga5ad17ad70f23d1ff36015ffac33d383d">&#9670;&#160;</a></span>GIC_ClearPendingIRQ()</h2>
 393
 394 <div class="memitem">
 395 <div class="memproto">
 396       <table class="memname">
 397         <tr>
 398           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_ClearPendingIRQ </td>
 399           <td>(</td>
 400           <td class="paramtype">IRQn_Type&#160;</td>
 401           <td class="paramname"><em>IRQn</em></td><td>)</td>
 402           <td></td>
 403         </tr>
 404       </table>
 405 </div><div class="memdoc">
 406 <dl class="params"><dt>Parameters</dt><dd>
 407   <table class="params">
 408     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be enabled.</td></tr>
 409   </table>
 410   </dd>
 411 </dl>
 412 <p>Removes the pending state from the corresponding interrupt. </p>
 413
 414 </div>
 415 </div>
 416 <a id="ga1c93f8af9f428cda8ec066bf4bfbade9" name="ga1c93f8af9f428cda8ec066bf4bfbade9"></a>
 417 <h2 class="memtitle"><span class="permalink"><a href="#ga1c93f8af9f428cda8ec066bf4bfbade9">&#9670;&#160;</a></span>GIC_CPUInterfaceInit()</h2>
 418
 419 <div class="memitem">
 420 <div class="memproto">
 421       <table class="memname">
 422         <tr>
 423           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_CPUInterfaceInit </td>
 424           <td>(</td>
 425           <td class="paramtype">void&#160;</td>
 426           <td class="paramname"></td><td>)</td>
 427           <td></td>
 428         </tr>
 429       </table>
 430 </div><div class="memdoc">
 431 <p>All software generated (SGIs) and private peripheral interrupts (PPIs) are initialized to be</p><ul>
 432 <li>disabled</li>
 433 <li>level-sensitive, 1-N model</li>
 434 <li>priority 0x7F and the interrupt interface is enabled.</li>
 435 </ul>
 436 <p>The binary point is set to zero.</p>
 437 <p>The interrupt priority mask is set to 0xFF.</p>
 438 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga2102399d255690c0674209a6faeec13d" title="Disables the given interrupt using GIC&#39;s ICENABLER register.">GIC_DisableIRQ</a><br  />
 439 GIC_SetLevelModel<br  />
 440 <a class="el" href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71" title="Set the priority for the given interrupt in the GIC&#39;s IPRIORITYR register.">GIC_SetPriority</a><br  />
 441 <a class="el" href="group__GIC__functions.html#ga758e5600d7f891e4f2f551bb45d07fce" title="Enable the CPU&#39;s interrupt interface.">GIC_EnableInterface</a><br  />
 442 <a class="el" href="group__GIC__functions.html#ga5dfedeb5403656a77e0fef4e1cc2c0c6" title="Configures the group priority and subpriority split point using CPU&#39;s BPR register.">GIC_SetBinaryPoint</a><br  />
 443 <a class="el" href="group__GIC__functions.html#gaa5eb0e76dbc89596e1ce47ddb9edc4a0" title="Set the interrupt priority mask using CPU&#39;s PMR register.">GIC_SetInterfacePriorityMask</a><br  />
 444 </dd></dl>
 445
 446 </div>
 447 </div>
 448 <a id="ga363311538d4a4d750197b9936505d466" name="ga363311538d4a4d750197b9936505d466"></a>
 449 <h2 class="memtitle"><span class="permalink"><a href="#ga363311538d4a4d750197b9936505d466">&#9670;&#160;</a></span>GIC_DisableDistributor()</h2>
 450
 451 <div class="memitem">
 452 <div class="memproto">
 453       <table class="memname">
 454         <tr>
 455           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_DisableDistributor </td>
 456           <td>(</td>
 457           <td class="paramtype">void&#160;</td>
 458           <td class="paramname"></td><td>)</td>
 459           <td></td>
 460         </tr>
 461       </table>
 462 </div><div class="memdoc">
 463 <p>Globally disable the forwarding of interrupts to the CPU interfaces. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga0f44df6823e90178183257e096e5cac6" title="Enable the interrupt distributor using the GIC&#39;s CTLR register.">GIC_EnableDistributor</a> </dd></dl>
 464
 465 </div>
 466 </div>
 467 <a id="ga0605877ad627c1f4320e518725fd103e" name="ga0605877ad627c1f4320e518725fd103e"></a>
 468 <h2 class="memtitle"><span class="permalink"><a href="#ga0605877ad627c1f4320e518725fd103e">&#9670;&#160;</a></span>GIC_DisableInterface()</h2>
 469
 470 <div class="memitem">
 471 <div class="memproto">
 472       <table class="memname">
 473         <tr>
 474           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_DisableInterface </td>
 475           <td>(</td>
 476           <td class="paramtype">void&#160;</td>
 477           <td class="paramname"></td><td>)</td>
 478           <td></td>
 479         </tr>
 480       </table>
 481 </div><div class="memdoc">
 482 <p>Resets the Enable bit in the local CPUs <a class="el" href="structGICInterface__Type.html#a5969edab40aa24e4d96e072af187a3a9">CTLR</a> register. Only the CPU executing the call is affected. </p>
 483
 484 </div>
 485 </div>
 486 <a id="ga2102399d255690c0674209a6faeec13d" name="ga2102399d255690c0674209a6faeec13d"></a>
 487 <h2 class="memtitle"><span class="permalink"><a href="#ga2102399d255690c0674209a6faeec13d">&#9670;&#160;</a></span>GIC_DisableIRQ()</h2>
 488
 489 <div class="memitem">
 490 <div class="memproto">
 491       <table class="memname">
 492         <tr>
 493           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_DisableIRQ </td>
 494           <td>(</td>
 495           <td class="paramtype">IRQn_Type&#160;</td>
 496           <td class="paramname"><em>IRQn</em></td><td>)</td>
 497           <td></td>
 498         </tr>
 499       </table>
 500 </div><div class="memdoc">
 501 <dl class="params"><dt>Parameters</dt><dd>
 502   <table class="params">
 503     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be disabled.</td></tr>
 504   </table>
 505   </dd>
 506 </dl>
 507 <p>Disables forwarding of the corresponding interrupt to the CPU interfaces. </p>
 508
 509 </div>
 510 </div>
 511 <a id="ga07acd03d02683bb6e33e7f57f5f371d1" name="ga07acd03d02683bb6e33e7f57f5f371d1"></a>
 512 <h2 class="memtitle"><span class="permalink"><a href="#ga07acd03d02683bb6e33e7f57f5f371d1">&#9670;&#160;</a></span>GIC_DistInit()</h2>
 513
 514 <div class="memitem">
 515 <div class="memproto">
 516       <table class="memname">
 517         <tr>
 518           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_DistInit </td>
 519           <td>(</td>
 520           <td class="paramtype">void&#160;</td>
 521           <td class="paramname"></td><td>)</td>
 522           <td></td>
 523         </tr>
 524       </table>
 525 </div><div class="memdoc">
 526 <p>All shared peripheral interrupts (SPIs) are initialized to be</p><ul>
 527 <li>disabled</li>
 528 <li>level-sensitive, 1-N model</li>
 529 <li>priority 0x7F</li>
 530 <li>targeting CPU0 and the distributor is enabled.</li>
 531 </ul>
 532 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga2102399d255690c0674209a6faeec13d" title="Disables the given interrupt using GIC&#39;s ICENABLER register.">GIC_DisableIRQ</a><br  />
 533 GIC_SetLevelModel<br  />
 534 <a class="el" href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71" title="Set the priority for the given interrupt in the GIC&#39;s IPRIORITYR register.">GIC_SetPriority</a><br  />
 535 <a class="el" href="group__GIC__functions.html#gae86bba705d0d4ef812b84d29d7b3ca2b" title="Sets the GIC&#39;s ITARGETSR register for the given interrupt.">GIC_SetTarget</a><br  />
 536 <a class="el" href="group__GIC__functions.html#ga0f44df6823e90178183257e096e5cac6" title="Enable the interrupt distributor using the GIC&#39;s CTLR register.">GIC_EnableDistributor</a> </dd></dl>
 537
 538 </div>
 539 </div>
 540 <a id="ga1481d0cdf78f8c93fb2a710a519c4dc6" name="ga1481d0cdf78f8c93fb2a710a519c4dc6"></a>
 541 <h2 class="memtitle"><span class="permalink"><a href="#ga1481d0cdf78f8c93fb2a710a519c4dc6">&#9670;&#160;</a></span>GIC_DistributorImplementer()</h2>
 542
 543 <div class="memitem">
 544 <div class="memproto">
 545       <table class="memname">
 546         <tr>
 547           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_DistributorImplementer </td>
 548           <td>(</td>
 549           <td class="paramtype">void&#160;</td>
 550           <td class="paramname"></td><td>)</td>
 551           <td></td>
 552         </tr>
 553       </table>
 554 </div><div class="memdoc">
 555 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICDistributor__Type.html#acebf65dae4cb82cd3c7deeefca9c9722" title="Offset: 0x008 (R/ ) Distributor Implementer Identification Register.">GICDistributor_Type::IIDR</a></dd></dl>
 556 <p>Provides information about the implementer and revision of the Distributor. </p>
 557
 558 </div>
 559 </div>
 560 <a id="ga7d93d39736ef5e379e6511430ee6e75f" name="ga7d93d39736ef5e379e6511430ee6e75f"></a>
 561 <h2 class="memtitle"><span class="permalink"><a href="#ga7d93d39736ef5e379e6511430ee6e75f">&#9670;&#160;</a></span>GIC_DistributorInfo()</h2>
 562
 563 <div class="memitem">
 564 <div class="memproto">
 565       <table class="memname">
 566         <tr>
 567           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_DistributorInfo </td>
 568           <td>(</td>
 569           <td class="paramtype">void&#160;</td>
 570           <td class="paramname"></td><td>)</td>
 571           <td></td>
 572         </tr>
 573       </table>
 574 </div><div class="memdoc">
 575 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICDistributor__Type.html#a405823d97dc90dd9d397a3980e2cd207" title="Offset: 0x004 (R/ ) Interrupt Controller Type Register.">GICDistributor_Type::TYPER</a></dd></dl>
 576 <p>Provides information about the configuration of the GIC. It indicates:</p><ul>
 577 <li>whether the GIC implements the Security Extensions</li>
 578 <li>the maximum number of interrupt IDs that the GIC supports</li>
 579 <li>the number of CPU interfaces implemented</li>
 580 <li>if the GIC implements the Security Extensions, the maximum number of implemented Lockable Shared Peripheral Interrupts (LSPIs). </li>
 581 </ul>
 582
 583 </div>
 584 </div>
 585 <a id="ga818881f69aae3eef6eb996bee6f6c63e" name="ga818881f69aae3eef6eb996bee6f6c63e"></a>
 586 <h2 class="memtitle"><span class="permalink"><a href="#ga818881f69aae3eef6eb996bee6f6c63e">&#9670;&#160;</a></span>GIC_Enable()</h2>
 587
 588 <div class="memitem">
 589 <div class="memproto">
 590       <table class="memname">
 591         <tr>
 592           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_Enable </td>
 593           <td>(</td>
 594           <td class="paramtype">void&#160;</td>
 595           <td class="paramname"></td><td>)</td>
 596           <td></td>
 597         </tr>
 598       </table>
 599 </div><div class="memdoc">
 600 <p>Initializes the distributor and the cpu interface.</p>
 601 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga07acd03d02683bb6e33e7f57f5f371d1" title="Initialize the interrupt distributor.">GIC_DistInit</a> <a class="el" href="group__GIC__functions.html#ga1c93f8af9f428cda8ec066bf4bfbade9" title="Initialize the CPU&#39;s interrupt interface.">GIC_CPUInterfaceInit</a> </dd></dl>
 602
 603 </div>
 604 </div>
 605 <a id="ga0f44df6823e90178183257e096e5cac6" name="ga0f44df6823e90178183257e096e5cac6"></a>
 606 <h2 class="memtitle"><span class="permalink"><a href="#ga0f44df6823e90178183257e096e5cac6">&#9670;&#160;</a></span>GIC_EnableDistributor()</h2>
 607
 608 <div class="memitem">
 609 <div class="memproto">
 610       <table class="memname">
 611         <tr>
 612           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_EnableDistributor </td>
 613           <td>(</td>
 614           <td class="paramtype">void&#160;</td>
 615           <td class="paramname"></td><td>)</td>
 616           <td></td>
 617         </tr>
 618       </table>
 619 </div><div class="memdoc">
 620 <p>Globally enable the forwarding of interrupts to the CPU interfaces. </p>
 621
 622 </div>
 623 </div>
 624 <a id="ga758e5600d7f891e4f2f551bb45d07fce" name="ga758e5600d7f891e4f2f551bb45d07fce"></a>
 625 <h2 class="memtitle"><span class="permalink"><a href="#ga758e5600d7f891e4f2f551bb45d07fce">&#9670;&#160;</a></span>GIC_EnableInterface()</h2>
 626
 627 <div class="memitem">
 628 <div class="memproto">
 629       <table class="memname">
 630         <tr>
 631           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_EnableInterface </td>
 632           <td>(</td>
 633           <td class="paramtype">void&#160;</td>
 634           <td class="paramname"></td><td>)</td>
 635           <td></td>
 636         </tr>
 637       </table>
 638 </div><div class="memdoc">
 639 <p>Sets the Enable bit in the local CPUs <a class="el" href="structGICInterface__Type.html#a5969edab40aa24e4d96e072af187a3a9">CTLR</a> register. Only the CPU executing the call is affected. </p>
 640
 641 </div>
 642 </div>
 643 <a id="gaeba215d9c4ec3599e0a168800288c3f3" name="gaeba215d9c4ec3599e0a168800288c3f3"></a>
 644 <h2 class="memtitle"><span class="permalink"><a href="#gaeba215d9c4ec3599e0a168800288c3f3">&#9670;&#160;</a></span>GIC_EnableIRQ()</h2>
 645
 646 <div class="memitem">
 647 <div class="memproto">
 648       <table class="memname">
 649         <tr>
 650           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_EnableIRQ </td>
 651           <td>(</td>
 652           <td class="paramtype">IRQn_Type&#160;</td>
 653           <td class="paramname"><em>IRQn</em></td><td>)</td>
 654           <td></td>
 655         </tr>
 656       </table>
 657 </div><div class="memdoc">
 658 <dl class="params"><dt>Parameters</dt><dd>
 659   <table class="params">
 660     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be enabled.</td></tr>
 661   </table>
 662   </dd>
 663 </dl>
 664 <p>Enables forwarding of the corresponding interrupt to the CPU interfaces. </p>
 665
 666 </div>
 667 </div>
 668 <a id="gac23f090f572a058b4a737f6613ded9cd" name="gac23f090f572a058b4a737f6613ded9cd"></a>
 669 <h2 class="memtitle"><span class="permalink"><a href="#gac23f090f572a058b4a737f6613ded9cd">&#9670;&#160;</a></span>GIC_EndInterrupt()</h2>
 670
 671 <div class="memitem">
 672 <div class="memproto">
 673       <table class="memname">
 674         <tr>
 675           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_EndInterrupt </td>
 676           <td>(</td>
 677           <td class="paramtype">IRQn_Type&#160;</td>
 678           <td class="paramname"><em>IRQn</em></td><td>)</td>
 679           <td></td>
 680         </tr>
 681       </table>
 682 </div><div class="memdoc">
 683 <dl class="params"><dt>Parameters</dt><dd>
 684   <table class="params">
 685     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be signaled as finished.</td></tr>
 686   </table>
 687   </dd>
 688 </dl>
 689 <p>A write to this register performs priority drop for the specified interrupt.</p>
 690 <p>For nested interrupts, the order of calls to this function must be the reverse of the order of interrupt acknowledgement, i.e. calls to <a class="el" href="group__GIC__functions.html#gafc08bbc58b25fef0d24003313fd16eb8">GIC_AcknowledgePending</a>. Behavior is UNPREDICTABLE if:</p><ul>
 691 <li>This ordering constraint is not maintained.</li>
 692 <li>The given interrupt number does not match an active interrupt, or the ID of a spurious interrupt.</li>
 693 <li>The given interrupt number does not match the last valid interrupt value returned by <a class="el" href="group__GIC__functions.html#gafc08bbc58b25fef0d24003313fd16eb8">GIC_AcknowledgePending</a>. </li>
 694 </ul>
 695
 696 </div>
 697 </div>
 698 <a id="gaa7046d8206ddd4696716726e68f85906" name="gaa7046d8206ddd4696716726e68f85906"></a>
 699 <h2 class="memtitle"><span class="permalink"><a href="#gaa7046d8206ddd4696716726e68f85906">&#9670;&#160;</a></span>GIC_GetBinaryPoint()</h2>
 700
 701 <div class="memitem">
 702 <div class="memproto">
 703       <table class="memname">
 704         <tr>
 705           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetBinaryPoint </td>
 706           <td>(</td>
 707           <td class="paramtype">void&#160;</td>
 708           <td class="paramname"></td><td>)</td>
 709           <td></td>
 710         </tr>
 711       </table>
 712 </div><div class="memdoc">
 713 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICInterface__Type.html#a949317484547dc1db89c9f7ab40d1829" title="Offset: 0x008 (R/W) Binary Point Register.">GICInterface_Type::BPR</a></dd></dl>
 714 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga5dfedeb5403656a77e0fef4e1cc2c0c6" title="Configures the group priority and subpriority split point using CPU&#39;s BPR register.">GIC_SetBinaryPoint</a> </dd></dl>
 715
 716 </div>
 717 </div>
 718 <a id="ga8bb27e1bab132a8df44190adb996c2a1" name="ga8bb27e1bab132a8df44190adb996c2a1"></a>
 719 <h2 class="memtitle"><span class="permalink"><a href="#ga8bb27e1bab132a8df44190adb996c2a1">&#9670;&#160;</a></span>GIC_GetHighPendingIRQ()</h2>
 720
 721 <div class="memitem">
 722 <div class="memproto">
 723       <table class="memname">
 724         <tr>
 725           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetHighPendingIRQ </td>
 726           <td>(</td>
 727           <td class="paramtype">void&#160;</td>
 728           <td class="paramname"></td><td>)</td>
 729           <td></td>
 730         </tr>
 731       </table>
 732 </div><div class="memdoc">
 733 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICInterface__Type.html#af793cd280a74bf73cca8c4fedfc329d6" title="Offset: 0x018 (R/ ) Highest Priority Pending Interrupt Register.">GICInterface_Type::HPPIR</a> </dd></dl>
 734
 735 </div>
 736 </div>
 737 <a id="gaba1b2665cdda47fc0bc3d7b90690dc50" name="gaba1b2665cdda47fc0bc3d7b90690dc50"></a>
 738 <h2 class="memtitle"><span class="permalink"><a href="#gaba1b2665cdda47fc0bc3d7b90690dc50">&#9670;&#160;</a></span>GIC_GetInterfaceId()</h2>
 739
 740 <div class="memitem">
 741 <div class="memproto">
 742       <table class="memname">
 743         <tr>
 744           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetInterfaceId </td>
 745           <td>(</td>
 746           <td class="paramtype">void&#160;</td>
 747           <td class="paramname"></td><td>)</td>
 748           <td></td>
 749         </tr>
 750       </table>
 751 </div><div class="memdoc">
 752 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICInterface__Type.html#aee78d0b6f64a7b47fbd730aabfcc86cf" title="Offset: 0x0FC (R/ ) CPU Interface Identification Register.">GICInterface_Type::IIDR</a> </dd></dl>
 753
 754 </div>
 755 </div>
 756 <a id="ga2c5f9e5637560fc9d5c29d772580a728" name="ga2c5f9e5637560fc9d5c29d772580a728"></a>
 757 <h2 class="memtitle"><span class="permalink"><a href="#ga2c5f9e5637560fc9d5c29d772580a728">&#9670;&#160;</a></span>GIC_GetInterfacePriorityMask()</h2>
 758
 759 <div class="memitem">
 760 <div class="memproto">
 761       <table class="memname">
 762         <tr>
 763           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetInterfacePriorityMask </td>
 764           <td>(</td>
 765           <td class="paramtype">void&#160;</td>
 766           <td class="paramname"></td><td>)</td>
 767           <td></td>
 768         </tr>
 769       </table>
 770 </div><div class="memdoc">
 771 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICInterface__Type.html#a0edadabc6e3ce1f36d820f0b52bc143b" title="Offset: 0x004 (R/W) Interrupt Priority Mask Register.">GICInterface_Type::PMR</a></dd></dl>
 772 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#gaa5eb0e76dbc89596e1ce47ddb9edc4a0" title="Set the interrupt priority mask using CPU&#39;s PMR register.">GIC_SetInterfacePriorityMask</a> </dd></dl>
 773
 774 </div>
 775 </div>
 776 <a id="gabc88483ecf94a2c222b644ecfa60eb9f" name="gabc88483ecf94a2c222b644ecfa60eb9f"></a>
 777 <h2 class="memtitle"><span class="permalink"><a href="#gabc88483ecf94a2c222b644ecfa60eb9f">&#9670;&#160;</a></span>GIC_GetIRQStatus()</h2>
 778
 779 <div class="memitem">
 780 <div class="memproto">
 781       <table class="memname">
 782         <tr>
 783           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetIRQStatus </td>
 784           <td>(</td>
 785           <td class="paramtype">IRQn_Type&#160;</td>
 786           <td class="paramname"><em>IRQn</em></td><td>)</td>
 787           <td></td>
 788         </tr>
 789       </table>
 790 </div><div class="memdoc">
 791 <dl class="params"><dt>Parameters</dt><dd>
 792   <table class="params">
 793     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to get status for. </td></tr>
 794   </table>
 795   </dd>
 796 </dl>
 797 <dl class="section return"><dt>Returns</dt><dd>0 - not pending/active, 1 - pending, 2 - active, 3 - pending and active</dd></dl>
 798 <p>The return value is a combination of GIC's <a class="el" href="structGICDistributor__Type.html#a5eb8e1ef5a88293e2759c41f6057ccc4">ISACTIVER</a> and <a class="el" href="structGICDistributor__Type.html#a1c15cd75ce30d8946792e2a1a19556a5">ISPENDR</a> registers.</p>
 799 <p>Bit 0 denotes interrupts pending bit (interrupt should be handled) and bit 1 denotes interrupts active bit (interrupt is currently handled). </p>
 800
 801 </div>
 802 </div>
 803 <a id="ga397048004654f792649742f95bf8ae67" name="ga397048004654f792649742f95bf8ae67"></a>
 804 <h2 class="memtitle"><span class="permalink"><a href="#ga397048004654f792649742f95bf8ae67">&#9670;&#160;</a></span>GIC_GetPriority()</h2>
 805
 806 <div class="memitem">
 807 <div class="memproto">
 808       <table class="memname">
 809         <tr>
 810           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetPriority </td>
 811           <td>(</td>
 812           <td class="paramtype">IRQn_Type&#160;</td>
 813           <td class="paramname"><em>IRQn</em></td><td>)</td>
 814           <td></td>
 815         </tr>
 816       </table>
 817 </div><div class="memdoc">
 818 <dl class="params"><dt>Parameters</dt><dd>
 819   <table class="params">
 820     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be queried.</td></tr>
 821   </table>
 822   </dd>
 823 </dl>
 824 <p>Can be used to retrieve the actual priority depending on the GIC implementation. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71" title="Set the priority for the given interrupt in the GIC&#39;s IPRIORITYR register.">GIC_SetPriority</a> </dd></dl>
 825
 826 </div>
 827 </div>
 828 <a id="gafccf881f9517592f30489bcabcb738a8" name="gafccf881f9517592f30489bcabcb738a8"></a>
 829 <h2 class="memtitle"><span class="permalink"><a href="#gafccf881f9517592f30489bcabcb738a8">&#9670;&#160;</a></span>GIC_GetTarget()</h2>
 830
 831 <div class="memitem">
 832 <div class="memproto">
 833       <table class="memname">
 834         <tr>
 835           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetTarget </td>
 836           <td>(</td>
 837           <td class="paramtype">IRQn_Type&#160;</td>
 838           <td class="paramname"><em>IRQn</em></td><td>)</td>
 839           <td></td>
 840         </tr>
 841       </table>
 842 </div><div class="memdoc">
 843 <dl class="params"><dt>Parameters</dt><dd>
 844   <table class="params">
 845     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt to acquire the configuration for. </td></tr>
 846   </table>
 847   </dd>
 848 </dl>
 849 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICDistributor__Type.html#a6f1b07d48d3a9199f2effec8492f721c" title="Offset: 0x800 (R/W) Interrupt Targets Registers.">GICDistributor_Type::ITARGETSR</a></dd></dl>
 850 <p>Read the current interrupt to CPU assignment for the given interrupt. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#gae86bba705d0d4ef812b84d29d7b3ca2b" title="Sets the GIC&#39;s ITARGETSR register for the given interrupt.">GIC_SetTarget</a> </dd></dl>
 851
 852 </div>
 853 </div>
 854 <a id="ga2de8850780af26e802ee4cc43e9da6e9" name="ga2de8850780af26e802ee4cc43e9da6e9"></a>
 855 <h2 class="memtitle"><span class="permalink"><a href="#ga2de8850780af26e802ee4cc43e9da6e9">&#9670;&#160;</a></span>GIC_SendSGI()</h2>
 856
 857 <div class="memitem">
 858 <div class="memproto">
 859       <table class="memname">
 860         <tr>
 861           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SendSGI </td>
 862           <td>(</td>
 863           <td class="paramtype">IRQn_Type&#160;</td>
 864           <td class="paramname"><em>IRQn</em>, </td>
 865         </tr>
 866         <tr>
 867           <td class="paramkey"></td>
 868           <td></td>
 869           <td class="paramtype">uint32_t&#160;</td>
 870           <td class="paramname"><em>target_list</em>, </td>
 871         </tr>
 872         <tr>
 873           <td class="paramkey"></td>
 874           <td></td>
 875           <td class="paramtype">uint32_t&#160;</td>
 876           <td class="paramname"><em>filter_list</em>&#160;</td>
 877         </tr>
 878         <tr>
 879           <td></td>
 880           <td>)</td>
 881           <td></td><td></td>
 882         </tr>
 883       </table>
 884 </div><div class="memdoc">
 885 <dl class="params"><dt>Parameters</dt><dd>
 886   <table class="params">
 887     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Software interrupt to be generated. </td></tr>
 888     <tr><td class="paramdir">[in]</td><td class="paramname">target_list</td><td>List of CPUs the software interrupt should be forwarded to. </td></tr>
 889     <tr><td class="paramdir">[in]</td><td class="paramname">filter_list</td><td>Filter to be applied to determine interrupt receivers. </td></tr>
 890   </table>
 891   </dd>
 892 </dl>
 893
 894 </div>
 895 </div>
 896 <a id="ga5dfedeb5403656a77e0fef4e1cc2c0c6" name="ga5dfedeb5403656a77e0fef4e1cc2c0c6"></a>
 897 <h2 class="memtitle"><span class="permalink"><a href="#ga5dfedeb5403656a77e0fef4e1cc2c0c6">&#9670;&#160;</a></span>GIC_SetBinaryPoint()</h2>
 898
 899 <div class="memitem">
 900 <div class="memproto">
 901       <table class="memname">
 902         <tr>
 903           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetBinaryPoint </td>
 904           <td>(</td>
 905           <td class="paramtype">uint32_t&#160;</td>
 906           <td class="paramname"><em>binary_point</em></td><td>)</td>
 907           <td></td>
 908         </tr>
 909       </table>
 910 </div><div class="memdoc">
 911 <dl class="params"><dt>Parameters</dt><dd>
 912   <table class="params">
 913     <tr><td class="paramdir">[in]</td><td class="paramname">binary_point</td><td>Amount of bits used as subpriority.</td></tr>
 914   </table>
 915   </dd>
 916 </dl>
 917 <p>The binary point defines the amount of priority bits used as a group priority and subpriorities.</p>
 918 <p>Interrupts sharing the same group priority do not preempt each other. But interrupts having a higher group priority (lower value) preempt interrups with a lower group priority.</p>
 919 <p>The subpriority defines the execution sequence of interrupts with the same group priority if multiple are pending at time. </p>
 920
 921 </div>
 922 </div>
 923 <a id="gaa5eb0e76dbc89596e1ce47ddb9edc4a0" name="gaa5eb0e76dbc89596e1ce47ddb9edc4a0"></a>
 924 <h2 class="memtitle"><span class="permalink"><a href="#gaa5eb0e76dbc89596e1ce47ddb9edc4a0">&#9670;&#160;</a></span>GIC_SetInterfacePriorityMask()</h2>
 925
 926 <div class="memitem">
 927 <div class="memproto">
 928       <table class="memname">
 929         <tr>
 930           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetInterfacePriorityMask </td>
 931           <td>(</td>
 932           <td class="paramtype">uint32_t&#160;</td>
 933           <td class="paramname"><em>priority</em></td><td>)</td>
 934           <td></td>
 935         </tr>
 936       </table>
 937 </div><div class="memdoc">
 938 <dl class="params"><dt>Parameters</dt><dd>
 939   <table class="params">
 940     <tr><td class="paramdir">[in]</td><td class="paramname">priority</td><td>Priority mask to be set.</td></tr>
 941   </table>
 942   </dd>
 943 </dl>
 944 <p>Only interrupts with a higher priority (lower values) than the value provided are signaled. </p>
 945
 946 </div>
 947 </div>
 948 <a id="ga18fbddf7f3594df141c97f61a71da47c" name="ga18fbddf7f3594df141c97f61a71da47c"></a>
 949 <h2 class="memtitle"><span class="permalink"><a href="#ga18fbddf7f3594df141c97f61a71da47c">&#9670;&#160;</a></span>GIC_SetPendingIRQ()</h2>
 950
 951 <div class="memitem">
 952 <div class="memproto">
 953       <table class="memname">
 954         <tr>
 955           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetPendingIRQ </td>
 956           <td>(</td>
 957           <td class="paramtype">IRQn_Type&#160;</td>
 958           <td class="paramname"><em>IRQn</em></td><td>)</td>
 959           <td></td>
 960         </tr>
 961       </table>
 962 </div><div class="memdoc">
 963 <dl class="params"><dt>Parameters</dt><dd>
 964   <table class="params">
 965     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be enabled.</td></tr>
 966   </table>
 967   </dd>
 968 </dl>
 969 <p>Adds the pending state to the corresponding interrupt. </p>
 970
 971 </div>
 972 </div>
 973 <a id="ga27b9862b58290276851ec669cabf0f71" name="ga27b9862b58290276851ec669cabf0f71"></a>
 974 <h2 class="memtitle"><span class="permalink"><a href="#ga27b9862b58290276851ec669cabf0f71">&#9670;&#160;</a></span>GIC_SetPriority()</h2>
 975
 976 <div class="memitem">
 977 <div class="memproto">
 978       <table class="memname">
 979         <tr>
 980           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetPriority </td>
 981           <td>(</td>
 982           <td class="paramtype">IRQn_Type&#160;</td>
 983           <td class="paramname"><em>IRQn</em>, </td>
 984         </tr>
 985         <tr>
 986           <td class="paramkey"></td>
 987           <td></td>
 988           <td class="paramtype">uint32_t&#160;</td>
 989           <td class="paramname"><em>priority</em>&#160;</td>
 990         </tr>
 991         <tr>
 992           <td></td>
 993           <td>)</td>
 994           <td></td><td></td>
 995         </tr>
 996       </table>
 997 </div><div class="memdoc">
 998 <dl class="params"><dt>Parameters</dt><dd>
 999   <table class="params">
1000     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be configured. </td></tr>
1001     <tr><td class="paramdir">[in]</td><td class="paramname">priority</td><td>The priority for the interrupt, lower values denote higher priorities.</td></tr>
1002   </table>
1003   </dd>
1004 </dl>
1005 <p>Configures the priority of the given interrupt.</p>
1006 <p>The available interrupt priorities are IMPLEMENTATION DEFINED. In order to query the actual priorities one can</p>
1007 <div class="fragment"><div class="line"><a class="code hl_function" href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71">GIC_SetPriority</a>(IRQn_TIM1, UINT32_MAX);       <span class="comment">// try to configure lowest possible priority</span></div>
1008 <div class="line">uint32_t actual = <a class="code hl_function" href="group__GIC__functions.html#ga397048004654f792649742f95bf8ae67">GIC_GetPriority</a>(IRQn_TIM1); <span class="comment">// retrieve actual lowest priority usable</span></div>
1009 <div class="ttc" id="agroup__GIC__functions_html_ga27b9862b58290276851ec669cabf0f71"><div class="ttname"><a href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71">GIC_SetPriority</a></div><div class="ttdeci">__STATIC_INLINE void GIC_SetPriority(IRQn_Type IRQn, uint32_t priority)</div><div class="ttdoc">Set the priority for the given interrupt in the GIC's IPRIORITYR register.</div><div class="ttdef"><b>Definition:</b> core_ca.h:1659</div></div>
1010 <div class="ttc" id="agroup__GIC__functions_html_ga397048004654f792649742f95bf8ae67"><div class="ttname"><a href="group__GIC__functions.html#ga397048004654f792649742f95bf8ae67">GIC_GetPriority</a></div><div class="ttdeci">__STATIC_INLINE uint32_t GIC_GetPriority(IRQn_Type IRQn)</div><div class="ttdoc">Read the current interrupt priority from GIC's IPRIORITYR register.</div><div class="ttdef"><b>Definition:</b> core_ca.h:1668</div></div>
1011 </div><!-- fragment -->
1012 </div>
1013 </div>
1014 <a id="gae86bba705d0d4ef812b84d29d7b3ca2b" name="gae86bba705d0d4ef812b84d29d7b3ca2b"></a>
1015 <h2 class="memtitle"><span class="permalink"><a href="#gae86bba705d0d4ef812b84d29d7b3ca2b">&#9670;&#160;</a></span>GIC_SetTarget()</h2>
1016
1017 <div class="memitem">
1018 <div class="memproto">
1019       <table class="memname">
1020         <tr>
1021           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetTarget </td>
1022           <td>(</td>
1023           <td class="paramtype">IRQn_Type&#160;</td>
1024           <td class="paramname"><em>IRQn</em>, </td>
1025         </tr>
1026         <tr>
1027           <td class="paramkey"></td>
1028           <td></td>
1029           <td class="paramtype">uint32_t&#160;</td>
1030           <td class="paramname"><em>cpu_target</em>&#160;</td>
1031         </tr>
1032         <tr>
1033           <td></td>
1034           <td>)</td>
1035           <td></td><td></td>
1036         </tr>
1037       </table>
1038 </div><div class="memdoc">
1039 <dl class="params"><dt>Parameters</dt><dd>
1040   <table class="params">
1041     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt to be configured. </td></tr>
1042     <tr><td class="paramdir">[in]</td><td class="paramname">cpu_target</td><td>CPU interfaces to assign this interrupt to.</td></tr>
1043   </table>
1044   </dd>
1045 </dl>
1046 <p>The <a class="el" href="structGICDistributor__Type.html#a6f1b07d48d3a9199f2effec8492f721c">ITARGETSR</a> registers provide an 8-bit CPU targets field for each interrupt supported by the GIC. This field stores the list of target processors for the interrupt. That is, it holds the list of CPU interfaces to which the Distributor forwards the interrupt if it is asserted and has sufficient priority. </p>
1047
1048 </div>
1049 </div>
1050 </div><!-- contents -->
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