begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev7">
  12       Active development...
  13       CMSIS-Core(M): 5.4.0
  14         - Fixed device config define checks.
  15       Devices:
  16         - Enable loop and branch info cache for Armv8.1-MML devices.
  17     </release>
  18     <release version="5.7.0-dev6">
  19       CMSIS-DSP:
  20         - reworked examples
  21     </release>
  22     <release version="5.7.0-dev5">
  23       CMSIS-NN: 1.3.0 (see revision history for details)
  24         - Added MVE support
  25         - Further optimizations for kernels using DSP extension
  26       CMSIS-Driver: 2.8.0
  27         - Added VIO API 0.1.0 (Preview)
  28     </release>
  29     <release version="5.7.0-dev4">
  30       CMSIS-DSP: 1.8.0 (see revision history for details)
  31         - Added new functions and function groups
  32         - Added MVE support
  33     </release>
  34     <release version="5.7.0-dev3">
  35       CMSIS-Core(M): 5.4.0
  36         - L1 Cache functions for Armv7-M and later
  37       Devices:
  38         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  39     </release>
  40     <release version="5.7.0-dev2">
  41       CMSIS-Core(M): 5.4.0
  42         - Cortex-M55 cpu support
  43       Devices:
  44         - ARMCM55 device
  45     </release>
  46     <release version="5.7.0-dev1">
  47       Active development...
  48       CMSIS-Core(M): 5.4.0 (see revision history for details)
  49         - Enhanced MVE support for Armv8.1-MML
  50       CMSIS-RTOS2:
  51         - RTX 5.5.2 (see revision history for details)
  52       CMSIS-Driver: 2.8.0
  53         - removed volatile from status related typedefs in APIs
  54         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  55       CMSIS-Pack: 1.6.1
  56         - added custom attribute to components that require custom implementation
  57       Devices:
  58         - ARMv81MML startup code recognizing __MVE_USED macro
  59         - Refactored vector table references for all Cortex-M devices
  60     </release>
  61     <release version="5.6.0" date="2019-07-10">
  62       CMSIS-Core(M): 5.3.0 (see revision history for details)
  63         - Added provisions for compiler-independent C startup code.
  64       CMSIS-Core(A): 1.1.4 (see revision history for details)
  65         - Fixed __FPU_Enable.
  66       CMSIS-DSP: 1.7.0 (see revision history for details)
  67         - New Neon versions of f32 functions
  68         - Python wrapper
  69         - Preliminary cmake build
  70         - Compilation flags for FFTs
  71         - Changes to arm_math.h
  72       CMSIS-NN: 1.2.0 (see revision history for details)
  73         - New function for depthwise convolution with asymmetric quantization.
  74         - New support functions for requantization.
  75       CMSIS-RTOS:
  76         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  77       CMSIS-RTOS2:
  78         - RTX 5.5.1 (see revision history for details)
  79       CMSIS-Driver: 2.7.1
  80         - WiFi Interface API 1.0.0
  81       Devices:
  82         - Generalized C startup code for all Cortex-M familiy devices.
  83         - Updated Cortex-A default memory regions and MMU configurations
  84         - Moved Cortex-A memory and system config files to avoid include path issues
  85     </release>
  86     <release version="5.5.1" date="2019-03-20">
  87       The following folders are deprecated
  88         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  89
  90       CMSIS-Core(M): 5.2.1 (see revision history for details)
  91         - Fixed compilation issue in cmsis_armclang_ltm.h
  92     </release>
  93     <release version="5.5.0" date="2019-03-18">
  94       The following folders have been removed:
  95         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  96         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  97       The following folders are deprecated
  98         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  99
 100       CMSIS-Core(M): 5.2.0 (see revision history for details)
 101         - Reworked Stack/Heap configuration for ARM startup files.
 102         - Added Cortex-M35P device support.
 103         - Added generic Armv8.1-M Mainline device support.
 104       CMSIS-Core(A): 1.1.3 (see revision history for details)
 105       CMSIS-DSP: 1.6.0 (see revision history for details)
 106         - reworked DSP library source files
 107         - reworked DSP library documentation
 108         - Changed DSP folder structure
 109         - moved DSP libraries to folder ./DSP/Lib
 110         - ARM DSP Libraries are built with ARMCLANG
 111         - Added DSP Libraries Source variant
 112       CMSIS-RTOS2:
 113         - RTX 5.5.0 (see revision history for details)
 114       CMSIS-Driver: 2.7.0
 115         - Added WiFi Interface API 1.0.0-beta
 116         - Added components for project specific driver implementations
 117       CMSIS-Pack: 1.6.0 (see revision history for details)
 118       Devices:
 119         - Added Cortex-M35P and ARMv81MML device templates.
 120         - Fixed C-Startup Code for GCC (aligned with other compilers)
 121       Utilities:
 122         - SVDConv 3.3.25
 123         - PackChk 1.3.82
 124     </release>
 125     <release version="5.4.0" date="2018-08-01">
 126       Aligned pack structure with repository.
 127       The following folders are deprecated:
 128         - CMSIS/Include/
 129         - CMSIS/DSP_Lib/
 130
 131       CMSIS-Core(M): 5.1.2 (see revision history for details)
 132         - Added Cortex-M1 support (beta).
 133       CMSIS-Core(A): 1.1.2 (see revision history for details)
 134       CMSIS-NN: 1.1.0
 135         - Added new math functions.
 136       CMSIS-RTOS2:
 137         - API 2.1.3 (see revision history for details)
 138         - RTX 5.4.0 (see revision history for details)
 139           * Updated exception handling on Cortex-A
 140       CMSIS-Driver:
 141         - Flash Driver API V2.2.0
 142       Utilities:
 143         - SVDConv 3.3.21
 144         - PackChk 1.3.71
 145     </release>
 146     <release version="5.3.0" date="2018-02-22">
 147       Updated Arm company brand.
 148       CMSIS-Core(M): 5.1.1 (see revision history for details)
 149       CMSIS-Core(A): 1.1.1 (see revision history for details)
 150       CMSIS-DAP: 2.0.0 (see revision history for details)
 151       CMSIS-NN: 1.0.0
 152         - Initial contribution of the bare metal Neural Network Library.
 153       CMSIS-RTOS2:
 154         - RTX 5.3.0 (see revision history for details)
 155         - OS Tick API 1.0.1
 156     </release>
 157     <release version="5.2.0" date="2017-11-16">
 158       CMSIS-Core(M): 5.1.0 (see revision history for details)
 159         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 160         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 161       CMSIS-Core(A): 1.1.0 (see revision history for details)
 162         - Added compiler_iccarm.h.
 163         - Added additional access functions for physical timer.
 164       CMSIS-DAP: 1.2.0 (see revision history for details)
 165       CMSIS-DSP: 1.5.2 (see revision history for details)
 166       CMSIS-Driver: 2.6.0 (see revision history for details)
 167         - CAN Driver API V1.2.0
 168         - NAND Driver API V2.3.0
 169       CMSIS-RTOS:
 170         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 171       CMSIS-RTOS2:
 172         - API 2.1.2 (see revision history for details)
 173         - RTX 5.2.3 (see revision history for details)
 174       Devices:
 175         - Added GCC startup and linker script for Cortex-A9.
 176         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 177         - Added IAR startup code for Cortex-A9
 178     </release>
 179     <release version="5.1.1" date="2017-09-19">
 180       CMSIS-RTOS2:
 181       - RTX 5.2.1 (see revision history for details)
 182     </release>
 183     <release version="5.1.0" date="2017-08-04">
 184       CMSIS-Core(M): 5.0.2 (see revision history for details)
 185       - Changed Version Control macros to be core agnostic.
 186       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 187       CMSIS-Core(A): 1.0.0 (see revision history for details)
 188       - Initial release
 189       - IRQ Controller API 1.0.0
 190       CMSIS-Driver: 2.05 (see revision history for details)
 191       - All typedefs related to status have been made volatile.
 192       CMSIS-RTOS2:
 193       - API 2.1.1 (see revision history for details)
 194       - RTX 5.2.0 (see revision history for details)
 195       - OS Tick API 1.0.0
 196       CMSIS-DSP: 1.5.2 (see revision history for details)
 197       - Fixed GNU Compiler specific diagnostics.
 198       CMSIS-Pack: 1.5.0 (see revision history for details)
 199       - added System Description File (*.SDF) Format
 200       CMSIS-Zone: 0.0.1 (Preview)
 201       - Initial specification draft
 202     </release>
 203     <release version="5.0.1" date="2017-02-03">
 204       Package Description:
 205       - added taxonomy for Cclass RTOS
 206       CMSIS-RTOS2:
 207       - API 2.1   (see revision history for details)
 208       - RTX 5.1.0 (see revision history for details)
 209       CMSIS-Core: 5.0.1 (see revision history for details)
 210       - Added __PACKED_STRUCT macro
 211       - Added uVisior support
 212       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 213       - Updated template for secure main function (main_s.c)
 214       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 215       CMSIS-DSP: 1.5.1 (see revision history for details)
 216       - added ARMv8M DSP libraries.
 217       CMSIS-Pack:1.4.9 (see revision history for details)
 218       - added Pack Index File specification and schema file
 219     </release>
 220     <release version="5.0.0" date="2016-11-11">
 221       Changed open source license to Apache 2.0
 222       CMSIS_Core:
 223        - Added support for Cortex-M23 and Cortex-M33.
 224        - Added ARMv8-M device configurations for mainline and baseline.
 225        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 226        - Added cmsis_compiler.h to unify compiler behaviour.
 227        - Updated function SCB_EnableICache (for Cortex-M7).
 228        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 229       CMSIS-RTOS:
 230         - bug fix in RTX 4.82 (see revision history for details)
 231       CMSIS-RTOS2:
 232         - new API including compatibility layer to CMSIS-RTOS
 233         - reference implementation based on RTX5
 234         - supports all Cortex-M variants including TrustZone for ARMv8-M
 235       CMSIS-SVD:
 236        - reworked SVD format documentation
 237        - removed SVD file database documentation as SVD files are distributed in packs
 238        - updated SVDConv for Win32 and Linux
 239       CMSIS-DSP:
 240        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 241        - Added DSP libraries build projects to CMSIS pack.
 242     </release>
 243     <release version="4.5.0" date="2015-10-28">
 244       - CMSIS-Core     4.30.0  (see revision history for details)
 245       - CMSIS-DAP      1.1.0   (unchanged)
 246       - CMSIS-Driver   2.04.0  (see revision history for details)
 247       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 248       - CMSIS-Pack     1.4.1   (see revision history for details)
 249       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 250       - CMSIS-SVD      1.3.1   (see revision history for details)
 251     </release>
 252     <release version="4.4.0" date="2015-09-11">
 253       - CMSIS-Core     4.20   (see revision history for details)
 254       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 255       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 256       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 257       - CMSIS-RTOS
 258         -- API         1.02   (unchanged)
 259         -- RTX         4.79   (see revision history for details)
 260       - CMSIS-SVD      1.3.0  (see revision history for details)
 261       - CMSIS-DAP      1.1.0  (extended with SWO support)
 262     </release>
 263     <release version="4.3.0" date="2015-03-20">
 264       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 265       - CMSIS-DSP      1.4.5  (see revision history for details)
 266       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 267       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 268       - CMSIS-RTOS
 269         -- API         1.02   (unchanged)
 270         -- RTX         4.78   (see revision history for details)
 271       - CMSIS-SVD      1.2    (unchanged)
 272     </release>
 273     <release version="4.2.0" date="2014-09-24">
 274       Adding Cortex-M7 support
 275       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 276       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 277       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 278       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 279       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 280     </release>
 281     <release version="4.1.1" date="2014-06-30">
 282       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 283     </release>
 284     <release version="4.1.0" date="2014-06-12">
 285       - CMSIS-Driver   2.02  (incompatible update)
 286       - CMSIS-Pack     1.3   (see revision history for details)
 287       - CMSIS-DSP      1.4.2 (unchanged)
 288       - CMSIS-Core     3.30  (unchanged)
 289       - CMSIS-RTOS RTX 4.74  (unchanged)
 290       - CMSIS-RTOS API 1.02  (unchanged)
 291       - CMSIS-SVD      1.10  (unchanged)
 292       PACK:
 293       - removed G++ specific files from PACK
 294       - added Component Startup variant "C Startup"
 295       - added Pack Checking Utility
 296       - updated conditions to reflect tool-chain dependency
 297       - added Taxonomy for Graphics
 298       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 299     </release>
 300     <!-- release version="4.0.0">
 301       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 302       - CMSIS-Pack     1.1   Preliminary
 303       - CMSIS-DSP      1.4.2 (see revision history for details)
 304       - CMSIS-Core     3.30  (see revision history for details)
 305       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 306       - CMSIS-RTOS API 1.02  (unchanged)
 307       - CMSIS-SVD      1.10  (unchanged)
 308     </release -->
 309     <release version="3.20.4" date="2014-02-20">
 310       - CMSIS-RTOS 4.74 (see revision history for details)
 311       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 312     </release>
 313     <!-- release version="3.20.3">
 314       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 315       - CMSIS-RTOS 4.73 (see revision history for details)
 316     </release -->
 317     <!-- release version="3.20.2">
 318       - CMSIS-Pack documentation has been added
 319       - CMSIS-Drivers header and documentation have been added to PACK
 320       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 321     </release -->
 322     <!-- release version="3.20.1">
 323       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 324       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 325     </release -->
 326     <!-- release version="3.20.0">
 327       The software portions that are deployed in the application program are now under a BSD license which allows usage
 328       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 329       The individual components have been update as listed below:
 330       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 331       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 332       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 333       - CMSIS-SVD is unchanged.
 334     </release -->
 335   </releases>
 336
 337   <taxonomy>
 338     <description Cclass="Audio">Software components for audio processing</description>
 339     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 340     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 341     <description Cclass="Compiler">Compiler Software Extensions</description>
 342     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 343     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 344     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 345     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 346     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 347     <description Cclass="File System">File Drive Support and File System</description>
 348     <description Cclass="IoT Client">IoT cloud client connector</description>
 349     <description Cclass="IoT Service">IoT specific services</description>
 350     <description Cclass="IoT Utility">IoT specific software utility</description>
 351     <description Cclass="Graphics">Graphical User Interface</description>
 352     <description Cclass="Network">Network Stack using Internet Protocols</description>
 353     <description Cclass="RTOS">Real-time Operating System</description>
 354     <description Cclass="Security">Encryption for secure communication or storage</description>
 355     <description Cclass="USB">Universal Serial Bus Stack</description>
 356     <description Cclass="Utility">Generic software utility components</description>
 357   </taxonomy>
 358
 359   <devices>
 360     <!-- ******************************  Cortex-M0  ****************************** -->
 361     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 362       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 363       <description>
 364 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 365 - simple, easy-to-use programmers model
 366 - highly efficient ultra-low power operation
 367 - excellent code density
 368 - deterministic, high-performance interrupt handling
 369 - upward compatibility with the rest of the Cortex-M processor family.
 370       </description>
 371       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 372       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 373       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 374       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 375
 376       <device Dname="ARMCM0">
 377         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 378         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 379       </device>
 380     </family>
 381
 382     <!-- ******************************  Cortex-M0P  ****************************** -->
 383     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 384       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 385       <description>
 386 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 387 - simple, easy-to-use programmers model
 388 - highly efficient ultra-low power operation
 389 - excellent code density
 390 - deterministic, high-performance interrupt handling
 391 - upward compatibility with the rest of the Cortex-M processor family.
 392       </description>
 393       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 394       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 395       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 396       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 397
 398       <device Dname="ARMCM0P">
 399         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 400         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 401       </device>
 402
 403       <device Dname="ARMCM0P_MPU">
 404         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 405         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 406       </device>
 407     </family>
 408
 409     <!-- ******************************  Cortex-M1  ****************************** -->
 410     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 411       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 412       <description>
 413 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 414 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 415       </description>
 416       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 417       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 418       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 419       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 420
 421       <device Dname="ARMCM1">
 422         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 423         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 424       </device>
 425     </family>
 426
 427     <!-- ******************************  Cortex-M3  ****************************** -->
 428     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 429       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 430       <description>
 431 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 432 - simple, easy-to-use programmers model
 433 - highly efficient ultra-low power operation
 434 - excellent code density
 435 - deterministic, high-performance interrupt handling
 436 - upward compatibility with the rest of the Cortex-M processor family.
 437       </description>
 438       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 439       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 440       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 441       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 442
 443       <device Dname="ARMCM3">
 444         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 445         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 446       </device>
 447     </family>
 448
 449     <!-- ******************************  Cortex-M4  ****************************** -->
 450     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 451       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 452       <description>
 453 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 454 - simple, easy-to-use programmers model
 455 - highly efficient ultra-low power operation
 456 - excellent code density
 457 - deterministic, high-performance interrupt handling
 458 - upward compatibility with the rest of the Cortex-M processor family.
 459       </description>
 460       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 461       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 462       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 463       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 464
 465       <device Dname="ARMCM4">
 466         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 467         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 468       </device>
 469
 470       <device Dname="ARMCM4_FP">
 471         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 472         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 473       </device>
 474     </family>
 475
 476     <!-- ******************************  Cortex-M7  ****************************** -->
 477     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 478       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 479       <description>
 480 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 481 - simple, easy-to-use programmers model
 482 - highly efficient ultra-low power operation
 483 - excellent code density
 484 - deterministic, high-performance interrupt handling
 485 - upward compatibility with the rest of the Cortex-M processor family.
 486       </description>
 487       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 488       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 489       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 490       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 491
 492       <device Dname="ARMCM7">
 493         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 494         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 495       </device>
 496
 497       <device Dname="ARMCM7_SP">
 498         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 499         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 500       </device>
 501
 502       <device Dname="ARMCM7_DP">
 503         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 504         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 505       </device>
 506     </family>
 507
 508     <!-- ******************************  Cortex-M23  ********************** -->
 509     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 510       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 511       <description>
 512 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 513 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 514 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 515       </description>
 516       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 517       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 518       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 519       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 520       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 521       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 522
 523       <device Dname="ARMCM23">
 524         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 525         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 526       </device>
 527
 528       <device Dname="ARMCM23_TZ">
 529         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 530         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 531       </device>
 532     </family>
 533
 534     <!-- ******************************  Cortex-M33  ****************************** -->
 535     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 536       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 537       <description>
 538 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 539 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 540       </description>
 541       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 542       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 543       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 544       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 545       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 546       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 547
 548       <device Dname="ARMCM33">
 549         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 550         <description>
 551           no DSP Instructions, no Floating Point Unit, no TrustZone
 552         </description>
 553         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 554       </device>
 555
 556       <device Dname="ARMCM33_TZ">
 557         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 558         <description>
 559           no DSP Instructions, no Floating Point Unit, TrustZone
 560         </description>
 561         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 562       </device>
 563
 564       <device Dname="ARMCM33_DSP_FP">
 565         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 566         <description>
 567           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 568         </description>
 569         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 570       </device>
 571
 572       <device Dname="ARMCM33_DSP_FP_TZ">
 573         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 574         <description>
 575           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 576         </description>
 577         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 578       </device>
 579     </family>
 580
 581     <!-- ******************************  Cortex-M35P  ****************************** -->
 582     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 583       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 584       <description>
 585 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 586 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 587       </description>
 588
 589       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 590       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 591       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 592       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 593       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 594       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 595
 596       <device Dname="ARMCM35P">
 597         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 598         <description>
 599           no DSP Instructions, no Floating Point Unit, no TrustZone
 600         </description>
 601         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 602       </device>
 603
 604       <device Dname="ARMCM35P_TZ">
 605         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 606         <description>
 607           no DSP Instructions, no Floating Point Unit, TrustZone
 608         </description>
 609         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 610       </device>
 611
 612       <device Dname="ARMCM35P_DSP_FP">
 613         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 614         <description>
 615           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 616         </description>
 617         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 618       </device>
 619
 620       <device Dname="ARMCM35P_DSP_FP_TZ">
 621         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 622         <description>
 623           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 624         </description>
 625         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 626       </device>
 627     </family>
 628
 629     <!-- ******************************  Cortex-M55  ****************************** -->
 630     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 631       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 632       <description>
 633 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 634 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 635 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 636       </description>
 637
 638       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 639       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 640       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 641       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 642       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 643       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 644
 645       <device Dname="ARMCM55">
 646         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 647         <description>
 648           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 649         </description>
 650         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 651       </device>
 652     </family>
 653
 654     <!-- ******************************  ARMSC000  ****************************** -->
 655     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 656       <description>
 657 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 658 - simple, easy-to-use programmers model
 659 - highly efficient ultra-low power operation
 660 - excellent code density
 661 - deterministic, high-performance interrupt handling
 662       </description>
 663       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 664       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 665       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 666       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 667
 668       <device Dname="ARMSC000">
 669         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 670         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 671       </device>
 672     </family>
 673
 674     <!-- ******************************  ARMSC300  ****************************** -->
 675     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 676       <description>
 677 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 678 - simple, easy-to-use programmers model
 679 - highly efficient ultra-low power operation
 680 - excellent code density
 681 - deterministic, high-performance interrupt handling
 682       </description>
 683       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 684       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 685       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 686       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 687
 688       <device Dname="ARMSC300">
 689         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 690         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 691       </device>
 692     </family>
 693
 694     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 695     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 696       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 697       <description>
 698 Armv8-M Baseline based device with TrustZone
 699       </description>
 700       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 701       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 702       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 703       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 704       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 705       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 706
 707       <device Dname="ARMv8MBL">
 708         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 709         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 710       </device>
 711     </family>
 712
 713     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 714     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 715       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 716       <description>
 717 Armv8-M Mainline based device with TrustZone
 718       </description>
 719       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 720       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 721       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 722       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 723       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 724       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 725
 726       <device Dname="ARMv8MML">
 727         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 728         <description>
 729           no DSP Instructions, no Floating Point Unit, TrustZone
 730         </description>
 731         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 732       </device>
 733
 734       <device Dname="ARMv8MML_DSP">
 735         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 736         <description>
 737           DSP Instructions, no Floating Point Unit, TrustZone
 738         </description>
 739         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 740       </device>
 741
 742       <device Dname="ARMv8MML_SP">
 743         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 744         <description>
 745           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 746         </description>
 747         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 748       </device>
 749
 750       <device Dname="ARMv8MML_DSP_SP">
 751         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 752         <description>
 753           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 754         </description>
 755         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 756       </device>
 757
 758       <device Dname="ARMv8MML_DP">
 759         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 760         <description>
 761           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 762         </description>
 763         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 764       </device>
 765
 766       <device Dname="ARMv8MML_DSP_DP">
 767         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 768         <description>
 769           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 770         </description>
 771         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 772       </device>
 773     </family>
 774
 775     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 776     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 777       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 778       <description>
 779 Armv8.1-M Mainline based device with TrustZone and MVE
 780       </description>
 781       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 782       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 783       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 784       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 785       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 786       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 787
 788
 789       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 790         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 791         <description>
 792           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 793         </description>
 794         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 795       </device>
 796     </family>
 797
 798     <!-- ******************************  Cortex-A5  ****************************** -->
 799     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 800       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 801       <description>
 802 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 803 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 804 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 805       </description>
 806
 807       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 808       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 809       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 810       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 811
 812       <device Dname="ARMCA5">
 813         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 814         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 815       </device>
 816     </family>
 817
 818     <!-- ******************************  Cortex-A7  ****************************** -->
 819     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 820       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 821       <description>
 822 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 823 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 824 an optional integrated GIC, and an optional L2 cache controller.
 825       </description>
 826
 827       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 828       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 829       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 830       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 831
 832       <device Dname="ARMCA7">
 833         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 834         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 835       </device>
 836     </family>
 837
 838     <!-- ******************************  Cortex-A9  ****************************** -->
 839     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 840       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 841       <description>
 842 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 843 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 844 and 8-bit Java bytecodes in Jazelle state.
 845       </description>
 846
 847       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 848       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 849       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 850       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 851
 852       <device Dname="ARMCA9">
 853         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 854         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 855       </device>
 856     </family>
 857   </devices>
 858
 859
 860   <apis>
 861     <!-- CMSIS Device API -->
 862     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 863       <description>Device interrupt controller interface</description>
 864       <files>
 865         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 866       </files>
 867     </api>
 868     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 869       <description>RTOS Kernel system tick timer interface</description>
 870       <files>
 871         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 872       </files>
 873     </api>
 874     <!-- CMSIS-RTOS API -->
 875     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 876       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 877       <files>
 878         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 879       </files>
 880     </api>
 881     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 882       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 883       <files>
 884         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 885         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 886       </files>
 887     </api>
 888     <!-- CMSIS Driver API -->
 889     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 890       <description>USART Driver API for Cortex-M</description>
 891       <files>
 892         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 893         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 894       </files>
 895     </api>
 896     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 897       <description>SPI Driver API for Cortex-M</description>
 898       <files>
 899         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 900         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 901       </files>
 902     </api>
 903     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 904       <description>SAI Driver API for Cortex-M</description>
 905       <files>
 906         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 907         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 908       </files>
 909     </api>
 910     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 911       <description>I2C Driver API for Cortex-M</description>
 912       <files>
 913         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 914         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 915       </files>
 916     </api>
 917     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 918       <description>CAN Driver API for Cortex-M</description>
 919       <files>
 920         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 921         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 922       </files>
 923     </api>
 924     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 925       <description>Flash Driver API for Cortex-M</description>
 926       <files>
 927         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 928         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 929       </files>
 930     </api>
 931     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 932       <description>MCI Driver API for Cortex-M</description>
 933       <files>
 934         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 935         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 936       </files>
 937     </api>
 938     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 939       <description>NAND Flash Driver API for Cortex-M</description>
 940       <files>
 941         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 942         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 943       </files>
 944     </api>
 945     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 946       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 947       <files>
 948         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 949         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 950         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 951       </files>
 952     </api>
 953     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 954       <description>Ethernet MAC Driver API for Cortex-M</description>
 955       <files>
 956         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 957         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 958       </files>
 959     </api>
 960     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 961       <description>Ethernet PHY Driver API for Cortex-M</description>
 962       <files>
 963         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 964         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 965       </files>
 966     </api>
 967     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 968       <description>USB Device Driver API for Cortex-M</description>
 969       <files>
 970         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 971         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 972       </files>
 973     </api>
 974     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 975       <description>USB Host Driver API for Cortex-M</description>
 976       <files>
 977         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 978         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 979       </files>
 980     </api>
 981     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 982       <description>WiFi driver</description>
 983       <files>
 984         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 985         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 986       </files>
 987     </api>
 988     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
 989       <description>Virtual I/O</description>
 990       <files>
 991         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
 992         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
 993         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
 994       </files>
 995     </api>
 996   </apis>
 997
 998   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 999   <conditions>
1000     <!-- compiler -->
1001     <condition id="ARMCC6">
1002       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1003       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1004     </condition>
1005     <condition id="ARMCC5">
1006       <require Tcompiler="ARMCC" Toptions="AC5"/>
1007     </condition>
1008     <condition id="ARMCC">
1009       <require Tcompiler="ARMCC"/>
1010     </condition>
1011     <condition id="GCC">
1012       <require Tcompiler="GCC"/>
1013     </condition>
1014     <condition id="IAR">
1015       <require Tcompiler="IAR"/>
1016     </condition>
1017     <condition id="ARMCC GCC">
1018       <accept Tcompiler="ARMCC"/>
1019       <accept Tcompiler="GCC"/>
1020     </condition>
1021     <condition id="ARMCC GCC IAR">
1022       <accept Tcompiler="ARMCC"/>
1023       <accept Tcompiler="GCC"/>
1024       <accept Tcompiler="IAR"/>
1025     </condition>
1026
1027     <!-- Arm architecture -->
1028     <condition id="ARMv6-M Device">
1029       <description>Armv6-M architecture based device</description>
1030       <accept Dcore="Cortex-M0"/>
1031       <accept Dcore="Cortex-M1"/>
1032       <accept Dcore="Cortex-M0+"/>
1033       <accept Dcore="SC000"/>
1034     </condition>
1035     <condition id="ARMv7-M Device">
1036       <description>Armv7-M architecture based device</description>
1037       <accept Dcore="Cortex-M3"/>
1038       <accept Dcore="Cortex-M4"/>
1039       <accept Dcore="Cortex-M7"/>
1040       <accept Dcore="SC300"/>
1041     </condition>
1042     <condition id="ARMv8-M Device">
1043       <description>Armv8-M architecture based device</description>
1044       <accept Dcore="ARMV8MBL"/>
1045       <accept Dcore="ARMV8MML"/>
1046       <accept Dcore="ARMV81MML"/>
1047       <accept Dcore="Cortex-M23"/>
1048       <accept Dcore="Cortex-M33"/>
1049       <accept Dcore="Cortex-M35P"/>
1050       <accept Dcore="Cortex-M55"/>
1051     </condition>
1052     <condition id="ARMv6_7-M Device">
1053       <description>Armv6_7-M architecture based device</description>
1054       <accept condition="ARMv6-M Device"/>
1055       <accept condition="ARMv7-M Device"/>
1056     </condition>
1057     <condition id="ARMv6_7_8-M Device">
1058       <description>Armv6_7_8-M architecture based device</description>
1059       <accept condition="ARMv6-M Device"/>
1060       <accept condition="ARMv7-M Device"/>
1061       <accept condition="ARMv8-M Device"/>
1062     </condition>
1063     <condition id="ARMv7-A Device">
1064       <description>Armv7-A architecture based device</description>
1065       <accept Dcore="Cortex-A5"/>
1066       <accept Dcore="Cortex-A7"/>
1067       <accept Dcore="Cortex-A9"/>
1068     </condition>
1069
1070     <condition id="TrustZone">
1071       <description>TrustZone</description>
1072       <require Dtz="TZ"/>
1073     </condition>
1074     <condition id="TZ Secure">
1075       <description>TrustZone (Secure)</description>
1076       <require Dtz="TZ"/>
1077       <require Dsecure="Secure"/>
1078     </condition>
1079     <condition id="TZ Non-secure">
1080       <description>TrustZone (Non-secure)</description>
1081       <require Dtz="TZ"/>
1082       <require Dsecure="Non-secure"/>
1083     </condition>
1084
1085     <!-- ARM core -->
1086     <condition id="CM0">
1087       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1088       <accept Dcore="Cortex-M0"/>
1089       <accept Dcore="Cortex-M0+"/>
1090       <accept Dcore="SC000"/>
1091     </condition>
1092     <condition id="CM1">
1093       <description>Cortex-M1</description>
1094       <require Dcore="Cortex-M1"/>
1095     </condition>
1096     <condition id="CM3">
1097       <description>Cortex-M3 or SC300 processor based device</description>
1098       <accept Dcore="Cortex-M3"/>
1099       <accept Dcore="SC300"/>
1100     </condition>
1101     <condition id="CM4">
1102       <description>Cortex-M4 processor based device</description>
1103       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1104     </condition>
1105     <condition id="CM4_FP">
1106       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1107       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1108       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1109       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1110     </condition>
1111     <condition id="CM7">
1112       <description>Cortex-M7 processor based device</description>
1113       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1114     </condition>
1115     <condition id="CM7_FP">
1116       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1117       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1118       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1119     </condition>
1120     <condition id="CM7_SP">
1121       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1122       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1123     </condition>
1124     <condition id="CM7_DP">
1125       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1126       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1127     </condition>
1128     <condition id="CM23">
1129       <description>Cortex-M23 processor based device</description>
1130       <require Dcore="Cortex-M23"/>
1131     </condition>
1132     <condition id="CM33">
1133       <description>Cortex-M33 processor based device</description>
1134       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1135     </condition>
1136     <condition id="CM33_FP">
1137       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1138       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1139     </condition>
1140     <condition id="CM35P">
1141       <description>Cortex-M35P processor based device</description>
1142       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1143     </condition>
1144     <condition id="CM35P_FP">
1145       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1146       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1147     </condition>
1148     <condition id="ARMv8MBL">
1149       <description>Armv8-M Baseline processor based device</description>
1150       <require Dcore="ARMV8MBL"/>
1151     </condition>
1152     <condition id="ARMv8MML">
1153       <description>Armv8-M Mainline processor based device</description>
1154       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1155     </condition>
1156     <condition id="ARMv8MML_FP">
1157       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1158       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1159       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1160     </condition>
1161
1162     <condition id="CM33_NODSP_NOFPU">
1163       <description>CM33, no DSP, no FPU</description>
1164       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1165     </condition>
1166     <condition id="CM33_DSP_NOFPU">
1167       <description>CM33, DSP, no FPU</description>
1168       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1169     </condition>
1170     <condition id="CM33_NODSP_SP">
1171       <description>CM33, no DSP, SP FPU</description>
1172       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1173     </condition>
1174     <condition id="CM33_DSP_SP">
1175       <description>CM33, DSP, SP FPU</description>
1176       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1177     </condition>
1178
1179     <condition id="CM35P_NODSP_NOFPU">
1180       <description>CM35P, no DSP, no FPU</description>
1181       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1182     </condition>
1183     <condition id="CM35P_DSP_NOFPU">
1184       <description>CM35P, DSP, no FPU</description>
1185       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1186     </condition>
1187     <condition id="CM35P_NODSP_SP">
1188       <description>CM35P, no DSP, SP FPU</description>
1189       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1190     </condition>
1191     <condition id="CM35P_DSP_SP">
1192       <description>CM35P, DSP, SP FPU</description>
1193       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1194     </condition>
1195
1196     <condition id="CM55_NOFPU_NOMVE">
1197       <description>Cortex-M55, no FPU, no MVE</description>
1198       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1199     </condition>
1200     <condition id="CM55_NOFPU_MVE">
1201       <description>Cortex-M55, no FPU, MVE</description>
1202       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1203       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1204     </condition>
1205     <condition id="CM55_FPU">
1206       <description>Cortex-M55, FPU</description>
1207       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1208       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1209     </condition>
1210
1211     <condition id="ARMv8MML_NODSP_NOFPU">
1212       <description>Armv8-M Mainline, no DSP, no FPU</description>
1213       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1214     </condition>
1215     <condition id="ARMv8MML_DSP_NOFPU">
1216       <description>Armv8-M Mainline, DSP, no FPU</description>
1217       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1218     </condition>
1219     <condition id="ARMv8MML_NODSP_SP">
1220       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1221       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1222     </condition>
1223     <condition id="ARMv8MML_DSP_SP">
1224       <description>Armv8-M Mainline, DSP, SP FPU</description>
1225       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1226     </condition>
1227
1228     <condition id="CA5_CA9">
1229       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1230       <accept Dcore="Cortex-A5"/>
1231       <accept Dcore="Cortex-A9"/>
1232     </condition>
1233
1234     <condition id="CA7">
1235       <description>Cortex-A7 processor based device</description>
1236       <accept Dcore="Cortex-A7"/>
1237     </condition>
1238
1239     <!-- ARMCC compiler -->
1240     <condition id="CA_ARMCC5">
1241       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1242       <require condition="ARMv7-A Device"/>
1243       <require condition="ARMCC5"/>
1244     </condition>
1245     <condition id="CA_ARMCC6">
1246       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1247       <require condition="ARMv7-A Device"/>
1248       <require condition="ARMCC6"/>
1249     </condition>
1250
1251     <condition id="CM0_ARMCC">
1252       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1253       <require condition="CM0"/>
1254       <require Tcompiler="ARMCC"/>
1255     </condition>
1256     <condition id="CM0_LE_ARMCC">
1257       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1258       <require condition="CM0_ARMCC"/>
1259       <require Dendian="Little-endian"/>
1260     </condition>
1261     <condition id="CM0_BE_ARMCC">
1262       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1263       <require condition="CM0_ARMCC"/>
1264       <require Dendian="Big-endian"/>
1265     </condition>
1266
1267     <condition id="CM1_ARMCC">
1268       <description>Cortex-M1 based device for the Arm Compiler</description>
1269       <require condition="CM1"/>
1270       <require Tcompiler="ARMCC"/>
1271     </condition>
1272     <condition id="CM1_LE_ARMCC">
1273       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1274       <require condition="CM1_ARMCC"/>
1275       <require Dendian="Little-endian"/>
1276     </condition>
1277     <condition id="CM1_BE_ARMCC">
1278       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1279       <require condition="CM1_ARMCC"/>
1280       <require Dendian="Big-endian"/>
1281     </condition>
1282
1283     <condition id="CM3_ARMCC">
1284       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1285       <require condition="CM3"/>
1286       <require Tcompiler="ARMCC"/>
1287     </condition>
1288     <condition id="CM3_LE_ARMCC">
1289       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1290       <require condition="CM3_ARMCC"/>
1291       <require Dendian="Little-endian"/>
1292     </condition>
1293     <condition id="CM3_BE_ARMCC">
1294       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1295       <require condition="CM3_ARMCC"/>
1296       <require Dendian="Big-endian"/>
1297     </condition>
1298
1299     <condition id="CM4_ARMCC">
1300       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1301       <require condition="CM4"/>
1302       <require Tcompiler="ARMCC"/>
1303     </condition>
1304     <condition id="CM4_LE_ARMCC">
1305       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1306       <require condition="CM4_ARMCC"/>
1307       <require Dendian="Little-endian"/>
1308     </condition>
1309     <condition id="CM4_BE_ARMCC">
1310       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1311       <require condition="CM4_ARMCC"/>
1312       <require Dendian="Big-endian"/>
1313     </condition>
1314
1315     <condition id="CM4_FP_ARMCC">
1316       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1317       <require condition="CM4_FP"/>
1318       <require Tcompiler="ARMCC"/>
1319     </condition>
1320     <condition id="CM4_FP_LE_ARMCC">
1321       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1322       <require condition="CM4_FP_ARMCC"/>
1323       <require Dendian="Little-endian"/>
1324     </condition>
1325     <condition id="CM4_FP_BE_ARMCC">
1326       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1327       <require condition="CM4_FP_ARMCC"/>
1328       <require Dendian="Big-endian"/>
1329     </condition>
1330
1331     <condition id="CM7_ARMCC">
1332       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1333       <require condition="CM7"/>
1334       <require Tcompiler="ARMCC"/>
1335     </condition>
1336     <condition id="CM7_LE_ARMCC">
1337       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1338       <require condition="CM7_ARMCC"/>
1339       <require Dendian="Little-endian"/>
1340     </condition>
1341     <condition id="CM7_BE_ARMCC">
1342       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1343       <require condition="CM7_ARMCC"/>
1344       <require Dendian="Big-endian"/>
1345     </condition>
1346
1347     <condition id="CM7_FP_ARMCC">
1348       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1349       <require condition="CM7_FP"/>
1350       <require Tcompiler="ARMCC"/>
1351     </condition>
1352     <condition id="CM7_FP_LE_ARMCC">
1353       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1354       <require condition="CM7_FP_ARMCC"/>
1355       <require Dendian="Little-endian"/>
1356     </condition>
1357     <condition id="CM7_FP_BE_ARMCC">
1358       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1359       <require condition="CM7_FP_ARMCC"/>
1360       <require Dendian="Big-endian"/>
1361     </condition>
1362
1363     <condition id="CM7_SP_ARMCC">
1364       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1365       <require condition="CM7_SP"/>
1366       <require Tcompiler="ARMCC"/>
1367     </condition>
1368     <condition id="CM7_SP_LE_ARMCC">
1369       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1370       <require condition="CM7_SP_ARMCC"/>
1371       <require Dendian="Little-endian"/>
1372     </condition>
1373     <condition id="CM7_SP_BE_ARMCC">
1374       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1375       <require condition="CM7_SP_ARMCC"/>
1376       <require Dendian="Big-endian"/>
1377     </condition>
1378
1379     <condition id="CM7_DP_ARMCC">
1380       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1381       <require condition="CM7_DP"/>
1382       <require Tcompiler="ARMCC"/>
1383     </condition>
1384     <condition id="CM7_DP_LE_ARMCC">
1385       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1386       <require condition="CM7_DP_ARMCC"/>
1387       <require Dendian="Little-endian"/>
1388     </condition>
1389     <condition id="CM7_DP_BE_ARMCC">
1390       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1391       <require condition="CM7_DP_ARMCC"/>
1392       <require Dendian="Big-endian"/>
1393     </condition>
1394
1395     <condition id="CM23_ARMCC">
1396       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1397       <require condition="CM23"/>
1398       <require Tcompiler="ARMCC"/>
1399     </condition>
1400     <condition id="CM23_LE_ARMCC">
1401       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1402       <require condition="CM23_ARMCC"/>
1403       <require Dendian="Little-endian"/>
1404     </condition>
1405
1406     <condition id="CM33_ARMCC">
1407       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1408       <require condition="CM33"/>
1409       <require Tcompiler="ARMCC"/>
1410     </condition>
1411     <condition id="CM33_LE_ARMCC">
1412       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1413       <require condition="CM33_ARMCC"/>
1414       <require Dendian="Little-endian"/>
1415     </condition>
1416
1417     <condition id="CM33_FP_ARMCC">
1418       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1419       <require condition="CM33_FP"/>
1420       <require Tcompiler="ARMCC"/>
1421     </condition>
1422     <condition id="CM33_FP_LE_ARMCC">
1423       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1424       <require condition="CM33_FP_ARMCC"/>
1425       <require Dendian="Little-endian"/>
1426     </condition>
1427
1428     <condition id="CM33_NODSP_NOFPU_ARMCC">
1429       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1430       <require condition="CM33_NODSP_NOFPU"/>
1431       <require Tcompiler="ARMCC"/>
1432     </condition>
1433     <condition id="CM33_DSP_NOFPU_ARMCC">
1434       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1435       <require condition="CM33_DSP_NOFPU"/>
1436       <require Tcompiler="ARMCC"/>
1437     </condition>
1438     <condition id="CM33_NODSP_SP_ARMCC">
1439       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1440       <require condition="CM33_NODSP_SP"/>
1441       <require Tcompiler="ARMCC"/>
1442     </condition>
1443     <condition id="CM33_DSP_SP_ARMCC">
1444       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1445       <require condition="CM33_DSP_SP"/>
1446       <require Tcompiler="ARMCC"/>
1447     </condition>
1448     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1449       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1450       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1451       <require Dendian="Little-endian"/>
1452     </condition>
1453     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1454       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1455       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1456       <require Dendian="Little-endian"/>
1457     </condition>
1458     <condition id="CM33_NODSP_SP_LE_ARMCC">
1459       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1460       <require condition="CM33_NODSP_SP_ARMCC"/>
1461       <require Dendian="Little-endian"/>
1462     </condition>
1463     <condition id="CM33_DSP_SP_LE_ARMCC">
1464       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1465       <require condition="CM33_DSP_SP_ARMCC"/>
1466       <require Dendian="Little-endian"/>
1467     </condition>
1468
1469     <condition id="CM35P_ARMCC">
1470       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1471       <require condition="CM35P"/>
1472       <require Tcompiler="ARMCC"/>
1473     </condition>
1474     <condition id="CM35P_LE_ARMCC">
1475       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1476       <require condition="CM35P_ARMCC"/>
1477       <require Dendian="Little-endian"/>
1478     </condition>
1479
1480     <condition id="CM35P_FP_ARMCC">
1481       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1482       <require condition="CM35P_FP"/>
1483       <require Tcompiler="ARMCC"/>
1484     </condition>
1485     <condition id="CM35P_FP_LE_ARMCC">
1486       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1487       <require condition="CM35P_FP_ARMCC"/>
1488       <require Dendian="Little-endian"/>
1489     </condition>
1490
1491     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1492       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1493       <require condition="CM35P_NODSP_NOFPU"/>
1494       <require Tcompiler="ARMCC"/>
1495     </condition>
1496     <condition id="CM35P_DSP_NOFPU_ARMCC">
1497       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1498       <require condition="CM35P_DSP_NOFPU"/>
1499       <require Tcompiler="ARMCC"/>
1500     </condition>
1501     <condition id="CM35P_NODSP_SP_ARMCC">
1502       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1503       <require condition="CM35P_NODSP_SP"/>
1504       <require Tcompiler="ARMCC"/>
1505     </condition>
1506     <condition id="CM35P_DSP_SP_ARMCC">
1507       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1508       <require condition="CM35P_DSP_SP"/>
1509       <require Tcompiler="ARMCC"/>
1510     </condition>
1511     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1512       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1513       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1514       <require Dendian="Little-endian"/>
1515     </condition>
1516     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1517       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1518       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1519       <require Dendian="Little-endian"/>
1520     </condition>
1521     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1522       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1523       <require condition="CM35P_NODSP_SP_ARMCC"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526     <condition id="CM35P_DSP_SP_LE_ARMCC">
1527       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1528       <require condition="CM35P_DSP_SP_ARMCC"/>
1529       <require Dendian="Little-endian"/>
1530     </condition>
1531
1532     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1533       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1534       <require condition="CM55_NOFPU_NOMVE"/>
1535       <require Tcompiler="ARMCC"/>
1536     </condition>
1537     <condition id="CM55_NOFPU_MVE_ARMCC">
1538       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1539       <require condition="CM55_NOFPU_MVE"/>
1540       <require Tcompiler="ARMCC"/>
1541     </condition>
1542     <condition id="CM55_FPU_ARMCC">
1543       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1544       <require condition="CM55_FPU"/>
1545       <require Tcompiler="ARMCC"/>
1546     </condition>
1547     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1548       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1549       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1550       <require Dendian="Little-endian"/>
1551     </condition>
1552     <condition id="CM55_FPU_LE_ARMCC">
1553       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1554       <require condition="CM55_FPU_ARMCC"/>
1555       <require Dendian="Little-endian"/>
1556     </condition>
1557
1558     <condition id="ARMv8MBL_ARMCC">
1559       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1560       <require condition="ARMv8MBL"/>
1561       <require Tcompiler="ARMCC"/>
1562     </condition>
1563     <condition id="ARMv8MBL_LE_ARMCC">
1564       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1565       <require condition="ARMv8MBL_ARMCC"/>
1566       <require Dendian="Little-endian"/>
1567     </condition>
1568
1569     <condition id="ARMv8MML_ARMCC">
1570       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1571       <require condition="ARMv8MML"/>
1572       <require Tcompiler="ARMCC"/>
1573     </condition>
1574     <condition id="ARMv8MML_LE_ARMCC">
1575       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1576       <require condition="ARMv8MML_ARMCC"/>
1577       <require Dendian="Little-endian"/>
1578     </condition>
1579
1580     <condition id="ARMv8MML_FP_ARMCC">
1581       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1582       <require condition="ARMv8MML_FP"/>
1583       <require Tcompiler="ARMCC"/>
1584     </condition>
1585     <condition id="ARMv8MML_FP_LE_ARMCC">
1586       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1587       <require condition="ARMv8MML_FP_ARMCC"/>
1588       <require Dendian="Little-endian"/>
1589     </condition>
1590
1591     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1592       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1593       <require condition="ARMv8MML_NODSP_NOFPU"/>
1594       <require Tcompiler="ARMCC"/>
1595     </condition>
1596     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1597       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1598       <require condition="ARMv8MML_DSP_NOFPU"/>
1599       <require Tcompiler="ARMCC"/>
1600     </condition>
1601     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1602       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1603       <require condition="ARMv8MML_NODSP_SP"/>
1604       <require Tcompiler="ARMCC"/>
1605     </condition>
1606     <condition id="ARMv8MML_DSP_SP_ARMCC">
1607       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1608       <require condition="ARMv8MML_DSP_SP"/>
1609       <require Tcompiler="ARMCC"/>
1610     </condition>
1611     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1612       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1613       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1614       <require Dendian="Little-endian"/>
1615     </condition>
1616     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1617       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1618       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1619       <require Dendian="Little-endian"/>
1620     </condition>
1621     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1622       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1623       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1624       <require Dendian="Little-endian"/>
1625     </condition>
1626     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1627       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1628       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1629       <require Dendian="Little-endian"/>
1630     </condition>
1631
1632     <!-- GCC compiler -->
1633     <condition id="CA_GCC">
1634       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1635       <require condition="ARMv7-A Device"/>
1636       <require Tcompiler="GCC"/>
1637     </condition>
1638
1639     <condition id="CM0_GCC">
1640       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1641       <require condition="CM0"/>
1642       <require Tcompiler="GCC"/>
1643     </condition>
1644     <condition id="CM0_LE_GCC">
1645       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1646       <require condition="CM0_GCC"/>
1647       <require Dendian="Little-endian"/>
1648     </condition>
1649     <condition id="CM0_BE_GCC">
1650       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1651       <require condition="CM0_GCC"/>
1652       <require Dendian="Big-endian"/>
1653     </condition>
1654
1655     <condition id="CM1_GCC">
1656       <description>Cortex-M1 based device for the GCC Compiler</description>
1657       <require condition="CM1"/>
1658       <require Tcompiler="GCC"/>
1659     </condition>
1660     <condition id="CM1_LE_GCC">
1661       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1662       <require condition="CM1_GCC"/>
1663       <require Dendian="Little-endian"/>
1664     </condition>
1665     <condition id="CM1_BE_GCC">
1666       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1667       <require condition="CM1_GCC"/>
1668       <require Dendian="Big-endian"/>
1669     </condition>
1670
1671     <condition id="CM3_GCC">
1672       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1673       <require condition="CM3"/>
1674       <require Tcompiler="GCC"/>
1675     </condition>
1676     <condition id="CM3_LE_GCC">
1677       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1678       <require condition="CM3_GCC"/>
1679       <require Dendian="Little-endian"/>
1680     </condition>
1681     <condition id="CM3_BE_GCC">
1682       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1683       <require condition="CM3_GCC"/>
1684       <require Dendian="Big-endian"/>
1685     </condition>
1686
1687     <condition id="CM4_GCC">
1688       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1689       <require condition="CM4"/>
1690       <require Tcompiler="GCC"/>
1691     </condition>
1692     <condition id="CM4_LE_GCC">
1693       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1694       <require condition="CM4_GCC"/>
1695       <require Dendian="Little-endian"/>
1696     </condition>
1697     <condition id="CM4_BE_GCC">
1698       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1699       <require condition="CM4_GCC"/>
1700       <require Dendian="Big-endian"/>
1701     </condition>
1702
1703     <condition id="CM4_FP_GCC">
1704       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1705       <require condition="CM4_FP"/>
1706       <require Tcompiler="GCC"/>
1707     </condition>
1708     <condition id="CM4_FP_LE_GCC">
1709       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1710       <require condition="CM4_FP_GCC"/>
1711       <require Dendian="Little-endian"/>
1712     </condition>
1713     <condition id="CM4_FP_BE_GCC">
1714       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1715       <require condition="CM4_FP_GCC"/>
1716       <require Dendian="Big-endian"/>
1717     </condition>
1718
1719     <condition id="CM7_GCC">
1720       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1721       <require condition="CM7"/>
1722       <require Tcompiler="GCC"/>
1723     </condition>
1724     <condition id="CM7_LE_GCC">
1725       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1726       <require condition="CM7_GCC"/>
1727       <require Dendian="Little-endian"/>
1728     </condition>
1729     <condition id="CM7_BE_GCC">
1730       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1731       <require condition="CM7_GCC"/>
1732       <require Dendian="Big-endian"/>
1733     </condition>
1734
1735     <condition id="CM7_FP_GCC">
1736       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1737       <require condition="CM7_FP"/>
1738       <require Tcompiler="GCC"/>
1739     </condition>
1740     <condition id="CM7_FP_LE_GCC">
1741       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1742       <require condition="CM7_FP_GCC"/>
1743       <require Dendian="Little-endian"/>
1744     </condition>
1745     <condition id="CM7_FP_BE_GCC">
1746       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1747       <require condition="CM7_FP_GCC"/>
1748       <require Dendian="Big-endian"/>
1749     </condition>
1750
1751     <condition id="CM7_SP_GCC">
1752       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1753       <require condition="CM7_SP"/>
1754       <require Tcompiler="GCC"/>
1755     </condition>
1756     <condition id="CM7_SP_LE_GCC">
1757       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1758       <require condition="CM7_SP_GCC"/>
1759       <require Dendian="Little-endian"/>
1760     </condition>
1761
1762     <condition id="CM7_DP_GCC">
1763       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1764       <require condition="CM7_DP"/>
1765       <require Tcompiler="GCC"/>
1766     </condition>
1767     <condition id="CM7_DP_LE_GCC">
1768       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1769       <require condition="CM7_DP_GCC"/>
1770       <require Dendian="Little-endian"/>
1771     </condition>
1772
1773     <condition id="CM23_GCC">
1774       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1775       <require condition="CM23"/>
1776       <require Tcompiler="GCC"/>
1777     </condition>
1778     <condition id="CM23_LE_GCC">
1779       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1780       <require condition="CM23_GCC"/>
1781       <require Dendian="Little-endian"/>
1782     </condition>
1783
1784     <condition id="CM33_GCC">
1785       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1786       <require condition="CM33"/>
1787       <require Tcompiler="GCC"/>
1788     </condition>
1789     <condition id="CM33_LE_GCC">
1790       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1791       <require condition="CM33_GCC"/>
1792       <require Dendian="Little-endian"/>
1793     </condition>
1794
1795     <condition id="CM33_FP_GCC">
1796       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1797       <require condition="CM33_FP"/>
1798       <require Tcompiler="GCC"/>
1799     </condition>
1800     <condition id="CM33_FP_LE_GCC">
1801       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1802       <require condition="CM33_FP_GCC"/>
1803       <require Dendian="Little-endian"/>
1804     </condition>
1805
1806     <condition id="CM33_NODSP_NOFPU_GCC">
1807       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1808       <require condition="CM33_NODSP_NOFPU"/>
1809       <require Tcompiler="GCC"/>
1810     </condition>
1811     <condition id="CM33_DSP_NOFPU_GCC">
1812       <description>CM33, DSP, no FPU, GCC Compiler</description>
1813       <require condition="CM33_DSP_NOFPU"/>
1814       <require Tcompiler="GCC"/>
1815     </condition>
1816     <condition id="CM33_NODSP_SP_GCC">
1817       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1818       <require condition="CM33_NODSP_SP"/>
1819       <require Tcompiler="GCC"/>
1820     </condition>
1821     <condition id="CM33_DSP_SP_GCC">
1822       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1823       <require condition="CM33_DSP_SP"/>
1824       <require Tcompiler="GCC"/>
1825     </condition>
1826     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1827       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1828       <require condition="CM33_NODSP_NOFPU_GCC"/>
1829       <require Dendian="Little-endian"/>
1830     </condition>
1831     <condition id="CM33_DSP_NOFPU_LE_GCC">
1832       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1833       <require condition="CM33_DSP_NOFPU_GCC"/>
1834       <require Dendian="Little-endian"/>
1835     </condition>
1836     <condition id="CM33_NODSP_SP_LE_GCC">
1837       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1838       <require condition="CM33_NODSP_SP_GCC"/>
1839       <require Dendian="Little-endian"/>
1840     </condition>
1841     <condition id="CM33_DSP_SP_LE_GCC">
1842       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1843       <require condition="CM33_DSP_SP_GCC"/>
1844       <require Dendian="Little-endian"/>
1845     </condition>
1846
1847     <condition id="CM35P_GCC">
1848       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1849       <require condition="CM35P"/>
1850       <require Tcompiler="GCC"/>
1851     </condition>
1852     <condition id="CM35P_LE_GCC">
1853       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1854       <require condition="CM35P_GCC"/>
1855       <require Dendian="Little-endian"/>
1856     </condition>
1857
1858     <condition id="CM35P_FP_GCC">
1859       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1860       <require condition="CM35P_FP"/>
1861       <require Tcompiler="GCC"/>
1862     </condition>
1863     <condition id="CM35P_FP_LE_GCC">
1864       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1865       <require condition="CM35P_FP_GCC"/>
1866       <require Dendian="Little-endian"/>
1867     </condition>
1868
1869     <condition id="CM35P_NODSP_NOFPU_GCC">
1870       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1871       <require condition="CM35P_NODSP_NOFPU"/>
1872       <require Tcompiler="GCC"/>
1873     </condition>
1874     <condition id="CM35P_DSP_NOFPU_GCC">
1875       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1876       <require condition="CM35P_DSP_NOFPU"/>
1877       <require Tcompiler="GCC"/>
1878     </condition>
1879     <condition id="CM35P_NODSP_SP_GCC">
1880       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1881       <require condition="CM35P_NODSP_SP"/>
1882       <require Tcompiler="GCC"/>
1883     </condition>
1884     <condition id="CM35P_DSP_SP_GCC">
1885       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1886       <require condition="CM35P_DSP_SP"/>
1887       <require Tcompiler="GCC"/>
1888     </condition>
1889     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1890       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1891       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1892       <require Dendian="Little-endian"/>
1893     </condition>
1894     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1895       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1896       <require condition="CM35P_DSP_NOFPU_GCC"/>
1897       <require Dendian="Little-endian"/>
1898     </condition>
1899     <condition id="CM35P_NODSP_SP_LE_GCC">
1900       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1901       <require condition="CM35P_NODSP_SP_GCC"/>
1902       <require Dendian="Little-endian"/>
1903     </condition>
1904     <condition id="CM35P_DSP_SP_LE_GCC">
1905       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1906       <require condition="CM35P_DSP_SP_GCC"/>
1907       <require Dendian="Little-endian"/>
1908     </condition>
1909
1910     <condition id="CM55_NOFPU_NOMVE_GCC">
1911       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1912       <require condition="CM55_NOFPU_NOMVE"/>
1913       <require Tcompiler="GCC"/>
1914     </condition>
1915     <condition id="CM55_NOFPU_MVE_GCC">
1916       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1917       <require condition="CM55_NOFPU_MVE"/>
1918       <require Tcompiler="GCC"/>
1919     </condition>
1920     <condition id="CM55_FPU_GCC">
1921       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1922       <require condition="CM55_FPU"/>
1923       <require Tcompiler="GCC"/>
1924     </condition>
1925     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1926       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1927       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1928       <require Dendian="Little-endian"/>
1929     </condition>
1930     <condition id="CM55_FPU_LE_GCC">
1931       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1932       <require condition="CM55_FPU_GCC"/>
1933       <require Dendian="Little-endian"/>
1934     </condition>
1935
1936     <condition id="ARMv8MBL_GCC">
1937       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1938       <require condition="ARMv8MBL"/>
1939       <require Tcompiler="GCC"/>
1940     </condition>
1941     <condition id="ARMv8MBL_LE_GCC">
1942       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1943       <require condition="ARMv8MBL_GCC"/>
1944       <require Dendian="Little-endian"/>
1945     </condition>
1946
1947     <condition id="ARMv8MML_GCC">
1948       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1949       <require condition="ARMv8MML"/>
1950       <require Tcompiler="GCC"/>
1951     </condition>
1952     <condition id="ARMv8MML_LE_GCC">
1953       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1954       <require condition="ARMv8MML_GCC"/>
1955       <require Dendian="Little-endian"/>
1956     </condition>
1957
1958     <condition id="ARMv8MML_FP_GCC">
1959       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1960       <require condition="ARMv8MML_FP"/>
1961       <require Tcompiler="GCC"/>
1962     </condition>
1963     <condition id="ARMv8MML_FP_LE_GCC">
1964       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1965       <require condition="ARMv8MML_FP_GCC"/>
1966       <require Dendian="Little-endian"/>
1967     </condition>
1968
1969     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1970       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1971       <require condition="ARMv8MML_NODSP_NOFPU"/>
1972       <require Tcompiler="GCC"/>
1973     </condition>
1974     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1975       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1976       <require condition="ARMv8MML_DSP_NOFPU"/>
1977       <require Tcompiler="GCC"/>
1978     </condition>
1979     <condition id="ARMv8MML_NODSP_SP_GCC">
1980       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1981       <require condition="ARMv8MML_NODSP_SP"/>
1982       <require Tcompiler="GCC"/>
1983     </condition>
1984     <condition id="ARMv8MML_DSP_SP_GCC">
1985       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1986       <require condition="ARMv8MML_DSP_SP"/>
1987       <require Tcompiler="GCC"/>
1988     </condition>
1989     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1990       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1991       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1992       <require Dendian="Little-endian"/>
1993     </condition>
1994     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1995       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1996       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1997       <require Dendian="Little-endian"/>
1998     </condition>
1999     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
2000       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
2001       <require condition="ARMv8MML_NODSP_SP_GCC"/>
2002       <require Dendian="Little-endian"/>
2003     </condition>
2004     <condition id="ARMv8MML_DSP_SP_LE_GCC">
2005       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
2006       <require condition="ARMv8MML_DSP_SP_GCC"/>
2007       <require Dendian="Little-endian"/>
2008     </condition>
2009
2010     <!-- IAR compiler -->
2011     <condition id="CA_IAR">
2012       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
2013       <require condition="ARMv7-A Device"/>
2014       <require Tcompiler="IAR"/>
2015     </condition>
2016
2017     <condition id="CM0_IAR">
2018       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
2019       <require condition="CM0"/>
2020       <require Tcompiler="IAR"/>
2021     </condition>
2022     <condition id="CM0_LE_IAR">
2023       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
2024       <require condition="CM0_IAR"/>
2025       <require Dendian="Little-endian"/>
2026     </condition>
2027     <condition id="CM0_BE_IAR">
2028       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
2029       <require condition="CM0_IAR"/>
2030       <require Dendian="Big-endian"/>
2031     </condition>
2032
2033     <condition id="CM1_IAR">
2034       <description>Cortex-M1 based device for the IAR Compiler</description>
2035       <require condition="CM1"/>
2036       <require Tcompiler="IAR"/>
2037     </condition>
2038     <condition id="CM1_LE_IAR">
2039       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
2040       <require condition="CM1_IAR"/>
2041       <require Dendian="Little-endian"/>
2042     </condition>
2043     <condition id="CM1_BE_IAR">
2044       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
2045       <require condition="CM1_IAR"/>
2046       <require Dendian="Big-endian"/>
2047     </condition>
2048
2049     <condition id="CM3_IAR">
2050       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
2051       <require condition="CM3"/>
2052       <require Tcompiler="IAR"/>
2053     </condition>
2054     <condition id="CM3_LE_IAR">
2055       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
2056       <require condition="CM3_IAR"/>
2057       <require Dendian="Little-endian"/>
2058     </condition>
2059     <condition id="CM3_BE_IAR">
2060       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
2061       <require condition="CM3_IAR"/>
2062       <require Dendian="Big-endian"/>
2063     </condition>
2064
2065     <condition id="CM4_IAR">
2066       <description>Cortex-M4 processor based device for the IAR Compiler</description>
2067       <require condition="CM4"/>
2068       <require Tcompiler="IAR"/>
2069     </condition>
2070     <condition id="CM4_LE_IAR">
2071       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
2072       <require condition="CM4_IAR"/>
2073       <require Dendian="Little-endian"/>
2074     </condition>
2075     <condition id="CM4_BE_IAR">
2076       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2077       <require condition="CM4_IAR"/>
2078       <require Dendian="Big-endian"/>
2079     </condition>
2080
2081     <condition id="CM4_FP_IAR">
2082       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2083       <require condition="CM4_FP"/>
2084       <require Tcompiler="IAR"/>
2085     </condition>
2086     <condition id="CM4_FP_LE_IAR">
2087       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2088       <require condition="CM4_FP_IAR"/>
2089       <require Dendian="Little-endian"/>
2090     </condition>
2091     <condition id="CM4_FP_BE_IAR">
2092       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2093       <require condition="CM4_FP_IAR"/>
2094       <require Dendian="Big-endian"/>
2095     </condition>
2096
2097     <condition id="CM7_IAR">
2098       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2099       <require condition="CM7"/>
2100       <require Tcompiler="IAR"/>
2101     </condition>
2102     <condition id="CM7_LE_IAR">
2103       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2104       <require condition="CM7_IAR"/>
2105       <require Dendian="Little-endian"/>
2106     </condition>
2107     <condition id="CM7_BE_IAR">
2108       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2109       <require condition="CM7_IAR"/>
2110       <require Dendian="Big-endian"/>
2111     </condition>
2112
2113     <condition id="CM7_FP_IAR">
2114       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2115       <require condition="CM7_FP"/>
2116       <require Tcompiler="IAR"/>
2117     </condition>
2118     <condition id="CM7_FP_LE_IAR">
2119       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2120       <require condition="CM7_FP_IAR"/>
2121       <require Dendian="Little-endian"/>
2122     </condition>
2123     <condition id="CM7_FP_BE_IAR">
2124       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2125       <require condition="CM7_FP_IAR"/>
2126       <require Dendian="Big-endian"/>
2127     </condition>
2128
2129     <condition id="CM7_SP_IAR">
2130       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2131       <require condition="CM7_SP"/>
2132       <require Tcompiler="IAR"/>
2133     </condition>
2134     <condition id="CM7_SP_LE_IAR">
2135       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2136       <require condition="CM7_SP_IAR"/>
2137       <require Dendian="Little-endian"/>
2138     </condition>
2139     <condition id="CM7_SP_BE_IAR">
2140       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2141       <require condition="CM7_SP_IAR"/>
2142       <require Dendian="Big-endian"/>
2143     </condition>
2144
2145     <condition id="CM7_DP_IAR">
2146       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2147       <require condition="CM7_DP"/>
2148       <require Tcompiler="IAR"/>
2149     </condition>
2150     <condition id="CM7_DP_LE_IAR">
2151       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2152       <require condition="CM7_DP_IAR"/>
2153       <require Dendian="Little-endian"/>
2154     </condition>
2155     <condition id="CM7_DP_BE_IAR">
2156       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2157       <require condition="CM7_DP_IAR"/>
2158       <require Dendian="Big-endian"/>
2159     </condition>
2160
2161     <condition id="CM23_IAR">
2162       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2163       <require condition="CM23"/>
2164       <require Tcompiler="IAR"/>
2165     </condition>
2166     <condition id="CM23_LE_IAR">
2167       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2168       <require condition="CM23_IAR"/>
2169       <require Dendian="Little-endian"/>
2170     </condition>
2171
2172     <condition id="CM33_IAR">
2173       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2174       <require condition="CM33"/>
2175       <require Tcompiler="IAR"/>
2176     </condition>
2177     <condition id="CM33_LE_IAR">
2178       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2179       <require condition="CM33_IAR"/>
2180       <require Dendian="Little-endian"/>
2181     </condition>
2182
2183     <condition id="CM33_FP_IAR">
2184       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2185       <require condition="CM33_FP"/>
2186       <require Tcompiler="IAR"/>
2187     </condition>
2188     <condition id="CM33_FP_LE_IAR">
2189       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2190       <require condition="CM33_FP_IAR"/>
2191       <require Dendian="Little-endian"/>
2192     </condition>
2193
2194     <condition id="CM33_NODSP_NOFPU_IAR">
2195       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2196       <require condition="CM33_NODSP_NOFPU"/>
2197       <require Tcompiler="IAR"/>
2198     </condition>
2199     <condition id="CM33_DSP_NOFPU_IAR">
2200       <description>CM33, DSP, no FPU, IAR Compiler</description>
2201       <require condition="CM33_DSP_NOFPU"/>
2202       <require Tcompiler="IAR"/>
2203     </condition>
2204     <condition id="CM33_NODSP_SP_IAR">
2205       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2206       <require condition="CM33_NODSP_SP"/>
2207       <require Tcompiler="IAR"/>
2208     </condition>
2209     <condition id="CM33_DSP_SP_IAR">
2210       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2211       <require condition="CM33_DSP_SP"/>
2212       <require Tcompiler="IAR"/>
2213     </condition>
2214     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2215       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2216       <require condition="CM33_NODSP_NOFPU_IAR"/>
2217       <require Dendian="Little-endian"/>
2218     </condition>
2219     <condition id="CM33_DSP_NOFPU_LE_IAR">
2220       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2221       <require condition="CM33_DSP_NOFPU_IAR"/>
2222       <require Dendian="Little-endian"/>
2223     </condition>
2224     <condition id="CM33_NODSP_SP_LE_IAR">
2225       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2226       <require condition="CM33_NODSP_SP_IAR"/>
2227       <require Dendian="Little-endian"/>
2228     </condition>
2229     <condition id="CM33_DSP_SP_LE_IAR">
2230       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2231       <require condition="CM33_DSP_SP_IAR"/>
2232       <require Dendian="Little-endian"/>
2233     </condition>
2234
2235     <condition id="CM35P_IAR">
2236       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2237       <require condition="CM35P"/>
2238       <require Tcompiler="IAR"/>
2239     </condition>
2240     <condition id="CM35P_LE_IAR">
2241       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2242       <require condition="CM35P_IAR"/>
2243       <require Dendian="Little-endian"/>
2244     </condition>
2245
2246     <condition id="CM35P_FP_IAR">
2247       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2248       <require condition="CM35P_FP"/>
2249       <require Tcompiler="IAR"/>
2250     </condition>
2251     <condition id="CM35P_FP_LE_IAR">
2252       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2253       <require condition="CM35P_FP_IAR"/>
2254       <require Dendian="Little-endian"/>
2255     </condition>
2256
2257     <condition id="CM35P_NODSP_NOFPU_IAR">
2258       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2259       <require condition="CM35P_NODSP_NOFPU"/>
2260       <require Tcompiler="IAR"/>
2261     </condition>
2262     <condition id="CM35P_DSP_NOFPU_IAR">
2263       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2264       <require condition="CM35P_DSP_NOFPU"/>
2265       <require Tcompiler="IAR"/>
2266     </condition>
2267     <condition id="CM35P_NODSP_SP_IAR">
2268       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2269       <require condition="CM35P_NODSP_SP"/>
2270       <require Tcompiler="IAR"/>
2271     </condition>
2272     <condition id="CM35P_DSP_SP_IAR">
2273       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2274       <require condition="CM35P_DSP_SP"/>
2275       <require Tcompiler="IAR"/>
2276     </condition>
2277     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2278       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2279       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2280       <require Dendian="Little-endian"/>
2281     </condition>
2282     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2283       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2284       <require condition="CM35P_DSP_NOFPU_IAR"/>
2285       <require Dendian="Little-endian"/>
2286     </condition>
2287     <condition id="CM35P_NODSP_SP_LE_IAR">
2288       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2289       <require condition="CM35P_NODSP_SP_IAR"/>
2290       <require Dendian="Little-endian"/>
2291     </condition>
2292     <condition id="CM35P_DSP_SP_LE_IAR">
2293       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2294       <require condition="CM35P_DSP_SP_IAR"/>
2295       <require Dendian="Little-endian"/>
2296     </condition>
2297
2298     <condition id="CM55_NOFPU_NOMVE_IAR">
2299       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
2300       <require condition="CM55_NOFPU_NOMVE"/>
2301       <require Tcompiler="IAR"/>
2302     </condition>
2303     <condition id="CM55_NOFPU_MVE_IAR">
2304       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
2305       <require condition="CM55_NOFPU_MVE"/>
2306       <require Tcompiler="IAR"/>
2307     </condition>
2308     <condition id="CM55_FPU_IAR">
2309       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
2310       <require condition="CM55_FPU"/>
2311       <require Tcompiler="IAR"/>
2312     </condition>
2313     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
2314       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
2315       <require condition="CM55_NOFPU_NOMVE_IAR"/>
2316       <require Dendian="Little-endian"/>
2317     </condition>
2318     <condition id="CM55_FPU_LE_IAR">
2319       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
2320       <require condition="CM55_FPU_IAR"/>
2321       <require Dendian="Little-endian"/>
2322     </condition>
2323
2324     <condition id="ARMv8MBL_IAR">
2325       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2326       <require condition="ARMv8MBL"/>
2327       <require Tcompiler="IAR"/>
2328     </condition>
2329     <condition id="ARMv8MBL_LE_IAR">
2330       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2331       <require condition="ARMv8MBL_IAR"/>
2332       <require Dendian="Little-endian"/>
2333     </condition>
2334
2335     <condition id="ARMv8MML_IAR">
2336       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2337       <require condition="ARMv8MML"/>
2338       <require Tcompiler="IAR"/>
2339     </condition>
2340     <condition id="ARMv8MML_LE_IAR">
2341       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2342       <require condition="ARMv8MML_IAR"/>
2343       <require Dendian="Little-endian"/>
2344     </condition>
2345
2346     <condition id="ARMv8MML_FP_IAR">
2347       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2348       <require condition="ARMv8MML_FP"/>
2349       <require Tcompiler="IAR"/>
2350     </condition>
2351     <condition id="ARMv8MML_FP_LE_IAR">
2352       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2353       <require condition="ARMv8MML_FP_IAR"/>
2354       <require Dendian="Little-endian"/>
2355     </condition>
2356
2357     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2358       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2359       <require condition="ARMv8MML_NODSP_NOFPU"/>
2360       <require Tcompiler="IAR"/>
2361     </condition>
2362     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2363       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2364       <require condition="ARMv8MML_DSP_NOFPU"/>
2365       <require Tcompiler="IAR"/>
2366     </condition>
2367     <condition id="ARMv8MML_NODSP_SP_IAR">
2368       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2369       <require condition="ARMv8MML_NODSP_SP"/>
2370       <require Tcompiler="IAR"/>
2371     </condition>
2372     <condition id="ARMv8MML_DSP_SP_IAR">
2373       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2374       <require condition="ARMv8MML_DSP_SP"/>
2375       <require Tcompiler="IAR"/>
2376     </condition>
2377     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2378       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2379       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2380       <require Dendian="Little-endian"/>
2381     </condition>
2382     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2383       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2384       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2385       <require Dendian="Little-endian"/>
2386     </condition>
2387     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2388       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2389       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2390       <require Dendian="Little-endian"/>
2391     </condition>
2392     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2393       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2394       <require condition="ARMv8MML_DSP_SP_IAR"/>
2395       <require Dendian="Little-endian"/>
2396     </condition>
2397
2398     <!-- conditions selecting single devices and CMSIS Core -->
2399     <condition id="ARMCM0 CMSIS">
2400       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2401       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2402       <require Cclass="CMSIS" Cgroup="CORE"/>
2403     </condition>
2404
2405     <condition id="ARMCM0+ CMSIS">
2406       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2407       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2408       <require Cclass="CMSIS" Cgroup="CORE"/>
2409     </condition>
2410
2411     <condition id="ARMCM1 CMSIS">
2412       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2413       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2414       <require Cclass="CMSIS" Cgroup="CORE"/>
2415     </condition>
2416
2417     <condition id="ARMCM3 CMSIS">
2418       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2419       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2420       <require Cclass="CMSIS" Cgroup="CORE"/>
2421     </condition>
2422
2423     <condition id="ARMCM4 CMSIS">
2424       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2425       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2426       <require Cclass="CMSIS" Cgroup="CORE"/>
2427     </condition>
2428
2429     <condition id="ARMCM7 CMSIS">
2430       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2431       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2432       <require Cclass="CMSIS" Cgroup="CORE"/>
2433     </condition>
2434
2435     <condition id="ARMCM23 CMSIS">
2436       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2437       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2438       <require Cclass="CMSIS" Cgroup="CORE"/>
2439     </condition>
2440
2441     <condition id="ARMCM33 CMSIS">
2442       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2443       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2444       <require Cclass="CMSIS" Cgroup="CORE"/>
2445     </condition>
2446
2447     <condition id="ARMCM35P CMSIS">
2448       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2449       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2450       <require Cclass="CMSIS" Cgroup="CORE"/>
2451     </condition>
2452
2453     <condition id="ARMCM55 CMSIS">
2454       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2455       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2456       <require Cclass="CMSIS" Cgroup="CORE"/>
2457     </condition>
2458
2459     <condition id="ARMSC000 CMSIS">
2460       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2461       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2462       <require Cclass="CMSIS" Cgroup="CORE"/>
2463     </condition>
2464
2465     <condition id="ARMSC300 CMSIS">
2466       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2467       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2468       <require Cclass="CMSIS" Cgroup="CORE"/>
2469     </condition>
2470
2471     <condition id="ARMv8MBL CMSIS">
2472       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2473       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2474       <require Cclass="CMSIS" Cgroup="CORE"/>
2475     </condition>
2476
2477     <condition id="ARMv8MML CMSIS">
2478       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2479       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2480       <require Cclass="CMSIS" Cgroup="CORE"/>
2481     </condition>
2482
2483     <condition id="ARMv81MML CMSIS">
2484       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2485       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2486       <require Cclass="CMSIS" Cgroup="CORE"/>
2487     </condition>
2488
2489     <condition id="ARMCA5 CMSIS">
2490       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2491       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2492       <require Cclass="CMSIS" Cgroup="CORE"/>
2493     </condition>
2494
2495     <condition id="ARMCA7 CMSIS">
2496       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2497       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2498       <require Cclass="CMSIS" Cgroup="CORE"/>
2499     </condition>
2500
2501     <condition id="ARMCA9 CMSIS">
2502       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2503       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2504       <require Cclass="CMSIS" Cgroup="CORE"/>
2505     </condition>
2506
2507     <!-- CMSIS DSP -->
2508     <condition id="CMSIS DSP">
2509       <description>Components required for DSP</description>
2510       <require condition="ARMv6_7_8-M Device"/>
2511       <require condition="ARMCC GCC IAR"/>
2512       <require Cclass="CMSIS" Cgroup="CORE"/>
2513     </condition>
2514
2515     <!-- CMSIS NN -->
2516     <condition id="CMSIS NN">
2517       <description>Components required for NN</description>
2518       <require Cclass="CMSIS" Cgroup="DSP"/>
2519     </condition>
2520
2521     <!-- RTOS RTX -->
2522     <condition id="RTOS RTX">
2523       <description>Components required for RTOS RTX</description>
2524       <require condition="ARMv6_7-M Device"/>
2525       <require condition="ARMCC GCC IAR"/>
2526       <require Cclass="Device" Cgroup="Startup"/>
2527       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2528     </condition>
2529     <condition id="RTOS RTX IFX">
2530       <description>Components required for RTOS RTX IFX</description>
2531       <require condition="ARMv6_7-M Device"/>
2532       <require condition="ARMCC GCC IAR"/>
2533       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2534       <require Cclass="Device" Cgroup="Startup"/>
2535       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2536     </condition>
2537     <condition id="RTOS RTX5">
2538       <description>Components required for RTOS RTX5</description>
2539       <require condition="ARMv6_7_8-M Device"/>
2540       <require condition="ARMCC GCC IAR"/>
2541       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2542     </condition>
2543     <condition id="RTOS2 RTX5">
2544       <description>Components required for RTOS2 RTX5</description>
2545       <require condition="ARMv6_7_8-M Device"/>
2546       <require condition="ARMCC GCC IAR"/>
2547       <require Cclass="CMSIS"  Cgroup="CORE"/>
2548       <require Cclass="Device" Cgroup="Startup"/>
2549     </condition>
2550     <condition id="RTOS2 RTX5 v7-A">
2551       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2552       <require condition="ARMv7-A Device"/>
2553       <require condition="ARMCC GCC IAR"/>
2554       <require Cclass="CMSIS"  Cgroup="CORE"/>
2555       <require Cclass="Device" Cgroup="Startup"/>
2556       <require Cclass="Device" Cgroup="OS Tick"/>
2557       <require Cclass="Device" Cgroup="IRQ Controller"/>
2558     </condition>
2559     <condition id="RTOS2 RTX5 NS">
2560       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2561       <require condition="ARMv8-M Device"/>
2562       <require condition="TZ Non-secure"/>
2563       <require condition="ARMCC GCC IAR"/>
2564       <require Cclass="CMSIS"  Cgroup="CORE"/>
2565       <require Cclass="Device" Cgroup="Startup"/>
2566     </condition>
2567
2568     <!-- OS Tick -->
2569     <condition id="OS Tick PTIM">
2570       <description>Components required for OS Tick Private Timer</description>
2571       <require condition="CA5_CA9"/>
2572       <require Cclass="Device" Cgroup="IRQ Controller"/>
2573     </condition>
2574
2575     <condition id="OS Tick GTIM">
2576       <description>Components required for OS Tick Generic Physical Timer</description>
2577       <require condition="CA7"/>
2578       <require Cclass="Device" Cgroup="IRQ Controller"/>
2579     </condition>
2580
2581   </conditions>
2582
2583   <components>
2584     <!-- CMSIS-Core component -->
2585     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2586       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2587       <files>
2588         <!-- CPU independent -->
2589         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2590         <file category="include" name="CMSIS/Core/Include/"/>
2591         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2592         <!-- Code template -->
2593         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2594         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2595       </files>
2596     </component>
2597
2598     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2599       <description>CMSIS-CORE for Cortex-A</description>
2600       <files>
2601         <!-- CPU independent -->
2602         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2603         <file category="include" name="CMSIS/Core_A/Include/"/>
2604       </files>
2605     </component>
2606
2607     <!-- CMSIS-Startup components -->
2608     <!-- Cortex-M0 -->
2609     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0 CMSIS">
2610       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2611       <files>
2612         <!-- include folder / device header file -->
2613         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2614         <!-- startup / system file -->
2615         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.2" attr="config"/>
2616         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2617         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2618         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2619         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2620       </files>
2621     </component>
2622     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2623       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2624       <files>
2625         <!-- include folder / device header file -->
2626         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2627         <!-- startup / system file -->
2628         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2629         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2630         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2631         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2632         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2633       </files>
2634     </component>
2635
2636     <!-- Cortex-M0+ -->
2637     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0+ CMSIS">
2638       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2639       <files>
2640         <!-- include folder / device header file -->
2641         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2642         <!-- startup / system file -->
2643         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.2" attr="config"/>
2644         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2645         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2646         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2647         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2648       </files>
2649     </component>
2650     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2651       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2652       <files>
2653         <!-- include folder / device header file -->
2654         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2655         <!-- startup / system file -->
2656         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2657         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2658         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2659         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2660         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2661       </files>
2662     </component>
2663
2664     <!-- Cortex-M1 -->
2665     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM1 CMSIS">
2666       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2667       <files>
2668         <!-- include folder / device header file -->
2669         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2670         <!-- startup / system file -->
2671         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.2" attr="config"/>
2672         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2673         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2674         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2675         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2676       </files>
2677     </component>
2678     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2679       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2680       <files>
2681         <!-- include folder / device header file -->
2682         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2683         <!-- startup / system file -->
2684         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2685         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2686         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2687         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2688         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2689       </files>
2690     </component>
2691
2692     <!-- Cortex-M3 -->
2693     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM3 CMSIS">
2694       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2695       <files>
2696         <!-- include folder / device header file -->
2697         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2698         <!-- startup / system file -->
2699         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.2" attr="config"/>
2700         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2701         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2702         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2703         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2704       </files>
2705     </component>
2706     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2707       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2708       <files>
2709         <!-- include folder / device header file -->
2710         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2711         <!-- startup / system file -->
2712         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2713         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2714         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2715         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2716         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2717       </files>
2718     </component>
2719
2720     <!-- Cortex-M4 -->
2721     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM4 CMSIS">
2722       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2723       <files>
2724         <!-- include folder / device header file -->
2725         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2726         <!-- startup / system file -->
2727         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.2" attr="config"/>
2728         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2729         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2730         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2731        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2732       </files>
2733     </component>
2734     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2735       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2736       <files>
2737         <!-- include folder / device header file -->
2738         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2739         <!-- startup / system file -->
2740         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2741         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2742         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2743         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2744         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2745       </files>
2746     </component>
2747
2748     <!-- Cortex-M7 -->
2749     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM7 CMSIS">
2750       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2751       <files>
2752         <!-- include folder / device header file -->
2753         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2754         <!-- startup / system file -->
2755         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.2" attr="config"/>
2756         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2757         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2758         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2759         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2760       </files>
2761     </component>
2762     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2763       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2764       <files>
2765         <!-- include folder / device header file -->
2766         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2767         <!-- startup / system file -->
2768         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2769         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2770         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2771         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2772         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2773       </files>
2774     </component>
2775
2776     <!-- Cortex-M23 -->
2777     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM23 CMSIS">
2778       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2779       <files>
2780         <!-- include folder / device header file -->
2781         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2782         <!-- startup / system file -->
2783         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.2" attr="config"/>
2784         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2785         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2786         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2787         <!-- SAU configuration -->
2788         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2789       </files>
2790     </component>
2791     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2792       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2793       <files>
2794         <!-- include folder / device header file -->
2795         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2796         <!-- startup / system file -->
2797         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2798         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2799         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2800         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2801         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2802         <!-- SAU configuration -->
2803         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2804       </files>
2805     </component>
2806
2807     <!-- Cortex-M33 -->
2808     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM33 CMSIS">
2809       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2810       <files>
2811         <!-- include folder / device header file -->
2812         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2813         <!-- startup / system file -->
2814         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.2" attr="config"/>
2815         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2816         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2817         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2818         <!-- SAU configuration -->
2819         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2820       </files>
2821     </component>
2822     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2823       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2824       <files>
2825         <!-- include folder / device header file -->
2826         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2827         <!-- startup / system file -->
2828         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2829         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2830         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2831         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2832         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2833         <!-- SAU configuration -->
2834         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2835       </files>
2836     </component>
2837
2838     <!-- Cortex-M35P -->
2839     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM35P CMSIS">
2840       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2841       <files>
2842         <!-- include folder / device header file -->
2843         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2844         <!-- startup / system file -->
2845         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.2" attr="config"/>
2846         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2847         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2848         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2849         <!-- SAU configuration -->
2850         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2851       </files>
2852     </component>
2853     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2854       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2855       <files>
2856         <!-- include folder / device header file -->
2857         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2858         <!-- startup / system file -->
2859         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2860         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2861         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2862         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2863         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2864         <!-- SAU configuration -->
2865         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2866       </files>
2867     </component>
2868
2869     <!-- Cortex-M55 -->
2870     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM55 CMSIS">
2871       <description>System and Startup for Generic Cortex-M55 device</description>
2872       <files>
2873         <!-- include folder / device header file -->
2874         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2875         <!-- startup / system file -->
2876         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.0.0" attr="config"/>
2877         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2878         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2879         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.0" attr="config"/>
2880         <!-- SAU configuration -->
2881         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2882       </files>
2883     </component>
2884
2885     <!-- Cortex-SC000 -->
2886     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS">
2887       <description>System and Startup for Generic Arm SC000 device</description>
2888       <files>
2889         <!-- include folder / device header file -->
2890         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2891         <!-- startup / system file -->
2892         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.2" attr="config"/>
2893         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2894         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2895         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2896         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2897       </files>
2898     </component>
2899     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2900       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2901       <files>
2902         <!-- include folder / device header file -->
2903         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2904         <!-- startup / system file -->
2905         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2906         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2907         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2908         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2909         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2910       </files>
2911     </component>
2912
2913     <!-- Cortex-SC300 -->
2914     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS">
2915       <description>System and Startup for Generic Arm SC300 device</description>
2916       <files>
2917         <!-- include folder / device header file -->
2918         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2919         <!-- startup / system file -->
2920         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.2" attr="config"/>
2921         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2922         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2923         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2924         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2925       </files>
2926     </component>
2927     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2928       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2929       <files>
2930         <!-- include folder / device header file -->
2931         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2932         <!-- startup / system file -->
2933         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2934         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2935         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2936         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2937         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2938       </files>
2939     </component>
2940
2941     <!-- ARMv8MBL -->
2942     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MBL CMSIS">
2943       <description>System and Startup for Generic Armv8-M Baseline device</description>
2944       <files>
2945         <!-- include folder / device header file -->
2946         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2947         <!-- startup / system file -->
2948         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.2" attr="config"/>
2949         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2950         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2951         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2952         <!-- SAU configuration -->
2953         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2954       </files>
2955     </component>
2956     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2957       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2958       <files>
2959         <!-- include folder / device header file -->
2960         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2961         <!-- startup / system file -->
2962         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2963         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2964         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2965         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2966         <!-- SAU configuration -->
2967         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2968       </files>
2969     </component>
2970
2971     <!-- ARMv8MML -->
2972     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MML CMSIS">
2973       <description>System and Startup for Generic Armv8-M Mainline device</description>
2974       <files>
2975         <!-- include folder / device header file -->
2976         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2977         <!-- startup / system file -->
2978         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.2" attr="config"/>
2979         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2980         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2981         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2982         <!-- SAU configuration -->
2983         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2984       </files>
2985     </component>
2986     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2987       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2988       <files>
2989         <!-- include folder / device header file -->
2990         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2991         <!-- startup / system file -->
2992         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2993         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2994         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2995         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2996         <!-- SAU configuration -->
2997         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2998       </files>
2999     </component>
3000
3001     <!-- ARMv81MML -->
3002     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.1" condition="ARMv81MML CMSIS">
3003       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
3004       <files>
3005         <!-- include folder / device header file -->
3006         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
3007         <!-- startup / system file -->
3008         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.2" attr="config"/>
3009         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
3010         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.1" attr="config" condition="GCC"/>
3011         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
3012         <!-- SAU configuration -->
3013         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
3014       </files>
3015     </component>
3016
3017     <!-- Cortex-A5 -->
3018     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
3019       <description>System and Startup for Generic Arm Cortex-A5 device</description>
3020       <files>
3021         <!-- include folder / device header file -->
3022         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
3023         <!-- startup / system / mmu files -->
3024         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3025         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3026         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3027         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3028         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
3029         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3030         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3031         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3032         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3033         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
3034         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
3035         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
3036
3037       </files>
3038     </component>
3039
3040     <!-- Cortex-A7 -->
3041     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3042       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3043       <files>
3044         <!-- include folder / device header file -->
3045         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3046         <!-- startup / system / mmu files -->
3047         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3048         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3049         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3050         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3051         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3052         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3053         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3054         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3055         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3056         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
3057         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
3058         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
3059       </files>
3060     </component>
3061
3062     <!-- Cortex-A9 -->
3063     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3064       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3065       <files>
3066         <!-- include folder / device header file -->
3067         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3068         <!-- startup / system / mmu files -->
3069         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3070         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3071         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3072         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3073         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3074         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3075         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3076         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3077         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3078         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
3079         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3080         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
3081       </files>
3082     </component>
3083
3084     <!-- IRQ Controller -->
3085     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3086       <description>IRQ Controller implementation using GIC</description>
3087       <files>
3088         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3089       </files>
3090     </component>
3091
3092     <!-- OS Tick -->
3093     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3094       <description>OS Tick implementation using Private Timer</description>
3095       <files>
3096         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3097       </files>
3098     </component>
3099
3100     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3101       <description>OS Tick implementation using Generic Physical Timer</description>
3102       <files>
3103         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3104       </files>
3105     </component>
3106
3107     <!-- CMSIS-DSP component -->
3108     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.8.0" isDefaultVariant="true" condition="CMSIS DSP">
3109       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3110       <files>
3111         <!-- CPU independent -->
3112         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3113         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3114
3115         <!-- CPU and Compiler dependent -->
3116         <!-- ARMCC -->
3117         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3118         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3119         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3120         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3121         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3122         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3123         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3124         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3125         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3126         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3127         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3128         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3129         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3130         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3131         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3132         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3133
3134         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3135         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3136         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3137         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3138         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3139         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3140         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3141         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3142         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3143         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3144         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3145         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3146         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3147         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3148         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3149         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3150
3151         <!-- GCC -->
3152         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3153         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3154         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3155         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3156         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3157         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3158         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3159         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3160
3161         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3162         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3163         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3164         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3165         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3166         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3167         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3168         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3169         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3170         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3171         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3172         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3173         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3174         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3175         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3176         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3177
3178         <!-- IAR -->
3179         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3180         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3181         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3182         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3183         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3184         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3185         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3186         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3187         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3188         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3189         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3190         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3191         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3192         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3193         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3194         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3195
3196         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3197         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3198         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3199         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3200         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3201         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3202         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3203         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3204         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3205         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3206         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3207         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3208         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3209         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3210         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3211         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3212
3213       </files>
3214     </component>
3215     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.8.0" condition="CMSIS DSP">
3216       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3217       <files>
3218         <!-- CPU independent -->
3219         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
3220         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
3221         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
3222
3223         <!-- DSP sources (core) -->
3224         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3225         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
3226         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3227         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3228         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3229         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
3230         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3231         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3232         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3233         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3234         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3235         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
3236         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3237
3238         <!-- Compute Library for Cortex-A -->
3239         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
3240         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
3241       </files>
3242     </component>
3243
3244     <!-- CMSIS-NN component -->
3245     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.3.0" condition="CMSIS NN">
3246       <description>CMSIS-NN Neural Network Library</description>
3247       <files>
3248         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3249         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3250         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
3251         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
3252
3253         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3254         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3255         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3256         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
3257         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
3258         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3259         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
3260         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3261         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3262         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3263         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
3264         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
3265         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
3266         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
3267         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
3268         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
3269         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3270         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3271         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
3272         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3273         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3274         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
3275         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3276         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3277         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
3278         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
3279         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
3280         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
3281         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8_opt.c"/>
3282         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
3283         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
3284         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3285         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
3286         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
3287         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
3288         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3289         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3290         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3291         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3292         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
3293         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3294         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3295         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
3296         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
3297         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
3298         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
3299         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
3300         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
3301         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3302         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3303         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
3304         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3305         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
3306         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
3307         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3308         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3309         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3310         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3311         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3312         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3313         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3314         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
3315         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
3316         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3317         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
3318       </files>
3319     </component>
3320
3321     <!-- CMSIS-RTOS Keil RTX component -->
3322     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3323       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3324       <RTE_Components_h>
3325         <!-- the following content goes into file 'RTE_Components.h' -->
3326         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3327         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3328       </RTE_Components_h>
3329       <files>
3330         <!-- CPU independent -->
3331         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3332         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3333         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3334
3335         <!-- RTX templates -->
3336         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3337         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3338         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3339         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3340         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3341         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3342         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3343         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3344         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3345         <!-- tool-chain specific template file -->
3346         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3347         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3348         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3349
3350         <!-- CPU and Compiler dependent -->
3351         <!-- ARMCC -->
3352         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3353         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3354         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3355         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3356         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3357         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3358         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3359         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3360         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3361         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3362         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3363         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3364         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3365         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3366         <!-- GCC -->
3367         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3368         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3369         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3370         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3371         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3372         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3373         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3374         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3375         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3376         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3377         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3378         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3379         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3380         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3381         <!-- IAR -->
3382         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3383         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3384         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3385         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3386         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3387         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3388         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3389         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3390         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3391         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3392         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3393         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3394         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3395         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3396       </files>
3397     </component>
3398     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3399     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3400       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3401       <RTE_Components_h>
3402         <!-- the following content goes into file 'RTE_Components.h' -->
3403         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3404         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3405       </RTE_Components_h>
3406       <files>
3407         <!-- CPU independent -->
3408         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3409         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3410         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3411
3412         <!-- RTX templates -->
3413         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3414         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3415         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3416         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3417         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3418         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3419         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3420         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3421         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3422         <!-- tool-chain specific template file -->
3423         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3424         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3425         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3426
3427         <!-- CPU and Compiler dependent -->
3428         <!-- ARMCC -->
3429         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3430         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3431         <!-- GCC -->
3432         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3433         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3434         <!-- IAR -->
3435       </files>
3436     </component>
3437
3438     <!-- CMSIS-RTOS Keil RTX5 component -->
3439     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3440       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3441       <RTE_Components_h>
3442         <!-- the following content goes into file 'RTE_Components.h' -->
3443         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3444         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3445       </RTE_Components_h>
3446       <files>
3447         <!-- RTX header file -->
3448         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3449         <!-- RTX compatibility module for API V1 -->
3450         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3451       </files>
3452     </component>
3453
3454     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3455     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3456       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3457       <RTE_Components_h>
3458         <!-- the following content goes into file 'RTE_Components.h' -->
3459         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3460         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3461       </RTE_Components_h>
3462       <files>
3463         <!-- RTX documentation -->
3464         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3465
3466         <!-- RTX header files -->
3467         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3468
3469         <!-- RTX configuration -->
3470         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3471         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3472
3473         <!-- RTX templates -->
3474         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3475         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3476         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3477         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3478         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3479         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3480         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3481         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3482         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3483         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3484
3485         <!-- RTX library configuration -->
3486         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3487
3488         <!-- RTX libraries (CPU and Compiler dependent) -->
3489         <!-- ARMCC -->
3490         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3491         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3492         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3493         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3494         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3495         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3496         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3497         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3498         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3499         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3500         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3501         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3502         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3503         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3504         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3505         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3506         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3507         <!-- GCC -->
3508         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3509         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3510         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3512         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3513         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3514         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3515         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3517         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3521         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3523         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3524         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3525         <!-- IAR -->
3526         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3527         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3528         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3529         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3530         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3531         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3532         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3533         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3534         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3535         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3536         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3537         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3538         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3539         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3540         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3541         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3542         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3543       </files>
3544     </component>
3545     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3546       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3547       <RTE_Components_h>
3548         <!-- the following content goes into file 'RTE_Components.h' -->
3549         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3550         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3551         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3552       </RTE_Components_h>
3553       <files>
3554         <!-- RTX documentation -->
3555         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3556
3557         <!-- RTX header files -->
3558         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3559
3560         <!-- RTX configuration -->
3561         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3562         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3563
3564         <!-- RTX templates -->
3565         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3566         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3567         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3568         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3569         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3570         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3571         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3572         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3573         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3574         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3575
3576         <!-- RTX library configuration -->
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3578
3579         <!-- RTX libraries (CPU and Compiler dependent) -->
3580         <!-- ARMCC -->
3581         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3582         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3583         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3584         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3585         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3586         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3587         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3588         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3589         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3590         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3591         <!-- GCC -->
3592         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3593         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3594         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3595         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3596         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3597         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3598         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3599         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3600         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3601         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3602         <!-- IAR -->
3603         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3604         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3605         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3606         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3607         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3608         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3609         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3610         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3611         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3612         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3613       </files>
3614     </component>
3615     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3616       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3617       <RTE_Components_h>
3618         <!-- the following content goes into file 'RTE_Components.h' -->
3619         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3620         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3621         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3622       </RTE_Components_h>
3623       <files>
3624         <!-- RTX documentation -->
3625         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3626
3627         <!-- RTX header files -->
3628         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3629
3630         <!-- RTX configuration -->
3631         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3632         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3633
3634         <!-- RTX templates -->
3635         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3636         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3637         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3638         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3639         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3640         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3641         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3642         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3643         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3644         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3645
3646         <!-- RTX sources (core) -->
3647         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3648         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3649         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3650         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3651         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3652         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3653         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3654         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3655         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3656         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3657         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3658         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3659         <!-- RTX sources (library configuration) -->
3660         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3661         <!-- RTX sources (handlers ARMCC) -->
3662         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM0_ARMCC"/>
3663         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM1_ARMCC"/>
3664         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM3_ARMCC"/>
3665         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM4_ARMCC"/>
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM4_FP_ARMCC"/>
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM7_ARMCC"/>
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM7_FP_ARMCC"/>
3669         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
3671         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
3672         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_ARMCC"/>
3673         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_FP_ARMCC"/>
3674         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3676         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
3678         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
3679         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
3680         <!-- RTX sources (handlers GCC) -->
3681         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM0_GCC"/>
3682         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM1_GCC"/>
3683         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM3_GCC"/>
3684         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM4_GCC"/>
3685         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM4_FP_GCC"/>
3686         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM7_GCC"/>
3687         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM7_FP_GCC"/>
3688         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3689         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3690         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3691         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3692         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3693         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3694         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3695         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3696         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3697         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3698         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3699         <!-- RTX sources (handlers IAR) -->
3700         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM0_IAR"/>
3701         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM1_IAR"/>
3702         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM3_IAR"/>
3703         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM4_IAR"/>
3704         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM4_FP_IAR"/>
3705         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM7_IAR"/>
3706         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM7_FP_IAR"/>
3707         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3708         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3709         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3710         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3711         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3712         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3713         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3714         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3715         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3716         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3717         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3718         <!-- OS Tick (SysTick) -->
3719         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3720       </files>
3721     </component>
3722     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3723       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3724       <RTE_Components_h>
3725         <!-- the following content goes into file 'RTE_Components.h' -->
3726         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3727         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3728         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3729       </RTE_Components_h>
3730       <files>
3731         <!-- RTX documentation -->
3732         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3733
3734         <!-- RTX header files -->
3735         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3736
3737         <!-- RTX configuration -->
3738         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3739         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3740
3741         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3742
3743         <!-- RTX templates -->
3744         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3745         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3746         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3747         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3748         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3749         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3750         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3751         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3752         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3753         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3754
3755         <!-- RTX sources (core) -->
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3757         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3760         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3763         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3764         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3765         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3766         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3767         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3768         <!-- RTX sources (library configuration) -->
3769         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3770         <!-- RTX sources (handlers ARMCC) -->
3771         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3772         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3773         <!-- RTX sources (handlers GCC) -->
3774         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3775         <!-- RTX sources (handlers IAR) -->
3776         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3777       </files>
3778     </component>
3779     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3780       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3781       <RTE_Components_h>
3782         <!-- the following content goes into file 'RTE_Components.h' -->
3783         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3784         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3785         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3786         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3787       </RTE_Components_h>
3788       <files>
3789         <!-- RTX documentation -->
3790         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3791
3792         <!-- RTX header files -->
3793         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3794
3795         <!-- RTX configuration -->
3796         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3797         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3798
3799         <!-- RTX templates -->
3800         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3801         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3802         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3803         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3804         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3805         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3806         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3807         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3808         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3809         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3810
3811         <!-- RTX sources (core) -->
3812         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3813         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3814         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3815         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3816         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3817         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3818         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3819         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3820         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3821         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3822         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3823         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3824         <!-- RTX sources (library configuration) -->
3825         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3826         <!-- RTX sources (ARMCC handlers) -->
3827         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
3828         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
3829         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
3830         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_ARMCC"/>
3831         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_FP_ARMCC"/>
3832         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_ARMCC"/>
3833         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_ARMCC"/>
3834         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_ARMCC"/>
3835         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
3836         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
3837         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
3838         <!-- RTX sources (GCC handlers) -->
3839         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3840         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3841         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_FP_GCC"/>
3842         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3843         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_FP_GCC"/>
3844         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_GCC"/>
3845         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_GCC"/>
3846         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_GCC"/>
3847         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3848         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3849         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_FP_GCC"/>
3850         <!-- RTX sources (IAR handlers) -->
3851         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="CM23_IAR"/>
3852         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_IAR"/>
3853         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_FP_IAR"/>
3854         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_IAR"/>
3855         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_FP_IAR"/>
3856         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3857         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_MVE_IAR"/>
3858         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_FPU_IAR"/>
3859         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="ARMv8MBL_IAR"/>
3860         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_IAR"/>
3861         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_FP_IAR"/>
3862         <!-- OS Tick (SysTick) -->
3863         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3864       </files>
3865     </component>
3866
3867     <!-- CMSIS-Driver Custom components -->
3868     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3869       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3870       <files>
3871         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3872         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3873       </files>
3874     </component>
3875     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3876       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3877       <files>
3878         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3879         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3880       </files>
3881     </component>
3882     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3883       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3884       <files>
3885         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3886         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3887       </files>
3888     </component>
3889     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3890       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3891       <files>
3892         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3893         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3894       </files>
3895     </component>
3896     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3897       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3898       <files>
3899         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3900         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3901       </files>
3902     </component>
3903     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3904       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3905       <files>
3906         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3907         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3908       </files>
3909     </component>
3910     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3911       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3912       <files>
3913         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3914         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3915       </files>
3916     </component>
3917     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3918       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3919       <files>
3920         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3921         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3922       </files>
3923     </component>
3924     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3925       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3926       <files>
3927         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3928         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3929         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3930         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3931       </files>
3932     </component>
3933     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3934       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3935       <files>
3936         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3937         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3938       </files>
3939     </component>
3940     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3941       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3942       <files>
3943         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3944         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3945       </files>
3946     </component>
3947     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3948       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3949       <files>
3950         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3951         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3952       </files>
3953     </component>
3954     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3955       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3956       <files>
3957         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3958         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3959       </files>
3960     </component>
3961     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3962       <description>Access to #include Driver_WiFi.h file</description>
3963       <files>
3964         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3965         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3966       </files>
3967     </component>
3968
3969     <!-- VIO components -->
3970     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3971       <description>Virtual I/O custom implementation template</description>
3972       <files>
3973         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3974       </files>
3975     </component>
3976     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3977       <description>Virtual I/O implementation using memory only</description>
3978       <files>
3979         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3980       </files>
3981     </component>
3982
3983   </components>
3984
3985   <boards>
3986     <board name="uVision Simulator" vendor="Keil">
3987       <description>uVision Simulator</description>
3988       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3989       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3990       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3991       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3992       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3993       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3994       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3995       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3996       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3997       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3998       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3999       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4000       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4001       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4002       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4003       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4004       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4005       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4006       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4007       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4008       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4009       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4010       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4011       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4012       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4013       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4014     </board>
4015
4016     <board name="EWARM Simulator" vendor="IAR">
4017       <description>EWARM Simulator</description>
4018       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
4019       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
4020       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
4021       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
4022       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
4023       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
4024       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4025       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4026       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4027       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4028       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4029       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4030       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4031       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4032       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4033       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4034       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4035       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4036       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4037       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4038       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4039       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4040       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4041       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4042       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4043       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4044     </board>
4045   </boards>
4046
4047   <examples>
4048     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
4049       <description>DSP_Lib Class Marks example</description>
4050       <board name="uVision Simulator" vendor="Keil"/>
4051       <project>
4052         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
4053       </project>
4054       <attributes>
4055         <component Cclass="CMSIS" Cgroup="CORE"/>
4056         <component Cclass="CMSIS" Cgroup="DSP"/>
4057         <component Cclass="Device" Cgroup="Startup"/>
4058         <category>Getting Started</category>
4059       </attributes>
4060     </example>
4061
4062     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
4063       <description>DSP_Lib Convolution example</description>
4064       <board name="uVision Simulator" vendor="Keil"/>
4065       <project>
4066         <environment name="uv" load="arm_convolution_example.uvprojx"/>
4067       </project>
4068       <attributes>
4069         <component Cclass="CMSIS" Cgroup="CORE"/>
4070         <component Cclass="CMSIS" Cgroup="DSP"/>
4071         <component Cclass="Device" Cgroup="Startup"/>
4072         <category>Getting Started</category>
4073       </attributes>
4074     </example>
4075
4076     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
4077       <description>DSP_Lib Dotproduct example</description>
4078       <board name="uVision Simulator" vendor="Keil"/>
4079       <project>
4080         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
4081       </project>
4082       <attributes>
4083         <component Cclass="CMSIS" Cgroup="CORE"/>
4084         <component Cclass="CMSIS" Cgroup="DSP"/>
4085         <component Cclass="Device" Cgroup="Startup"/>
4086         <category>Getting Started</category>
4087       </attributes>
4088     </example>
4089
4090     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
4091       <description>DSP_Lib FFT Bin example</description>
4092       <board name="uVision Simulator" vendor="Keil"/>
4093       <project>
4094         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
4095       </project>
4096       <attributes>
4097         <component Cclass="CMSIS" Cgroup="CORE"/>
4098         <component Cclass="CMSIS" Cgroup="DSP"/>
4099         <component Cclass="Device" Cgroup="Startup"/>
4100         <category>Getting Started</category>
4101       </attributes>
4102     </example>
4103
4104     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4105       <description>DSP_Lib FIR example</description>
4106       <board name="uVision Simulator" vendor="Keil"/>
4107       <project>
4108         <environment name="uv" load="arm_fir_example.uvprojx"/>
4109       </project>
4110       <attributes>
4111         <component Cclass="CMSIS" Cgroup="CORE"/>
4112         <component Cclass="CMSIS" Cgroup="DSP"/>
4113         <component Cclass="Device" Cgroup="Startup"/>
4114         <category>Getting Started</category>
4115       </attributes>
4116     </example>
4117
4118     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4119       <description>DSP_Lib Graphic Equalizer example</description>
4120       <board name="uVision Simulator" vendor="Keil"/>
4121       <project>
4122         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4123       </project>
4124       <attributes>
4125         <component Cclass="CMSIS" Cgroup="CORE"/>
4126         <component Cclass="CMSIS" Cgroup="DSP"/>
4127         <component Cclass="Device" Cgroup="Startup"/>
4128         <category>Getting Started</category>
4129       </attributes>
4130     </example>
4131
4132     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4133       <description>DSP_Lib Linear Interpolation example</description>
4134       <board name="uVision Simulator" vendor="Keil"/>
4135       <project>
4136         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4137       </project>
4138       <attributes>
4139         <component Cclass="CMSIS" Cgroup="CORE"/>
4140         <component Cclass="CMSIS" Cgroup="DSP"/>
4141         <component Cclass="Device" Cgroup="Startup"/>
4142         <category>Getting Started</category>
4143       </attributes>
4144     </example>
4145
4146     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4147       <description>DSP_Lib Matrix example</description>
4148       <board name="uVision Simulator" vendor="Keil"/>
4149       <project>
4150         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4151       </project>
4152       <attributes>
4153         <component Cclass="CMSIS" Cgroup="CORE"/>
4154         <component Cclass="CMSIS" Cgroup="DSP"/>
4155         <component Cclass="Device" Cgroup="Startup"/>
4156         <category>Getting Started</category>
4157       </attributes>
4158     </example>
4159
4160     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4161       <description>DSP_Lib Signal Convergence example</description>
4162       <board name="uVision Simulator" vendor="Keil"/>
4163       <project>
4164         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4165       </project>
4166       <attributes>
4167         <component Cclass="CMSIS" Cgroup="CORE"/>
4168         <component Cclass="CMSIS" Cgroup="DSP"/>
4169         <component Cclass="Device" Cgroup="Startup"/>
4170         <category>Getting Started</category>
4171       </attributes>
4172     </example>
4173
4174     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4175       <description>DSP_Lib Sinus/Cosinus example</description>
4176       <board name="uVision Simulator" vendor="Keil"/>
4177       <project>
4178         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4179       </project>
4180       <attributes>
4181         <component Cclass="CMSIS" Cgroup="CORE"/>
4182         <component Cclass="CMSIS" Cgroup="DSP"/>
4183         <component Cclass="Device" Cgroup="Startup"/>
4184         <category>Getting Started</category>
4185       </attributes>
4186     </example>
4187
4188     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4189       <description>DSP_Lib Variance example</description>
4190       <board name="uVision Simulator" vendor="Keil"/>
4191       <project>
4192         <environment name="uv" load="arm_variance_example.uvprojx"/>
4193       </project>
4194       <attributes>
4195         <component Cclass="CMSIS" Cgroup="CORE"/>
4196         <component Cclass="CMSIS" Cgroup="DSP"/>
4197         <component Cclass="Device" Cgroup="Startup"/>
4198         <category>Getting Started</category>
4199       </attributes>
4200     </example>
4201
4202     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4203       <description>Neural Network CIFAR10 example</description>
4204       <board name="uVision Simulator" vendor="Keil"/>
4205       <project>
4206         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4207       </project>
4208       <attributes>
4209         <component Cclass="CMSIS" Cgroup="CORE"/>
4210         <component Cclass="CMSIS" Cgroup="DSP"/>
4211         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4212         <component Cclass="Device" Cgroup="Startup"/>
4213         <category>Getting Started</category>
4214       </attributes>
4215     </example>
4216
4217     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4218       <description>Neural Network CIFAR10 example</description>
4219       <board name="EWARM Simulator" vendor="IAR"/>
4220       <project>
4221         <environment name="iar" load="NN-example-cifar10.ewp"/>
4222       </project>
4223       <attributes>
4224         <component Cclass="CMSIS" Cgroup="CORE"/>
4225         <component Cclass="CMSIS" Cgroup="DSP"/>
4226         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4227         <component Cclass="Device" Cgroup="Startup"/>
4228         <category>Getting Started</category>
4229       </attributes>
4230     </example>
4231
4232     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4233       <description>Neural Network GRU example</description>
4234       <board name="uVision Simulator" vendor="Keil"/>
4235       <project>
4236         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4237       </project>
4238       <attributes>
4239         <component Cclass="CMSIS" Cgroup="CORE"/>
4240         <component Cclass="CMSIS" Cgroup="DSP"/>
4241         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4242         <component Cclass="Device" Cgroup="Startup"/>
4243         <category>Getting Started</category>
4244       </attributes>
4245     </example>
4246
4247     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4248       <description>Neural Network GRU example</description>
4249       <board name="EWARM Simulator" vendor="IAR"/>
4250       <project>
4251         <environment name="iar" load="NN-example-gru.ewp"/>
4252       </project>
4253       <attributes>
4254         <component Cclass="CMSIS" Cgroup="CORE"/>
4255         <component Cclass="CMSIS" Cgroup="DSP"/>
4256         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4257         <component Cclass="Device" Cgroup="Startup"/>
4258         <category>Getting Started</category>
4259       </attributes>
4260     </example>
4261
4262     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4263       <description>CMSIS-RTOS2 Blinky example</description>
4264       <board name="uVision Simulator" vendor="Keil"/>
4265       <project>
4266         <environment name="uv" load="Blinky.uvprojx"/>
4267       </project>
4268       <attributes>
4269         <component Cclass="CMSIS" Cgroup="CORE"/>
4270         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4271         <component Cclass="Device" Cgroup="Startup"/>
4272         <category>Getting Started</category>
4273       </attributes>
4274     </example>
4275
4276     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4277       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4278       <board name="uVision Simulator" vendor="Keil"/>
4279       <project>
4280         <environment name="uv" load="Blinky.uvprojx"/>
4281       </project>
4282       <attributes>
4283         <component Cclass="CMSIS" Cgroup="CORE"/>
4284         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4285         <component Cclass="Device" Cgroup="Startup"/>
4286         <category>Getting Started</category>
4287       </attributes>
4288     </example>
4289
4290     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4291       <description>CMSIS-RTOS2 Message Queue Example</description>
4292       <board name="uVision Simulator" vendor="Keil"/>
4293       <project>
4294         <environment name="uv" load="MsqQueue.uvprojx"/>
4295       </project>
4296       <attributes>
4297         <component Cclass="CMSIS" Cgroup="CORE"/>
4298         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4299         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4300         <component Cclass="Device" Cgroup="Startup"/>
4301         <category>Getting Started</category>
4302       </attributes>
4303     </example>
4304
4305     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4306       <description>CMSIS-RTOS2 Memory Pool Example</description>
4307       <board name="uVision Simulator" vendor="Keil"/>
4308       <project>
4309         <environment name="uv" load="MemPool.uvprojx"/>
4310       </project>
4311       <attributes>
4312         <component Cclass="CMSIS" Cgroup="CORE"/>
4313         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4314         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4315         <component Cclass="Device" Cgroup="Startup"/>
4316         <category>Getting Started</category>
4317       </attributes>
4318     </example>
4319
4320     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4321       <description>Bare-metal secure/non-secure example without RTOS</description>
4322       <board name="uVision Simulator" vendor="Keil"/>
4323       <project>
4324         <environment name="uv" load="NoRTOS.uvmpw"/>
4325       </project>
4326       <attributes>
4327         <component Cclass="CMSIS" Cgroup="CORE"/>
4328         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4329         <component Cclass="Device" Cgroup="Startup"/>
4330         <category>Getting Started</category>
4331       </attributes>
4332     </example>
4333
4334     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4335       <description>Secure/non-secure RTOS example with thread context management</description>
4336       <board name="uVision Simulator" vendor="Keil"/>
4337       <project>
4338         <environment name="uv" load="RTOS.uvmpw"/>
4339       </project>
4340       <attributes>
4341         <component Cclass="CMSIS" Cgroup="CORE"/>
4342         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4343         <component Cclass="Device" Cgroup="Startup"/>
4344         <category>Getting Started</category>
4345       </attributes>
4346     </example>
4347
4348     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4349       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4350       <board name="uVision Simulator" vendor="Keil"/>
4351       <project>
4352         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4353       </project>
4354       <attributes>
4355         <component Cclass="CMSIS" Cgroup="CORE"/>
4356         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4357         <component Cclass="Device" Cgroup="Startup"/>
4358         <category>Getting Started</category>
4359       </attributes>
4360     </example>
4361
4362     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
4363       <description>CMSIS-RTOS2 Blinky example</description>
4364       <board name="EWARM Simulator" vendor="IAR"/>
4365       <project>
4366         <environment name="iar" load="Blinky/Blinky.ewp"/>
4367       </project>
4368       <attributes>
4369         <component Cclass="CMSIS" Cgroup="CORE"/>
4370         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4371         <component Cclass="Device" Cgroup="Startup"/>
4372         <category>Getting Started</category>
4373       </attributes>
4374     </example>
4375
4376     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
4377       <description>CMSIS-RTOS2 Message Queue Example</description>
4378       <board name="EWARM Simulator" vendor="IAR"/>
4379       <project>
4380         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
4381       </project>
4382       <attributes>
4383         <component Cclass="CMSIS" Cgroup="CORE"/>
4384         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4385         <component Cclass="Device" Cgroup="Startup"/>
4386         <category>Getting Started</category>
4387       </attributes>
4388     </example>
4389
4390   </examples>
4391
4392 </package>