begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.0-Beta16">
  12       CMSIS_Core:
  13        - Added Cortex-M23, Cortex-M33 support.
  14        - Added ARMv8MML DSP devices.
  15     </release>
  16     <release version="5.0.0-Beta15">
  17       Reworked conditions.
  18     </release>
  19     <release version="5.0.0-Beta14">
  20       CMSIS-RTOS RTX 4.82 (see revision history for details)
  21     </release>
  22     <release version="5.0.0-Beta13" date="2016-10-21">
  23       Interim Beta Release:
  24       CMSIS-RTOS2 and RTX implementation:
  25        - reworked API based on customer feedback
  26       CMSIS-SVD:
  27        - reworked SVD format documentation
  28     </release>
  29     <release version="5.0.0-Beta12" date="2016-09-29">
  30       Interim Beta Release:
  31       CMSIS-RTOS2 and RTX implementation:
  32        - added context management API for ARMv8-M TrustZone
  33        - added ARMv8-M support (ARMClang, GCC)
  34       CMSIS-Core:
  35        - Updated documentation
  36        - Added new file cmsis_compiler.h.
  37        - Deleted deprecated files core_cmfunc.h, core_cminstr.h, core_cmsimd.h.
  38        - Reworked compiler specific include files.
  39        - Reworked core dependent include files.
  40        - Added __PACKED macro.
  41       CMSIS-DSP:
  42         - updated library projects
  43       CMSIS-SVD:
  44        - removed SVD file database documentation as SVD files are distributed in packs
  45        - updated SVDConv for Win32 and Linux
  46     </release>
  47     <release version="5.0.0-Beta11">
  48       CMSIS_Core:
  49        - Added CMSE support to cmsis_gcc.h.
  50     </release>
  51     <release version="5.0.0-Beta10">
  52       CMSIS-RTOS2:
  53         - Added RTX5 component.
  54     </release>
  55     <release version="5.0.0-Beta9">
  56       CMSIS_Core:
  57        - Replaced macro __SAU_PRESENT with __SAU_REGION_PRESENT.
  58        - Reworked SAU register and functions.
  59     </release>
  60     <release version="5.0.0-Beta8">
  61       CMSIS-RTOS:
  62         - API 2.0
  63         - RTX 5.0.0-Alpha
  64     </release>
  65     <release version="5.0.0-Beta7">
  66       CMSIS_Core:
  67        - Added macro __ALIGNED.
  68        - Updated function SCB_EnableICache.
  69     </release>
  70     <release version="5.0.0-Beta6">
  71       CMSIS_Core:
  72        - Added SCB_CFSR register bit definitions in core_*.h.
  73        - Added NVIC_GetEnableIRQ function in core_*.h.
  74        - Updated core instruction macros in cmsis_gcc.h.
  75     </release>
  76     <release version="5.0.0-Beta5">
  77       CMSIS_DSP:
  78        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  79        - Added DSP libraries build projects to CMSIS pack.
  80     </release>
  81     <release version="5.0.0-Beta4">
  82       Updated ARMv8MML device files.
  83        - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
  84       Updated CMSIS core files.
  85        - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
  86     </release>
  87     <release version="5.0.0-Beta3">
  88       Updated CMSIS ARMv8M core / device files
  89        - increased SAU regions to 8.
  90        - moved TZ_SAU_Setup() to partition_#device#.h.
  91     </release>
  92     <release version="5.0.0-Beta2">
  93       - renamed core_*.h to lower case.
  94       - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
  95       - updated ARMv8M?L.svd.
  96     </release>
  97     <release version="5.0.0-Beta1">
  98       - added function SCB_GetFPUType() to all CMSIS cores.
  99       - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
 100       - updated CMSIS core files to V5.0
 101       - updated CMSIS Core change log.
 102       - updated CMSIS DSP_Lib change log.
 103       - updated CMSIS DSP_Lib libraries.
 104     </release>
 105     <release version="5.0.0-Beta" date="2015-12-15">
 106       Added ARMv8M support to CMSIS-Core.
 107       - CMSIS-Core     5.0.0 Beta (see revision history for details)
 108       - CMSIS-RTOS
 109         -- API         1.02    (unchanged)
 110         -- RTX         4.81.0  (see revision history for details)
 111       - CMSIS-SVD      1.3.2   (see revision history for details)
 112     </release>
 113     <release version="4.5.0" date="2015-10-28">
 114       - CMSIS-Core     4.30.0  (see revision history for details)
 115       - CMSIS-DAP      1.1.0   (unchanged)
 116       - CMSIS-Driver   2.04.0  (see revision history for details)
 117       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 118       - CMSIS-PACK     1.4.1   (see revision history for details)
 119       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 120       - CMSIS-SVD      1.3.1   (see revision history for details)
 121     </release>
 122     <release version="4.4.0" date="2015-09-11">
 123       - CMSIS-Core     4.20   (see revision history for details)
 124       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 125       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 126       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 127       - CMSIS-RTOS
 128         -- API         1.02   (unchanged)
 129         -- RTX         4.79   (see revision history for details)
 130       - CMSIS-SVD      1.3.0  (see revision history for details)
 131       - CMSIS-DAP      1.1.0  (extended with SWO support)
 132     </release>
 133     <release version="4.3.0" date="2015-03-20">
 134       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 135       - CMSIS-DSP      1.4.5  (see revision history for details)
 136       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 137       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 138       - CMSIS-RTOS
 139         -- API         1.02   (unchanged)
 140         -- RTX         4.78   (see revision history for details)
 141       - CMSIS-SVD      1.2    (unchanged)
 142     </release>
 143     <release version="4.2.0" date="2014-09-24">
 144       Adding Cortex-M7 support
 145       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 146       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 147       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 148       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 149       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 150     </release>
 151     <release version="4.1.1" date="2014-06-30">
 152       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 153     </release>
 154     <release version="4.1.0" date="2014-06-12">
 155       - CMSIS-Driver   2.02  (incompatible update)
 156       - CMSIS-Pack     1.3   (see revision history for details)
 157       - CMSIS-DSP      1.4.2 (unchanged)
 158       - CMSIS-Core     3.30  (unchanged)
 159       - CMSIS-RTOS RTX 4.74  (unchanged)
 160       - CMSIS-RTOS API 1.02  (unchanged)
 161       - CMSIS-SVD      1.10  (unchanged)
 162       PACK:
 163       - removed G++ specific files from PACK
 164       - added Component Startup variant "C Startup"
 165       - added Pack Checking Utility
 166       - updated conditions to reflect tool-chain dependency
 167       - added Taxonomy for Graphics
 168       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 169     </release>
 170     <release version="4.0.0">
 171       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 172       - CMSIS-Pack     1.1   Preliminary
 173       - CMSIS-DSP      1.4.2 (see revision history for details)
 174       - CMSIS-Core     3.30  (see revision history for details)
 175       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 176       - CMSIS-RTOS API 1.02  (unchanged)
 177       - CMSIS-SVD      1.10  (unchanged)
 178     </release>
 179     <release version="3.20.4">
 180       - CMSIS-RTOS 4.74 (see revision history for details)
 181       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 182     </release>
 183     <release version="3.20.3">
 184       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 185       - CMSIS-RTOS 4.73 (see revision history for details)
 186     </release>
 187     <release version="3.20.2">
 188       - CMSIS-Pack documentation has been added
 189       - CMSIS-Drivers header and documentation have been added to PACK
 190       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 191     </release>
 192     <release version="3.20.1">
 193       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 194       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 195     </release>
 196     <release version="3.20.0">
 197       The software portions that are deployed in the application program are now under a BSD license which allows usage
 198       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 199       The individual components have been update as listed below:
 200       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 201       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 202       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 203       - CMSIS-SVD is unchanged.
 204     </release>
 205   </releases>
 206
 207   <taxonomy>
 208     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 209     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 210     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 211     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 212     <description Cclass="File System">File Drive Support and File System</description>
 213     <description Cclass="Graphics">Graphical User Interface</description>
 214     <description Cclass="Network">Network Stack using Internet Protocols</description>
 215     <description Cclass="USB">Universal Serial Bus Stack</description>
 216     <description Cclass="Compiler">ARM Compiler Software Extensions</description>
 217   </taxonomy>
 218
 219   <devices>
 220     <!-- ******************************  Cortex-M0  ****************************** -->
 221     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 222       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 223       <description>
 224 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 225 - simple, easy-to-use programmers model
 226 - highly efficient ultra-low power operation
 227 - excellent code density
 228 - deterministic, high-performance interrupt handling
 229 - upward compatibility with the rest of the Cortex-M processor family.
 230       </description>
 231       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 232       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 233       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 234       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 235
 236       <device Dname="ARMCM0">
 237         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 238         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 239       </device>
 240     </family>
 241
 242     <!-- ******************************  Cortex-M0P  ****************************** -->
 243     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 244       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 245       <description>
 246 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 247 - simple, easy-to-use programmers model
 248 - highly efficient ultra-low power operation
 249 - excellent code density
 250 - deterministic, high-performance interrupt handling
 251 - upward compatibility with the rest of the Cortex-M processor family.
 252       </description>
 253       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 254       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 255       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 256       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 257
 258       <device Dname="ARMCM0P">
 259         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 260         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 261       </device>
 262     </family>
 263
 264     <!-- ******************************  Cortex-M3  ****************************** -->
 265     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 266       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 267       <description>
 268 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 269 - simple, easy-to-use programmers model
 270 - highly efficient ultra-low power operation
 271 - excellent code density
 272 - deterministic, high-performance interrupt handling
 273 - upward compatibility with the rest of the Cortex-M processor family.
 274       </description>
 275       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 276       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 277       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 278       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 279
 280       <device Dname="ARMCM3">
 281         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 282         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 283       </device>
 284     </family>
 285
 286     <!-- ******************************  Cortex-M4  ****************************** -->
 287     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 288       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 289       <description>
 290 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 291 - simple, easy-to-use programmers model
 292 - highly efficient ultra-low power operation
 293 - excellent code density
 294 - deterministic, high-performance interrupt handling
 295 - upward compatibility with the rest of the Cortex-M processor family.
 296       </description>
 297       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 298       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 299       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 300       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 301
 302       <device Dname="ARMCM4">
 303         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 304         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 305       </device>
 306
 307       <device Dname="ARMCM4_FP">
 308         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 309         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 310       </device>
 311     </family>
 312
 313     <!-- ******************************  Cortex-M7  ****************************** -->
 314     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 315       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 316       <description>
 317 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 318 - simple, easy-to-use programmers model
 319 - highly efficient ultra-low power operation
 320 - excellent code density
 321 - deterministic, high-performance interrupt handling
 322 - upward compatibility with the rest of the Cortex-M processor family.
 323       </description>
 324       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 325       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 326       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 327       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 328
 329       <device Dname="ARMCM7">
 330         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 331         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 332       </device>
 333
 334       <device Dname="ARMCM7_SP">
 335         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 336         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 337       </device>
 338
 339       <device Dname="ARMCM7_DP">
 340         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 341         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 342       </device>
 343     </family>
 344
 345     <!-- ******************************  Cortex-M23  ********************** -->
 346     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 347       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 348       <description>
 349 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 350 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 351 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 352       </description>
 353       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 354       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 355       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 356       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 357       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 358       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 359
 360       <device Dname="ARMCM23">
 361         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 362         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 363       </device>
 364
 365       <device Dname="ARMCM23_TZ">
 366         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 367         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 368       </device>
 369     </family>
 370
 371     <!-- ******************************  Cortex-M33  ****************************** -->
 372     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 373       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 374       <description>
 375 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 376 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 377       </description>
 378       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 379       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 380       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 381       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 382       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 383       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 384
 385       <device Dname="ARMCM33">
 386         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 387         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 388       </device>
 389
 390       <device Dname="ARMCM33_TZ">
 391         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 392         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 393       </device>
 394
 395       <device Dname="ARMCM33_DSP_FP">
 396         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 397         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 398       </device>
 399
 400       <device Dname="ARMCM33_DSP_FP_TZ">
 401         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 402         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 403       </device>
 404     </family>
 405
 406     <!-- ******************************  ARMSC000  ****************************** -->
 407     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 408       <description>
 409 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 410 - simple, easy-to-use programmers model
 411 - highly efficient ultra-low power operation
 412 - excellent code density
 413 - deterministic, high-performance interrupt handling
 414       </description>
 415       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 416       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 417       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 418       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 419
 420       <device Dname="ARMSC000">
 421         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 422         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 423       </device>
 424     </family>
 425
 426     <!-- ******************************  ARMSC300  ****************************** -->
 427     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 428       <description>
 429 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 430 - simple, easy-to-use programmers model
 431 - highly efficient ultra-low power operation
 432 - excellent code density
 433 - deterministic, high-performance interrupt handling
 434       </description>
 435       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 436       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 437       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 438       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 439
 440       <device Dname="ARMSC300">
 441         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 442         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 443       </device>
 444     </family>
 445
 446     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 447     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 448       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 449       <description>
 450 ARMv8-M Baseline based device with TrustZone
 451       </description>
 452       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 453       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 454       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 455       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 456       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 457       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 458
 459       <device Dname="ARMv8MBL">
 460         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 461         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 462       </device>
 463     </family>
 464
 465     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 466     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 467       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 468       <description>
 469 ARMv8-M Mainline based device with TrustZone
 470       </description>
 471       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 472       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 473       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 474       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 475       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 476       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 477
 478       <device Dname="ARMv8MML">
 479         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 480         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 481       </device>
 482
 483       <device Dname="ARMv8MML_DSP">
 484         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 485         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 486       </device>
 487
 488       <device Dname="ARMv8MML_SP">
 489         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 490         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 491       </device>
 492
 493       <device Dname="ARMv8MML_DSP_SP">
 494         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 495         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 496       </device>
 497
 498       <device Dname="ARMv8MML_DP">
 499         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 500         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 501       </device>
 502
 503       <device Dname="ARMv8MML_DSP_DP">
 504         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 505         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 506       </device>
 507     </family>
 508
 509   </devices>
 510
 511
 512   <apis>
 513     <!-- CMSIS-RTOS API -->
 514     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
 515       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 516       <files>
 517         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 518       </files>
 519     </api>
 520     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
 521       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 522       <files>
 523         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 524       </files>
 525     </api>
 526     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
 527       <description>USART Driver API for Cortex-M</description>
 528       <files>
 529         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 530         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 531       </files>
 532     </api>
 533     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
 534       <description>SPI Driver API for Cortex-M</description>
 535       <files>
 536         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 537         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 538       </files>
 539     </api>
 540     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
 541       <description>SAI Driver API for Cortex-M</description>
 542       <files>
 543         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 544         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 545       </files>
 546     </api>
 547     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
 548       <description>I2C Driver API for Cortex-M</description>
 549       <files>
 550         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 551         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 552       </files>
 553     </api>
 554     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
 555       <description>CAN Driver API for Cortex-M</description>
 556       <files>
 557         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 558         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 559       </files>
 560     </api>
 561     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
 562       <description>Flash Driver API for Cortex-M</description>
 563       <files>
 564         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 565         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 566       </files>
 567     </api>
 568     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
 569       <description>MCI Driver API for Cortex-M</description>
 570       <files>
 571         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 572         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 573       </files>
 574     </api>
 575     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
 576       <description>NAND Flash Driver API for Cortex-M</description>
 577       <files>
 578         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 579         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 580       </files>
 581     </api>
 582     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
 583       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 584       <files>
 585         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 586         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 587         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 588       </files>
 589     </api>
 590     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
 591       <description>Ethernet MAC Driver API for Cortex-M</description>
 592       <files>
 593         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 594         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 595       </files>
 596     </api>
 597     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
 598       <description>Ethernet PHY Driver API for Cortex-M</description>
 599       <files>
 600         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 601         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 602       </files>
 603     </api>
 604     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
 605       <description>USB Device Driver API for Cortex-M</description>
 606       <files>
 607         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 608         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 609       </files>
 610     </api>
 611     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
 612       <description>USB Host Driver API for Cortex-M</description>
 613       <files>
 614         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 615         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 616       </files>
 617     </api>
 618   </apis>
 619
 620   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 621   <conditions>
 622     <!-- compiler -->
 623     <condition id="ARMCC">
 624       <require Tcompiler="ARMCC"/>
 625     </condition>
 626     <condition id="GCC">
 627       <require Tcompiler="GCC"/>
 628     </condition>
 629     <condition id="IAR">
 630       <require Tcompiler="IAR"/>
 631     </condition>
 632     <condition id="ARMCC GCC">
 633       <accept Tcompiler="ARMCC"/>
 634       <accept Tcompiler="GCC"/>
 635     </condition>
 636     <condition id="ARMCC GCC IAR">
 637       <accept Tcompiler="ARMCC"/>
 638       <accept Tcompiler="GCC"/>
 639       <accept Tcompiler="IAR"/>
 640     </condition>
 641
 642     <!-- ARM architecture -->
 643     <condition id="ARMv6-M Device">
 644       <description>ARMv6-M architecture based device</description>
 645       <accept Dcore="Cortex-M0"/>
 646       <accept Dcore="Cortex-M0+"/>
 647       <accept Dcore="SC000"/>
 648     </condition>
 649     <condition id="ARMv7-M Device">
 650       <description>ARMv7-M architecture based device</description>
 651       <accept Dcore="Cortex-M3"/>
 652       <accept Dcore="Cortex-M4"/>
 653       <accept Dcore="Cortex-M7"/>
 654       <accept Dcore="SC300"/>
 655     </condition>
 656     <condition id="ARMv8-M Device">
 657       <description>ARMv8-M architecture based device</description>
 658       <accept Dcore="ARMV8MBL"/>
 659       <accept Dcore="ARMV8MML"/>
 660       <accept Dcore="Cortex-M23"/>
 661       <accept Dcore="Cortex-M33"/>
 662     </condition>
 663     <condition id="ARMv8-M TZ Device">
 664       <description>ARMv8-M architecture based device with TrustZone</description>
 665       <require condition="ARMv8-M Device"/>
 666       <require Dtz="TZ"/>
 667     </condition>
 668     <condition id="ARMv6_7-M Device">
 669       <description>ARMv6_7-M architecture based device</description>
 670       <accept condition="ARMv6-M Device"/>
 671       <accept condition="ARMv7-M Device"/>
 672     </condition>
 673     <condition id="ARMv6_7_8-M Device">
 674       <description>ARMv6_7_8-M architecture based device</description>
 675       <accept condition="ARMv6-M Device"/>
 676       <accept condition="ARMv7-M Device"/>
 677       <accept condition="ARMv8-M Device"/>
 678     </condition>
 679
 680     <!-- ARM core -->
 681     <condition id="CM0">
 682       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 683       <accept Dcore="Cortex-M0"/>
 684       <accept Dcore="Cortex-M0+"/>
 685       <accept Dcore="SC000"/>
 686     </condition>
 687     <condition id="CM3">
 688       <description>Cortex-M3 or SC300 processor based device</description>
 689       <accept Dcore="Cortex-M3"/>
 690       <accept Dcore="SC300"/>
 691     </condition>
 692     <condition id="CM4">
 693       <description>Cortex-M4 processor based device</description>
 694       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 695     </condition>
 696     <condition id="CM4_FP">
 697       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 698       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 699     </condition>
 700     <condition id="CM7">
 701       <description>Cortex-M7 processor based device</description>
 702       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 703     </condition>
 704     <condition id="CM7_FP">
 705       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 706       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 707       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 708     </condition>
 709     <condition id="CM7_SP">
 710       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 711       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 712     </condition>
 713     <condition id="CM7_DP">
 714       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 715       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 716     </condition>
 717     <condition id="CM23">
 718       <description>Cortex-M23 processor based device</description>
 719       <require Dcore="Cortex-M23"/>
 720     </condition>
 721     <condition id="CM33">
 722       <description>Cortex-M33 processor based device</description>
 723       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 724     </condition>
 725     <condition id="CM33_DSP">
 726       <description>Cortex-M33 processor based device with DSP extension</description>
 727       <require Dcore="Cortex-M33" Dfpu="NO_FPU" Ddsp="DSP"/>
 728     </condition>
 729     <condition id="CM33_FP">
 730       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 731       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 732     </condition>
 733     <condition id="CM33_SP">
 734       <description>Cortex-M33 processor based device using Floating Point Unit (SP)</description>
 735       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="NO_DSP"/>
 736     </condition>
 737     <condition id="CM33_DSP_SP">
 738       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP)</description>
 739       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="DSP"/>
 740     </condition>
 741     <condition id="ARMv8MBL">
 742       <description>ARMv8-M Baseline processor based device</description>
 743       <require Dcore="ARMV8MBL"/>
 744     </condition>
 745     <condition id="ARMv8MML">
 746       <description>ARMv8-M Mainline processor based device</description>
 747       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 748     </condition>
 749     <condition id="ARMv8MML_DSP">
 750       <description>ARMv8-M Mainline processor based device with DSP extension</description>
 751       <require Dcore="ARMV8MML" Dfpu="NO_FPU" Ddsp="DSP"/>
 752     </condition>
 753     <condition id="ARMv8MML_FP">
 754       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 755       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 756       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 757     </condition>
 758     <condition id="ARMv8MML_SP">
 759       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
 760       <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 761     </condition>
 762     <condition id="ARMv8MML_DSP_SP">
 763       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP)</description>
 764       <require Dcore="ARMV8MML" Dfpu="SP_FPU" Ddsp="DSP"/>
 765     </condition>
 766     <condition id="ARMv8MML_DP">
 767       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
 768       <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 769     </condition>
 770     <condition id="ARMv8MML_DSP_DP">
 771       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP)</description>
 772       <require Dcore="ARMV8MML" Dfpu="DP_FPU" Ddsp="DSP"/>
 773     </condition>
 774
 775     <!-- ARMCC compiler -->
 776     <condition id="CM0_ARMCC">
 777       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 778       <require condition="CM0"/>
 779       <require Tcompiler="ARMCC"/>
 780     </condition>
 781     <condition id="CM0_LE_ARMCC">
 782       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 783       <require condition="CM0_ARMCC"/>
 784       <require Dendian="Little-endian"/>
 785     </condition>
 786     <condition id="CM0_BE_ARMCC">
 787       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 788       <require condition="CM0_ARMCC"/>
 789       <require Dendian="Big-endian"/>
 790     </condition>
 791
 792     <condition id="CM3_ARMCC">
 793       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 794       <require condition="CM3"/>
 795       <require Tcompiler="ARMCC"/>
 796     </condition>
 797     <condition id="CM3_LE_ARMCC">
 798       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 799       <require condition="CM3_ARMCC"/>
 800       <require Dendian="Little-endian"/>
 801     </condition>
 802     <condition id="CM3_BE_ARMCC">
 803       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 804       <require condition="CM3_ARMCC"/>
 805       <require Dendian="Big-endian"/>
 806     </condition>
 807
 808     <condition id="CM4_ARMCC">
 809       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 810       <require condition="CM4"/>
 811       <require Tcompiler="ARMCC"/>
 812     </condition>
 813     <condition id="CM4_LE_ARMCC">
 814       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 815       <require condition="CM4_ARMCC"/>
 816       <require Dendian="Little-endian"/>
 817     </condition>
 818     <condition id="CM4_BE_ARMCC">
 819       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 820       <require condition="CM4_ARMCC"/>
 821       <require Dendian="Big-endian"/>
 822     </condition>
 823
 824     <condition id="CM4_FP_ARMCC">
 825       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 826       <require condition="CM4_FP"/>
 827       <require Tcompiler="ARMCC"/>
 828     </condition>
 829     <condition id="CM4_FP_LE_ARMCC">
 830       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 831       <require condition="CM4_FP_ARMCC"/>
 832       <require Dendian="Little-endian"/>
 833     </condition>
 834     <condition id="CM4_FP_BE_ARMCC">
 835       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 836       <require condition="CM4_FP_ARMCC"/>
 837       <require Dendian="Big-endian"/>
 838     </condition>
 839
 840     <!-- XMC 4000 Series devices from Infineon require a special library -->
 841     <condition id="CM4_LE_ARMCC_STD">
 842       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 843       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 844       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 845       <require Tcompiler="ARMCC"/>
 846     </condition>
 847     <condition id="CM4_LE_ARMCC_IFX">
 848       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 849       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 850       <require Tcompiler="ARMCC"/>
 851     </condition>
 852     <condition id="CM4_FP_LE_ARMCC_STD">
 853       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 854       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 855       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 856       <require Tcompiler="ARMCC"/>
 857     </condition>
 858     <condition id="CM4_FP_LE_ARMCC_IFX">
 859       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 860       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 861       <require Tcompiler="ARMCC"/>
 862     </condition>
 863
 864     <condition id="CM7_ARMCC">
 865       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 866       <require condition="CM7"/>
 867       <require Tcompiler="ARMCC"/>
 868     </condition>
 869     <condition id="CM7_LE_ARMCC">
 870       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 871       <require condition="CM7_ARMCC"/>
 872       <require Dendian="Little-endian"/>
 873     </condition>
 874     <condition id="CM7_BE_ARMCC">
 875       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 876       <require condition="CM7_ARMCC"/>
 877       <require Dendian="Big-endian"/>
 878     </condition>
 879
 880     <condition id="CM7_FP_ARMCC">
 881       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 882       <require condition="CM7_FP"/>
 883       <require Tcompiler="ARMCC"/>
 884     </condition>
 885     <condition id="CM7_FP_LE_ARMCC">
 886       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 887       <require condition="CM7_FP_ARMCC"/>
 888       <require Dendian="Little-endian"/>
 889     </condition>
 890     <condition id="CM7_FP_BE_ARMCC">
 891       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 892       <require condition="CM7_FP_ARMCC"/>
 893       <require Dendian="Big-endian"/>
 894     </condition>
 895
 896     <condition id="CM7_SP_ARMCC">
 897       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 898       <require condition="CM7_SP"/>
 899       <require Tcompiler="ARMCC"/>
 900     </condition>
 901     <condition id="CM7_SP_LE_ARMCC">
 902       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 903       <require condition="CM7_SP_ARMCC"/>
 904       <require Dendian="Little-endian"/>
 905     </condition>
 906     <condition id="CM7_SP_BE_ARMCC">
 907       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 908       <require condition="CM7_SP_ARMCC"/>
 909       <require Dendian="Big-endian"/>
 910     </condition>
 911
 912     <condition id="CM7_DP_ARMCC">
 913       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 914       <require condition="CM7_DP"/>
 915       <require Tcompiler="ARMCC"/>
 916     </condition>
 917     <condition id="CM7_DP_LE_ARMCC">
 918       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 919       <require condition="CM7_DP_ARMCC"/>
 920       <require Dendian="Little-endian"/>
 921     </condition>
 922     <condition id="CM7_DP_BE_ARMCC">
 923       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 924       <require condition="CM7_DP_ARMCC"/>
 925       <require Dendian="Big-endian"/>
 926     </condition>
 927
 928     <condition id="CM23_ARMCC">
 929       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 930       <require condition="CM23"/>
 931       <require Tcompiler="ARMCC"/>
 932     </condition>
 933     <condition id="CM23_LE_ARMCC">
 934       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 935       <require condition="CM23_ARMCC"/>
 936       <require Dendian="Little-endian"/>
 937     </condition>
 938     <condition id="CM23_BE_ARMCC">
 939       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 940       <require condition="CM23_ARMCC"/>
 941       <require Dendian="Big-endian"/>
 942     </condition>
 943
 944     <condition id="CM33_ARMCC">
 945       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 946       <require condition="CM33"/>
 947       <require Tcompiler="ARMCC"/>
 948     </condition>
 949     <condition id="CM33_LE_ARMCC">
 950       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 951       <require condition="CM33_ARMCC"/>
 952       <require Dendian="Little-endian"/>
 953     </condition>
 954     <condition id="CM33_BE_ARMCC">
 955       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 956       <require condition="CM33_ARMCC"/>
 957       <require Dendian="Big-endian"/>
 958     </condition>
 959
 960     <condition id="CM33_DSP_ARMCC">
 961       <description>Cortex-M33 processor based device with DSP extension for the ARM Compiler</description>
 962       <require condition="CM33_DSP"/>
 963       <require Tcompiler="ARMCC"/>
 964     </condition>
 965     <condition id="CM33_DSP_LE_ARMCC">
 966       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the ARM Compiler</description>
 967       <require condition="CM33_DSP_ARMCC"/>
 968       <require Dendian="Little-endian"/>
 969     </condition>
 970     <condition id="CM33_DSP_BE_ARMCC">
 971       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the ARM Compiler</description>
 972       <require condition="CM33_DSP_ARMCC"/>
 973       <require Dendian="Big-endian"/>
 974     </condition>
 975
 976     <condition id="CM33_FP_ARMCC">
 977       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 978       <require condition="CM33_FP"/>
 979       <require Tcompiler="ARMCC"/>
 980     </condition>
 981     <condition id="CM33_FP_LE_ARMCC">
 982       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 983       <require condition="CM33_FP_ARMCC"/>
 984       <require Dendian="Little-endian"/>
 985     </condition>
 986     <condition id="CM33_FP_BE_ARMCC">
 987       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 988       <require condition="CM33_FP_ARMCC"/>
 989       <require Dendian="Big-endian"/>
 990     </condition>
 991
 992     <condition id="CM33_SP_ARMCC">
 993       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 994       <require condition="CM33_SP"/>
 995       <require Tcompiler="ARMCC"/>
 996     </condition>
 997     <condition id="CM33_SP_LE_ARMCC">
 998       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 999       <require condition="CM33_SP_ARMCC"/>
1000       <require Dendian="Little-endian"/>
1001     </condition>
1002     <condition id="CM33_SP_BE_ARMCC">
1003       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1004       <require condition="CM33_SP_ARMCC"/>
1005       <require Dendian="Big-endian"/>
1006     </condition>
1007
1008     <condition id="CM33_DSP_SP_ARMCC">
1009       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1010       <require condition="CM33_DSP_SP"/>
1011       <require Tcompiler="ARMCC"/>
1012     </condition>
1013     <condition id="CM33_DSP_SP_LE_ARMCC">
1014       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1015       <require condition="CM33_DSP_SP_ARMCC"/>
1016       <require Dendian="Little-endian"/>
1017     </condition>
1018     <condition id="CM33_DSP_SP_BE_ARMCC">
1019       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1020       <require condition="CM33_DSP_SP_ARMCC"/>
1021       <require Dendian="Big-endian"/>
1022     </condition>
1023
1024     <condition id="ARMv8MBL_ARMCC">
1025       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1026       <require condition="ARMv8MBL"/>
1027       <require Tcompiler="ARMCC"/>
1028     </condition>
1029     <condition id="ARMv8MBL_LE_ARMCC">
1030       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1031       <require condition="ARMv8MBL_ARMCC"/>
1032       <require Dendian="Little-endian"/>
1033     </condition>
1034     <condition id="ARMv8MBL_BE_ARMCC">
1035       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1036       <require condition="ARMv8MBL_ARMCC"/>
1037       <require Dendian="Big-endian"/>
1038     </condition>
1039
1040     <condition id="ARMv8MML_ARMCC">
1041       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1042       <require condition="ARMv8MML"/>
1043       <require Tcompiler="ARMCC"/>
1044     </condition>
1045     <condition id="ARMv8MML_LE_ARMCC">
1046       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1047       <require condition="ARMv8MML_ARMCC"/>
1048       <require Dendian="Little-endian"/>
1049     </condition>
1050     <condition id="ARMv8MML_BE_ARMCC">
1051       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1052       <require condition="ARMv8MML_ARMCC"/>
1053       <require Dendian="Big-endian"/>
1054     </condition>
1055
1056     <condition id="ARMv8MML_DSP_ARMCC">
1057       <description>ARMv8-M Mainline processor based device with DSP extension for the ARM Compiler</description>
1058       <require condition="ARMv8MML_DSP"/>
1059       <require Tcompiler="ARMCC"/>
1060     </condition>
1061     <condition id="ARMv8MML_DSP_LE_ARMCC">
1062       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the ARM Compiler</description>
1063       <require condition="ARMv8MML_DSP_ARMCC"/>
1064       <require Dendian="Little-endian"/>
1065     </condition>
1066     <condition id="ARMv8MML_DSP_BE_ARMCC">
1067       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the ARM Compiler</description>
1068       <require condition="ARMv8MML_DSP_ARMCC"/>
1069       <require Dendian="Big-endian"/>
1070     </condition>
1071
1072     <condition id="ARMv8MML_FP_ARMCC">
1073       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1074       <require condition="ARMv8MML_FP"/>
1075       <require Tcompiler="ARMCC"/>
1076     </condition>
1077     <condition id="ARMv8MML_FP_LE_ARMCC">
1078       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1079       <require condition="ARMv8MML_FP_ARMCC"/>
1080       <require Dendian="Little-endian"/>
1081     </condition>
1082     <condition id="ARMv8MML_FP_BE_ARMCC">
1083       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1084       <require condition="ARMv8MML_FP_ARMCC"/>
1085       <require Dendian="Big-endian"/>
1086     </condition>
1087
1088     <condition id="ARMv8MML_SP_ARMCC">
1089       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1090       <require condition="ARMv8MML_SP"/>
1091       <require Tcompiler="ARMCC"/>
1092     </condition>
1093     <condition id="ARMv8MML_SP_LE_ARMCC">
1094       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1095       <require condition="ARMv8MML_SP_ARMCC"/>
1096       <require Dendian="Little-endian"/>
1097     </condition>
1098     <condition id="ARMv8MML_SP_BE_ARMCC">
1099       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1100       <require condition="ARMv8MML_SP_ARMCC"/>
1101       <require Dendian="Big-endian"/>
1102     </condition>
1103
1104     <condition id="ARMv8MML_DSP_SP_ARMCC">
1105       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1106       <require condition="ARMv8MML_DSP_SP"/>
1107       <require Tcompiler="ARMCC"/>
1108     </condition>
1109     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1110       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1111       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1112       <require Dendian="Little-endian"/>
1113     </condition>
1114     <condition id="ARMv8MML_DSP_SP_BE_ARMCC">
1115       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1116       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1117       <require Dendian="Big-endian"/>
1118     </condition>
1119
1120     <condition id="ARMv8MML_DP_ARMCC">
1121       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1122       <require condition="ARMv8MML_DP"/>
1123       <require Tcompiler="ARMCC"/>
1124     </condition>
1125     <condition id="ARMv8MML_DP_LE_ARMCC">
1126       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1127       <require condition="ARMv8MML_DP_ARMCC"/>
1128       <require Dendian="Little-endian"/>
1129     </condition>
1130     <condition id="ARMv8MML_DP_BE_ARMCC">
1131       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1132       <require condition="ARMv8MML_DP_ARMCC"/>
1133       <require Dendian="Big-endian"/>
1134     </condition>
1135
1136     <condition id="ARMv8MML_DSP_DP_ARMCC">
1137       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the ARM Compiler</description>
1138       <require condition="ARMv8MML_DSP_DP"/>
1139       <require Tcompiler="ARMCC"/>
1140     </condition>
1141     <condition id="ARMv8MML_DSP_DP_LE_ARMCC">
1142       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1143       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1144       <require Dendian="Little-endian"/>
1145     </condition>
1146     <condition id="ARMv8MML_DSP_DP_BE_ARMCC">
1147       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1148       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1149       <require Dendian="Big-endian"/>
1150     </condition>
1151
1152     <!-- GCC compiler -->
1153     <condition id="CM0_GCC">
1154       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1155       <require condition="CM0"/>
1156       <require Tcompiler="GCC"/>
1157     </condition>
1158     <condition id="CM0_LE_GCC">
1159       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1160       <require condition="CM0_GCC"/>
1161       <require Dendian="Little-endian"/>
1162     </condition>
1163     <condition id="CM0_BE_GCC">
1164       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1165       <require condition="CM0_GCC"/>
1166       <require Dendian="Big-endian"/>
1167     </condition>
1168
1169     <condition id="CM3_GCC">
1170       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1171       <require condition="CM3"/>
1172       <require Tcompiler="GCC"/>
1173     </condition>
1174     <condition id="CM3_LE_GCC">
1175       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1176       <require condition="CM3_GCC"/>
1177       <require Dendian="Little-endian"/>
1178     </condition>
1179     <condition id="CM3_BE_GCC">
1180       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1181       <require condition="CM3_GCC"/>
1182       <require Dendian="Big-endian"/>
1183     </condition>
1184
1185     <condition id="CM4_GCC">
1186       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1187       <require condition="CM4"/>
1188       <require Tcompiler="GCC"/>
1189     </condition>
1190     <condition id="CM4_LE_GCC">
1191       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1192       <require condition="CM4_GCC"/>
1193       <require Dendian="Little-endian"/>
1194     </condition>
1195     <condition id="CM4_BE_GCC">
1196       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1197       <require condition="CM4_GCC"/>
1198       <require Dendian="Big-endian"/>
1199     </condition>
1200
1201     <condition id="CM4_FP_GCC">
1202       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1203       <require condition="CM4_FP"/>
1204       <require Tcompiler="GCC"/>
1205     </condition>
1206     <condition id="CM4_FP_LE_GCC">
1207       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1208       <require condition="CM4_FP_GCC"/>
1209       <require Dendian="Little-endian"/>
1210     </condition>
1211     <condition id="CM4_FP_BE_GCC">
1212       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1213       <require condition="CM4_FP_GCC"/>
1214       <require Dendian="Big-endian"/>
1215     </condition>
1216
1217     <!-- XMC 4000 Series devices from Infineon require a special library -->
1218     <condition id="CM4_LE_GCC_STD">
1219       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1220       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1221       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1222       <require Tcompiler="GCC"/>
1223     </condition>
1224     <condition id="CM4_LE_GCC_IFX">
1225       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1226       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1227       <require Tcompiler="GCC"/>
1228     </condition>
1229     <condition id="CM4_FP_LE_GCC_STD">
1230       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1231       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1232       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1233       <require Tcompiler="GCC"/>
1234     </condition>
1235     <condition id="CM4_FP_LE_GCC_IFX">
1236       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1237       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1238       <require Tcompiler="GCC"/>
1239     </condition>
1240
1241     <condition id="CM7_GCC">
1242       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1243       <require condition="CM7"/>
1244       <require Tcompiler="GCC"/>
1245     </condition>
1246     <condition id="CM7_LE_GCC">
1247       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1248       <require condition="CM7_GCC"/>
1249       <require Dendian="Little-endian"/>
1250     </condition>
1251     <condition id="CM7_BE_GCC">
1252       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1253       <require condition="CM7_GCC"/>
1254       <require Dendian="Big-endian"/>
1255     </condition>
1256
1257     <condition id="CM7_FP_GCC">
1258       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1259       <require condition="CM7_FP"/>
1260       <require Tcompiler="GCC"/>
1261     </condition>
1262     <condition id="CM7_FP_LE_GCC">
1263       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1264       <require condition="CM7_FP_GCC"/>
1265       <require Dendian="Little-endian"/>
1266     </condition>
1267     <condition id="CM7_FP_BE_GCC">
1268       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1269       <require condition="CM7_FP_GCC"/>
1270       <require Dendian="Big-endian"/>
1271     </condition>
1272
1273     <condition id="CM7_SP_GCC">
1274       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1275       <require condition="CM7_SP"/>
1276       <require Tcompiler="GCC"/>
1277     </condition>
1278     <condition id="CM7_SP_LE_GCC">
1279       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1280       <require condition="CM7_SP_GCC"/>
1281       <require Dendian="Little-endian"/>
1282     </condition>
1283     <condition id="CM7_SP_BE_GCC">
1284       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1285       <require condition="CM7_SP_GCC"/>
1286       <require Dendian="Big-endian"/>
1287     </condition>
1288
1289     <condition id="CM7_DP_GCC">
1290       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1291       <require condition="CM7_DP"/>
1292       <require Tcompiler="GCC"/>
1293     </condition>
1294     <condition id="CM7_DP_LE_GCC">
1295       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1296       <require condition="CM7_DP_GCC"/>
1297       <require Dendian="Little-endian"/>
1298     </condition>
1299     <condition id="CM7_DP_BE_GCC">
1300       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1301       <require condition="CM7_DP_GCC"/>
1302       <require Dendian="Big-endian"/>
1303     </condition>
1304
1305     <condition id="CM23_GCC">
1306       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1307       <require condition="CM23"/>
1308       <require Tcompiler="GCC"/>
1309     </condition>
1310     <condition id="CM23_LE_GCC">
1311       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1312       <require condition="CM23_GCC"/>
1313       <require Dendian="Little-endian"/>
1314     </condition>
1315     <condition id="CM23_BE_GCC">
1316       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1317       <require condition="CM23_GCC"/>
1318       <require Dendian="Big-endian"/>
1319     </condition>
1320
1321     <condition id="CM33_GCC">
1322       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1323       <require condition="CM33"/>
1324       <require Tcompiler="GCC"/>
1325     </condition>
1326     <condition id="CM33_LE_GCC">
1327       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1328       <require condition="CM33_GCC"/>
1329       <require Dendian="Little-endian"/>
1330     </condition>
1331     <condition id="CM33_BE_GCC">
1332       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1333       <require condition="CM33_GCC"/>
1334       <require Dendian="Big-endian"/>
1335     </condition>
1336
1337     <condition id="CM33_DSP_GCC">
1338       <description>Cortex-M33 processor based device with DSP extension for the GCC Compiler</description>
1339       <require condition="CM33_DSP"/>
1340       <require Tcompiler="GCC"/>
1341     </condition>
1342     <condition id="CM33_DSP_LE_GCC">
1343       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1344       <require condition="CM33_DSP_GCC"/>
1345       <require Dendian="Little-endian"/>
1346     </condition>
1347     <condition id="CM33_DSP_BE_GCC">
1348       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1349       <require condition="CM33_DSP_GCC"/>
1350       <require Dendian="Big-endian"/>
1351     </condition>
1352
1353     <condition id="CM33_FP_GCC">
1354       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1355       <require condition="CM33_FP"/>
1356       <require Tcompiler="GCC"/>
1357     </condition>
1358     <condition id="CM33_FP_LE_GCC">
1359       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1360       <require condition="CM33_FP_GCC"/>
1361       <require Dendian="Little-endian"/>
1362     </condition>
1363     <condition id="CM33_FP_BE_GCC">
1364       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1365       <require condition="CM33_FP_GCC"/>
1366       <require Dendian="Big-endian"/>
1367     </condition>
1368
1369     <condition id="CM33_SP_GCC">
1370       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1371       <require condition="CM33_SP"/>
1372       <require Tcompiler="GCC"/>
1373     </condition>
1374     <condition id="CM33_SP_LE_GCC">
1375       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1376       <require condition="CM33_SP_GCC"/>
1377       <require Dendian="Little-endian"/>
1378     </condition>
1379     <condition id="CM33_SP_BE_GCC">
1380       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1381       <require condition="CM33_SP_GCC"/>
1382       <require Dendian="Big-endian"/>
1383     </condition>
1384
1385     <condition id="CM33_DSP_SP_GCC">
1386       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1387       <require condition="CM33_DSP_SP"/>
1388       <require Tcompiler="GCC"/>
1389     </condition>
1390     <condition id="CM33_DSP_SP_LE_GCC">
1391       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1392       <require condition="CM33_DSP_SP_GCC"/>
1393       <require Dendian="Little-endian"/>
1394     </condition>
1395     <condition id="CM33_DSP_SP_BE_GCC">
1396       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1397       <require condition="CM33_DSP_SP_GCC"/>
1398       <require Dendian="Big-endian"/>
1399     </condition>
1400
1401     <condition id="ARMv8MBL_GCC">
1402       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1403       <require condition="ARMv8MBL"/>
1404       <require Tcompiler="GCC"/>
1405     </condition>
1406     <condition id="ARMv8MBL_LE_GCC">
1407       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1408       <require condition="ARMv8MBL_GCC"/>
1409       <require Dendian="Little-endian"/>
1410     </condition>
1411     <condition id="ARMv8MBL_BE_GCC">
1412       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1413       <require condition="ARMv8MBL_GCC"/>
1414       <require Dendian="Big-endian"/>
1415     </condition>
1416
1417     <condition id="ARMv8MML_GCC">
1418       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1419       <require condition="ARMv8MML"/>
1420       <require Tcompiler="GCC"/>
1421     </condition>
1422     <condition id="ARMv8MML_LE_GCC">
1423       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1424       <require condition="ARMv8MML_GCC"/>
1425       <require Dendian="Little-endian"/>
1426     </condition>
1427     <condition id="ARMv8MML_BE_GCC">
1428       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1429       <require condition="ARMv8MML_GCC"/>
1430       <require Dendian="Big-endian"/>
1431     </condition>
1432
1433     <condition id="ARMv8MML_DSP_GCC">
1434       <description>ARMv8-M Mainline processor based device with DSP extension for the GCC Compiler</description>
1435       <require condition="ARMv8MML_DSP"/>
1436       <require Tcompiler="GCC"/>
1437     </condition>
1438     <condition id="ARMv8MML_DSP_LE_GCC">
1439       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1440       <require condition="ARMv8MML_DSP_GCC"/>
1441       <require Dendian="Little-endian"/>
1442     </condition>
1443     <condition id="ARMv8MML_DSP_BE_GCC">
1444       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1445       <require condition="ARMv8MML_DSP_GCC"/>
1446       <require Dendian="Big-endian"/>
1447     </condition>
1448
1449     <condition id="ARMv8MML_FP_GCC">
1450       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1451       <require condition="ARMv8MML_FP"/>
1452       <require Tcompiler="GCC"/>
1453     </condition>
1454     <condition id="ARMv8MML_FP_LE_GCC">
1455       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1456       <require condition="ARMv8MML_FP_GCC"/>
1457       <require Dendian="Little-endian"/>
1458     </condition>
1459     <condition id="ARMv8MML_FP_BE_GCC">
1460       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1461       <require condition="ARMv8MML_FP_GCC"/>
1462       <require Dendian="Big-endian"/>
1463     </condition>
1464
1465     <condition id="ARMv8MML_SP_GCC">
1466       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1467       <require condition="ARMv8MML_SP"/>
1468       <require Tcompiler="GCC"/>
1469     </condition>
1470     <condition id="ARMv8MML_SP_LE_GCC">
1471       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1472       <require condition="ARMv8MML_SP_GCC"/>
1473       <require Dendian="Little-endian"/>
1474     </condition>
1475     <condition id="ARMv8MML_SP_BE_GCC">
1476       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1477       <require condition="ARMv8MML_SP_GCC"/>
1478       <require Dendian="Big-endian"/>
1479     </condition>
1480
1481     <condition id="ARMv8MML_DSP_SP_GCC">
1482       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1483       <require condition="ARMv8MML_DSP_SP"/>
1484       <require Tcompiler="GCC"/>
1485     </condition>
1486     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1487       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1488       <require condition="ARMv8MML_DSP_SP_GCC"/>
1489       <require Dendian="Little-endian"/>
1490     </condition>
1491     <condition id="ARMv8MML_DSP_SP_BE_GCC">
1492       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1493       <require condition="ARMv8MML_DSP_SP_GCC"/>
1494       <require Dendian="Big-endian"/>
1495     </condition>
1496
1497     <condition id="ARMv8MML_DP_GCC">
1498       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1499       <require condition="ARMv8MML_DP"/>
1500       <require Tcompiler="GCC"/>
1501     </condition>
1502     <condition id="ARMv8MML_DP_LE_GCC">
1503       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1504       <require condition="ARMv8MML_DP_GCC"/>
1505       <require Dendian="Little-endian"/>
1506     </condition>
1507     <condition id="ARMv8MML_DP_BE_GCC">
1508       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1509       <require condition="ARMv8MML_DP_GCC"/>
1510       <require Dendian="Big-endian"/>
1511     </condition>
1512
1513     <condition id="ARMv8MML_DSP_DP_GCC">
1514       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the GCC Compiler</description>
1515       <require condition="ARMv8MML_DSP_DP"/>
1516       <require Tcompiler="GCC"/>
1517     </condition>
1518     <condition id="ARMv8MML_DSP_DP_LE_GCC">
1519       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1520       <require condition="ARMv8MML_DSP_DP_GCC"/>
1521       <require Dendian="Little-endian"/>
1522     </condition>
1523     <condition id="ARMv8MML_DSP_DP_BE_GCC">
1524       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1525       <require condition="ARMv8MML_DSP_DP_GCC"/>
1526       <require Dendian="Big-endian"/>
1527     </condition>
1528
1529     <!-- IAR compiler -->
1530     <condition id="CM0_IAR">
1531       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1532       <require condition="CM0"/>
1533       <require Tcompiler="IAR"/>
1534     </condition>
1535     <condition id="CM0_LE_IAR">
1536       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1537       <require condition="CM0_IAR"/>
1538       <require Dendian="Little-endian"/>
1539     </condition>
1540     <condition id="CM0_BE_IAR">
1541       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1542       <require condition="CM0_IAR"/>
1543       <require Dendian="Big-endian"/>
1544     </condition>
1545
1546     <condition id="CM3_IAR">
1547       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1548       <require condition="CM3"/>
1549       <require Tcompiler="IAR"/>
1550     </condition>
1551     <condition id="CM3_LE_IAR">
1552       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1553       <require condition="CM3_IAR"/>
1554       <require Dendian="Little-endian"/>
1555     </condition>
1556     <condition id="CM3_BE_IAR">
1557       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1558       <require condition="CM3_IAR"/>
1559       <require Dendian="Big-endian"/>
1560     </condition>
1561
1562     <condition id="CM4_IAR">
1563       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1564       <require condition="CM4"/>
1565       <require Tcompiler="IAR"/>
1566     </condition>
1567     <condition id="CM4_LE_IAR">
1568       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1569       <require condition="CM4_IAR"/>
1570       <require Dendian="Little-endian"/>
1571     </condition>
1572     <condition id="CM4_BE_IAR">
1573       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1574       <require condition="CM4_IAR"/>
1575       <require Dendian="Big-endian"/>
1576     </condition>
1577
1578     <condition id="CM4_FP_IAR">
1579       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1580       <require condition="CM4_FP"/>
1581       <require Tcompiler="IAR"/>
1582     </condition>
1583     <condition id="CM4_FP_LE_IAR">
1584       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1585       <require condition="CM4_FP_IAR"/>
1586       <require Dendian="Little-endian"/>
1587     </condition>
1588     <condition id="CM4_FP_BE_IAR">
1589       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1590       <require condition="CM4_FP_IAR"/>
1591       <require Dendian="Big-endian"/>
1592     </condition>
1593
1594     <condition id="CM7_IAR">
1595       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1596       <require condition="CM7"/>
1597       <require Tcompiler="IAR"/>
1598     </condition>
1599     <condition id="CM7_LE_IAR">
1600       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1601       <require condition="CM7_IAR"/>
1602       <require Dendian="Little-endian"/>
1603     </condition>
1604     <condition id="CM7_BE_IAR">
1605       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1606       <require condition="CM7_IAR"/>
1607       <require Dendian="Big-endian"/>
1608     </condition>
1609
1610     <condition id="CM7_FP_IAR">
1611       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1612       <require condition="CM7_FP"/>
1613       <require Tcompiler="IAR"/>
1614     </condition>
1615     <condition id="CM7_FP_LE_IAR">
1616       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1617       <require condition="CM7_FP_IAR"/>
1618       <require Dendian="Little-endian"/>
1619     </condition>
1620     <condition id="CM7_FP_BE_IAR">
1621       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1622       <require condition="CM7_FP_IAR"/>
1623       <require Dendian="Big-endian"/>
1624     </condition>
1625
1626     <condition id="CM7_SP_IAR">
1627       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1628       <require condition="CM7_SP"/>
1629       <require Tcompiler="IAR"/>
1630     </condition>
1631     <condition id="CM7_SP_LE_IAR">
1632       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1633       <require condition="CM7_SP_IAR"/>
1634       <require Dendian="Little-endian"/>
1635     </condition>
1636     <condition id="CM7_SP_BE_IAR">
1637       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1638       <require condition="CM7_SP_IAR"/>
1639       <require Dendian="Big-endian"/>
1640     </condition>
1641
1642     <condition id="CM7_DP_IAR">
1643       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1644       <require condition="CM7_DP"/>
1645       <require Tcompiler="IAR"/>
1646     </condition>
1647     <condition id="CM7_DP_LE_IAR">
1648       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1649       <require condition="CM7_DP_IAR"/>
1650       <require Dendian="Little-endian"/>
1651     </condition>
1652     <condition id="CM7_DP_BE_IAR">
1653       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1654       <require condition="CM7_DP_IAR"/>
1655       <require Dendian="Big-endian"/>
1656     </condition>
1657
1658     <!-- conditions selecting single devices and CMSIS Core -->
1659     <!-- used for component startup, GCC version is used for C-Startup -->
1660     <condition id="ARMCM0 CMSIS">
1661       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1662       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1663       <require Cclass="CMSIS" Cgroup="CORE"/>
1664     </condition>
1665     <condition id="ARMCM0 CMSIS GCC">
1666       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1667       <require condition="ARMCM0 CMSIS"/>
1668       <require condition="GCC"/>
1669     </condition>
1670
1671     <condition id="ARMCM0+ CMSIS">
1672       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1673       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1674       <require Cclass="CMSIS" Cgroup="CORE"/>
1675     </condition>
1676     <condition id="ARMCM0+ CMSIS GCC">
1677       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1678       <require condition="ARMCM0+ CMSIS"/>
1679       <require condition="GCC"/>
1680     </condition>
1681
1682     <condition id="ARMCM3 CMSIS">
1683       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1684       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1685       <require Cclass="CMSIS" Cgroup="CORE"/>
1686     </condition>
1687     <condition id="ARMCM3 CMSIS GCC">
1688       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1689       <require condition="ARMCM3 CMSIS"/>
1690       <require condition="GCC"/>
1691     </condition>
1692
1693     <condition id="ARMCM4 CMSIS">
1694       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1695       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1696       <require Cclass="CMSIS" Cgroup="CORE"/>
1697     </condition>
1698     <condition id="ARMCM4 CMSIS GCC">
1699       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1700       <require condition="ARMCM4 CMSIS"/>
1701       <require condition="GCC"/>
1702     </condition>
1703
1704     <condition id="ARMCM7 CMSIS">
1705       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1706       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1707       <require Cclass="CMSIS" Cgroup="CORE"/>
1708     </condition>
1709     <condition id="ARMCM7 CMSIS GCC">
1710       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1711       <require condition="ARMCM7 CMSIS"/>
1712       <require condition="GCC"/>
1713     </condition>
1714
1715     <condition id="ARMCM23 CMSIS">
1716       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1717       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1718       <require Cclass="CMSIS" Cgroup="CORE"/>
1719     </condition>
1720     <condition id="ARMCM23 CMSIS GCC">
1721       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1722       <require condition="ARMCM23 CMSIS"/>
1723       <require condition="GCC"/>
1724     </condition>
1725
1726     <condition id="ARMCM33 CMSIS">
1727       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1728       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1729       <require Cclass="CMSIS" Cgroup="CORE"/>
1730     </condition>
1731     <condition id="ARMCM33 CMSIS GCC">
1732       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1733       <require condition="ARMCM33 CMSIS"/>
1734       <require condition="GCC"/>
1735     </condition>
1736
1737     <condition id="ARMSC000 CMSIS">
1738       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1739       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1740       <require Cclass="CMSIS" Cgroup="CORE"/>
1741     </condition>
1742     <condition id="ARMSC000 CMSIS GCC">
1743       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1744       <require condition="ARMSC000 CMSIS"/>
1745       <require condition="GCC"/>
1746     </condition>
1747
1748     <condition id="ARMSC300 CMSIS">
1749       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1750       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1751       <require Cclass="CMSIS" Cgroup="CORE"/>
1752     </condition>
1753     <condition id="ARMSC300 CMSIS GCC">
1754       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1755       <require condition="ARMSC300 CMSIS"/>
1756       <require condition="GCC"/>
1757     </condition>
1758
1759     <condition id="ARMv8MBL CMSIS">
1760       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1761       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1762       <require Cclass="CMSIS" Cgroup="CORE"/>
1763     </condition>
1764     <condition id="ARMv8MBL CMSIS GCC">
1765       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1766       <require condition="ARMv8MBL CMSIS"/>
1767       <require condition="GCC"/>
1768     </condition>
1769
1770     <condition id="ARMv8MML CMSIS">
1771       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1772       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1773       <require Cclass="CMSIS" Cgroup="CORE"/>
1774     </condition>
1775     <condition id="ARMv8MML CMSIS GCC">
1776       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1777       <require condition="ARMv8MML CMSIS"/>
1778       <require condition="GCC"/>
1779     </condition>
1780
1781     <!-- CMSIS DSP -->
1782     <condition id="CMSIS DSP">
1783       <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
1784       <require condition="ARMv6_7-M Device"/>
1785       <require Cclass="CMSIS" Cgroup="CORE"/>
1786       <require condition="ARMCC GCC"/>
1787     </condition>
1788
1789     <!-- RTOS RTX -->
1790     <condition id="RTOS RTX">
1791       <description>Components required for RTOS RTX</description>
1792       <require condition="ARMv6_7-M Device"/>
1793       <require condition="ARMCC GCC IAR"/>
1794       <require Cclass="Device" Cgroup="Startup"/>
1795       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1796     </condition>
1797     <condition id="RTOS RTX5">
1798       <description>Components required for RTOS RTX5</description>
1799       <require condition="ARMv6_7_8-M Device"/>
1800       <require condition="ARMCC GCC"/>
1801       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1802     </condition>
1803     <condition id="RTOS2 RTX5">
1804       <description>Components required for RTOS2 RTX5</description>
1805       <require condition="ARMv6_7_8-M Device"/>
1806       <require condition="ARMCC GCC"/>
1807       <require Cclass="CMSIS"  Cgroup="CORE"/>
1808       <require Cclass="Device" Cgroup="Startup"/>
1809     </condition>
1810     <condition id="RTOS2 RTX5 NS">
1811       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1812       <require condition="ARMv8-M TZ Device"/>
1813       <require condition="ARMCC GCC"/>
1814       <require Cclass="CMSIS"  Cgroup="CORE"/>
1815       <require Cclass="Device" Cgroup="Startup"/>
1816     </condition>
1817
1818   </conditions>
1819
1820   <components>
1821     <!-- CMSIS-Core component -->
1822     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0"  condition="ARMv6_7_8-M Device" >
1823       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1824       <files>
1825         <!-- CPU independent -->
1826         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1827         <file category="include" name="CMSIS/Include/"/>
1828         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1829         <!-- Code template -->
1830         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     select="Secure mode 'main' module for ARMv8-M"/>
1831         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1832       </files>
1833     </component>
1834
1835     <!-- CMSIS-Startup components -->
1836     <!-- Cortex-M0 -->
1837     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1838       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1839       <files>
1840         <!-- include folder / device header file -->
1841         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1842         <!-- startup / system file -->
1843         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1844         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1845         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1846         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1847         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1848       </files>
1849     </component>
1850     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1851       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1852       <files>
1853         <!-- include folder / device header file -->
1854         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1855         <!-- startup / system file -->
1856         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1857         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1858         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1859       </files>
1860     </component>
1861
1862     <!-- Cortex-M0+ -->
1863     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1864       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1865       <files>
1866         <!-- include folder / device header file -->
1867         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1868         <!-- startup / system file -->
1869         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1870         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1871         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1872         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1873         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1874       </files>
1875     </component>
1876     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1877       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1878       <files>
1879         <!-- include folder / device header file -->
1880         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1881         <!-- startup / system file -->
1882         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1883         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1884         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1885       </files>
1886     </component>
1887
1888     <!-- Cortex-M3 -->
1889     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1890       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1891       <files>
1892         <!-- include folder / device header file -->
1893         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1894         <!-- startup / system file -->
1895         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1896         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1897         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1898         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1899         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1900       </files>
1901     </component>
1902     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1903       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1904       <files>
1905         <!-- include folder / device header file -->
1906         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1907         <!-- startup / system file -->
1908         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1909         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1910         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1911       </files>
1912     </component>
1913
1914     <!-- Cortex-M4 -->
1915     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1916       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1917       <files>
1918         <!-- include folder / device header file -->
1919         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1920         <!-- startup / system file -->
1921         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1922         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1923         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1924         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1925         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1926       </files>
1927     </component>
1928     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1929       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1930       <files>
1931         <!-- include folder / device header file -->
1932         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1933         <!-- startup / system file -->
1934         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1935         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1936         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1937       </files>
1938     </component>
1939
1940     <!-- Cortex-M7 -->
1941     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1942       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1943       <files>
1944         <!-- include folder / device header file -->
1945         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1946         <!-- startup / system file -->
1947         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1948         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1949         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1950         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1951         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1952       </files>
1953     </component>
1954     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1955       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1956       <files>
1957         <!-- include folder / device header file -->
1958         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1959         <!-- startup / system file -->
1960         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1961         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1962         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1963       </files>
1964     </component>
1965
1966     <!-- Cortex-M23 -->
1967     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1968       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1969       <files>
1970         <!-- include folder / device header file -->
1971         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1972         <!-- startup / system file -->
1973         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1974         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1975         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1976         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1977         <!-- SAU configuration -->
1978         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1979       </files>
1980     </component>
1981     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1982       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1983       <files>
1984         <!-- include folder / device header file -->
1985         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1986         <!-- startup / system file -->
1987         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1988         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1989         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1990         <!-- SAU configuration -->
1991         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1992       </files>
1993     </component>
1994
1995     <!-- Cortex-M33 -->
1996     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM33 CMSIS">
1997       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1998       <files>
1999         <!-- include folder / device header file -->
2000         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2001         <!-- startup / system file -->
2002         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
2003         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
2004         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2005         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2006         <!-- SAU configuration -->
2007         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2008       </files>
2009     </component>
2010     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM33 CMSIS GCC">
2011       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2012       <files>
2013         <!-- include folder / device header file -->
2014         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2015         <!-- startup / system file -->
2016         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
2017         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2018         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"      version="1.0.0" attr="config"/>
2019         <!-- SAU configuration -->
2020         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2021       </files>
2022     </component>
2023
2024     <!-- Cortex-SC000 -->
2025     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
2026       <description>System and Startup for Generic ARM SC000 device</description>
2027       <files>
2028         <!-- include folder / device header file -->
2029         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2030         <!-- startup / system file -->
2031         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2032         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2033         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2034         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2035         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2036       </files>
2037     </component>
2038     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2039       <description>System and Startup for Generic ARM SC000 device</description>
2040       <files>
2041         <!-- include folder / device header file -->
2042         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2043         <!-- startup / system file -->
2044         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2045         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2046         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2047       </files>
2048     </component>
2049
2050     <!-- Cortex-SC300 -->
2051     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
2052       <description>System and Startup for Generic ARM SC300 device</description>
2053       <files>
2054         <!-- include folder / device header file -->
2055         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2056         <!-- startup / system file -->
2057         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2058         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2059         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2060         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2061         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2062       </files>
2063     </component>
2064     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2065       <description>System and Startup for Generic ARM SC300 device</description>
2066       <files>
2067         <!-- include folder / device header file -->
2068         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2069         <!-- startup / system file -->
2070         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2071         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2072         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2073       </files>
2074     </component>
2075
2076     <!-- ARMv8MBL -->
2077     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2078       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2079       <files>
2080         <!-- include folder / device header file -->
2081         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2082         <!-- startup / system file -->
2083         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2084         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2085         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2086         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2087         <!-- SAU configuration -->
2088         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2089       </files>
2090     </component>
2091     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2092       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2093       <files>
2094         <!-- include folder / device header file -->
2095         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2096         <!-- startup / system file -->
2097         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2098         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2099         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2100         <!-- SAU configuration -->
2101         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2102       </files>
2103     </component>
2104
2105     <!-- ARMv8MML -->
2106     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
2107       <description>System and Startup for Generic ARM ARMv8MML device</description>
2108       <files>
2109         <!-- include folder / device header file -->
2110         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2111         <!-- startup / system file -->
2112         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2113         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2114         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2115         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2116         <!-- SAU configuration -->
2117         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2118       </files>
2119     </component>
2120     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
2121       <description>System and Startup for Generic ARM ARMv8MML device</description>
2122       <files>
2123         <!-- include folder / device header file -->
2124         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2125         <!-- startup / system file -->
2126         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2127         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2128         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"      version="1.0.0" attr="config"/>
2129         <!-- SAU configuration -->
2130         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2131       </files>
2132     </component>
2133
2134
2135     <!-- CMSIS-DSP component -->
2136     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
2137       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2138       <files>
2139         <!-- CPU independent -->
2140         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2141         <file category="header" name="CMSIS/Include/arm_math.h"/>
2142
2143         <!-- CPU and Compiler dependent -->
2144         <!-- ARMCC -->
2145         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2146         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2147         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2148         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2149         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2150         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2151         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2152         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2153         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2154         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2155         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2156         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2157         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2158         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2159 <!--
2160         <file category="library" condition="CM23_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2161         <file category="library" condition="CM33_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2162         <file category="library" condition="CM33_DSP_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2163         <file category="library" condition="CM33_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2164         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2165         <file category="library" condition="ARMv8MBL_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2166         <file category="library" condition="ARMv8MML_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2167         <file category="library" condition="ARMv8MML_DSP_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2168         <file category="library" condition="ARMv8MML_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2169         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2170 -->
2171         <!-- GCC -->
2172         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2173         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2174         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2175         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2176         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2177         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2178         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2179 <!--
2180         <file category="library" condition="CM23_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2181         <file category="library" condition="CM33_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2182         <file category="library" condition="CM33_DSP_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2183         <file category="library" condition="CM33_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2184         <file category="library" condition="CM33_DSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2185         <file category="library" condition="ARMv8MBL_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2186         <file category="library" condition="ARMv8MML_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2187         <file category="library" condition="ARMv8MML_DSP_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2188         <file category="library" condition="ARMv8MML_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2189         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"   name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2190 -->
2191       </files>
2192     </component>
2193
2194     <!-- CMSIS-RTOS Keil RTX component -->
2195     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
2196       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2197       <RTE_Components_h>
2198         <!-- the following content goes into file 'RTE_Components.h' -->
2199         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2200         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2201       </RTE_Components_h>
2202       <files>
2203         <!-- CPU independent -->
2204         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2205         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2206         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2207
2208         <!-- RTX templates -->
2209         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2210         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2211         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2212         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2213         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2214         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2215         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2216         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2217         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2218         <!-- tool-chain specific template file -->
2219         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2220         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2221         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2222
2223         <!-- CPU and Compiler dependent -->
2224         <!-- ARMCC -->
2225         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2226         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2227         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2228         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2229         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2230         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2231         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2232         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2233         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2234         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2235         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2236         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2237         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2238         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2239         <!-- GCC -->
2240         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2241         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2242         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2243         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2244         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2245         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2246         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2247         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2248         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2249         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2250         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2251         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2252         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2253         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2254         <!-- IAR -->
2255         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2256         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2257         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2258         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2259         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2260         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2261         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2262         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2263         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2264         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2265         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2266         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2267       </files>
2268     </component>
2269
2270     <!-- CMSIS-RTOS Keil RTX5 component -->
2271     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0" Capiversion="1.0" condition="RTOS RTX5">
2272       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2273       <RTE_Components_h>
2274         <!-- the following content goes into file 'RTE_Components.h' -->
2275         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2276         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2277       </RTE_Components_h>
2278       <files>
2279         <!-- RTX header file -->
2280         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2281         <!-- RTX compatibility module for API V1 -->
2282         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2283       </files>
2284     </component>
2285
2286     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2287     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5">
2288       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2289       <RTE_Components_h>
2290         <!-- the following content goes into file 'RTE_Components.h' -->
2291         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2292         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2293       </RTE_Components_h>
2294       <files>
2295         <!-- RTX documentation -->
2296         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2297
2298         <!-- RTX header files -->
2299         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2300         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2301
2302         <!-- RTX configuration -->
2303         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2304
2305         <!-- RTX templates -->
2306         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"   select="CMSIS-RTOS 'main' function"/>
2307         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
2308         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2309
2310         <!-- RTX libraries (CPU and Compiler dependent) -->
2311         <!-- ARMCC -->
2312         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2313         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2314         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2315         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2316         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2317         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2318         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2319         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2320         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2321         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2322         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2323         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2324         <!-- GCC -->
2325         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2326         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2327         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2328         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2329         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2330         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2331         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2332         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2333         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2334         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2335         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2336         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2337       </files>
2338     </component>
2339     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5 NS">
2340       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2341       <RTE_Components_h>
2342         <!-- the following content goes into file 'RTE_Components.h' -->
2343         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2344         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2345         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2346       </RTE_Components_h>
2347       <files>
2348         <!-- RTX documentation -->
2349         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2350
2351         <!-- RTX header files -->
2352         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2353         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2354
2355         <!-- RTX configuration -->
2356         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2357
2358         <!-- RTX templates -->
2359         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"   select="CMSIS-RTOS 'main' function"/>
2360         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
2361         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2362
2363         <!-- RTX libraries (CPU and Compiler dependent) -->
2364         <!-- ARMCC -->
2365         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2366         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2367         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2368         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2369         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2370         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2371         <!-- GCC -->
2372         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2373         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2374         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2375         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2376         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2377         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2378       </files>
2379     </component>
2380     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5">
2381       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2382       <RTE_Components_h>
2383         <!-- the following content goes into file 'RTE_Components.h' -->
2384         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2385         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2386         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2387       </RTE_Components_h>
2388       <files>
2389         <!-- RTX documentation -->
2390         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2391
2392         <!-- RTX header files -->
2393         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2394         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2395
2396         <!-- RTX configuration -->
2397         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2398
2399         <!-- RTX templates -->
2400         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"   select="CMSIS-RTOS 'main' function"/>
2401         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
2402         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2403
2404         <!-- RTX sources (core) -->
2405         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2406         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2407         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2408         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2409         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2410         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2411         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2412         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2413         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2414         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2415         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2416         <!-- RTX sources (handlers ARMCC) -->
2417         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2418         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2419         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2420         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2421         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2422         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2423         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2424         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2425         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2426         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2427         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2428         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2429         <!-- RTX sources (handlers GCC) -->
2430         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s"         condition="CM0_GCC"/>
2431         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s"         condition="CM3_GCC"/>
2432         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s"         condition="CM4_GCC"/>
2433         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s"        condition="CM4_FP_GCC"/>
2434         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s"         condition="CM7_GCC"/>
2435         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s"        condition="CM7_FP_GCC"/>
2436         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.s"    condition="CM23_GCC"/>
2437         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.s"    condition="CM33_GCC"/>
2438         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.s" condition="CM33_FP_GCC"/>
2439         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.s"    condition="ARMv8MBL_GCC"/>
2440         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.s"    condition="ARMv8MML_GCC"/>
2441         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.s" condition="ARMv8MML_FP_GCC"/>
2442       </files>
2443     </component>
2444     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5 NS">
2445       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2446       <RTE_Components_h>
2447         <!-- the following content goes into file 'RTE_Components.h' -->
2448         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2449         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2450         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2451         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2452       </RTE_Components_h>
2453       <files>
2454         <!-- RTX documentation -->
2455         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2456
2457         <!-- RTX header files -->
2458         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2459         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2460
2461         <!-- RTX configuration -->
2462         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2463
2464         <!-- RTX templates -->
2465         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"   select="CMSIS-RTOS 'main' function"/>
2466         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
2467         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2468
2469         <!-- RTX sources (core) -->
2470         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2471         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2472         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2473         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2474         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2475         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2476         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2477         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2478         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2479         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2480         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2481         <!-- RTX sources (ARMCC handlers) -->
2482         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2483         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2484         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2485         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2486         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2487         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2488         <!-- RTX sources (GCC handlers) -->
2489         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.s"    condition="CM23_GCC"/>
2490         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.s"    condition="CM33_GCC"/>
2491         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.s" condition="CM33_FP_GCC"/>
2492         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.s"    condition="ARMv8MBL_GCC"/>
2493         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.s"    condition="ARMv8MML_GCC"/>
2494         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.s" condition="ARMv8MML_FP_GCC"/>
2495       </files>
2496     </component>
2497
2498   </components>
2499
2500   <boards>
2501     <board name="uVision Simulator" vendor="Keil">
2502       <description>uVision Simulator</description>
2503       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2504       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2505       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2506       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2507       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2508     </board>
2509   </boards>
2510
2511   <examples>
2512     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2513       <description>DSP_Lib Class Marks example</description>
2514       <board name="uVision Simulator" vendor="Keil"/>
2515       <project>
2516         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2517       </project>
2518       <attributes>
2519         <component Cclass="CMSIS" Cgroup="CORE"/>
2520         <component Cclass="CMSIS" Cgroup="DSP"/>
2521         <component Cclass="Device" Cgroup="Startup"/>
2522         <category>Getting Started</category>
2523       </attributes>
2524     </example>
2525
2526     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2527       <description>DSP_Lib Convolution example</description>
2528       <board name="uVision Simulator" vendor="Keil"/>
2529       <project>
2530         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2531       </project>
2532       <attributes>
2533         <component Cclass="CMSIS" Cgroup="CORE"/>
2534         <component Cclass="CMSIS" Cgroup="DSP"/>
2535         <component Cclass="Device" Cgroup="Startup"/>
2536         <category>Getting Started</category>
2537       </attributes>
2538     </example>
2539
2540     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2541       <description>DSP_Lib Dotproduct example</description>
2542       <board name="uVision Simulator" vendor="Keil"/>
2543       <project>
2544         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2545       </project>
2546       <attributes>
2547         <component Cclass="CMSIS" Cgroup="CORE"/>
2548         <component Cclass="CMSIS" Cgroup="DSP"/>
2549         <component Cclass="Device" Cgroup="Startup"/>
2550         <category>Getting Started</category>
2551       </attributes>
2552     </example>
2553
2554     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2555       <description>DSP_Lib FFT Bin example</description>
2556       <board name="uVision Simulator" vendor="Keil"/>
2557       <project>
2558         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2559       </project>
2560       <attributes>
2561         <component Cclass="CMSIS" Cgroup="CORE"/>
2562         <component Cclass="CMSIS" Cgroup="DSP"/>
2563         <component Cclass="Device" Cgroup="Startup"/>
2564         <category>Getting Started</category>
2565       </attributes>
2566     </example>
2567
2568     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2569       <description>DSP_Lib FIR example</description>
2570       <board name="uVision Simulator" vendor="Keil"/>
2571       <project>
2572         <environment name="uv" load="arm_fir_example.uvprojx"/>
2573       </project>
2574       <attributes>
2575         <component Cclass="CMSIS" Cgroup="CORE"/>
2576         <component Cclass="CMSIS" Cgroup="DSP"/>
2577         <component Cclass="Device" Cgroup="Startup"/>
2578         <category>Getting Started</category>
2579       </attributes>
2580     </example>
2581
2582     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2583       <description>DSP_Lib Graphic Equalizer example</description>
2584       <board name="uVision Simulator" vendor="Keil"/>
2585       <project>
2586         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2587       </project>
2588       <attributes>
2589         <component Cclass="CMSIS" Cgroup="CORE"/>
2590         <component Cclass="CMSIS" Cgroup="DSP"/>
2591         <component Cclass="Device" Cgroup="Startup"/>
2592         <category>Getting Started</category>
2593       </attributes>
2594     </example>
2595
2596     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2597       <description>DSP_Lib Linear Interpolation example</description>
2598       <board name="uVision Simulator" vendor="Keil"/>
2599       <project>
2600         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2601       </project>
2602       <attributes>
2603         <component Cclass="CMSIS" Cgroup="CORE"/>
2604         <component Cclass="CMSIS" Cgroup="DSP"/>
2605         <component Cclass="Device" Cgroup="Startup"/>
2606         <category>Getting Started</category>
2607       </attributes>
2608     </example>
2609
2610     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2611       <description>DSP_Lib Matrix example</description>
2612       <board name="uVision Simulator" vendor="Keil"/>
2613       <project>
2614         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2615       </project>
2616       <attributes>
2617         <component Cclass="CMSIS" Cgroup="CORE"/>
2618         <component Cclass="CMSIS" Cgroup="DSP"/>
2619         <component Cclass="Device" Cgroup="Startup"/>
2620         <category>Getting Started</category>
2621       </attributes>
2622     </example>
2623
2624     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2625       <description>DSP_Lib Signal Convergence example</description>
2626       <board name="uVision Simulator" vendor="Keil"/>
2627       <project>
2628         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2629       </project>
2630       <attributes>
2631         <component Cclass="CMSIS" Cgroup="CORE"/>
2632         <component Cclass="CMSIS" Cgroup="DSP"/>
2633         <component Cclass="Device" Cgroup="Startup"/>
2634         <category>Getting Started</category>
2635       </attributes>
2636     </example>
2637
2638     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2639       <description>DSP_Lib Sinus/Cosinus example</description>
2640       <board name="uVision Simulator" vendor="Keil"/>
2641       <project>
2642         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2643       </project>
2644       <attributes>
2645         <component Cclass="CMSIS" Cgroup="CORE"/>
2646         <component Cclass="CMSIS" Cgroup="DSP"/>
2647         <component Cclass="Device" Cgroup="Startup"/>
2648         <category>Getting Started</category>
2649       </attributes>
2650     </example>
2651
2652     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2653       <description>DSP_Lib Variance example</description>
2654       <board name="uVision Simulator" vendor="Keil"/>
2655       <project>
2656         <environment name="uv" load="arm_variance_example.uvprojx"/>
2657       </project>
2658       <attributes>
2659         <component Cclass="CMSIS" Cgroup="CORE"/>
2660         <component Cclass="CMSIS" Cgroup="DSP"/>
2661         <component Cclass="Device" Cgroup="Startup"/>
2662         <category>Getting Started</category>
2663       </attributes>
2664     </example>
2665
2666     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2667       <description>CMSIS-RTOS2 Blinky example</description>
2668       <board name="uVision Simulator" vendor="Keil"/>
2669       <project>
2670         <environment name="uv" load="Blinky.uvprojx"/>
2671       </project>
2672       <attributes>
2673         <component Cclass="CMSIS" Cgroup="CORE"/>
2674         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2675         <component Cclass="Device" Cgroup="Startup"/>
2676         <category>Getting Started</category>
2677       </attributes>
2678     </example>
2679
2680     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2681       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2682       <board name="uVision Simulator" vendor="Keil"/>
2683       <project>
2684         <environment name="uv" load="Blinky.uvprojx"/>
2685       </project>
2686       <attributes>
2687         <component Cclass="CMSIS" Cgroup="CORE"/>
2688         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2689         <component Cclass="Device" Cgroup="Startup"/>
2690         <category>Getting Started</category>
2691       </attributes>
2692     </example>
2693
2694     <example name="Trustzone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2695       <description>Bare-metal secure/non-secure example without RTOS</description>
2696       <board name="uVision Simulator" vendor="Keil"/>
2697       <project>
2698         <environment name="uv" load="NoRTOS.uvmpw"/>
2699       </project>
2700       <attributes>
2701         <component Cclass="CMSIS" Cgroup="CORE"/>
2702         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2703         <component Cclass="Device" Cgroup="Startup"/>
2704         <category>Getting Started</category>
2705       </attributes>
2706     </example>
2707
2708     <example name="Trustzone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2709       <description>Secure/non-secure RTOS example with thread context management</description>
2710       <board name="uVision Simulator" vendor="Keil"/>
2711       <project>
2712         <environment name="uv" load="RTOS.uvmpw"/>
2713       </project>
2714       <attributes>
2715         <component Cclass="CMSIS" Cgroup="CORE"/>
2716         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2717         <component Cclass="Device" Cgroup="Startup"/>
2718         <category>Getting Started</category>
2719       </attributes>
2720     </example>
2721
2722   </examples>
2723
2724 </package>