begriffs open source - cmsis/blob - dev/v6.0.0-dev84/Core/group__pmu8__events__armcm85.html

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 126 <div class="header">
 127   <div class="summary">
 128 <a href="#define-members">Macros</a>  </div>
 129   <div class="headertitle"><div class="title">PMU Events for Cortex-M85<div class="ingroups"><a class="el" href="group__pmu8__functions.html">PMU Functions for Armv8.1-M</a></div></div></div>
 130 </div><!--header-->
 131 <div class="contents">
 132
 133 <p>IDs for additional events defined for Cortex-M85.
 134 <a href="#details">More...</a></p>
 135 <table class="memberdecls">
 136 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
 137 Macros</h2></td></tr>
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 139 <tr class="memdesc:gae70f7f317a52afd5731c0ff0c3ff9c05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error.  <br /></td></tr>
 140 <tr class="separator:gae70f7f317a52afd5731c0ff0c3ff9c05"><td class="memSeparator" colspan="2">&#160;</td></tr>
 141 <tr class="memitem:ga87416ca50213e93d39c7f3653a51cbf0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga87416ca50213e93d39c7f3653a51cbf0">ARMCM85_PMU_ECC_ERR_MBIT</a>&#160;&#160;&#160;0xC001</td></tr>
 142 <tr class="memdesc:ga87416ca50213e93d39c7f3653a51cbf0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any multi-bit ECC error.  <br /></td></tr>
 143 <tr class="separator:ga87416ca50213e93d39c7f3653a51cbf0"><td class="memSeparator" colspan="2">&#160;</td></tr>
 144 <tr class="memitem:ga020d8f50262e33a2826c814ad12783ca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga020d8f50262e33a2826c814ad12783ca">ARMCM85_PMU_ECC_ERR_DCACHE</a>&#160;&#160;&#160;0xC010</td></tr>
 145 <tr class="memdesc:ga020d8f50262e33a2826c814ad12783ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the data cache.  <br /></td></tr>
 146 <tr class="separator:ga020d8f50262e33a2826c814ad12783ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
 147 <tr class="memitem:ga581a5faed9ba8cc8f2221bde40c86451"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga581a5faed9ba8cc8f2221bde40c86451">ARMCM85_PMU_ECC_ERR_ICACHE</a>&#160;&#160;&#160;0xC011</td></tr>
 148 <tr class="memdesc:ga581a5faed9ba8cc8f2221bde40c86451"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the instruction cache.  <br /></td></tr>
 149 <tr class="separator:ga581a5faed9ba8cc8f2221bde40c86451"><td class="memSeparator" colspan="2">&#160;</td></tr>
 150 <tr class="memitem:gaa7d0a66f89539bee090a467ed129c976"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gaa7d0a66f89539bee090a467ed129c976">ARMCM85_PMU_ECC_ERR_MBIT_DCACHE</a>&#160;&#160;&#160;0xC012</td></tr>
 151 <tr class="memdesc:gaa7d0a66f89539bee090a467ed129c976"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any multi-bit ECC error in the data cache.  <br /></td></tr>
 152 <tr class="separator:gaa7d0a66f89539bee090a467ed129c976"><td class="memSeparator" colspan="2">&#160;</td></tr>
 153 <tr class="memitem:gaadd9a38aa7faace5377f218adaa43bfa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gaadd9a38aa7faace5377f218adaa43bfa">ARMCM85_PMU_ECC_ERR_MBIT_ICACHE</a>&#160;&#160;&#160;0xC013</td></tr>
 154 <tr class="memdesc:gaadd9a38aa7faace5377f218adaa43bfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any multi-biy ECC error in the instruction cache.  <br /></td></tr>
 155 <tr class="separator:gaadd9a38aa7faace5377f218adaa43bfa"><td class="memSeparator" colspan="2">&#160;</td></tr>
 156 <tr class="memitem:gac70ea7660a83ea28497a7bda50de3047"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gac70ea7660a83ea28497a7bda50de3047">ARMCM85_PMU_ECC_ERR_DTCM</a>&#160;&#160;&#160;0xC020</td></tr>
 157 <tr class="memdesc:gac70ea7660a83ea28497a7bda50de3047"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the DTCM.  <br /></td></tr>
 158 <tr class="separator:gac70ea7660a83ea28497a7bda50de3047"><td class="memSeparator" colspan="2">&#160;</td></tr>
 159 <tr class="memitem:gaa4cd5104cb4dc96fc0921bc419fd8bcb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gaa4cd5104cb4dc96fc0921bc419fd8bcb">ARMCM85_PMU_ECC_ERR_ITCM</a>&#160;&#160;&#160;0xC021</td></tr>
 160 <tr class="memdesc:gaa4cd5104cb4dc96fc0921bc419fd8bcb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the ITCM.  <br /></td></tr>
 161 <tr class="separator:gaa4cd5104cb4dc96fc0921bc419fd8bcb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 162 <tr class="memitem:gab47c7d27f850255dfb36f900f7e73662"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gab47c7d27f850255dfb36f900f7e73662">ARMCM85_PMU_ECC_ERR_MBIT_DTCM</a>&#160;&#160;&#160;0xC022</td></tr>
 163 <tr class="memdesc:gab47c7d27f850255dfb36f900f7e73662"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any multi-bit ECC error in the DTCM.  <br /></td></tr>
 164 <tr class="separator:gab47c7d27f850255dfb36f900f7e73662"><td class="memSeparator" colspan="2">&#160;</td></tr>
 165 <tr class="memitem:ga8d021fffa9fc925f9a4003e6fa2aa763"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga8d021fffa9fc925f9a4003e6fa2aa763">ARMCM85_PMU_ECC_ERR_MBIT_ITCM</a>&#160;&#160;&#160;0xC023</td></tr>
 166 <tr class="memdesc:ga8d021fffa9fc925f9a4003e6fa2aa763"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any multi-bit ECC error in the ITCM.  <br /></td></tr>
 167 <tr class="separator:ga8d021fffa9fc925f9a4003e6fa2aa763"><td class="memSeparator" colspan="2">&#160;</td></tr>
 168 <tr class="memitem:ga32b75485bd63ce7721ce2b6d97299969"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga32b75485bd63ce7721ce2b6d97299969">ARMCM85_PMU_PF_LINEFILL</a>&#160;&#160;&#160;0xC100</td></tr>
 169 <tr class="memdesc:ga32b75485bd63ce7721ce2b6d97299969"><td class="mdescLeft">&#160;</td><td class="mdescRight">A prefetcher starts a line-fill.  <br /></td></tr>
 170 <tr class="separator:ga32b75485bd63ce7721ce2b6d97299969"><td class="memSeparator" colspan="2">&#160;</td></tr>
 171 <tr class="memitem:gad97c2ebda3f9ed6b056927757a5d14f5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gad97c2ebda3f9ed6b056927757a5d14f5">ARMCM85_PMU_PF_CANCEL</a>&#160;&#160;&#160;0xC101</td></tr>
 172 <tr class="memdesc:gad97c2ebda3f9ed6b056927757a5d14f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">A prefetcher stops prefetching.  <br /></td></tr>
 173 <tr class="separator:gad97c2ebda3f9ed6b056927757a5d14f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 174 <tr class="memitem:gaa3c0cd7a15352eeb562948e32a000d28"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gaa3c0cd7a15352eeb562948e32a000d28">ARMCM85_PMU_PF_DROP_LINEFILL</a>&#160;&#160;&#160;0xC102</td></tr>
 175 <tr class="memdesc:gaa3c0cd7a15352eeb562948e32a000d28"><td class="mdescLeft">&#160;</td><td class="mdescRight">A linefill triggered by a prefetcher has been dropped because of lack of buffering.  <br /></td></tr>
 176 <tr class="separator:gaa3c0cd7a15352eeb562948e32a000d28"><td class="memSeparator" colspan="2">&#160;</td></tr>
 177 <tr class="memitem:gaf35276be353571bce8ebc14853836ec3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gaf35276be353571bce8ebc14853836ec3">ARMCM85_PMU_NWAMODE_ENTER</a>&#160;&#160;&#160;0xC200</td></tr>
 178 <tr class="memdesc:gaf35276be353571bce8ebc14853836ec3"><td class="mdescLeft">&#160;</td><td class="mdescRight">No write-allocate mode entry.  <br /></td></tr>
 179 <tr class="separator:gaf35276be353571bce8ebc14853836ec3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 180 <tr class="memitem:gac1a47ab7540fcb40c2b815ffd82ec824"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gac1a47ab7540fcb40c2b815ffd82ec824">ARMCM85_PMU_NWAMODE</a>&#160;&#160;&#160;0xC201</td></tr>
 181 <tr class="memdesc:gac1a47ab7540fcb40c2b815ffd82ec824"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write-allocate store is not allocated into the data cache due to no-write-allocate mode.  <br /></td></tr>
 182 <tr class="separator:gac1a47ab7540fcb40c2b815ffd82ec824"><td class="memSeparator" colspan="2">&#160;</td></tr>
 183 <tr class="memitem:gad0bb2c5de55106be371e98863f89eef6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gad0bb2c5de55106be371e98863f89eef6">ARMCM85_PMU_SAHB_ACCESS</a>&#160;&#160;&#160;0xC300</td></tr>
 184 <tr class="memdesc:gad0bb2c5de55106be371e98863f89eef6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read or write access on the S-AHB interface to the TCM.  <br /></td></tr>
 185 <tr class="separator:gad0bb2c5de55106be371e98863f89eef6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 186 <tr class="memitem:ga5ec8b67556e5864e42e49f369db8c380"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga5ec8b67556e5864e42e49f369db8c380">ARMCM85_PMU_PAHB_ACCESS</a>&#160;&#160;&#160;0xC301</td></tr>
 187 <tr class="memdesc:ga5ec8b67556e5864e42e49f369db8c380"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read or write access on the P-AHB interface.  <br /></td></tr>
 188 <tr class="separator:ga5ec8b67556e5864e42e49f369db8c380"><td class="memSeparator" colspan="2">&#160;</td></tr>
 189 <tr class="memitem:ga572f1199d3b92b6dcbe81eb041894e56"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga572f1199d3b92b6dcbe81eb041894e56">ARMCM85_PMU_AXI_WRITE_ACCESS</a>&#160;&#160;&#160;0xC302</td></tr>
 190 <tr class="memdesc:ga572f1199d3b92b6dcbe81eb041894e56"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any beat access to M-AXI write interface <br  />
 191   <br /></td></tr>
 192 <tr class="separator:ga572f1199d3b92b6dcbe81eb041894e56"><td class="memSeparator" colspan="2">&#160;</td></tr>
 193 <tr class="memitem:ga69917e08b8f2f6cba809a715f437f21b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga69917e08b8f2f6cba809a715f437f21b">ARMCM85_PMU_AXI_READ_ACCESS</a>&#160;&#160;&#160;0xC303</td></tr>
 194 <tr class="memdesc:ga69917e08b8f2f6cba809a715f437f21b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any beat access to M-AXI read interface.  <br /></td></tr>
 195 <tr class="separator:ga69917e08b8f2f6cba809a715f437f21b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 196 <tr class="memitem:gae3c87b378d4c60d45f856f1d7b40016f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gae3c87b378d4c60d45f856f1d7b40016f">ARMCM85_PMU_DOSTIMEOUT_DOUBLE</a>&#160;&#160;&#160;0xC400</td></tr>
 197 <tr class="memdesc:gae3c87b378d4c60d45f856f1d7b40016f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress.  <br /></td></tr>
 198 <tr class="separator:gae3c87b378d4c60d45f856f1d7b40016f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 199 <tr class="memitem:ga0da0d8e33124fdad9ddf6e30593984d4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga0da0d8e33124fdad9ddf6e30593984d4">ARMCM85_PMU_DOSTIMEOUT_TRIPLE</a>&#160;&#160;&#160;0xC401</td></tr>
 200 <tr class="memdesc:ga0da0d8e33124fdad9ddf6e30593984d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Denial of Service timeout has fired three times and blocked the LSU to force forward progress.  <br /></td></tr>
 201 <tr class="separator:ga0da0d8e33124fdad9ddf6e30593984d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 202 </table>
 203 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 204 <p>IDs for additional events defined for Cortex-M85. </p>
 205 <p>These events are available on a Cortex-M85 device including a PMU. </p>
 206 <h2 class="groupheader">Macro Definition Documentation</h2>
 207 <a id="ga69917e08b8f2f6cba809a715f437f21b" name="ga69917e08b8f2f6cba809a715f437f21b"></a>
 208 <h2 class="memtitle"><span class="permalink"><a href="#ga69917e08b8f2f6cba809a715f437f21b">&#9670;&#160;</a></span>ARMCM85_PMU_AXI_READ_ACCESS</h2>
 209
 210 <div class="memitem">
 211 <div class="memproto">
 212       <table class="memname">
 213         <tr>
 214           <td class="memname">#define ARMCM85_PMU_AXI_READ_ACCESS&#160;&#160;&#160;0xC303</td>
 215         </tr>
 216       </table>
 217 </div><div class="memdoc">
 218
 219 <p>Any beat access to M-AXI read interface. </p>
 220
 221 </div>
 222 </div>
 223 <a id="ga572f1199d3b92b6dcbe81eb041894e56" name="ga572f1199d3b92b6dcbe81eb041894e56"></a>
 224 <h2 class="memtitle"><span class="permalink"><a href="#ga572f1199d3b92b6dcbe81eb041894e56">&#9670;&#160;</a></span>ARMCM85_PMU_AXI_WRITE_ACCESS</h2>
 225
 226 <div class="memitem">
 227 <div class="memproto">
 228       <table class="memname">
 229         <tr>
 230           <td class="memname">#define ARMCM85_PMU_AXI_WRITE_ACCESS&#160;&#160;&#160;0xC302</td>
 231         </tr>
 232       </table>
 233 </div><div class="memdoc">
 234
 235 <p>Any beat access to M-AXI write interface <br  />
 236  </p>
 237
 238 </div>
 239 </div>
 240 <a id="gae3c87b378d4c60d45f856f1d7b40016f" name="gae3c87b378d4c60d45f856f1d7b40016f"></a>
 241 <h2 class="memtitle"><span class="permalink"><a href="#gae3c87b378d4c60d45f856f1d7b40016f">&#9670;&#160;</a></span>ARMCM85_PMU_DOSTIMEOUT_DOUBLE</h2>
 242
 243 <div class="memitem">
 244 <div class="memproto">
 245       <table class="memname">
 246         <tr>
 247           <td class="memname">#define ARMCM85_PMU_DOSTIMEOUT_DOUBLE&#160;&#160;&#160;0xC400</td>
 248         </tr>
 249       </table>
 250 </div><div class="memdoc">
 251
 252 <p>Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress. </p>
 253
 254 </div>
 255 </div>
 256 <a id="ga0da0d8e33124fdad9ddf6e30593984d4" name="ga0da0d8e33124fdad9ddf6e30593984d4"></a>
 257 <h2 class="memtitle"><span class="permalink"><a href="#ga0da0d8e33124fdad9ddf6e30593984d4">&#9670;&#160;</a></span>ARMCM85_PMU_DOSTIMEOUT_TRIPLE</h2>
 258
 259 <div class="memitem">
 260 <div class="memproto">
 261       <table class="memname">
 262         <tr>
 263           <td class="memname">#define ARMCM85_PMU_DOSTIMEOUT_TRIPLE&#160;&#160;&#160;0xC401</td>
 264         </tr>
 265       </table>
 266 </div><div class="memdoc">
 267
 268 <p>Denial of Service timeout has fired three times and blocked the LSU to force forward progress. </p>
 269
 270 </div>
 271 </div>
 272 <a id="gae70f7f317a52afd5731c0ff0c3ff9c05" name="gae70f7f317a52afd5731c0ff0c3ff9c05"></a>
 273 <h2 class="memtitle"><span class="permalink"><a href="#gae70f7f317a52afd5731c0ff0c3ff9c05">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR</h2>
 274
 275 <div class="memitem">
 276 <div class="memproto">
 277       <table class="memname">
 278         <tr>
 279           <td class="memname">#define ARMCM85_PMU_ECC_ERR&#160;&#160;&#160;0xC000</td>
 280         </tr>
 281       </table>
 282 </div><div class="memdoc">
 283
 284 <p>Any ECC error. </p>
 285
 286 </div>
 287 </div>
 288 <a id="ga020d8f50262e33a2826c814ad12783ca" name="ga020d8f50262e33a2826c814ad12783ca"></a>
 289 <h2 class="memtitle"><span class="permalink"><a href="#ga020d8f50262e33a2826c814ad12783ca">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_DCACHE</h2>
 290
 291 <div class="memitem">
 292 <div class="memproto">
 293       <table class="memname">
 294         <tr>
 295           <td class="memname">#define ARMCM85_PMU_ECC_ERR_DCACHE&#160;&#160;&#160;0xC010</td>
 296         </tr>
 297       </table>
 298 </div><div class="memdoc">
 299
 300 <p>Any ECC error in the data cache. </p>
 301
 302 </div>
 303 </div>
 304 <a id="gac70ea7660a83ea28497a7bda50de3047" name="gac70ea7660a83ea28497a7bda50de3047"></a>
 305 <h2 class="memtitle"><span class="permalink"><a href="#gac70ea7660a83ea28497a7bda50de3047">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_DTCM</h2>
 306
 307 <div class="memitem">
 308 <div class="memproto">
 309       <table class="memname">
 310         <tr>
 311           <td class="memname">#define ARMCM85_PMU_ECC_ERR_DTCM&#160;&#160;&#160;0xC020</td>
 312         </tr>
 313       </table>
 314 </div><div class="memdoc">
 315
 316 <p>Any ECC error in the DTCM. </p>
 317
 318 </div>
 319 </div>
 320 <a id="ga581a5faed9ba8cc8f2221bde40c86451" name="ga581a5faed9ba8cc8f2221bde40c86451"></a>
 321 <h2 class="memtitle"><span class="permalink"><a href="#ga581a5faed9ba8cc8f2221bde40c86451">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_ICACHE</h2>
 322
 323 <div class="memitem">
 324 <div class="memproto">
 325       <table class="memname">
 326         <tr>
 327           <td class="memname">#define ARMCM85_PMU_ECC_ERR_ICACHE&#160;&#160;&#160;0xC011</td>
 328         </tr>
 329       </table>
 330 </div><div class="memdoc">
 331
 332 <p>Any ECC error in the instruction cache. </p>
 333
 334 </div>
 335 </div>
 336 <a id="gaa4cd5104cb4dc96fc0921bc419fd8bcb" name="gaa4cd5104cb4dc96fc0921bc419fd8bcb"></a>
 337 <h2 class="memtitle"><span class="permalink"><a href="#gaa4cd5104cb4dc96fc0921bc419fd8bcb">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_ITCM</h2>
 338
 339 <div class="memitem">
 340 <div class="memproto">
 341       <table class="memname">
 342         <tr>
 343           <td class="memname">#define ARMCM85_PMU_ECC_ERR_ITCM&#160;&#160;&#160;0xC021</td>
 344         </tr>
 345       </table>
 346 </div><div class="memdoc">
 347
 348 <p>Any ECC error in the ITCM. </p>
 349
 350 </div>
 351 </div>
 352 <a id="ga87416ca50213e93d39c7f3653a51cbf0" name="ga87416ca50213e93d39c7f3653a51cbf0"></a>
 353 <h2 class="memtitle"><span class="permalink"><a href="#ga87416ca50213e93d39c7f3653a51cbf0">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_MBIT</h2>
 354
 355 <div class="memitem">
 356 <div class="memproto">
 357       <table class="memname">
 358         <tr>
 359           <td class="memname">#define ARMCM85_PMU_ECC_ERR_MBIT&#160;&#160;&#160;0xC001</td>
 360         </tr>
 361       </table>
 362 </div><div class="memdoc">
 363
 364 <p>Any multi-bit ECC error. </p>
 365
 366 </div>
 367 </div>
 368 <a id="gaa7d0a66f89539bee090a467ed129c976" name="gaa7d0a66f89539bee090a467ed129c976"></a>
 369 <h2 class="memtitle"><span class="permalink"><a href="#gaa7d0a66f89539bee090a467ed129c976">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_MBIT_DCACHE</h2>
 370
 371 <div class="memitem">
 372 <div class="memproto">
 373       <table class="memname">
 374         <tr>
 375           <td class="memname">#define ARMCM85_PMU_ECC_ERR_MBIT_DCACHE&#160;&#160;&#160;0xC012</td>
 376         </tr>
 377       </table>
 378 </div><div class="memdoc">
 379
 380 <p>Any multi-bit ECC error in the data cache. </p>
 381
 382 </div>
 383 </div>
 384 <a id="gab47c7d27f850255dfb36f900f7e73662" name="gab47c7d27f850255dfb36f900f7e73662"></a>
 385 <h2 class="memtitle"><span class="permalink"><a href="#gab47c7d27f850255dfb36f900f7e73662">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_MBIT_DTCM</h2>
 386
 387 <div class="memitem">
 388 <div class="memproto">
 389       <table class="memname">
 390         <tr>
 391           <td class="memname">#define ARMCM85_PMU_ECC_ERR_MBIT_DTCM&#160;&#160;&#160;0xC022</td>
 392         </tr>
 393       </table>
 394 </div><div class="memdoc">
 395
 396 <p>Any multi-bit ECC error in the DTCM. </p>
 397
 398 </div>
 399 </div>
 400 <a id="gaadd9a38aa7faace5377f218adaa43bfa" name="gaadd9a38aa7faace5377f218adaa43bfa"></a>
 401 <h2 class="memtitle"><span class="permalink"><a href="#gaadd9a38aa7faace5377f218adaa43bfa">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_MBIT_ICACHE</h2>
 402
 403 <div class="memitem">
 404 <div class="memproto">
 405       <table class="memname">
 406         <tr>
 407           <td class="memname">#define ARMCM85_PMU_ECC_ERR_MBIT_ICACHE&#160;&#160;&#160;0xC013</td>
 408         </tr>
 409       </table>
 410 </div><div class="memdoc">
 411
 412 <p>Any multi-biy ECC error in the instruction cache. </p>
 413
 414 </div>
 415 </div>
 416 <a id="ga8d021fffa9fc925f9a4003e6fa2aa763" name="ga8d021fffa9fc925f9a4003e6fa2aa763"></a>
 417 <h2 class="memtitle"><span class="permalink"><a href="#ga8d021fffa9fc925f9a4003e6fa2aa763">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_MBIT_ITCM</h2>
 418
 419 <div class="memitem">
 420 <div class="memproto">
 421       <table class="memname">
 422         <tr>
 423           <td class="memname">#define ARMCM85_PMU_ECC_ERR_MBIT_ITCM&#160;&#160;&#160;0xC023</td>
 424         </tr>
 425       </table>
 426 </div><div class="memdoc">
 427
 428 <p>Any multi-bit ECC error in the ITCM. </p>
 429
 430 </div>
 431 </div>
 432 <a id="gac1a47ab7540fcb40c2b815ffd82ec824" name="gac1a47ab7540fcb40c2b815ffd82ec824"></a>
 433 <h2 class="memtitle"><span class="permalink"><a href="#gac1a47ab7540fcb40c2b815ffd82ec824">&#9670;&#160;</a></span>ARMCM85_PMU_NWAMODE</h2>
 434
 435 <div class="memitem">
 436 <div class="memproto">
 437       <table class="memname">
 438         <tr>
 439           <td class="memname">#define ARMCM85_PMU_NWAMODE&#160;&#160;&#160;0xC201</td>
 440         </tr>
 441       </table>
 442 </div><div class="memdoc">
 443
 444 <p>Write-allocate store is not allocated into the data cache due to no-write-allocate mode. </p>
 445
 446 </div>
 447 </div>
 448 <a id="gaf35276be353571bce8ebc14853836ec3" name="gaf35276be353571bce8ebc14853836ec3"></a>
 449 <h2 class="memtitle"><span class="permalink"><a href="#gaf35276be353571bce8ebc14853836ec3">&#9670;&#160;</a></span>ARMCM85_PMU_NWAMODE_ENTER</h2>
 450
 451 <div class="memitem">
 452 <div class="memproto">
 453       <table class="memname">
 454         <tr>
 455           <td class="memname">#define ARMCM85_PMU_NWAMODE_ENTER&#160;&#160;&#160;0xC200</td>
 456         </tr>
 457       </table>
 458 </div><div class="memdoc">
 459
 460 <p>No write-allocate mode entry. </p>
 461
 462 </div>
 463 </div>
 464 <a id="ga5ec8b67556e5864e42e49f369db8c380" name="ga5ec8b67556e5864e42e49f369db8c380"></a>
 465 <h2 class="memtitle"><span class="permalink"><a href="#ga5ec8b67556e5864e42e49f369db8c380">&#9670;&#160;</a></span>ARMCM85_PMU_PAHB_ACCESS</h2>
 466
 467 <div class="memitem">
 468 <div class="memproto">
 469       <table class="memname">
 470         <tr>
 471           <td class="memname">#define ARMCM85_PMU_PAHB_ACCESS&#160;&#160;&#160;0xC301</td>
 472         </tr>
 473       </table>
 474 </div><div class="memdoc">
 475
 476 <p>Read or write access on the P-AHB interface. </p>
 477
 478 </div>
 479 </div>
 480 <a id="gad97c2ebda3f9ed6b056927757a5d14f5" name="gad97c2ebda3f9ed6b056927757a5d14f5"></a>
 481 <h2 class="memtitle"><span class="permalink"><a href="#gad97c2ebda3f9ed6b056927757a5d14f5">&#9670;&#160;</a></span>ARMCM85_PMU_PF_CANCEL</h2>
 482
 483 <div class="memitem">
 484 <div class="memproto">
 485       <table class="memname">
 486         <tr>
 487           <td class="memname">#define ARMCM85_PMU_PF_CANCEL&#160;&#160;&#160;0xC101</td>
 488         </tr>
 489       </table>
 490 </div><div class="memdoc">
 491
 492 <p>A prefetcher stops prefetching. </p>
 493
 494 </div>
 495 </div>
 496 <a id="gaa3c0cd7a15352eeb562948e32a000d28" name="gaa3c0cd7a15352eeb562948e32a000d28"></a>
 497 <h2 class="memtitle"><span class="permalink"><a href="#gaa3c0cd7a15352eeb562948e32a000d28">&#9670;&#160;</a></span>ARMCM85_PMU_PF_DROP_LINEFILL</h2>
 498
 499 <div class="memitem">
 500 <div class="memproto">
 501       <table class="memname">
 502         <tr>
 503           <td class="memname">#define ARMCM85_PMU_PF_DROP_LINEFILL&#160;&#160;&#160;0xC102</td>
 504         </tr>
 505       </table>
 506 </div><div class="memdoc">
 507
 508 <p>A linefill triggered by a prefetcher has been dropped because of lack of buffering. </p>
 509
 510 </div>
 511 </div>
 512 <a id="ga32b75485bd63ce7721ce2b6d97299969" name="ga32b75485bd63ce7721ce2b6d97299969"></a>
 513 <h2 class="memtitle"><span class="permalink"><a href="#ga32b75485bd63ce7721ce2b6d97299969">&#9670;&#160;</a></span>ARMCM85_PMU_PF_LINEFILL</h2>
 514
 515 <div class="memitem">
 516 <div class="memproto">
 517       <table class="memname">
 518         <tr>
 519           <td class="memname">#define ARMCM85_PMU_PF_LINEFILL&#160;&#160;&#160;0xC100</td>
 520         </tr>
 521       </table>
 522 </div><div class="memdoc">
 523
 524 <p>A prefetcher starts a line-fill. </p>
 525
 526 </div>
 527 </div>
 528 <a id="gad0bb2c5de55106be371e98863f89eef6" name="gad0bb2c5de55106be371e98863f89eef6"></a>
 529 <h2 class="memtitle"><span class="permalink"><a href="#gad0bb2c5de55106be371e98863f89eef6">&#9670;&#160;</a></span>ARMCM85_PMU_SAHB_ACCESS</h2>
 530
 531 <div class="memitem">
 532 <div class="memproto">
 533       <table class="memname">
 534         <tr>
 535           <td class="memname">#define ARMCM85_PMU_SAHB_ACCESS&#160;&#160;&#160;0xC300</td>
 536         </tr>
 537       </table>
 538 </div><div class="memdoc">
 539
 540 <p>Read or write access on the S-AHB interface to the TCM. </p>
 541
 542 </div>
 543 </div>
 544 </div><!-- contents -->
 545 </div><!-- doc-content -->
 546 <!-- start footer part -->
 547 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
 548   <ul>
 549     <li class="footer">
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