begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.5.0-rc0" release="2019-03-15">
  12       The following folders have been removed:
  13         - CMSIS/Include/
  14         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/Lib/)
  15
  16       CMSIS-Core(M): 5.2.0 (see revision history for details)
  17         - Reworked Stack/Heap configuration for ARM startup files.
  18         - Added Cortex-M35P device support.
  19         - Added generic Armv8.1-M Mainline device support.
  20       CMSIS-Core(A): 1.1.3 (see revision history for details)
  21       CMSIS-DSP: 1.5.5 (see revision history for details)
  22         - reworked DSP library source files
  23           * added macro ARM_MATH_LOOPUNROLL
  24           * removed macro UNALIGNED_SUPPORT_DISABLE
  25           * replaced arm_bitreversal2.S with C version
  26           * added const-correctness
  27           * replaced SIMD pointer construct with memcpy solution
  28         - reworked DSP library documentation
  29         - moved DSP libraries to folder ./DSP/Lib
  30         - ARM DSP Libraries are built with ARMCLANG
  31         - Added DSP Libraries Source variant
  32       CMSIS-RTOS2:
  33         - RTX 5.5.0 (see revision history for details)
  34       CMSIS-Driver: 2.6.1
  35         - Added WiFi Driver API 1.0.0-beta
  36         - Added components for project specific driver implementations
  37       CMSIS-Pack: 1.6.0 (see revision history for details)
  38       Utilities:
  39         - SVDConv 3.3.25
  40         - PackChk 1.3.82
  41     </release>
  42     <release version="5.4.0" date="2018-08-01">
  43       Aligned pack structure with repository.
  44       The following folders are deprecated:
  45         - CMSIS/Include/
  46         - CMSIS/DSP_Lib/
  47
  48       CMSIS-Core(M): 5.1.2 (see revision history for details)
  49         - Added Cortex-M1 support (beta).
  50       CMSIS-Core(A): 1.1.2 (see revision history for details)
  51       CMSIS-NN: 1.1.0
  52         - Added new math functions.
  53       CMSIS-RTOS2:
  54         - API 2.1.3 (see revision history for details)
  55         - RTX 5.4.0 (see revision history for details)
  56           * Updated exception handling on Cortex-A
  57       CMSIS-Driver:
  58         - Flash Driver API V2.2.0
  59       Utilities:
  60         - SVDConv 3.3.21
  61         - PackChk 1.3.71
  62     </release>
  63     <release version="5.3.0" date="2018-02-22">
  64       Updated Arm company brand.
  65       CMSIS-Core(M): 5.1.1 (see revision history for details)
  66       CMSIS-Core(A): 1.1.1 (see revision history for details)
  67       CMSIS-DAP: 2.0.0 (see revision history for details)
  68       CMSIS-NN: 1.0.0
  69         - Initial contribution of the bare metal Neural Network Library.
  70       CMSIS-RTOS2:
  71         - RTX 5.3.0 (see revision history for details)
  72         - OS Tick API 1.0.1
  73     </release>
  74     <release version="5.2.0" date="2017-11-16">
  75       CMSIS-Core(M): 5.1.0 (see revision history for details)
  76         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  77         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  78       CMSIS-Core(A): 1.1.0 (see revision history for details)
  79         - Added compiler_iccarm.h.
  80         - Added additional access functions for physical timer.
  81       CMSIS-DAP: 1.2.0 (see revision history for details)
  82       CMSIS-DSP: 1.5.2 (see revision history for details)
  83       CMSIS-Driver: 2.6.0 (see revision history for details)
  84         - CAN Driver API V1.2.0
  85         - NAND Driver API V2.3.0
  86       CMSIS-RTOS:
  87         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  88       CMSIS-RTOS2:
  89         - API 2.1.2 (see revision history for details)
  90         - RTX 5.2.3 (see revision history for details)
  91       Devices:
  92         - Added GCC startup and linker script for Cortex-A9.
  93         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  94         - Added IAR startup code for Cortex-A9
  95     </release>
  96     <release version="5.1.1" date="2017-09-19">
  97       CMSIS-RTOS2:
  98       - RTX 5.2.1 (see revision history for details)
  99     </release>
 100     <release version="5.1.0" date="2017-08-04">
 101       CMSIS-Core(M): 5.0.2 (see revision history for details)
 102       - Changed Version Control macros to be core agnostic.
 103       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 104       CMSIS-Core(A): 1.0.0 (see revision history for details)
 105       - Initial release
 106       - IRQ Controller API 1.0.0
 107       CMSIS-Driver: 2.05 (see revision history for details)
 108       - All typedefs related to status have been made volatile.
 109       CMSIS-RTOS2:
 110       - API 2.1.1 (see revision history for details)
 111       - RTX 5.2.0 (see revision history for details)
 112       - OS Tick API 1.0.0
 113       CMSIS-DSP: 1.5.2 (see revision history for details)
 114       - Fixed GNU Compiler specific diagnostics.
 115       CMSIS-Pack: 1.5.0 (see revision history for details)
 116       - added System Description File (*.SDF) Format
 117       CMSIS-Zone: 0.0.1 (Preview)
 118       - Initial specification draft
 119     </release>
 120     <release version="5.0.1" date="2017-02-03">
 121       Package Description:
 122       - added taxonomy for Cclass RTOS
 123       CMSIS-RTOS2:
 124       - API 2.1   (see revision history for details)
 125       - RTX 5.1.0 (see revision history for details)
 126       CMSIS-Core: 5.0.1 (see revision history for details)
 127       - Added __PACKED_STRUCT macro
 128       - Added uVisior support
 129       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 130       - Updated template for secure main function (main_s.c)
 131       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 132       CMSIS-DSP: 1.5.1 (see revision history for details)
 133       - added ARMv8M DSP libraries.
 134       CMSIS-Pack:1.4.9 (see revision history for details)
 135       - added Pack Index File specification and schema file
 136     </release>
 137     <release version="5.0.0" date="2016-11-11">
 138       Changed open source license to Apache 2.0
 139       CMSIS_Core:
 140        - Added support for Cortex-M23 and Cortex-M33.
 141        - Added ARMv8-M device configurations for mainline and baseline.
 142        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 143        - Added cmsis_compiler.h to unify compiler behaviour.
 144        - Updated function SCB_EnableICache (for Cortex-M7).
 145        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 146       CMSIS-RTOS:
 147         - bug fix in RTX 4.82 (see revision history for details)
 148       CMSIS-RTOS2:
 149         - new API including compatibility layer to CMSIS-RTOS
 150         - reference implementation based on RTX5
 151         - supports all Cortex-M variants including TrustZone for ARMv8-M
 152       CMSIS-SVD:
 153        - reworked SVD format documentation
 154        - removed SVD file database documentation as SVD files are distributed in packs
 155        - updated SVDConv for Win32 and Linux
 156       CMSIS-DSP:
 157        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 158        - Added DSP libraries build projects to CMSIS pack.
 159     </release>
 160     <release version="4.5.0" date="2015-10-28">
 161       - CMSIS-Core     4.30.0  (see revision history for details)
 162       - CMSIS-DAP      1.1.0   (unchanged)
 163       - CMSIS-Driver   2.04.0  (see revision history for details)
 164       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 165       - CMSIS-Pack     1.4.1   (see revision history for details)
 166       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 167       - CMSIS-SVD      1.3.1   (see revision history for details)
 168     </release>
 169     <release version="4.4.0" date="2015-09-11">
 170       - CMSIS-Core     4.20   (see revision history for details)
 171       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 172       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 173       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 174       - CMSIS-RTOS
 175         -- API         1.02   (unchanged)
 176         -- RTX         4.79   (see revision history for details)
 177       - CMSIS-SVD      1.3.0  (see revision history for details)
 178       - CMSIS-DAP      1.1.0  (extended with SWO support)
 179     </release>
 180     <release version="4.3.0" date="2015-03-20">
 181       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 182       - CMSIS-DSP      1.4.5  (see revision history for details)
 183       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 184       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 185       - CMSIS-RTOS
 186         -- API         1.02   (unchanged)
 187         -- RTX         4.78   (see revision history for details)
 188       - CMSIS-SVD      1.2    (unchanged)
 189     </release>
 190     <release version="4.2.0" date="2014-09-24">
 191       Adding Cortex-M7 support
 192       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 193       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 194       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 195       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 196       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 197     </release>
 198     <release version="4.1.1" date="2014-06-30">
 199       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 200     </release>
 201     <release version="4.1.0" date="2014-06-12">
 202       - CMSIS-Driver   2.02  (incompatible update)
 203       - CMSIS-Pack     1.3   (see revision history for details)
 204       - CMSIS-DSP      1.4.2 (unchanged)
 205       - CMSIS-Core     3.30  (unchanged)
 206       - CMSIS-RTOS RTX 4.74  (unchanged)
 207       - CMSIS-RTOS API 1.02  (unchanged)
 208       - CMSIS-SVD      1.10  (unchanged)
 209       PACK:
 210       - removed G++ specific files from PACK
 211       - added Component Startup variant "C Startup"
 212       - added Pack Checking Utility
 213       - updated conditions to reflect tool-chain dependency
 214       - added Taxonomy for Graphics
 215       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 216     </release>
 217     <release version="4.0.0">
 218       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 219       - CMSIS-Pack     1.1   Preliminary
 220       - CMSIS-DSP      1.4.2 (see revision history for details)
 221       - CMSIS-Core     3.30  (see revision history for details)
 222       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 223       - CMSIS-RTOS API 1.02  (unchanged)
 224       - CMSIS-SVD      1.10  (unchanged)
 225     </release>
 226     <release version="3.20.4">
 227       - CMSIS-RTOS 4.74 (see revision history for details)
 228       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 229     </release>
 230     <release version="3.20.3">
 231       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 232       - CMSIS-RTOS 4.73 (see revision history for details)
 233     </release>
 234     <release version="3.20.2">
 235       - CMSIS-Pack documentation has been added
 236       - CMSIS-Drivers header and documentation have been added to PACK
 237       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 238     </release>
 239     <release version="3.20.1">
 240       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 241       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 242     </release>
 243     <release version="3.20.0">
 244       The software portions that are deployed in the application program are now under a BSD license which allows usage
 245       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 246       The individual components have been update as listed below:
 247       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 248       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 249       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 250       - CMSIS-SVD is unchanged.
 251     </release>
 252   </releases>
 253
 254   <taxonomy>
 255     <description Cclass="Audio">Software components for audio processing</description>
 256     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 257     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 258     <description Cclass="Compiler">Compiler Software Extensions</description>
 259     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 260     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 261     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 262     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 263     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 264     <description Cclass="File System">File Drive Support and File System</description>
 265     <description Cclass="IoT Client">IoT cloud client connector</description>
 266     <description Cclass="IoT Utility">IoT specific software utility</description>
 267     <description Cclass="Graphics">Graphical User Interface</description>
 268     <description Cclass="Network">Network Stack using Internet Protocols</description>
 269     <description Cclass="RTOS">Real-time Operating System</description>
 270     <description Cclass="Security">Encryption for secure communication or storage</description>
 271     <description Cclass="USB">Universal Serial Bus Stack</description>
 272     <description Cclass="Utility">Generic software utility components</description>
 273   </taxonomy>
 274
 275   <devices>
 276     <!-- ******************************  Cortex-M0  ****************************** -->
 277     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 278       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 279       <description>
 280 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 281 - simple, easy-to-use programmers model
 282 - highly efficient ultra-low power operation
 283 - excellent code density
 284 - deterministic, high-performance interrupt handling
 285 - upward compatibility with the rest of the Cortex-M processor family.
 286       </description>
 287       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 288       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 289       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 290       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 291
 292       <device Dname="ARMCM0">
 293         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 294         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 295       </device>
 296     </family>
 297
 298     <!-- ******************************  Cortex-M0P  ****************************** -->
 299     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 300       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 301       <description>
 302 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 303 - simple, easy-to-use programmers model
 304 - highly efficient ultra-low power operation
 305 - excellent code density
 306 - deterministic, high-performance interrupt handling
 307 - upward compatibility with the rest of the Cortex-M processor family.
 308       </description>
 309       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 310       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 311       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 312       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 313
 314       <device Dname="ARMCM0P">
 315         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 316         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 317       </device>
 318
 319       <device Dname="ARMCM0P_MPU">
 320         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 321         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 322       </device>
 323     </family>
 324
 325     <!-- ******************************  Cortex-M1  ****************************** -->
 326     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 327       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 328       <description>
 329 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 330 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 331       </description>
 332       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 333       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 334       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 335       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 336
 337       <device Dname="ARMCM1">
 338         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 339         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 340       </device>
 341     </family>
 342
 343     <!-- ******************************  Cortex-M3  ****************************** -->
 344     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 345       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 346       <description>
 347 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 348 - simple, easy-to-use programmers model
 349 - highly efficient ultra-low power operation
 350 - excellent code density
 351 - deterministic, high-performance interrupt handling
 352 - upward compatibility with the rest of the Cortex-M processor family.
 353       </description>
 354       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 355       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 356       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 357       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 358
 359       <device Dname="ARMCM3">
 360         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 361         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 362       </device>
 363     </family>
 364
 365     <!-- ******************************  Cortex-M4  ****************************** -->
 366     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 367       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 368       <description>
 369 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 370 - simple, easy-to-use programmers model
 371 - highly efficient ultra-low power operation
 372 - excellent code density
 373 - deterministic, high-performance interrupt handling
 374 - upward compatibility with the rest of the Cortex-M processor family.
 375       </description>
 376       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 377       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 378       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 379       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 380
 381       <device Dname="ARMCM4">
 382         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 383         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 384       </device>
 385
 386       <device Dname="ARMCM4_FP">
 387         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 388         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 389       </device>
 390     </family>
 391
 392     <!-- ******************************  Cortex-M7  ****************************** -->
 393     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 394       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 395       <description>
 396 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 397 - simple, easy-to-use programmers model
 398 - highly efficient ultra-low power operation
 399 - excellent code density
 400 - deterministic, high-performance interrupt handling
 401 - upward compatibility with the rest of the Cortex-M processor family.
 402       </description>
 403       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 404       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 405       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 406       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 407
 408       <device Dname="ARMCM7">
 409         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 410         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 411       </device>
 412
 413       <device Dname="ARMCM7_SP">
 414         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 415         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 416       </device>
 417
 418       <device Dname="ARMCM7_DP">
 419         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 420         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 421       </device>
 422     </family>
 423
 424     <!-- ******************************  Cortex-M23  ********************** -->
 425     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 426       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 427       <description>
 428 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 429 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 430 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 431       </description>
 432       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 433       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 434       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 435       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 436       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 437       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 438
 439       <device Dname="ARMCM23">
 440         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 441         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 442       </device>
 443
 444       <device Dname="ARMCM23_TZ">
 445         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 446         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 447       </device>
 448     </family>
 449
 450     <!-- ******************************  Cortex-M33  ****************************** -->
 451     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 452       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 453       <description>
 454 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 455 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 456       </description>
 457       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 458       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 459       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 460       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 461       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 462       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 463
 464       <device Dname="ARMCM33">
 465         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 466         <description>
 467           no DSP Instructions, no Floating Point Unit, no TrustZone
 468         </description>
 469         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 470       </device>
 471
 472       <device Dname="ARMCM33_TZ">
 473         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 474         <description>
 475           no DSP Instructions, no Floating Point Unit, TrustZone
 476         </description>
 477         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 478       </device>
 479
 480       <device Dname="ARMCM33_DSP_FP">
 481         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 482         <description>
 483           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 484         </description>
 485         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 486       </device>
 487
 488       <device Dname="ARMCM33_DSP_FP_TZ">
 489         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 490         <description>
 491           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 492         </description>
 493         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 494       </device>
 495     </family>
 496
 497     <!-- ******************************  Cortex-M35P  ****************************** -->
 498     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 499       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 500       <description>
 501 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 502 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 503       </description>
 504
 505       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 506       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 507       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 508       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 509       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 510       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 511
 512       <device Dname="ARMCM35P">
 513         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 514         <description>
 515           no DSP Instructions, no Floating Point Unit, no TrustZone
 516         </description>
 517         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 518       </device>
 519
 520       <device Dname="ARMCM35P_TZ">
 521         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 522         <description>
 523           no DSP Instructions, no Floating Point Unit, TrustZone
 524         </description>
 525         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 526       </device>
 527
 528       <device Dname="ARMCM35P_DSP_FP">
 529         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 530         <description>
 531           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 532         </description>
 533         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 534       </device>
 535
 536       <device Dname="ARMCM35P_DSP_FP_TZ">
 537         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 538         <description>
 539           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 540         </description>
 541         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 542       </device>
 543     </family>
 544
 545     <!-- ******************************  ARMSC000  ****************************** -->
 546     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 547       <description>
 548 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 549 - simple, easy-to-use programmers model
 550 - highly efficient ultra-low power operation
 551 - excellent code density
 552 - deterministic, high-performance interrupt handling
 553       </description>
 554       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 555       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 556       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 557       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 558
 559       <device Dname="ARMSC000">
 560         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 561         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 562       </device>
 563     </family>
 564
 565     <!-- ******************************  ARMSC300  ****************************** -->
 566     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 567       <description>
 568 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 569 - simple, easy-to-use programmers model
 570 - highly efficient ultra-low power operation
 571 - excellent code density
 572 - deterministic, high-performance interrupt handling
 573       </description>
 574       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 575       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 576       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 577       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 578
 579       <device Dname="ARMSC300">
 580         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 581         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 582       </device>
 583     </family>
 584
 585     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 586     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 587       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 588       <description>
 589 Armv8-M Baseline based device with TrustZone
 590       </description>
 591       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 592       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 593       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 594       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 595       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 596       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 597
 598       <device Dname="ARMv8MBL">
 599         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 600         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 601       </device>
 602     </family>
 603
 604     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 605     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 606       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 607       <description>
 608 Armv8-M Mainline based device with TrustZone
 609       </description>
 610       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 611       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 612       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 613       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 614       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 615       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 616
 617       <device Dname="ARMv8MML">
 618         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 619         <description>
 620           no DSP Instructions, no Floating Point Unit, TrustZone
 621         </description>
 622         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 623       </device>
 624
 625       <device Dname="ARMv8MML_DSP">
 626         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 627         <description>
 628           DSP Instructions, no Floating Point Unit, TrustZone
 629         </description>
 630         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 631       </device>
 632
 633       <device Dname="ARMv8MML_SP">
 634         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 635         <description>
 636           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 637         </description>
 638         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 639       </device>
 640
 641       <device Dname="ARMv8MML_DSP_SP">
 642         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 643         <description>
 644           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 645         </description>
 646         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 647       </device>
 648
 649       <device Dname="ARMv8MML_DP">
 650         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 651         <description>
 652           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 653         </description>
 654         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 655       </device>
 656
 657       <device Dname="ARMv8MML_DSP_DP">
 658         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 659         <description>
 660           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 661         </description>
 662         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 663       </device>
 664     </family>
 665
 666     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 667     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 668       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 669       <description>
 670 Armv8.1-M Mainline based device with TrustZone and MVE
 671       </description>
 672       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 673       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 674       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 675       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 676       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 677       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 678
 679
 680       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 681         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 682         <description>
 683           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 684         </description>
 685         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 686       </device>
 687     </family>
 688
 689     <!-- ******************************  Cortex-A5  ****************************** -->
 690     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 691       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 692       <description>
 693 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 694 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 695 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 696       </description>
 697
 698       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 699       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 700
 701       <device Dname="ARMCA5">
 702         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 703         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 704       </device>
 705     </family>
 706
 707     <!-- ******************************  Cortex-A7  ****************************** -->
 708     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 709       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 710       <description>
 711 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 712 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 713 an optional integrated GIC, and an optional L2 cache controller.
 714       </description>
 715
 716       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 717       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 718
 719       <device Dname="ARMCA7">
 720         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 721         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 722       </device>
 723     </family>
 724
 725     <!-- ******************************  Cortex-A9  ****************************** -->
 726     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 727       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 728       <description>
 729 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 730 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 731 and 8-bit Java bytecodes in Jazelle state.
 732       </description>
 733
 734       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 735       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 736
 737       <device Dname="ARMCA9">
 738         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 739         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 740       </device>
 741     </family>
 742   </devices>
 743
 744
 745   <apis>
 746     <!-- CMSIS Device API -->
 747     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 748       <description>Device interrupt controller interface</description>
 749       <files>
 750         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 751       </files>
 752     </api>
 753     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 754       <description>RTOS Kernel system tick timer interface</description>
 755       <files>
 756         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 757       </files>
 758     </api>
 759     <!-- CMSIS-RTOS API -->
 760     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 761       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 762       <files>
 763         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 764       </files>
 765     </api>
 766     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 767       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 768       <files>
 769         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 770         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 771       </files>
 772     </api>
 773     <!-- CMSIS Driver API -->
 774     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 775       <description>USART Driver API for Cortex-M</description>
 776       <files>
 777         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 778         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 779       </files>
 780     </api>
 781     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 782       <description>SPI Driver API for Cortex-M</description>
 783       <files>
 784         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 785         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 786       </files>
 787     </api>
 788     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 789       <description>SAI Driver API for Cortex-M</description>
 790       <files>
 791         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 792         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 793       </files>
 794     </api>
 795     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 796       <description>I2C Driver API for Cortex-M</description>
 797       <files>
 798         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 799         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 800       </files>
 801     </api>
 802     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 803       <description>CAN Driver API for Cortex-M</description>
 804       <files>
 805         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 806         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 807       </files>
 808     </api>
 809     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 810       <description>Flash Driver API for Cortex-M</description>
 811       <files>
 812         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 813         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 814       </files>
 815     </api>
 816     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 817       <description>MCI Driver API for Cortex-M</description>
 818       <files>
 819         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 820         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 821       </files>
 822     </api>
 823     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 824       <description>NAND Flash Driver API for Cortex-M</description>
 825       <files>
 826         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 827         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 828       </files>
 829     </api>
 830     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 831       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 832       <files>
 833         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 834         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 835         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 836       </files>
 837     </api>
 838     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 839       <description>Ethernet MAC Driver API for Cortex-M</description>
 840       <files>
 841         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 842         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 843       </files>
 844     </api>
 845     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 846       <description>Ethernet PHY Driver API for Cortex-M</description>
 847       <files>
 848         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 849         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 850       </files>
 851     </api>
 852     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 853       <description>USB Device Driver API for Cortex-M</description>
 854       <files>
 855         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 856         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 857       </files>
 858     </api>
 859     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 860       <description>USB Host Driver API for Cortex-M</description>
 861       <files>
 862         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 863         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 864       </files>
 865     </api>
 866     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0-beta" exclusive="0">
 867       <description>WiFi driver</description>
 868       <files>
 869         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
 870       </files>
 871     </api>
 872   </apis>
 873
 874   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 875   <conditions>
 876     <!-- compiler -->
 877     <condition id="ARMCC6">
 878       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 879       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 880     </condition>
 881     <condition id="ARMCC5">
 882       <require Tcompiler="ARMCC" Toptions="AC5"/>
 883     </condition>
 884     <condition id="ARMCC">
 885       <require Tcompiler="ARMCC"/>
 886     </condition>
 887     <condition id="GCC">
 888       <require Tcompiler="GCC"/>
 889     </condition>
 890     <condition id="IAR">
 891       <require Tcompiler="IAR"/>
 892     </condition>
 893     <condition id="ARMCC GCC">
 894       <accept Tcompiler="ARMCC"/>
 895       <accept Tcompiler="GCC"/>
 896     </condition>
 897     <condition id="ARMCC GCC IAR">
 898       <accept Tcompiler="ARMCC"/>
 899       <accept Tcompiler="GCC"/>
 900       <accept Tcompiler="IAR"/>
 901     </condition>
 902
 903     <!-- Arm architecture -->
 904     <condition id="ARMv6-M Device">
 905       <description>Armv6-M architecture based device</description>
 906       <accept Dcore="Cortex-M0"/>
 907       <accept Dcore="Cortex-M1"/>
 908       <accept Dcore="Cortex-M0+"/>
 909       <accept Dcore="SC000"/>
 910     </condition>
 911     <condition id="ARMv7-M Device">
 912       <description>Armv7-M architecture based device</description>
 913       <accept Dcore="Cortex-M3"/>
 914       <accept Dcore="Cortex-M4"/>
 915       <accept Dcore="Cortex-M7"/>
 916       <accept Dcore="SC300"/>
 917     </condition>
 918     <condition id="ARMv8-M Device">
 919       <description>Armv8-M architecture based device</description>
 920       <accept Dcore="ARMV8MBL"/>
 921       <accept Dcore="ARMV8MML"/>
 922       <accept Dcore="ARMV81MML"/>
 923       <accept Dcore="Cortex-M23"/>
 924       <accept Dcore="Cortex-M33"/>
 925       <accept Dcore="Cortex-M35P"/>
 926     </condition>
 927     <condition id="ARMv8-M TZ Device">
 928       <description>Armv8-M architecture based device with TrustZone</description>
 929       <require condition="ARMv8-M Device"/>
 930       <require Dtz="TZ"/>
 931     </condition>
 932     <condition id="ARMv6_7-M Device">
 933       <description>Armv6_7-M architecture based device</description>
 934       <accept condition="ARMv6-M Device"/>
 935       <accept condition="ARMv7-M Device"/>
 936     </condition>
 937     <condition id="ARMv6_7_8-M Device">
 938       <description>Armv6_7_8-M architecture based device</description>
 939       <accept condition="ARMv6-M Device"/>
 940       <accept condition="ARMv7-M Device"/>
 941       <accept condition="ARMv8-M Device"/>
 942     </condition>
 943     <condition id="ARMv7-A Device">
 944       <description>Armv7-A architecture based device</description>
 945       <accept Dcore="Cortex-A5"/>
 946       <accept Dcore="Cortex-A7"/>
 947       <accept Dcore="Cortex-A9"/>
 948     </condition>
 949
 950     <!-- ARM core -->
 951     <condition id="CM0">
 952       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 953       <accept Dcore="Cortex-M0"/>
 954       <accept Dcore="Cortex-M0+"/>
 955       <accept Dcore="SC000"/>
 956     </condition>
 957     <condition id="CM1">
 958       <description>Cortex-M1</description>
 959       <require Dcore="Cortex-M1"/>
 960     </condition>
 961     <condition id="CM3">
 962       <description>Cortex-M3 or SC300 processor based device</description>
 963       <accept Dcore="Cortex-M3"/>
 964       <accept Dcore="SC300"/>
 965     </condition>
 966     <condition id="CM4">
 967       <description>Cortex-M4 processor based device</description>
 968       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 969     </condition>
 970     <condition id="CM4_FP">
 971       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 972       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 973       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 974       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 975     </condition>
 976     <condition id="CM7">
 977       <description>Cortex-M7 processor based device</description>
 978       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 979     </condition>
 980     <condition id="CM7_FP">
 981       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 982       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 983       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 984     </condition>
 985     <condition id="CM7_SP">
 986       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 987       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 988     </condition>
 989     <condition id="CM7_DP">
 990       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 991       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 992     </condition>
 993     <condition id="CM23">
 994       <description>Cortex-M23 processor based device</description>
 995       <require Dcore="Cortex-M23"/>
 996     </condition>
 997     <condition id="CM33">
 998       <description>Cortex-M33 processor based device</description>
 999       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1000     </condition>
1001     <condition id="CM33_FP">
1002       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1003       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1004     </condition>
1005     <condition id="CM35P">
1006       <description>Cortex-M35P processor based device</description>
1007       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1008     </condition>
1009     <condition id="CM35P_FP">
1010       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1011       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1012     </condition>
1013     <condition id="ARMv8MBL">
1014       <description>Armv8-M Baseline processor based device</description>
1015       <require Dcore="ARMV8MBL"/>
1016     </condition>
1017     <condition id="ARMv8MML">
1018       <description>Armv8-M Mainline processor based device</description>
1019       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1020     </condition>
1021     <condition id="ARMv8MML_FP">
1022       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1023       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1024       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1025     </condition>
1026
1027     <condition id="CM33_NODSP_NOFPU">
1028       <description>CM33, no DSP, no FPU</description>
1029       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1030     </condition>
1031     <condition id="CM33_DSP_NOFPU">
1032       <description>CM33, DSP, no FPU</description>
1033       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1034     </condition>
1035     <condition id="CM33_NODSP_SP">
1036       <description>CM33, no DSP, SP FPU</description>
1037       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1038     </condition>
1039     <condition id="CM33_DSP_SP">
1040       <description>CM33, DSP, SP FPU</description>
1041       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1042     </condition>
1043
1044     <condition id="CM35P_NODSP_NOFPU">
1045       <description>CM35P, no DSP, no FPU</description>
1046       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1047     </condition>
1048     <condition id="CM35P_DSP_NOFPU">
1049       <description>CM35P, DSP, no FPU</description>
1050       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1051     </condition>
1052     <condition id="CM35P_NODSP_SP">
1053       <description>CM35P, no DSP, SP FPU</description>
1054       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1055     </condition>
1056     <condition id="CM35P_DSP_SP">
1057       <description>CM35P, DSP, SP FPU</description>
1058       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1059     </condition>
1060
1061     <condition id="ARMv8MML_NODSP_NOFPU">
1062       <description>Armv8-M Mainline, no DSP, no FPU</description>
1063       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1064     </condition>
1065     <condition id="ARMv8MML_DSP_NOFPU">
1066       <description>Armv8-M Mainline, DSP, no FPU</description>
1067       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1068     </condition>
1069     <condition id="ARMv8MML_NODSP_SP">
1070       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1071       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1072     </condition>
1073     <condition id="ARMv8MML_DSP_SP">
1074       <description>Armv8-M Mainline, DSP, SP FPU</description>
1075       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1076     </condition>
1077
1078     <condition id="ARMv81MML">
1079       <description>Armv8.1-M Mainline</description>
1080       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1081     </condition>
1082
1083     <condition id="CA5_CA9">
1084       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1085       <accept Dcore="Cortex-A5"/>
1086       <accept Dcore="Cortex-A9"/>
1087     </condition>
1088
1089     <condition id="CA7">
1090       <description>Cortex-A7 processor based device</description>
1091       <accept Dcore="Cortex-A7"/>
1092     </condition>
1093
1094     <!-- ARMCC compiler -->
1095     <condition id="CA_ARMCC5">
1096       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1097       <require condition="ARMv7-A Device"/>
1098       <require condition="ARMCC5"/>
1099     </condition>
1100     <condition id="CA_ARMCC6">
1101       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1102       <require condition="ARMv7-A Device"/>
1103       <require condition="ARMCC6"/>
1104     </condition>
1105
1106     <condition id="CM0_ARMCC">
1107       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1108       <require condition="CM0"/>
1109       <require Tcompiler="ARMCC"/>
1110     </condition>
1111     <condition id="CM0_LE_ARMCC">
1112       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1113       <require condition="CM0_ARMCC"/>
1114       <require Dendian="Little-endian"/>
1115     </condition>
1116     <condition id="CM0_BE_ARMCC">
1117       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1118       <require condition="CM0_ARMCC"/>
1119       <require Dendian="Big-endian"/>
1120     </condition>
1121
1122     <condition id="CM1_ARMCC">
1123       <description>Cortex-M1 based device for the Arm Compiler</description>
1124       <require condition="CM1"/>
1125       <require Tcompiler="ARMCC"/>
1126     </condition>
1127     <condition id="CM1_LE_ARMCC">
1128       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1129       <require condition="CM1_ARMCC"/>
1130       <require Dendian="Little-endian"/>
1131     </condition>
1132     <condition id="CM1_BE_ARMCC">
1133       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1134       <require condition="CM1_ARMCC"/>
1135       <require Dendian="Big-endian"/>
1136     </condition>
1137
1138     <condition id="CM3_ARMCC">
1139       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1140       <require condition="CM3"/>
1141       <require Tcompiler="ARMCC"/>
1142     </condition>
1143     <condition id="CM3_LE_ARMCC">
1144       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1145       <require condition="CM3_ARMCC"/>
1146       <require Dendian="Little-endian"/>
1147     </condition>
1148     <condition id="CM3_BE_ARMCC">
1149       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1150       <require condition="CM3_ARMCC"/>
1151       <require Dendian="Big-endian"/>
1152     </condition>
1153
1154     <condition id="CM4_ARMCC">
1155       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1156       <require condition="CM4"/>
1157       <require Tcompiler="ARMCC"/>
1158     </condition>
1159     <condition id="CM4_LE_ARMCC">
1160       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1161       <require condition="CM4_ARMCC"/>
1162       <require Dendian="Little-endian"/>
1163     </condition>
1164     <condition id="CM4_BE_ARMCC">
1165       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1166       <require condition="CM4_ARMCC"/>
1167       <require Dendian="Big-endian"/>
1168     </condition>
1169
1170     <condition id="CM4_FP_ARMCC">
1171       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1172       <require condition="CM4_FP"/>
1173       <require Tcompiler="ARMCC"/>
1174     </condition>
1175     <condition id="CM4_FP_LE_ARMCC">
1176       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1177       <require condition="CM4_FP_ARMCC"/>
1178       <require Dendian="Little-endian"/>
1179     </condition>
1180     <condition id="CM4_FP_BE_ARMCC">
1181       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1182       <require condition="CM4_FP_ARMCC"/>
1183       <require Dendian="Big-endian"/>
1184     </condition>
1185
1186     <condition id="CM7_ARMCC">
1187       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1188       <require condition="CM7"/>
1189       <require Tcompiler="ARMCC"/>
1190     </condition>
1191     <condition id="CM7_LE_ARMCC">
1192       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1193       <require condition="CM7_ARMCC"/>
1194       <require Dendian="Little-endian"/>
1195     </condition>
1196     <condition id="CM7_BE_ARMCC">
1197       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1198       <require condition="CM7_ARMCC"/>
1199       <require Dendian="Big-endian"/>
1200     </condition>
1201
1202     <condition id="CM7_FP_ARMCC">
1203       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1204       <require condition="CM7_FP"/>
1205       <require Tcompiler="ARMCC"/>
1206     </condition>
1207     <condition id="CM7_FP_LE_ARMCC">
1208       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1209       <require condition="CM7_FP_ARMCC"/>
1210       <require Dendian="Little-endian"/>
1211     </condition>
1212     <condition id="CM7_FP_BE_ARMCC">
1213       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1214       <require condition="CM7_FP_ARMCC"/>
1215       <require Dendian="Big-endian"/>
1216     </condition>
1217
1218     <condition id="CM7_SP_ARMCC">
1219       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1220       <require condition="CM7_SP"/>
1221       <require Tcompiler="ARMCC"/>
1222     </condition>
1223     <condition id="CM7_SP_LE_ARMCC">
1224       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1225       <require condition="CM7_SP_ARMCC"/>
1226       <require Dendian="Little-endian"/>
1227     </condition>
1228     <condition id="CM7_SP_BE_ARMCC">
1229       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1230       <require condition="CM7_SP_ARMCC"/>
1231       <require Dendian="Big-endian"/>
1232     </condition>
1233
1234     <condition id="CM7_DP_ARMCC">
1235       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1236       <require condition="CM7_DP"/>
1237       <require Tcompiler="ARMCC"/>
1238     </condition>
1239     <condition id="CM7_DP_LE_ARMCC">
1240       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1241       <require condition="CM7_DP_ARMCC"/>
1242       <require Dendian="Little-endian"/>
1243     </condition>
1244     <condition id="CM7_DP_BE_ARMCC">
1245       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1246       <require condition="CM7_DP_ARMCC"/>
1247       <require Dendian="Big-endian"/>
1248     </condition>
1249
1250     <condition id="CM23_ARMCC">
1251       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1252       <require condition="CM23"/>
1253       <require Tcompiler="ARMCC"/>
1254     </condition>
1255     <condition id="CM23_LE_ARMCC">
1256       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1257       <require condition="CM23_ARMCC"/>
1258       <require Dendian="Little-endian"/>
1259     </condition>
1260     <condition id="CM23_BE_ARMCC">
1261       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1262       <require condition="CM23_ARMCC"/>
1263       <require Dendian="Big-endian"/>
1264     </condition>
1265
1266     <condition id="CM33_ARMCC">
1267       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1268       <require condition="CM33"/>
1269       <require Tcompiler="ARMCC"/>
1270     </condition>
1271     <condition id="CM33_LE_ARMCC">
1272       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1273       <require condition="CM33_ARMCC"/>
1274       <require Dendian="Little-endian"/>
1275     </condition>
1276     <condition id="CM33_BE_ARMCC">
1277       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1278       <require condition="CM33_ARMCC"/>
1279       <require Dendian="Big-endian"/>
1280     </condition>
1281
1282     <condition id="CM33_FP_ARMCC">
1283       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1284       <require condition="CM33_FP"/>
1285       <require Tcompiler="ARMCC"/>
1286     </condition>
1287     <condition id="CM33_FP_LE_ARMCC">
1288       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1289       <require condition="CM33_FP_ARMCC"/>
1290       <require Dendian="Little-endian"/>
1291     </condition>
1292     <condition id="CM33_FP_BE_ARMCC">
1293       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1294       <require condition="CM33_FP_ARMCC"/>
1295       <require Dendian="Big-endian"/>
1296     </condition>
1297
1298     <condition id="CM33_NODSP_NOFPU_ARMCC">
1299       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1300       <require condition="CM33_NODSP_NOFPU"/>
1301       <require Tcompiler="ARMCC"/>
1302     </condition>
1303     <condition id="CM33_DSP_NOFPU_ARMCC">
1304       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1305       <require condition="CM33_DSP_NOFPU"/>
1306       <require Tcompiler="ARMCC"/>
1307     </condition>
1308     <condition id="CM33_NODSP_SP_ARMCC">
1309       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1310       <require condition="CM33_NODSP_SP"/>
1311       <require Tcompiler="ARMCC"/>
1312     </condition>
1313     <condition id="CM33_DSP_SP_ARMCC">
1314       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1315       <require condition="CM33_DSP_SP"/>
1316       <require Tcompiler="ARMCC"/>
1317     </condition>
1318     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1319       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1320       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1321       <require Dendian="Little-endian"/>
1322     </condition>
1323     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1324       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1325       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1326       <require Dendian="Little-endian"/>
1327     </condition>
1328     <condition id="CM33_NODSP_SP_LE_ARMCC">
1329       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1330       <require condition="CM33_NODSP_SP_ARMCC"/>
1331       <require Dendian="Little-endian"/>
1332     </condition>
1333     <condition id="CM33_DSP_SP_LE_ARMCC">
1334       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1335       <require condition="CM33_DSP_SP_ARMCC"/>
1336       <require Dendian="Little-endian"/>
1337     </condition>
1338
1339     <condition id="CM35P_ARMCC">
1340       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1341       <require condition="CM35P"/>
1342       <require Tcompiler="ARMCC"/>
1343     </condition>
1344     <condition id="CM35P_LE_ARMCC">
1345       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1346       <require condition="CM35P_ARMCC"/>
1347       <require Dendian="Little-endian"/>
1348     </condition>
1349     <condition id="CM35P_BE_ARMCC">
1350       <description>Cortex-M35P processor based device in big endian mode for the Arm Compiler</description>
1351       <require condition="CM35P_ARMCC"/>
1352       <require Dendian="Big-endian"/>
1353     </condition>
1354
1355     <condition id="CM35P_FP_ARMCC">
1356       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1357       <require condition="CM35P_FP"/>
1358       <require Tcompiler="ARMCC"/>
1359     </condition>
1360     <condition id="CM35P_FP_LE_ARMCC">
1361       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1362       <require condition="CM35P_FP_ARMCC"/>
1363       <require Dendian="Little-endian"/>
1364     </condition>
1365     <condition id="CM35P_FP_BE_ARMCC">
1366       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1367       <require condition="CM35P_FP_ARMCC"/>
1368       <require Dendian="Big-endian"/>
1369     </condition>
1370
1371     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1372       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1373       <require condition="CM35P_NODSP_NOFPU"/>
1374       <require Tcompiler="ARMCC"/>
1375     </condition>
1376     <condition id="CM35P_DSP_NOFPU_ARMCC">
1377       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1378       <require condition="CM35P_DSP_NOFPU"/>
1379       <require Tcompiler="ARMCC"/>
1380     </condition>
1381     <condition id="CM35P_NODSP_SP_ARMCC">
1382       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1383       <require condition="CM35P_NODSP_SP"/>
1384       <require Tcompiler="ARMCC"/>
1385     </condition>
1386     <condition id="CM35P_DSP_SP_ARMCC">
1387       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1388       <require condition="CM35P_DSP_SP"/>
1389       <require Tcompiler="ARMCC"/>
1390     </condition>
1391     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1392       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1393       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1394       <require Dendian="Little-endian"/>
1395     </condition>
1396     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1397       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1398       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1399       <require Dendian="Little-endian"/>
1400     </condition>
1401     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1402       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1403       <require condition="CM35P_NODSP_SP_ARMCC"/>
1404       <require Dendian="Little-endian"/>
1405     </condition>
1406     <condition id="CM35P_DSP_SP_LE_ARMCC">
1407       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1408       <require condition="CM35P_DSP_SP_ARMCC"/>
1409       <require Dendian="Little-endian"/>
1410     </condition>
1411
1412     <condition id="ARMv8MBL_ARMCC">
1413       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1414       <require condition="ARMv8MBL"/>
1415       <require Tcompiler="ARMCC"/>
1416     </condition>
1417     <condition id="ARMv8MBL_LE_ARMCC">
1418       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1419       <require condition="ARMv8MBL_ARMCC"/>
1420       <require Dendian="Little-endian"/>
1421     </condition>
1422     <condition id="ARMv8MBL_BE_ARMCC">
1423       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1424       <require condition="ARMv8MBL_ARMCC"/>
1425       <require Dendian="Big-endian"/>
1426     </condition>
1427
1428     <condition id="ARMv8MML_ARMCC">
1429       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1430       <require condition="ARMv8MML"/>
1431       <require Tcompiler="ARMCC"/>
1432     </condition>
1433     <condition id="ARMv8MML_LE_ARMCC">
1434       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1435       <require condition="ARMv8MML_ARMCC"/>
1436       <require Dendian="Little-endian"/>
1437     </condition>
1438     <condition id="ARMv8MML_BE_ARMCC">
1439       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1440       <require condition="ARMv8MML_ARMCC"/>
1441       <require Dendian="Big-endian"/>
1442     </condition>
1443
1444     <condition id="ARMv8MML_FP_ARMCC">
1445       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1446       <require condition="ARMv8MML_FP"/>
1447       <require Tcompiler="ARMCC"/>
1448     </condition>
1449     <condition id="ARMv8MML_FP_LE_ARMCC">
1450       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1451       <require condition="ARMv8MML_FP_ARMCC"/>
1452       <require Dendian="Little-endian"/>
1453     </condition>
1454     <condition id="ARMv8MML_FP_BE_ARMCC">
1455       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1456       <require condition="ARMv8MML_FP_ARMCC"/>
1457       <require Dendian="Big-endian"/>
1458     </condition>
1459
1460     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1461       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1462       <require condition="ARMv8MML_NODSP_NOFPU"/>
1463       <require Tcompiler="ARMCC"/>
1464     </condition>
1465     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1466       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1467       <require condition="ARMv8MML_DSP_NOFPU"/>
1468       <require Tcompiler="ARMCC"/>
1469     </condition>
1470     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1471       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1472       <require condition="ARMv8MML_NODSP_SP"/>
1473       <require Tcompiler="ARMCC"/>
1474     </condition>
1475     <condition id="ARMv8MML_DSP_SP_ARMCC">
1476       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1477       <require condition="ARMv8MML_DSP_SP"/>
1478       <require Tcompiler="ARMCC"/>
1479     </condition>
1480     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1481       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1482       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1483       <require Dendian="Little-endian"/>
1484     </condition>
1485     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1486       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1487       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1488       <require Dendian="Little-endian"/>
1489     </condition>
1490     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1491       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1492       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1493       <require Dendian="Little-endian"/>
1494     </condition>
1495     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1496       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1497       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1498       <require Dendian="Little-endian"/>
1499     </condition>
1500
1501     <!-- GCC compiler -->
1502     <condition id="CA_GCC">
1503       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1504       <require condition="ARMv7-A Device"/>
1505       <require Tcompiler="GCC"/>
1506     </condition>
1507
1508     <condition id="CM0_GCC">
1509       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1510       <require condition="CM0"/>
1511       <require Tcompiler="GCC"/>
1512     </condition>
1513     <condition id="CM0_LE_GCC">
1514       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1515       <require condition="CM0_GCC"/>
1516       <require Dendian="Little-endian"/>
1517     </condition>
1518     <condition id="CM0_BE_GCC">
1519       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1520       <require condition="CM0_GCC"/>
1521       <require Dendian="Big-endian"/>
1522     </condition>
1523
1524     <condition id="CM1_GCC">
1525       <description>Cortex-M1 based device for the GCC Compiler</description>
1526       <require condition="CM1"/>
1527       <require Tcompiler="GCC"/>
1528     </condition>
1529     <condition id="CM1_LE_GCC">
1530       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1531       <require condition="CM1_GCC"/>
1532       <require Dendian="Little-endian"/>
1533     </condition>
1534     <condition id="CM1_BE_GCC">
1535       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1536       <require condition="CM1_GCC"/>
1537       <require Dendian="Big-endian"/>
1538     </condition>
1539
1540     <condition id="CM3_GCC">
1541       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1542       <require condition="CM3"/>
1543       <require Tcompiler="GCC"/>
1544     </condition>
1545     <condition id="CM3_LE_GCC">
1546       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1547       <require condition="CM3_GCC"/>
1548       <require Dendian="Little-endian"/>
1549     </condition>
1550     <condition id="CM3_BE_GCC">
1551       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1552       <require condition="CM3_GCC"/>
1553       <require Dendian="Big-endian"/>
1554     </condition>
1555
1556     <condition id="CM4_GCC">
1557       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1558       <require condition="CM4"/>
1559       <require Tcompiler="GCC"/>
1560     </condition>
1561     <condition id="CM4_LE_GCC">
1562       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1563       <require condition="CM4_GCC"/>
1564       <require Dendian="Little-endian"/>
1565     </condition>
1566     <condition id="CM4_BE_GCC">
1567       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1568       <require condition="CM4_GCC"/>
1569       <require Dendian="Big-endian"/>
1570     </condition>
1571
1572     <condition id="CM4_FP_GCC">
1573       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1574       <require condition="CM4_FP"/>
1575       <require Tcompiler="GCC"/>
1576     </condition>
1577     <condition id="CM4_FP_LE_GCC">
1578       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1579       <require condition="CM4_FP_GCC"/>
1580       <require Dendian="Little-endian"/>
1581     </condition>
1582     <condition id="CM4_FP_BE_GCC">
1583       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1584       <require condition="CM4_FP_GCC"/>
1585       <require Dendian="Big-endian"/>
1586     </condition>
1587
1588     <condition id="CM7_GCC">
1589       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1590       <require condition="CM7"/>
1591       <require Tcompiler="GCC"/>
1592     </condition>
1593     <condition id="CM7_LE_GCC">
1594       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1595       <require condition="CM7_GCC"/>
1596       <require Dendian="Little-endian"/>
1597     </condition>
1598     <condition id="CM7_BE_GCC">
1599       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1600       <require condition="CM7_GCC"/>
1601       <require Dendian="Big-endian"/>
1602     </condition>
1603
1604     <condition id="CM7_FP_GCC">
1605       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1606       <require condition="CM7_FP"/>
1607       <require Tcompiler="GCC"/>
1608     </condition>
1609     <condition id="CM7_FP_LE_GCC">
1610       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1611       <require condition="CM7_FP_GCC"/>
1612       <require Dendian="Little-endian"/>
1613     </condition>
1614     <condition id="CM7_FP_BE_GCC">
1615       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1616       <require condition="CM7_FP_GCC"/>
1617       <require Dendian="Big-endian"/>
1618     </condition>
1619
1620     <condition id="CM7_SP_GCC">
1621       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1622       <require condition="CM7_SP"/>
1623       <require Tcompiler="GCC"/>
1624     </condition>
1625     <condition id="CM7_SP_LE_GCC">
1626       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1627       <require condition="CM7_SP_GCC"/>
1628       <require Dendian="Little-endian"/>
1629     </condition>
1630     <condition id="CM7_SP_BE_GCC">
1631       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1632       <require condition="CM7_SP_GCC"/>
1633       <require Dendian="Big-endian"/>
1634     </condition>
1635
1636     <condition id="CM7_DP_GCC">
1637       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1638       <require condition="CM7_DP"/>
1639       <require Tcompiler="GCC"/>
1640     </condition>
1641     <condition id="CM7_DP_LE_GCC">
1642       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1643       <require condition="CM7_DP_GCC"/>
1644       <require Dendian="Little-endian"/>
1645     </condition>
1646     <condition id="CM7_DP_BE_GCC">
1647       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1648       <require condition="CM7_DP_GCC"/>
1649       <require Dendian="Big-endian"/>
1650     </condition>
1651
1652     <condition id="CM23_GCC">
1653       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1654       <require condition="CM23"/>
1655       <require Tcompiler="GCC"/>
1656     </condition>
1657     <condition id="CM23_LE_GCC">
1658       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1659       <require condition="CM23_GCC"/>
1660       <require Dendian="Little-endian"/>
1661     </condition>
1662     <condition id="CM23_BE_GCC">
1663       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1664       <require condition="CM23_GCC"/>
1665       <require Dendian="Big-endian"/>
1666     </condition>
1667
1668     <condition id="CM33_GCC">
1669       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1670       <require condition="CM33"/>
1671       <require Tcompiler="GCC"/>
1672     </condition>
1673     <condition id="CM33_LE_GCC">
1674       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1675       <require condition="CM33_GCC"/>
1676       <require Dendian="Little-endian"/>
1677     </condition>
1678     <condition id="CM33_BE_GCC">
1679       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1680       <require condition="CM33_GCC"/>
1681       <require Dendian="Big-endian"/>
1682     </condition>
1683
1684     <condition id="CM33_FP_GCC">
1685       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1686       <require condition="CM33_FP"/>
1687       <require Tcompiler="GCC"/>
1688     </condition>
1689     <condition id="CM33_FP_LE_GCC">
1690       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1691       <require condition="CM33_FP_GCC"/>
1692       <require Dendian="Little-endian"/>
1693     </condition>
1694     <condition id="CM33_FP_BE_GCC">
1695       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1696       <require condition="CM33_FP_GCC"/>
1697       <require Dendian="Big-endian"/>
1698     </condition>
1699
1700     <condition id="CM33_NODSP_NOFPU_GCC">
1701       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1702       <require condition="CM33_NODSP_NOFPU"/>
1703       <require Tcompiler="GCC"/>
1704     </condition>
1705     <condition id="CM33_DSP_NOFPU_GCC">
1706       <description>CM33, DSP, no FPU, GCC Compiler</description>
1707       <require condition="CM33_DSP_NOFPU"/>
1708       <require Tcompiler="GCC"/>
1709     </condition>
1710     <condition id="CM33_NODSP_SP_GCC">
1711       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1712       <require condition="CM33_NODSP_SP"/>
1713       <require Tcompiler="GCC"/>
1714     </condition>
1715     <condition id="CM33_DSP_SP_GCC">
1716       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1717       <require condition="CM33_DSP_SP"/>
1718       <require Tcompiler="GCC"/>
1719     </condition>
1720     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1721       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1722       <require condition="CM33_NODSP_NOFPU_GCC"/>
1723       <require Dendian="Little-endian"/>
1724     </condition>
1725     <condition id="CM33_DSP_NOFPU_LE_GCC">
1726       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1727       <require condition="CM33_DSP_NOFPU_GCC"/>
1728       <require Dendian="Little-endian"/>
1729     </condition>
1730     <condition id="CM33_NODSP_SP_LE_GCC">
1731       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1732       <require condition="CM33_NODSP_SP_GCC"/>
1733       <require Dendian="Little-endian"/>
1734     </condition>
1735     <condition id="CM33_DSP_SP_LE_GCC">
1736       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1737       <require condition="CM33_DSP_SP_GCC"/>
1738       <require Dendian="Little-endian"/>
1739     </condition>
1740
1741     <condition id="CM35P_GCC">
1742       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1743       <require condition="CM35P"/>
1744       <require Tcompiler="GCC"/>
1745     </condition>
1746     <condition id="CM35P_LE_GCC">
1747       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1748       <require condition="CM35P_GCC"/>
1749       <require Dendian="Little-endian"/>
1750     </condition>
1751     <condition id="CM35P_BE_GCC">
1752       <description>Cortex-M35P processor based device in big endian mode for the GCC Compiler</description>
1753       <require condition="CM35P_GCC"/>
1754       <require Dendian="Big-endian"/>
1755     </condition>
1756
1757     <condition id="CM35P_FP_GCC">
1758       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1759       <require condition="CM35P_FP"/>
1760       <require Tcompiler="GCC"/>
1761     </condition>
1762     <condition id="CM35P_FP_LE_GCC">
1763       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1764       <require condition="CM35P_FP_GCC"/>
1765       <require Dendian="Little-endian"/>
1766     </condition>
1767     <condition id="CM35P_FP_BE_GCC">
1768       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1769       <require condition="CM35P_FP_GCC"/>
1770       <require Dendian="Big-endian"/>
1771     </condition>
1772
1773     <condition id="CM35P_NODSP_NOFPU_GCC">
1774       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1775       <require condition="CM35P_NODSP_NOFPU"/>
1776       <require Tcompiler="GCC"/>
1777     </condition>
1778     <condition id="CM35P_DSP_NOFPU_GCC">
1779       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1780       <require condition="CM35P_DSP_NOFPU"/>
1781       <require Tcompiler="GCC"/>
1782     </condition>
1783     <condition id="CM35P_NODSP_SP_GCC">
1784       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1785       <require condition="CM35P_NODSP_SP"/>
1786       <require Tcompiler="GCC"/>
1787     </condition>
1788     <condition id="CM35P_DSP_SP_GCC">
1789       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1790       <require condition="CM35P_DSP_SP"/>
1791       <require Tcompiler="GCC"/>
1792     </condition>
1793     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1794       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1795       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1796       <require Dendian="Little-endian"/>
1797     </condition>
1798     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1799       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1800       <require condition="CM35P_DSP_NOFPU_GCC"/>
1801       <require Dendian="Little-endian"/>
1802     </condition>
1803     <condition id="CM35P_NODSP_SP_LE_GCC">
1804       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1805       <require condition="CM35P_NODSP_SP_GCC"/>
1806       <require Dendian="Little-endian"/>
1807     </condition>
1808     <condition id="CM35P_DSP_SP_LE_GCC">
1809       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1810       <require condition="CM35P_DSP_SP_GCC"/>
1811       <require Dendian="Little-endian"/>
1812     </condition>
1813
1814     <condition id="ARMv8MBL_GCC">
1815       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1816       <require condition="ARMv8MBL"/>
1817       <require Tcompiler="GCC"/>
1818     </condition>
1819     <condition id="ARMv8MBL_LE_GCC">
1820       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1821       <require condition="ARMv8MBL_GCC"/>
1822       <require Dendian="Little-endian"/>
1823     </condition>
1824     <condition id="ARMv8MBL_BE_GCC">
1825       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1826       <require condition="ARMv8MBL_GCC"/>
1827       <require Dendian="Big-endian"/>
1828     </condition>
1829
1830     <condition id="ARMv8MML_GCC">
1831       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1832       <require condition="ARMv8MML"/>
1833       <require Tcompiler="GCC"/>
1834     </condition>
1835     <condition id="ARMv8MML_LE_GCC">
1836       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1837       <require condition="ARMv8MML_GCC"/>
1838       <require Dendian="Little-endian"/>
1839     </condition>
1840     <condition id="ARMv8MML_BE_GCC">
1841       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1842       <require condition="ARMv8MML_GCC"/>
1843       <require Dendian="Big-endian"/>
1844     </condition>
1845
1846     <condition id="ARMv8MML_FP_GCC">
1847       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1848       <require condition="ARMv8MML_FP"/>
1849       <require Tcompiler="GCC"/>
1850     </condition>
1851     <condition id="ARMv8MML_FP_LE_GCC">
1852       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1853       <require condition="ARMv8MML_FP_GCC"/>
1854       <require Dendian="Little-endian"/>
1855     </condition>
1856     <condition id="ARMv8MML_FP_BE_GCC">
1857       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1858       <require condition="ARMv8MML_FP_GCC"/>
1859       <require Dendian="Big-endian"/>
1860     </condition>
1861
1862     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1863       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1864       <require condition="ARMv8MML_NODSP_NOFPU"/>
1865       <require Tcompiler="GCC"/>
1866     </condition>
1867     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1868       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1869       <require condition="ARMv8MML_DSP_NOFPU"/>
1870       <require Tcompiler="GCC"/>
1871     </condition>
1872     <condition id="ARMv8MML_NODSP_SP_GCC">
1873       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1874       <require condition="ARMv8MML_NODSP_SP"/>
1875       <require Tcompiler="GCC"/>
1876     </condition>
1877     <condition id="ARMv8MML_DSP_SP_GCC">
1878       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1879       <require condition="ARMv8MML_DSP_SP"/>
1880       <require Tcompiler="GCC"/>
1881     </condition>
1882     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1883       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1884       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1885       <require Dendian="Little-endian"/>
1886     </condition>
1887     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1888       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1889       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1890       <require Dendian="Little-endian"/>
1891     </condition>
1892     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1893       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1894       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1895       <require Dendian="Little-endian"/>
1896     </condition>
1897     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1898       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1899       <require condition="ARMv8MML_DSP_SP_GCC"/>
1900       <require Dendian="Little-endian"/>
1901     </condition>
1902
1903     <!-- IAR compiler -->
1904     <condition id="CA_IAR">
1905       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1906       <require condition="ARMv7-A Device"/>
1907       <require Tcompiler="IAR"/>
1908     </condition>
1909
1910     <condition id="CM0_IAR">
1911       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1912       <require condition="CM0"/>
1913       <require Tcompiler="IAR"/>
1914     </condition>
1915     <condition id="CM0_LE_IAR">
1916       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1917       <require condition="CM0_IAR"/>
1918       <require Dendian="Little-endian"/>
1919     </condition>
1920     <condition id="CM0_BE_IAR">
1921       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1922       <require condition="CM0_IAR"/>
1923       <require Dendian="Big-endian"/>
1924     </condition>
1925
1926     <condition id="CM1_IAR">
1927       <description>Cortex-M1 based device for the IAR Compiler</description>
1928       <require condition="CM1"/>
1929       <require Tcompiler="IAR"/>
1930     </condition>
1931     <condition id="CM1_LE_IAR">
1932       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1933       <require condition="CM1_IAR"/>
1934       <require Dendian="Little-endian"/>
1935     </condition>
1936     <condition id="CM1_BE_IAR">
1937       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1938       <require condition="CM1_IAR"/>
1939       <require Dendian="Big-endian"/>
1940     </condition>
1941
1942     <condition id="CM3_IAR">
1943       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1944       <require condition="CM3"/>
1945       <require Tcompiler="IAR"/>
1946     </condition>
1947     <condition id="CM3_LE_IAR">
1948       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1949       <require condition="CM3_IAR"/>
1950       <require Dendian="Little-endian"/>
1951     </condition>
1952     <condition id="CM3_BE_IAR">
1953       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1954       <require condition="CM3_IAR"/>
1955       <require Dendian="Big-endian"/>
1956     </condition>
1957
1958     <condition id="CM4_IAR">
1959       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1960       <require condition="CM4"/>
1961       <require Tcompiler="IAR"/>
1962     </condition>
1963     <condition id="CM4_LE_IAR">
1964       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1965       <require condition="CM4_IAR"/>
1966       <require Dendian="Little-endian"/>
1967     </condition>
1968     <condition id="CM4_BE_IAR">
1969       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1970       <require condition="CM4_IAR"/>
1971       <require Dendian="Big-endian"/>
1972     </condition>
1973
1974     <condition id="CM4_FP_IAR">
1975       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1976       <require condition="CM4_FP"/>
1977       <require Tcompiler="IAR"/>
1978     </condition>
1979     <condition id="CM4_FP_LE_IAR">
1980       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1981       <require condition="CM4_FP_IAR"/>
1982       <require Dendian="Little-endian"/>
1983     </condition>
1984     <condition id="CM4_FP_BE_IAR">
1985       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1986       <require condition="CM4_FP_IAR"/>
1987       <require Dendian="Big-endian"/>
1988     </condition>
1989
1990     <condition id="CM7_IAR">
1991       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1992       <require condition="CM7"/>
1993       <require Tcompiler="IAR"/>
1994     </condition>
1995     <condition id="CM7_LE_IAR">
1996       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1997       <require condition="CM7_IAR"/>
1998       <require Dendian="Little-endian"/>
1999     </condition>
2000     <condition id="CM7_BE_IAR">
2001       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2002       <require condition="CM7_IAR"/>
2003       <require Dendian="Big-endian"/>
2004     </condition>
2005
2006     <condition id="CM7_FP_IAR">
2007       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2008       <require condition="CM7_FP"/>
2009       <require Tcompiler="IAR"/>
2010     </condition>
2011     <condition id="CM7_FP_LE_IAR">
2012       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2013       <require condition="CM7_FP_IAR"/>
2014       <require Dendian="Little-endian"/>
2015     </condition>
2016     <condition id="CM7_FP_BE_IAR">
2017       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2018       <require condition="CM7_FP_IAR"/>
2019       <require Dendian="Big-endian"/>
2020     </condition>
2021
2022     <condition id="CM7_SP_IAR">
2023       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2024       <require condition="CM7_SP"/>
2025       <require Tcompiler="IAR"/>
2026     </condition>
2027     <condition id="CM7_SP_LE_IAR">
2028       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2029       <require condition="CM7_SP_IAR"/>
2030       <require Dendian="Little-endian"/>
2031     </condition>
2032     <condition id="CM7_SP_BE_IAR">
2033       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2034       <require condition="CM7_SP_IAR"/>
2035       <require Dendian="Big-endian"/>
2036     </condition>
2037
2038     <condition id="CM7_DP_IAR">
2039       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2040       <require condition="CM7_DP"/>
2041       <require Tcompiler="IAR"/>
2042     </condition>
2043     <condition id="CM7_DP_LE_IAR">
2044       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2045       <require condition="CM7_DP_IAR"/>
2046       <require Dendian="Little-endian"/>
2047     </condition>
2048     <condition id="CM7_DP_BE_IAR">
2049       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2050       <require condition="CM7_DP_IAR"/>
2051       <require Dendian="Big-endian"/>
2052     </condition>
2053
2054     <condition id="CM23_IAR">
2055       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2056       <require condition="CM23"/>
2057       <require Tcompiler="IAR"/>
2058     </condition>
2059     <condition id="CM23_LE_IAR">
2060       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2061       <require condition="CM23_IAR"/>
2062       <require Dendian="Little-endian"/>
2063     </condition>
2064     <condition id="CM23_BE_IAR">
2065       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
2066       <require condition="CM23_IAR"/>
2067       <require Dendian="Big-endian"/>
2068     </condition>
2069
2070     <condition id="CM33_IAR">
2071       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2072       <require condition="CM33"/>
2073       <require Tcompiler="IAR"/>
2074     </condition>
2075     <condition id="CM33_LE_IAR">
2076       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2077       <require condition="CM33_IAR"/>
2078       <require Dendian="Little-endian"/>
2079     </condition>
2080     <condition id="CM33_BE_IAR">
2081       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
2082       <require condition="CM33_IAR"/>
2083       <require Dendian="Big-endian"/>
2084     </condition>
2085
2086     <condition id="CM33_FP_IAR">
2087       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2088       <require condition="CM33_FP"/>
2089       <require Tcompiler="IAR"/>
2090     </condition>
2091     <condition id="CM33_FP_LE_IAR">
2092       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2093       <require condition="CM33_FP_IAR"/>
2094       <require Dendian="Little-endian"/>
2095     </condition>
2096     <condition id="CM33_FP_BE_IAR">
2097       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2098       <require condition="CM33_FP_IAR"/>
2099       <require Dendian="Big-endian"/>
2100     </condition>
2101
2102     <condition id="CM33_NODSP_NOFPU_IAR">
2103       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2104       <require condition="CM33_NODSP_NOFPU"/>
2105       <require Tcompiler="IAR"/>
2106     </condition>
2107     <condition id="CM33_DSP_NOFPU_IAR">
2108       <description>CM33, DSP, no FPU, IAR Compiler</description>
2109       <require condition="CM33_DSP_NOFPU"/>
2110       <require Tcompiler="IAR"/>
2111     </condition>
2112     <condition id="CM33_NODSP_SP_IAR">
2113       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2114       <require condition="CM33_NODSP_SP"/>
2115       <require Tcompiler="IAR"/>
2116     </condition>
2117     <condition id="CM33_DSP_SP_IAR">
2118       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2119       <require condition="CM33_DSP_SP"/>
2120       <require Tcompiler="IAR"/>
2121     </condition>
2122     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2123       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2124       <require condition="CM33_NODSP_NOFPU_IAR"/>
2125       <require Dendian="Little-endian"/>
2126     </condition>
2127     <condition id="CM33_DSP_NOFPU_LE_IAR">
2128       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2129       <require condition="CM33_DSP_NOFPU_IAR"/>
2130       <require Dendian="Little-endian"/>
2131     </condition>
2132     <condition id="CM33_NODSP_SP_LE_IAR">
2133       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2134       <require condition="CM33_NODSP_SP_IAR"/>
2135       <require Dendian="Little-endian"/>
2136     </condition>
2137     <condition id="CM33_DSP_SP_LE_IAR">
2138       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2139       <require condition="CM33_DSP_SP_IAR"/>
2140       <require Dendian="Little-endian"/>
2141     </condition>
2142
2143     <condition id="CM35P_IAR">
2144       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2145       <require condition="CM35P"/>
2146       <require Tcompiler="IAR"/>
2147     </condition>
2148     <condition id="CM35P_LE_IAR">
2149       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2150       <require condition="CM35P_IAR"/>
2151       <require Dendian="Little-endian"/>
2152     </condition>
2153     <condition id="CM35P_BE_IAR">
2154       <description>Cortex-M35P processor based device in big endian mode for the IAR Compiler</description>
2155       <require condition="CM35P_IAR"/>
2156       <require Dendian="Big-endian"/>
2157     </condition>
2158
2159     <condition id="CM35P_FP_IAR">
2160       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2161       <require condition="CM35P_FP"/>
2162       <require Tcompiler="IAR"/>
2163     </condition>
2164     <condition id="CM35P_FP_LE_IAR">
2165       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2166       <require condition="CM35P_FP_IAR"/>
2167       <require Dendian="Little-endian"/>
2168     </condition>
2169     <condition id="CM35P_FP_BE_IAR">
2170       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2171       <require condition="CM35P_FP_IAR"/>
2172       <require Dendian="Big-endian"/>
2173     </condition>
2174
2175     <condition id="CM35P_NODSP_NOFPU_IAR">
2176       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2177       <require condition="CM35P_NODSP_NOFPU"/>
2178       <require Tcompiler="IAR"/>
2179     </condition>
2180     <condition id="CM35P_DSP_NOFPU_IAR">
2181       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2182       <require condition="CM35P_DSP_NOFPU"/>
2183       <require Tcompiler="IAR"/>
2184     </condition>
2185     <condition id="CM35P_NODSP_SP_IAR">
2186       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2187       <require condition="CM35P_NODSP_SP"/>
2188       <require Tcompiler="IAR"/>
2189     </condition>
2190     <condition id="CM35P_DSP_SP_IAR">
2191       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2192       <require condition="CM35P_DSP_SP"/>
2193       <require Tcompiler="IAR"/>
2194     </condition>
2195     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2196       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2197       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2198       <require Dendian="Little-endian"/>
2199     </condition>
2200     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2201       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2202       <require condition="CM35P_DSP_NOFPU_IAR"/>
2203       <require Dendian="Little-endian"/>
2204     </condition>
2205     <condition id="CM35P_NODSP_SP_LE_IAR">
2206       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2207       <require condition="CM35P_NODSP_SP_IAR"/>
2208       <require Dendian="Little-endian"/>
2209     </condition>
2210     <condition id="CM35P_DSP_SP_LE_IAR">
2211       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2212       <require condition="CM35P_DSP_SP_IAR"/>
2213       <require Dendian="Little-endian"/>
2214     </condition>
2215
2216     <condition id="ARMv8MBL_IAR">
2217       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2218       <require condition="ARMv8MBL"/>
2219       <require Tcompiler="IAR"/>
2220     </condition>
2221     <condition id="ARMv8MBL_LE_IAR">
2222       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2223       <require condition="ARMv8MBL_IAR"/>
2224       <require Dendian="Little-endian"/>
2225     </condition>
2226     <condition id="ARMv8MBL_BE_IAR">
2227       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
2228       <require condition="ARMv8MBL_IAR"/>
2229       <require Dendian="Big-endian"/>
2230     </condition>
2231
2232     <condition id="ARMv8MML_IAR">
2233       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2234       <require condition="ARMv8MML"/>
2235       <require Tcompiler="IAR"/>
2236     </condition>
2237     <condition id="ARMv8MML_LE_IAR">
2238       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2239       <require condition="ARMv8MML_IAR"/>
2240       <require Dendian="Little-endian"/>
2241     </condition>
2242     <condition id="ARMv8MML_BE_IAR">
2243       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
2244       <require condition="ARMv8MML_IAR"/>
2245       <require Dendian="Big-endian"/>
2246     </condition>
2247
2248     <condition id="ARMv8MML_FP_IAR">
2249       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2250       <require condition="ARMv8MML_FP"/>
2251       <require Tcompiler="IAR"/>
2252     </condition>
2253     <condition id="ARMv8MML_FP_LE_IAR">
2254       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2255       <require condition="ARMv8MML_FP_IAR"/>
2256       <require Dendian="Little-endian"/>
2257     </condition>
2258     <condition id="ARMv8MML_FP_BE_IAR">
2259       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2260       <require condition="ARMv8MML_FP_IAR"/>
2261       <require Dendian="Big-endian"/>
2262     </condition>
2263
2264     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2265       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2266       <require condition="ARMv8MML_NODSP_NOFPU"/>
2267       <require Tcompiler="IAR"/>
2268     </condition>
2269     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2270       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2271       <require condition="ARMv8MML_DSP_NOFPU"/>
2272       <require Tcompiler="IAR"/>
2273     </condition>
2274     <condition id="ARMv8MML_NODSP_SP_IAR">
2275       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2276       <require condition="ARMv8MML_NODSP_SP"/>
2277       <require Tcompiler="IAR"/>
2278     </condition>
2279     <condition id="ARMv8MML_DSP_SP_IAR">
2280       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2281       <require condition="ARMv8MML_DSP_SP"/>
2282       <require Tcompiler="IAR"/>
2283     </condition>
2284     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2285       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2286       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2287       <require Dendian="Little-endian"/>
2288     </condition>
2289     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2290       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2291       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2292       <require Dendian="Little-endian"/>
2293     </condition>
2294     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2295       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2296       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2297       <require Dendian="Little-endian"/>
2298     </condition>
2299     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2300       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2301       <require condition="ARMv8MML_DSP_SP_IAR"/>
2302       <require Dendian="Little-endian"/>
2303     </condition>
2304
2305     <!-- conditions selecting single devices and CMSIS Core -->
2306     <!-- used for component startup, GCC version is used for C-Startup -->
2307     <condition id="ARMCM0 CMSIS">
2308       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2309       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2310       <require Cclass="CMSIS" Cgroup="CORE"/>
2311     </condition>
2312     <condition id="ARMCM0 CMSIS GCC">
2313       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
2314       <require condition="ARMCM0 CMSIS"/>
2315       <require condition="GCC"/>
2316     </condition>
2317
2318     <condition id="ARMCM0+ CMSIS">
2319       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2320       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2321       <require Cclass="CMSIS" Cgroup="CORE"/>
2322     </condition>
2323     <condition id="ARMCM0+ CMSIS GCC">
2324       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
2325       <require condition="ARMCM0+ CMSIS"/>
2326       <require condition="GCC"/>
2327     </condition>
2328
2329     <condition id="ARMCM1 CMSIS">
2330       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2331       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2332       <require Cclass="CMSIS" Cgroup="CORE"/>
2333     </condition>
2334     <condition id="ARMCM1 CMSIS GCC">
2335       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
2336       <require condition="ARMCM1 CMSIS"/>
2337       <require condition="GCC"/>
2338     </condition>
2339
2340     <condition id="ARMCM3 CMSIS">
2341       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2342       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2343       <require Cclass="CMSIS" Cgroup="CORE"/>
2344     </condition>
2345     <condition id="ARMCM3 CMSIS GCC">
2346       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
2347       <require condition="ARMCM3 CMSIS"/>
2348       <require condition="GCC"/>
2349     </condition>
2350
2351     <condition id="ARMCM4 CMSIS">
2352       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2353       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2354       <require Cclass="CMSIS" Cgroup="CORE"/>
2355     </condition>
2356     <condition id="ARMCM4 CMSIS GCC">
2357       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
2358       <require condition="ARMCM4 CMSIS"/>
2359       <require condition="GCC"/>
2360     </condition>
2361
2362     <condition id="ARMCM7 CMSIS">
2363       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2364       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2365       <require Cclass="CMSIS" Cgroup="CORE"/>
2366     </condition>
2367     <condition id="ARMCM7 CMSIS GCC">
2368       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2369       <require condition="ARMCM7 CMSIS"/>
2370       <require condition="GCC"/>
2371     </condition>
2372
2373     <condition id="ARMCM23 CMSIS">
2374       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2375       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2376       <require Cclass="CMSIS" Cgroup="CORE"/>
2377     </condition>
2378     <condition id="ARMCM23 CMSIS GCC">
2379       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2380       <require condition="ARMCM23 CMSIS"/>
2381       <require condition="GCC"/>
2382     </condition>
2383
2384     <condition id="ARMCM33 CMSIS">
2385       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2386       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2387       <require Cclass="CMSIS" Cgroup="CORE"/>
2388     </condition>
2389     <condition id="ARMCM33 CMSIS GCC">
2390       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2391       <require condition="ARMCM33 CMSIS"/>
2392       <require condition="GCC"/>
2393     </condition>
2394
2395     <condition id="ARMCM35P CMSIS">
2396       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2397       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2398       <require Cclass="CMSIS" Cgroup="CORE"/>
2399     </condition>
2400     <condition id="ARMCM35P CMSIS GCC">
2401       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core requiring GCC</description>
2402       <require condition="ARMCM35P CMSIS"/>
2403       <require condition="GCC"/>
2404     </condition>
2405
2406     <condition id="ARMSC000 CMSIS">
2407       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2408       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2409       <require Cclass="CMSIS" Cgroup="CORE"/>
2410     </condition>
2411     <condition id="ARMSC000 CMSIS GCC">
2412       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2413       <require condition="ARMSC000 CMSIS"/>
2414       <require condition="GCC"/>
2415     </condition>
2416
2417     <condition id="ARMSC300 CMSIS">
2418       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2419       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2420       <require Cclass="CMSIS" Cgroup="CORE"/>
2421     </condition>
2422     <condition id="ARMSC300 CMSIS GCC">
2423       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2424       <require condition="ARMSC300 CMSIS"/>
2425       <require condition="GCC"/>
2426     </condition>
2427
2428     <condition id="ARMv8MBL CMSIS">
2429       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2430       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2431       <require Cclass="CMSIS" Cgroup="CORE"/>
2432     </condition>
2433     <condition id="ARMv8MBL CMSIS GCC">
2434       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2435       <require condition="ARMv8MBL CMSIS"/>
2436       <require condition="GCC"/>
2437     </condition>
2438
2439     <condition id="ARMv8MML CMSIS">
2440       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2441       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2442       <require Cclass="CMSIS" Cgroup="CORE"/>
2443     </condition>
2444     <condition id="ARMv8MML CMSIS GCC">
2445       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2446       <require condition="ARMv8MML CMSIS"/>
2447       <require condition="GCC"/>
2448     </condition>
2449
2450     <condition id="ARMv81MML CMSIS">
2451       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2452       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2453       <require Cclass="CMSIS" Cgroup="CORE"/>
2454     </condition>
2455
2456     <condition id="ARMCA5 CMSIS">
2457       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2458       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2459       <require Cclass="CMSIS" Cgroup="CORE"/>
2460     </condition>
2461
2462     <condition id="ARMCA7 CMSIS">
2463       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2464       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2465       <require Cclass="CMSIS" Cgroup="CORE"/>
2466     </condition>
2467
2468     <condition id="ARMCA9 CMSIS">
2469       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2470       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2471       <require Cclass="CMSIS" Cgroup="CORE"/>
2472     </condition>
2473
2474     <!-- CMSIS DSP -->
2475     <condition id="CMSIS DSP">
2476       <description>Components required for DSP</description>
2477       <require condition="ARMv6_7_8-M Device"/>
2478       <require condition="ARMCC GCC IAR"/>
2479       <require Cclass="CMSIS" Cgroup="CORE"/>
2480     </condition>
2481
2482     <!-- CMSIS NN -->
2483     <condition id="CMSIS NN">
2484       <description>Components required for NN</description>
2485       <require condition="CMSIS DSP"/>
2486     </condition>
2487
2488     <!-- RTOS RTX -->
2489     <condition id="RTOS RTX">
2490       <description>Components required for RTOS RTX</description>
2491       <require condition="ARMv6_7-M Device"/>
2492       <require condition="ARMCC GCC IAR"/>
2493       <require Cclass="Device" Cgroup="Startup"/>
2494       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2495     </condition>
2496     <condition id="RTOS RTX IFX">
2497       <description>Components required for RTOS RTX IFX</description>
2498       <require condition="ARMv6_7-M Device"/>
2499       <require condition="ARMCC GCC IAR"/>
2500       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2501       <require Cclass="Device" Cgroup="Startup"/>
2502       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2503     </condition>
2504     <condition id="RTOS RTX5">
2505       <description>Components required for RTOS RTX5</description>
2506       <require condition="ARMv6_7_8-M Device"/>
2507       <require condition="ARMCC GCC IAR"/>
2508       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2509     </condition>
2510     <condition id="RTOS2 RTX5">
2511       <description>Components required for RTOS2 RTX5</description>
2512       <require condition="ARMv6_7_8-M Device"/>
2513       <require condition="ARMCC GCC IAR"/>
2514       <require Cclass="CMSIS"  Cgroup="CORE"/>
2515       <require Cclass="Device" Cgroup="Startup"/>
2516     </condition>
2517     <condition id="RTOS2 RTX5 v7-A">
2518       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2519       <require condition="ARMv7-A Device"/>
2520       <require condition="ARMCC GCC IAR"/>
2521       <require Cclass="CMSIS"  Cgroup="CORE"/>
2522       <require Cclass="Device" Cgroup="Startup"/>
2523       <require Cclass="Device" Cgroup="OS Tick"/>
2524       <require Cclass="Device" Cgroup="IRQ Controller"/>
2525     </condition>
2526     <condition id="RTOS2 RTX5 Lib">
2527       <description>Components required for RTOS2 RTX5 Library</description>
2528       <require condition="ARMv6_7_8-M Device"/>
2529       <require condition="ARMCC GCC IAR"/>
2530       <require Cclass="CMSIS"  Cgroup="CORE"/>
2531       <require Cclass="Device" Cgroup="Startup"/>
2532     </condition>
2533     <condition id="RTOS2 RTX5 NS">
2534       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2535       <require condition="ARMv8-M TZ Device"/>
2536       <require condition="ARMCC GCC IAR"/>
2537       <require Cclass="CMSIS"  Cgroup="CORE"/>
2538       <require Cclass="Device" Cgroup="Startup"/>
2539     </condition>
2540
2541     <!-- OS Tick -->
2542     <condition id="OS Tick PTIM">
2543       <description>Components required for OS Tick Private Timer</description>
2544       <require condition="CA5_CA9"/>
2545       <require Cclass="Device" Cgroup="IRQ Controller"/>
2546     </condition>
2547
2548     <condition id="OS Tick GTIM">
2549       <description>Components required for OS Tick Generic Physical Timer</description>
2550       <require condition="CA7"/>
2551       <require Cclass="Device" Cgroup="IRQ Controller"/>
2552     </condition>
2553
2554   </conditions>
2555
2556   <components>
2557     <!-- CMSIS-Core component -->
2558     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.2.0"  condition="ARMv6_7_8-M Device" >
2559       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2560       <files>
2561         <!-- CPU independent -->
2562         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2563         <file category="include" name="CMSIS/Core/Include/"/>
2564         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2565         <!-- Code template -->
2566         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2567         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2568       </files>
2569     </component>
2570
2571     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.3"  condition="ARMv7-A Device" >
2572       <description>CMSIS-CORE for Cortex-A</description>
2573       <files>
2574         <!-- CPU independent -->
2575         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2576         <file category="include" name="CMSIS/Core_A/Include/"/>
2577       </files>
2578     </component>
2579
2580     <!-- CMSIS-Startup components -->
2581     <!-- Cortex-M0 -->
2582     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2583       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2584       <files>
2585         <!-- include folder / device header file -->
2586         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2587         <!-- startup / system file -->
2588         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2589         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2590         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2591         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2592         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2593       </files>
2594     </component>
2595     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2596       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2597       <files>
2598         <!-- include folder / device header file -->
2599         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2600         <!-- startup / system file -->
2601         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2602         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2603         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2604       </files>
2605     </component>
2606
2607     <!-- Cortex-M0+ -->
2608     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2609       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2610       <files>
2611         <!-- include folder / device header file -->
2612         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2613         <!-- startup / system file -->
2614         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2615         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2616         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2617         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2618         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2619       </files>
2620     </component>
2621     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2622       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2623       <files>
2624         <!-- include folder / device header file -->
2625         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2626         <!-- startup / system file -->
2627         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2628         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2629         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2630       </files>
2631     </component>
2632
2633     <!-- Cortex-M1 -->
2634     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM1 CMSIS">
2635       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2636       <files>
2637         <!-- include folder / device header file -->
2638         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2639         <!-- startup / system file -->
2640         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2641         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.0.0" attr="config" condition="GCC"/>
2642         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2643         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2644         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2645       </files>
2646     </component>
2647     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM1 CMSIS GCC">
2648       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2649       <files>
2650         <!-- include folder / device header file -->
2651         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2652         <!-- startup / system file -->
2653         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.0.0" attr="config" condition="GCC"/>
2654         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2655         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2656       </files>
2657     </component>
2658
2659     <!-- Cortex-M3 -->
2660     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2661       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2662       <files>
2663         <!-- include folder / device header file -->
2664         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2665         <!-- startup / system file -->
2666         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2667         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2668         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2669         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2670         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2671       </files>
2672     </component>
2673     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2674       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2675       <files>
2676         <!-- include folder / device header file -->
2677         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2678         <!-- startup / system file -->
2679         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2680         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2681         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2682       </files>
2683     </component>
2684
2685     <!-- Cortex-M4 -->
2686     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2687       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2688       <files>
2689         <!-- include folder / device header file -->
2690         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2691         <!-- startup / system file -->
2692         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2693         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2694         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2695         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2696         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2697       </files>
2698     </component>
2699     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2700       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2701       <files>
2702         <!-- include folder / device header file -->
2703         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2704         <!-- startup / system file -->
2705         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2706         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2707         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2708       </files>
2709     </component>
2710
2711     <!-- Cortex-M7 -->
2712     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2713       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2714       <files>
2715         <!-- include folder / device header file -->
2716         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2717         <!-- startup / system file -->
2718         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2719         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2720         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2721         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2722         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2723       </files>
2724     </component>
2725     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2726       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2727       <files>
2728         <!-- include folder / device header file -->
2729         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2730         <!-- startup / system file -->
2731         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2732         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2733         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2734       </files>
2735     </component>
2736
2737     <!-- Cortex-M23 -->
2738     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2739       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2740       <files>
2741         <!-- include folder / device header file -->
2742         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2743         <!-- startup / system file -->
2744         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2745         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2746         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2747         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2748         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2749         <!-- SAU configuration -->
2750         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2751       </files>
2752     </component>
2753     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2754       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2755       <files>
2756         <!-- include folder / device header file -->
2757         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2758         <!-- startup / system file -->
2759         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2760         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2761         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2762         <!-- SAU configuration -->
2763         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2764       </files>
2765     </component>
2766
2767     <!-- Cortex-M33 -->
2768     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2769       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2770       <files>
2771         <!-- include folder / device header file -->
2772         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2773         <!-- startup / system file -->
2774         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2775         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2776         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2777         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2778         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2779         <!-- SAU configuration -->
2780         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2781       </files>
2782     </component>
2783     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2784       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2785       <files>
2786         <!-- include folder / device header file -->
2787         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2788         <!-- startup / system file -->
2789         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2790         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2791         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2792         <!-- SAU configuration -->
2793         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2794       </files>
2795     </component>
2796
2797     <!-- Cortex-M35P -->
2798     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM35P CMSIS">
2799       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2800       <files>
2801         <!-- include folder / device header file -->
2802         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2803         <!-- startup / system file -->
2804         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2805         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.0" attr="config" condition="GCC"/>
2806         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2807         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="IAR"/>
2808         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2809         <!-- SAU configuration -->
2810         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2811       </files>
2812     </component>
2813     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM35P CMSIS GCC">
2814       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2815       <files>
2816         <!-- include folder / device header file -->
2817         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2818         <!-- startup / system file -->
2819         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.c"         version="1.0.0" attr="config" condition="GCC"/>
2820         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2821         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2822         <!-- SAU configuration -->
2823         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2824       </files>
2825     </component>
2826
2827     <!-- Cortex-SC000 -->
2828     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2829       <description>System and Startup for Generic Arm SC000 device</description>
2830       <files>
2831         <!-- include folder / device header file -->
2832         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2833         <!-- startup / system file -->
2834         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2835         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2836         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2837         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2838         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2839       </files>
2840     </component>
2841     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2842       <description>System and Startup for Generic Arm SC000 device</description>
2843       <files>
2844         <!-- include folder / device header file -->
2845         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2846         <!-- startup / system file -->
2847         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2848         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2849         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2850       </files>
2851     </component>
2852
2853     <!-- Cortex-SC300 -->
2854     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2855       <description>System and Startup for Generic Arm SC300 device</description>
2856       <files>
2857         <!-- include folder / device header file -->
2858         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2859         <!-- startup / system file -->
2860         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2861         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2862         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2863         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2864         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2865       </files>
2866     </component>
2867     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2868       <description>System and Startup for Generic Arm SC300 device</description>
2869       <files>
2870         <!-- include folder / device header file -->
2871         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2872         <!-- startup / system file -->
2873         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2874         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2875         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2876       </files>
2877     </component>
2878
2879     <!-- ARMv8MBL -->
2880     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2881       <description>System and Startup for Generic Armv8-M Baseline device</description>
2882       <files>
2883         <!-- include folder / device header file -->
2884         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2885         <!-- startup / system file -->
2886         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2887         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2888         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2889         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2890         <!-- SAU configuration -->
2891         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2892       </files>
2893     </component>
2894     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2895       <description>System and Startup for Generic Armv8-M Baseline device</description>
2896       <files>
2897         <!-- include folder / device header file -->
2898         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2899         <!-- startup / system file -->
2900         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2901         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2902         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2903         <!-- SAU configuration -->
2904         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2905       </files>
2906     </component>
2907
2908     <!-- ARMv8MML -->
2909     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2910       <description>System and Startup for Generic Armv8-M Mainline device</description>
2911       <files>
2912         <!-- include folder / device header file -->
2913         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2914         <!-- startup / system file -->
2915         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2916         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2917         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2918         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2919         <!-- SAU configuration -->
2920         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2921       </files>
2922     </component>
2923     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2924       <description>System and Startup for Generic Armv8-M Mainline device</description>
2925       <files>
2926         <!-- include folder / device header file -->
2927         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2928         <!-- startup / system file -->
2929         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2930         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2931         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2932         <!-- SAU configuration -->
2933         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2934       </files>
2935     </component>
2936
2937     <!-- ARMv81MML -->
2938     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv81MML CMSIS">
2939       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2940       <files>
2941         <!-- include folder / device header file -->
2942         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2943         <file category="header"       name="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h"/>
2944         <!-- startup / system file -->
2945         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/ARM/startup_ARMv81MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2946         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML.sct"               version="1.0.0" attr="config" condition="ARMCC"/>
2947         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2948         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2949         <file category="sourceAsm"    name="Device/ARM/ARMv81MML/Source/IAR/startup_ARMv81MML.s"         version="1.0.0" attr="config" condition="IAR"/>
2950         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2951         <!-- SAU configuration -->
2952         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2953       </files>
2954     </component>
2955     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv81MML CMSIS">
2956       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2957       <files>
2958         <!-- include folder / device header file -->
2959         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2960         <!-- startup / system file -->
2961         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/ARM/startup_ARMv81MML.c"         version="1.0.0" attr="config" condition="ARMCC"/>
2962         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML.sct"               version="1.0.0" attr="config" condition="ARMCC"/>
2963         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/GCC/startup_ARMv81MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2964         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2965         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/IAR/startup_ARMv81MML.c"         version="1.0.0" attr="config" condition="IAR"/>
2966         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2967         <!-- SAU configuration -->
2968         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2969       </files>
2970     </component>
2971
2972     <!-- Cortex-A5 -->
2973     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2974       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2975       <files>
2976         <!-- include folder / device header file -->
2977         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2978         <!-- startup / system / mmu files -->
2979         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2980         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2981         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2982         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2983         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2984         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2985         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2986         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2987         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2988         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2989         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2990         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2991
2992       </files>
2993     </component>
2994
2995     <!-- Cortex-A7 -->
2996     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2997       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2998       <files>
2999         <!-- include folder / device header file -->
3000         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3001         <!-- startup / system / mmu files -->
3002         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3003         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3004         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3005         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3006         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3007         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3008         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3009         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3010         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
3011         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
3012         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
3013         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
3014       </files>
3015     </component>
3016
3017     <!-- Cortex-A9 -->
3018     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3019       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3020       <files>
3021         <!-- include folder / device header file -->
3022         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3023         <!-- startup / system / mmu files -->
3024         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3025         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3026         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3027         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3028         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3029         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3030         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3031         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3032         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
3033         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
3034         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
3035         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
3036       </files>
3037     </component>
3038
3039     <!-- IRQ Controller -->
3040     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3041       <description>IRQ Controller implementation using GIC</description>
3042       <files>
3043         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3044       </files>
3045     </component>
3046
3047     <!-- OS Tick -->
3048     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3049       <description>OS Tick implementation using Private Timer</description>
3050       <files>
3051         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3052       </files>
3053     </component>
3054
3055     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3056       <description>OS Tick implementation using Generic Physical Timer</description>
3057       <files>
3058         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3059       </files>
3060     </component>
3061
3062     <!-- CMSIS-DSP component -->
3063     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.5.5" isDefaultVariant="true" condition="CMSIS DSP">
3064       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3065       <files>
3066         <!-- CPU independent -->
3067         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3068         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3069
3070         <!-- CPU and Compiler dependent -->
3071         <!-- ARMCC -->
3072         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3073         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3074         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3075         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3076         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3077         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3078         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3079         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3080         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3081         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3082         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3083         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3084         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3085         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3086         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3087         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3088
3089         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3090         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3091         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3092         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3093         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3094         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3095         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3096         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3097         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3098         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3099         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3100         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3101         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3102         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3103         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3104         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3105
3106         <!-- GCC -->
3107         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3108         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3109         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3110         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3111         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3112         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3113         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3114         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3115
3116         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3117         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3118         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3119         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3120         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3121         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3122         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3123         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3124         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3125         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3126         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3127         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3128         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3129         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3130         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3131         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3132
3133         <!-- IAR -->
3134         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3135         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3136         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3137         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3138         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3139         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3140         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3141         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3142         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3143         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3144         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3145         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3146         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3147         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3148         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3149         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3150
3151         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3152         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3153         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3154         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3155         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3156         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3157         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3158         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3159         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3160         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3161         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3162         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3163         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3164         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3165         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3166         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3167
3168       </files>
3169     </component>
3170     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.5.5" condition="CMSIS DSP">
3171       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3172       <files>
3173         <!-- CPU independent -->
3174         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3175         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3176
3177         <!-- RTX sources (core) -->
3178         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3179         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3180         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3181         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3182         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3183         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3184         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3185         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3186         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3187         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3188
3189       </files>
3190     </component>
3191
3192     <!-- CMSIS-NN component -->
3193     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.1.0" condition="CMSIS NN">
3194       <description>CMSIS-NN Neural Network Library</description>
3195       <files>
3196         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3197         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3198
3199         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3200         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3201         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3202         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3203
3204         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3205         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3206         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3207         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3208         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3209         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3210         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3211         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3212         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3213         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3214         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3215         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3216
3217         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3218         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3219         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3220         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3221         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3222         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3223
3224         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3225         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3226         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3227         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3228         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3229
3230         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3231
3232         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3233         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3234       </files>
3235     </component>
3236
3237     <!-- CMSIS-RTOS Keil RTX component -->
3238     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3239       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3240       <RTE_Components_h>
3241         <!-- the following content goes into file 'RTE_Components.h' -->
3242         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3243         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3244       </RTE_Components_h>
3245       <files>
3246         <!-- CPU independent -->
3247         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3248         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3249         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3250
3251         <!-- RTX templates -->
3252         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3253         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3254         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3255         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3256         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3257         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3258         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3259         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3260         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3261         <!-- tool-chain specific template file -->
3262         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3263         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3264         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3265
3266         <!-- CPU and Compiler dependent -->
3267         <!-- ARMCC -->
3268         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3269         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3270         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3271         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3272         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3273         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3274         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3275         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3276         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3277         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3278         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3279         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3280         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3281         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3282         <!-- GCC -->
3283         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3284         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3285         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3286         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3287         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3288         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3289         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3290         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3291         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3292         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3293         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3294         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3295         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3296         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3297         <!-- IAR -->
3298         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3299         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3300         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3301         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3302         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3303         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3304         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3305         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3306         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3307         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3308         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3309         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3310         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3311         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3312       </files>
3313     </component>
3314     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3315     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
3316       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3317       <RTE_Components_h>
3318         <!-- the following content goes into file 'RTE_Components.h' -->
3319         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3320         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3321       </RTE_Components_h>
3322       <files>
3323         <!-- CPU independent -->
3324         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3325         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3326         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3327
3328         <!-- RTX templates -->
3329         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3330         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3331         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3332         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3333         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3334         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3335         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3336         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3337         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3338         <!-- tool-chain specific template file -->
3339         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3340         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3341         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3342
3343         <!-- CPU and Compiler dependent -->
3344         <!-- ARMCC -->
3345         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3346         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3347         <!-- GCC -->
3348         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3349         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3350         <!-- IAR -->
3351       </files>
3352     </component>
3353
3354     <!-- CMSIS-RTOS Keil RTX5 component -->
3355     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.0" Capiversion="1.0.0" condition="RTOS RTX5">
3356       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3357       <RTE_Components_h>
3358         <!-- the following content goes into file 'RTE_Components.h' -->
3359         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3360         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3361       </RTE_Components_h>
3362       <files>
3363         <!-- RTX header file -->
3364         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3365         <!-- RTX compatibility module for API V1 -->
3366         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3367       </files>
3368     </component>
3369
3370     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3371     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3372       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3373       <RTE_Components_h>
3374         <!-- the following content goes into file 'RTE_Components.h' -->
3375         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3376         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3377       </RTE_Components_h>
3378       <files>
3379         <!-- RTX documentation -->
3380         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3381
3382         <!-- RTX header files -->
3383         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3384
3385         <!-- RTX configuration -->
3386         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3387         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3388
3389         <!-- RTX templates -->
3390         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3391         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3392         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3393         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3394         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3395         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3396         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3397         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3398         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3399         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3400
3401         <!-- RTX library configuration -->
3402         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3403
3404         <!-- RTX libraries (CPU and Compiler dependent) -->
3405         <!-- ARMCC -->
3406         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3407         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3408         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3409         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3410         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3411         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3412         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3413         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3414         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3415         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3416         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3417         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3418         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3419         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3420         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3421         <!-- GCC -->
3422         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3423         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3424         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3425         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3426         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3427         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3428         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3429         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3430         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3431         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3432         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3433         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3434         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3435         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3436         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3437         <!-- IAR -->
3438         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3439         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3440         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3441         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3442         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3443         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3444         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3445         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3446         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3447         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3448         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3449         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3450         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3451         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3452         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3453       </files>
3454     </component>
3455     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3456       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3457       <RTE_Components_h>
3458         <!-- the following content goes into file 'RTE_Components.h' -->
3459         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3460         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3461         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3462       </RTE_Components_h>
3463       <files>
3464         <!-- RTX documentation -->
3465         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3466
3467         <!-- RTX header files -->
3468         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3469
3470         <!-- RTX configuration -->
3471         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3472         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3473
3474         <!-- RTX templates -->
3475         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3476         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3477         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3478         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3479         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3480         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3481         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3482         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3483         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3484         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3485
3486         <!-- RTX library configuration -->
3487         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3488
3489         <!-- RTX libraries (CPU and Compiler dependent) -->
3490         <!-- ARMCC -->
3491         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3492         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3493         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3494         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3495         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3496         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3497         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3498         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3499         <!-- GCC -->
3500         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3501         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3502         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3503         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3504         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3505         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3506         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3507         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3508         <!-- IAR -->
3509         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3510         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3512         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3513         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3514         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3515         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3517       </files>
3518     </component>
3519     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
3520       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3521       <RTE_Components_h>
3522         <!-- the following content goes into file 'RTE_Components.h' -->
3523         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3524         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3525         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3526       </RTE_Components_h>
3527       <files>
3528         <!-- RTX documentation -->
3529         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3530
3531         <!-- RTX header files -->
3532         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3533
3534         <!-- RTX configuration -->
3535         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3536         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3537
3538         <!-- RTX templates -->
3539         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3540         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3541         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3542         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3543         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3544         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3545         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3546         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3547         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3548         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3549
3550         <!-- RTX sources (core) -->
3551         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3552         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3553         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3554         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3555         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3556         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3557         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3558         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3559         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3560         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3561         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3562         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3563         <!-- RTX sources (library configuration) -->
3564         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3565         <!-- RTX sources (handlers ARMCC) -->
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3569         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3571         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3578         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3581         <!-- RTX sources (handlers GCC) -->
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3596         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3597         <!-- RTX sources (handlers IAR) -->
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3603         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3604         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3605         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3606         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3607         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3608         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3609         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3610         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3611         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3612         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3613         <!-- OS Tick (SysTick) -->
3614         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3615       </files>
3616     </component>
3617     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3618       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3619       <RTE_Components_h>
3620         <!-- the following content goes into file 'RTE_Components.h' -->
3621         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3622         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3623         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3624       </RTE_Components_h>
3625       <files>
3626         <!-- RTX documentation -->
3627         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3628
3629         <!-- RTX header files -->
3630         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3631
3632         <!-- RTX configuration -->
3633         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3634         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3635
3636         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3637
3638         <!-- RTX templates -->
3639         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3640         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3641         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3642         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3643         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3644         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3645         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3646         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3647         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3648         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3649
3650         <!-- RTX sources (core) -->
3651         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3652         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3653         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3654         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3655         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3656         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3657         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3658         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3659         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3660         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3661         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3662         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3663         <!-- RTX sources (library configuration) -->
3664         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3665         <!-- RTX sources (handlers ARMCC) -->
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3668         <!-- RTX sources (handlers GCC) -->
3669         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3670         <!-- RTX sources (handlers IAR) -->
3671         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3672       </files>
3673     </component>
3674     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3675       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3676       <RTE_Components_h>
3677         <!-- the following content goes into file 'RTE_Components.h' -->
3678         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3679         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3680         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3681         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3682       </RTE_Components_h>
3683       <files>
3684         <!-- RTX documentation -->
3685         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3686
3687         <!-- RTX header files -->
3688         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3689
3690         <!-- RTX configuration -->
3691         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3692         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3693
3694         <!-- RTX templates -->
3695         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3696         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3697         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3698         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3699         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3700         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3701         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3702         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3703         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3704         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3705
3706         <!-- RTX sources (core) -->
3707         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3708         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3709         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3710         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3711         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3712         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3713         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3714         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3715         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3716         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3717         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3718         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3719         <!-- RTX sources (library configuration) -->
3720         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3721         <!-- RTX sources (ARMCC handlers) -->
3722         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3723         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3724         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3725         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3726         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3727         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3728         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3729         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3730         <!-- RTX sources (GCC handlers) -->
3731         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3732         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3733         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3734         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3735         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3736         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3737         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3738         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3739         <!-- RTX sources (IAR handlers) -->
3740         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3741         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3742         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3743         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3745         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3747         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3748         <!-- OS Tick (SysTick) -->
3749         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3750       </files>
3751     </component>
3752
3753     <!-- CMSIS-Driver Custom components -->
3754     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3755       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3756       <files>
3757         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3758         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3759       </files>
3760     </component>
3761     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3762       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3763       <files>
3764         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3765         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3766       </files>
3767     </component>
3768     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3769       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3770       <files>
3771         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3772         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3773       </files>
3774     </component>
3775     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3776       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3777       <files>
3778         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3779         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3780       </files>
3781     </component>
3782     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3783       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3784       <files>
3785         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3786         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3787       </files>
3788     </component>
3789     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3790       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3791       <files>
3792         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3793         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3794       </files>
3795     </component>
3796     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3797       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3798       <files>
3799         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3800         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3801       </files>
3802     </component>
3803     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3804       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3805       <files>
3806         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3807         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3808       </files>
3809     </component>
3810     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3811       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3812       <files>
3813         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3814         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3815         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3816         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3817       </files>
3818     </component>
3819     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3820       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3821       <files>
3822         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3823         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3824       </files>
3825     </component>
3826     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3827       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3828       <files>
3829         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3830         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3831       </files>
3832     </component>
3833     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3834       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3835       <files>
3836         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3837         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3838       </files>
3839     </component>
3840     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3841       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3842       <files>
3843         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3844         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3845       </files>
3846     </component>
3847     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0-beta" Capiversion="1.0.0-beta">
3848       <description>Access to #include Driver_WiFi.h file</description>
3849       <files>
3850         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3851         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3852       </files>
3853     </component>
3854   </components>
3855
3856   <boards>
3857     <board name="uVision Simulator" vendor="Keil">
3858       <description>uVision Simulator</description>
3859       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3860       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3861       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3862       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3863       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3864       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3865       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3866       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3867       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3868       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3869       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3870       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3871       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3872       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3873       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3874       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3875       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3876       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3877       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3878       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3879       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3880       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3881       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3882       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3883     </board>
3884
3885     <board name="EWARM Simulator" vendor="IAR">
3886       <description>EWARM Simulator</description>
3887       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3888       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3889       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3890       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3891       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3892       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3893       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3894       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3895       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3896       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3897       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3898       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3899       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3900       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3901       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3902       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3903       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3904       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3905       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3906       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3907       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3908       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3909       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3910       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3911     </board>
3912   </boards>
3913
3914   <examples>
3915     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3916       <description>DSP_Lib Class Marks example</description>
3917       <board name="uVision Simulator" vendor="Keil"/>
3918       <project>
3919         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3920       </project>
3921       <attributes>
3922         <component Cclass="CMSIS" Cgroup="CORE"/>
3923         <component Cclass="CMSIS" Cgroup="DSP"/>
3924         <component Cclass="Device" Cgroup="Startup"/>
3925         <category>Getting Started</category>
3926       </attributes>
3927     </example>
3928
3929     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3930       <description>DSP_Lib Convolution example</description>
3931       <board name="uVision Simulator" vendor="Keil"/>
3932       <project>
3933         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3934       </project>
3935       <attributes>
3936         <component Cclass="CMSIS" Cgroup="CORE"/>
3937         <component Cclass="CMSIS" Cgroup="DSP"/>
3938         <component Cclass="Device" Cgroup="Startup"/>
3939         <category>Getting Started</category>
3940       </attributes>
3941     </example>
3942
3943     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3944       <description>DSP_Lib Dotproduct example</description>
3945       <board name="uVision Simulator" vendor="Keil"/>
3946       <project>
3947         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3948       </project>
3949       <attributes>
3950         <component Cclass="CMSIS" Cgroup="CORE"/>
3951         <component Cclass="CMSIS" Cgroup="DSP"/>
3952         <component Cclass="Device" Cgroup="Startup"/>
3953         <category>Getting Started</category>
3954       </attributes>
3955     </example>
3956
3957     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3958       <description>DSP_Lib FFT Bin example</description>
3959       <board name="uVision Simulator" vendor="Keil"/>
3960       <project>
3961         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3962       </project>
3963       <attributes>
3964         <component Cclass="CMSIS" Cgroup="CORE"/>
3965         <component Cclass="CMSIS" Cgroup="DSP"/>
3966         <component Cclass="Device" Cgroup="Startup"/>
3967         <category>Getting Started</category>
3968       </attributes>
3969     </example>
3970
3971     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3972       <description>DSP_Lib FIR example</description>
3973       <board name="uVision Simulator" vendor="Keil"/>
3974       <project>
3975         <environment name="uv" load="arm_fir_example.uvprojx"/>
3976       </project>
3977       <attributes>
3978         <component Cclass="CMSIS" Cgroup="CORE"/>
3979         <component Cclass="CMSIS" Cgroup="DSP"/>
3980         <component Cclass="Device" Cgroup="Startup"/>
3981         <category>Getting Started</category>
3982       </attributes>
3983     </example>
3984
3985     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3986       <description>DSP_Lib Graphic Equalizer example</description>
3987       <board name="uVision Simulator" vendor="Keil"/>
3988       <project>
3989         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3990       </project>
3991       <attributes>
3992         <component Cclass="CMSIS" Cgroup="CORE"/>
3993         <component Cclass="CMSIS" Cgroup="DSP"/>
3994         <component Cclass="Device" Cgroup="Startup"/>
3995         <category>Getting Started</category>
3996       </attributes>
3997     </example>
3998
3999     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4000       <description>DSP_Lib Linear Interpolation example</description>
4001       <board name="uVision Simulator" vendor="Keil"/>
4002       <project>
4003         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4004       </project>
4005       <attributes>
4006         <component Cclass="CMSIS" Cgroup="CORE"/>
4007         <component Cclass="CMSIS" Cgroup="DSP"/>
4008         <component Cclass="Device" Cgroup="Startup"/>
4009         <category>Getting Started</category>
4010       </attributes>
4011     </example>
4012
4013     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4014       <description>DSP_Lib Matrix example</description>
4015       <board name="uVision Simulator" vendor="Keil"/>
4016       <project>
4017         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4018       </project>
4019       <attributes>
4020         <component Cclass="CMSIS" Cgroup="CORE"/>
4021         <component Cclass="CMSIS" Cgroup="DSP"/>
4022         <component Cclass="Device" Cgroup="Startup"/>
4023         <category>Getting Started</category>
4024       </attributes>
4025     </example>
4026
4027     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4028       <description>DSP_Lib Signal Convergence example</description>
4029       <board name="uVision Simulator" vendor="Keil"/>
4030       <project>
4031         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4032       </project>
4033       <attributes>
4034         <component Cclass="CMSIS" Cgroup="CORE"/>
4035         <component Cclass="CMSIS" Cgroup="DSP"/>
4036         <component Cclass="Device" Cgroup="Startup"/>
4037         <category>Getting Started</category>
4038       </attributes>
4039     </example>
4040
4041     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4042       <description>DSP_Lib Sinus/Cosinus example</description>
4043       <board name="uVision Simulator" vendor="Keil"/>
4044       <project>
4045         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4046       </project>
4047       <attributes>
4048         <component Cclass="CMSIS" Cgroup="CORE"/>
4049         <component Cclass="CMSIS" Cgroup="DSP"/>
4050         <component Cclass="Device" Cgroup="Startup"/>
4051         <category>Getting Started</category>
4052       </attributes>
4053     </example>
4054
4055     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4056       <description>DSP_Lib Variance example</description>
4057       <board name="uVision Simulator" vendor="Keil"/>
4058       <project>
4059         <environment name="uv" load="arm_variance_example.uvprojx"/>
4060       </project>
4061       <attributes>
4062         <component Cclass="CMSIS" Cgroup="CORE"/>
4063         <component Cclass="CMSIS" Cgroup="DSP"/>
4064         <component Cclass="Device" Cgroup="Startup"/>
4065         <category>Getting Started</category>
4066       </attributes>
4067     </example>
4068
4069     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4070       <description>Neural Network CIFAR10 example</description>
4071       <board name="uVision Simulator" vendor="Keil"/>
4072       <project>
4073         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4074       </project>
4075       <attributes>
4076         <component Cclass="CMSIS" Cgroup="CORE"/>
4077         <component Cclass="CMSIS" Cgroup="DSP"/>
4078         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4079         <component Cclass="Device" Cgroup="Startup"/>
4080         <category>Getting Started</category>
4081       </attributes>
4082     </example>
4083
4084     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4085       <description>Neural Network CIFAR10 example</description>
4086       <board name="EWARM Simulator" vendor="IAR"/>
4087       <project>
4088         <environment name="iar" load="NN-example-cifar10.ewp"/>
4089       </project>
4090       <attributes>
4091         <component Cclass="CMSIS" Cgroup="CORE"/>
4092         <component Cclass="CMSIS" Cgroup="DSP"/>
4093         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4094         <component Cclass="Device" Cgroup="Startup"/>
4095         <category>Getting Started</category>
4096       </attributes>
4097     </example>
4098
4099     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4100       <description>Neural Network GRU example</description>
4101       <board name="uVision Simulator" vendor="Keil"/>
4102       <project>
4103         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4104       </project>
4105       <attributes>
4106         <component Cclass="CMSIS" Cgroup="CORE"/>
4107         <component Cclass="CMSIS" Cgroup="DSP"/>
4108         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4109         <component Cclass="Device" Cgroup="Startup"/>
4110         <category>Getting Started</category>
4111       </attributes>
4112     </example>
4113
4114     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4115       <description>Neural Network GRU example</description>
4116       <board name="EWARM Simulator" vendor="IAR"/>
4117       <project>
4118         <environment name="iar" load="NN-example-gru.ewp"/>
4119       </project>
4120       <attributes>
4121         <component Cclass="CMSIS" Cgroup="CORE"/>
4122         <component Cclass="CMSIS" Cgroup="DSP"/>
4123         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4124         <component Cclass="Device" Cgroup="Startup"/>
4125         <category>Getting Started</category>
4126       </attributes>
4127     </example>
4128
4129     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4130       <description>CMSIS-RTOS2 Blinky example</description>
4131       <board name="uVision Simulator" vendor="Keil"/>
4132       <project>
4133         <environment name="uv" load="Blinky.uvprojx"/>
4134       </project>
4135       <attributes>
4136         <component Cclass="CMSIS" Cgroup="CORE"/>
4137         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4138         <component Cclass="Device" Cgroup="Startup"/>
4139         <category>Getting Started</category>
4140       </attributes>
4141     </example>
4142
4143     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4144       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4145       <board name="uVision Simulator" vendor="Keil"/>
4146       <project>
4147         <environment name="uv" load="Blinky.uvprojx"/>
4148       </project>
4149       <attributes>
4150         <component Cclass="CMSIS" Cgroup="CORE"/>
4151         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4152         <component Cclass="Device" Cgroup="Startup"/>
4153         <category>Getting Started</category>
4154       </attributes>
4155     </example>
4156
4157     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4158       <description>CMSIS-RTOS2 Message Queue Example</description>
4159       <board name="uVision Simulator" vendor="Keil"/>
4160       <project>
4161         <environment name="uv" load="MsqQueue.uvprojx"/>
4162       </project>
4163       <attributes>
4164         <component Cclass="CMSIS" Cgroup="CORE"/>
4165         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4166         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4167         <component Cclass="Device" Cgroup="Startup"/>
4168         <category>Getting Started</category>
4169       </attributes>
4170     </example>
4171
4172     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4173       <description>CMSIS-RTOS2 Memory Pool Example</description>
4174       <board name="uVision Simulator" vendor="Keil"/>
4175       <project>
4176         <environment name="uv" load="MemPool.uvprojx"/>
4177       </project>
4178       <attributes>
4179         <component Cclass="CMSIS" Cgroup="CORE"/>
4180         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4181         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4182         <component Cclass="Device" Cgroup="Startup"/>
4183         <category>Getting Started</category>
4184       </attributes>
4185     </example>
4186
4187     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4188       <description>Bare-metal secure/non-secure example without RTOS</description>
4189       <board name="uVision Simulator" vendor="Keil"/>
4190       <project>
4191         <environment name="uv" load="NoRTOS.uvmpw"/>
4192       </project>
4193       <attributes>
4194         <component Cclass="CMSIS" Cgroup="CORE"/>
4195         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4196         <component Cclass="Device" Cgroup="Startup"/>
4197         <category>Getting Started</category>
4198       </attributes>
4199     </example>
4200
4201     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4202       <description>Secure/non-secure RTOS example with thread context management</description>
4203       <board name="uVision Simulator" vendor="Keil"/>
4204       <project>
4205         <environment name="uv" load="RTOS.uvmpw"/>
4206       </project>
4207       <attributes>
4208         <component Cclass="CMSIS" Cgroup="CORE"/>
4209         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4210         <component Cclass="Device" Cgroup="Startup"/>
4211         <category>Getting Started</category>
4212       </attributes>
4213     </example>
4214
4215     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4216       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4217       <board name="uVision Simulator" vendor="Keil"/>
4218       <project>
4219         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4220       </project>
4221       <attributes>
4222         <component Cclass="CMSIS" Cgroup="CORE"/>
4223         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4224         <component Cclass="Device" Cgroup="Startup"/>
4225         <category>Getting Started</category>
4226       </attributes>
4227     </example>
4228
4229   </examples>
4230
4231 </package>