begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.1-dev0">
  12       CMSIS_Core:
  13        - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  14        - Updated template for secure main function (main_s.c)
  15       CMSIS-RTOS2:
  16        - RTX 5.0.1 (see revision history for details)
  17     </release>
  18     <release version="5.0.0" date="2016-11-11">
  19       Changed open source license to Apache 2.0
  20       CMSIS_Core:
  21        - Added support for Cortex-M23 and Cortex-M33.
  22        - Added ARMv8-M device configurations for mainline and baseline.
  23        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  24        - Added cmsis_compiler.h to unify compiler behaviour.
  25        - Updated function SCB_EnableICache (for Cortex-M7).
  26        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  27       CMSIS-RTOS:
  28         - bug fix in RTX 4.82 (see revision history for details)
  29       CMSIS-RTOS2:
  30         - new API including compatibility layer to CMSIS-RTOS
  31         - reference implementation based on RTX5
  32         - supports all Cortex-M variants including TrustZone for ARMv8-M
  33       CMSIS-SVD:
  34        - reworked SVD format documentation
  35        - removed SVD file database documentation as SVD files are distributed in packs
  36        - updated SVDConv for Win32 and Linux
  37       CMSIS-DSP:
  38        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  39        - Added DSP libraries build projects to CMSIS pack.
  40     </release>
  41     <release version="4.5.0" date="2015-10-28">
  42       - CMSIS-Core     4.30.0  (see revision history for details)
  43       - CMSIS-DAP      1.1.0   (unchanged)
  44       - CMSIS-Driver   2.04.0  (see revision history for details)
  45       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  46       - CMSIS-PACK     1.4.1   (see revision history for details)
  47       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  48       - CMSIS-SVD      1.3.1   (see revision history for details)
  49     </release>
  50     <release version="4.4.0" date="2015-09-11">
  51       - CMSIS-Core     4.20   (see revision history for details)
  52       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  53       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  54       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  55       - CMSIS-RTOS
  56         -- API         1.02   (unchanged)
  57         -- RTX         4.79   (see revision history for details)
  58       - CMSIS-SVD      1.3.0  (see revision history for details)
  59       - CMSIS-DAP      1.1.0  (extended with SWO support)
  60     </release>
  61     <release version="4.3.0" date="2015-03-20">
  62       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  63       - CMSIS-DSP      1.4.5  (see revision history for details)
  64       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  65       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  66       - CMSIS-RTOS
  67         -- API         1.02   (unchanged)
  68         -- RTX         4.78   (see revision history for details)
  69       - CMSIS-SVD      1.2    (unchanged)
  70     </release>
  71     <release version="4.2.0" date="2014-09-24">
  72       Adding Cortex-M7 support
  73       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
  74       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
  75       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
  76       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
  77       - CMSIS-RTOS RTX 4.75  (see revision history for details)
  78     </release>
  79     <release version="4.1.1" date="2014-06-30">
  80       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
  81     </release>
  82     <release version="4.1.0" date="2014-06-12">
  83       - CMSIS-Driver   2.02  (incompatible update)
  84       - CMSIS-Pack     1.3   (see revision history for details)
  85       - CMSIS-DSP      1.4.2 (unchanged)
  86       - CMSIS-Core     3.30  (unchanged)
  87       - CMSIS-RTOS RTX 4.74  (unchanged)
  88       - CMSIS-RTOS API 1.02  (unchanged)
  89       - CMSIS-SVD      1.10  (unchanged)
  90       PACK:
  91       - removed G++ specific files from PACK
  92       - added Component Startup variant "C Startup"
  93       - added Pack Checking Utility
  94       - updated conditions to reflect tool-chain dependency
  95       - added Taxonomy for Graphics
  96       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
  97     </release>
  98     <release version="4.0.0">
  99       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 100       - CMSIS-Pack     1.1   Preliminary
 101       - CMSIS-DSP      1.4.2 (see revision history for details)
 102       - CMSIS-Core     3.30  (see revision history for details)
 103       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 104       - CMSIS-RTOS API 1.02  (unchanged)
 105       - CMSIS-SVD      1.10  (unchanged)
 106     </release>
 107     <release version="3.20.4">
 108       - CMSIS-RTOS 4.74 (see revision history for details)
 109       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 110     </release>
 111     <release version="3.20.3">
 112       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 113       - CMSIS-RTOS 4.73 (see revision history for details)
 114     </release>
 115     <release version="3.20.2">
 116       - CMSIS-Pack documentation has been added
 117       - CMSIS-Drivers header and documentation have been added to PACK
 118       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 119     </release>
 120     <release version="3.20.1">
 121       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 122       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 123     </release>
 124     <release version="3.20.0">
 125       The software portions that are deployed in the application program are now under a BSD license which allows usage
 126       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 127       The individual components have been update as listed below:
 128       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 129       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 130       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 131       - CMSIS-SVD is unchanged.
 132     </release>
 133   </releases>
 134
 135   <taxonomy>
 136     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 137     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 138     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 139     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 140     <description Cclass="File System">File Drive Support and File System</description>
 141     <description Cclass="Graphics">Graphical User Interface</description>
 142     <description Cclass="Network">Network Stack using Internet Protocols</description>
 143     <description Cclass="USB">Universal Serial Bus Stack</description>
 144     <description Cclass="Compiler">ARM Compiler Software Extensions</description>
 145   </taxonomy>
 146
 147   <devices>
 148     <!-- ******************************  Cortex-M0  ****************************** -->
 149     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 150       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 151       <description>
 152 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 153 - simple, easy-to-use programmers model
 154 - highly efficient ultra-low power operation
 155 - excellent code density
 156 - deterministic, high-performance interrupt handling
 157 - upward compatibility with the rest of the Cortex-M processor family.
 158       </description>
 159       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 160       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 161       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 162       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 163
 164       <device Dname="ARMCM0">
 165         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 166         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 167       </device>
 168     </family>
 169
 170     <!-- ******************************  Cortex-M0P  ****************************** -->
 171     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 172       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 173       <description>
 174 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 175 - simple, easy-to-use programmers model
 176 - highly efficient ultra-low power operation
 177 - excellent code density
 178 - deterministic, high-performance interrupt handling
 179 - upward compatibility with the rest of the Cortex-M processor family.
 180       </description>
 181       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 182       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 183       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 184       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 185
 186       <device Dname="ARMCM0P">
 187         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 188         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 189       </device>
 190     </family>
 191
 192     <!-- ******************************  Cortex-M3  ****************************** -->
 193     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 194       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 195       <description>
 196 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 197 - simple, easy-to-use programmers model
 198 - highly efficient ultra-low power operation
 199 - excellent code density
 200 - deterministic, high-performance interrupt handling
 201 - upward compatibility with the rest of the Cortex-M processor family.
 202       </description>
 203       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 204       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 205       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 206       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 207
 208       <device Dname="ARMCM3">
 209         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 210         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 211       </device>
 212     </family>
 213
 214     <!-- ******************************  Cortex-M4  ****************************** -->
 215     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 216       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 217       <description>
 218 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 219 - simple, easy-to-use programmers model
 220 - highly efficient ultra-low power operation
 221 - excellent code density
 222 - deterministic, high-performance interrupt handling
 223 - upward compatibility with the rest of the Cortex-M processor family.
 224       </description>
 225       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 226       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 227       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 228       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 229
 230       <device Dname="ARMCM4">
 231         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 232         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 233       </device>
 234
 235       <device Dname="ARMCM4_FP">
 236         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 237         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 238       </device>
 239     </family>
 240
 241     <!-- ******************************  Cortex-M7  ****************************** -->
 242     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 243       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 244       <description>
 245 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 246 - simple, easy-to-use programmers model
 247 - highly efficient ultra-low power operation
 248 - excellent code density
 249 - deterministic, high-performance interrupt handling
 250 - upward compatibility with the rest of the Cortex-M processor family.
 251       </description>
 252       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 253       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 254       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 255       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 256
 257       <device Dname="ARMCM7">
 258         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 259         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 260       </device>
 261
 262       <device Dname="ARMCM7_SP">
 263         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 264         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 265       </device>
 266
 267       <device Dname="ARMCM7_DP">
 268         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 269         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 270       </device>
 271     </family>
 272
 273     <!-- ******************************  Cortex-M23  ********************** -->
 274     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 275       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 276       <description>
 277 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 278 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 279 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 280       </description>
 281       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 282       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 283       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 284       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 285       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 286       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 287
 288       <device Dname="ARMCM23">
 289         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 290         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 291       </device>
 292
 293       <device Dname="ARMCM23_TZ">
 294         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 295         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 296       </device>
 297     </family>
 298
 299     <!-- ******************************  Cortex-M33  ****************************** -->
 300     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 301       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 302       <description>
 303 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 304 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 305       </description>
 306       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 307       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 308       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 309       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 310       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 311       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 312
 313       <device Dname="ARMCM33">
 314         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 315         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 316       </device>
 317
 318       <device Dname="ARMCM33_TZ">
 319         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 320         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 321       </device>
 322
 323       <device Dname="ARMCM33_DSP_FP">
 324         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 325         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 326       </device>
 327
 328       <device Dname="ARMCM33_DSP_FP_TZ">
 329         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 330         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 331       </device>
 332     </family>
 333
 334     <!-- ******************************  ARMSC000  ****************************** -->
 335     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 336       <description>
 337 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 338 - simple, easy-to-use programmers model
 339 - highly efficient ultra-low power operation
 340 - excellent code density
 341 - deterministic, high-performance interrupt handling
 342       </description>
 343       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 344       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 345       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 346       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 347
 348       <device Dname="ARMSC000">
 349         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 350         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 351       </device>
 352     </family>
 353
 354     <!-- ******************************  ARMSC300  ****************************** -->
 355     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 356       <description>
 357 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 358 - simple, easy-to-use programmers model
 359 - highly efficient ultra-low power operation
 360 - excellent code density
 361 - deterministic, high-performance interrupt handling
 362       </description>
 363       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 364       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 365       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 366       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 367
 368       <device Dname="ARMSC300">
 369         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 370         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 371       </device>
 372     </family>
 373
 374     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 375     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 376       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 377       <description>
 378 ARMv8-M Baseline based device with TrustZone
 379       </description>
 380       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 381       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 382       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 383       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 384       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 385       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 386
 387       <device Dname="ARMv8MBL">
 388         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 389         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 390       </device>
 391     </family>
 392
 393     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 394     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 395       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 396       <description>
 397 ARMv8-M Mainline based device with TrustZone
 398       </description>
 399       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 400       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 401       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 402       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 403       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 404       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 405
 406       <device Dname="ARMv8MML">
 407         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 408         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 409       </device>
 410
 411       <device Dname="ARMv8MML_DSP">
 412         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 413         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 414       </device>
 415
 416       <device Dname="ARMv8MML_SP">
 417         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 418         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 419       </device>
 420
 421       <device Dname="ARMv8MML_DSP_SP">
 422         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 423         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 424       </device>
 425
 426       <device Dname="ARMv8MML_DP">
 427         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 428         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 429       </device>
 430
 431       <device Dname="ARMv8MML_DSP_DP">
 432         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 433         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 434       </device>
 435     </family>
 436
 437   </devices>
 438
 439
 440   <apis>
 441     <!-- CMSIS-RTOS API -->
 442     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
 443       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 444       <files>
 445         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 446       </files>
 447     </api>
 448     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
 449       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 450       <files>
 451         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 452       </files>
 453     </api>
 454     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
 455       <description>USART Driver API for Cortex-M</description>
 456       <files>
 457         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 458         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 459       </files>
 460     </api>
 461     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
 462       <description>SPI Driver API for Cortex-M</description>
 463       <files>
 464         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 465         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 466       </files>
 467     </api>
 468     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
 469       <description>SAI Driver API for Cortex-M</description>
 470       <files>
 471         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 472         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 473       </files>
 474     </api>
 475     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
 476       <description>I2C Driver API for Cortex-M</description>
 477       <files>
 478         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 479         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 480       </files>
 481     </api>
 482     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
 483       <description>CAN Driver API for Cortex-M</description>
 484       <files>
 485         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 486         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 487       </files>
 488     </api>
 489     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
 490       <description>Flash Driver API for Cortex-M</description>
 491       <files>
 492         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 493         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 494       </files>
 495     </api>
 496     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
 497       <description>MCI Driver API for Cortex-M</description>
 498       <files>
 499         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 500         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 501       </files>
 502     </api>
 503     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
 504       <description>NAND Flash Driver API for Cortex-M</description>
 505       <files>
 506         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 507         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 508       </files>
 509     </api>
 510     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
 511       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 512       <files>
 513         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 514         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 515         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 516       </files>
 517     </api>
 518     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
 519       <description>Ethernet MAC Driver API for Cortex-M</description>
 520       <files>
 521         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 522         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 523       </files>
 524     </api>
 525     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
 526       <description>Ethernet PHY Driver API for Cortex-M</description>
 527       <files>
 528         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 529         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 530       </files>
 531     </api>
 532     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
 533       <description>USB Device Driver API for Cortex-M</description>
 534       <files>
 535         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 536         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 537       </files>
 538     </api>
 539     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
 540       <description>USB Host Driver API for Cortex-M</description>
 541       <files>
 542         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 543         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 544       </files>
 545     </api>
 546   </apis>
 547
 548   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 549   <conditions>
 550     <!-- compiler -->
 551     <condition id="ARMCC">
 552       <require Tcompiler="ARMCC"/>
 553     </condition>
 554     <condition id="GCC">
 555       <require Tcompiler="GCC"/>
 556     </condition>
 557     <condition id="IAR">
 558       <require Tcompiler="IAR"/>
 559     </condition>
 560     <condition id="ARMCC GCC">
 561       <accept Tcompiler="ARMCC"/>
 562       <accept Tcompiler="GCC"/>
 563     </condition>
 564     <condition id="ARMCC GCC IAR">
 565       <accept Tcompiler="ARMCC"/>
 566       <accept Tcompiler="GCC"/>
 567       <accept Tcompiler="IAR"/>
 568     </condition>
 569
 570     <!-- ARM architecture -->
 571     <condition id="ARMv6-M Device">
 572       <description>ARMv6-M architecture based device</description>
 573       <accept Dcore="Cortex-M0"/>
 574       <accept Dcore="Cortex-M0+"/>
 575       <accept Dcore="SC000"/>
 576     </condition>
 577     <condition id="ARMv7-M Device">
 578       <description>ARMv7-M architecture based device</description>
 579       <accept Dcore="Cortex-M3"/>
 580       <accept Dcore="Cortex-M4"/>
 581       <accept Dcore="Cortex-M7"/>
 582       <accept Dcore="SC300"/>
 583     </condition>
 584     <condition id="ARMv8-M Device">
 585       <description>ARMv8-M architecture based device</description>
 586       <accept Dcore="ARMV8MBL"/>
 587       <accept Dcore="ARMV8MML"/>
 588       <accept Dcore="Cortex-M23"/>
 589       <accept Dcore="Cortex-M33"/>
 590     </condition>
 591     <condition id="ARMv8-M TZ Device">
 592       <description>ARMv8-M architecture based device with TrustZone</description>
 593       <require condition="ARMv8-M Device"/>
 594       <require Dtz="TZ"/>
 595     </condition>
 596     <condition id="ARMv6_7-M Device">
 597       <description>ARMv6_7-M architecture based device</description>
 598       <accept condition="ARMv6-M Device"/>
 599       <accept condition="ARMv7-M Device"/>
 600     </condition>
 601     <condition id="ARMv6_7_8-M Device">
 602       <description>ARMv6_7_8-M architecture based device</description>
 603       <accept condition="ARMv6-M Device"/>
 604       <accept condition="ARMv7-M Device"/>
 605       <accept condition="ARMv8-M Device"/>
 606     </condition>
 607
 608     <!-- ARM core -->
 609     <condition id="CM0">
 610       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 611       <accept Dcore="Cortex-M0"/>
 612       <accept Dcore="Cortex-M0+"/>
 613       <accept Dcore="SC000"/>
 614     </condition>
 615     <condition id="CM3">
 616       <description>Cortex-M3 or SC300 processor based device</description>
 617       <accept Dcore="Cortex-M3"/>
 618       <accept Dcore="SC300"/>
 619     </condition>
 620     <condition id="CM4">
 621       <description>Cortex-M4 processor based device</description>
 622       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 623     </condition>
 624     <condition id="CM4_FP">
 625       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 626       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 627     </condition>
 628     <condition id="CM7">
 629       <description>Cortex-M7 processor based device</description>
 630       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 631     </condition>
 632     <condition id="CM7_FP">
 633       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 634       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 635       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 636     </condition>
 637     <condition id="CM7_SP">
 638       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 639       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 640     </condition>
 641     <condition id="CM7_DP">
 642       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 643       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 644     </condition>
 645     <condition id="CM23">
 646       <description>Cortex-M23 processor based device</description>
 647       <require Dcore="Cortex-M23"/>
 648     </condition>
 649     <condition id="CM33">
 650       <description>Cortex-M33 processor based device</description>
 651       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 652     </condition>
 653     <condition id="CM33_DSP">
 654       <description>Cortex-M33 processor based device with DSP extension</description>
 655       <require Dcore="Cortex-M33" Dfpu="NO_FPU" Ddsp="DSP"/>
 656     </condition>
 657     <condition id="CM33_FP">
 658       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 659       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 660     </condition>
 661     <condition id="CM33_SP">
 662       <description>Cortex-M33 processor based device using Floating Point Unit (SP)</description>
 663       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="NO_DSP"/>
 664     </condition>
 665     <condition id="CM33_DSP_SP">
 666       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP)</description>
 667       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="DSP"/>
 668     </condition>
 669     <condition id="ARMv8MBL">
 670       <description>ARMv8-M Baseline processor based device</description>
 671       <require Dcore="ARMV8MBL"/>
 672     </condition>
 673     <condition id="ARMv8MML">
 674       <description>ARMv8-M Mainline processor based device</description>
 675       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 676     </condition>
 677     <condition id="ARMv8MML_DSP">
 678       <description>ARMv8-M Mainline processor based device with DSP extension</description>
 679       <require Dcore="ARMV8MML" Dfpu="NO_FPU" Ddsp="DSP"/>
 680     </condition>
 681     <condition id="ARMv8MML_FP">
 682       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 683       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 684       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 685     </condition>
 686     <condition id="ARMv8MML_SP">
 687       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
 688       <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 689     </condition>
 690     <condition id="ARMv8MML_DSP_SP">
 691       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP)</description>
 692       <require Dcore="ARMV8MML" Dfpu="SP_FPU" Ddsp="DSP"/>
 693     </condition>
 694     <condition id="ARMv8MML_DP">
 695       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
 696       <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 697     </condition>
 698     <condition id="ARMv8MML_DSP_DP">
 699       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP)</description>
 700       <require Dcore="ARMV8MML" Dfpu="DP_FPU" Ddsp="DSP"/>
 701     </condition>
 702
 703     <!-- ARMCC compiler -->
 704     <condition id="CM0_ARMCC">
 705       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 706       <require condition="CM0"/>
 707       <require Tcompiler="ARMCC"/>
 708     </condition>
 709     <condition id="CM0_LE_ARMCC">
 710       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 711       <require condition="CM0_ARMCC"/>
 712       <require Dendian="Little-endian"/>
 713     </condition>
 714     <condition id="CM0_BE_ARMCC">
 715       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 716       <require condition="CM0_ARMCC"/>
 717       <require Dendian="Big-endian"/>
 718     </condition>
 719
 720     <condition id="CM3_ARMCC">
 721       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 722       <require condition="CM3"/>
 723       <require Tcompiler="ARMCC"/>
 724     </condition>
 725     <condition id="CM3_LE_ARMCC">
 726       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 727       <require condition="CM3_ARMCC"/>
 728       <require Dendian="Little-endian"/>
 729     </condition>
 730     <condition id="CM3_BE_ARMCC">
 731       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 732       <require condition="CM3_ARMCC"/>
 733       <require Dendian="Big-endian"/>
 734     </condition>
 735
 736     <condition id="CM4_ARMCC">
 737       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 738       <require condition="CM4"/>
 739       <require Tcompiler="ARMCC"/>
 740     </condition>
 741     <condition id="CM4_LE_ARMCC">
 742       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 743       <require condition="CM4_ARMCC"/>
 744       <require Dendian="Little-endian"/>
 745     </condition>
 746     <condition id="CM4_BE_ARMCC">
 747       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 748       <require condition="CM4_ARMCC"/>
 749       <require Dendian="Big-endian"/>
 750     </condition>
 751
 752     <condition id="CM4_FP_ARMCC">
 753       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 754       <require condition="CM4_FP"/>
 755       <require Tcompiler="ARMCC"/>
 756     </condition>
 757     <condition id="CM4_FP_LE_ARMCC">
 758       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 759       <require condition="CM4_FP_ARMCC"/>
 760       <require Dendian="Little-endian"/>
 761     </condition>
 762     <condition id="CM4_FP_BE_ARMCC">
 763       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 764       <require condition="CM4_FP_ARMCC"/>
 765       <require Dendian="Big-endian"/>
 766     </condition>
 767
 768     <!-- XMC 4000 Series devices from Infineon require a special library -->
 769     <condition id="CM4_LE_ARMCC_STD">
 770       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 771       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 772       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 773       <require Tcompiler="ARMCC"/>
 774     </condition>
 775     <condition id="CM4_LE_ARMCC_IFX">
 776       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 777       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 778       <require Tcompiler="ARMCC"/>
 779     </condition>
 780     <condition id="CM4_FP_LE_ARMCC_STD">
 781       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 782       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 783       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 784       <require Tcompiler="ARMCC"/>
 785     </condition>
 786     <condition id="CM4_FP_LE_ARMCC_IFX">
 787       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 788       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 789       <require Tcompiler="ARMCC"/>
 790     </condition>
 791
 792     <condition id="CM7_ARMCC">
 793       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 794       <require condition="CM7"/>
 795       <require Tcompiler="ARMCC"/>
 796     </condition>
 797     <condition id="CM7_LE_ARMCC">
 798       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 799       <require condition="CM7_ARMCC"/>
 800       <require Dendian="Little-endian"/>
 801     </condition>
 802     <condition id="CM7_BE_ARMCC">
 803       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 804       <require condition="CM7_ARMCC"/>
 805       <require Dendian="Big-endian"/>
 806     </condition>
 807
 808     <condition id="CM7_FP_ARMCC">
 809       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 810       <require condition="CM7_FP"/>
 811       <require Tcompiler="ARMCC"/>
 812     </condition>
 813     <condition id="CM7_FP_LE_ARMCC">
 814       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 815       <require condition="CM7_FP_ARMCC"/>
 816       <require Dendian="Little-endian"/>
 817     </condition>
 818     <condition id="CM7_FP_BE_ARMCC">
 819       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 820       <require condition="CM7_FP_ARMCC"/>
 821       <require Dendian="Big-endian"/>
 822     </condition>
 823
 824     <condition id="CM7_SP_ARMCC">
 825       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 826       <require condition="CM7_SP"/>
 827       <require Tcompiler="ARMCC"/>
 828     </condition>
 829     <condition id="CM7_SP_LE_ARMCC">
 830       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 831       <require condition="CM7_SP_ARMCC"/>
 832       <require Dendian="Little-endian"/>
 833     </condition>
 834     <condition id="CM7_SP_BE_ARMCC">
 835       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 836       <require condition="CM7_SP_ARMCC"/>
 837       <require Dendian="Big-endian"/>
 838     </condition>
 839
 840     <condition id="CM7_DP_ARMCC">
 841       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 842       <require condition="CM7_DP"/>
 843       <require Tcompiler="ARMCC"/>
 844     </condition>
 845     <condition id="CM7_DP_LE_ARMCC">
 846       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 847       <require condition="CM7_DP_ARMCC"/>
 848       <require Dendian="Little-endian"/>
 849     </condition>
 850     <condition id="CM7_DP_BE_ARMCC">
 851       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 852       <require condition="CM7_DP_ARMCC"/>
 853       <require Dendian="Big-endian"/>
 854     </condition>
 855
 856     <condition id="CM23_ARMCC">
 857       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 858       <require condition="CM23"/>
 859       <require Tcompiler="ARMCC"/>
 860     </condition>
 861     <condition id="CM23_LE_ARMCC">
 862       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 863       <require condition="CM23_ARMCC"/>
 864       <require Dendian="Little-endian"/>
 865     </condition>
 866     <condition id="CM23_BE_ARMCC">
 867       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 868       <require condition="CM23_ARMCC"/>
 869       <require Dendian="Big-endian"/>
 870     </condition>
 871
 872     <condition id="CM33_ARMCC">
 873       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 874       <require condition="CM33"/>
 875       <require Tcompiler="ARMCC"/>
 876     </condition>
 877     <condition id="CM33_LE_ARMCC">
 878       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 879       <require condition="CM33_ARMCC"/>
 880       <require Dendian="Little-endian"/>
 881     </condition>
 882     <condition id="CM33_BE_ARMCC">
 883       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 884       <require condition="CM33_ARMCC"/>
 885       <require Dendian="Big-endian"/>
 886     </condition>
 887
 888     <condition id="CM33_DSP_ARMCC">
 889       <description>Cortex-M33 processor based device with DSP extension for the ARM Compiler</description>
 890       <require condition="CM33_DSP"/>
 891       <require Tcompiler="ARMCC"/>
 892     </condition>
 893     <condition id="CM33_DSP_LE_ARMCC">
 894       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the ARM Compiler</description>
 895       <require condition="CM33_DSP_ARMCC"/>
 896       <require Dendian="Little-endian"/>
 897     </condition>
 898     <condition id="CM33_DSP_BE_ARMCC">
 899       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the ARM Compiler</description>
 900       <require condition="CM33_DSP_ARMCC"/>
 901       <require Dendian="Big-endian"/>
 902     </condition>
 903
 904     <condition id="CM33_FP_ARMCC">
 905       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 906       <require condition="CM33_FP"/>
 907       <require Tcompiler="ARMCC"/>
 908     </condition>
 909     <condition id="CM33_FP_LE_ARMCC">
 910       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 911       <require condition="CM33_FP_ARMCC"/>
 912       <require Dendian="Little-endian"/>
 913     </condition>
 914     <condition id="CM33_FP_BE_ARMCC">
 915       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 916       <require condition="CM33_FP_ARMCC"/>
 917       <require Dendian="Big-endian"/>
 918     </condition>
 919
 920     <condition id="CM33_SP_ARMCC">
 921       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 922       <require condition="CM33_SP"/>
 923       <require Tcompiler="ARMCC"/>
 924     </condition>
 925     <condition id="CM33_SP_LE_ARMCC">
 926       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 927       <require condition="CM33_SP_ARMCC"/>
 928       <require Dendian="Little-endian"/>
 929     </condition>
 930     <condition id="CM33_SP_BE_ARMCC">
 931       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 932       <require condition="CM33_SP_ARMCC"/>
 933       <require Dendian="Big-endian"/>
 934     </condition>
 935
 936     <condition id="CM33_DSP_SP_ARMCC">
 937       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
 938       <require condition="CM33_DSP_SP"/>
 939       <require Tcompiler="ARMCC"/>
 940     </condition>
 941     <condition id="CM33_DSP_SP_LE_ARMCC">
 942       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 943       <require condition="CM33_DSP_SP_ARMCC"/>
 944       <require Dendian="Little-endian"/>
 945     </condition>
 946     <condition id="CM33_DSP_SP_BE_ARMCC">
 947       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 948       <require condition="CM33_DSP_SP_ARMCC"/>
 949       <require Dendian="Big-endian"/>
 950     </condition>
 951
 952     <condition id="ARMv8MBL_ARMCC">
 953       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
 954       <require condition="ARMv8MBL"/>
 955       <require Tcompiler="ARMCC"/>
 956     </condition>
 957     <condition id="ARMv8MBL_LE_ARMCC">
 958       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
 959       <require condition="ARMv8MBL_ARMCC"/>
 960       <require Dendian="Little-endian"/>
 961     </condition>
 962     <condition id="ARMv8MBL_BE_ARMCC">
 963       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
 964       <require condition="ARMv8MBL_ARMCC"/>
 965       <require Dendian="Big-endian"/>
 966     </condition>
 967
 968     <condition id="ARMv8MML_ARMCC">
 969       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
 970       <require condition="ARMv8MML"/>
 971       <require Tcompiler="ARMCC"/>
 972     </condition>
 973     <condition id="ARMv8MML_LE_ARMCC">
 974       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
 975       <require condition="ARMv8MML_ARMCC"/>
 976       <require Dendian="Little-endian"/>
 977     </condition>
 978     <condition id="ARMv8MML_BE_ARMCC">
 979       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
 980       <require condition="ARMv8MML_ARMCC"/>
 981       <require Dendian="Big-endian"/>
 982     </condition>
 983
 984     <condition id="ARMv8MML_DSP_ARMCC">
 985       <description>ARMv8-M Mainline processor based device with DSP extension for the ARM Compiler</description>
 986       <require condition="ARMv8MML_DSP"/>
 987       <require Tcompiler="ARMCC"/>
 988     </condition>
 989     <condition id="ARMv8MML_DSP_LE_ARMCC">
 990       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the ARM Compiler</description>
 991       <require condition="ARMv8MML_DSP_ARMCC"/>
 992       <require Dendian="Little-endian"/>
 993     </condition>
 994     <condition id="ARMv8MML_DSP_BE_ARMCC">
 995       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the ARM Compiler</description>
 996       <require condition="ARMv8MML_DSP_ARMCC"/>
 997       <require Dendian="Big-endian"/>
 998     </condition>
 999
1000     <condition id="ARMv8MML_FP_ARMCC">
1001       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1002       <require condition="ARMv8MML_FP"/>
1003       <require Tcompiler="ARMCC"/>
1004     </condition>
1005     <condition id="ARMv8MML_FP_LE_ARMCC">
1006       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1007       <require condition="ARMv8MML_FP_ARMCC"/>
1008       <require Dendian="Little-endian"/>
1009     </condition>
1010     <condition id="ARMv8MML_FP_BE_ARMCC">
1011       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1012       <require condition="ARMv8MML_FP_ARMCC"/>
1013       <require Dendian="Big-endian"/>
1014     </condition>
1015
1016     <condition id="ARMv8MML_SP_ARMCC">
1017       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1018       <require condition="ARMv8MML_SP"/>
1019       <require Tcompiler="ARMCC"/>
1020     </condition>
1021     <condition id="ARMv8MML_SP_LE_ARMCC">
1022       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1023       <require condition="ARMv8MML_SP_ARMCC"/>
1024       <require Dendian="Little-endian"/>
1025     </condition>
1026     <condition id="ARMv8MML_SP_BE_ARMCC">
1027       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1028       <require condition="ARMv8MML_SP_ARMCC"/>
1029       <require Dendian="Big-endian"/>
1030     </condition>
1031
1032     <condition id="ARMv8MML_DSP_SP_ARMCC">
1033       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1034       <require condition="ARMv8MML_DSP_SP"/>
1035       <require Tcompiler="ARMCC"/>
1036     </condition>
1037     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1038       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1039       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1040       <require Dendian="Little-endian"/>
1041     </condition>
1042     <condition id="ARMv8MML_DSP_SP_BE_ARMCC">
1043       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1044       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1045       <require Dendian="Big-endian"/>
1046     </condition>
1047
1048     <condition id="ARMv8MML_DP_ARMCC">
1049       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1050       <require condition="ARMv8MML_DP"/>
1051       <require Tcompiler="ARMCC"/>
1052     </condition>
1053     <condition id="ARMv8MML_DP_LE_ARMCC">
1054       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1055       <require condition="ARMv8MML_DP_ARMCC"/>
1056       <require Dendian="Little-endian"/>
1057     </condition>
1058     <condition id="ARMv8MML_DP_BE_ARMCC">
1059       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1060       <require condition="ARMv8MML_DP_ARMCC"/>
1061       <require Dendian="Big-endian"/>
1062     </condition>
1063
1064     <condition id="ARMv8MML_DSP_DP_ARMCC">
1065       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the ARM Compiler</description>
1066       <require condition="ARMv8MML_DSP_DP"/>
1067       <require Tcompiler="ARMCC"/>
1068     </condition>
1069     <condition id="ARMv8MML_DSP_DP_LE_ARMCC">
1070       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1071       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1072       <require Dendian="Little-endian"/>
1073     </condition>
1074     <condition id="ARMv8MML_DSP_DP_BE_ARMCC">
1075       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1076       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1077       <require Dendian="Big-endian"/>
1078     </condition>
1079
1080     <!-- GCC compiler -->
1081     <condition id="CM0_GCC">
1082       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1083       <require condition="CM0"/>
1084       <require Tcompiler="GCC"/>
1085     </condition>
1086     <condition id="CM0_LE_GCC">
1087       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1088       <require condition="CM0_GCC"/>
1089       <require Dendian="Little-endian"/>
1090     </condition>
1091     <condition id="CM0_BE_GCC">
1092       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1093       <require condition="CM0_GCC"/>
1094       <require Dendian="Big-endian"/>
1095     </condition>
1096
1097     <condition id="CM3_GCC">
1098       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1099       <require condition="CM3"/>
1100       <require Tcompiler="GCC"/>
1101     </condition>
1102     <condition id="CM3_LE_GCC">
1103       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1104       <require condition="CM3_GCC"/>
1105       <require Dendian="Little-endian"/>
1106     </condition>
1107     <condition id="CM3_BE_GCC">
1108       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1109       <require condition="CM3_GCC"/>
1110       <require Dendian="Big-endian"/>
1111     </condition>
1112
1113     <condition id="CM4_GCC">
1114       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1115       <require condition="CM4"/>
1116       <require Tcompiler="GCC"/>
1117     </condition>
1118     <condition id="CM4_LE_GCC">
1119       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1120       <require condition="CM4_GCC"/>
1121       <require Dendian="Little-endian"/>
1122     </condition>
1123     <condition id="CM4_BE_GCC">
1124       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1125       <require condition="CM4_GCC"/>
1126       <require Dendian="Big-endian"/>
1127     </condition>
1128
1129     <condition id="CM4_FP_GCC">
1130       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1131       <require condition="CM4_FP"/>
1132       <require Tcompiler="GCC"/>
1133     </condition>
1134     <condition id="CM4_FP_LE_GCC">
1135       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1136       <require condition="CM4_FP_GCC"/>
1137       <require Dendian="Little-endian"/>
1138     </condition>
1139     <condition id="CM4_FP_BE_GCC">
1140       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1141       <require condition="CM4_FP_GCC"/>
1142       <require Dendian="Big-endian"/>
1143     </condition>
1144
1145     <!-- XMC 4000 Series devices from Infineon require a special library -->
1146     <condition id="CM4_LE_GCC_STD">
1147       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1148       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1149       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1150       <require Tcompiler="GCC"/>
1151     </condition>
1152     <condition id="CM4_LE_GCC_IFX">
1153       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1154       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1155       <require Tcompiler="GCC"/>
1156     </condition>
1157     <condition id="CM4_FP_LE_GCC_STD">
1158       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1159       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1160       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1161       <require Tcompiler="GCC"/>
1162     </condition>
1163     <condition id="CM4_FP_LE_GCC_IFX">
1164       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1165       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1166       <require Tcompiler="GCC"/>
1167     </condition>
1168
1169     <condition id="CM7_GCC">
1170       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1171       <require condition="CM7"/>
1172       <require Tcompiler="GCC"/>
1173     </condition>
1174     <condition id="CM7_LE_GCC">
1175       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1176       <require condition="CM7_GCC"/>
1177       <require Dendian="Little-endian"/>
1178     </condition>
1179     <condition id="CM7_BE_GCC">
1180       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1181       <require condition="CM7_GCC"/>
1182       <require Dendian="Big-endian"/>
1183     </condition>
1184
1185     <condition id="CM7_FP_GCC">
1186       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1187       <require condition="CM7_FP"/>
1188       <require Tcompiler="GCC"/>
1189     </condition>
1190     <condition id="CM7_FP_LE_GCC">
1191       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1192       <require condition="CM7_FP_GCC"/>
1193       <require Dendian="Little-endian"/>
1194     </condition>
1195     <condition id="CM7_FP_BE_GCC">
1196       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1197       <require condition="CM7_FP_GCC"/>
1198       <require Dendian="Big-endian"/>
1199     </condition>
1200
1201     <condition id="CM7_SP_GCC">
1202       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1203       <require condition="CM7_SP"/>
1204       <require Tcompiler="GCC"/>
1205     </condition>
1206     <condition id="CM7_SP_LE_GCC">
1207       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1208       <require condition="CM7_SP_GCC"/>
1209       <require Dendian="Little-endian"/>
1210     </condition>
1211     <condition id="CM7_SP_BE_GCC">
1212       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1213       <require condition="CM7_SP_GCC"/>
1214       <require Dendian="Big-endian"/>
1215     </condition>
1216
1217     <condition id="CM7_DP_GCC">
1218       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1219       <require condition="CM7_DP"/>
1220       <require Tcompiler="GCC"/>
1221     </condition>
1222     <condition id="CM7_DP_LE_GCC">
1223       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1224       <require condition="CM7_DP_GCC"/>
1225       <require Dendian="Little-endian"/>
1226     </condition>
1227     <condition id="CM7_DP_BE_GCC">
1228       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1229       <require condition="CM7_DP_GCC"/>
1230       <require Dendian="Big-endian"/>
1231     </condition>
1232
1233     <condition id="CM23_GCC">
1234       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1235       <require condition="CM23"/>
1236       <require Tcompiler="GCC"/>
1237     </condition>
1238     <condition id="CM23_LE_GCC">
1239       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1240       <require condition="CM23_GCC"/>
1241       <require Dendian="Little-endian"/>
1242     </condition>
1243     <condition id="CM23_BE_GCC">
1244       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1245       <require condition="CM23_GCC"/>
1246       <require Dendian="Big-endian"/>
1247     </condition>
1248
1249     <condition id="CM33_GCC">
1250       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1251       <require condition="CM33"/>
1252       <require Tcompiler="GCC"/>
1253     </condition>
1254     <condition id="CM33_LE_GCC">
1255       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1256       <require condition="CM33_GCC"/>
1257       <require Dendian="Little-endian"/>
1258     </condition>
1259     <condition id="CM33_BE_GCC">
1260       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1261       <require condition="CM33_GCC"/>
1262       <require Dendian="Big-endian"/>
1263     </condition>
1264
1265     <condition id="CM33_DSP_GCC">
1266       <description>Cortex-M33 processor based device with DSP extension for the GCC Compiler</description>
1267       <require condition="CM33_DSP"/>
1268       <require Tcompiler="GCC"/>
1269     </condition>
1270     <condition id="CM33_DSP_LE_GCC">
1271       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1272       <require condition="CM33_DSP_GCC"/>
1273       <require Dendian="Little-endian"/>
1274     </condition>
1275     <condition id="CM33_DSP_BE_GCC">
1276       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1277       <require condition="CM33_DSP_GCC"/>
1278       <require Dendian="Big-endian"/>
1279     </condition>
1280
1281     <condition id="CM33_FP_GCC">
1282       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1283       <require condition="CM33_FP"/>
1284       <require Tcompiler="GCC"/>
1285     </condition>
1286     <condition id="CM33_FP_LE_GCC">
1287       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1288       <require condition="CM33_FP_GCC"/>
1289       <require Dendian="Little-endian"/>
1290     </condition>
1291     <condition id="CM33_FP_BE_GCC">
1292       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1293       <require condition="CM33_FP_GCC"/>
1294       <require Dendian="Big-endian"/>
1295     </condition>
1296
1297     <condition id="CM33_SP_GCC">
1298       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1299       <require condition="CM33_SP"/>
1300       <require Tcompiler="GCC"/>
1301     </condition>
1302     <condition id="CM33_SP_LE_GCC">
1303       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1304       <require condition="CM33_SP_GCC"/>
1305       <require Dendian="Little-endian"/>
1306     </condition>
1307     <condition id="CM33_SP_BE_GCC">
1308       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1309       <require condition="CM33_SP_GCC"/>
1310       <require Dendian="Big-endian"/>
1311     </condition>
1312
1313     <condition id="CM33_DSP_SP_GCC">
1314       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1315       <require condition="CM33_DSP_SP"/>
1316       <require Tcompiler="GCC"/>
1317     </condition>
1318     <condition id="CM33_DSP_SP_LE_GCC">
1319       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1320       <require condition="CM33_DSP_SP_GCC"/>
1321       <require Dendian="Little-endian"/>
1322     </condition>
1323     <condition id="CM33_DSP_SP_BE_GCC">
1324       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1325       <require condition="CM33_DSP_SP_GCC"/>
1326       <require Dendian="Big-endian"/>
1327     </condition>
1328
1329     <condition id="ARMv8MBL_GCC">
1330       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1331       <require condition="ARMv8MBL"/>
1332       <require Tcompiler="GCC"/>
1333     </condition>
1334     <condition id="ARMv8MBL_LE_GCC">
1335       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1336       <require condition="ARMv8MBL_GCC"/>
1337       <require Dendian="Little-endian"/>
1338     </condition>
1339     <condition id="ARMv8MBL_BE_GCC">
1340       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1341       <require condition="ARMv8MBL_GCC"/>
1342       <require Dendian="Big-endian"/>
1343     </condition>
1344
1345     <condition id="ARMv8MML_GCC">
1346       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1347       <require condition="ARMv8MML"/>
1348       <require Tcompiler="GCC"/>
1349     </condition>
1350     <condition id="ARMv8MML_LE_GCC">
1351       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1352       <require condition="ARMv8MML_GCC"/>
1353       <require Dendian="Little-endian"/>
1354     </condition>
1355     <condition id="ARMv8MML_BE_GCC">
1356       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1357       <require condition="ARMv8MML_GCC"/>
1358       <require Dendian="Big-endian"/>
1359     </condition>
1360
1361     <condition id="ARMv8MML_DSP_GCC">
1362       <description>ARMv8-M Mainline processor based device with DSP extension for the GCC Compiler</description>
1363       <require condition="ARMv8MML_DSP"/>
1364       <require Tcompiler="GCC"/>
1365     </condition>
1366     <condition id="ARMv8MML_DSP_LE_GCC">
1367       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1368       <require condition="ARMv8MML_DSP_GCC"/>
1369       <require Dendian="Little-endian"/>
1370     </condition>
1371     <condition id="ARMv8MML_DSP_BE_GCC">
1372       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1373       <require condition="ARMv8MML_DSP_GCC"/>
1374       <require Dendian="Big-endian"/>
1375     </condition>
1376
1377     <condition id="ARMv8MML_FP_GCC">
1378       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1379       <require condition="ARMv8MML_FP"/>
1380       <require Tcompiler="GCC"/>
1381     </condition>
1382     <condition id="ARMv8MML_FP_LE_GCC">
1383       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1384       <require condition="ARMv8MML_FP_GCC"/>
1385       <require Dendian="Little-endian"/>
1386     </condition>
1387     <condition id="ARMv8MML_FP_BE_GCC">
1388       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1389       <require condition="ARMv8MML_FP_GCC"/>
1390       <require Dendian="Big-endian"/>
1391     </condition>
1392
1393     <condition id="ARMv8MML_SP_GCC">
1394       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1395       <require condition="ARMv8MML_SP"/>
1396       <require Tcompiler="GCC"/>
1397     </condition>
1398     <condition id="ARMv8MML_SP_LE_GCC">
1399       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1400       <require condition="ARMv8MML_SP_GCC"/>
1401       <require Dendian="Little-endian"/>
1402     </condition>
1403     <condition id="ARMv8MML_SP_BE_GCC">
1404       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1405       <require condition="ARMv8MML_SP_GCC"/>
1406       <require Dendian="Big-endian"/>
1407     </condition>
1408
1409     <condition id="ARMv8MML_DSP_SP_GCC">
1410       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1411       <require condition="ARMv8MML_DSP_SP"/>
1412       <require Tcompiler="GCC"/>
1413     </condition>
1414     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1415       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1416       <require condition="ARMv8MML_DSP_SP_GCC"/>
1417       <require Dendian="Little-endian"/>
1418     </condition>
1419     <condition id="ARMv8MML_DSP_SP_BE_GCC">
1420       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1421       <require condition="ARMv8MML_DSP_SP_GCC"/>
1422       <require Dendian="Big-endian"/>
1423     </condition>
1424
1425     <condition id="ARMv8MML_DP_GCC">
1426       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1427       <require condition="ARMv8MML_DP"/>
1428       <require Tcompiler="GCC"/>
1429     </condition>
1430     <condition id="ARMv8MML_DP_LE_GCC">
1431       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1432       <require condition="ARMv8MML_DP_GCC"/>
1433       <require Dendian="Little-endian"/>
1434     </condition>
1435     <condition id="ARMv8MML_DP_BE_GCC">
1436       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1437       <require condition="ARMv8MML_DP_GCC"/>
1438       <require Dendian="Big-endian"/>
1439     </condition>
1440
1441     <condition id="ARMv8MML_DSP_DP_GCC">
1442       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the GCC Compiler</description>
1443       <require condition="ARMv8MML_DSP_DP"/>
1444       <require Tcompiler="GCC"/>
1445     </condition>
1446     <condition id="ARMv8MML_DSP_DP_LE_GCC">
1447       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1448       <require condition="ARMv8MML_DSP_DP_GCC"/>
1449       <require Dendian="Little-endian"/>
1450     </condition>
1451     <condition id="ARMv8MML_DSP_DP_BE_GCC">
1452       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1453       <require condition="ARMv8MML_DSP_DP_GCC"/>
1454       <require Dendian="Big-endian"/>
1455     </condition>
1456
1457     <!-- IAR compiler -->
1458     <condition id="CM0_IAR">
1459       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1460       <require condition="CM0"/>
1461       <require Tcompiler="IAR"/>
1462     </condition>
1463     <condition id="CM0_LE_IAR">
1464       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1465       <require condition="CM0_IAR"/>
1466       <require Dendian="Little-endian"/>
1467     </condition>
1468     <condition id="CM0_BE_IAR">
1469       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1470       <require condition="CM0_IAR"/>
1471       <require Dendian="Big-endian"/>
1472     </condition>
1473
1474     <condition id="CM3_IAR">
1475       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1476       <require condition="CM3"/>
1477       <require Tcompiler="IAR"/>
1478     </condition>
1479     <condition id="CM3_LE_IAR">
1480       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1481       <require condition="CM3_IAR"/>
1482       <require Dendian="Little-endian"/>
1483     </condition>
1484     <condition id="CM3_BE_IAR">
1485       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1486       <require condition="CM3_IAR"/>
1487       <require Dendian="Big-endian"/>
1488     </condition>
1489
1490     <condition id="CM4_IAR">
1491       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1492       <require condition="CM4"/>
1493       <require Tcompiler="IAR"/>
1494     </condition>
1495     <condition id="CM4_LE_IAR">
1496       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1497       <require condition="CM4_IAR"/>
1498       <require Dendian="Little-endian"/>
1499     </condition>
1500     <condition id="CM4_BE_IAR">
1501       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1502       <require condition="CM4_IAR"/>
1503       <require Dendian="Big-endian"/>
1504     </condition>
1505
1506     <condition id="CM4_FP_IAR">
1507       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1508       <require condition="CM4_FP"/>
1509       <require Tcompiler="IAR"/>
1510     </condition>
1511     <condition id="CM4_FP_LE_IAR">
1512       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1513       <require condition="CM4_FP_IAR"/>
1514       <require Dendian="Little-endian"/>
1515     </condition>
1516     <condition id="CM4_FP_BE_IAR">
1517       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1518       <require condition="CM4_FP_IAR"/>
1519       <require Dendian="Big-endian"/>
1520     </condition>
1521
1522     <condition id="CM7_IAR">
1523       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1524       <require condition="CM7"/>
1525       <require Tcompiler="IAR"/>
1526     </condition>
1527     <condition id="CM7_LE_IAR">
1528       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1529       <require condition="CM7_IAR"/>
1530       <require Dendian="Little-endian"/>
1531     </condition>
1532     <condition id="CM7_BE_IAR">
1533       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1534       <require condition="CM7_IAR"/>
1535       <require Dendian="Big-endian"/>
1536     </condition>
1537
1538     <condition id="CM7_FP_IAR">
1539       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1540       <require condition="CM7_FP"/>
1541       <require Tcompiler="IAR"/>
1542     </condition>
1543     <condition id="CM7_FP_LE_IAR">
1544       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1545       <require condition="CM7_FP_IAR"/>
1546       <require Dendian="Little-endian"/>
1547     </condition>
1548     <condition id="CM7_FP_BE_IAR">
1549       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1550       <require condition="CM7_FP_IAR"/>
1551       <require Dendian="Big-endian"/>
1552     </condition>
1553
1554     <condition id="CM7_SP_IAR">
1555       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1556       <require condition="CM7_SP"/>
1557       <require Tcompiler="IAR"/>
1558     </condition>
1559     <condition id="CM7_SP_LE_IAR">
1560       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1561       <require condition="CM7_SP_IAR"/>
1562       <require Dendian="Little-endian"/>
1563     </condition>
1564     <condition id="CM7_SP_BE_IAR">
1565       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1566       <require condition="CM7_SP_IAR"/>
1567       <require Dendian="Big-endian"/>
1568     </condition>
1569
1570     <condition id="CM7_DP_IAR">
1571       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1572       <require condition="CM7_DP"/>
1573       <require Tcompiler="IAR"/>
1574     </condition>
1575     <condition id="CM7_DP_LE_IAR">
1576       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1577       <require condition="CM7_DP_IAR"/>
1578       <require Dendian="Little-endian"/>
1579     </condition>
1580     <condition id="CM7_DP_BE_IAR">
1581       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1582       <require condition="CM7_DP_IAR"/>
1583       <require Dendian="Big-endian"/>
1584     </condition>
1585
1586     <!-- conditions selecting single devices and CMSIS Core -->
1587     <!-- used for component startup, GCC version is used for C-Startup -->
1588     <condition id="ARMCM0 CMSIS">
1589       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1590       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1591       <require Cclass="CMSIS" Cgroup="CORE"/>
1592     </condition>
1593     <condition id="ARMCM0 CMSIS GCC">
1594       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1595       <require condition="ARMCM0 CMSIS"/>
1596       <require condition="GCC"/>
1597     </condition>
1598
1599     <condition id="ARMCM0+ CMSIS">
1600       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1601       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1602       <require Cclass="CMSIS" Cgroup="CORE"/>
1603     </condition>
1604     <condition id="ARMCM0+ CMSIS GCC">
1605       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1606       <require condition="ARMCM0+ CMSIS"/>
1607       <require condition="GCC"/>
1608     </condition>
1609
1610     <condition id="ARMCM3 CMSIS">
1611       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1612       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1613       <require Cclass="CMSIS" Cgroup="CORE"/>
1614     </condition>
1615     <condition id="ARMCM3 CMSIS GCC">
1616       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1617       <require condition="ARMCM3 CMSIS"/>
1618       <require condition="GCC"/>
1619     </condition>
1620
1621     <condition id="ARMCM4 CMSIS">
1622       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1623       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1624       <require Cclass="CMSIS" Cgroup="CORE"/>
1625     </condition>
1626     <condition id="ARMCM4 CMSIS GCC">
1627       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1628       <require condition="ARMCM4 CMSIS"/>
1629       <require condition="GCC"/>
1630     </condition>
1631
1632     <condition id="ARMCM7 CMSIS">
1633       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1634       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1635       <require Cclass="CMSIS" Cgroup="CORE"/>
1636     </condition>
1637     <condition id="ARMCM7 CMSIS GCC">
1638       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1639       <require condition="ARMCM7 CMSIS"/>
1640       <require condition="GCC"/>
1641     </condition>
1642
1643     <condition id="ARMCM23 CMSIS">
1644       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1645       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1646       <require Cclass="CMSIS" Cgroup="CORE"/>
1647     </condition>
1648     <condition id="ARMCM23 CMSIS GCC">
1649       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1650       <require condition="ARMCM23 CMSIS"/>
1651       <require condition="GCC"/>
1652     </condition>
1653
1654     <condition id="ARMCM33 CMSIS">
1655       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1656       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1657       <require Cclass="CMSIS" Cgroup="CORE"/>
1658     </condition>
1659     <condition id="ARMCM33 CMSIS GCC">
1660       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1661       <require condition="ARMCM33 CMSIS"/>
1662       <require condition="GCC"/>
1663     </condition>
1664
1665     <condition id="ARMSC000 CMSIS">
1666       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1667       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1668       <require Cclass="CMSIS" Cgroup="CORE"/>
1669     </condition>
1670     <condition id="ARMSC000 CMSIS GCC">
1671       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1672       <require condition="ARMSC000 CMSIS"/>
1673       <require condition="GCC"/>
1674     </condition>
1675
1676     <condition id="ARMSC300 CMSIS">
1677       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1678       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1679       <require Cclass="CMSIS" Cgroup="CORE"/>
1680     </condition>
1681     <condition id="ARMSC300 CMSIS GCC">
1682       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1683       <require condition="ARMSC300 CMSIS"/>
1684       <require condition="GCC"/>
1685     </condition>
1686
1687     <condition id="ARMv8MBL CMSIS">
1688       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1689       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1690       <require Cclass="CMSIS" Cgroup="CORE"/>
1691     </condition>
1692     <condition id="ARMv8MBL CMSIS GCC">
1693       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1694       <require condition="ARMv8MBL CMSIS"/>
1695       <require condition="GCC"/>
1696     </condition>
1697
1698     <condition id="ARMv8MML CMSIS">
1699       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1700       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1701       <require Cclass="CMSIS" Cgroup="CORE"/>
1702     </condition>
1703     <condition id="ARMv8MML CMSIS GCC">
1704       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1705       <require condition="ARMv8MML CMSIS"/>
1706       <require condition="GCC"/>
1707     </condition>
1708
1709     <!-- CMSIS DSP -->
1710     <condition id="CMSIS DSP">
1711       <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
1712       <require condition="ARMv6_7-M Device"/>
1713       <require Cclass="CMSIS" Cgroup="CORE"/>
1714       <require condition="ARMCC GCC"/>
1715     </condition>
1716
1717     <!-- RTOS RTX -->
1718     <condition id="RTOS RTX">
1719       <description>Components required for RTOS RTX</description>
1720       <require condition="ARMv6_7-M Device"/>
1721       <require condition="ARMCC GCC IAR"/>
1722       <require Cclass="Device" Cgroup="Startup"/>
1723       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1724     </condition>
1725     <condition id="RTOS RTX5">
1726       <description>Components required for RTOS RTX5</description>
1727       <require condition="ARMv6_7_8-M Device"/>
1728       <require condition="ARMCC GCC"/>
1729       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1730     </condition>
1731     <condition id="RTOS2 RTX5">
1732       <description>Components required for RTOS2 RTX5</description>
1733       <require condition="ARMv6_7_8-M Device"/>
1734       <require condition="ARMCC GCC"/>
1735       <require Cclass="CMSIS"  Cgroup="CORE"/>
1736       <require Cclass="Device" Cgroup="Startup"/>
1737     </condition>
1738     <condition id="RTOS2 RTX5 NS">
1739       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1740       <require condition="ARMv8-M TZ Device"/>
1741       <require condition="ARMCC GCC"/>
1742       <require Cclass="CMSIS"  Cgroup="CORE"/>
1743       <require Cclass="Device" Cgroup="Startup"/>
1744     </condition>
1745
1746   </conditions>
1747
1748   <components>
1749     <!-- CMSIS-Core component -->
1750     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0"  condition="ARMv6_7_8-M Device" >
1751       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1752       <files>
1753         <!-- CPU independent -->
1754         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1755         <file category="include" name="CMSIS/Include/"/>
1756         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1757         <!-- Code template -->
1758         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1759         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1760       </files>
1761     </component>
1762
1763     <!-- CMSIS-Startup components -->
1764     <!-- Cortex-M0 -->
1765     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1766       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1767       <files>
1768         <!-- include folder / device header file -->
1769         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1770         <!-- startup / system file -->
1771         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1772         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1773         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1774         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1775         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1776       </files>
1777     </component>
1778     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1779       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1780       <files>
1781         <!-- include folder / device header file -->
1782         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1783         <!-- startup / system file -->
1784         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1785         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1786         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1787       </files>
1788     </component>
1789
1790     <!-- Cortex-M0+ -->
1791     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1792       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1793       <files>
1794         <!-- include folder / device header file -->
1795         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1796         <!-- startup / system file -->
1797         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1798         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1799         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1800         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1801         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1802       </files>
1803     </component>
1804     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1805       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1806       <files>
1807         <!-- include folder / device header file -->
1808         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1809         <!-- startup / system file -->
1810         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1811         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1812         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1813       </files>
1814     </component>
1815
1816     <!-- Cortex-M3 -->
1817     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1818       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1819       <files>
1820         <!-- include folder / device header file -->
1821         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1822         <!-- startup / system file -->
1823         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1824         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1825         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1826         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1827         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1828       </files>
1829     </component>
1830     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1831       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1832       <files>
1833         <!-- include folder / device header file -->
1834         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1835         <!-- startup / system file -->
1836         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1837         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1838         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1839       </files>
1840     </component>
1841
1842     <!-- Cortex-M4 -->
1843     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1844       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1845       <files>
1846         <!-- include folder / device header file -->
1847         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1848         <!-- startup / system file -->
1849         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1850         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1851         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1852         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1853         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1854       </files>
1855     </component>
1856     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1857       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1858       <files>
1859         <!-- include folder / device header file -->
1860         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1861         <!-- startup / system file -->
1862         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1863         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1864         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1865       </files>
1866     </component>
1867
1868     <!-- Cortex-M7 -->
1869     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1870       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1871       <files>
1872         <!-- include folder / device header file -->
1873         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1874         <!-- startup / system file -->
1875         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1876         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1877         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1878         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1879         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1880       </files>
1881     </component>
1882     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1883       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1884       <files>
1885         <!-- include folder / device header file -->
1886         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1887         <!-- startup / system file -->
1888         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1889         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1890         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1891       </files>
1892     </component>
1893
1894     <!-- Cortex-M23 -->
1895     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1896       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1897       <files>
1898         <!-- include folder / device header file -->
1899         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1900         <!-- startup / system file -->
1901         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1902         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1903         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1904         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1905         <!-- SAU configuration -->
1906         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1907       </files>
1908     </component>
1909     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1910       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1911       <files>
1912         <!-- include folder / device header file -->
1913         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1914         <!-- startup / system file -->
1915         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1916         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1917         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1918         <!-- SAU configuration -->
1919         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1920       </files>
1921     </component>
1922
1923     <!-- Cortex-M33 -->
1924     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM33 CMSIS">
1925       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1926       <files>
1927         <!-- include folder / device header file -->
1928         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1929         <!-- startup / system file -->
1930         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
1931         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
1932         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1933         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1934         <!-- SAU configuration -->
1935         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1936       </files>
1937     </component>
1938     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM33 CMSIS GCC">
1939       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1940       <files>
1941         <!-- include folder / device header file -->
1942         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1943         <!-- startup / system file -->
1944         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
1945         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1946         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"      version="1.0.0" attr="config"/>
1947         <!-- SAU configuration -->
1948         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1949       </files>
1950     </component>
1951
1952     <!-- Cortex-SC000 -->
1953     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1954       <description>System and Startup for Generic ARM SC000 device</description>
1955       <files>
1956         <!-- include folder / device header file -->
1957         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1958         <!-- startup / system file -->
1959         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1960         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1961         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1962         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1963         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1964       </files>
1965     </component>
1966     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1967       <description>System and Startup for Generic ARM SC000 device</description>
1968       <files>
1969         <!-- include folder / device header file -->
1970         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1971         <!-- startup / system file -->
1972         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1973         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1974         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1975       </files>
1976     </component>
1977
1978     <!-- Cortex-SC300 -->
1979     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1980       <description>System and Startup for Generic ARM SC300 device</description>
1981       <files>
1982         <!-- include folder / device header file -->
1983         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1984         <!-- startup / system file -->
1985         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1986         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1987         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1988         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1989         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1990       </files>
1991     </component>
1992     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1993       <description>System and Startup for Generic ARM SC300 device</description>
1994       <files>
1995         <!-- include folder / device header file -->
1996         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1997         <!-- startup / system file -->
1998         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1999         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2000         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2001       </files>
2002     </component>
2003
2004     <!-- ARMv8MBL -->
2005     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2006       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2007       <files>
2008         <!-- include folder / device header file -->
2009         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2010         <!-- startup / system file -->
2011         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2012         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2013         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2014         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2015         <!-- SAU configuration -->
2016         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2017       </files>
2018     </component>
2019     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2020       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2021       <files>
2022         <!-- include folder / device header file -->
2023         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2024         <!-- startup / system file -->
2025         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2026         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2027         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2028         <!-- SAU configuration -->
2029         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2030       </files>
2031     </component>
2032
2033     <!-- ARMv8MML -->
2034     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
2035       <description>System and Startup for Generic ARM ARMv8MML device</description>
2036       <files>
2037         <!-- include folder / device header file -->
2038         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2039         <!-- startup / system file -->
2040         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2041         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2042         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2043         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2044         <!-- SAU configuration -->
2045         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2046       </files>
2047     </component>
2048     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
2049       <description>System and Startup for Generic ARM ARMv8MML device</description>
2050       <files>
2051         <!-- include folder / device header file -->
2052         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2053         <!-- startup / system file -->
2054         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2055         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2056         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"      version="1.0.0" attr="config"/>
2057         <!-- SAU configuration -->
2058         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2059       </files>
2060     </component>
2061
2062
2063     <!-- CMSIS-DSP component -->
2064     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
2065       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2066       <files>
2067         <!-- CPU independent -->
2068         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2069         <file category="header" name="CMSIS/Include/arm_math.h"/>
2070
2071         <!-- CPU and Compiler dependent -->
2072         <!-- ARMCC -->
2073         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2074         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2075         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2076         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2077         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2078         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2079         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2080         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2081         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2082         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2083         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2084         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2085         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2086         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2087 <!--
2088         <file category="library" condition="CM23_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2089         <file category="library" condition="CM33_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2090         <file category="library" condition="CM33_DSP_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2091         <file category="library" condition="CM33_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2092         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2093         <file category="library" condition="ARMv8MBL_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2094         <file category="library" condition="ARMv8MML_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2095         <file category="library" condition="ARMv8MML_DSP_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2096         <file category="library" condition="ARMv8MML_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2097         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2098 -->
2099         <!-- GCC -->
2100         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2101         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2102         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2103         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2104         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2105         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2106         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2107 <!--
2108         <file category="library" condition="CM23_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2109         <file category="library" condition="CM33_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2110         <file category="library" condition="CM33_DSP_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2111         <file category="library" condition="CM33_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2112         <file category="library" condition="CM33_DSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2113         <file category="library" condition="ARMv8MBL_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2114         <file category="library" condition="ARMv8MML_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2115         <file category="library" condition="ARMv8MML_DSP_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2116         <file category="library" condition="ARMv8MML_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2117         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"   name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2118 -->
2119       </files>
2120     </component>
2121
2122     <!-- CMSIS-RTOS Keil RTX component -->
2123     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
2124       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2125       <RTE_Components_h>
2126         <!-- the following content goes into file 'RTE_Components.h' -->
2127         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2128         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2129       </RTE_Components_h>
2130       <files>
2131         <!-- CPU independent -->
2132         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2133         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2134         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2135
2136         <!-- RTX templates -->
2137         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2138         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2139         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2140         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2141         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2142         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2143         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2144         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2145         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2146         <!-- tool-chain specific template file -->
2147         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2148         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2149         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2150
2151         <!-- CPU and Compiler dependent -->
2152         <!-- ARMCC -->
2153         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2154         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2155         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2156         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2157         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2158         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2159         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2160         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2161         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2162         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2163         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2164         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2165         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2166         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2167         <!-- GCC -->
2168         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2169         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2170         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2171         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2172         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2173         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2174         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2175         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2176         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2177         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2178         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2179         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2180         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2181         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2182         <!-- IAR -->
2183         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2184         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2185         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2186         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2187         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2188         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2189         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2190         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2191         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2192         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2193         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2194         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2195       </files>
2196     </component>
2197
2198     <!-- CMSIS-RTOS Keil RTX5 component -->
2199     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.1" Capiversion="1.0" condition="RTOS RTX5">
2200       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2201       <RTE_Components_h>
2202         <!-- the following content goes into file 'RTE_Components.h' -->
2203         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2204         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2205       </RTE_Components_h>
2206       <files>
2207         <!-- RTX header file -->
2208         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2209         <!-- RTX compatibility module for API V1 -->
2210         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2211       </files>
2212     </component>
2213
2214     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2215     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5">
2216       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2217       <RTE_Components_h>
2218         <!-- the following content goes into file 'RTE_Components.h' -->
2219         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2220         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2221       </RTE_Components_h>
2222       <files>
2223         <!-- RTX documentation -->
2224         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2225
2226         <!-- RTX header files -->
2227         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2228         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2229
2230         <!-- RTX configuration -->
2231         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2232
2233         <!-- RTX templates -->
2234         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2235         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2236         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2237         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2238         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2239         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2240         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2241         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2242         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2243
2244         <!-- RTX libraries (CPU and Compiler dependent) -->
2245         <!-- ARMCC -->
2246         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2247         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2248         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2249         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2250         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2251         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2252         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2253         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2254         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2255         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2256         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2257         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2258         <!-- GCC -->
2259         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2260         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2261         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2262         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2263         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2264         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2265         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2266         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2267         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2268         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2269         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2270         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2271       </files>
2272     </component>
2273     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5 NS">
2274       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2275       <RTE_Components_h>
2276         <!-- the following content goes into file 'RTE_Components.h' -->
2277         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2278         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2279         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2280       </RTE_Components_h>
2281       <files>
2282         <!-- RTX documentation -->
2283         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2284
2285         <!-- RTX header files -->
2286         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2287         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2288
2289         <!-- RTX configuration -->
2290         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2291
2292         <!-- RTX templates -->
2293         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2294         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2295         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2296         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2297         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2298         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2299         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2300         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2301         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2302
2303         <!-- RTX libraries (CPU and Compiler dependent) -->
2304         <!-- ARMCC -->
2305         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2306         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2307         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2308         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2309         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2310         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2311         <!-- GCC -->
2312         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2313         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2314         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2315         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2316         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2317         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2318       </files>
2319     </component>
2320     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5">
2321       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2322       <RTE_Components_h>
2323         <!-- the following content goes into file 'RTE_Components.h' -->
2324         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2325         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2326         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2327       </RTE_Components_h>
2328       <files>
2329         <!-- RTX documentation -->
2330         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2331
2332         <!-- RTX header files -->
2333         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2334         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2335
2336         <!-- RTX configuration -->
2337         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2338
2339         <!-- RTX templates -->
2340         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2341         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2342         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2343         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2344         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2345         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2346         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2347         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2348         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2349
2350         <!-- RTX sources (core) -->
2351         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2352         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2353         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2354         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2355         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2356         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2357         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2358         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2359         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2360         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2361         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2362         <!-- RTX sources (handlers ARMCC) -->
2363         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2364         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2365         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2366         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2367         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2368         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2369         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2370         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2371         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2372         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2373         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2374         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2375         <!-- RTX sources (handlers GCC) -->
2376         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2377         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2378         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2379         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2380         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2381         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2382         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2383         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2384         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2385         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2386         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2387         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2388       </files>
2389     </component>
2390     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.0.1" Capiversion="2.0" condition="RTOS2 RTX5 NS">
2391       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2392       <RTE_Components_h>
2393         <!-- the following content goes into file 'RTE_Components.h' -->
2394         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2395         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2396         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2397         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2398       </RTE_Components_h>
2399       <files>
2400         <!-- RTX documentation -->
2401         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2402
2403         <!-- RTX header files -->
2404         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2405         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2406
2407         <!-- RTX configuration -->
2408         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2409
2410         <!-- RTX templates -->
2411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2413         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2414         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2415         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2416         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2417         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2418         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2419         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2420
2421         <!-- RTX sources (core) -->
2422         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2423         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2424         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2425         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2426         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2427         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2428         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2429         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2430         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2431         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2432         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2433         <!-- RTX sources (ARMCC handlers) -->
2434         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2435         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2436         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2437         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2438         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2439         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2440         <!-- RTX sources (GCC handlers) -->
2441         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2442         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2443         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2444         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2445         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2446         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2447       </files>
2448     </component>
2449
2450   </components>
2451
2452   <boards>
2453     <board name="uVision Simulator" vendor="Keil">
2454       <description>uVision Simulator</description>
2455       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2456       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2457       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2458       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2459       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2460     </board>
2461   </boards>
2462
2463   <examples>
2464     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2465       <description>DSP_Lib Class Marks example</description>
2466       <board name="uVision Simulator" vendor="Keil"/>
2467       <project>
2468         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2469       </project>
2470       <attributes>
2471         <component Cclass="CMSIS" Cgroup="CORE"/>
2472         <component Cclass="CMSIS" Cgroup="DSP"/>
2473         <component Cclass="Device" Cgroup="Startup"/>
2474         <category>Getting Started</category>
2475       </attributes>
2476     </example>
2477
2478     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2479       <description>DSP_Lib Convolution example</description>
2480       <board name="uVision Simulator" vendor="Keil"/>
2481       <project>
2482         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2483       </project>
2484       <attributes>
2485         <component Cclass="CMSIS" Cgroup="CORE"/>
2486         <component Cclass="CMSIS" Cgroup="DSP"/>
2487         <component Cclass="Device" Cgroup="Startup"/>
2488         <category>Getting Started</category>
2489       </attributes>
2490     </example>
2491
2492     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2493       <description>DSP_Lib Dotproduct example</description>
2494       <board name="uVision Simulator" vendor="Keil"/>
2495       <project>
2496         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2497       </project>
2498       <attributes>
2499         <component Cclass="CMSIS" Cgroup="CORE"/>
2500         <component Cclass="CMSIS" Cgroup="DSP"/>
2501         <component Cclass="Device" Cgroup="Startup"/>
2502         <category>Getting Started</category>
2503       </attributes>
2504     </example>
2505
2506     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2507       <description>DSP_Lib FFT Bin example</description>
2508       <board name="uVision Simulator" vendor="Keil"/>
2509       <project>
2510         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2511       </project>
2512       <attributes>
2513         <component Cclass="CMSIS" Cgroup="CORE"/>
2514         <component Cclass="CMSIS" Cgroup="DSP"/>
2515         <component Cclass="Device" Cgroup="Startup"/>
2516         <category>Getting Started</category>
2517       </attributes>
2518     </example>
2519
2520     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2521       <description>DSP_Lib FIR example</description>
2522       <board name="uVision Simulator" vendor="Keil"/>
2523       <project>
2524         <environment name="uv" load="arm_fir_example.uvprojx"/>
2525       </project>
2526       <attributes>
2527         <component Cclass="CMSIS" Cgroup="CORE"/>
2528         <component Cclass="CMSIS" Cgroup="DSP"/>
2529         <component Cclass="Device" Cgroup="Startup"/>
2530         <category>Getting Started</category>
2531       </attributes>
2532     </example>
2533
2534     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2535       <description>DSP_Lib Graphic Equalizer example</description>
2536       <board name="uVision Simulator" vendor="Keil"/>
2537       <project>
2538         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2539       </project>
2540       <attributes>
2541         <component Cclass="CMSIS" Cgroup="CORE"/>
2542         <component Cclass="CMSIS" Cgroup="DSP"/>
2543         <component Cclass="Device" Cgroup="Startup"/>
2544         <category>Getting Started</category>
2545       </attributes>
2546     </example>
2547
2548     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2549       <description>DSP_Lib Linear Interpolation example</description>
2550       <board name="uVision Simulator" vendor="Keil"/>
2551       <project>
2552         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2553       </project>
2554       <attributes>
2555         <component Cclass="CMSIS" Cgroup="CORE"/>
2556         <component Cclass="CMSIS" Cgroup="DSP"/>
2557         <component Cclass="Device" Cgroup="Startup"/>
2558         <category>Getting Started</category>
2559       </attributes>
2560     </example>
2561
2562     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2563       <description>DSP_Lib Matrix example</description>
2564       <board name="uVision Simulator" vendor="Keil"/>
2565       <project>
2566         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2567       </project>
2568       <attributes>
2569         <component Cclass="CMSIS" Cgroup="CORE"/>
2570         <component Cclass="CMSIS" Cgroup="DSP"/>
2571         <component Cclass="Device" Cgroup="Startup"/>
2572         <category>Getting Started</category>
2573       </attributes>
2574     </example>
2575
2576     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2577       <description>DSP_Lib Signal Convergence example</description>
2578       <board name="uVision Simulator" vendor="Keil"/>
2579       <project>
2580         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2581       </project>
2582       <attributes>
2583         <component Cclass="CMSIS" Cgroup="CORE"/>
2584         <component Cclass="CMSIS" Cgroup="DSP"/>
2585         <component Cclass="Device" Cgroup="Startup"/>
2586         <category>Getting Started</category>
2587       </attributes>
2588     </example>
2589
2590     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2591       <description>DSP_Lib Sinus/Cosinus example</description>
2592       <board name="uVision Simulator" vendor="Keil"/>
2593       <project>
2594         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2595       </project>
2596       <attributes>
2597         <component Cclass="CMSIS" Cgroup="CORE"/>
2598         <component Cclass="CMSIS" Cgroup="DSP"/>
2599         <component Cclass="Device" Cgroup="Startup"/>
2600         <category>Getting Started</category>
2601       </attributes>
2602     </example>
2603
2604     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2605       <description>DSP_Lib Variance example</description>
2606       <board name="uVision Simulator" vendor="Keil"/>
2607       <project>
2608         <environment name="uv" load="arm_variance_example.uvprojx"/>
2609       </project>
2610       <attributes>
2611         <component Cclass="CMSIS" Cgroup="CORE"/>
2612         <component Cclass="CMSIS" Cgroup="DSP"/>
2613         <component Cclass="Device" Cgroup="Startup"/>
2614         <category>Getting Started</category>
2615       </attributes>
2616     </example>
2617
2618     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2619       <description>CMSIS-RTOS2 Blinky example</description>
2620       <board name="uVision Simulator" vendor="Keil"/>
2621       <project>
2622         <environment name="uv" load="Blinky.uvprojx"/>
2623       </project>
2624       <attributes>
2625         <component Cclass="CMSIS" Cgroup="CORE"/>
2626         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2627         <component Cclass="Device" Cgroup="Startup"/>
2628         <category>Getting Started</category>
2629       </attributes>
2630     </example>
2631
2632     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2633       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2634       <board name="uVision Simulator" vendor="Keil"/>
2635       <project>
2636         <environment name="uv" load="Blinky.uvprojx"/>
2637       </project>
2638       <attributes>
2639         <component Cclass="CMSIS" Cgroup="CORE"/>
2640         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2641         <component Cclass="Device" Cgroup="Startup"/>
2642         <category>Getting Started</category>
2643       </attributes>
2644     </example>
2645
2646     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2647       <description>Bare-metal secure/non-secure example without RTOS</description>
2648       <board name="uVision Simulator" vendor="Keil"/>
2649       <project>
2650         <environment name="uv" load="NoRTOS.uvmpw"/>
2651       </project>
2652       <attributes>
2653         <component Cclass="CMSIS" Cgroup="CORE"/>
2654         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2655         <component Cclass="Device" Cgroup="Startup"/>
2656         <category>Getting Started</category>
2657       </attributes>
2658     </example>
2659
2660     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2661       <description>Secure/non-secure RTOS example with thread context management</description>
2662       <board name="uVision Simulator" vendor="Keil"/>
2663       <project>
2664         <environment name="uv" load="RTOS.uvmpw"/>
2665       </project>
2666       <attributes>
2667         <component Cclass="CMSIS" Cgroup="CORE"/>
2668         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2669         <component Cclass="Device" Cgroup="Startup"/>
2670         <category>Getting Started</category>
2671       </attributes>
2672     </example>
2673
2674     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2675       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2676       <board name="uVision Simulator" vendor="Keil"/>
2677       <project>
2678         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2679       </project>
2680       <attributes>
2681         <component Cclass="CMSIS" Cgroup="CORE"/>
2682         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2683         <component Cclass="Device" Cgroup="Startup"/>
2684         <category>Getting Started</category>
2685       </attributes>
2686     </example>
2687
2688   </examples>
2689
2690 </package>