begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.3.1-dev8">
  12       Cortex-M1:
  13        - Added beta ARMCM1 support.
  14     </release>
  15     <release version="5.3.1-dev7">
  16       Generic Arm Device:
  17        - Reworked ARM device support files.
  18        - Updated RTOS2 examples.
  19        - Updated DSP examples.
  20        - Updated CoreValidation examples.
  21     </release>
  22     <release version="5.3.1-dev6">
  23       Utilities:
  24       - updated SVDConv and PackChk for Win32 and Linux
  25     </release>
  26     <release version="5.3.1-dev5">
  27       Aligned pack structure with repository.
  28       The following folders are deprecated:
  29       - CMSIS/Include/
  30       - CMSIS/DSP_Lib/
  31     </release>
  32     <release version="5.3.1-dev4">
  33       CMSIS-RTOS2:
  34         - API 2.1.3 (see revision history for details)
  35     </release>
  36     <release version="5.3.1-dev3">
  37       RTX5 (Cortex-A): updated exception handling
  38     </release>
  39     <release version="5.3.1-dev2">
  40       CMSIS-RTOS2:
  41         - RTX 5.4.0 (see revision history for details)
  42     </release>
  43     <release version="5.3.1-dev1">
  44       CMSIS-Core(M): 5.1.2 (see revision history for details)
  45       CMSIS-Core(A): 1.1.2 (see revision history for details)
  46       CMSIS-RTOS2:
  47         - RTX 5.3.1 (see revision history for details)
  48       CMSIS-Driver:
  49         - Flash Driver API V2.2.0
  50     </release>
  51     <release version="5.3.1-dev0">
  52       Patch release scheduled for after EW18.
  53     </release>
  54     <release version="5.3.0" date="2018-02-22">
  55       Updated Arm company brand.
  56       CMSIS-Core(M): 5.1.1 (see revision history for details)
  57       CMSIS-Core(A): 1.1.1 (see revision history for details)
  58       CMSIS-DAP: 2.0.0 (see revision history for details)
  59       CMSIS-NN: 1.0.0
  60         - Initial contribution of the bare metal Neural Network Library.
  61       CMSIS-RTOS2:
  62         - RTX 5.3.0 (see revision history for details)
  63         - OS Tick API 1.0.1
  64     </release>
  65     <release version="5.2.0" date="2017-11-16">
  66       CMSIS-Core(M): 5.1.0 (see revision history for details)
  67         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  68         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  69       CMSIS-Core(A): 1.1.0 (see revision history for details)
  70         - Added compiler_iccarm.h.
  71         - Added additional access functions for physical timer.
  72       CMSIS-DAP: 1.2.0 (see revision history for details)
  73       CMSIS-DSP: 1.5.2 (see revision history for details)
  74       CMSIS-Driver: 2.6.0 (see revision history for details)
  75         - CAN Driver API V1.2.0
  76         - NAND Driver API V2.3.0
  77       CMSIS-RTOS:
  78         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  79       CMSIS-RTOS2:
  80         - API 2.1.2 (see revision history for details)
  81         - RTX 5.2.3 (see revision history for details)
  82       Devices:
  83         - Added GCC startup and linker script for Cortex-A9.
  84         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  85         - Added IAR startup code for Cortex-A9
  86     </release>
  87     <release version="5.1.1" date="2017-09-19">
  88       CMSIS-RTOS2:
  89       - RTX 5.2.1 (see revision history for details)
  90     </release>
  91     <release version="5.1.0" date="2017-08-04">
  92       CMSIS-Core(M): 5.0.2 (see revision history for details)
  93       - Changed Version Control macros to be core agnostic.
  94       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  95       CMSIS-Core(A): 1.0.0 (see revision history for details)
  96       - Initial release
  97       - IRQ Controller API 1.0.0
  98       CMSIS-Driver: 2.05 (see revision history for details)
  99       - All typedefs related to status have been made volatile.
 100       CMSIS-RTOS2:
 101       - API 2.1.1 (see revision history for details)
 102       - RTX 5.2.0 (see revision history for details)
 103       - OS Tick API 1.0.0
 104       CMSIS-DSP: 1.5.2 (see revision history for details)
 105       - Fixed GNU Compiler specific diagnostics.
 106       CMSIS-PACK: 1.5.0 (see revision history for details)
 107       - added System Description File (*.SDF) Format
 108       CMSIS-Zone: 0.0.1 (Preview)
 109       - Initial specification draft
 110     </release>
 111     <release version="5.0.1" date="2017-02-03">
 112       Package Description:
 113       - added taxonomy for Cclass RTOS
 114       CMSIS-RTOS2:
 115       - API 2.1   (see revision history for details)
 116       - RTX 5.1.0 (see revision history for details)
 117       CMSIS-Core: 5.0.1 (see revision history for details)
 118       - Added __PACKED_STRUCT macro
 119       - Added uVisior support
 120       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 121       - Updated template for secure main function (main_s.c)
 122       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 123       CMSIS-DSP: 1.5.1 (see revision history for details)
 124       - added ARMv8M DSP libraries.
 125       CMSIS-PACK:1.4.9 (see revision history for details)
 126       - added Pack Index File specification and schema file
 127     </release>
 128     <release version="5.0.0" date="2016-11-11">
 129       Changed open source license to Apache 2.0
 130       CMSIS_Core:
 131        - Added support for Cortex-M23 and Cortex-M33.
 132        - Added ARMv8-M device configurations for mainline and baseline.
 133        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 134        - Added cmsis_compiler.h to unify compiler behaviour.
 135        - Updated function SCB_EnableICache (for Cortex-M7).
 136        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 137       CMSIS-RTOS:
 138         - bug fix in RTX 4.82 (see revision history for details)
 139       CMSIS-RTOS2:
 140         - new API including compatibility layer to CMSIS-RTOS
 141         - reference implementation based on RTX5
 142         - supports all Cortex-M variants including TrustZone for ARMv8-M
 143       CMSIS-SVD:
 144        - reworked SVD format documentation
 145        - removed SVD file database documentation as SVD files are distributed in packs
 146        - updated SVDConv for Win32 and Linux
 147       CMSIS-DSP:
 148        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 149        - Added DSP libraries build projects to CMSIS pack.
 150     </release>
 151     <release version="4.5.0" date="2015-10-28">
 152       - CMSIS-Core     4.30.0  (see revision history for details)
 153       - CMSIS-DAP      1.1.0   (unchanged)
 154       - CMSIS-Driver   2.04.0  (see revision history for details)
 155       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 156       - CMSIS-PACK     1.4.1   (see revision history for details)
 157       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 158       - CMSIS-SVD      1.3.1   (see revision history for details)
 159     </release>
 160     <release version="4.4.0" date="2015-09-11">
 161       - CMSIS-Core     4.20   (see revision history for details)
 162       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 163       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 164       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 165       - CMSIS-RTOS
 166         -- API         1.02   (unchanged)
 167         -- RTX         4.79   (see revision history for details)
 168       - CMSIS-SVD      1.3.0  (see revision history for details)
 169       - CMSIS-DAP      1.1.0  (extended with SWO support)
 170     </release>
 171     <release version="4.3.0" date="2015-03-20">
 172       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 173       - CMSIS-DSP      1.4.5  (see revision history for details)
 174       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 175       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 176       - CMSIS-RTOS
 177         -- API         1.02   (unchanged)
 178         -- RTX         4.78   (see revision history for details)
 179       - CMSIS-SVD      1.2    (unchanged)
 180     </release>
 181     <release version="4.2.0" date="2014-09-24">
 182       Adding Cortex-M7 support
 183       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 184       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 185       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 186       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 187       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 188     </release>
 189     <release version="4.1.1" date="2014-06-30">
 190       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 191     </release>
 192     <release version="4.1.0" date="2014-06-12">
 193       - CMSIS-Driver   2.02  (incompatible update)
 194       - CMSIS-Pack     1.3   (see revision history for details)
 195       - CMSIS-DSP      1.4.2 (unchanged)
 196       - CMSIS-Core     3.30  (unchanged)
 197       - CMSIS-RTOS RTX 4.74  (unchanged)
 198       - CMSIS-RTOS API 1.02  (unchanged)
 199       - CMSIS-SVD      1.10  (unchanged)
 200       PACK:
 201       - removed G++ specific files from PACK
 202       - added Component Startup variant "C Startup"
 203       - added Pack Checking Utility
 204       - updated conditions to reflect tool-chain dependency
 205       - added Taxonomy for Graphics
 206       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 207     </release>
 208     <release version="4.0.0">
 209       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 210       - CMSIS-Pack     1.1   Preliminary
 211       - CMSIS-DSP      1.4.2 (see revision history for details)
 212       - CMSIS-Core     3.30  (see revision history for details)
 213       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 214       - CMSIS-RTOS API 1.02  (unchanged)
 215       - CMSIS-SVD      1.10  (unchanged)
 216     </release>
 217     <release version="3.20.4">
 218       - CMSIS-RTOS 4.74 (see revision history for details)
 219       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 220     </release>
 221     <release version="3.20.3">
 222       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 223       - CMSIS-RTOS 4.73 (see revision history for details)
 224     </release>
 225     <release version="3.20.2">
 226       - CMSIS-Pack documentation has been added
 227       - CMSIS-Drivers header and documentation have been added to PACK
 228       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 229     </release>
 230     <release version="3.20.1">
 231       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 232       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 233     </release>
 234     <release version="3.20.0">
 235       The software portions that are deployed in the application program are now under a BSD license which allows usage
 236       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 237       The individual components have been update as listed below:
 238       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 239       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 240       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 241       - CMSIS-SVD is unchanged.
 242     </release>
 243   </releases>
 244
 245   <taxonomy>
 246     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 247     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 248     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 249     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 250     <description Cclass="File System">File Drive Support and File System</description>
 251     <description Cclass="Graphics">Graphical User Interface</description>
 252     <description Cclass="Network">Network Stack using Internet Protocols</description>
 253     <description Cclass="USB">Universal Serial Bus Stack</description>
 254     <description Cclass="Compiler">Compiler Software Extensions</description>
 255     <description Cclass="RTOS">Real-time Operating System</description>
 256   </taxonomy>
 257
 258   <devices>
 259     <!-- ******************************  Cortex-M0  ****************************** -->
 260     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 261       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 262       <description>
 263 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 264 - simple, easy-to-use programmers model
 265 - highly efficient ultra-low power operation
 266 - excellent code density
 267 - deterministic, high-performance interrupt handling
 268 - upward compatibility with the rest of the Cortex-M processor family.
 269       </description>
 270       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 271       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 272       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 273       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 274
 275       <device Dname="ARMCM0">
 276         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 277         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 278       </device>
 279     </family>
 280
 281     <!-- ******************************  Cortex-M0P  ****************************** -->
 282     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 283       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 284       <description>
 285 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 286 - simple, easy-to-use programmers model
 287 - highly efficient ultra-low power operation
 288 - excellent code density
 289 - deterministic, high-performance interrupt handling
 290 - upward compatibility with the rest of the Cortex-M processor family.
 291       </description>
 292       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 293       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 294       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 295       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 296
 297       <device Dname="ARMCM0P">
 298         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 299         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 300       </device>
 301
 302       <device Dname="ARMCM0P_MPU">
 303         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 304         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 305       </device>
 306     </family>
 307
 308     <!-- ******************************  Cortex-M1  ****************************** -->
 309     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 310       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 311       <description>
 312 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 313 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 314       </description>
 315       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 316       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 317       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 318       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 319
 320       <device Dname="ARMCM1">
 321         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 322         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 323       </device>
 324     </family>
 325
 326     <!-- ******************************  Cortex-M3  ****************************** -->
 327     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 328       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 329       <description>
 330 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 331 - simple, easy-to-use programmers model
 332 - highly efficient ultra-low power operation
 333 - excellent code density
 334 - deterministic, high-performance interrupt handling
 335 - upward compatibility with the rest of the Cortex-M processor family.
 336       </description>
 337       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 338       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 339       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 340       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 341
 342       <device Dname="ARMCM3">
 343         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 344         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 345       </device>
 346     </family>
 347
 348     <!-- ******************************  Cortex-M4  ****************************** -->
 349     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 350       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 351       <description>
 352 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 353 - simple, easy-to-use programmers model
 354 - highly efficient ultra-low power operation
 355 - excellent code density
 356 - deterministic, high-performance interrupt handling
 357 - upward compatibility with the rest of the Cortex-M processor family.
 358       </description>
 359       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 360       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 361       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 362       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 363
 364       <device Dname="ARMCM4">
 365         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 366         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 367       </device>
 368
 369       <device Dname="ARMCM4_FP">
 370         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 371         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 372       </device>
 373     </family>
 374
 375     <!-- ******************************  Cortex-M7  ****************************** -->
 376     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 377       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 378       <description>
 379 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 380 - simple, easy-to-use programmers model
 381 - highly efficient ultra-low power operation
 382 - excellent code density
 383 - deterministic, high-performance interrupt handling
 384 - upward compatibility with the rest of the Cortex-M processor family.
 385       </description>
 386       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 387       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 388       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 389       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 390
 391       <device Dname="ARMCM7">
 392         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 393         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 394       </device>
 395
 396       <device Dname="ARMCM7_SP">
 397         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 398         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 399       </device>
 400
 401       <device Dname="ARMCM7_DP">
 402         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 403         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 404       </device>
 405     </family>
 406
 407     <!-- ******************************  Cortex-M23  ********************** -->
 408     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 409       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 410       <description>
 411 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 412 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 413 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 414       </description>
 415       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 416       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 417       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 418       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 419       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 420       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 421
 422       <device Dname="ARMCM23">
 423         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 424         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 425       </device>
 426
 427       <device Dname="ARMCM23_TZ">
 428         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 429         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 430       </device>
 431     </family>
 432
 433     <!-- ******************************  Cortex-M33  ****************************** -->
 434     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 435       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 436       <description>
 437 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 438 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 439       </description>
 440       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 441       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 442       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 443       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 444       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 445       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 446
 447       <device Dname="ARMCM33">
 448         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 449         <description>
 450           no DSP Instructions, no Floating Point Unit, no TrustZone
 451         </description>
 452         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 453       </device>
 454
 455       <device Dname="ARMCM33_TZ">
 456         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 457         <description>
 458           no DSP Instructions, no Floating Point Unit, TrustZone
 459         </description>
 460         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 461       </device>
 462
 463       <device Dname="ARMCM33_DSP_FP">
 464         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 465         <description>
 466           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 467         </description>
 468         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 469       </device>
 470
 471       <device Dname="ARMCM33_DSP_FP_TZ">
 472         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 473         <description>
 474           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 475         </description>
 476         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 477       </device>
 478     </family>
 479
 480     <!-- ******************************  ARMSC000  ****************************** -->
 481     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 482       <description>
 483 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 484 - simple, easy-to-use programmers model
 485 - highly efficient ultra-low power operation
 486 - excellent code density
 487 - deterministic, high-performance interrupt handling
 488       </description>
 489       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 490       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 491       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 492       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 493
 494       <device Dname="ARMSC000">
 495         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 496         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 497       </device>
 498     </family>
 499
 500     <!-- ******************************  ARMSC300  ****************************** -->
 501     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 502       <description>
 503 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 504 - simple, easy-to-use programmers model
 505 - highly efficient ultra-low power operation
 506 - excellent code density
 507 - deterministic, high-performance interrupt handling
 508       </description>
 509       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 510       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 511       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 512       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 513
 514       <device Dname="ARMSC300">
 515         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 516         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 517       </device>
 518     </family>
 519
 520     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 521     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 522       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 523       <description>
 524 Armv8-M Baseline based device with TrustZone
 525       </description>
 526       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 527       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 528       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 529       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 530       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 531       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 532
 533       <device Dname="ARMv8MBL">
 534         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 535         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 536       </device>
 537     </family>
 538
 539     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 540     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 541       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 542       <description>
 543 Armv8-M Mainline based device with TrustZone
 544       </description>
 545       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 546       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 547       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 548       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 549       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 550       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 551
 552       <device Dname="ARMv8MML">
 553         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 554         <description>
 555           no DSP Instructions, no Floating Point Unit, TrustZone
 556         </description>
 557         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 558       </device>
 559
 560       <device Dname="ARMv8MML_DSP">
 561         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 562         <description>
 563           DSP Instructions, no Floating Point Unit, TrustZone
 564         </description>
 565         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 566       </device>
 567
 568       <device Dname="ARMv8MML_SP">
 569         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 570         <description>
 571           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 572         </description>
 573         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 574       </device>
 575
 576       <device Dname="ARMv8MML_DSP_SP">
 577         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 578         <description>
 579           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 580         </description>
 581         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 582       </device>
 583
 584       <device Dname="ARMv8MML_DP">
 585         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 586         <description>
 587           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 588         </description>
 589         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 590       </device>
 591
 592       <device Dname="ARMv8MML_DSP_DP">
 593         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 594         <description>
 595           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 596         </description>
 597         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 598       </device>
 599     </family>
 600
 601     <!-- ******************************  Cortex-A5  ****************************** -->
 602     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 603       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 604       <description>
 605 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 606 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 607 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 608       </description>
 609
 610       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 611       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 612
 613       <device Dname="ARMCA5">
 614         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 615         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 616       </device>
 617     </family>
 618
 619     <!-- ******************************  Cortex-A7  ****************************** -->
 620     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 621       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 622       <description>
 623 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 624 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 625 an optional integrated GIC, and an optional L2 cache controller.
 626       </description>
 627
 628       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 629       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 630
 631       <device Dname="ARMCA7">
 632         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 633         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 634       </device>
 635     </family>
 636
 637     <!-- ******************************  Cortex-A9  ****************************** -->
 638     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 639       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 640       <description>
 641 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 642 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 643 and 8-bit Java bytecodes in Jazelle state.
 644       </description>
 645
 646       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 647       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 648
 649       <device Dname="ARMCA9">
 650         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 651         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 652       </device>
 653     </family>
 654   </devices>
 655
 656
 657   <apis>
 658     <!-- CMSIS Device API -->
 659     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 660       <description>Device interrupt controller interface</description>
 661       <files>
 662         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 663       </files>
 664     </api>
 665     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 666       <description>RTOS Kernel system tick timer interface</description>
 667       <files>
 668         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 669       </files>
 670     </api>
 671     <!-- CMSIS-RTOS API -->
 672     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 673       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 674       <files>
 675         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 676       </files>
 677     </api>
 678     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 679       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 680       <files>
 681         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 682         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 683       </files>
 684     </api>
 685     <!-- CMSIS Driver API -->
 686     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 687       <description>USART Driver API for Cortex-M</description>
 688       <files>
 689         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 690         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 691       </files>
 692     </api>
 693     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 694       <description>SPI Driver API for Cortex-M</description>
 695       <files>
 696         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 697         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 698       </files>
 699     </api>
 700     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 701       <description>SAI Driver API for Cortex-M</description>
 702       <files>
 703         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 704         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 705       </files>
 706     </api>
 707     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 708       <description>I2C Driver API for Cortex-M</description>
 709       <files>
 710         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 711         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 712       </files>
 713     </api>
 714     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 715       <description>CAN Driver API for Cortex-M</description>
 716       <files>
 717         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 718         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 719       </files>
 720     </api>
 721     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 722       <description>Flash Driver API for Cortex-M</description>
 723       <files>
 724         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 725         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 726       </files>
 727     </api>
 728     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 729       <description>MCI Driver API for Cortex-M</description>
 730       <files>
 731         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 732         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 733       </files>
 734     </api>
 735     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 736       <description>NAND Flash Driver API for Cortex-M</description>
 737       <files>
 738         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 739         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 740       </files>
 741     </api>
 742     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 743       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 744       <files>
 745         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 746         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 747         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 748       </files>
 749     </api>
 750     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 751       <description>Ethernet MAC Driver API for Cortex-M</description>
 752       <files>
 753         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 754         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 755       </files>
 756     </api>
 757     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 758       <description>Ethernet PHY Driver API for Cortex-M</description>
 759       <files>
 760         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 761         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 762       </files>
 763     </api>
 764     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 765       <description>USB Device Driver API for Cortex-M</description>
 766       <files>
 767         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 768         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 769       </files>
 770     </api>
 771     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 772       <description>USB Host Driver API for Cortex-M</description>
 773       <files>
 774         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 775         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 776       </files>
 777     </api>
 778   </apis>
 779
 780   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 781   <conditions>
 782     <!-- compiler -->
 783     <condition id="ARMCC6">
 784       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 785       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 786     </condition>
 787     <condition id="ARMCC5">
 788       <require Tcompiler="ARMCC" Toptions="AC5"/>
 789     </condition>
 790     <condition id="ARMCC">
 791       <require Tcompiler="ARMCC"/>
 792     </condition>
 793     <condition id="GCC">
 794       <require Tcompiler="GCC"/>
 795     </condition>
 796     <condition id="IAR">
 797       <require Tcompiler="IAR"/>
 798     </condition>
 799     <condition id="ARMCC GCC">
 800       <accept Tcompiler="ARMCC"/>
 801       <accept Tcompiler="GCC"/>
 802     </condition>
 803     <condition id="ARMCC GCC IAR">
 804       <accept Tcompiler="ARMCC"/>
 805       <accept Tcompiler="GCC"/>
 806       <accept Tcompiler="IAR"/>
 807     </condition>
 808
 809     <!-- Arm architecture -->
 810     <condition id="ARMv6-M Device">
 811       <description>Armv6-M architecture based device</description>
 812       <accept Dcore="Cortex-M0"/>
 813       <accept Dcore="Cortex-M1"/>
 814       <accept Dcore="Cortex-M0+"/>
 815       <accept Dcore="SC000"/>
 816     </condition>
 817     <condition id="ARMv7-M Device">
 818       <description>Armv7-M architecture based device</description>
 819       <accept Dcore="Cortex-M3"/>
 820       <accept Dcore="Cortex-M4"/>
 821       <accept Dcore="Cortex-M7"/>
 822       <accept Dcore="SC300"/>
 823     </condition>
 824     <condition id="ARMv8-M Device">
 825       <description>Armv8-M architecture based device</description>
 826       <accept Dcore="ARMV8MBL"/>
 827       <accept Dcore="ARMV8MML"/>
 828       <accept Dcore="Cortex-M23"/>
 829       <accept Dcore="Cortex-M33"/>
 830     </condition>
 831     <condition id="ARMv8-M TZ Device">
 832       <description>Armv8-M architecture based device with TrustZone</description>
 833       <require condition="ARMv8-M Device"/>
 834       <require Dtz="TZ"/>
 835     </condition>
 836     <condition id="ARMv6_7-M Device">
 837       <description>Armv6_7-M architecture based device</description>
 838       <accept condition="ARMv6-M Device"/>
 839       <accept condition="ARMv7-M Device"/>
 840     </condition>
 841     <condition id="ARMv6_7_8-M Device">
 842       <description>Armv6_7_8-M architecture based device</description>
 843       <accept condition="ARMv6-M Device"/>
 844       <accept condition="ARMv7-M Device"/>
 845       <accept condition="ARMv8-M Device"/>
 846     </condition>
 847     <condition id="ARMv7-A Device">
 848       <description>Armv7-A architecture based device</description>
 849       <accept Dcore="Cortex-A5"/>
 850       <accept Dcore="Cortex-A7"/>
 851       <accept Dcore="Cortex-A9"/>
 852     </condition>
 853
 854     <!-- ARM core -->
 855     <condition id="CM0">
 856       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 857       <accept Dcore="Cortex-M0"/>
 858       <accept Dcore="Cortex-M0+"/>
 859       <accept Dcore="SC000"/>
 860     </condition>
 861     <condition id="CM1">
 862       <description>Cortex-M1</description>
 863       <require Dcore="Cortex-M1"/>
 864     </condition>
 865     <condition id="CM3">
 866       <description>Cortex-M3 or SC300 processor based device</description>
 867       <accept Dcore="Cortex-M3"/>
 868       <accept Dcore="SC300"/>
 869     </condition>
 870     <condition id="CM4">
 871       <description>Cortex-M4 processor based device</description>
 872       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 873     </condition>
 874     <condition id="CM4_FP">
 875       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 876       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 877       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 878       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 879     </condition>
 880     <condition id="CM7">
 881       <description>Cortex-M7 processor based device</description>
 882       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 883     </condition>
 884     <condition id="CM7_FP">
 885       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 886       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 887       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 888     </condition>
 889     <condition id="CM7_SP">
 890       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 891       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 892     </condition>
 893     <condition id="CM7_DP">
 894       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 895       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 896     </condition>
 897     <condition id="CM23">
 898       <description>Cortex-M23 processor based device</description>
 899       <require Dcore="Cortex-M23"/>
 900     </condition>
 901     <condition id="CM33">
 902       <description>Cortex-M33 processor based device</description>
 903       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 904     </condition>
 905     <condition id="CM33_FP">
 906       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 907       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 908     </condition>
 909     <condition id="ARMv8MBL">
 910       <description>Armv8-M Baseline processor based device</description>
 911       <require Dcore="ARMV8MBL"/>
 912     </condition>
 913     <condition id="ARMv8MML">
 914       <description>Armv8-M Mainline processor based device</description>
 915       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 916     </condition>
 917     <condition id="ARMv8MML_FP">
 918       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
 919       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 920       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 921     </condition>
 922
 923     <condition id="CM33_NODSP_NOFPU">
 924       <description>CM33, no DSP, no FPU</description>
 925       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 926     </condition>
 927     <condition id="CM33_DSP_NOFPU">
 928       <description>CM33, DSP, no FPU</description>
 929       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 930     </condition>
 931     <condition id="CM33_NODSP_SP">
 932       <description>CM33, no DSP, SP FPU</description>
 933       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 934     </condition>
 935     <condition id="CM33_DSP_SP">
 936       <description>CM33, DSP, SP FPU</description>
 937       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 938     </condition>
 939
 940     <condition id="ARMv8MML_NODSP_NOFPU">
 941       <description>Armv8-M Mainline, no DSP, no FPU</description>
 942       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 943     </condition>
 944     <condition id="ARMv8MML_DSP_NOFPU">
 945       <description>Armv8-M Mainline, DSP, no FPU</description>
 946       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 947     </condition>
 948     <condition id="ARMv8MML_NODSP_SP">
 949       <description>Armv8-M Mainline, no DSP, SP FPU</description>
 950       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 951     </condition>
 952     <condition id="ARMv8MML_DSP_SP">
 953       <description>Armv8-M Mainline, DSP, SP FPU</description>
 954       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 955     </condition>
 956
 957     <condition id="CA5_CA9">
 958       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 959       <accept Dcore="Cortex-A5"/>
 960       <accept Dcore="Cortex-A9"/>
 961     </condition>
 962
 963     <condition id="CA7">
 964       <description>Cortex-A7 processor based device</description>
 965       <accept Dcore="Cortex-A7"/>
 966     </condition>
 967
 968     <!-- ARMCC compiler -->
 969     <condition id="CA_ARMCC5">
 970       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
 971       <require condition="ARMv7-A Device"/>
 972       <require condition="ARMCC5"/>
 973     </condition>
 974     <condition id="CA_ARMCC6">
 975       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
 976       <require condition="ARMv7-A Device"/>
 977       <require condition="ARMCC6"/>
 978     </condition>
 979
 980     <condition id="CM0_ARMCC">
 981       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
 982       <require condition="CM0"/>
 983       <require Tcompiler="ARMCC"/>
 984     </condition>
 985     <condition id="CM0_LE_ARMCC">
 986       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
 987       <require condition="CM0_ARMCC"/>
 988       <require Dendian="Little-endian"/>
 989     </condition>
 990     <condition id="CM0_BE_ARMCC">
 991       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
 992       <require condition="CM0_ARMCC"/>
 993       <require Dendian="Big-endian"/>
 994     </condition>
 995
 996     <condition id="CM1_ARMCC">
 997       <description>Cortex-M1 based device for the Arm Compiler</description>
 998       <require condition="CM1"/>
 999       <require Tcompiler="ARMCC"/>
1000     </condition>
1001     <condition id="CM1_LE_ARMCC">
1002       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1003       <require condition="CM1_ARMCC"/>
1004       <require Dendian="Little-endian"/>
1005     </condition>
1006     <condition id="CM1_BE_ARMCC">
1007       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1008       <require condition="CM1_ARMCC"/>
1009       <require Dendian="Big-endian"/>
1010     </condition>
1011
1012     <condition id="CM3_ARMCC">
1013       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1014       <require condition="CM3"/>
1015       <require Tcompiler="ARMCC"/>
1016     </condition>
1017     <condition id="CM3_LE_ARMCC">
1018       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1019       <require condition="CM3_ARMCC"/>
1020       <require Dendian="Little-endian"/>
1021     </condition>
1022     <condition id="CM3_BE_ARMCC">
1023       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1024       <require condition="CM3_ARMCC"/>
1025       <require Dendian="Big-endian"/>
1026     </condition>
1027
1028     <condition id="CM4_ARMCC">
1029       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1030       <require condition="CM4"/>
1031       <require Tcompiler="ARMCC"/>
1032     </condition>
1033     <condition id="CM4_LE_ARMCC">
1034       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1035       <require condition="CM4_ARMCC"/>
1036       <require Dendian="Little-endian"/>
1037     </condition>
1038     <condition id="CM4_BE_ARMCC">
1039       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1040       <require condition="CM4_ARMCC"/>
1041       <require Dendian="Big-endian"/>
1042     </condition>
1043
1044     <condition id="CM4_FP_ARMCC">
1045       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1046       <require condition="CM4_FP"/>
1047       <require Tcompiler="ARMCC"/>
1048     </condition>
1049     <condition id="CM4_FP_LE_ARMCC">
1050       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1051       <require condition="CM4_FP_ARMCC"/>
1052       <require Dendian="Little-endian"/>
1053     </condition>
1054     <condition id="CM4_FP_BE_ARMCC">
1055       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1056       <require condition="CM4_FP_ARMCC"/>
1057       <require Dendian="Big-endian"/>
1058     </condition>
1059
1060     <condition id="CM7_ARMCC">
1061       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1062       <require condition="CM7"/>
1063       <require Tcompiler="ARMCC"/>
1064     </condition>
1065     <condition id="CM7_LE_ARMCC">
1066       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1067       <require condition="CM7_ARMCC"/>
1068       <require Dendian="Little-endian"/>
1069     </condition>
1070     <condition id="CM7_BE_ARMCC">
1071       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1072       <require condition="CM7_ARMCC"/>
1073       <require Dendian="Big-endian"/>
1074     </condition>
1075
1076     <condition id="CM7_FP_ARMCC">
1077       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1078       <require condition="CM7_FP"/>
1079       <require Tcompiler="ARMCC"/>
1080     </condition>
1081     <condition id="CM7_FP_LE_ARMCC">
1082       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1083       <require condition="CM7_FP_ARMCC"/>
1084       <require Dendian="Little-endian"/>
1085     </condition>
1086     <condition id="CM7_FP_BE_ARMCC">
1087       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1088       <require condition="CM7_FP_ARMCC"/>
1089       <require Dendian="Big-endian"/>
1090     </condition>
1091
1092     <condition id="CM7_SP_ARMCC">
1093       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1094       <require condition="CM7_SP"/>
1095       <require Tcompiler="ARMCC"/>
1096     </condition>
1097     <condition id="CM7_SP_LE_ARMCC">
1098       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1099       <require condition="CM7_SP_ARMCC"/>
1100       <require Dendian="Little-endian"/>
1101     </condition>
1102     <condition id="CM7_SP_BE_ARMCC">
1103       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1104       <require condition="CM7_SP_ARMCC"/>
1105       <require Dendian="Big-endian"/>
1106     </condition>
1107
1108     <condition id="CM7_DP_ARMCC">
1109       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1110       <require condition="CM7_DP"/>
1111       <require Tcompiler="ARMCC"/>
1112     </condition>
1113     <condition id="CM7_DP_LE_ARMCC">
1114       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1115       <require condition="CM7_DP_ARMCC"/>
1116       <require Dendian="Little-endian"/>
1117     </condition>
1118     <condition id="CM7_DP_BE_ARMCC">
1119       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1120       <require condition="CM7_DP_ARMCC"/>
1121       <require Dendian="Big-endian"/>
1122     </condition>
1123
1124     <condition id="CM23_ARMCC">
1125       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1126       <require condition="CM23"/>
1127       <require Tcompiler="ARMCC"/>
1128     </condition>
1129     <condition id="CM23_LE_ARMCC">
1130       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1131       <require condition="CM23_ARMCC"/>
1132       <require Dendian="Little-endian"/>
1133     </condition>
1134     <condition id="CM23_BE_ARMCC">
1135       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1136       <require condition="CM23_ARMCC"/>
1137       <require Dendian="Big-endian"/>
1138     </condition>
1139
1140     <condition id="CM33_ARMCC">
1141       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1142       <require condition="CM33"/>
1143       <require Tcompiler="ARMCC"/>
1144     </condition>
1145     <condition id="CM33_LE_ARMCC">
1146       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1147       <require condition="CM33_ARMCC"/>
1148       <require Dendian="Little-endian"/>
1149     </condition>
1150     <condition id="CM33_BE_ARMCC">
1151       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1152       <require condition="CM33_ARMCC"/>
1153       <require Dendian="Big-endian"/>
1154     </condition>
1155
1156     <condition id="CM33_FP_ARMCC">
1157       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1158       <require condition="CM33_FP"/>
1159       <require Tcompiler="ARMCC"/>
1160     </condition>
1161     <condition id="CM33_FP_LE_ARMCC">
1162       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1163       <require condition="CM33_FP_ARMCC"/>
1164       <require Dendian="Little-endian"/>
1165     </condition>
1166     <condition id="CM33_FP_BE_ARMCC">
1167       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1168       <require condition="CM33_FP_ARMCC"/>
1169       <require Dendian="Big-endian"/>
1170     </condition>
1171
1172     <condition id="CM33_NODSP_NOFPU_ARMCC">
1173       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1174       <require condition="CM33_NODSP_NOFPU"/>
1175       <require Tcompiler="ARMCC"/>
1176     </condition>
1177     <condition id="CM33_DSP_NOFPU_ARMCC">
1178       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1179       <require condition="CM33_DSP_NOFPU"/>
1180       <require Tcompiler="ARMCC"/>
1181     </condition>
1182     <condition id="CM33_NODSP_SP_ARMCC">
1183       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1184       <require condition="CM33_NODSP_SP"/>
1185       <require Tcompiler="ARMCC"/>
1186     </condition>
1187     <condition id="CM33_DSP_SP_ARMCC">
1188       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1189       <require condition="CM33_DSP_SP"/>
1190       <require Tcompiler="ARMCC"/>
1191     </condition>
1192     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1193       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1194       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1195       <require Dendian="Little-endian"/>
1196     </condition>
1197     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1198       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1199       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1200       <require Dendian="Little-endian"/>
1201     </condition>
1202     <condition id="CM33_NODSP_SP_LE_ARMCC">
1203       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1204       <require condition="CM33_NODSP_SP_ARMCC"/>
1205       <require Dendian="Little-endian"/>
1206     </condition>
1207     <condition id="CM33_DSP_SP_LE_ARMCC">
1208       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1209       <require condition="CM33_DSP_SP_ARMCC"/>
1210       <require Dendian="Little-endian"/>
1211     </condition>
1212
1213     <condition id="ARMv8MBL_ARMCC">
1214       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1215       <require condition="ARMv8MBL"/>
1216       <require Tcompiler="ARMCC"/>
1217     </condition>
1218     <condition id="ARMv8MBL_LE_ARMCC">
1219       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1220       <require condition="ARMv8MBL_ARMCC"/>
1221       <require Dendian="Little-endian"/>
1222     </condition>
1223     <condition id="ARMv8MBL_BE_ARMCC">
1224       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1225       <require condition="ARMv8MBL_ARMCC"/>
1226       <require Dendian="Big-endian"/>
1227     </condition>
1228
1229     <condition id="ARMv8MML_ARMCC">
1230       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1231       <require condition="ARMv8MML"/>
1232       <require Tcompiler="ARMCC"/>
1233     </condition>
1234     <condition id="ARMv8MML_LE_ARMCC">
1235       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1236       <require condition="ARMv8MML_ARMCC"/>
1237       <require Dendian="Little-endian"/>
1238     </condition>
1239     <condition id="ARMv8MML_BE_ARMCC">
1240       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1241       <require condition="ARMv8MML_ARMCC"/>
1242       <require Dendian="Big-endian"/>
1243     </condition>
1244
1245     <condition id="ARMv8MML_FP_ARMCC">
1246       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1247       <require condition="ARMv8MML_FP"/>
1248       <require Tcompiler="ARMCC"/>
1249     </condition>
1250     <condition id="ARMv8MML_FP_LE_ARMCC">
1251       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1252       <require condition="ARMv8MML_FP_ARMCC"/>
1253       <require Dendian="Little-endian"/>
1254     </condition>
1255     <condition id="ARMv8MML_FP_BE_ARMCC">
1256       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1257       <require condition="ARMv8MML_FP_ARMCC"/>
1258       <require Dendian="Big-endian"/>
1259     </condition>
1260
1261     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1262       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1263       <require condition="ARMv8MML_NODSP_NOFPU"/>
1264       <require Tcompiler="ARMCC"/>
1265     </condition>
1266     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1267       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1268       <require condition="ARMv8MML_DSP_NOFPU"/>
1269       <require Tcompiler="ARMCC"/>
1270     </condition>
1271     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1272       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1273       <require condition="ARMv8MML_NODSP_SP"/>
1274       <require Tcompiler="ARMCC"/>
1275     </condition>
1276     <condition id="ARMv8MML_DSP_SP_ARMCC">
1277       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1278       <require condition="ARMv8MML_DSP_SP"/>
1279       <require Tcompiler="ARMCC"/>
1280     </condition>
1281     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1282       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1283       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1284       <require Dendian="Little-endian"/>
1285     </condition>
1286     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1287       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1288       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1289       <require Dendian="Little-endian"/>
1290     </condition>
1291     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1292       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1293       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1294       <require Dendian="Little-endian"/>
1295     </condition>
1296     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1297       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1298       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1299       <require Dendian="Little-endian"/>
1300     </condition>
1301
1302     <!-- GCC compiler -->
1303     <condition id="CA_GCC">
1304       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1305       <require condition="ARMv7-A Device"/>
1306       <require Tcompiler="GCC"/>
1307     </condition>
1308
1309     <condition id="CM0_GCC">
1310       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1311       <require condition="CM0"/>
1312       <require Tcompiler="GCC"/>
1313     </condition>
1314     <condition id="CM0_LE_GCC">
1315       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1316       <require condition="CM0_GCC"/>
1317       <require Dendian="Little-endian"/>
1318     </condition>
1319     <condition id="CM0_BE_GCC">
1320       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1321       <require condition="CM0_GCC"/>
1322       <require Dendian="Big-endian"/>
1323     </condition>
1324
1325     <condition id="CM1_GCC">
1326       <description>Cortex-M1 based device for the GCC Compiler</description>
1327       <require condition="CM1"/>
1328       <require Tcompiler="GCC"/>
1329     </condition>
1330     <condition id="CM1_LE_GCC">
1331       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1332       <require condition="CM1_GCC"/>
1333       <require Dendian="Little-endian"/>
1334     </condition>
1335     <condition id="CM1_BE_GCC">
1336       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1337       <require condition="CM1_GCC"/>
1338       <require Dendian="Big-endian"/>
1339     </condition>
1340
1341     <condition id="CM3_GCC">
1342       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1343       <require condition="CM3"/>
1344       <require Tcompiler="GCC"/>
1345     </condition>
1346     <condition id="CM3_LE_GCC">
1347       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1348       <require condition="CM3_GCC"/>
1349       <require Dendian="Little-endian"/>
1350     </condition>
1351     <condition id="CM3_BE_GCC">
1352       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1353       <require condition="CM3_GCC"/>
1354       <require Dendian="Big-endian"/>
1355     </condition>
1356
1357     <condition id="CM4_GCC">
1358       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1359       <require condition="CM4"/>
1360       <require Tcompiler="GCC"/>
1361     </condition>
1362     <condition id="CM4_LE_GCC">
1363       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1364       <require condition="CM4_GCC"/>
1365       <require Dendian="Little-endian"/>
1366     </condition>
1367     <condition id="CM4_BE_GCC">
1368       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1369       <require condition="CM4_GCC"/>
1370       <require Dendian="Big-endian"/>
1371     </condition>
1372
1373     <condition id="CM4_FP_GCC">
1374       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1375       <require condition="CM4_FP"/>
1376       <require Tcompiler="GCC"/>
1377     </condition>
1378     <condition id="CM4_FP_LE_GCC">
1379       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1380       <require condition="CM4_FP_GCC"/>
1381       <require Dendian="Little-endian"/>
1382     </condition>
1383     <condition id="CM4_FP_BE_GCC">
1384       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1385       <require condition="CM4_FP_GCC"/>
1386       <require Dendian="Big-endian"/>
1387     </condition>
1388
1389     <condition id="CM7_GCC">
1390       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1391       <require condition="CM7"/>
1392       <require Tcompiler="GCC"/>
1393     </condition>
1394     <condition id="CM7_LE_GCC">
1395       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1396       <require condition="CM7_GCC"/>
1397       <require Dendian="Little-endian"/>
1398     </condition>
1399     <condition id="CM7_BE_GCC">
1400       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1401       <require condition="CM7_GCC"/>
1402       <require Dendian="Big-endian"/>
1403     </condition>
1404
1405     <condition id="CM7_FP_GCC">
1406       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1407       <require condition="CM7_FP"/>
1408       <require Tcompiler="GCC"/>
1409     </condition>
1410     <condition id="CM7_FP_LE_GCC">
1411       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1412       <require condition="CM7_FP_GCC"/>
1413       <require Dendian="Little-endian"/>
1414     </condition>
1415     <condition id="CM7_FP_BE_GCC">
1416       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1417       <require condition="CM7_FP_GCC"/>
1418       <require Dendian="Big-endian"/>
1419     </condition>
1420
1421     <condition id="CM7_SP_GCC">
1422       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1423       <require condition="CM7_SP"/>
1424       <require Tcompiler="GCC"/>
1425     </condition>
1426     <condition id="CM7_SP_LE_GCC">
1427       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1428       <require condition="CM7_SP_GCC"/>
1429       <require Dendian="Little-endian"/>
1430     </condition>
1431     <condition id="CM7_SP_BE_GCC">
1432       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1433       <require condition="CM7_SP_GCC"/>
1434       <require Dendian="Big-endian"/>
1435     </condition>
1436
1437     <condition id="CM7_DP_GCC">
1438       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1439       <require condition="CM7_DP"/>
1440       <require Tcompiler="GCC"/>
1441     </condition>
1442     <condition id="CM7_DP_LE_GCC">
1443       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1444       <require condition="CM7_DP_GCC"/>
1445       <require Dendian="Little-endian"/>
1446     </condition>
1447     <condition id="CM7_DP_BE_GCC">
1448       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1449       <require condition="CM7_DP_GCC"/>
1450       <require Dendian="Big-endian"/>
1451     </condition>
1452
1453     <condition id="CM23_GCC">
1454       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1455       <require condition="CM23"/>
1456       <require Tcompiler="GCC"/>
1457     </condition>
1458     <condition id="CM23_LE_GCC">
1459       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1460       <require condition="CM23_GCC"/>
1461       <require Dendian="Little-endian"/>
1462     </condition>
1463     <condition id="CM23_BE_GCC">
1464       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1465       <require condition="CM23_GCC"/>
1466       <require Dendian="Big-endian"/>
1467     </condition>
1468
1469     <condition id="CM33_GCC">
1470       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1471       <require condition="CM33"/>
1472       <require Tcompiler="GCC"/>
1473     </condition>
1474     <condition id="CM33_LE_GCC">
1475       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1476       <require condition="CM33_GCC"/>
1477       <require Dendian="Little-endian"/>
1478     </condition>
1479     <condition id="CM33_BE_GCC">
1480       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1481       <require condition="CM33_GCC"/>
1482       <require Dendian="Big-endian"/>
1483     </condition>
1484
1485     <condition id="CM33_FP_GCC">
1486       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1487       <require condition="CM33_FP"/>
1488       <require Tcompiler="GCC"/>
1489     </condition>
1490     <condition id="CM33_FP_LE_GCC">
1491       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1492       <require condition="CM33_FP_GCC"/>
1493       <require Dendian="Little-endian"/>
1494     </condition>
1495     <condition id="CM33_FP_BE_GCC">
1496       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1497       <require condition="CM33_FP_GCC"/>
1498       <require Dendian="Big-endian"/>
1499     </condition>
1500
1501     <condition id="CM33_NODSP_NOFPU_GCC">
1502       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1503       <require condition="CM33_NODSP_NOFPU"/>
1504       <require Tcompiler="GCC"/>
1505     </condition>
1506     <condition id="CM33_DSP_NOFPU_GCC">
1507       <description>CM33, DSP, no FPU, GCC Compiler</description>
1508       <require condition="CM33_DSP_NOFPU"/>
1509       <require Tcompiler="GCC"/>
1510     </condition>
1511     <condition id="CM33_NODSP_SP_GCC">
1512       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1513       <require condition="CM33_NODSP_SP"/>
1514       <require Tcompiler="GCC"/>
1515     </condition>
1516     <condition id="CM33_DSP_SP_GCC">
1517       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1518       <require condition="CM33_DSP_SP"/>
1519       <require Tcompiler="GCC"/>
1520     </condition>
1521     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1522       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1523       <require condition="CM33_NODSP_NOFPU_GCC"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526     <condition id="CM33_DSP_NOFPU_LE_GCC">
1527       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1528       <require condition="CM33_DSP_NOFPU_GCC"/>
1529       <require Dendian="Little-endian"/>
1530     </condition>
1531     <condition id="CM33_NODSP_SP_LE_GCC">
1532       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1533       <require condition="CM33_NODSP_SP_GCC"/>
1534       <require Dendian="Little-endian"/>
1535     </condition>
1536     <condition id="CM33_DSP_SP_LE_GCC">
1537       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1538       <require condition="CM33_DSP_SP_GCC"/>
1539       <require Dendian="Little-endian"/>
1540     </condition>
1541
1542     <condition id="ARMv8MBL_GCC">
1543       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1544       <require condition="ARMv8MBL"/>
1545       <require Tcompiler="GCC"/>
1546     </condition>
1547     <condition id="ARMv8MBL_LE_GCC">
1548       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1549       <require condition="ARMv8MBL_GCC"/>
1550       <require Dendian="Little-endian"/>
1551     </condition>
1552     <condition id="ARMv8MBL_BE_GCC">
1553       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1554       <require condition="ARMv8MBL_GCC"/>
1555       <require Dendian="Big-endian"/>
1556     </condition>
1557
1558     <condition id="ARMv8MML_GCC">
1559       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1560       <require condition="ARMv8MML"/>
1561       <require Tcompiler="GCC"/>
1562     </condition>
1563     <condition id="ARMv8MML_LE_GCC">
1564       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1565       <require condition="ARMv8MML_GCC"/>
1566       <require Dendian="Little-endian"/>
1567     </condition>
1568     <condition id="ARMv8MML_BE_GCC">
1569       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1570       <require condition="ARMv8MML_GCC"/>
1571       <require Dendian="Big-endian"/>
1572     </condition>
1573
1574     <condition id="ARMv8MML_FP_GCC">
1575       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1576       <require condition="ARMv8MML_FP"/>
1577       <require Tcompiler="GCC"/>
1578     </condition>
1579     <condition id="ARMv8MML_FP_LE_GCC">
1580       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1581       <require condition="ARMv8MML_FP_GCC"/>
1582       <require Dendian="Little-endian"/>
1583     </condition>
1584     <condition id="ARMv8MML_FP_BE_GCC">
1585       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1586       <require condition="ARMv8MML_FP_GCC"/>
1587       <require Dendian="Big-endian"/>
1588     </condition>
1589
1590     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1591       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1592       <require condition="ARMv8MML_NODSP_NOFPU"/>
1593       <require Tcompiler="GCC"/>
1594     </condition>
1595     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1596       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1597       <require condition="ARMv8MML_DSP_NOFPU"/>
1598       <require Tcompiler="GCC"/>
1599     </condition>
1600     <condition id="ARMv8MML_NODSP_SP_GCC">
1601       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1602       <require condition="ARMv8MML_NODSP_SP"/>
1603       <require Tcompiler="GCC"/>
1604     </condition>
1605     <condition id="ARMv8MML_DSP_SP_GCC">
1606       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1607       <require condition="ARMv8MML_DSP_SP"/>
1608       <require Tcompiler="GCC"/>
1609     </condition>
1610     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1611       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1612       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1613       <require Dendian="Little-endian"/>
1614     </condition>
1615     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1616       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1617       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1618       <require Dendian="Little-endian"/>
1619     </condition>
1620     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1621       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1622       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1623       <require Dendian="Little-endian"/>
1624     </condition>
1625     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1626       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1627       <require condition="ARMv8MML_DSP_SP_GCC"/>
1628       <require Dendian="Little-endian"/>
1629     </condition>
1630
1631     <!-- IAR compiler -->
1632     <condition id="CA_IAR">
1633       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1634       <require condition="ARMv7-A Device"/>
1635       <require Tcompiler="IAR"/>
1636     </condition>
1637
1638     <condition id="CM0_IAR">
1639       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1640       <require condition="CM0"/>
1641       <require Tcompiler="IAR"/>
1642     </condition>
1643     <condition id="CM0_LE_IAR">
1644       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1645       <require condition="CM0_IAR"/>
1646       <require Dendian="Little-endian"/>
1647     </condition>
1648     <condition id="CM0_BE_IAR">
1649       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1650       <require condition="CM0_IAR"/>
1651       <require Dendian="Big-endian"/>
1652     </condition>
1653
1654     <condition id="CM1_IAR">
1655       <description>Cortex-M1 based device for the IAR Compiler</description>
1656       <require condition="CM1"/>
1657       <require Tcompiler="IAR"/>
1658     </condition>
1659     <condition id="CM1_LE_IAR">
1660       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1661       <require condition="CM1_IAR"/>
1662       <require Dendian="Little-endian"/>
1663     </condition>
1664     <condition id="CM1_BE_IAR">
1665       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1666       <require condition="CM1_IAR"/>
1667       <require Dendian="Big-endian"/>
1668     </condition>
1669
1670     <condition id="CM3_IAR">
1671       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1672       <require condition="CM3"/>
1673       <require Tcompiler="IAR"/>
1674     </condition>
1675     <condition id="CM3_LE_IAR">
1676       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1677       <require condition="CM3_IAR"/>
1678       <require Dendian="Little-endian"/>
1679     </condition>
1680     <condition id="CM3_BE_IAR">
1681       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1682       <require condition="CM3_IAR"/>
1683       <require Dendian="Big-endian"/>
1684     </condition>
1685
1686     <condition id="CM4_IAR">
1687       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1688       <require condition="CM4"/>
1689       <require Tcompiler="IAR"/>
1690     </condition>
1691     <condition id="CM4_LE_IAR">
1692       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1693       <require condition="CM4_IAR"/>
1694       <require Dendian="Little-endian"/>
1695     </condition>
1696     <condition id="CM4_BE_IAR">
1697       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1698       <require condition="CM4_IAR"/>
1699       <require Dendian="Big-endian"/>
1700     </condition>
1701
1702     <condition id="CM4_FP_IAR">
1703       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1704       <require condition="CM4_FP"/>
1705       <require Tcompiler="IAR"/>
1706     </condition>
1707     <condition id="CM4_FP_LE_IAR">
1708       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1709       <require condition="CM4_FP_IAR"/>
1710       <require Dendian="Little-endian"/>
1711     </condition>
1712     <condition id="CM4_FP_BE_IAR">
1713       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1714       <require condition="CM4_FP_IAR"/>
1715       <require Dendian="Big-endian"/>
1716     </condition>
1717
1718     <condition id="CM7_IAR">
1719       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1720       <require condition="CM7"/>
1721       <require Tcompiler="IAR"/>
1722     </condition>
1723     <condition id="CM7_LE_IAR">
1724       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1725       <require condition="CM7_IAR"/>
1726       <require Dendian="Little-endian"/>
1727     </condition>
1728     <condition id="CM7_BE_IAR">
1729       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1730       <require condition="CM7_IAR"/>
1731       <require Dendian="Big-endian"/>
1732     </condition>
1733
1734     <condition id="CM7_FP_IAR">
1735       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1736       <require condition="CM7_FP"/>
1737       <require Tcompiler="IAR"/>
1738     </condition>
1739     <condition id="CM7_FP_LE_IAR">
1740       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1741       <require condition="CM7_FP_IAR"/>
1742       <require Dendian="Little-endian"/>
1743     </condition>
1744     <condition id="CM7_FP_BE_IAR">
1745       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1746       <require condition="CM7_FP_IAR"/>
1747       <require Dendian="Big-endian"/>
1748     </condition>
1749
1750     <condition id="CM7_SP_IAR">
1751       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1752       <require condition="CM7_SP"/>
1753       <require Tcompiler="IAR"/>
1754     </condition>
1755     <condition id="CM7_SP_LE_IAR">
1756       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1757       <require condition="CM7_SP_IAR"/>
1758       <require Dendian="Little-endian"/>
1759     </condition>
1760     <condition id="CM7_SP_BE_IAR">
1761       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1762       <require condition="CM7_SP_IAR"/>
1763       <require Dendian="Big-endian"/>
1764     </condition>
1765
1766     <condition id="CM7_DP_IAR">
1767       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1768       <require condition="CM7_DP"/>
1769       <require Tcompiler="IAR"/>
1770     </condition>
1771     <condition id="CM7_DP_LE_IAR">
1772       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1773       <require condition="CM7_DP_IAR"/>
1774       <require Dendian="Little-endian"/>
1775     </condition>
1776     <condition id="CM7_DP_BE_IAR">
1777       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1778       <require condition="CM7_DP_IAR"/>
1779       <require Dendian="Big-endian"/>
1780     </condition>
1781
1782     <condition id="CM23_IAR">
1783       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1784       <require condition="CM23"/>
1785       <require Tcompiler="IAR"/>
1786     </condition>
1787     <condition id="CM23_LE_IAR">
1788       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1789       <require condition="CM23_IAR"/>
1790       <require Dendian="Little-endian"/>
1791     </condition>
1792     <condition id="CM23_BE_IAR">
1793       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1794       <require condition="CM23_IAR"/>
1795       <require Dendian="Big-endian"/>
1796     </condition>
1797
1798     <condition id="CM33_IAR">
1799       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1800       <require condition="CM33"/>
1801       <require Tcompiler="IAR"/>
1802     </condition>
1803     <condition id="CM33_LE_IAR">
1804       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1805       <require condition="CM33_IAR"/>
1806       <require Dendian="Little-endian"/>
1807     </condition>
1808     <condition id="CM33_BE_IAR">
1809       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1810       <require condition="CM33_IAR"/>
1811       <require Dendian="Big-endian"/>
1812     </condition>
1813
1814     <condition id="CM33_FP_IAR">
1815       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1816       <require condition="CM33_FP"/>
1817       <require Tcompiler="IAR"/>
1818     </condition>
1819     <condition id="CM33_FP_LE_IAR">
1820       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1821       <require condition="CM33_FP_IAR"/>
1822       <require Dendian="Little-endian"/>
1823     </condition>
1824     <condition id="CM33_FP_BE_IAR">
1825       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1826       <require condition="CM33_FP_IAR"/>
1827       <require Dendian="Big-endian"/>
1828     </condition>
1829
1830     <condition id="CM33_NODSP_NOFPU_IAR">
1831       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1832       <require condition="CM33_NODSP_NOFPU"/>
1833       <require Tcompiler="IAR"/>
1834     </condition>
1835     <condition id="CM33_DSP_NOFPU_IAR">
1836       <description>CM33, DSP, no FPU, IAR Compiler</description>
1837       <require condition="CM33_DSP_NOFPU"/>
1838       <require Tcompiler="IAR"/>
1839     </condition>
1840     <condition id="CM33_NODSP_SP_IAR">
1841       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1842       <require condition="CM33_NODSP_SP"/>
1843       <require Tcompiler="IAR"/>
1844     </condition>
1845     <condition id="CM33_DSP_SP_IAR">
1846       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1847       <require condition="CM33_DSP_SP"/>
1848       <require Tcompiler="IAR"/>
1849     </condition>
1850     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1851       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1852       <require condition="CM33_NODSP_NOFPU_IAR"/>
1853       <require Dendian="Little-endian"/>
1854     </condition>
1855     <condition id="CM33_DSP_NOFPU_LE_IAR">
1856       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1857       <require condition="CM33_DSP_NOFPU_IAR"/>
1858       <require Dendian="Little-endian"/>
1859     </condition>
1860     <condition id="CM33_NODSP_SP_LE_IAR">
1861       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1862       <require condition="CM33_NODSP_SP_IAR"/>
1863       <require Dendian="Little-endian"/>
1864     </condition>
1865     <condition id="CM33_DSP_SP_LE_IAR">
1866       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1867       <require condition="CM33_DSP_SP_IAR"/>
1868       <require Dendian="Little-endian"/>
1869     </condition>
1870
1871     <condition id="ARMv8MBL_IAR">
1872       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1873       <require condition="ARMv8MBL"/>
1874       <require Tcompiler="IAR"/>
1875     </condition>
1876     <condition id="ARMv8MBL_LE_IAR">
1877       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1878       <require condition="ARMv8MBL_IAR"/>
1879       <require Dendian="Little-endian"/>
1880     </condition>
1881     <condition id="ARMv8MBL_BE_IAR">
1882       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1883       <require condition="ARMv8MBL_IAR"/>
1884       <require Dendian="Big-endian"/>
1885     </condition>
1886
1887     <condition id="ARMv8MML_IAR">
1888       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1889       <require condition="ARMv8MML"/>
1890       <require Tcompiler="IAR"/>
1891     </condition>
1892     <condition id="ARMv8MML_LE_IAR">
1893       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1894       <require condition="ARMv8MML_IAR"/>
1895       <require Dendian="Little-endian"/>
1896     </condition>
1897     <condition id="ARMv8MML_BE_IAR">
1898       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1899       <require condition="ARMv8MML_IAR"/>
1900       <require Dendian="Big-endian"/>
1901     </condition>
1902
1903     <condition id="ARMv8MML_FP_IAR">
1904       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1905       <require condition="ARMv8MML_FP"/>
1906       <require Tcompiler="IAR"/>
1907     </condition>
1908     <condition id="ARMv8MML_FP_LE_IAR">
1909       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1910       <require condition="ARMv8MML_FP_IAR"/>
1911       <require Dendian="Little-endian"/>
1912     </condition>
1913     <condition id="ARMv8MML_FP_BE_IAR">
1914       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1915       <require condition="ARMv8MML_FP_IAR"/>
1916       <require Dendian="Big-endian"/>
1917     </condition>
1918
1919     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1920       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
1921       <require condition="ARMv8MML_NODSP_NOFPU"/>
1922       <require Tcompiler="IAR"/>
1923     </condition>
1924     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1925       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
1926       <require condition="ARMv8MML_DSP_NOFPU"/>
1927       <require Tcompiler="IAR"/>
1928     </condition>
1929     <condition id="ARMv8MML_NODSP_SP_IAR">
1930       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
1931       <require condition="ARMv8MML_NODSP_SP"/>
1932       <require Tcompiler="IAR"/>
1933     </condition>
1934     <condition id="ARMv8MML_DSP_SP_IAR">
1935       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
1936       <require condition="ARMv8MML_DSP_SP"/>
1937       <require Tcompiler="IAR"/>
1938     </condition>
1939     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1940       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
1941       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1942       <require Dendian="Little-endian"/>
1943     </condition>
1944     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1945       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
1946       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1947       <require Dendian="Little-endian"/>
1948     </condition>
1949     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1950       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
1951       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1952       <require Dendian="Little-endian"/>
1953     </condition>
1954     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1955       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
1956       <require condition="ARMv8MML_DSP_SP_IAR"/>
1957       <require Dendian="Little-endian"/>
1958     </condition>
1959
1960     <!-- conditions selecting single devices and CMSIS Core -->
1961     <!-- used for component startup, GCC version is used for C-Startup -->
1962     <condition id="ARMCM0 CMSIS">
1963       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1964       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1965       <require Cclass="CMSIS" Cgroup="CORE"/>
1966     </condition>
1967     <condition id="ARMCM0 CMSIS GCC">
1968       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1969       <require condition="ARMCM0 CMSIS"/>
1970       <require condition="GCC"/>
1971     </condition>
1972
1973     <condition id="ARMCM0+ CMSIS">
1974       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1975       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1976       <require Cclass="CMSIS" Cgroup="CORE"/>
1977     </condition>
1978     <condition id="ARMCM0+ CMSIS GCC">
1979       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1980       <require condition="ARMCM0+ CMSIS"/>
1981       <require condition="GCC"/>
1982     </condition>
1983
1984     <condition id="ARMCM1 CMSIS">
1985       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
1986       <require Dvendor="ARM:82" Dname="ARMCM1"/>
1987       <require Cclass="CMSIS" Cgroup="CORE"/>
1988     </condition>
1989     <condition id="ARMCM1 CMSIS GCC">
1990       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
1991       <require condition="ARMCM1 CMSIS"/>
1992       <require condition="GCC"/>
1993     </condition>
1994
1995     <condition id="ARMCM3 CMSIS">
1996       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1997       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1998       <require Cclass="CMSIS" Cgroup="CORE"/>
1999     </condition>
2000     <condition id="ARMCM3 CMSIS GCC">
2001       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
2002       <require condition="ARMCM3 CMSIS"/>
2003       <require condition="GCC"/>
2004     </condition>
2005
2006     <condition id="ARMCM4 CMSIS">
2007       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2008       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2009       <require Cclass="CMSIS" Cgroup="CORE"/>
2010     </condition>
2011     <condition id="ARMCM4 CMSIS GCC">
2012       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
2013       <require condition="ARMCM4 CMSIS"/>
2014       <require condition="GCC"/>
2015     </condition>
2016
2017     <condition id="ARMCM7 CMSIS">
2018       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2019       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2020       <require Cclass="CMSIS" Cgroup="CORE"/>
2021     </condition>
2022     <condition id="ARMCM7 CMSIS GCC">
2023       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2024       <require condition="ARMCM7 CMSIS"/>
2025       <require condition="GCC"/>
2026     </condition>
2027
2028     <condition id="ARMCM23 CMSIS">
2029       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2030       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2031       <require Cclass="CMSIS" Cgroup="CORE"/>
2032     </condition>
2033     <condition id="ARMCM23 CMSIS GCC">
2034       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2035       <require condition="ARMCM23 CMSIS"/>
2036       <require condition="GCC"/>
2037     </condition>
2038
2039     <condition id="ARMCM33 CMSIS">
2040       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2041       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2042       <require Cclass="CMSIS" Cgroup="CORE"/>
2043     </condition>
2044     <condition id="ARMCM33 CMSIS GCC">
2045       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2046       <require condition="ARMCM33 CMSIS"/>
2047       <require condition="GCC"/>
2048     </condition>
2049
2050     <condition id="ARMSC000 CMSIS">
2051       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2052       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2053       <require Cclass="CMSIS" Cgroup="CORE"/>
2054     </condition>
2055     <condition id="ARMSC000 CMSIS GCC">
2056       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2057       <require condition="ARMSC000 CMSIS"/>
2058       <require condition="GCC"/>
2059     </condition>
2060
2061     <condition id="ARMSC300 CMSIS">
2062       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2063       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2064       <require Cclass="CMSIS" Cgroup="CORE"/>
2065     </condition>
2066     <condition id="ARMSC300 CMSIS GCC">
2067       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2068       <require condition="ARMSC300 CMSIS"/>
2069       <require condition="GCC"/>
2070     </condition>
2071
2072     <condition id="ARMv8MBL CMSIS">
2073       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2074       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2075       <require Cclass="CMSIS" Cgroup="CORE"/>
2076     </condition>
2077     <condition id="ARMv8MBL CMSIS GCC">
2078       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2079       <require condition="ARMv8MBL CMSIS"/>
2080       <require condition="GCC"/>
2081     </condition>
2082
2083     <condition id="ARMv8MML CMSIS">
2084       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2085       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2086       <require Cclass="CMSIS" Cgroup="CORE"/>
2087     </condition>
2088     <condition id="ARMv8MML CMSIS GCC">
2089       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2090       <require condition="ARMv8MML CMSIS"/>
2091       <require condition="GCC"/>
2092     </condition>
2093
2094     <condition id="ARMCA5 CMSIS">
2095       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2096       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2097       <require Cclass="CMSIS" Cgroup="CORE"/>
2098     </condition>
2099
2100     <condition id="ARMCA7 CMSIS">
2101       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2102       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2103       <require Cclass="CMSIS" Cgroup="CORE"/>
2104     </condition>
2105
2106     <condition id="ARMCA9 CMSIS">
2107       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2108       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2109       <require Cclass="CMSIS" Cgroup="CORE"/>
2110     </condition>
2111
2112     <!-- CMSIS DSP -->
2113     <condition id="CMSIS DSP">
2114       <description>Components required for DSP</description>
2115       <require condition="ARMv6_7_8-M Device"/>
2116       <require condition="ARMCC GCC IAR"/>
2117       <require Cclass="CMSIS" Cgroup="CORE"/>
2118     </condition>
2119
2120     <!-- CMSIS NN -->
2121     <condition id="CMSIS NN">
2122       <description>Components required for NN</description>
2123       <require condition="CMSIS DSP"/>
2124     </condition>
2125
2126     <!-- RTOS RTX -->
2127     <condition id="RTOS RTX">
2128       <description>Components required for RTOS RTX</description>
2129       <require condition="ARMv6_7-M Device"/>
2130       <require condition="ARMCC GCC IAR"/>
2131       <require Cclass="Device" Cgroup="Startup"/>
2132       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2133     </condition>
2134     <condition id="RTOS RTX IFX">
2135       <description>Components required for RTOS RTX IFX</description>
2136       <require condition="ARMv6_7-M Device"/>
2137       <require condition="ARMCC GCC IAR"/>
2138       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2139       <require Cclass="Device" Cgroup="Startup"/>
2140       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2141     </condition>
2142     <condition id="RTOS RTX5">
2143       <description>Components required for RTOS RTX5</description>
2144       <require condition="ARMv6_7_8-M Device"/>
2145       <require condition="ARMCC GCC IAR"/>
2146       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2147     </condition>
2148     <condition id="RTOS2 RTX5">
2149       <description>Components required for RTOS2 RTX5</description>
2150       <require condition="ARMv6_7_8-M Device"/>
2151       <require condition="ARMCC GCC IAR"/>
2152       <require Cclass="CMSIS"  Cgroup="CORE"/>
2153       <require Cclass="Device" Cgroup="Startup"/>
2154     </condition>
2155     <condition id="RTOS2 RTX5 v7-A">
2156       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2157       <require condition="ARMv7-A Device"/>
2158       <require condition="ARMCC GCC IAR"/>
2159       <require Cclass="CMSIS"  Cgroup="CORE"/>
2160       <require Cclass="Device" Cgroup="Startup"/>
2161       <require Cclass="Device" Cgroup="OS Tick"/>
2162       <require Cclass="Device" Cgroup="IRQ Controller"/>
2163     </condition>
2164     <condition id="RTOS2 RTX5 Lib">
2165       <description>Components required for RTOS2 RTX5 Library</description>
2166       <require condition="ARMv6_7_8-M Device"/>
2167       <require condition="ARMCC GCC IAR"/>
2168       <require Cclass="CMSIS"  Cgroup="CORE"/>
2169       <require Cclass="Device" Cgroup="Startup"/>
2170     </condition>
2171     <condition id="RTOS2 RTX5 NS">
2172       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2173       <require condition="ARMv8-M TZ Device"/>
2174       <require condition="ARMCC GCC IAR"/>
2175       <require Cclass="CMSIS"  Cgroup="CORE"/>
2176       <require Cclass="Device" Cgroup="Startup"/>
2177     </condition>
2178
2179     <!-- OS Tick -->
2180     <condition id="OS Tick PTIM">
2181       <description>Components required for OS Tick Private Timer</description>
2182       <require condition="CA5_CA9"/>
2183       <require Cclass="Device" Cgroup="IRQ Controller"/>
2184     </condition>
2185
2186     <condition id="OS Tick GTIM">
2187       <description>Components required for OS Tick Generic Physical Timer</description>
2188       <require condition="CA7"/>
2189       <require Cclass="Device" Cgroup="IRQ Controller"/>
2190     </condition>
2191
2192   </conditions>
2193
2194   <components>
2195     <!-- CMSIS-Core component -->
2196     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.1"  condition="ARMv6_7_8-M Device" >
2197       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2198       <files>
2199         <!-- CPU independent -->
2200         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2201         <file category="include" name="CMSIS/Core/Include/"/>
2202         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2203         <!-- Code template -->
2204         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2205         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2206       </files>
2207     </component>
2208
2209     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.1"  condition="ARMv7-A Device" >
2210       <description>CMSIS-CORE for Cortex-A</description>
2211       <files>
2212         <!-- CPU independent -->
2213         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2214         <file category="include" name="CMSIS/Core_A/Include/"/>
2215       </files>
2216     </component>
2217
2218     <!-- CMSIS-Startup components -->
2219     <!-- Cortex-M0 -->
2220     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2221       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2222       <files>
2223         <!-- include folder / device header file -->
2224         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2225         <!-- startup / system file -->
2226         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2227         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2228         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2229         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2230         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2231       </files>
2232     </component>
2233     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2234       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2235       <files>
2236         <!-- include folder / device header file -->
2237         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2238         <!-- startup / system file -->
2239         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2240         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2241         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2242       </files>
2243     </component>
2244
2245     <!-- Cortex-M0+ -->
2246     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2247       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2248       <files>
2249         <!-- include folder / device header file -->
2250         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2251         <!-- startup / system file -->
2252         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2253         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2254         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2255         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2256         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2257       </files>
2258     </component>
2259     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2260       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2261       <files>
2262         <!-- include folder / device header file -->
2263         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2264         <!-- startup / system file -->
2265         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2266         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2267         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2268       </files>
2269     </component>
2270
2271     <!-- Cortex-M1 -->
2272     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM1 CMSIS">
2273       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2274       <files>
2275         <!-- include folder / device header file -->
2276         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2277         <!-- startup / system file -->
2278         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2279         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.0.0" attr="config" condition="GCC"/>
2280         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2281         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2282         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2283       </files>
2284     </component>
2285     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM1 CMSIS GCC">
2286       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2287       <files>
2288         <!-- include folder / device header file -->
2289         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2290         <!-- startup / system file -->
2291         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.0.0" attr="config" condition="GCC"/>
2292         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2293         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2294       </files>
2295     </component>
2296
2297     <!-- Cortex-M3 -->
2298     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2299       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2300       <files>
2301         <!-- include folder / device header file -->
2302         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2303         <!-- startup / system file -->
2304         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2305         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2306         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2307         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2308         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2309       </files>
2310     </component>
2311     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2312       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2313       <files>
2314         <!-- include folder / device header file -->
2315         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2316         <!-- startup / system file -->
2317         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2318         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2319         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2320       </files>
2321     </component>
2322
2323     <!-- Cortex-M4 -->
2324     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2325       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2326       <files>
2327         <!-- include folder / device header file -->
2328         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2329         <!-- startup / system file -->
2330         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2331         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2332         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2333         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2334         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2335       </files>
2336     </component>
2337     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2338       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2339       <files>
2340         <!-- include folder / device header file -->
2341         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2342         <!-- startup / system file -->
2343         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2344         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2345         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2346       </files>
2347     </component>
2348
2349     <!-- Cortex-M7 -->
2350     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2351       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2352       <files>
2353         <!-- include folder / device header file -->
2354         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2355         <!-- startup / system file -->
2356         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2357         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2358         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2359         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2360         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2361       </files>
2362     </component>
2363     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2364       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2365       <files>
2366         <!-- include folder / device header file -->
2367         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2368         <!-- startup / system file -->
2369         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2370         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2371         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2372       </files>
2373     </component>
2374
2375     <!-- Cortex-M23 -->
2376     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2377       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2378       <files>
2379         <!-- include folder / device header file -->
2380         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2381         <!-- startup / system file -->
2382         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2383         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2384         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2385         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2386         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2387         <!-- SAU configuration -->
2388         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2389       </files>
2390     </component>
2391     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2392       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2393       <files>
2394         <!-- include folder / device header file -->
2395         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2396         <!-- startup / system file -->
2397         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2398         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2399         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2400         <!-- SAU configuration -->
2401         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2402       </files>
2403     </component>
2404
2405     <!-- Cortex-M33 -->
2406     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2407       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2408       <files>
2409         <!-- include folder / device header file -->
2410         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2411         <!-- startup / system file -->
2412         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2413         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2414         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2415         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2416         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2417         <!-- SAU configuration -->
2418         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2419       </files>
2420     </component>
2421     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2422       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2423       <files>
2424         <!-- include folder / device header file -->
2425         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2426         <!-- startup / system file -->
2427         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2428         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2429         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2430         <!-- SAU configuration -->
2431         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2432       </files>
2433     </component>
2434
2435     <!-- Cortex-SC000 -->
2436     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2437       <description>System and Startup for Generic Arm SC000 device</description>
2438       <files>
2439         <!-- include folder / device header file -->
2440         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2441         <!-- startup / system file -->
2442         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2443         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2444         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2445         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2446         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2447       </files>
2448     </component>
2449     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2450       <description>System and Startup for Generic Arm SC000 device</description>
2451       <files>
2452         <!-- include folder / device header file -->
2453         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2454         <!-- startup / system file -->
2455         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2456         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2457         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2458       </files>
2459     </component>
2460
2461     <!-- Cortex-SC300 -->
2462     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2463       <description>System and Startup for Generic Arm SC300 device</description>
2464       <files>
2465         <!-- include folder / device header file -->
2466         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2467         <!-- startup / system file -->
2468         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2469         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2470         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2471         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2472         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2473       </files>
2474     </component>
2475     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2476       <description>System and Startup for Generic Arm SC300 device</description>
2477       <files>
2478         <!-- include folder / device header file -->
2479         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2480         <!-- startup / system file -->
2481         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2482         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2483         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2484       </files>
2485     </component>
2486
2487     <!-- ARMv8MBL -->
2488     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2489       <description>System and Startup for Generic Armv8-M Baseline device</description>
2490       <files>
2491         <!-- include folder / device header file -->
2492         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2493         <!-- startup / system file -->
2494         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2495         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2496         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2497         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2498         <!-- SAU configuration -->
2499         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2500       </files>
2501     </component>
2502     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2503       <description>System and Startup for Generic Armv8-M Baseline device</description>
2504       <files>
2505         <!-- include folder / device header file -->
2506         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2507         <!-- startup / system file -->
2508         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2509         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2510         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2511         <!-- SAU configuration -->
2512         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2513       </files>
2514     </component>
2515
2516     <!-- ARMv8MML -->
2517     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2518       <description>System and Startup for Generic Armv8-M Mainline device</description>
2519       <files>
2520         <!-- include folder / device header file -->
2521         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2522         <!-- startup / system file -->
2523         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2524         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2525         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2526         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2527         <!-- SAU configuration -->
2528         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2529       </files>
2530     </component>
2531     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2532       <description>System and Startup for Generic Armv8-M Mainline device</description>
2533       <files>
2534         <!-- include folder / device header file -->
2535         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2536         <!-- startup / system file -->
2537         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2538         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2539         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2540         <!-- SAU configuration -->
2541         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2542       </files>
2543     </component>
2544
2545     <!-- Cortex-A5 -->
2546     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2547       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2548       <files>
2549         <!-- include folder / device header file -->
2550         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2551         <!-- startup / system / mmu files -->
2552         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2553         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2554         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2555         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2556         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2557         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2558         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2559         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2560         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2561         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2562         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2563         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2564
2565       </files>
2566     </component>
2567
2568     <!-- Cortex-A7 -->
2569     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2570       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2571       <files>
2572         <!-- include folder / device header file -->
2573         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2574         <!-- startup / system / mmu files -->
2575         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2576         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2577         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2578         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2579         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2580         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2581         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2582         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2583         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2584         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2585         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2586         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2587       </files>
2588     </component>
2589
2590     <!-- Cortex-A9 -->
2591     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2592       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2593       <files>
2594         <!-- include folder / device header file -->
2595         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2596         <!-- startup / system / mmu files -->
2597         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2598         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2599         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2600         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2601         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2602         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2603         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2604         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2605         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2606         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2607         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2608         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2609       </files>
2610     </component>
2611
2612     <!-- IRQ Controller -->
2613     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2614       <description>IRQ Controller implementation using GIC</description>
2615       <files>
2616         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2617       </files>
2618     </component>
2619
2620     <!-- OS Tick -->
2621     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2622       <description>OS Tick implementation using Private Timer</description>
2623       <files>
2624         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2625       </files>
2626     </component>
2627
2628     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2629       <description>OS Tick implementation using Generic Physical Timer</description>
2630       <files>
2631         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2632       </files>
2633     </component>
2634
2635     <!-- CMSIS-DSP component -->
2636     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2637       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2638       <files>
2639         <!-- CPU independent -->
2640         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2641         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2642
2643         <!-- CPU and Compiler dependent -->
2644         <!-- ARMCC -->
2645         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2646         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2647         <file category="library" condition="CM1_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2648         <file category="library" condition="CM1_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2649         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2650         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2651         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2652         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2653         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2654         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2655         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2656         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2657         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2658         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2659         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2660         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2661
2662         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2663         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2664         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2665         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2666         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2667         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2668         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2669         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2670         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2671         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2672         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2673         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2674
2675         <!-- GCC -->
2676         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2677         <file category="library" condition="CM1_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2678         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2679         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2680         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2681         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2682         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2683         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2684
2685         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2686         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2687         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2688         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2689         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2690         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2691         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2692         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2693         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2694         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2695         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2696         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2697
2698         <!-- IAR -->
2699         <file category="library" condition="CM0_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2700         <file category="library" condition="CM0_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2701         <file category="library" condition="CM1_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2702         <file category="library" condition="CM1_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2703         <file category="library" condition="CM3_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2704         <file category="library" condition="CM3_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2705         <file category="library" condition="CM4_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2706         <file category="library" condition="CM4_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2707         <file category="library" condition="CM4_FP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2708         <file category="library" condition="CM4_FP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2709         <file category="library" condition="CM7_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2710         <file category="library" condition="CM7_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2711         <file category="library" condition="CM7_DP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2712         <file category="library" condition="CM7_DP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2713         <file category="library" condition="CM7_SP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
2714         <file category="library" condition="CM7_SP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
2715
2716         <file category="library" condition="CM23_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2717         <file category="library" condition="CM33_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2718         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2719         <file category="library" condition="CM33_FP_LE_IAR"           name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2720         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"    name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2721         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2722         <!--file category="library" condition="CM33_DSP_DP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2723         <file category="library" condition="ARMv8MBL_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2724         <file category="library" condition="ARMv8MML_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2725         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2726         <file category="library" condition="ARMv8MML_FP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2727         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2728         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2729         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2730
2731       </files>
2732     </component>
2733
2734     <!-- CMSIS-NN component -->
2735     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.0.0" condition="CMSIS NN">
2736       <description>CMSIS-NN Neural Network Library</description>
2737       <files>
2738         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2739         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2740
2741         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2742         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2743         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2744         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2745
2746         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2747         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2748         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2749         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2750         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2751         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2752         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2753         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2754         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2755         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2756         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2757         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2758
2759         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2760         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2761         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2762         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2763         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2764         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2765
2766         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2767         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2768         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2769         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2770         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2771
2772         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2773
2774         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2775         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2776       </files>
2777     </component>
2778
2779     <!-- CMSIS-RTOS Keil RTX component -->
2780     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2781       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2782       <RTE_Components_h>
2783         <!-- the following content goes into file 'RTE_Components.h' -->
2784         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2785         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2786       </RTE_Components_h>
2787       <files>
2788         <!-- CPU independent -->
2789         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2790         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2791         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2792
2793         <!-- RTX templates -->
2794         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2795         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2796         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2797         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2798         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2799         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2800         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2801         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2802         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2803         <!-- tool-chain specific template file -->
2804         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2805         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2806         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2807
2808         <!-- CPU and Compiler dependent -->
2809         <!-- ARMCC -->
2810         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2811         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2812         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2813         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2814         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2815         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2816         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2817         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2818         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2819         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2820         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2821         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2822         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2823         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2824         <!-- GCC -->
2825         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2826         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2827         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2828         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2829         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2830         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2831         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2832         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2833         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2834         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2835         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2836         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2837         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2838         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2839         <!-- IAR -->
2840         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2841         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2842         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2843         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2844         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2845         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2846         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2847         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2848         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2849         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2850         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2851         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2852         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2853         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2854       </files>
2855     </component>
2856     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2857     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2858       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2859       <RTE_Components_h>
2860         <!-- the following content goes into file 'RTE_Components.h' -->
2861         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2862         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2863       </RTE_Components_h>
2864       <files>
2865         <!-- CPU independent -->
2866         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2867         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2868         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2869
2870         <!-- RTX templates -->
2871         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2872         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2873         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2874         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2875         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2876         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2877         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2878         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2879         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2880         <!-- tool-chain specific template file -->
2881         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2882         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2883         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2884
2885         <!-- CPU and Compiler dependent -->
2886         <!-- ARMCC -->
2887         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2888         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2889         <!-- GCC -->
2890         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2891         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2892         <!-- IAR -->
2893       </files>
2894     </component>
2895
2896     <!-- CMSIS-RTOS Keil RTX5 component -->
2897     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.4.0" Capiversion="1.0.0" condition="RTOS RTX5">
2898       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2899       <RTE_Components_h>
2900         <!-- the following content goes into file 'RTE_Components.h' -->
2901         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2902         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2903       </RTE_Components_h>
2904       <files>
2905         <!-- RTX header file -->
2906         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2907         <!-- RTX compatibility module for API V1 -->
2908         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2909       </files>
2910     </component>
2911
2912     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2913     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
2914       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
2915       <RTE_Components_h>
2916         <!-- the following content goes into file 'RTE_Components.h' -->
2917         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2918         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2919       </RTE_Components_h>
2920       <files>
2921         <!-- RTX documentation -->
2922         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2923
2924         <!-- RTX header files -->
2925         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2926
2927         <!-- RTX configuration -->
2928         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2929         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2930
2931         <!-- RTX templates -->
2932         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2933         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2934         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2935         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2936         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2937         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2938         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2939         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2940         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2941         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2942
2943         <!-- RTX library configuration -->
2944         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2945
2946         <!-- RTX libraries (CPU and Compiler dependent) -->
2947         <!-- ARMCC -->
2948         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2949         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2950         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2951         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2952         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2953         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2954         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2955         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2956         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2957         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2958         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2959         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2960         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2961         <!-- GCC -->
2962         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2963         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2964         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2965         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2966         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2967         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2968         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2969         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2970         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2971         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2972         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2973         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2974         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2975         <!-- IAR -->
2976         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2977         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2978         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2979         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2980         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2981         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2982         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2983       </files>
2984     </component>
2985     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2986       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
2987       <RTE_Components_h>
2988         <!-- the following content goes into file 'RTE_Components.h' -->
2989         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2990         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2991         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2992       </RTE_Components_h>
2993       <files>
2994         <!-- RTX documentation -->
2995         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2996
2997         <!-- RTX header files -->
2998         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2999
3000         <!-- RTX configuration -->
3001         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3002         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3003
3004         <!-- RTX templates -->
3005         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3006         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3007         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3008         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3009         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3010         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3011         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3012         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3013         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3014         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3015
3016         <!-- RTX library configuration -->
3017         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3018
3019         <!-- RTX libraries (CPU and Compiler dependent) -->
3020         <!-- ARMCC -->
3021         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3022         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3023         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3024         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3025         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3026         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3027         <!-- GCC -->
3028         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3029         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3030         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3031         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3032         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3033         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3034       </files>
3035     </component>
3036     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
3037       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3038       <RTE_Components_h>
3039         <!-- the following content goes into file 'RTE_Components.h' -->
3040         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3041         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3042         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3043       </RTE_Components_h>
3044       <files>
3045         <!-- RTX documentation -->
3046         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3047
3048         <!-- RTX header files -->
3049         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3050
3051         <!-- RTX configuration -->
3052         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3053         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3054
3055         <!-- RTX templates -->
3056         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3057         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3058         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3059         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3060         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3061         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3062         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3063         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3064         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3065         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3066
3067         <!-- RTX sources (core) -->
3068         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3069         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3070         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3071         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3072         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3073         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3074         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3075         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3076         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3077         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3078         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3079         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3080         <!-- RTX sources (library configuration) -->
3081         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3082         <!-- RTX sources (handlers ARMCC) -->
3083         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3084         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3085         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3086         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3087         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3088         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3089         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3090         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3091         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3092         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3093         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3094         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3095         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3096         <!-- RTX sources (handlers GCC) -->
3097         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3098         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3099         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3100         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3101         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3102         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3103         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3104         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3105         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3106         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3107         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3108         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3109         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3110         <!-- RTX sources (handlers IAR) -->
3111         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3112         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3113         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3114         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3115         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3116         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3117         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3118         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3119         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3120         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3121         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3122         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3123         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3124         <!-- OS Tick (SysTick) -->
3125         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3126       </files>
3127     </component>
3128     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3129       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3130       <RTE_Components_h>
3131         <!-- the following content goes into file 'RTE_Components.h' -->
3132         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3133         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3134         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3135       </RTE_Components_h>
3136       <files>
3137         <!-- RTX documentation -->
3138         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3139
3140         <!-- RTX header files -->
3141         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3142
3143         <!-- RTX configuration -->
3144         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3145         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3146
3147         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3148
3149         <!-- RTX templates -->
3150         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3151         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3152         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3153         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3154         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3155         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3156         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3157         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3158         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3159         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3160
3161         <!-- RTX sources (core) -->
3162         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3163         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3164         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3165         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3166         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3167         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3168         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3169         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3170         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3171         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3172         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3173         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3174         <!-- RTX sources (library configuration) -->
3175         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3176         <!-- RTX sources (handlers ARMCC) -->
3177         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3178         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3179         <!-- RTX sources (handlers GCC) -->
3180         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3181         <!-- RTX sources (handlers IAR) -->
3182         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3183       </files>
3184     </component>
3185     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3186       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3187       <RTE_Components_h>
3188         <!-- the following content goes into file 'RTE_Components.h' -->
3189         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3190         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3191         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3192         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3193       </RTE_Components_h>
3194       <files>
3195         <!-- RTX documentation -->
3196         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3197
3198         <!-- RTX header files -->
3199         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3200
3201         <!-- RTX configuration -->
3202         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3203         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3204
3205         <!-- RTX templates -->
3206         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3207         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3208         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3209         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3210         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3211         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3212         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3213         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3214         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3215         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3216
3217         <!-- RTX sources (core) -->
3218         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3219         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3220         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3221         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3222         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3223         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3224         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3225         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3227         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3229         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3230         <!-- RTX sources (library configuration) -->
3231         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3232         <!-- RTX sources (ARMCC handlers) -->
3233         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3234         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3235         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3236         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3237         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3238         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3239         <!-- RTX sources (GCC handlers) -->
3240         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3241         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3242         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3243         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3244         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3245         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3246         <!-- RTX sources (IAR handlers) -->
3247         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3248         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3249         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3250         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3251         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3252         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3253         <!-- OS Tick (SysTick) -->
3254         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3255       </files>
3256     </component>
3257
3258   </components>
3259
3260   <boards>
3261     <board name="uVision Simulator" vendor="Keil">
3262       <description>uVision Simulator</description>
3263       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3264       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3265       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3266       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3267       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3268       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3269       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3270       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3271       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3272       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3273       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3274       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3275       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3276       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3277       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3278       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3279       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3280       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3281       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3282       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3283     </board>
3284
3285     <board name="Fixed Virtual Platform" vendor="ARM">
3286       <description>Fixed Virtual Platform</description>
3287       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3288       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3289       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3290     </board>
3291   </boards>
3292
3293   <examples>
3294     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3295       <description>DSP_Lib Class Marks example</description>
3296       <board name="uVision Simulator" vendor="Keil"/>
3297       <project>
3298         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3299       </project>
3300       <attributes>
3301         <component Cclass="CMSIS" Cgroup="CORE"/>
3302         <component Cclass="CMSIS" Cgroup="DSP"/>
3303         <component Cclass="Device" Cgroup="Startup"/>
3304         <category>Getting Started</category>
3305       </attributes>
3306     </example>
3307
3308     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3309       <description>DSP_Lib Convolution example</description>
3310       <board name="uVision Simulator" vendor="Keil"/>
3311       <project>
3312         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3313       </project>
3314       <attributes>
3315         <component Cclass="CMSIS" Cgroup="CORE"/>
3316         <component Cclass="CMSIS" Cgroup="DSP"/>
3317         <component Cclass="Device" Cgroup="Startup"/>
3318         <category>Getting Started</category>
3319       </attributes>
3320     </example>
3321
3322     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3323       <description>DSP_Lib Dotproduct example</description>
3324       <board name="uVision Simulator" vendor="Keil"/>
3325       <project>
3326         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3327       </project>
3328       <attributes>
3329         <component Cclass="CMSIS" Cgroup="CORE"/>
3330         <component Cclass="CMSIS" Cgroup="DSP"/>
3331         <component Cclass="Device" Cgroup="Startup"/>
3332         <category>Getting Started</category>
3333       </attributes>
3334     </example>
3335
3336     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3337       <description>DSP_Lib FFT Bin example</description>
3338       <board name="uVision Simulator" vendor="Keil"/>
3339       <project>
3340         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3341       </project>
3342       <attributes>
3343         <component Cclass="CMSIS" Cgroup="CORE"/>
3344         <component Cclass="CMSIS" Cgroup="DSP"/>
3345         <component Cclass="Device" Cgroup="Startup"/>
3346         <category>Getting Started</category>
3347       </attributes>
3348     </example>
3349
3350     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3351       <description>DSP_Lib FIR example</description>
3352       <board name="uVision Simulator" vendor="Keil"/>
3353       <project>
3354         <environment name="uv" load="arm_fir_example.uvprojx"/>
3355       </project>
3356       <attributes>
3357         <component Cclass="CMSIS" Cgroup="CORE"/>
3358         <component Cclass="CMSIS" Cgroup="DSP"/>
3359         <component Cclass="Device" Cgroup="Startup"/>
3360         <category>Getting Started</category>
3361       </attributes>
3362     </example>
3363
3364     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3365       <description>DSP_Lib Graphic Equalizer example</description>
3366       <board name="uVision Simulator" vendor="Keil"/>
3367       <project>
3368         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3369       </project>
3370       <attributes>
3371         <component Cclass="CMSIS" Cgroup="CORE"/>
3372         <component Cclass="CMSIS" Cgroup="DSP"/>
3373         <component Cclass="Device" Cgroup="Startup"/>
3374         <category>Getting Started</category>
3375       </attributes>
3376     </example>
3377
3378     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3379       <description>DSP_Lib Linear Interpolation example</description>
3380       <board name="uVision Simulator" vendor="Keil"/>
3381       <project>
3382         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3383       </project>
3384       <attributes>
3385         <component Cclass="CMSIS" Cgroup="CORE"/>
3386         <component Cclass="CMSIS" Cgroup="DSP"/>
3387         <component Cclass="Device" Cgroup="Startup"/>
3388         <category>Getting Started</category>
3389       </attributes>
3390     </example>
3391
3392     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3393       <description>DSP_Lib Matrix example</description>
3394       <board name="uVision Simulator" vendor="Keil"/>
3395       <project>
3396         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3397       </project>
3398       <attributes>
3399         <component Cclass="CMSIS" Cgroup="CORE"/>
3400         <component Cclass="CMSIS" Cgroup="DSP"/>
3401         <component Cclass="Device" Cgroup="Startup"/>
3402         <category>Getting Started</category>
3403       </attributes>
3404     </example>
3405
3406     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3407       <description>DSP_Lib Signal Convergence example</description>
3408       <board name="uVision Simulator" vendor="Keil"/>
3409       <project>
3410         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3411       </project>
3412       <attributes>
3413         <component Cclass="CMSIS" Cgroup="CORE"/>
3414         <component Cclass="CMSIS" Cgroup="DSP"/>
3415         <component Cclass="Device" Cgroup="Startup"/>
3416         <category>Getting Started</category>
3417       </attributes>
3418     </example>
3419
3420     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3421       <description>DSP_Lib Sinus/Cosinus example</description>
3422       <board name="uVision Simulator" vendor="Keil"/>
3423       <project>
3424         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3425       </project>
3426       <attributes>
3427         <component Cclass="CMSIS" Cgroup="CORE"/>
3428         <component Cclass="CMSIS" Cgroup="DSP"/>
3429         <component Cclass="Device" Cgroup="Startup"/>
3430         <category>Getting Started</category>
3431       </attributes>
3432     </example>
3433
3434     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3435       <description>DSP_Lib Variance example</description>
3436       <board name="uVision Simulator" vendor="Keil"/>
3437       <project>
3438         <environment name="uv" load="arm_variance_example.uvprojx"/>
3439       </project>
3440       <attributes>
3441         <component Cclass="CMSIS" Cgroup="CORE"/>
3442         <component Cclass="CMSIS" Cgroup="DSP"/>
3443         <component Cclass="Device" Cgroup="Startup"/>
3444         <category>Getting Started</category>
3445       </attributes>
3446     </example>
3447
3448     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3449       <description>Neural Network CIFAR10 example</description>
3450       <board name="uVision Simulator" vendor="Keil"/>
3451       <project>
3452         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3453       </project>
3454       <attributes>
3455         <component Cclass="CMSIS" Cgroup="CORE"/>
3456         <component Cclass="CMSIS" Cgroup="DSP"/>
3457         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3458         <component Cclass="Device" Cgroup="Startup"/>
3459         <category>Getting Started</category>
3460       </attributes>
3461     </example>
3462
3463     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3464       <description>Neural Network GRU example</description>
3465       <board name="uVision Simulator" vendor="Keil"/>
3466       <project>
3467         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3468       </project>
3469       <attributes>
3470         <component Cclass="CMSIS" Cgroup="CORE"/>
3471         <component Cclass="CMSIS" Cgroup="DSP"/>
3472         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3473         <component Cclass="Device" Cgroup="Startup"/>
3474         <category>Getting Started</category>
3475       </attributes>
3476     </example>
3477
3478     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3479       <description>CMSIS-RTOS2 Blinky example</description>
3480       <board name="uVision Simulator" vendor="Keil"/>
3481       <project>
3482         <environment name="uv" load="Blinky.uvprojx"/>
3483       </project>
3484       <attributes>
3485         <component Cclass="CMSIS" Cgroup="CORE"/>
3486         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3487         <component Cclass="Device" Cgroup="Startup"/>
3488         <category>Getting Started</category>
3489       </attributes>
3490     </example>
3491
3492     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3493       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3494       <board name="uVision Simulator" vendor="Keil"/>
3495       <project>
3496         <environment name="uv" load="Blinky.uvprojx"/>
3497       </project>
3498       <attributes>
3499         <component Cclass="CMSIS" Cgroup="CORE"/>
3500         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3501         <component Cclass="Device" Cgroup="Startup"/>
3502         <category>Getting Started</category>
3503       </attributes>
3504     </example>
3505
3506     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3507       <description>CMSIS-RTOS2 Message Queue Example</description>
3508       <board name="uVision Simulator" vendor="Keil"/>
3509       <project>
3510         <environment name="uv" load="MsqQueue.uvprojx"/>
3511       </project>
3512       <attributes>
3513         <component Cclass="CMSIS" Cgroup="CORE"/>
3514         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3515         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3516         <component Cclass="Device" Cgroup="Startup"/>
3517         <category>Getting Started</category>
3518       </attributes>
3519     </example>
3520
3521     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3522       <description>CMSIS-RTOS2 Memory Pool Example</description>
3523       <board name="Fixed Virtual Platform" vendor="ARM"/>
3524       <project>
3525         <environment name="uv" load="MemPool.uvprojx"/>
3526       </project>
3527       <attributes>
3528         <component Cclass="CMSIS" Cgroup="CORE"/>
3529         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3530         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3531         <component Cclass="Device" Cgroup="Startup"/>
3532         <category>Getting Started</category>
3533       </attributes>
3534     </example>
3535
3536     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3537       <description>Bare-metal secure/non-secure example without RTOS</description>
3538       <board name="uVision Simulator" vendor="Keil"/>
3539       <project>
3540         <environment name="uv" load="NoRTOS.uvmpw"/>
3541       </project>
3542       <attributes>
3543         <component Cclass="CMSIS" Cgroup="CORE"/>
3544         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3545         <component Cclass="Device" Cgroup="Startup"/>
3546         <category>Getting Started</category>
3547       </attributes>
3548     </example>
3549
3550     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3551       <description>Secure/non-secure RTOS example with thread context management</description>
3552       <board name="uVision Simulator" vendor="Keil"/>
3553       <project>
3554         <environment name="uv" load="RTOS.uvmpw"/>
3555       </project>
3556       <attributes>
3557         <component Cclass="CMSIS" Cgroup="CORE"/>
3558         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3559         <component Cclass="Device" Cgroup="Startup"/>
3560         <category>Getting Started</category>
3561       </attributes>
3562     </example>
3563
3564     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3565       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3566       <board name="uVision Simulator" vendor="Keil"/>
3567       <project>
3568         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3569       </project>
3570       <attributes>
3571         <component Cclass="CMSIS" Cgroup="CORE"/>
3572         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3573         <component Cclass="Device" Cgroup="Startup"/>
3574         <category>Getting Started</category>
3575       </attributes>
3576     </example>
3577
3578   </examples>
3579
3580 </package>