begriffs open source - cmsis/blob - main/Core/group__Icache__functions__m7.html

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  52    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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 127   <div class="summary">
 128 <a href="#func-members">Functions</a>  </div>
 129   <div class="headertitle"><div class="title">I-Cache Functions<div class="ingroups"><a class="el" href="group__cache__functions__m7.html">Cache Functions (Level-1)</a></div></div></div>
 130 </div><!--header-->
 131 <div class="contents">
 132
 133 <p>Functions for the level-1 instruction cache.
 134 <a href="#details">More...</a></p>
 135 <table class="memberdecls">
 136 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 137 Functions</h2></td></tr>
 138 <tr class="memitem:ga56baa06298799dea5f207d4c12d9d4a6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Icache__functions__m7.html#ga56baa06298799dea5f207d4c12d9d4a6">SCB_DisableICache</a> (void)</td></tr>
 139 <tr class="memdesc:ga56baa06298799dea5f207d4c12d9d4a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable I-Cache.  <br /></td></tr>
 140 <tr class="separator:ga56baa06298799dea5f207d4c12d9d4a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 141 <tr class="memitem:ga980ffe52af778f2535ccc52f25f9a7de"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Icache__functions__m7.html#ga980ffe52af778f2535ccc52f25f9a7de">SCB_EnableICache</a> (void)</td></tr>
 142 <tr class="memdesc:ga980ffe52af778f2535ccc52f25f9a7de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable I-Cache.  <br /></td></tr>
 143 <tr class="separator:ga980ffe52af778f2535ccc52f25f9a7de"><td class="memSeparator" colspan="2">&#160;</td></tr>
 144 <tr class="memitem:ga62419cb7e6773e3d9236f14e458c1b05"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Icache__functions__m7.html#ga62419cb7e6773e3d9236f14e458c1b05">SCB_InvalidateICache</a> (void)</td></tr>
 145 <tr class="memdesc:ga62419cb7e6773e3d9236f14e458c1b05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalidate I-Cache.  <br /></td></tr>
 146 <tr class="separator:ga62419cb7e6773e3d9236f14e458c1b05"><td class="memSeparator" colspan="2">&#160;</td></tr>
 147 <tr class="memitem:gaeb1a2bf181afcfb837ce0502e6bfa4fb"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Icache__functions__m7.html#gaeb1a2bf181afcfb837ce0502e6bfa4fb">SCB_InvalidateICache_by_Addr</a> (volatile void *addr, int32_t isize)</td></tr>
 148 <tr class="memdesc:gaeb1a2bf181afcfb837ce0502e6bfa4fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">I-Cache Invalidate by address.  <br /></td></tr>
 149 <tr class="separator:gaeb1a2bf181afcfb837ce0502e6bfa4fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 150 </table>
 151 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 152 <p>Functions for the level-1 instruction cache. </p>
 153 <h2 class="groupheader">Function Documentation</h2>
 154 <a id="ga56baa06298799dea5f207d4c12d9d4a6" name="ga56baa06298799dea5f207d4c12d9d4a6"></a>
 155 <h2 class="memtitle"><span class="permalink"><a href="#ga56baa06298799dea5f207d4c12d9d4a6">&#9670;&#160;</a></span>SCB_DisableICache()</h2>
 156
 157 <div class="memitem">
 158 <div class="memproto">
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 160         <tr>
 161           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void SCB_DisableICache </td>
 162           <td>(</td>
 163           <td class="paramtype">void&#160;</td>
 164           <td class="paramname"></td><td>)</td>
 165           <td></td>
 166         </tr>
 167       </table>
 168 </div><div class="memdoc">
 169
 170 <p>Disable I-Cache. </p>
 171 <p>The function turns off the instruction cache. </p>
 172
 173 </div>
 174 </div>
 175 <a id="ga980ffe52af778f2535ccc52f25f9a7de" name="ga980ffe52af778f2535ccc52f25f9a7de"></a>
 176 <h2 class="memtitle"><span class="permalink"><a href="#ga980ffe52af778f2535ccc52f25f9a7de">&#9670;&#160;</a></span>SCB_EnableICache()</h2>
 177
 178 <div class="memitem">
 179 <div class="memproto">
 180       <table class="memname">
 181         <tr>
 182           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void SCB_EnableICache </td>
 183           <td>(</td>
 184           <td class="paramtype">void&#160;</td>
 185           <td class="paramname"></td><td>)</td>
 186           <td></td>
 187         </tr>
 188       </table>
 189 </div><div class="memdoc">
 190
 191 <p>Enable I-Cache. </p>
 192 <p>The function turns on the instruction cache. </p><dl class="section note"><dt>Note</dt><dd>Before enabling the instruction cache, you must invalidate (<a class="el" href="group__Icache__functions__m7.html#ga62419cb7e6773e3d9236f14e458c1b05">SCB_InvalidateICache</a>) the entire instruction cache if external memory might have changed since the cache was disabled. </dd>
 193 <dd>
 194 After reset, you must invalidate (<a class="el" href="group__Icache__functions__m7.html#ga62419cb7e6773e3d9236f14e458c1b05">SCB_InvalidateICache</a>) each cache before enabling it. </dd></dl>
 195
 196 </div>
 197 </div>
 198 <a id="ga62419cb7e6773e3d9236f14e458c1b05" name="ga62419cb7e6773e3d9236f14e458c1b05"></a>
 199 <h2 class="memtitle"><span class="permalink"><a href="#ga62419cb7e6773e3d9236f14e458c1b05">&#9670;&#160;</a></span>SCB_InvalidateICache()</h2>
 200
 201 <div class="memitem">
 202 <div class="memproto">
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 204         <tr>
 205           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void SCB_InvalidateICache </td>
 206           <td>(</td>
 207           <td class="paramtype">void&#160;</td>
 208           <td class="paramname"></td><td>)</td>
 209           <td></td>
 210         </tr>
 211       </table>
 212 </div><div class="memdoc">
 213
 214 <p>Invalidate I-Cache. </p>
 215 <p>The function invalidates the instruction cache. The instruction cache is never dirty so cache RAM errors are always recoverable by invalidating the cache and retrying the instruction. </p><dl class="section note"><dt>Note</dt><dd>After reset, you must invalidate each cache before enabling (<a class="el" href="group__Icache__functions__m7.html#ga980ffe52af778f2535ccc52f25f9a7de">SCB_EnableICache</a>) it. </dd></dl>
 216
 217 </div>
 218 </div>
 219 <a id="gaeb1a2bf181afcfb837ce0502e6bfa4fb" name="gaeb1a2bf181afcfb837ce0502e6bfa4fb"></a>
 220 <h2 class="memtitle"><span class="permalink"><a href="#gaeb1a2bf181afcfb837ce0502e6bfa4fb">&#9670;&#160;</a></span>SCB_InvalidateICache_by_Addr()</h2>
 221
 222 <div class="memitem">
 223 <div class="memproto">
 224       <table class="memname">
 225         <tr>
 226           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void SCB_InvalidateICache_by_Addr </td>
 227           <td>(</td>
 228           <td class="paramtype">volatile void *&#160;</td>
 229           <td class="paramname"><em>addr</em>, </td>
 230         </tr>
 231         <tr>
 232           <td class="paramkey"></td>
 233           <td></td>
 234           <td class="paramtype">int32_t&#160;</td>
 235           <td class="paramname"><em>isize</em>&#160;</td>
 236         </tr>
 237         <tr>
 238           <td></td>
 239           <td>)</td>
 240           <td></td><td></td>
 241         </tr>
 242       </table>
 243 </div><div class="memdoc">
 244
 245 <p>I-Cache Invalidate by address. </p>
 246 <p>Invalidates I-Cache for the given address. I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity. I-Cache memory blocks which are part of given address + given size are invalidated. </p><dl class="params"><dt>Parameters</dt><dd>
 247   <table class="params">
 248     <tr><td class="paramdir">[in]</td><td class="paramname">addr</td><td>address </td></tr>
 249     <tr><td class="paramdir">[in]</td><td class="paramname">isize</td><td>size of memory block (in number of bytes) </td></tr>
 250   </table>
 251   </dd>
 252 </dl>
 253
 254 </div>
 255 </div>
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