begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.1.1-dev1">
  12       Active development...
  13       Devices:
  14       - added GCC startup and linker script for Cortex-A9
  15       CMSIS-Core(M): 5.0.3 (see revision history for details)
  16       - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  17       CMSIS-Core(A): 1.0.1 (see revision history for details)
  18       CMSIS-Driver:
  19       - CAN Driver API V1.2.0
  20       CMSIS-RTOS:
  21       - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata
  22       CMSIS-RTOS2:
  23       - RTX 5.2.1 (see revision history for details)
  24       - Message Queue Example
  25       - Memory Pool Example
  26     </release>
  27     <release version="5.1.0" date="2017-08-04">
  28       CMSIS-Core(M): 5.0.2 (see revision history for details)
  29       - Changed Version Control macros to be core agnostic.
  30       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  31       CMSIS-Core(A): 1.0.0 (see revision history for details)
  32       - Initial release
  33       - IRQ Controller API 1.0.0
  34       CMSIS-Driver: 2.05 (see revision history for details)
  35       - All typedefs related to status have been made volatile.
  36       CMSIS-RTOS2:
  37       - API 2.1.1 (see revision history for details)
  38       - RTX 5.2.0 (see revision history for details)
  39       - OS Tick API 1.0.0
  40       CMSIS-DSP: 1.5.2 (see revision history for details)
  41       - Fixed GNU Compiler specific diagnostics.
  42       CMSIS-PACK: 1.5.0 (see revision history for details)
  43       - added System Description File (*.SDF) Format
  44       CMSIS-Zone: 0.0.1 (Preview)
  45       - Initial specification draft
  46     </release>
  47     <release version="5.0.1" date="2017-02-03">
  48       Package Description:
  49       - added taxonomy for Cclass RTOS
  50       CMSIS-RTOS2:
  51       - API 2.1   (see revision history for details)
  52       - RTX 5.1.0 (see revision history for details)
  53       CMSIS-Core: 5.0.1 (see revision history for details)
  54       - Added __PACKED_STRUCT macro
  55       - Added uVisior support
  56       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  57       - Updated template for secure main function (main_s.c)
  58       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  59       CMSIS-DSP: 1.5.1 (see revision history for details)
  60       - added ARMv8M DSP libraries.
  61       CMSIS-PACK:1.4.9 (see revision history for details)
  62       - added Pack Index File specification and schema file
  63     </release>
  64     <release version="5.0.0" date="2016-11-11">
  65       Changed open source license to Apache 2.0
  66       CMSIS_Core:
  67        - Added support for Cortex-M23 and Cortex-M33.
  68        - Added ARMv8-M device configurations for mainline and baseline.
  69        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  70        - Added cmsis_compiler.h to unify compiler behaviour.
  71        - Updated function SCB_EnableICache (for Cortex-M7).
  72        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  73       CMSIS-RTOS:
  74         - bug fix in RTX 4.82 (see revision history for details)
  75       CMSIS-RTOS2:
  76         - new API including compatibility layer to CMSIS-RTOS
  77         - reference implementation based on RTX5
  78         - supports all Cortex-M variants including TrustZone for ARMv8-M
  79       CMSIS-SVD:
  80        - reworked SVD format documentation
  81        - removed SVD file database documentation as SVD files are distributed in packs
  82        - updated SVDConv for Win32 and Linux
  83       CMSIS-DSP:
  84        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  85        - Added DSP libraries build projects to CMSIS pack.
  86     </release>
  87     <release version="4.5.0" date="2015-10-28">
  88       - CMSIS-Core     4.30.0  (see revision history for details)
  89       - CMSIS-DAP      1.1.0   (unchanged)
  90       - CMSIS-Driver   2.04.0  (see revision history for details)
  91       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  92       - CMSIS-PACK     1.4.1   (see revision history for details)
  93       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  94       - CMSIS-SVD      1.3.1   (see revision history for details)
  95     </release>
  96     <release version="4.4.0" date="2015-09-11">
  97       - CMSIS-Core     4.20   (see revision history for details)
  98       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  99       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 100       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 101       - CMSIS-RTOS
 102         -- API         1.02   (unchanged)
 103         -- RTX         4.79   (see revision history for details)
 104       - CMSIS-SVD      1.3.0  (see revision history for details)
 105       - CMSIS-DAP      1.1.0  (extended with SWO support)
 106     </release>
 107     <release version="4.3.0" date="2015-03-20">
 108       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 109       - CMSIS-DSP      1.4.5  (see revision history for details)
 110       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 111       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 112       - CMSIS-RTOS
 113         -- API         1.02   (unchanged)
 114         -- RTX         4.78   (see revision history for details)
 115       - CMSIS-SVD      1.2    (unchanged)
 116     </release>
 117     <release version="4.2.0" date="2014-09-24">
 118       Adding Cortex-M7 support
 119       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 120       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 121       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 122       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 123       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 124     </release>
 125     <release version="4.1.1" date="2014-06-30">
 126       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 127     </release>
 128     <release version="4.1.0" date="2014-06-12">
 129       - CMSIS-Driver   2.02  (incompatible update)
 130       - CMSIS-Pack     1.3   (see revision history for details)
 131       - CMSIS-DSP      1.4.2 (unchanged)
 132       - CMSIS-Core     3.30  (unchanged)
 133       - CMSIS-RTOS RTX 4.74  (unchanged)
 134       - CMSIS-RTOS API 1.02  (unchanged)
 135       - CMSIS-SVD      1.10  (unchanged)
 136       PACK:
 137       - removed G++ specific files from PACK
 138       - added Component Startup variant "C Startup"
 139       - added Pack Checking Utility
 140       - updated conditions to reflect tool-chain dependency
 141       - added Taxonomy for Graphics
 142       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 143     </release>
 144     <release version="4.0.0">
 145       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 146       - CMSIS-Pack     1.1   Preliminary
 147       - CMSIS-DSP      1.4.2 (see revision history for details)
 148       - CMSIS-Core     3.30  (see revision history for details)
 149       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 150       - CMSIS-RTOS API 1.02  (unchanged)
 151       - CMSIS-SVD      1.10  (unchanged)
 152     </release>
 153     <release version="3.20.4">
 154       - CMSIS-RTOS 4.74 (see revision history for details)
 155       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 156     </release>
 157     <release version="3.20.3">
 158       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 159       - CMSIS-RTOS 4.73 (see revision history for details)
 160     </release>
 161     <release version="3.20.2">
 162       - CMSIS-Pack documentation has been added
 163       - CMSIS-Drivers header and documentation have been added to PACK
 164       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 165     </release>
 166     <release version="3.20.1">
 167       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 168       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 169     </release>
 170     <release version="3.20.0">
 171       The software portions that are deployed in the application program are now under a BSD license which allows usage
 172       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 173       The individual components have been update as listed below:
 174       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 175       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 176       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 177       - CMSIS-SVD is unchanged.
 178     </release>
 179   </releases>
 180
 181   <taxonomy>
 182     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 183     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 184     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 185     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 186     <description Cclass="File System">File Drive Support and File System</description>
 187     <description Cclass="Graphics">Graphical User Interface</description>
 188     <description Cclass="Network">Network Stack using Internet Protocols</description>
 189     <description Cclass="USB">Universal Serial Bus Stack</description>
 190     <description Cclass="Compiler">Compiler Software Extensions</description>
 191     <description Cclass="RTOS">Real-time Operating System</description>
 192   </taxonomy>
 193
 194   <devices>
 195     <!-- ******************************  Cortex-M0  ****************************** -->
 196     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 197       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 198       <description>
 199 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 200 - simple, easy-to-use programmers model
 201 - highly efficient ultra-low power operation
 202 - excellent code density
 203 - deterministic, high-performance interrupt handling
 204 - upward compatibility with the rest of the Cortex-M processor family.
 205       </description>
 206       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 207       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 208       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 209       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 210
 211       <device Dname="ARMCM0">
 212         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 213         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 214       </device>
 215     </family>
 216
 217     <!-- ******************************  Cortex-M0P  ****************************** -->
 218     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 219       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 220       <description>
 221 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 222 - simple, easy-to-use programmers model
 223 - highly efficient ultra-low power operation
 224 - excellent code density
 225 - deterministic, high-performance interrupt handling
 226 - upward compatibility with the rest of the Cortex-M processor family.
 227       </description>
 228       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 229       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 230       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 231       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 232
 233       <device Dname="ARMCM0P">
 234         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 235         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 236       </device>
 237     </family>
 238
 239     <!-- ******************************  Cortex-M3  ****************************** -->
 240     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 241       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 242       <description>
 243 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 244 - simple, easy-to-use programmers model
 245 - highly efficient ultra-low power operation
 246 - excellent code density
 247 - deterministic, high-performance interrupt handling
 248 - upward compatibility with the rest of the Cortex-M processor family.
 249       </description>
 250       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 251       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 252       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 253       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 254
 255       <device Dname="ARMCM3">
 256         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 257         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 258       </device>
 259     </family>
 260
 261     <!-- ******************************  Cortex-M4  ****************************** -->
 262     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 263       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 264       <description>
 265 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 266 - simple, easy-to-use programmers model
 267 - highly efficient ultra-low power operation
 268 - excellent code density
 269 - deterministic, high-performance interrupt handling
 270 - upward compatibility with the rest of the Cortex-M processor family.
 271       </description>
 272       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 273       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 274       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 275       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 276
 277       <device Dname="ARMCM4">
 278         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 279         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 280       </device>
 281
 282       <device Dname="ARMCM4_FP">
 283         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 284         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 285       </device>
 286     </family>
 287
 288     <!-- ******************************  Cortex-M7  ****************************** -->
 289     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 290       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 291       <description>
 292 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 293 - simple, easy-to-use programmers model
 294 - highly efficient ultra-low power operation
 295 - excellent code density
 296 - deterministic, high-performance interrupt handling
 297 - upward compatibility with the rest of the Cortex-M processor family.
 298       </description>
 299       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 300       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 301       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 302       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 303
 304       <device Dname="ARMCM7">
 305         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 306         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 307       </device>
 308
 309       <device Dname="ARMCM7_SP">
 310         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 311         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 312       </device>
 313
 314       <device Dname="ARMCM7_DP">
 315         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 316         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 317       </device>
 318     </family>
 319
 320     <!-- ******************************  Cortex-M23  ********************** -->
 321     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 322       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 323       <description>
 324 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 325 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 326 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 327       </description>
 328       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 329       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 330       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 331       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 332       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 333       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 334
 335       <device Dname="ARMCM23">
 336         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 337         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 338       </device>
 339
 340       <device Dname="ARMCM23_TZ">
 341         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 342         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 343       </device>
 344     </family>
 345
 346     <!-- ******************************  Cortex-M33  ****************************** -->
 347     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 348       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 349       <description>
 350 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 351 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 352       </description>
 353       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 354       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 355       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 356       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 357       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 358       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 359
 360       <device Dname="ARMCM33">
 361         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 362         <description>
 363           no DSP Instructions, no Floating Point Unit, no TrustZone
 364         </description>
 365         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 366       </device>
 367
 368       <device Dname="ARMCM33_TZ">
 369         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 370         <description>
 371           no DSP Instructions, no Floating Point Unit, TrustZone
 372         </description>
 373         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 374       </device>
 375
 376       <device Dname="ARMCM33_DSP_FP">
 377         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 378         <description>
 379           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 380         </description>
 381         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 382       </device>
 383
 384       <device Dname="ARMCM33_DSP_FP_TZ">
 385         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 386         <description>
 387           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 388         </description>
 389         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 390       </device>
 391     </family>
 392
 393     <!-- ******************************  ARMSC000  ****************************** -->
 394     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 395       <description>
 396 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 397 - simple, easy-to-use programmers model
 398 - highly efficient ultra-low power operation
 399 - excellent code density
 400 - deterministic, high-performance interrupt handling
 401       </description>
 402       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 403       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 404       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 405       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 406
 407       <device Dname="ARMSC000">
 408         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 409         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 410       </device>
 411     </family>
 412
 413     <!-- ******************************  ARMSC300  ****************************** -->
 414     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 415       <description>
 416 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 417 - simple, easy-to-use programmers model
 418 - highly efficient ultra-low power operation
 419 - excellent code density
 420 - deterministic, high-performance interrupt handling
 421       </description>
 422       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 423       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 424       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 425       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 426
 427       <device Dname="ARMSC300">
 428         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 429         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 430       </device>
 431     </family>
 432
 433     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 434     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 435       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 436       <description>
 437 ARMv8-M Baseline based device with TrustZone
 438       </description>
 439       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 440       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 441       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 442       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 443       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 444       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 445
 446       <device Dname="ARMv8MBL">
 447         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 448         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 449       </device>
 450     </family>
 451
 452     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 453     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 454       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 455       <description>
 456 ARMv8-M Mainline based device with TrustZone
 457       </description>
 458       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 459       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 460       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 461       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 462       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 463       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 464
 465       <device Dname="ARMv8MML">
 466         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 467         <description>
 468           no DSP Instructions, no Floating Point Unit, TrustZone
 469         </description>
 470         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 471       </device>
 472
 473       <device Dname="ARMv8MML_DSP">
 474         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 475         <description>
 476           DSP Instructions, no Floating Point Unit, TrustZone
 477         </description>
 478         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 479       </device>
 480
 481       <device Dname="ARMv8MML_SP">
 482         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 483         <description>
 484           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 485         </description>
 486         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 487       </device>
 488
 489       <device Dname="ARMv8MML_DSP_SP">
 490         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 491         <description>
 492           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 493         </description>
 494         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 495       </device>
 496
 497       <device Dname="ARMv8MML_DP">
 498         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 499         <description>
 500           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 501         </description>
 502         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 503       </device>
 504
 505       <device Dname="ARMv8MML_DSP_DP">
 506         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 507         <description>
 508           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 509         </description>
 510         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 511       </device>
 512     </family>
 513
 514     <!-- ******************************  Cortex-A5  ****************************** -->
 515     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 516       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 517       <description>
 518 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 519 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 520 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 521       </description>
 522
 523       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 524       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 525
 526       <device Dname="ARMCA5">
 527         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 528         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 529       </device>
 530     </family>
 531
 532     <!-- ******************************  Cortex-A7  ****************************** -->
 533     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 534       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 535       <description>
 536 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 537 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 538 an optional integrated GIC, and an optional L2 cache controller.
 539       </description>
 540
 541       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 542       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 543
 544       <device Dname="ARMCA7">
 545         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 546         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 547       </device>
 548     </family>
 549
 550     <!-- ******************************  Cortex-A9  ****************************** -->
 551     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 552       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 553       <description>
 554 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 555 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 556 and 8-bit Java bytecodes in Jazelle state.
 557       </description>
 558
 559       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 560       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 561
 562       <device Dname="ARMCA9">
 563         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 564         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 565       </device>
 566     </family>
 567   </devices>
 568
 569
 570   <apis>
 571     <!-- CMSIS Device API -->
 572     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 573       <description>Device interrupt controller interface</description>
 574       <files>
 575         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 576       </files>
 577     </api>
 578     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
 579       <description>RTOS Kernel system tick timer interface</description>
 580       <files>
 581         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 582       </files>
 583     </api>
 584     <!-- CMSIS-RTOS API -->
 585     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 586       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 587       <files>
 588         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 589       </files>
 590     </api>
 591     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
 592       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 593       <files>
 594         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 595         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 596       </files>
 597     </api>
 598     <!-- CMSIS Driver API -->
 599     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 600       <description>USART Driver API for Cortex-M</description>
 601       <files>
 602         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 603         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 604       </files>
 605     </api>
 606     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 607       <description>SPI Driver API for Cortex-M</description>
 608       <files>
 609         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 610         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 611       </files>
 612     </api>
 613     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 614       <description>SAI Driver API for Cortex-M</description>
 615       <files>
 616         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 617         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 618       </files>
 619     </api>
 620     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 621       <description>I2C Driver API for Cortex-M</description>
 622       <files>
 623         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 624         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 625       </files>
 626     </api>
 627     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 628       <description>CAN Driver API for Cortex-M</description>
 629       <files>
 630         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 631         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 632       </files>
 633     </api>
 634     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 635       <description>Flash Driver API for Cortex-M</description>
 636       <files>
 637         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 638         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 639       </files>
 640     </api>
 641     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 642       <description>MCI Driver API for Cortex-M</description>
 643       <files>
 644         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 645         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 646       </files>
 647     </api>
 648     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 649       <description>NAND Flash Driver API for Cortex-M</description>
 650       <files>
 651         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 652         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 653       </files>
 654     </api>
 655     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 656       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 657       <files>
 658         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 659         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 660         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 661       </files>
 662     </api>
 663     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 664       <description>Ethernet MAC Driver API for Cortex-M</description>
 665       <files>
 666         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 667         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 668       </files>
 669     </api>
 670     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 671       <description>Ethernet PHY Driver API for Cortex-M</description>
 672       <files>
 673         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 674         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 675       </files>
 676     </api>
 677     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 678       <description>USB Device Driver API for Cortex-M</description>
 679       <files>
 680         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 681         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 682       </files>
 683     </api>
 684     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 685       <description>USB Host Driver API for Cortex-M</description>
 686       <files>
 687         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 688         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 689       </files>
 690     </api>
 691   </apis>
 692
 693   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 694   <conditions>
 695     <!-- compiler -->
 696     <condition id="ARMCC6">
 697       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 698       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 699     </condition>
 700     <condition id="ARMCC5">
 701       <require Tcompiler="ARMCC" Toptions="AC5"/>
 702     </condition>
 703     <condition id="ARMCC">
 704       <require Tcompiler="ARMCC"/>
 705     </condition>
 706     <condition id="GCC">
 707       <require Tcompiler="GCC"/>
 708     </condition>
 709     <condition id="IAR">
 710       <require Tcompiler="IAR"/>
 711     </condition>
 712     <condition id="ARMCC GCC">
 713       <accept Tcompiler="ARMCC"/>
 714       <accept Tcompiler="GCC"/>
 715     </condition>
 716     <condition id="ARMCC GCC IAR">
 717       <accept Tcompiler="ARMCC"/>
 718       <accept Tcompiler="GCC"/>
 719       <accept Tcompiler="IAR"/>
 720     </condition>
 721
 722     <!-- ARM architecture -->
 723     <condition id="ARMv6-M Device">
 724       <description>ARMv6-M architecture based device</description>
 725       <accept Dcore="Cortex-M0"/>
 726       <accept Dcore="Cortex-M0+"/>
 727       <accept Dcore="SC000"/>
 728     </condition>
 729     <condition id="ARMv7-M Device">
 730       <description>ARMv7-M architecture based device</description>
 731       <accept Dcore="Cortex-M3"/>
 732       <accept Dcore="Cortex-M4"/>
 733       <accept Dcore="Cortex-M7"/>
 734       <accept Dcore="SC300"/>
 735     </condition>
 736     <condition id="ARMv8-M Device">
 737       <description>ARMv8-M architecture based device</description>
 738       <accept Dcore="ARMV8MBL"/>
 739       <accept Dcore="ARMV8MML"/>
 740       <accept Dcore="Cortex-M23"/>
 741       <accept Dcore="Cortex-M33"/>
 742     </condition>
 743     <condition id="ARMv8-M TZ Device">
 744       <description>ARMv8-M architecture based device with TrustZone</description>
 745       <require condition="ARMv8-M Device"/>
 746       <require Dtz="TZ"/>
 747     </condition>
 748     <condition id="ARMv6_7-M Device">
 749       <description>ARMv6_7-M architecture based device</description>
 750       <accept condition="ARMv6-M Device"/>
 751       <accept condition="ARMv7-M Device"/>
 752     </condition>
 753     <condition id="ARMv6_7_8-M Device">
 754       <description>ARMv6_7_8-M architecture based device</description>
 755       <accept condition="ARMv6-M Device"/>
 756       <accept condition="ARMv7-M Device"/>
 757       <accept condition="ARMv8-M Device"/>
 758     </condition>
 759     <condition id="ARMv7-A Device">
 760       <description>ARMv7-A architecture based device</description>
 761       <accept Dcore="Cortex-A5"/>
 762       <accept Dcore="Cortex-A7"/>
 763       <accept Dcore="Cortex-A9"/>
 764     </condition>
 765
 766     <!-- ARM core -->
 767     <condition id="CM0">
 768       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 769       <accept Dcore="Cortex-M0"/>
 770       <accept Dcore="Cortex-M0+"/>
 771       <accept Dcore="SC000"/>
 772     </condition>
 773     <condition id="CM3">
 774       <description>Cortex-M3 or SC300 processor based device</description>
 775       <accept Dcore="Cortex-M3"/>
 776       <accept Dcore="SC300"/>
 777     </condition>
 778     <condition id="CM4">
 779       <description>Cortex-M4 processor based device</description>
 780       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 781     </condition>
 782     <condition id="CM4_FP">
 783       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 784       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 785     </condition>
 786     <condition id="CM7">
 787       <description>Cortex-M7 processor based device</description>
 788       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 789     </condition>
 790     <condition id="CM7_FP">
 791       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 792       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 793       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 794     </condition>
 795     <condition id="CM7_SP">
 796       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 797       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 798     </condition>
 799     <condition id="CM7_DP">
 800       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 801       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 802     </condition>
 803     <condition id="CM23">
 804       <description>Cortex-M23 processor based device</description>
 805       <require Dcore="Cortex-M23"/>
 806     </condition>
 807     <condition id="CM33">
 808       <description>Cortex-M33 processor based device</description>
 809       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 810     </condition>
 811     <condition id="CM33_FP">
 812       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 813       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 814     </condition>
 815     <condition id="ARMv8MBL">
 816       <description>ARMv8-M Baseline processor based device</description>
 817       <require Dcore="ARMV8MBL"/>
 818     </condition>
 819     <condition id="ARMv8MML">
 820       <description>ARMv8-M Mainline processor based device</description>
 821       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 822     </condition>
 823     <condition id="ARMv8MML_FP">
 824       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 825       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 826       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 827     </condition>
 828
 829     <condition id="CM33_NODSP_NOFPU">
 830       <description>CM33, no DSP, no FPU</description>
 831       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 832     </condition>
 833     <condition id="CM33_DSP_NOFPU">
 834       <description>CM33, DSP, no FPU</description>
 835       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 836     </condition>
 837     <condition id="CM33_NODSP_SP">
 838       <description>CM33, no DSP, SP FPU</description>
 839       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 840     </condition>
 841     <condition id="CM33_DSP_SP">
 842       <description>CM33, DSP, SP FPU</description>
 843       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 844     </condition>
 845
 846     <condition id="ARMv8MML_NODSP_NOFPU">
 847       <description>ARMv8MML, no DSP, no FPU</description>
 848       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 849     </condition>
 850     <condition id="ARMv8MML_DSP_NOFPU">
 851       <description>ARMv8MML, DSP, no FPU</description>
 852       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 853     </condition>
 854     <condition id="ARMv8MML_NODSP_SP">
 855       <description>ARMv8MML, no DSP, SP FPU</description>
 856       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 857     </condition>
 858     <condition id="ARMv8MML_DSP_SP">
 859       <description>ARMv8MML, DSP, SP FPU</description>
 860       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 861     </condition>
 862
 863     <condition id="CA5_CA9">
 864       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 865       <accept Dcore="Cortex-A5"/>
 866       <accept Dcore="Cortex-A9"/>
 867     </condition>
 868
 869     <condition id="CA7">
 870       <description>Cortex-A7 processor based device</description>
 871       <accept Dcore="Cortex-A7"/>
 872     </condition>
 873
 874     <!-- ARMCC compiler -->
 875     <condition id="CA_ARMCC5">
 876       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 877       <require condition="ARMv7-A Device"/>
 878       <require condition="ARMCC5"/>
 879     </condition>
 880     <condition id="CA_ARMCC6">
 881       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 882       <require condition="ARMv7-A Device"/>
 883       <require condition="ARMCC6"/>
 884     </condition>
 885
 886     <condition id="CM0_ARMCC">
 887       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 888       <require condition="CM0"/>
 889       <require Tcompiler="ARMCC"/>
 890     </condition>
 891     <condition id="CM0_LE_ARMCC">
 892       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 893       <require condition="CM0_ARMCC"/>
 894       <require Dendian="Little-endian"/>
 895     </condition>
 896     <condition id="CM0_BE_ARMCC">
 897       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 898       <require condition="CM0_ARMCC"/>
 899       <require Dendian="Big-endian"/>
 900     </condition>
 901
 902     <condition id="CM3_ARMCC">
 903       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 904       <require condition="CM3"/>
 905       <require Tcompiler="ARMCC"/>
 906     </condition>
 907     <condition id="CM3_LE_ARMCC">
 908       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 909       <require condition="CM3_ARMCC"/>
 910       <require Dendian="Little-endian"/>
 911     </condition>
 912     <condition id="CM3_BE_ARMCC">
 913       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 914       <require condition="CM3_ARMCC"/>
 915       <require Dendian="Big-endian"/>
 916     </condition>
 917
 918     <condition id="CM4_ARMCC">
 919       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 920       <require condition="CM4"/>
 921       <require Tcompiler="ARMCC"/>
 922     </condition>
 923     <condition id="CM4_LE_ARMCC">
 924       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 925       <require condition="CM4_ARMCC"/>
 926       <require Dendian="Little-endian"/>
 927     </condition>
 928     <condition id="CM4_BE_ARMCC">
 929       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 930       <require condition="CM4_ARMCC"/>
 931       <require Dendian="Big-endian"/>
 932     </condition>
 933
 934     <condition id="CM4_FP_ARMCC">
 935       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 936       <require condition="CM4_FP"/>
 937       <require Tcompiler="ARMCC"/>
 938     </condition>
 939     <condition id="CM4_FP_LE_ARMCC">
 940       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 941       <require condition="CM4_FP_ARMCC"/>
 942       <require Dendian="Little-endian"/>
 943     </condition>
 944     <condition id="CM4_FP_BE_ARMCC">
 945       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 946       <require condition="CM4_FP_ARMCC"/>
 947       <require Dendian="Big-endian"/>
 948     </condition>
 949
 950     <condition id="CM7_ARMCC">
 951       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 952       <require condition="CM7"/>
 953       <require Tcompiler="ARMCC"/>
 954     </condition>
 955     <condition id="CM7_LE_ARMCC">
 956       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 957       <require condition="CM7_ARMCC"/>
 958       <require Dendian="Little-endian"/>
 959     </condition>
 960     <condition id="CM7_BE_ARMCC">
 961       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 962       <require condition="CM7_ARMCC"/>
 963       <require Dendian="Big-endian"/>
 964     </condition>
 965
 966     <condition id="CM7_FP_ARMCC">
 967       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 968       <require condition="CM7_FP"/>
 969       <require Tcompiler="ARMCC"/>
 970     </condition>
 971     <condition id="CM7_FP_LE_ARMCC">
 972       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 973       <require condition="CM7_FP_ARMCC"/>
 974       <require Dendian="Little-endian"/>
 975     </condition>
 976     <condition id="CM7_FP_BE_ARMCC">
 977       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 978       <require condition="CM7_FP_ARMCC"/>
 979       <require Dendian="Big-endian"/>
 980     </condition>
 981
 982     <condition id="CM7_SP_ARMCC">
 983       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 984       <require condition="CM7_SP"/>
 985       <require Tcompiler="ARMCC"/>
 986     </condition>
 987     <condition id="CM7_SP_LE_ARMCC">
 988       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 989       <require condition="CM7_SP_ARMCC"/>
 990       <require Dendian="Little-endian"/>
 991     </condition>
 992     <condition id="CM7_SP_BE_ARMCC">
 993       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 994       <require condition="CM7_SP_ARMCC"/>
 995       <require Dendian="Big-endian"/>
 996     </condition>
 997
 998     <condition id="CM7_DP_ARMCC">
 999       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1000       <require condition="CM7_DP"/>
1001       <require Tcompiler="ARMCC"/>
1002     </condition>
1003     <condition id="CM7_DP_LE_ARMCC">
1004       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1005       <require condition="CM7_DP_ARMCC"/>
1006       <require Dendian="Little-endian"/>
1007     </condition>
1008     <condition id="CM7_DP_BE_ARMCC">
1009       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1010       <require condition="CM7_DP_ARMCC"/>
1011       <require Dendian="Big-endian"/>
1012     </condition>
1013
1014     <condition id="CM23_ARMCC">
1015       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1016       <require condition="CM23"/>
1017       <require Tcompiler="ARMCC"/>
1018     </condition>
1019     <condition id="CM23_LE_ARMCC">
1020       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1021       <require condition="CM23_ARMCC"/>
1022       <require Dendian="Little-endian"/>
1023     </condition>
1024     <condition id="CM23_BE_ARMCC">
1025       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1026       <require condition="CM23_ARMCC"/>
1027       <require Dendian="Big-endian"/>
1028     </condition>
1029
1030     <condition id="CM33_ARMCC">
1031       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1032       <require condition="CM33"/>
1033       <require Tcompiler="ARMCC"/>
1034     </condition>
1035     <condition id="CM33_LE_ARMCC">
1036       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1037       <require condition="CM33_ARMCC"/>
1038       <require Dendian="Little-endian"/>
1039     </condition>
1040     <condition id="CM33_BE_ARMCC">
1041       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1042       <require condition="CM33_ARMCC"/>
1043       <require Dendian="Big-endian"/>
1044     </condition>
1045
1046     <condition id="CM33_FP_ARMCC">
1047       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1048       <require condition="CM33_FP"/>
1049       <require Tcompiler="ARMCC"/>
1050     </condition>
1051     <condition id="CM33_FP_LE_ARMCC">
1052       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1053       <require condition="CM33_FP_ARMCC"/>
1054       <require Dendian="Little-endian"/>
1055     </condition>
1056     <condition id="CM33_FP_BE_ARMCC">
1057       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1058       <require condition="CM33_FP_ARMCC"/>
1059       <require Dendian="Big-endian"/>
1060     </condition>
1061
1062     <condition id="CM33_NODSP_NOFPU_ARMCC">
1063       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1064       <require condition="CM33_NODSP_NOFPU"/>
1065       <require Tcompiler="ARMCC"/>
1066     </condition>
1067     <condition id="CM33_DSP_NOFPU_ARMCC">
1068       <description>CM33, DSP, no FPU, ARM Compiler</description>
1069       <require condition="CM33_DSP_NOFPU"/>
1070       <require Tcompiler="ARMCC"/>
1071     </condition>
1072     <condition id="CM33_NODSP_SP_ARMCC">
1073       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1074       <require condition="CM33_NODSP_SP"/>
1075       <require Tcompiler="ARMCC"/>
1076     </condition>
1077     <condition id="CM33_DSP_SP_ARMCC">
1078       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1079       <require condition="CM33_DSP_SP"/>
1080       <require Tcompiler="ARMCC"/>
1081     </condition>
1082     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1083       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1084       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1085       <require Dendian="Little-endian"/>
1086     </condition>
1087     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1088       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1089       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1090       <require Dendian="Little-endian"/>
1091     </condition>
1092     <condition id="CM33_NODSP_SP_LE_ARMCC">
1093       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1094       <require condition="CM33_NODSP_SP_ARMCC"/>
1095       <require Dendian="Little-endian"/>
1096     </condition>
1097     <condition id="CM33_DSP_SP_LE_ARMCC">
1098       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1099       <require condition="CM33_DSP_SP_ARMCC"/>
1100       <require Dendian="Little-endian"/>
1101     </condition>
1102
1103     <condition id="ARMv8MBL_ARMCC">
1104       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1105       <require condition="ARMv8MBL"/>
1106       <require Tcompiler="ARMCC"/>
1107     </condition>
1108     <condition id="ARMv8MBL_LE_ARMCC">
1109       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1110       <require condition="ARMv8MBL_ARMCC"/>
1111       <require Dendian="Little-endian"/>
1112     </condition>
1113     <condition id="ARMv8MBL_BE_ARMCC">
1114       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1115       <require condition="ARMv8MBL_ARMCC"/>
1116       <require Dendian="Big-endian"/>
1117     </condition>
1118
1119     <condition id="ARMv8MML_ARMCC">
1120       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1121       <require condition="ARMv8MML"/>
1122       <require Tcompiler="ARMCC"/>
1123     </condition>
1124     <condition id="ARMv8MML_LE_ARMCC">
1125       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1126       <require condition="ARMv8MML_ARMCC"/>
1127       <require Dendian="Little-endian"/>
1128     </condition>
1129     <condition id="ARMv8MML_BE_ARMCC">
1130       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1131       <require condition="ARMv8MML_ARMCC"/>
1132       <require Dendian="Big-endian"/>
1133     </condition>
1134
1135     <condition id="ARMv8MML_FP_ARMCC">
1136       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1137       <require condition="ARMv8MML_FP"/>
1138       <require Tcompiler="ARMCC"/>
1139     </condition>
1140     <condition id="ARMv8MML_FP_LE_ARMCC">
1141       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1142       <require condition="ARMv8MML_FP_ARMCC"/>
1143       <require Dendian="Little-endian"/>
1144     </condition>
1145     <condition id="ARMv8MML_FP_BE_ARMCC">
1146       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1147       <require condition="ARMv8MML_FP_ARMCC"/>
1148       <require Dendian="Big-endian"/>
1149     </condition>
1150
1151     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1152       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1153       <require condition="ARMv8MML_NODSP_NOFPU"/>
1154       <require Tcompiler="ARMCC"/>
1155     </condition>
1156     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1157       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1158       <require condition="ARMv8MML_DSP_NOFPU"/>
1159       <require Tcompiler="ARMCC"/>
1160     </condition>
1161     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1162       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1163       <require condition="ARMv8MML_NODSP_SP"/>
1164       <require Tcompiler="ARMCC"/>
1165     </condition>
1166     <condition id="ARMv8MML_DSP_SP_ARMCC">
1167       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1168       <require condition="ARMv8MML_DSP_SP"/>
1169       <require Tcompiler="ARMCC"/>
1170     </condition>
1171     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1172       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1173       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1174       <require Dendian="Little-endian"/>
1175     </condition>
1176     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1177       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1178       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1179       <require Dendian="Little-endian"/>
1180     </condition>
1181     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1182       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1183       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1184       <require Dendian="Little-endian"/>
1185     </condition>
1186     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1187       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1188       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1189       <require Dendian="Little-endian"/>
1190     </condition>
1191
1192     <!-- GCC compiler -->
1193     <condition id="CA_GCC">
1194       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1195       <require condition="ARMv7-A Device"/>
1196       <require Tcompiler="GCC"/>
1197     </condition>
1198
1199     <condition id="CM0_GCC">
1200       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1201       <require condition="CM0"/>
1202       <require Tcompiler="GCC"/>
1203     </condition>
1204     <condition id="CM0_LE_GCC">
1205       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1206       <require condition="CM0_GCC"/>
1207       <require Dendian="Little-endian"/>
1208     </condition>
1209     <condition id="CM0_BE_GCC">
1210       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1211       <require condition="CM0_GCC"/>
1212       <require Dendian="Big-endian"/>
1213     </condition>
1214
1215     <condition id="CM3_GCC">
1216       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1217       <require condition="CM3"/>
1218       <require Tcompiler="GCC"/>
1219     </condition>
1220     <condition id="CM3_LE_GCC">
1221       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1222       <require condition="CM3_GCC"/>
1223       <require Dendian="Little-endian"/>
1224     </condition>
1225     <condition id="CM3_BE_GCC">
1226       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1227       <require condition="CM3_GCC"/>
1228       <require Dendian="Big-endian"/>
1229     </condition>
1230
1231     <condition id="CM4_GCC">
1232       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1233       <require condition="CM4"/>
1234       <require Tcompiler="GCC"/>
1235     </condition>
1236     <condition id="CM4_LE_GCC">
1237       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1238       <require condition="CM4_GCC"/>
1239       <require Dendian="Little-endian"/>
1240     </condition>
1241     <condition id="CM4_BE_GCC">
1242       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1243       <require condition="CM4_GCC"/>
1244       <require Dendian="Big-endian"/>
1245     </condition>
1246
1247     <condition id="CM4_FP_GCC">
1248       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1249       <require condition="CM4_FP"/>
1250       <require Tcompiler="GCC"/>
1251     </condition>
1252     <condition id="CM4_FP_LE_GCC">
1253       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1254       <require condition="CM4_FP_GCC"/>
1255       <require Dendian="Little-endian"/>
1256     </condition>
1257     <condition id="CM4_FP_BE_GCC">
1258       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1259       <require condition="CM4_FP_GCC"/>
1260       <require Dendian="Big-endian"/>
1261     </condition>
1262
1263     <condition id="CM7_GCC">
1264       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1265       <require condition="CM7"/>
1266       <require Tcompiler="GCC"/>
1267     </condition>
1268     <condition id="CM7_LE_GCC">
1269       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1270       <require condition="CM7_GCC"/>
1271       <require Dendian="Little-endian"/>
1272     </condition>
1273     <condition id="CM7_BE_GCC">
1274       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1275       <require condition="CM7_GCC"/>
1276       <require Dendian="Big-endian"/>
1277     </condition>
1278
1279     <condition id="CM7_FP_GCC">
1280       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1281       <require condition="CM7_FP"/>
1282       <require Tcompiler="GCC"/>
1283     </condition>
1284     <condition id="CM7_FP_LE_GCC">
1285       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1286       <require condition="CM7_FP_GCC"/>
1287       <require Dendian="Little-endian"/>
1288     </condition>
1289     <condition id="CM7_FP_BE_GCC">
1290       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1291       <require condition="CM7_FP_GCC"/>
1292       <require Dendian="Big-endian"/>
1293     </condition>
1294
1295     <condition id="CM7_SP_GCC">
1296       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1297       <require condition="CM7_SP"/>
1298       <require Tcompiler="GCC"/>
1299     </condition>
1300     <condition id="CM7_SP_LE_GCC">
1301       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1302       <require condition="CM7_SP_GCC"/>
1303       <require Dendian="Little-endian"/>
1304     </condition>
1305     <condition id="CM7_SP_BE_GCC">
1306       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1307       <require condition="CM7_SP_GCC"/>
1308       <require Dendian="Big-endian"/>
1309     </condition>
1310
1311     <condition id="CM7_DP_GCC">
1312       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1313       <require condition="CM7_DP"/>
1314       <require Tcompiler="GCC"/>
1315     </condition>
1316     <condition id="CM7_DP_LE_GCC">
1317       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1318       <require condition="CM7_DP_GCC"/>
1319       <require Dendian="Little-endian"/>
1320     </condition>
1321     <condition id="CM7_DP_BE_GCC">
1322       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1323       <require condition="CM7_DP_GCC"/>
1324       <require Dendian="Big-endian"/>
1325     </condition>
1326
1327     <condition id="CM23_GCC">
1328       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1329       <require condition="CM23"/>
1330       <require Tcompiler="GCC"/>
1331     </condition>
1332     <condition id="CM23_LE_GCC">
1333       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1334       <require condition="CM23_GCC"/>
1335       <require Dendian="Little-endian"/>
1336     </condition>
1337     <condition id="CM23_BE_GCC">
1338       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1339       <require condition="CM23_GCC"/>
1340       <require Dendian="Big-endian"/>
1341     </condition>
1342
1343     <condition id="CM33_GCC">
1344       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1345       <require condition="CM33"/>
1346       <require Tcompiler="GCC"/>
1347     </condition>
1348     <condition id="CM33_LE_GCC">
1349       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1350       <require condition="CM33_GCC"/>
1351       <require Dendian="Little-endian"/>
1352     </condition>
1353     <condition id="CM33_BE_GCC">
1354       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1355       <require condition="CM33_GCC"/>
1356       <require Dendian="Big-endian"/>
1357     </condition>
1358
1359     <condition id="CM33_FP_GCC">
1360       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1361       <require condition="CM33_FP"/>
1362       <require Tcompiler="GCC"/>
1363     </condition>
1364     <condition id="CM33_FP_LE_GCC">
1365       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1366       <require condition="CM33_FP_GCC"/>
1367       <require Dendian="Little-endian"/>
1368     </condition>
1369     <condition id="CM33_FP_BE_GCC">
1370       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1371       <require condition="CM33_FP_GCC"/>
1372       <require Dendian="Big-endian"/>
1373     </condition>
1374
1375     <condition id="CM33_NODSP_NOFPU_GCC">
1376       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1377       <require condition="CM33_NODSP_NOFPU"/>
1378       <require Tcompiler="GCC"/>
1379     </condition>
1380     <condition id="CM33_DSP_NOFPU_GCC">
1381       <description>CM33, DSP, no FPU, GCC Compiler</description>
1382       <require condition="CM33_DSP_NOFPU"/>
1383       <require Tcompiler="GCC"/>
1384     </condition>
1385     <condition id="CM33_NODSP_SP_GCC">
1386       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1387       <require condition="CM33_NODSP_SP"/>
1388       <require Tcompiler="GCC"/>
1389     </condition>
1390     <condition id="CM33_DSP_SP_GCC">
1391       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1392       <require condition="CM33_DSP_SP"/>
1393       <require Tcompiler="GCC"/>
1394     </condition>
1395     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1396       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1397       <require condition="CM33_NODSP_NOFPU_GCC"/>
1398       <require Dendian="Little-endian"/>
1399     </condition>
1400     <condition id="CM33_DSP_NOFPU_LE_GCC">
1401       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1402       <require condition="CM33_DSP_NOFPU_GCC"/>
1403       <require Dendian="Little-endian"/>
1404     </condition>
1405     <condition id="CM33_NODSP_SP_LE_GCC">
1406       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1407       <require condition="CM33_NODSP_SP_GCC"/>
1408       <require Dendian="Little-endian"/>
1409     </condition>
1410     <condition id="CM33_DSP_SP_LE_GCC">
1411       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1412       <require condition="CM33_DSP_SP_GCC"/>
1413       <require Dendian="Little-endian"/>
1414     </condition>
1415
1416     <condition id="ARMv8MBL_GCC">
1417       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1418       <require condition="ARMv8MBL"/>
1419       <require Tcompiler="GCC"/>
1420     </condition>
1421     <condition id="ARMv8MBL_LE_GCC">
1422       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1423       <require condition="ARMv8MBL_GCC"/>
1424       <require Dendian="Little-endian"/>
1425     </condition>
1426     <condition id="ARMv8MBL_BE_GCC">
1427       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1428       <require condition="ARMv8MBL_GCC"/>
1429       <require Dendian="Big-endian"/>
1430     </condition>
1431
1432     <condition id="ARMv8MML_GCC">
1433       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1434       <require condition="ARMv8MML"/>
1435       <require Tcompiler="GCC"/>
1436     </condition>
1437     <condition id="ARMv8MML_LE_GCC">
1438       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1439       <require condition="ARMv8MML_GCC"/>
1440       <require Dendian="Little-endian"/>
1441     </condition>
1442     <condition id="ARMv8MML_BE_GCC">
1443       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1444       <require condition="ARMv8MML_GCC"/>
1445       <require Dendian="Big-endian"/>
1446     </condition>
1447
1448     <condition id="ARMv8MML_FP_GCC">
1449       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1450       <require condition="ARMv8MML_FP"/>
1451       <require Tcompiler="GCC"/>
1452     </condition>
1453     <condition id="ARMv8MML_FP_LE_GCC">
1454       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1455       <require condition="ARMv8MML_FP_GCC"/>
1456       <require Dendian="Little-endian"/>
1457     </condition>
1458     <condition id="ARMv8MML_FP_BE_GCC">
1459       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1460       <require condition="ARMv8MML_FP_GCC"/>
1461       <require Dendian="Big-endian"/>
1462     </condition>
1463
1464     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1465       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1466       <require condition="ARMv8MML_NODSP_NOFPU"/>
1467       <require Tcompiler="GCC"/>
1468     </condition>
1469     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1470       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1471       <require condition="ARMv8MML_DSP_NOFPU"/>
1472       <require Tcompiler="GCC"/>
1473     </condition>
1474     <condition id="ARMv8MML_NODSP_SP_GCC">
1475       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1476       <require condition="ARMv8MML_NODSP_SP"/>
1477       <require Tcompiler="GCC"/>
1478     </condition>
1479     <condition id="ARMv8MML_DSP_SP_GCC">
1480       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1481       <require condition="ARMv8MML_DSP_SP"/>
1482       <require Tcompiler="GCC"/>
1483     </condition>
1484     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1485       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1486       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1487       <require Dendian="Little-endian"/>
1488     </condition>
1489     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1490       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1491       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1492       <require Dendian="Little-endian"/>
1493     </condition>
1494     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1495       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1496       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1497       <require Dendian="Little-endian"/>
1498     </condition>
1499     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1500       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1501       <require condition="ARMv8MML_DSP_SP_GCC"/>
1502       <require Dendian="Little-endian"/>
1503     </condition>
1504
1505     <!-- IAR compiler -->
1506     <condition id="CA_IAR">
1507       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1508       <require condition="ARMv7-A Device"/>
1509       <require Tcompiler="IAR"/>
1510     </condition>
1511
1512     <condition id="CM0_IAR">
1513       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1514       <require condition="CM0"/>
1515       <require Tcompiler="IAR"/>
1516     </condition>
1517     <condition id="CM0_LE_IAR">
1518       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1519       <require condition="CM0_IAR"/>
1520       <require Dendian="Little-endian"/>
1521     </condition>
1522     <condition id="CM0_BE_IAR">
1523       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1524       <require condition="CM0_IAR"/>
1525       <require Dendian="Big-endian"/>
1526     </condition>
1527
1528     <condition id="CM3_IAR">
1529       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1530       <require condition="CM3"/>
1531       <require Tcompiler="IAR"/>
1532     </condition>
1533     <condition id="CM3_LE_IAR">
1534       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1535       <require condition="CM3_IAR"/>
1536       <require Dendian="Little-endian"/>
1537     </condition>
1538     <condition id="CM3_BE_IAR">
1539       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1540       <require condition="CM3_IAR"/>
1541       <require Dendian="Big-endian"/>
1542     </condition>
1543
1544     <condition id="CM4_IAR">
1545       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1546       <require condition="CM4"/>
1547       <require Tcompiler="IAR"/>
1548     </condition>
1549     <condition id="CM4_LE_IAR">
1550       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1551       <require condition="CM4_IAR"/>
1552       <require Dendian="Little-endian"/>
1553     </condition>
1554     <condition id="CM4_BE_IAR">
1555       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1556       <require condition="CM4_IAR"/>
1557       <require Dendian="Big-endian"/>
1558     </condition>
1559
1560     <condition id="CM4_FP_IAR">
1561       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1562       <require condition="CM4_FP"/>
1563       <require Tcompiler="IAR"/>
1564     </condition>
1565     <condition id="CM4_FP_LE_IAR">
1566       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1567       <require condition="CM4_FP_IAR"/>
1568       <require Dendian="Little-endian"/>
1569     </condition>
1570     <condition id="CM4_FP_BE_IAR">
1571       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1572       <require condition="CM4_FP_IAR"/>
1573       <require Dendian="Big-endian"/>
1574     </condition>
1575
1576     <condition id="CM7_IAR">
1577       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1578       <require condition="CM7"/>
1579       <require Tcompiler="IAR"/>
1580     </condition>
1581     <condition id="CM7_LE_IAR">
1582       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1583       <require condition="CM7_IAR"/>
1584       <require Dendian="Little-endian"/>
1585     </condition>
1586     <condition id="CM7_BE_IAR">
1587       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1588       <require condition="CM7_IAR"/>
1589       <require Dendian="Big-endian"/>
1590     </condition>
1591
1592     <condition id="CM7_FP_IAR">
1593       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1594       <require condition="CM7_FP"/>
1595       <require Tcompiler="IAR"/>
1596     </condition>
1597     <condition id="CM7_FP_LE_IAR">
1598       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1599       <require condition="CM7_FP_IAR"/>
1600       <require Dendian="Little-endian"/>
1601     </condition>
1602     <condition id="CM7_FP_BE_IAR">
1603       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1604       <require condition="CM7_FP_IAR"/>
1605       <require Dendian="Big-endian"/>
1606     </condition>
1607
1608     <condition id="CM7_SP_IAR">
1609       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1610       <require condition="CM7_SP"/>
1611       <require Tcompiler="IAR"/>
1612     </condition>
1613     <condition id="CM7_SP_LE_IAR">
1614       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1615       <require condition="CM7_SP_IAR"/>
1616       <require Dendian="Little-endian"/>
1617     </condition>
1618     <condition id="CM7_SP_BE_IAR">
1619       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1620       <require condition="CM7_SP_IAR"/>
1621       <require Dendian="Big-endian"/>
1622     </condition>
1623
1624     <condition id="CM7_DP_IAR">
1625       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1626       <require condition="CM7_DP"/>
1627       <require Tcompiler="IAR"/>
1628     </condition>
1629     <condition id="CM7_DP_LE_IAR">
1630       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1631       <require condition="CM7_DP_IAR"/>
1632       <require Dendian="Little-endian"/>
1633     </condition>
1634     <condition id="CM7_DP_BE_IAR">
1635       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1636       <require condition="CM7_DP_IAR"/>
1637       <require Dendian="Big-endian"/>
1638     </condition>
1639
1640     <!-- conditions selecting single devices and CMSIS Core -->
1641     <!-- used for component startup, GCC version is used for C-Startup -->
1642     <condition id="ARMCM0 CMSIS">
1643       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1644       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1645       <require Cclass="CMSIS" Cgroup="CORE"/>
1646     </condition>
1647     <condition id="ARMCM0 CMSIS GCC">
1648       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1649       <require condition="ARMCM0 CMSIS"/>
1650       <require condition="GCC"/>
1651     </condition>
1652
1653     <condition id="ARMCM0+ CMSIS">
1654       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1655       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1656       <require Cclass="CMSIS" Cgroup="CORE"/>
1657     </condition>
1658     <condition id="ARMCM0+ CMSIS GCC">
1659       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1660       <require condition="ARMCM0+ CMSIS"/>
1661       <require condition="GCC"/>
1662     </condition>
1663
1664     <condition id="ARMCM3 CMSIS">
1665       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1666       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1667       <require Cclass="CMSIS" Cgroup="CORE"/>
1668     </condition>
1669     <condition id="ARMCM3 CMSIS GCC">
1670       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1671       <require condition="ARMCM3 CMSIS"/>
1672       <require condition="GCC"/>
1673     </condition>
1674
1675     <condition id="ARMCM4 CMSIS">
1676       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1677       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1678       <require Cclass="CMSIS" Cgroup="CORE"/>
1679     </condition>
1680     <condition id="ARMCM4 CMSIS GCC">
1681       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1682       <require condition="ARMCM4 CMSIS"/>
1683       <require condition="GCC"/>
1684     </condition>
1685
1686     <condition id="ARMCM7 CMSIS">
1687       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1688       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1689       <require Cclass="CMSIS" Cgroup="CORE"/>
1690     </condition>
1691     <condition id="ARMCM7 CMSIS GCC">
1692       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1693       <require condition="ARMCM7 CMSIS"/>
1694       <require condition="GCC"/>
1695     </condition>
1696
1697     <condition id="ARMCM23 CMSIS">
1698       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1699       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1700       <require Cclass="CMSIS" Cgroup="CORE"/>
1701     </condition>
1702     <condition id="ARMCM23 CMSIS GCC">
1703       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1704       <require condition="ARMCM23 CMSIS"/>
1705       <require condition="GCC"/>
1706     </condition>
1707
1708     <condition id="ARMCM33 CMSIS">
1709       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1710       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1711       <require Cclass="CMSIS" Cgroup="CORE"/>
1712     </condition>
1713     <condition id="ARMCM33 CMSIS GCC">
1714       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1715       <require condition="ARMCM33 CMSIS"/>
1716       <require condition="GCC"/>
1717     </condition>
1718
1719     <condition id="ARMSC000 CMSIS">
1720       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1721       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1722       <require Cclass="CMSIS" Cgroup="CORE"/>
1723     </condition>
1724     <condition id="ARMSC000 CMSIS GCC">
1725       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1726       <require condition="ARMSC000 CMSIS"/>
1727       <require condition="GCC"/>
1728     </condition>
1729
1730     <condition id="ARMSC300 CMSIS">
1731       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1732       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1733       <require Cclass="CMSIS" Cgroup="CORE"/>
1734     </condition>
1735     <condition id="ARMSC300 CMSIS GCC">
1736       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1737       <require condition="ARMSC300 CMSIS"/>
1738       <require condition="GCC"/>
1739     </condition>
1740
1741     <condition id="ARMv8MBL CMSIS">
1742       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1743       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1744       <require Cclass="CMSIS" Cgroup="CORE"/>
1745     </condition>
1746     <condition id="ARMv8MBL CMSIS GCC">
1747       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1748       <require condition="ARMv8MBL CMSIS"/>
1749       <require condition="GCC"/>
1750     </condition>
1751
1752     <condition id="ARMv8MML CMSIS">
1753       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1754       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1755       <require Cclass="CMSIS" Cgroup="CORE"/>
1756     </condition>
1757     <condition id="ARMv8MML CMSIS GCC">
1758       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1759       <require condition="ARMv8MML CMSIS"/>
1760       <require condition="GCC"/>
1761     </condition>
1762
1763     <condition id="ARMCA5 CMSIS">
1764       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1765       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1766       <require Cclass="CMSIS" Cgroup="CORE"/>
1767     </condition>
1768
1769     <condition id="ARMCA7 CMSIS">
1770       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1771       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1772       <require Cclass="CMSIS" Cgroup="CORE"/>
1773     </condition>
1774
1775     <condition id="ARMCA9 CMSIS">
1776       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1777       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1778       <require Cclass="CMSIS" Cgroup="CORE"/>
1779     </condition>
1780
1781     <!-- CMSIS DSP -->
1782     <condition id="CMSIS DSP">
1783       <description>Components required for DSP</description>
1784       <require condition="ARMv6_7_8-M Device"/>
1785       <require condition="ARMCC GCC"/>
1786       <require Cclass="CMSIS" Cgroup="CORE"/>
1787     </condition>
1788
1789     <!-- RTOS RTX -->
1790     <condition id="RTOS RTX">
1791       <description>Components required for RTOS RTX</description>
1792       <require condition="ARMv6_7-M Device"/>
1793       <require condition="ARMCC GCC IAR"/>
1794       <require Cclass="Device" Cgroup="Startup"/>
1795       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1796     </condition>
1797     <condition id="RTOS RTX IFX">
1798       <description>Components required for RTOS RTX IFX</description>
1799       <require condition="ARMv6_7-M Device"/>
1800       <require condition="ARMCC GCC IAR"/>
1801       <require Dvendor="Infineon:7" Dname="XMC4*"/>
1802       <require Cclass="Device" Cgroup="Startup"/>
1803       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1804     </condition>
1805     <condition id="RTOS RTX5">
1806       <description>Components required for RTOS RTX5</description>
1807       <require condition="ARMv6_7_8-M Device"/>
1808       <require condition="ARMCC GCC IAR"/>
1809       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1810     </condition>
1811     <condition id="RTOS2 RTX5">
1812       <description>Components required for RTOS2 RTX5</description>
1813       <require condition="ARMv6_7_8-M Device"/>
1814       <require condition="ARMCC GCC IAR"/>
1815       <require Cclass="CMSIS"  Cgroup="CORE"/>
1816       <require Cclass="Device" Cgroup="Startup"/>
1817     </condition>
1818     <condition id="RTOS2 RTX5 v7-A">
1819       <description>Components required for RTOS2 RTX5 v7-A</description>
1820       <require condition="ARMv7-A Device"/>
1821       <require condition="ARMCC GCC IAR"/>
1822       <require Cclass="CMSIS"  Cgroup="CORE"/>
1823       <require Cclass="Device" Cgroup="Startup"/>
1824       <require Cclass="Device" Cgroup="OS Tick"/>
1825       <require Cclass="Device" Cgroup="IRQ Controller"/>
1826     </condition>
1827     <condition id="RTOS2 RTX5 Lib">
1828       <description>Components required for RTOS2 RTX5 Library</description>
1829       <require condition="ARMv6_7_8-M Device"/>
1830       <require condition="ARMCC GCC IAR"/>
1831       <require Cclass="CMSIS"  Cgroup="CORE"/>
1832       <require Cclass="Device" Cgroup="Startup"/>
1833     </condition>
1834     <condition id="RTOS2 RTX5 NS">
1835       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1836       <require condition="ARMv8-M TZ Device"/>
1837       <require condition="ARMCC GCC"/>
1838       <require Cclass="CMSIS"  Cgroup="CORE"/>
1839       <require Cclass="Device" Cgroup="Startup"/>
1840     </condition>
1841
1842     <!-- OS Tick -->
1843     <condition id="OS Tick PTIM">
1844       <description>Components required for OS Tick Private Timer</description>
1845       <require condition="CA5_CA9"/>
1846       <require Cclass="Device" Cgroup="IRQ Controller"/>
1847     </condition>
1848
1849     <condition id="OS Tick GTIM">
1850       <description>Components required for OS Tick Generic Physical Timer</description>
1851       <require condition="CA7"/>
1852       <require Cclass="Device" Cgroup="IRQ Controller"/>
1853     </condition>
1854
1855   </conditions>
1856
1857   <components>
1858     <!-- CMSIS-Core component -->
1859     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2"  condition="ARMv6_7_8-M Device" >
1860       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1861       <files>
1862         <!-- CPU independent -->
1863         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1864         <file category="include" name="CMSIS/Include/"/>
1865         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1866         <!-- Code template -->
1867         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1868         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1869       </files>
1870     </component>
1871
1872     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0"  condition="ARMv7-A Device" >
1873       <description>CMSIS-CORE for Cortex-A</description>
1874       <files>
1875         <!-- CPU independent -->
1876         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1877         <file category="include" name="CMSIS/Core_A/Include/"/>
1878       </files>
1879     </component>
1880
1881     <!-- CMSIS-Startup components -->
1882     <!-- Cortex-M0 -->
1883     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1884       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1885       <files>
1886         <!-- include folder / device header file -->
1887         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1888         <!-- startup / system file -->
1889         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1890         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1891         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1892         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1893         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1894       </files>
1895     </component>
1896     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1897       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1898       <files>
1899         <!-- include folder / device header file -->
1900         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1901         <!-- startup / system file -->
1902         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1903         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1904         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1905       </files>
1906     </component>
1907
1908     <!-- Cortex-M0+ -->
1909     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1910       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1911       <files>
1912         <!-- include folder / device header file -->
1913         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1914         <!-- startup / system file -->
1915         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1916         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1917         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1918         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1919         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1920       </files>
1921     </component>
1922     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1923       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1924       <files>
1925         <!-- include folder / device header file -->
1926         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1927         <!-- startup / system file -->
1928         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1929         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1930         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1931       </files>
1932     </component>
1933
1934     <!-- Cortex-M3 -->
1935     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1936       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1937       <files>
1938         <!-- include folder / device header file -->
1939         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1940         <!-- startup / system file -->
1941         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1942         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1943         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1944         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1945         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1946       </files>
1947     </component>
1948     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1949       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1950       <files>
1951         <!-- include folder / device header file -->
1952         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1953         <!-- startup / system file -->
1954         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1955         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1956         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1957       </files>
1958     </component>
1959
1960     <!-- Cortex-M4 -->
1961     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1962       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1963       <files>
1964         <!-- include folder / device header file -->
1965         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1966         <!-- startup / system file -->
1967         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1968         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1969         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1970         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1971         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1972       </files>
1973     </component>
1974     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1975       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1976       <files>
1977         <!-- include folder / device header file -->
1978         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1979         <!-- startup / system file -->
1980         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1981         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1982         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1983       </files>
1984     </component>
1985
1986     <!-- Cortex-M7 -->
1987     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1988       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1989       <files>
1990         <!-- include folder / device header file -->
1991         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1992         <!-- startup / system file -->
1993         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1994         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1995         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1996         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1997         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1998       </files>
1999     </component>
2000     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2001       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2002       <files>
2003         <!-- include folder / device header file -->
2004         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2005         <!-- startup / system file -->
2006         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2007         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2008         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2009       </files>
2010     </component>
2011
2012     <!-- Cortex-M23 -->
2013     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2014       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2015       <files>
2016         <!-- include folder / device header file -->
2017         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2018         <!-- startup / system file -->
2019         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2020         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2021         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2022         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2023         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2024         <!-- SAU configuration -->
2025         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2026       </files>
2027     </component>
2028     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2029       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2030       <files>
2031         <!-- include folder / device header file -->
2032         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2033         <!-- startup / system file -->
2034         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2035         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2036         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2037         <!-- SAU configuration -->
2038         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2039       </files>
2040     </component>
2041
2042     <!-- Cortex-M33 -->
2043     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2044       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2045       <files>
2046         <!-- include folder / device header file -->
2047         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2048         <!-- startup / system file -->
2049         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2050         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2051         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2052         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2053         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2054         <!-- SAU configuration -->
2055         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2056       </files>
2057     </component>
2058     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2059       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2060       <files>
2061         <!-- include folder / device header file -->
2062         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2063         <!-- startup / system file -->
2064         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2065         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2066         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2067         <!-- SAU configuration -->
2068         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2069       </files>
2070     </component>
2071
2072     <!-- Cortex-SC000 -->
2073     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2074       <description>System and Startup for Generic ARM SC000 device</description>
2075       <files>
2076         <!-- include folder / device header file -->
2077         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2078         <!-- startup / system file -->
2079         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2080         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2081         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2082         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2083         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2084       </files>
2085     </component>
2086     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2087       <description>System and Startup for Generic ARM SC000 device</description>
2088       <files>
2089         <!-- include folder / device header file -->
2090         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2091         <!-- startup / system file -->
2092         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2093         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2094         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2095       </files>
2096     </component>
2097
2098     <!-- Cortex-SC300 -->
2099     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2100       <description>System and Startup for Generic ARM SC300 device</description>
2101       <files>
2102         <!-- include folder / device header file -->
2103         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2104         <!-- startup / system file -->
2105         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2106         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2107         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2108         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2109         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2110       </files>
2111     </component>
2112     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2113       <description>System and Startup for Generic ARM SC300 device</description>
2114       <files>
2115         <!-- include folder / device header file -->
2116         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2117         <!-- startup / system file -->
2118         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2119         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2120         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2121       </files>
2122     </component>
2123
2124     <!-- ARMv8MBL -->
2125     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2126       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2127       <files>
2128         <!-- include folder / device header file -->
2129         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2130         <!-- startup / system file -->
2131         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2132         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2133         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2134         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2135         <!-- SAU configuration -->
2136         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2137       </files>
2138     </component>
2139     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2140       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2141       <files>
2142         <!-- include folder / device header file -->
2143         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2144         <!-- startup / system file -->
2145         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2146         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2147         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2148         <!-- SAU configuration -->
2149         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2150       </files>
2151     </component>
2152
2153     <!-- ARMv8MML -->
2154     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2155       <description>System and Startup for Generic ARM ARMv8MML device</description>
2156       <files>
2157         <!-- include folder / device header file -->
2158         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2159         <!-- startup / system file -->
2160         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2161         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2162         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2163         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2164         <!-- SAU configuration -->
2165         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2166       </files>
2167     </component>
2168     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2169       <description>System and Startup for Generic ARM ARMv8MML device</description>
2170       <files>
2171         <!-- include folder / device header file -->
2172         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2173         <!-- startup / system file -->
2174         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2175         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2176         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2177         <!-- SAU configuration -->
2178         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2179       </files>
2180     </component>
2181
2182     <!-- Cortex-A5 -->
2183     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2184       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2185       <files>
2186         <!-- include folder / device header file -->
2187         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2188         <!-- startup / system / mmu files -->
2189         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2190         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2191         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2192         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2193         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2194         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2195         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2196         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2197
2198       </files>
2199     </component>
2200
2201     <!-- Cortex-A7 -->
2202     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2203       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2204       <files>
2205         <!-- include folder / device header file -->
2206         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2207         <!-- startup / system / mmu files -->
2208         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2209         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2210         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2211         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2212         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2213         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2214         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2215         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2216       </files>
2217     </component>
2218
2219     <!-- Cortex-A9 -->
2220     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2221       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2222       <files>
2223         <!-- include folder / device header file -->
2224         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2225         <!-- startup / system / mmu files -->
2226         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2227         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2228         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2229         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2230         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2231         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2232         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2233         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2234         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2235         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2236       </files>
2237     </component>
2238
2239     <!-- IRQ Controller -->
2240     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2241       <description>IRQ Controller implementation using GIC</description>
2242       <files>
2243         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2244       </files>
2245     </component>
2246
2247     <!-- OS Tick -->
2248     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
2249       <description>OS Tick implementation using Private Timer</description>
2250       <files>
2251         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2252       </files>
2253     </component>
2254
2255     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2256       <description>OS Tick implementation using Generic Physical Timer</description>
2257       <files>
2258         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2259       </files>
2260     </component>
2261
2262     <!-- CMSIS-DSP component -->
2263     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2264       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2265       <files>
2266         <!-- CPU independent -->
2267         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2268         <file category="header" name="CMSIS/Include/arm_math.h"/>
2269
2270         <!-- CPU and Compiler dependent -->
2271         <!-- ARMCC -->
2272         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2273         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2274         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2275         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2276         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2277         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2278         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2279         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2280         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2281         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2282         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2283         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2284         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2285         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2286
2287         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2288         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2289         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2290         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2291         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2292         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2293         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2294         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2295         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2296         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2297         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2298         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2299
2300         <!-- GCC -->
2301         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2302         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2303         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2304         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2305         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2306         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2307         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2308
2309         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2310         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2311         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2312         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2313         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2314         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2315         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2316         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2317         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2318         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2319         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2320         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2321
2322       </files>
2323     </component>
2324
2325     <!-- CMSIS-RTOS Keil RTX component -->
2326     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2327       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2328       <RTE_Components_h>
2329         <!-- the following content goes into file 'RTE_Components.h' -->
2330         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2331         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2332       </RTE_Components_h>
2333       <files>
2334         <!-- CPU independent -->
2335         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2336         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2337         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2338
2339         <!-- RTX templates -->
2340         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2341         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2342         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2343         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2344         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2345         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2346         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2347         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2348         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2349         <!-- tool-chain specific template file -->
2350         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2351         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2352         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2353
2354         <!-- CPU and Compiler dependent -->
2355         <!-- ARMCC -->
2356         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2357         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2358         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2359         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2360         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2361         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2362         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2363         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2364         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2365         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2366         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2367         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2368         <!-- GCC -->
2369         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2370         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2371         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2372         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2373         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2374         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2375         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2376         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2377         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2378         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2379         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2380         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2381         <!-- IAR -->
2382         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2383         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2384         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2385         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2386         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2387         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2388         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2389         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2390         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2391         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2392         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2393         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2394       </files>
2395     </component>
2396     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2397     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2398       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2399       <RTE_Components_h>
2400         <!-- the following content goes into file 'RTE_Components.h' -->
2401         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2402         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2403       </RTE_Components_h>
2404       <files>
2405         <!-- CPU independent -->
2406         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2407         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2408         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2409
2410         <!-- RTX templates -->
2411         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2412         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2413         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2414         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2415         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2416         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2417         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2418         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2419         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2420         <!-- tool-chain specific template file -->
2421         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2422         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2423         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2424
2425         <!-- CPU and Compiler dependent -->
2426         <!-- ARMCC -->
2427         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2428         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2429         <!-- GCC -->
2430         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2431         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2432         <!-- IAR -->
2433       </files>
2434     </component>
2435
2436     <!-- CMSIS-RTOS Keil RTX5 component -->
2437     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.1" Capiversion="1.0.0" condition="RTOS RTX5">
2438       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2439       <RTE_Components_h>
2440         <!-- the following content goes into file 'RTE_Components.h' -->
2441         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2442         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2443       </RTE_Components_h>
2444       <files>
2445         <!-- RTX header file -->
2446         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2447         <!-- RTX compatibility module for API V1 -->
2448         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2449       </files>
2450     </component>
2451
2452     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2453     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
2454       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2455       <RTE_Components_h>
2456         <!-- the following content goes into file 'RTE_Components.h' -->
2457         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2458         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2459       </RTE_Components_h>
2460       <files>
2461         <!-- RTX documentation -->
2462         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2463
2464         <!-- RTX header files -->
2465         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2466
2467         <!-- RTX configuration -->
2468         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2469         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2470
2471         <!-- RTX templates -->
2472         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2473         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2474         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2475         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2476         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2477         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2478         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2479         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2480         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2481         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2482
2483         <!-- RTX library configuration -->
2484         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2485
2486         <!-- RTX libraries (CPU and Compiler dependent) -->
2487         <!-- ARMCC -->
2488         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2489         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2490         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2491         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2492         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2493         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2494         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2495         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2496         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2497         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2498         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2499         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2500         <!-- GCC -->
2501         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2502         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2503         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2504         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2505         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2506         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2507         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2508         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2509         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2510         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2511         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2512         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2513         <!-- IAR -->
2514         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2515         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2516         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2517         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2518         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2519         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2520       </files>
2521     </component>
2522     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2523       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2524       <RTE_Components_h>
2525         <!-- the following content goes into file 'RTE_Components.h' -->
2526         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2527         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2528         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2529       </RTE_Components_h>
2530       <files>
2531         <!-- RTX documentation -->
2532         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2533
2534         <!-- RTX header files -->
2535         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2536
2537         <!-- RTX configuration -->
2538         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2539         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2540
2541         <!-- RTX templates -->
2542         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2543         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2544         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2545         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2546         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2547         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2548         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2549         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2550         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2551         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2552
2553         <!-- RTX library configuration -->
2554         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2555
2556         <!-- RTX libraries (CPU and Compiler dependent) -->
2557         <!-- ARMCC -->
2558         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2559         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2560         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2561         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2562         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2563         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2564         <!-- GCC -->
2565         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2566         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2567         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2568         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2569         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2570         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2571       </files>
2572     </component>
2573     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5">
2574       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2575       <RTE_Components_h>
2576         <!-- the following content goes into file 'RTE_Components.h' -->
2577         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2578         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2579         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2580       </RTE_Components_h>
2581       <files>
2582         <!-- RTX documentation -->
2583         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2584
2585         <!-- RTX header files -->
2586         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2587
2588         <!-- RTX configuration -->
2589         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2590         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2591
2592         <!-- RTX templates -->
2593         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2594         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2595         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2596         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2597         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2598         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2599         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2600         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2601         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2602         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2603
2604         <!-- RTX sources (core) -->
2605         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2606         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2607         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2608         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2609         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2610         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2611         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2612         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2613         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2614         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2615         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2616         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2617         <!-- RTX sources (library configuration) -->
2618         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2619         <!-- RTX sources (handlers ARMCC) -->
2620         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2621         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2622         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2623         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2624         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2625         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2626         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2627         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2628         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2629         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2630         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2631         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2632         <!-- RTX sources (handlers GCC) -->
2633         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2634         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2635         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2636         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2637         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2638         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2639         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2640         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2641         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2642         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2643         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2644         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2645         <!-- RTX sources (handlers IAR) -->
2646         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2647         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2648         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2649         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2650         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2651         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2652         <!-- OS Tick (SysTick) -->
2653         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2654       </files>
2655     </component>
2656     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
2657       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2658       <RTE_Components_h>
2659         <!-- the following content goes into file 'RTE_Components.h' -->
2660         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2661         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2662         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2663       </RTE_Components_h>
2664       <files>
2665         <!-- RTX documentation -->
2666         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2667
2668         <!-- RTX header files -->
2669         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2670
2671         <!-- RTX configuration -->
2672         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2673         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2674
2675         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2676
2677         <!-- RTX templates -->
2678         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2679         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2680         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2681         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2682         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2683         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2684         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2685         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2686         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2687         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2688
2689         <!-- RTX sources (core) -->
2690         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2691         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2692         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2693         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2694         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2695         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2696         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2697         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2698         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2699         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2700         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2701         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2702         <!-- RTX sources (library configuration) -->
2703         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2704         <!-- RTX sources (handlers ARMCC) -->
2705         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2706         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2707         <!-- RTX sources (handlers GCC) -->
2708         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2709         <!-- RTX sources (handlers IAR) -->
2710         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2711       </files>
2712     </component>
2713     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.1" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2714       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2715       <RTE_Components_h>
2716         <!-- the following content goes into file 'RTE_Components.h' -->
2717         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2718         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2719         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2720         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2721       </RTE_Components_h>
2722       <files>
2723         <!-- RTX documentation -->
2724         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2725
2726         <!-- RTX header files -->
2727         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2728
2729         <!-- RTX configuration -->
2730         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2731         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2732
2733         <!-- RTX templates -->
2734         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2735         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2736         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2737         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2738         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2739         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2740         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2741         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2742         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2743         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2744
2745         <!-- RTX sources (core) -->
2746         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2747         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2748         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2749         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2750         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2751         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2752         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2753         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2754         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2755         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2756         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2757         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2758         <!-- RTX sources (library configuration) -->
2759         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2760         <!-- RTX sources (ARMCC handlers) -->
2761         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2762         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2763         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2764         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2765         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2766         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2767         <!-- RTX sources (GCC handlers) -->
2768         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2769         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2770         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2771         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2772         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2773         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2774         <!-- OS Tick (SysTick) -->
2775         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2776       </files>
2777     </component>
2778
2779   </components>
2780
2781   <boards>
2782     <board name="uVision Simulator" vendor="Keil">
2783       <description>uVision Simulator</description>
2784       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2785       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2786       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2787       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2788       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2789       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2790       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2791       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2792       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2793       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2794       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2795       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2796       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2797       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2798       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2799       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2800       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2801       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2802     </board>
2803
2804     <board name="Fixed Virtual Platform" vendor="ARM">
2805       <description>Fixed Virtual Platform</description>
2806       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
2807       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
2808       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
2809     </board>
2810   </boards>
2811
2812   <examples>
2813     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2814       <description>DSP_Lib Class Marks example</description>
2815       <board name="uVision Simulator" vendor="Keil"/>
2816       <project>
2817         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2818       </project>
2819       <attributes>
2820         <component Cclass="CMSIS" Cgroup="CORE"/>
2821         <component Cclass="CMSIS" Cgroup="DSP"/>
2822         <component Cclass="Device" Cgroup="Startup"/>
2823         <category>Getting Started</category>
2824       </attributes>
2825     </example>
2826
2827     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2828       <description>DSP_Lib Convolution example</description>
2829       <board name="uVision Simulator" vendor="Keil"/>
2830       <project>
2831         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2832       </project>
2833       <attributes>
2834         <component Cclass="CMSIS" Cgroup="CORE"/>
2835         <component Cclass="CMSIS" Cgroup="DSP"/>
2836         <component Cclass="Device" Cgroup="Startup"/>
2837         <category>Getting Started</category>
2838       </attributes>
2839     </example>
2840
2841     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2842       <description>DSP_Lib Dotproduct example</description>
2843       <board name="uVision Simulator" vendor="Keil"/>
2844       <project>
2845         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2846       </project>
2847       <attributes>
2848         <component Cclass="CMSIS" Cgroup="CORE"/>
2849         <component Cclass="CMSIS" Cgroup="DSP"/>
2850         <component Cclass="Device" Cgroup="Startup"/>
2851         <category>Getting Started</category>
2852       </attributes>
2853     </example>
2854
2855     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2856       <description>DSP_Lib FFT Bin example</description>
2857       <board name="uVision Simulator" vendor="Keil"/>
2858       <project>
2859         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2860       </project>
2861       <attributes>
2862         <component Cclass="CMSIS" Cgroup="CORE"/>
2863         <component Cclass="CMSIS" Cgroup="DSP"/>
2864         <component Cclass="Device" Cgroup="Startup"/>
2865         <category>Getting Started</category>
2866       </attributes>
2867     </example>
2868
2869     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2870       <description>DSP_Lib FIR example</description>
2871       <board name="uVision Simulator" vendor="Keil"/>
2872       <project>
2873         <environment name="uv" load="arm_fir_example.uvprojx"/>
2874       </project>
2875       <attributes>
2876         <component Cclass="CMSIS" Cgroup="CORE"/>
2877         <component Cclass="CMSIS" Cgroup="DSP"/>
2878         <component Cclass="Device" Cgroup="Startup"/>
2879         <category>Getting Started</category>
2880       </attributes>
2881     </example>
2882
2883     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2884       <description>DSP_Lib Graphic Equalizer example</description>
2885       <board name="uVision Simulator" vendor="Keil"/>
2886       <project>
2887         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2888       </project>
2889       <attributes>
2890         <component Cclass="CMSIS" Cgroup="CORE"/>
2891         <component Cclass="CMSIS" Cgroup="DSP"/>
2892         <component Cclass="Device" Cgroup="Startup"/>
2893         <category>Getting Started</category>
2894       </attributes>
2895     </example>
2896
2897     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2898       <description>DSP_Lib Linear Interpolation example</description>
2899       <board name="uVision Simulator" vendor="Keil"/>
2900       <project>
2901         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2902       </project>
2903       <attributes>
2904         <component Cclass="CMSIS" Cgroup="CORE"/>
2905         <component Cclass="CMSIS" Cgroup="DSP"/>
2906         <component Cclass="Device" Cgroup="Startup"/>
2907         <category>Getting Started</category>
2908       </attributes>
2909     </example>
2910
2911     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2912       <description>DSP_Lib Matrix example</description>
2913       <board name="uVision Simulator" vendor="Keil"/>
2914       <project>
2915         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2916       </project>
2917       <attributes>
2918         <component Cclass="CMSIS" Cgroup="CORE"/>
2919         <component Cclass="CMSIS" Cgroup="DSP"/>
2920         <component Cclass="Device" Cgroup="Startup"/>
2921         <category>Getting Started</category>
2922       </attributes>
2923     </example>
2924
2925     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2926       <description>DSP_Lib Signal Convergence example</description>
2927       <board name="uVision Simulator" vendor="Keil"/>
2928       <project>
2929         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2930       </project>
2931       <attributes>
2932         <component Cclass="CMSIS" Cgroup="CORE"/>
2933         <component Cclass="CMSIS" Cgroup="DSP"/>
2934         <component Cclass="Device" Cgroup="Startup"/>
2935         <category>Getting Started</category>
2936       </attributes>
2937     </example>
2938
2939     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2940       <description>DSP_Lib Sinus/Cosinus example</description>
2941       <board name="uVision Simulator" vendor="Keil"/>
2942       <project>
2943         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2944       </project>
2945       <attributes>
2946         <component Cclass="CMSIS" Cgroup="CORE"/>
2947         <component Cclass="CMSIS" Cgroup="DSP"/>
2948         <component Cclass="Device" Cgroup="Startup"/>
2949         <category>Getting Started</category>
2950       </attributes>
2951     </example>
2952
2953     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2954       <description>DSP_Lib Variance example</description>
2955       <board name="uVision Simulator" vendor="Keil"/>
2956       <project>
2957         <environment name="uv" load="arm_variance_example.uvprojx"/>
2958       </project>
2959       <attributes>
2960         <component Cclass="CMSIS" Cgroup="CORE"/>
2961         <component Cclass="CMSIS" Cgroup="DSP"/>
2962         <component Cclass="Device" Cgroup="Startup"/>
2963         <category>Getting Started</category>
2964       </attributes>
2965     </example>
2966
2967     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2968       <description>CMSIS-RTOS2 Blinky example</description>
2969       <board name="uVision Simulator" vendor="Keil"/>
2970       <project>
2971         <environment name="uv" load="Blinky.uvprojx"/>
2972       </project>
2973       <attributes>
2974         <component Cclass="CMSIS" Cgroup="CORE"/>
2975         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2976         <component Cclass="Device" Cgroup="Startup"/>
2977         <category>Getting Started</category>
2978       </attributes>
2979     </example>
2980
2981     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2982       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2983       <board name="uVision Simulator" vendor="Keil"/>
2984       <project>
2985         <environment name="uv" load="Blinky.uvprojx"/>
2986       </project>
2987       <attributes>
2988         <component Cclass="CMSIS" Cgroup="CORE"/>
2989         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2990         <component Cclass="Device" Cgroup="Startup"/>
2991         <category>Getting Started</category>
2992       </attributes>
2993     </example>
2994
2995     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
2996       <description>CMSIS-RTOS2 Message Queue Example</description>
2997       <board name="uVision Simulator" vendor="Keil"/>
2998       <project>
2999         <environment name="uv" load="MsqQueue.uvprojx"/>
3000       </project>
3001       <attributes>
3002         <component Cclass="CMSIS" Cgroup="CORE"/>
3003         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3004         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3005         <component Cclass="Device" Cgroup="Startup"/>
3006         <category>Getting Started</category>
3007       </attributes>
3008     </example>
3009
3010     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3011       <description>CMSIS-RTOS2 Memory Pool Example</description>
3012       <board name="Fixed Virtual Platform" vendor="ARM"/>
3013       <project>
3014         <environment name="uv" load="MemPool.uvprojx"/>
3015       </project>
3016       <attributes>
3017         <component Cclass="CMSIS" Cgroup="CORE"/>
3018         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3019         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3020         <component Cclass="Device" Cgroup="Startup"/>
3021         <category>Getting Started</category>
3022       </attributes>
3023     </example>
3024
3025     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3026       <description>Bare-metal secure/non-secure example without RTOS</description>
3027       <board name="uVision Simulator" vendor="Keil"/>
3028       <project>
3029         <environment name="uv" load="NoRTOS.uvmpw"/>
3030       </project>
3031       <attributes>
3032         <component Cclass="CMSIS" Cgroup="CORE"/>
3033         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3034         <component Cclass="Device" Cgroup="Startup"/>
3035         <category>Getting Started</category>
3036       </attributes>
3037     </example>
3038
3039     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3040       <description>Secure/non-secure RTOS example with thread context management</description>
3041       <board name="uVision Simulator" vendor="Keil"/>
3042       <project>
3043         <environment name="uv" load="RTOS.uvmpw"/>
3044       </project>
3045       <attributes>
3046         <component Cclass="CMSIS" Cgroup="CORE"/>
3047         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3048         <component Cclass="Device" Cgroup="Startup"/>
3049         <category>Getting Started</category>
3050       </attributes>
3051     </example>
3052
3053     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3054       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3055       <board name="uVision Simulator" vendor="Keil"/>
3056       <project>
3057         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3058       </project>
3059       <attributes>
3060         <component Cclass="CMSIS" Cgroup="CORE"/>
3061         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3062         <component Cclass="Device" Cgroup="Startup"/>
3063         <category>Getting Started</category>
3064       </attributes>
3065     </example>
3066
3067   </examples>
3068
3069 </package>