begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.1-dev6">
  12       DSP:
  13        - updated to version V1.5.1.
  14        - changed copyrigth note.
  15        - added ARMv8M DSP libraries.
  16     </release>
  17     <release version="5.0.1-dev5">
  18       DSP:
  19        - updated to version V1.5.0.
  20     </release>
  21     <release version="5.0.1-dev4">
  22       DSP:
  23        - preparation for ARMv8M DSP libraries.
  24     </release>
  25     <release version="5.0.1-dev3">
  26       Updated ARMv8M Mainline FPU settings in partition*.h
  27     </release>
  28     <release version="5.0.1-dev2">
  29       CMSIS-RTOS2:
  30        - API 2.1   (see revision history for details)
  31        - RTX 5.1.0 (see revision history for details)
  32     </release>
  33     <release version="5.0.1-dev1">
  34       All C module and header files: updated removing 'http://' within license header sections flagged by MISRA as comment within comment
  35       PDSC: added new compatible devices to 'uVision Simulator' generic board description
  36       CMSIS-Pack Schema: adding
  37     </release>
  38     <release version="5.0.1-dev0">
  39       CMSIS-Core:
  40        - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  41        - Updated template for secure main function (main_s.c)
  42        - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  43       CMSIS-RTOS2:
  44        - RTX 5.0.1 (see revision history for details)
  45     </release>
  46     <release version="5.0.0" date="2016-11-11">
  47       Changed open source license to Apache 2.0
  48       CMSIS_Core:
  49        - Added support for Cortex-M23 and Cortex-M33.
  50        - Added ARMv8-M device configurations for mainline and baseline.
  51        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  52        - Added cmsis_compiler.h to unify compiler behaviour.
  53        - Updated function SCB_EnableICache (for Cortex-M7).
  54        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  55       CMSIS-RTOS:
  56         - bug fix in RTX 4.82 (see revision history for details)
  57       CMSIS-RTOS2:
  58         - new API including compatibility layer to CMSIS-RTOS
  59         - reference implementation based on RTX5
  60         - supports all Cortex-M variants including TrustZone for ARMv8-M
  61       CMSIS-SVD:
  62        - reworked SVD format documentation
  63        - removed SVD file database documentation as SVD files are distributed in packs
  64        - updated SVDConv for Win32 and Linux
  65       CMSIS-DSP:
  66        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  67        - Added DSP libraries build projects to CMSIS pack.
  68     </release>
  69     <release version="4.5.0" date="2015-10-28">
  70       - CMSIS-Core     4.30.0  (see revision history for details)
  71       - CMSIS-DAP      1.1.0   (unchanged)
  72       - CMSIS-Driver   2.04.0  (see revision history for details)
  73       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  74       - CMSIS-PACK     1.4.1   (see revision history for details)
  75       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  76       - CMSIS-SVD      1.3.1   (see revision history for details)
  77     </release>
  78     <release version="4.4.0" date="2015-09-11">
  79       - CMSIS-Core     4.20   (see revision history for details)
  80       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  81       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  82       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  83       - CMSIS-RTOS
  84         -- API         1.02   (unchanged)
  85         -- RTX         4.79   (see revision history for details)
  86       - CMSIS-SVD      1.3.0  (see revision history for details)
  87       - CMSIS-DAP      1.1.0  (extended with SWO support)
  88     </release>
  89     <release version="4.3.0" date="2015-03-20">
  90       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  91       - CMSIS-DSP      1.4.5  (see revision history for details)
  92       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  93       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  94       - CMSIS-RTOS
  95         -- API         1.02   (unchanged)
  96         -- RTX         4.78   (see revision history for details)
  97       - CMSIS-SVD      1.2    (unchanged)
  98     </release>
  99     <release version="4.2.0" date="2014-09-24">
 100       Adding Cortex-M7 support
 101       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 102       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 103       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 104       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 105       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 106     </release>
 107     <release version="4.1.1" date="2014-06-30">
 108       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 109     </release>
 110     <release version="4.1.0" date="2014-06-12">
 111       - CMSIS-Driver   2.02  (incompatible update)
 112       - CMSIS-Pack     1.3   (see revision history for details)
 113       - CMSIS-DSP      1.4.2 (unchanged)
 114       - CMSIS-Core     3.30  (unchanged)
 115       - CMSIS-RTOS RTX 4.74  (unchanged)
 116       - CMSIS-RTOS API 1.02  (unchanged)
 117       - CMSIS-SVD      1.10  (unchanged)
 118       PACK:
 119       - removed G++ specific files from PACK
 120       - added Component Startup variant "C Startup"
 121       - added Pack Checking Utility
 122       - updated conditions to reflect tool-chain dependency
 123       - added Taxonomy for Graphics
 124       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 125     </release>
 126     <release version="4.0.0">
 127       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 128       - CMSIS-Pack     1.1   Preliminary
 129       - CMSIS-DSP      1.4.2 (see revision history for details)
 130       - CMSIS-Core     3.30  (see revision history for details)
 131       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 132       - CMSIS-RTOS API 1.02  (unchanged)
 133       - CMSIS-SVD      1.10  (unchanged)
 134     </release>
 135     <release version="3.20.4">
 136       - CMSIS-RTOS 4.74 (see revision history for details)
 137       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 138     </release>
 139     <release version="3.20.3">
 140       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 141       - CMSIS-RTOS 4.73 (see revision history for details)
 142     </release>
 143     <release version="3.20.2">
 144       - CMSIS-Pack documentation has been added
 145       - CMSIS-Drivers header and documentation have been added to PACK
 146       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 147     </release>
 148     <release version="3.20.1">
 149       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 150       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 151     </release>
 152     <release version="3.20.0">
 153       The software portions that are deployed in the application program are now under a BSD license which allows usage
 154       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 155       The individual components have been update as listed below:
 156       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 157       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 158       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 159       - CMSIS-SVD is unchanged.
 160     </release>
 161   </releases>
 162
 163   <taxonomy>
 164     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 165     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 166     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 167     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 168     <description Cclass="File System">File Drive Support and File System</description>
 169     <description Cclass="Graphics">Graphical User Interface</description>
 170     <description Cclass="Network">Network Stack using Internet Protocols</description>
 171     <description Cclass="USB">Universal Serial Bus Stack</description>
 172     <description Cclass="Compiler">ARM Compiler Software Extensions</description>
 173   </taxonomy>
 174
 175   <devices>
 176     <!-- ******************************  Cortex-M0  ****************************** -->
 177     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 178       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 179       <description>
 180 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 181 - simple, easy-to-use programmers model
 182 - highly efficient ultra-low power operation
 183 - excellent code density
 184 - deterministic, high-performance interrupt handling
 185 - upward compatibility with the rest of the Cortex-M processor family.
 186       </description>
 187       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 188       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 189       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 190       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 191
 192       <device Dname="ARMCM0">
 193         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 194         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 195       </device>
 196     </family>
 197
 198     <!-- ******************************  Cortex-M0P  ****************************** -->
 199     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 200       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 201       <description>
 202 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 203 - simple, easy-to-use programmers model
 204 - highly efficient ultra-low power operation
 205 - excellent code density
 206 - deterministic, high-performance interrupt handling
 207 - upward compatibility with the rest of the Cortex-M processor family.
 208       </description>
 209       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 210       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 211       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 212       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 213
 214       <device Dname="ARMCM0P">
 215         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 216         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 217       </device>
 218     </family>
 219
 220     <!-- ******************************  Cortex-M3  ****************************** -->
 221     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 222       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 223       <description>
 224 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 225 - simple, easy-to-use programmers model
 226 - highly efficient ultra-low power operation
 227 - excellent code density
 228 - deterministic, high-performance interrupt handling
 229 - upward compatibility with the rest of the Cortex-M processor family.
 230       </description>
 231       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 232       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 233       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 234       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 235
 236       <device Dname="ARMCM3">
 237         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 238         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 239       </device>
 240     </family>
 241
 242     <!-- ******************************  Cortex-M4  ****************************** -->
 243     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 244       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 245       <description>
 246 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 247 - simple, easy-to-use programmers model
 248 - highly efficient ultra-low power operation
 249 - excellent code density
 250 - deterministic, high-performance interrupt handling
 251 - upward compatibility with the rest of the Cortex-M processor family.
 252       </description>
 253       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 254       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 255       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 256       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 257
 258       <device Dname="ARMCM4">
 259         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 260         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 261       </device>
 262
 263       <device Dname="ARMCM4_FP">
 264         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 265         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 266       </device>
 267     </family>
 268
 269     <!-- ******************************  Cortex-M7  ****************************** -->
 270     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 271       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 272       <description>
 273 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 274 - simple, easy-to-use programmers model
 275 - highly efficient ultra-low power operation
 276 - excellent code density
 277 - deterministic, high-performance interrupt handling
 278 - upward compatibility with the rest of the Cortex-M processor family.
 279       </description>
 280       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 281       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 282       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 283       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 284
 285       <device Dname="ARMCM7">
 286         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 287         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 288       </device>
 289
 290       <device Dname="ARMCM7_SP">
 291         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 292         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 293       </device>
 294
 295       <device Dname="ARMCM7_DP">
 296         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 297         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 298       </device>
 299     </family>
 300
 301     <!-- ******************************  Cortex-M23  ********************** -->
 302     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 303       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 304       <description>
 305 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 306 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 307 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 308       </description>
 309       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 310       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 311       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 312       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 313       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 314       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 315
 316       <device Dname="ARMCM23">
 317         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 318         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 319       </device>
 320
 321       <device Dname="ARMCM23_TZ">
 322         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 323         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 324       </device>
 325     </family>
 326
 327     <!-- ******************************  Cortex-M33  ****************************** -->
 328     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 329       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 330       <description>
 331 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 332 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 333       </description>
 334       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 335       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 336       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 337       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 338       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 339       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 340
 341       <device Dname="ARMCM33">
 342         <description>
 343 no DSP Instructions, no Floating Point Unit, no TrustZone
 344         </description>
 345         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 346         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 347       </device>
 348
 349       <device Dname="ARMCM33_TZ">
 350         <description>
 351 no DSP Instructions, no Floating Point Unit, TrustZone
 352         </description>
 353         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 354         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 355       </device>
 356
 357       <device Dname="ARMCM33_DSP_FP">
 358         <description>
 359 DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 360         </description>
 361         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 362         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 363       </device>
 364
 365       <device Dname="ARMCM33_DSP_FP_TZ">
 366         <description>
 367 DSP Instructions, Single Precision Floating Point Unit, TrustZone
 368         </description>
 369         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 370         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 371       </device>
 372     </family>
 373
 374     <!-- ******************************  ARMSC000  ****************************** -->
 375     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 376       <description>
 377 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 378 - simple, easy-to-use programmers model
 379 - highly efficient ultra-low power operation
 380 - excellent code density
 381 - deterministic, high-performance interrupt handling
 382       </description>
 383       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 384       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 385       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 386       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 387
 388       <device Dname="ARMSC000">
 389         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 390         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 391       </device>
 392     </family>
 393
 394     <!-- ******************************  ARMSC300  ****************************** -->
 395     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 396       <description>
 397 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 398 - simple, easy-to-use programmers model
 399 - highly efficient ultra-low power operation
 400 - excellent code density
 401 - deterministic, high-performance interrupt handling
 402       </description>
 403       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 404       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 405       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 406       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 407
 408       <device Dname="ARMSC300">
 409         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 410         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 411       </device>
 412     </family>
 413
 414     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 415     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 416       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 417       <description>
 418 ARMv8-M Baseline based device with TrustZone
 419       </description>
 420       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 421       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 422       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 423       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 424       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 425       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 426
 427       <device Dname="ARMv8MBL">
 428         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 429         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 430       </device>
 431     </family>
 432
 433     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 434     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 435       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 436       <description>
 437 ARMv8-M Mainline based device with TrustZone
 438       </description>
 439       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 440       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 441       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 442       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 443       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 444       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 445
 446       <device Dname="ARMv8MML">
 447         <description>
 448 no DSP Instructions, no Floating Point Unit, TrustZone
 449         </description>
 450         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 451         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 452       </device>
 453
 454       <device Dname="ARMv8MML_DSP">
 455         <description>
 456 DSP Instructions, no Floating Point Unit, TrustZone
 457         </description>
 458         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 459         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 460       </device>
 461
 462       <device Dname="ARMv8MML_SP">
 463         <description>
 464 no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 465         </description>
 466         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 467         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 468       </device>
 469
 470       <device Dname="ARMv8MML_DSP_SP">
 471         <description>
 472 DSP Instructions, Single Precision Floating Point Unit, TrustZone
 473         </description>
 474         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 475         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 476       </device>
 477
 478       <device Dname="ARMv8MML_DP">
 479         <description>
 480 no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 481         </description>
 482         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 483         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 484       </device>
 485
 486       <device Dname="ARMv8MML_DSP_DP">
 487         <description>
 488 DSP Instructions, Double Precision Floating Point Unit, TrustZone
 489         </description>
 490         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 491         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 492       </device>
 493     </family>
 494
 495   </devices>
 496
 497
 498   <apis>
 499     <!-- CMSIS-RTOS API -->
 500     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 501       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 502       <files>
 503         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 504       </files>
 505     </api>
 506     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.0" exclusive="1">
 507       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 508       <files>
 509         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 510         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 511       </files>
 512     </api>
 513     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.2.0" exclusive="0">
 514       <description>USART Driver API for Cortex-M</description>
 515       <files>
 516         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 517         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 518       </files>
 519     </api>
 520     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.1.0" exclusive="0">
 521       <description>SPI Driver API for Cortex-M</description>
 522       <files>
 523         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 524         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 525       </files>
 526     </api>
 527     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.0.0" exclusive="0">
 528       <description>SAI Driver API for Cortex-M</description>
 529       <files>
 530         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 531         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 532       </files>
 533     </api>
 534     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.2.0" exclusive="0">
 535       <description>I2C Driver API for Cortex-M</description>
 536       <files>
 537         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 538         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 539       </files>
 540     </api>
 541     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.0.0" exclusive="0">
 542       <description>CAN Driver API for Cortex-M</description>
 543       <files>
 544         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 545         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 546       </files>
 547     </api>
 548     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.0.0" exclusive="0">
 549       <description>Flash Driver API for Cortex-M</description>
 550       <files>
 551         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 552         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 553       </files>
 554     </api>
 555     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.2.0" exclusive="0">
 556       <description>MCI Driver API for Cortex-M</description>
 557       <files>
 558         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 559         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 560       </files>
 561     </api>
 562     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.1.0" exclusive="0">
 563       <description>NAND Flash Driver API for Cortex-M</description>
 564       <files>
 565         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 566         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 567       </files>
 568     </api>
 569     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 570       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 571       <files>
 572         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 573         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 574         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 575       </files>
 576     </api>
 577     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 578       <description>Ethernet MAC Driver API for Cortex-M</description>
 579       <files>
 580         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 581         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 582       </files>
 583     </api>
 584     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.0.0" exclusive="0">
 585       <description>Ethernet PHY Driver API for Cortex-M</description>
 586       <files>
 587         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 588         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 589       </files>
 590     </api>
 591     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.1.0" exclusive="0">
 592       <description>USB Device Driver API for Cortex-M</description>
 593       <files>
 594         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 595         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 596       </files>
 597     </api>
 598     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.1.0" exclusive="0">
 599       <description>USB Host Driver API for Cortex-M</description>
 600       <files>
 601         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 602         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 603       </files>
 604     </api>
 605   </apis>
 606
 607   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 608   <conditions>
 609     <!-- compiler -->
 610     <condition id="ARMCC">
 611       <require Tcompiler="ARMCC"/>
 612     </condition>
 613     <condition id="GCC">
 614       <require Tcompiler="GCC"/>
 615     </condition>
 616     <condition id="IAR">
 617       <require Tcompiler="IAR"/>
 618     </condition>
 619     <condition id="ARMCC GCC">
 620       <accept Tcompiler="ARMCC"/>
 621       <accept Tcompiler="GCC"/>
 622     </condition>
 623     <condition id="ARMCC GCC IAR">
 624       <accept Tcompiler="ARMCC"/>
 625       <accept Tcompiler="GCC"/>
 626       <accept Tcompiler="IAR"/>
 627     </condition>
 628
 629     <!-- ARM architecture -->
 630     <condition id="ARMv6-M Device">
 631       <description>ARMv6-M architecture based device</description>
 632       <accept Dcore="Cortex-M0"/>
 633       <accept Dcore="Cortex-M0+"/>
 634       <accept Dcore="SC000"/>
 635     </condition>
 636     <condition id="ARMv7-M Device">
 637       <description>ARMv7-M architecture based device</description>
 638       <accept Dcore="Cortex-M3"/>
 639       <accept Dcore="Cortex-M4"/>
 640       <accept Dcore="Cortex-M7"/>
 641       <accept Dcore="SC300"/>
 642     </condition>
 643     <condition id="ARMv8-M Device">
 644       <description>ARMv8-M architecture based device</description>
 645       <accept Dcore="ARMV8MBL"/>
 646       <accept Dcore="ARMV8MML"/>
 647       <accept Dcore="Cortex-M23"/>
 648       <accept Dcore="Cortex-M33"/>
 649     </condition>
 650     <condition id="ARMv8-M TZ Device">
 651       <description>ARMv8-M architecture based device with TrustZone</description>
 652       <require condition="ARMv8-M Device"/>
 653       <require Dtz="TZ"/>
 654     </condition>
 655     <condition id="ARMv6_7-M Device">
 656       <description>ARMv6_7-M architecture based device</description>
 657       <accept condition="ARMv6-M Device"/>
 658       <accept condition="ARMv7-M Device"/>
 659     </condition>
 660     <condition id="ARMv6_7_8-M Device">
 661       <description>ARMv6_7_8-M architecture based device</description>
 662       <accept condition="ARMv6-M Device"/>
 663       <accept condition="ARMv7-M Device"/>
 664       <accept condition="ARMv8-M Device"/>
 665     </condition>
 666
 667     <!-- ARM core -->
 668     <condition id="CM0">
 669       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 670       <accept Dcore="Cortex-M0"/>
 671       <accept Dcore="Cortex-M0+"/>
 672       <accept Dcore="SC000"/>
 673     </condition>
 674     <condition id="CM3">
 675       <description>Cortex-M3 or SC300 processor based device</description>
 676       <accept Dcore="Cortex-M3"/>
 677       <accept Dcore="SC300"/>
 678     </condition>
 679     <condition id="CM4">
 680       <description>Cortex-M4 processor based device</description>
 681       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 682     </condition>
 683     <condition id="CM4_FP">
 684       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 685       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 686     </condition>
 687     <condition id="CM7">
 688       <description>Cortex-M7 processor based device</description>
 689       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 690     </condition>
 691     <condition id="CM7_FP">
 692       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 693       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 694       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 695     </condition>
 696     <condition id="CM7_SP">
 697       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 698       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 699     </condition>
 700     <condition id="CM7_DP">
 701       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 702       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 703     </condition>
 704     <condition id="CM23">
 705       <description>Cortex-M23 processor based device</description>
 706       <require Dcore="Cortex-M23"/>
 707     </condition>
 708     <condition id="CM33">
 709       <description>Cortex-M33 processor based device</description>
 710       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 711     </condition>
 712     <condition id="CM33_FP">
 713       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 714       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 715     </condition>
 716     <condition id="ARMv8MBL">
 717       <description>ARMv8-M Baseline processor based device</description>
 718       <require Dcore="ARMV8MBL"/>
 719     </condition>
 720     <condition id="ARMv8MML">
 721       <description>ARMv8-M Mainline processor based device</description>
 722       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 723     </condition>
 724     <condition id="ARMv8MML_FP">
 725       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 726       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 727       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 728     </condition>
 729
 730     <condition id="CM33_NODSP_NOFPU">
 731       <description>CM33, no DSP, no FPU</description>
 732       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 733     </condition>
 734     <condition id="CM33_DSP_NOFPU">
 735       <description>CM33, DSP, no FPU</description>
 736       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 737     </condition>
 738     <condition id="CM33_NODSP_SP">
 739       <description>CM33, no DSP, SP FPU</description>
 740       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 741     </condition>
 742     <condition id="CM33_DSP_SP">
 743       <description>CM33, DSP, SP FPU</description>
 744       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 745     </condition>
 746
 747     <condition id="ARMv8MML_NODSP_NOFPU">
 748       <description>ARMv8MML, no DSP, no FPU</description>
 749       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 750     </condition>
 751     <condition id="ARMv8MML_DSP_NOFPU">
 752       <description>ARMv8MML, DSP, no FPU</description>
 753       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 754     </condition>
 755     <condition id="ARMv8MML_NODSP_SP">
 756       <description>ARMv8MML, no DSP, SP FPU</description>
 757       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 758     </condition>
 759     <condition id="ARMv8MML_DSP_SP">
 760       <description>ARMv8MML, DSP, SP FPU</description>
 761       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 762     </condition>
 763
 764     <!-- ARMCC compiler -->
 765     <condition id="CM0_ARMCC">
 766       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 767       <require condition="CM0"/>
 768       <require Tcompiler="ARMCC"/>
 769     </condition>
 770     <condition id="CM0_LE_ARMCC">
 771       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 772       <require condition="CM0_ARMCC"/>
 773       <require Dendian="Little-endian"/>
 774     </condition>
 775     <condition id="CM0_BE_ARMCC">
 776       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 777       <require condition="CM0_ARMCC"/>
 778       <require Dendian="Big-endian"/>
 779     </condition>
 780
 781     <condition id="CM3_ARMCC">
 782       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 783       <require condition="CM3"/>
 784       <require Tcompiler="ARMCC"/>
 785     </condition>
 786     <condition id="CM3_LE_ARMCC">
 787       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 788       <require condition="CM3_ARMCC"/>
 789       <require Dendian="Little-endian"/>
 790     </condition>
 791     <condition id="CM3_BE_ARMCC">
 792       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 793       <require condition="CM3_ARMCC"/>
 794       <require Dendian="Big-endian"/>
 795     </condition>
 796
 797     <condition id="CM4_ARMCC">
 798       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 799       <require condition="CM4"/>
 800       <require Tcompiler="ARMCC"/>
 801     </condition>
 802     <condition id="CM4_LE_ARMCC">
 803       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 804       <require condition="CM4_ARMCC"/>
 805       <require Dendian="Little-endian"/>
 806     </condition>
 807     <condition id="CM4_BE_ARMCC">
 808       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 809       <require condition="CM4_ARMCC"/>
 810       <require Dendian="Big-endian"/>
 811     </condition>
 812
 813     <condition id="CM4_FP_ARMCC">
 814       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 815       <require condition="CM4_FP"/>
 816       <require Tcompiler="ARMCC"/>
 817     </condition>
 818     <condition id="CM4_FP_LE_ARMCC">
 819       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 820       <require condition="CM4_FP_ARMCC"/>
 821       <require Dendian="Little-endian"/>
 822     </condition>
 823     <condition id="CM4_FP_BE_ARMCC">
 824       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 825       <require condition="CM4_FP_ARMCC"/>
 826       <require Dendian="Big-endian"/>
 827     </condition>
 828
 829     <!-- XMC 4000 Series devices from Infineon require a special library -->
 830     <condition id="CM4_LE_ARMCC_STD">
 831       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 832       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 833       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 834       <require Tcompiler="ARMCC"/>
 835     </condition>
 836     <condition id="CM4_LE_ARMCC_IFX">
 837       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 838       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 839       <require Tcompiler="ARMCC"/>
 840     </condition>
 841     <condition id="CM4_FP_LE_ARMCC_STD">
 842       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 843       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 844       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 845       <require Tcompiler="ARMCC"/>
 846     </condition>
 847     <condition id="CM4_FP_LE_ARMCC_IFX">
 848       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 849       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 850       <require Tcompiler="ARMCC"/>
 851     </condition>
 852
 853     <condition id="CM7_ARMCC">
 854       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 855       <require condition="CM7"/>
 856       <require Tcompiler="ARMCC"/>
 857     </condition>
 858     <condition id="CM7_LE_ARMCC">
 859       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 860       <require condition="CM7_ARMCC"/>
 861       <require Dendian="Little-endian"/>
 862     </condition>
 863     <condition id="CM7_BE_ARMCC">
 864       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 865       <require condition="CM7_ARMCC"/>
 866       <require Dendian="Big-endian"/>
 867     </condition>
 868
 869     <condition id="CM7_FP_ARMCC">
 870       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 871       <require condition="CM7_FP"/>
 872       <require Tcompiler="ARMCC"/>
 873     </condition>
 874     <condition id="CM7_FP_LE_ARMCC">
 875       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 876       <require condition="CM7_FP_ARMCC"/>
 877       <require Dendian="Little-endian"/>
 878     </condition>
 879     <condition id="CM7_FP_BE_ARMCC">
 880       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 881       <require condition="CM7_FP_ARMCC"/>
 882       <require Dendian="Big-endian"/>
 883     </condition>
 884
 885     <condition id="CM7_SP_ARMCC">
 886       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 887       <require condition="CM7_SP"/>
 888       <require Tcompiler="ARMCC"/>
 889     </condition>
 890     <condition id="CM7_SP_LE_ARMCC">
 891       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 892       <require condition="CM7_SP_ARMCC"/>
 893       <require Dendian="Little-endian"/>
 894     </condition>
 895     <condition id="CM7_SP_BE_ARMCC">
 896       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 897       <require condition="CM7_SP_ARMCC"/>
 898       <require Dendian="Big-endian"/>
 899     </condition>
 900
 901     <condition id="CM7_DP_ARMCC">
 902       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 903       <require condition="CM7_DP"/>
 904       <require Tcompiler="ARMCC"/>
 905     </condition>
 906     <condition id="CM7_DP_LE_ARMCC">
 907       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 908       <require condition="CM7_DP_ARMCC"/>
 909       <require Dendian="Little-endian"/>
 910     </condition>
 911     <condition id="CM7_DP_BE_ARMCC">
 912       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 913       <require condition="CM7_DP_ARMCC"/>
 914       <require Dendian="Big-endian"/>
 915     </condition>
 916
 917     <condition id="CM23_ARMCC">
 918       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 919       <require condition="CM23"/>
 920       <require Tcompiler="ARMCC"/>
 921     </condition>
 922     <condition id="CM23_LE_ARMCC">
 923       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 924       <require condition="CM23_ARMCC"/>
 925       <require Dendian="Little-endian"/>
 926     </condition>
 927     <condition id="CM23_BE_ARMCC">
 928       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 929       <require condition="CM23_ARMCC"/>
 930       <require Dendian="Big-endian"/>
 931     </condition>
 932
 933     <condition id="CM33_ARMCC">
 934       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 935       <require condition="CM33"/>
 936       <require Tcompiler="ARMCC"/>
 937     </condition>
 938     <condition id="CM33_LE_ARMCC">
 939       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 940       <require condition="CM33_ARMCC"/>
 941       <require Dendian="Little-endian"/>
 942     </condition>
 943     <condition id="CM33_BE_ARMCC">
 944       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 945       <require condition="CM33_ARMCC"/>
 946       <require Dendian="Big-endian"/>
 947     </condition>
 948
 949     <condition id="CM33_FP_ARMCC">
 950       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 951       <require condition="CM33_FP"/>
 952       <require Tcompiler="ARMCC"/>
 953     </condition>
 954     <condition id="CM33_FP_LE_ARMCC">
 955       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 956       <require condition="CM33_FP_ARMCC"/>
 957       <require Dendian="Little-endian"/>
 958     </condition>
 959     <condition id="CM33_FP_BE_ARMCC">
 960       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 961       <require condition="CM33_FP_ARMCC"/>
 962       <require Dendian="Big-endian"/>
 963     </condition>
 964
 965     <condition id="CM33_NODSP_NOFPU_ARMCC">
 966       <description>CM33, no DSP, no FPU, ARM Compiler</description>
 967       <require condition="CM33_NODSP_NOFPU"/>
 968       <require Tcompiler="ARMCC"/>
 969     </condition>
 970     <condition id="CM33_DSP_NOFPU_ARMCC">
 971       <description>CM33, DSP, no FPU, ARM Compiler</description>
 972       <require condition="CM33_DSP_NOFPU"/>
 973       <require Tcompiler="ARMCC"/>
 974     </condition>
 975     <condition id="CM33_NODSP_SP_ARMCC">
 976       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
 977       <require condition="CM33_NODSP_SP"/>
 978       <require Tcompiler="ARMCC"/>
 979     </condition>
 980     <condition id="CM33_DSP_SP_ARMCC">
 981       <description>CM33, DSP, SP FPU, ARM Compiler</description>
 982       <require condition="CM33_DSP_SP"/>
 983       <require Tcompiler="ARMCC"/>
 984     </condition>
 985     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
 986       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
 987       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
 988       <require Dendian="Little-endian"/>
 989     </condition>
 990     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
 991       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
 992       <require condition="CM33_DSP_NOFPU_ARMCC"/>
 993       <require Dendian="Little-endian"/>
 994     </condition>
 995     <condition id="CM33_NODSP_SP_LE_ARMCC">
 996       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
 997       <require condition="CM33_NODSP_SP_ARMCC"/>
 998       <require Dendian="Little-endian"/>
 999     </condition>
1000     <condition id="CM33_DSP_SP_LE_ARMCC">
1001       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1002       <require condition="CM33_DSP_SP_ARMCC"/>
1003       <require Dendian="Little-endian"/>
1004     </condition>
1005
1006     <condition id="ARMv8MBL_ARMCC">
1007       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1008       <require condition="ARMv8MBL"/>
1009       <require Tcompiler="ARMCC"/>
1010     </condition>
1011     <condition id="ARMv8MBL_LE_ARMCC">
1012       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1013       <require condition="ARMv8MBL_ARMCC"/>
1014       <require Dendian="Little-endian"/>
1015     </condition>
1016     <condition id="ARMv8MBL_BE_ARMCC">
1017       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1018       <require condition="ARMv8MBL_ARMCC"/>
1019       <require Dendian="Big-endian"/>
1020     </condition>
1021
1022     <condition id="ARMv8MML_ARMCC">
1023       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1024       <require condition="ARMv8MML"/>
1025       <require Tcompiler="ARMCC"/>
1026     </condition>
1027     <condition id="ARMv8MML_LE_ARMCC">
1028       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1029       <require condition="ARMv8MML_ARMCC"/>
1030       <require Dendian="Little-endian"/>
1031     </condition>
1032     <condition id="ARMv8MML_BE_ARMCC">
1033       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1034       <require condition="ARMv8MML_ARMCC"/>
1035       <require Dendian="Big-endian"/>
1036     </condition>
1037
1038     <condition id="ARMv8MML_FP_ARMCC">
1039       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1040       <require condition="ARMv8MML_FP"/>
1041       <require Tcompiler="ARMCC"/>
1042     </condition>
1043     <condition id="ARMv8MML_FP_LE_ARMCC">
1044       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1045       <require condition="ARMv8MML_FP_ARMCC"/>
1046       <require Dendian="Little-endian"/>
1047     </condition>
1048     <condition id="ARMv8MML_FP_BE_ARMCC">
1049       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1050       <require condition="ARMv8MML_FP_ARMCC"/>
1051       <require Dendian="Big-endian"/>
1052     </condition>
1053
1054     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1055       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1056       <require condition="ARMv8MML_NODSP_NOFPU"/>
1057       <require Tcompiler="ARMCC"/>
1058     </condition>
1059     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1060       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1061       <require condition="ARMv8MML_DSP_NOFPU"/>
1062       <require Tcompiler="ARMCC"/>
1063     </condition>
1064     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1065       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1066       <require condition="ARMv8MML_NODSP_SP"/>
1067       <require Tcompiler="ARMCC"/>
1068     </condition>
1069     <condition id="ARMv8MML_DSP_SP_ARMCC">
1070       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1071       <require condition="ARMv8MML_DSP_SP"/>
1072       <require Tcompiler="ARMCC"/>
1073     </condition>
1074     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1075       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1076       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1077       <require Dendian="Little-endian"/>
1078     </condition>
1079     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1080       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1081       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1082       <require Dendian="Little-endian"/>
1083     </condition>
1084     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1085       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1086       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1087       <require Dendian="Little-endian"/>
1088     </condition>
1089     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1090       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1091       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1092       <require Dendian="Little-endian"/>
1093     </condition>
1094
1095     <!-- GCC compiler -->
1096     <condition id="CM0_GCC">
1097       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1098       <require condition="CM0"/>
1099       <require Tcompiler="GCC"/>
1100     </condition>
1101     <condition id="CM0_LE_GCC">
1102       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1103       <require condition="CM0_GCC"/>
1104       <require Dendian="Little-endian"/>
1105     </condition>
1106     <condition id="CM0_BE_GCC">
1107       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1108       <require condition="CM0_GCC"/>
1109       <require Dendian="Big-endian"/>
1110     </condition>
1111
1112     <condition id="CM3_GCC">
1113       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1114       <require condition="CM3"/>
1115       <require Tcompiler="GCC"/>
1116     </condition>
1117     <condition id="CM3_LE_GCC">
1118       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1119       <require condition="CM3_GCC"/>
1120       <require Dendian="Little-endian"/>
1121     </condition>
1122     <condition id="CM3_BE_GCC">
1123       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1124       <require condition="CM3_GCC"/>
1125       <require Dendian="Big-endian"/>
1126     </condition>
1127
1128     <condition id="CM4_GCC">
1129       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1130       <require condition="CM4"/>
1131       <require Tcompiler="GCC"/>
1132     </condition>
1133     <condition id="CM4_LE_GCC">
1134       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1135       <require condition="CM4_GCC"/>
1136       <require Dendian="Little-endian"/>
1137     </condition>
1138     <condition id="CM4_BE_GCC">
1139       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1140       <require condition="CM4_GCC"/>
1141       <require Dendian="Big-endian"/>
1142     </condition>
1143
1144     <condition id="CM4_FP_GCC">
1145       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1146       <require condition="CM4_FP"/>
1147       <require Tcompiler="GCC"/>
1148     </condition>
1149     <condition id="CM4_FP_LE_GCC">
1150       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1151       <require condition="CM4_FP_GCC"/>
1152       <require Dendian="Little-endian"/>
1153     </condition>
1154     <condition id="CM4_FP_BE_GCC">
1155       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1156       <require condition="CM4_FP_GCC"/>
1157       <require Dendian="Big-endian"/>
1158     </condition>
1159
1160     <!-- XMC 4000 Series devices from Infineon require a special library -->
1161     <condition id="CM4_LE_GCC_STD">
1162       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1163       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1164       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1165       <require Tcompiler="GCC"/>
1166     </condition>
1167     <condition id="CM4_LE_GCC_IFX">
1168       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1169       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1170       <require Tcompiler="GCC"/>
1171     </condition>
1172     <condition id="CM4_FP_LE_GCC_STD">
1173       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1174       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1175       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1176       <require Tcompiler="GCC"/>
1177     </condition>
1178     <condition id="CM4_FP_LE_GCC_IFX">
1179       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1180       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1181       <require Tcompiler="GCC"/>
1182     </condition>
1183
1184     <condition id="CM7_GCC">
1185       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1186       <require condition="CM7"/>
1187       <require Tcompiler="GCC"/>
1188     </condition>
1189     <condition id="CM7_LE_GCC">
1190       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1191       <require condition="CM7_GCC"/>
1192       <require Dendian="Little-endian"/>
1193     </condition>
1194     <condition id="CM7_BE_GCC">
1195       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1196       <require condition="CM7_GCC"/>
1197       <require Dendian="Big-endian"/>
1198     </condition>
1199
1200     <condition id="CM7_FP_GCC">
1201       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1202       <require condition="CM7_FP"/>
1203       <require Tcompiler="GCC"/>
1204     </condition>
1205     <condition id="CM7_FP_LE_GCC">
1206       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1207       <require condition="CM7_FP_GCC"/>
1208       <require Dendian="Little-endian"/>
1209     </condition>
1210     <condition id="CM7_FP_BE_GCC">
1211       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1212       <require condition="CM7_FP_GCC"/>
1213       <require Dendian="Big-endian"/>
1214     </condition>
1215
1216     <condition id="CM7_SP_GCC">
1217       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1218       <require condition="CM7_SP"/>
1219       <require Tcompiler="GCC"/>
1220     </condition>
1221     <condition id="CM7_SP_LE_GCC">
1222       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1223       <require condition="CM7_SP_GCC"/>
1224       <require Dendian="Little-endian"/>
1225     </condition>
1226     <condition id="CM7_SP_BE_GCC">
1227       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1228       <require condition="CM7_SP_GCC"/>
1229       <require Dendian="Big-endian"/>
1230     </condition>
1231
1232     <condition id="CM7_DP_GCC">
1233       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1234       <require condition="CM7_DP"/>
1235       <require Tcompiler="GCC"/>
1236     </condition>
1237     <condition id="CM7_DP_LE_GCC">
1238       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1239       <require condition="CM7_DP_GCC"/>
1240       <require Dendian="Little-endian"/>
1241     </condition>
1242     <condition id="CM7_DP_BE_GCC">
1243       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1244       <require condition="CM7_DP_GCC"/>
1245       <require Dendian="Big-endian"/>
1246     </condition>
1247
1248     <condition id="CM23_GCC">
1249       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1250       <require condition="CM23"/>
1251       <require Tcompiler="GCC"/>
1252     </condition>
1253     <condition id="CM23_LE_GCC">
1254       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1255       <require condition="CM23_GCC"/>
1256       <require Dendian="Little-endian"/>
1257     </condition>
1258     <condition id="CM23_BE_GCC">
1259       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1260       <require condition="CM23_GCC"/>
1261       <require Dendian="Big-endian"/>
1262     </condition>
1263
1264     <condition id="CM33_GCC">
1265       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1266       <require condition="CM33"/>
1267       <require Tcompiler="GCC"/>
1268     </condition>
1269     <condition id="CM33_LE_GCC">
1270       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1271       <require condition="CM33_GCC"/>
1272       <require Dendian="Little-endian"/>
1273     </condition>
1274     <condition id="CM33_BE_GCC">
1275       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1276       <require condition="CM33_GCC"/>
1277       <require Dendian="Big-endian"/>
1278     </condition>
1279
1280     <condition id="CM33_FP_GCC">
1281       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1282       <require condition="CM33_FP"/>
1283       <require Tcompiler="GCC"/>
1284     </condition>
1285     <condition id="CM33_FP_LE_GCC">
1286       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1287       <require condition="CM33_FP_GCC"/>
1288       <require Dendian="Little-endian"/>
1289     </condition>
1290     <condition id="CM33_FP_BE_GCC">
1291       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1292       <require condition="CM33_FP_GCC"/>
1293       <require Dendian="Big-endian"/>
1294     </condition>
1295
1296     <condition id="CM33_NODSP_NOFPU_GCC">
1297       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1298       <require condition="CM33_NODSP_NOFPU"/>
1299       <require Tcompiler="GCC"/>
1300     </condition>
1301     <condition id="CM33_DSP_NOFPU_GCC">
1302       <description>CM33, DSP, no FPU, GCC Compiler</description>
1303       <require condition="CM33_DSP_NOFPU"/>
1304       <require Tcompiler="GCC"/>
1305     </condition>
1306     <condition id="CM33_NODSP_SP_GCC">
1307       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1308       <require condition="CM33_NODSP_SP"/>
1309       <require Tcompiler="GCC"/>
1310     </condition>
1311     <condition id="CM33_DSP_SP_GCC">
1312       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1313       <require condition="CM33_DSP_SP"/>
1314       <require Tcompiler="GCC"/>
1315     </condition>
1316     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1317       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1318       <require condition="CM33_NODSP_NOFPU_GCC"/>
1319       <require Dendian="Little-endian"/>
1320     </condition>
1321     <condition id="CM33_DSP_NOFPU_LE_GCC">
1322       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1323       <require condition="CM33_DSP_NOFPU_GCC"/>
1324       <require Dendian="Little-endian"/>
1325     </condition>
1326     <condition id="CM33_NODSP_SP_LE_GCC">
1327       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1328       <require condition="CM33_NODSP_SP_GCC"/>
1329       <require Dendian="Little-endian"/>
1330     </condition>
1331     <condition id="CM33_DSP_SP_LE_GCC">
1332       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1333       <require condition="CM33_DSP_SP_GCC"/>
1334       <require Dendian="Little-endian"/>
1335     </condition>
1336
1337     <condition id="ARMv8MBL_GCC">
1338       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1339       <require condition="ARMv8MBL"/>
1340       <require Tcompiler="GCC"/>
1341     </condition>
1342     <condition id="ARMv8MBL_LE_GCC">
1343       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1344       <require condition="ARMv8MBL_GCC"/>
1345       <require Dendian="Little-endian"/>
1346     </condition>
1347     <condition id="ARMv8MBL_BE_GCC">
1348       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1349       <require condition="ARMv8MBL_GCC"/>
1350       <require Dendian="Big-endian"/>
1351     </condition>
1352
1353     <condition id="ARMv8MML_GCC">
1354       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1355       <require condition="ARMv8MML"/>
1356       <require Tcompiler="GCC"/>
1357     </condition>
1358     <condition id="ARMv8MML_LE_GCC">
1359       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1360       <require condition="ARMv8MML_GCC"/>
1361       <require Dendian="Little-endian"/>
1362     </condition>
1363     <condition id="ARMv8MML_BE_GCC">
1364       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1365       <require condition="ARMv8MML_GCC"/>
1366       <require Dendian="Big-endian"/>
1367     </condition>
1368
1369     <condition id="ARMv8MML_FP_GCC">
1370       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1371       <require condition="ARMv8MML_FP"/>
1372       <require Tcompiler="GCC"/>
1373     </condition>
1374     <condition id="ARMv8MML_FP_LE_GCC">
1375       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1376       <require condition="ARMv8MML_FP_GCC"/>
1377       <require Dendian="Little-endian"/>
1378     </condition>
1379     <condition id="ARMv8MML_FP_BE_GCC">
1380       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1381       <require condition="ARMv8MML_FP_GCC"/>
1382       <require Dendian="Big-endian"/>
1383     </condition>
1384
1385     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1386       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1387       <require condition="ARMv8MML_NODSP_NOFPU"/>
1388       <require Tcompiler="GCC"/>
1389     </condition>
1390     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1391       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1392       <require condition="ARMv8MML_DSP_NOFPU"/>
1393       <require Tcompiler="GCC"/>
1394     </condition>
1395     <condition id="ARMv8MML_NODSP_SP_GCC">
1396       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1397       <require condition="ARMv8MML_NODSP_SP"/>
1398       <require Tcompiler="GCC"/>
1399     </condition>
1400     <condition id="ARMv8MML_DSP_SP_GCC">
1401       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1402       <require condition="ARMv8MML_DSP_SP"/>
1403       <require Tcompiler="GCC"/>
1404     </condition>
1405     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1406       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1407       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1408       <require Dendian="Little-endian"/>
1409     </condition>
1410     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1411       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1412       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1413       <require Dendian="Little-endian"/>
1414     </condition>
1415     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1416       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1417       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1418       <require Dendian="Little-endian"/>
1419     </condition>
1420     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1421       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1422       <require condition="ARMv8MML_DSP_SP_GCC"/>
1423       <require Dendian="Little-endian"/>
1424     </condition>
1425
1426     <!-- IAR compiler -->
1427     <condition id="CM0_IAR">
1428       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1429       <require condition="CM0"/>
1430       <require Tcompiler="IAR"/>
1431     </condition>
1432     <condition id="CM0_LE_IAR">
1433       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1434       <require condition="CM0_IAR"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437     <condition id="CM0_BE_IAR">
1438       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1439       <require condition="CM0_IAR"/>
1440       <require Dendian="Big-endian"/>
1441     </condition>
1442
1443     <condition id="CM3_IAR">
1444       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1445       <require condition="CM3"/>
1446       <require Tcompiler="IAR"/>
1447     </condition>
1448     <condition id="CM3_LE_IAR">
1449       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1450       <require condition="CM3_IAR"/>
1451       <require Dendian="Little-endian"/>
1452     </condition>
1453     <condition id="CM3_BE_IAR">
1454       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1455       <require condition="CM3_IAR"/>
1456       <require Dendian="Big-endian"/>
1457     </condition>
1458
1459     <condition id="CM4_IAR">
1460       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1461       <require condition="CM4"/>
1462       <require Tcompiler="IAR"/>
1463     </condition>
1464     <condition id="CM4_LE_IAR">
1465       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1466       <require condition="CM4_IAR"/>
1467       <require Dendian="Little-endian"/>
1468     </condition>
1469     <condition id="CM4_BE_IAR">
1470       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1471       <require condition="CM4_IAR"/>
1472       <require Dendian="Big-endian"/>
1473     </condition>
1474
1475     <condition id="CM4_FP_IAR">
1476       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1477       <require condition="CM4_FP"/>
1478       <require Tcompiler="IAR"/>
1479     </condition>
1480     <condition id="CM4_FP_LE_IAR">
1481       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1482       <require condition="CM4_FP_IAR"/>
1483       <require Dendian="Little-endian"/>
1484     </condition>
1485     <condition id="CM4_FP_BE_IAR">
1486       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1487       <require condition="CM4_FP_IAR"/>
1488       <require Dendian="Big-endian"/>
1489     </condition>
1490
1491     <condition id="CM7_IAR">
1492       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1493       <require condition="CM7"/>
1494       <require Tcompiler="IAR"/>
1495     </condition>
1496     <condition id="CM7_LE_IAR">
1497       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1498       <require condition="CM7_IAR"/>
1499       <require Dendian="Little-endian"/>
1500     </condition>
1501     <condition id="CM7_BE_IAR">
1502       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1503       <require condition="CM7_IAR"/>
1504       <require Dendian="Big-endian"/>
1505     </condition>
1506
1507     <condition id="CM7_FP_IAR">
1508       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1509       <require condition="CM7_FP"/>
1510       <require Tcompiler="IAR"/>
1511     </condition>
1512     <condition id="CM7_FP_LE_IAR">
1513       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1514       <require condition="CM7_FP_IAR"/>
1515       <require Dendian="Little-endian"/>
1516     </condition>
1517     <condition id="CM7_FP_BE_IAR">
1518       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1519       <require condition="CM7_FP_IAR"/>
1520       <require Dendian="Big-endian"/>
1521     </condition>
1522
1523     <condition id="CM7_SP_IAR">
1524       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1525       <require condition="CM7_SP"/>
1526       <require Tcompiler="IAR"/>
1527     </condition>
1528     <condition id="CM7_SP_LE_IAR">
1529       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1530       <require condition="CM7_SP_IAR"/>
1531       <require Dendian="Little-endian"/>
1532     </condition>
1533     <condition id="CM7_SP_BE_IAR">
1534       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1535       <require condition="CM7_SP_IAR"/>
1536       <require Dendian="Big-endian"/>
1537     </condition>
1538
1539     <condition id="CM7_DP_IAR">
1540       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1541       <require condition="CM7_DP"/>
1542       <require Tcompiler="IAR"/>
1543     </condition>
1544     <condition id="CM7_DP_LE_IAR">
1545       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1546       <require condition="CM7_DP_IAR"/>
1547       <require Dendian="Little-endian"/>
1548     </condition>
1549     <condition id="CM7_DP_BE_IAR">
1550       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1551       <require condition="CM7_DP_IAR"/>
1552       <require Dendian="Big-endian"/>
1553     </condition>
1554
1555     <!-- conditions selecting single devices and CMSIS Core -->
1556     <!-- used for component startup, GCC version is used for C-Startup -->
1557     <condition id="ARMCM0 CMSIS">
1558       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1559       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1560       <require Cclass="CMSIS" Cgroup="CORE"/>
1561     </condition>
1562     <condition id="ARMCM0 CMSIS GCC">
1563       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1564       <require condition="ARMCM0 CMSIS"/>
1565       <require condition="GCC"/>
1566     </condition>
1567
1568     <condition id="ARMCM0+ CMSIS">
1569       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1570       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1571       <require Cclass="CMSIS" Cgroup="CORE"/>
1572     </condition>
1573     <condition id="ARMCM0+ CMSIS GCC">
1574       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1575       <require condition="ARMCM0+ CMSIS"/>
1576       <require condition="GCC"/>
1577     </condition>
1578
1579     <condition id="ARMCM3 CMSIS">
1580       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1581       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1582       <require Cclass="CMSIS" Cgroup="CORE"/>
1583     </condition>
1584     <condition id="ARMCM3 CMSIS GCC">
1585       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1586       <require condition="ARMCM3 CMSIS"/>
1587       <require condition="GCC"/>
1588     </condition>
1589
1590     <condition id="ARMCM4 CMSIS">
1591       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1592       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1593       <require Cclass="CMSIS" Cgroup="CORE"/>
1594     </condition>
1595     <condition id="ARMCM4 CMSIS GCC">
1596       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1597       <require condition="ARMCM4 CMSIS"/>
1598       <require condition="GCC"/>
1599     </condition>
1600
1601     <condition id="ARMCM7 CMSIS">
1602       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1603       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1604       <require Cclass="CMSIS" Cgroup="CORE"/>
1605     </condition>
1606     <condition id="ARMCM7 CMSIS GCC">
1607       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1608       <require condition="ARMCM7 CMSIS"/>
1609       <require condition="GCC"/>
1610     </condition>
1611
1612     <condition id="ARMCM23 CMSIS">
1613       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1614       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1615       <require Cclass="CMSIS" Cgroup="CORE"/>
1616     </condition>
1617     <condition id="ARMCM23 CMSIS GCC">
1618       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1619       <require condition="ARMCM23 CMSIS"/>
1620       <require condition="GCC"/>
1621     </condition>
1622
1623     <condition id="ARMCM33 CMSIS">
1624       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1625       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1626       <require Cclass="CMSIS" Cgroup="CORE"/>
1627     </condition>
1628     <condition id="ARMCM33 CMSIS GCC">
1629       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1630       <require condition="ARMCM33 CMSIS"/>
1631       <require condition="GCC"/>
1632     </condition>
1633
1634     <condition id="ARMSC000 CMSIS">
1635       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1636       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1637       <require Cclass="CMSIS" Cgroup="CORE"/>
1638     </condition>
1639     <condition id="ARMSC000 CMSIS GCC">
1640       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1641       <require condition="ARMSC000 CMSIS"/>
1642       <require condition="GCC"/>
1643     </condition>
1644
1645     <condition id="ARMSC300 CMSIS">
1646       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1647       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1648       <require Cclass="CMSIS" Cgroup="CORE"/>
1649     </condition>
1650     <condition id="ARMSC300 CMSIS GCC">
1651       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1652       <require condition="ARMSC300 CMSIS"/>
1653       <require condition="GCC"/>
1654     </condition>
1655
1656     <condition id="ARMv8MBL CMSIS">
1657       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1658       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1659       <require Cclass="CMSIS" Cgroup="CORE"/>
1660     </condition>
1661     <condition id="ARMv8MBL CMSIS GCC">
1662       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1663       <require condition="ARMv8MBL CMSIS"/>
1664       <require condition="GCC"/>
1665     </condition>
1666
1667     <condition id="ARMv8MML CMSIS">
1668       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1669       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1670       <require Cclass="CMSIS" Cgroup="CORE"/>
1671     </condition>
1672     <condition id="ARMv8MML CMSIS GCC">
1673       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1674       <require condition="ARMv8MML CMSIS"/>
1675       <require condition="GCC"/>
1676     </condition>
1677
1678     <!-- CMSIS DSP -->
1679     <condition id="CMSIS DSP">
1680       <description>Components required for DSP</description>
1681       <require condition="ARMv6_7_8-M Device"/>
1682       <require condition="ARMCC GCC"/>
1683       <require Cclass="CMSIS" Cgroup="CORE"/>
1684     </condition>
1685
1686     <!-- RTOS RTX -->
1687     <condition id="RTOS RTX">
1688       <description>Components required for RTOS RTX</description>
1689       <require condition="ARMv6_7-M Device"/>
1690       <require condition="ARMCC GCC IAR"/>
1691       <require Cclass="Device" Cgroup="Startup"/>
1692       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1693     </condition>
1694     <condition id="RTOS RTX5">
1695       <description>Components required for RTOS RTX5</description>
1696       <require condition="ARMv6_7_8-M Device"/>
1697       <require condition="ARMCC GCC IAR"/>
1698       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1699     </condition>
1700     <condition id="RTOS2 RTX5">
1701       <description>Components required for RTOS2 RTX5</description>
1702       <require condition="ARMv6_7_8-M Device"/>
1703       <require condition="ARMCC GCC IAR"/>
1704       <require Cclass="CMSIS"  Cgroup="CORE"/>
1705       <require Cclass="Device" Cgroup="Startup"/>
1706     </condition>
1707     <condition id="RTOS2 RTX5 NS">
1708       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1709       <require condition="ARMv8-M TZ Device"/>
1710       <require condition="ARMCC GCC"/>
1711       <require Cclass="CMSIS"  Cgroup="CORE"/>
1712       <require Cclass="Device" Cgroup="Startup"/>
1713     </condition>
1714
1715   </conditions>
1716
1717   <components>
1718     <!-- CMSIS-Core component -->
1719     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0"  condition="ARMv6_7_8-M Device" >
1720       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1721       <files>
1722         <!-- CPU independent -->
1723         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1724         <file category="include" name="CMSIS/Include/"/>
1725         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1726         <!-- Code template -->
1727         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1728         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1729       </files>
1730     </component>
1731
1732     <!-- CMSIS-Startup components -->
1733     <!-- Cortex-M0 -->
1734     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1735       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1736       <files>
1737         <!-- include folder / device header file -->
1738         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1739         <!-- startup / system file -->
1740         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1741         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1742         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1743         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1744         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1745       </files>
1746     </component>
1747     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1748       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1749       <files>
1750         <!-- include folder / device header file -->
1751         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1752         <!-- startup / system file -->
1753         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1754         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1755         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1756       </files>
1757     </component>
1758
1759     <!-- Cortex-M0+ -->
1760     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1761       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1762       <files>
1763         <!-- include folder / device header file -->
1764         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1765         <!-- startup / system file -->
1766         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1767         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1768         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1769         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1770         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1771       </files>
1772     </component>
1773     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1774       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1775       <files>
1776         <!-- include folder / device header file -->
1777         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1778         <!-- startup / system file -->
1779         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1780         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1781         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1782       </files>
1783     </component>
1784
1785     <!-- Cortex-M3 -->
1786     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1787       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1788       <files>
1789         <!-- include folder / device header file -->
1790         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1791         <!-- startup / system file -->
1792         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1793         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1794         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1795         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1796         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1797       </files>
1798     </component>
1799     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1800       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1801       <files>
1802         <!-- include folder / device header file -->
1803         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1804         <!-- startup / system file -->
1805         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1806         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1807         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1808       </files>
1809     </component>
1810
1811     <!-- Cortex-M4 -->
1812     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1813       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1814       <files>
1815         <!-- include folder / device header file -->
1816         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1817         <!-- startup / system file -->
1818         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1819         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1820         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1821         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1822         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1823       </files>
1824     </component>
1825     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1826       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1827       <files>
1828         <!-- include folder / device header file -->
1829         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1830         <!-- startup / system file -->
1831         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1832         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1833         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1834       </files>
1835     </component>
1836
1837     <!-- Cortex-M7 -->
1838     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1839       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1840       <files>
1841         <!-- include folder / device header file -->
1842         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1843         <!-- startup / system file -->
1844         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1845         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1846         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1847         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1848         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1849       </files>
1850     </component>
1851     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1852       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1853       <files>
1854         <!-- include folder / device header file -->
1855         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1856         <!-- startup / system file -->
1857         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1858         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1859         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1860       </files>
1861     </component>
1862
1863     <!-- Cortex-M23 -->
1864     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1865       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1866       <files>
1867         <!-- include folder / device header file -->
1868         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1869         <!-- startup / system file -->
1870         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1871         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1872         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1873         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1874         <!-- SAU configuration -->
1875         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1876       </files>
1877     </component>
1878     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1879       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1880       <files>
1881         <!-- include folder / device header file -->
1882         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1883         <!-- startup / system file -->
1884         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1885         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1886         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1887         <!-- SAU configuration -->
1888         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1889       </files>
1890     </component>
1891
1892     <!-- Cortex-M33 -->
1893     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
1894       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1895       <files>
1896         <!-- include folder / device header file -->
1897         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1898         <!-- startup / system file -->
1899         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
1900         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
1901         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1902         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
1903         <!-- SAU configuration -->
1904         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1905       </files>
1906     </component>
1907     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
1908       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1909       <files>
1910         <!-- include folder / device header file -->
1911         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1912         <!-- startup / system file -->
1913         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
1914         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1915         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
1916         <!-- SAU configuration -->
1917         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1918       </files>
1919     </component>
1920
1921     <!-- Cortex-SC000 -->
1922     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
1923       <description>System and Startup for Generic ARM SC000 device</description>
1924       <files>
1925         <!-- include folder / device header file -->
1926         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1927         <!-- startup / system file -->
1928         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1929         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1930         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1931         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1932         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1933       </files>
1934     </component>
1935     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1936       <description>System and Startup for Generic ARM SC000 device</description>
1937       <files>
1938         <!-- include folder / device header file -->
1939         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1940         <!-- startup / system file -->
1941         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1942         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1943         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1944       </files>
1945     </component>
1946
1947     <!-- Cortex-SC300 -->
1948     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
1949       <description>System and Startup for Generic ARM SC300 device</description>
1950       <files>
1951         <!-- include folder / device header file -->
1952         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1953         <!-- startup / system file -->
1954         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1955         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1956         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1957         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1958         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1959       </files>
1960     </component>
1961     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1962       <description>System and Startup for Generic ARM SC300 device</description>
1963       <files>
1964         <!-- include folder / device header file -->
1965         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1966         <!-- startup / system file -->
1967         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1968         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1969         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1970       </files>
1971     </component>
1972
1973     <!-- ARMv8MBL -->
1974     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1975       <description>System and Startup for Generic ARM ARMv8MBL device</description>
1976       <files>
1977         <!-- include folder / device header file -->
1978         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
1979         <!-- startup / system file -->
1980         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1981         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1982         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1983         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1984         <!-- SAU configuration -->
1985         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1986       </files>
1987     </component>
1988     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1989       <description>System and Startup for Generic ARM ARMv8MBL device</description>
1990       <files>
1991         <!-- include folder / device header file -->
1992         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
1993         <!-- startup / system file -->
1994         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1995         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1996         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
1997         <!-- SAU configuration -->
1998         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1999       </files>
2000     </component>
2001
2002     <!-- ARMv8MML -->
2003     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2004       <description>System and Startup for Generic ARM ARMv8MML device</description>
2005       <files>
2006         <!-- include folder / device header file -->
2007         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2008         <!-- startup / system file -->
2009         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2010         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2011         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2012         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2013         <!-- SAU configuration -->
2014         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2015       </files>
2016     </component>
2017     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2018       <description>System and Startup for Generic ARM ARMv8MML device</description>
2019       <files>
2020         <!-- include folder / device header file -->
2021         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2022         <!-- startup / system file -->
2023         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2024         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2025         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2026         <!-- SAU configuration -->
2027         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2028       </files>
2029     </component>
2030
2031
2032     <!-- CMSIS-DSP component -->
2033     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.0" condition="CMSIS DSP">
2034       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2035       <files>
2036         <!-- CPU independent -->
2037         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2038         <file category="header" name="CMSIS/Include/arm_math.h"/>
2039
2040         <!-- CPU and Compiler dependent -->
2041         <!-- ARMCC -->
2042         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2043         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2044         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2045         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2046         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2047         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2048         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2049         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2050         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2051         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2052         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2053         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2054         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2055         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2056
2057         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2058         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2059         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2060         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2061         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2062         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2063         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2064         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2065         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2066         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2067         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2068         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2069
2070         <!-- GCC -->
2071         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2072         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2073         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2074         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2075         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2076         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2077         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2078
2079         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2080         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2081         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2082         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2083         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2084         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2085         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2086         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2087         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2088         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2089         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2090         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2091
2092       </files>
2093     </component>
2094
2095     <!-- CMSIS-RTOS Keil RTX component -->
2096     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
2097       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2098       <RTE_Components_h>
2099         <!-- the following content goes into file 'RTE_Components.h' -->
2100         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2101         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2102       </RTE_Components_h>
2103       <files>
2104         <!-- CPU independent -->
2105         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2106         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2107         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2108
2109         <!-- RTX templates -->
2110         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2111         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2112         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2113         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2114         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2115         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2116         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2117         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2118         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2119         <!-- tool-chain specific template file -->
2120         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2121         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2122         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2123
2124         <!-- CPU and Compiler dependent -->
2125         <!-- ARMCC -->
2126         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2127         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2128         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2129         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2130         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2131         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2132         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2133         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2134         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2135         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2136         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2137         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2138         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2139         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2140         <!-- GCC -->
2141         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2142         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2143         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2144         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2145         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2146         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2147         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2148         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2149         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2150         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2151         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2152         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2153         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2154         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2155         <!-- IAR -->
2156         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2157         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2158         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2159         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2160         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2161         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2162         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2163         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2164         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2165         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2166         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2167         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2168       </files>
2169     </component>
2170
2171     <!-- CMSIS-RTOS Keil RTX5 component -->
2172     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.1.0" Capiversion="1.0.0" condition="RTOS RTX5">
2173       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2174       <RTE_Components_h>
2175         <!-- the following content goes into file 'RTE_Components.h' -->
2176         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2177         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2178       </RTE_Components_h>
2179       <files>
2180         <!-- RTX header file -->
2181         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2182         <!-- RTX compatibility module for API V1 -->
2183         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2184       </files>
2185     </component>
2186
2187     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2188     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5">
2189       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2190       <RTE_Components_h>
2191         <!-- the following content goes into file 'RTE_Components.h' -->
2192         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2193         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2194       </RTE_Components_h>
2195       <files>
2196         <!-- RTX documentation -->
2197         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2198
2199         <!-- RTX header files -->
2200         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2201
2202         <!-- RTX configuration -->
2203         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2204         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2205
2206         <!-- RTX templates -->
2207         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2208         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2209         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2210         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2211         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2212         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2213         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2214         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2215         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2216
2217         <!-- RTX library configuration -->
2218         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2219
2220         <!-- RTX libraries (CPU and Compiler dependent) -->
2221         <!-- ARMCC -->
2222         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2223         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2224         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2225         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2226         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2227         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2228         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2229         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2230         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2231         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2232         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2233         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2234         <!-- GCC -->
2235         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2236         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2237         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2238         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2239         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2240         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2241         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2242         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2243         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2244         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2245         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2246         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2247         <!-- IAR -->
2248         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2249         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2250         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2251         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2252         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2253         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2254       </files>
2255     </component>
2256     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2257       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2258       <RTE_Components_h>
2259         <!-- the following content goes into file 'RTE_Components.h' -->
2260         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2261         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2262         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2263       </RTE_Components_h>
2264       <files>
2265         <!-- RTX documentation -->
2266         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2267
2268         <!-- RTX header files -->
2269         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2270
2271         <!-- RTX configuration -->
2272         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2273         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2274
2275         <!-- RTX templates -->
2276         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2277         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2278         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2279         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2280         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2281         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2282         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2283         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2284         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2285
2286         <!-- RTX library configuration -->
2287         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2288
2289         <!-- RTX libraries (CPU and Compiler dependent) -->
2290         <!-- ARMCC -->
2291         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2292         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2293         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2294         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2295         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2296         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2297         <!-- GCC -->
2298         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2299         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2300         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2301         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2302         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2303         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2304       </files>
2305     </component>
2306     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5">
2307       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2308       <RTE_Components_h>
2309         <!-- the following content goes into file 'RTE_Components.h' -->
2310         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2311         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2312         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2313       </RTE_Components_h>
2314       <files>
2315         <!-- RTX documentation -->
2316         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2317
2318         <!-- RTX header files -->
2319         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2320
2321         <!-- RTX configuration -->
2322         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2323         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2324
2325         <!-- RTX templates -->
2326         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2327         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2328         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2329         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2330         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2331         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2332         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2333         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2334         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2335
2336         <!-- RTX sources (core) -->
2337         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2338         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2339         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2340         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2341         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2342         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2343         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2344         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2345         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2346         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2347         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2348         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2349         <!-- RTX sources (library configuration) -->
2350         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2351         <!-- RTX sources (handlers ARMCC) -->
2352         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2353         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2354         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2355         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2356         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2357         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2358         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2359         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2360         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2361         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2362         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2363         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2364         <!-- RTX sources (handlers GCC) -->
2365         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2366         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2367         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2368         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2369         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2370         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2371         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2372         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2373         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2374         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2375         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2376         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2377         <!-- RTX sources (handlers IAR) -->
2378         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2379         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2380         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2381         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2382         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2383         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2384       </files>
2385     </component>
2386     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2387       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2388       <RTE_Components_h>
2389         <!-- the following content goes into file 'RTE_Components.h' -->
2390         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2391         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2392         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2393         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2394       </RTE_Components_h>
2395       <files>
2396         <!-- RTX documentation -->
2397         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2398
2399         <!-- RTX header files -->
2400         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2401
2402         <!-- RTX configuration -->
2403         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2404         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2405
2406         <!-- RTX templates -->
2407         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2408         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2409         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2413         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2414         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2415         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2416
2417         <!-- RTX sources (core) -->
2418         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2419         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2420         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2421         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2422         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2423         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2424         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2425         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2426         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2427         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2428         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2429         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2430         <!-- RTX sources (library configuration) -->
2431         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2432         <!-- RTX sources (ARMCC handlers) -->
2433         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2434         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2435         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2436         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2437         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2438         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2439         <!-- RTX sources (GCC handlers) -->
2440         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2441         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2442         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2443         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2444         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2445         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2446       </files>
2447     </component>
2448
2449   </components>
2450
2451   <boards>
2452     <board name="uVision Simulator" vendor="Keil">
2453       <description>uVision Simulator</description>
2454       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2455       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2456       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2457       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2458       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2459       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2460       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2461       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2462       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2463       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2464       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2465       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2466       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2467       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2468       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2469       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2470       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2471    </board>
2472   </boards>
2473
2474   <examples>
2475     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2476       <description>DSP_Lib Class Marks example</description>
2477       <board name="uVision Simulator" vendor="Keil"/>
2478       <project>
2479         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2480       </project>
2481       <attributes>
2482         <component Cclass="CMSIS" Cgroup="CORE"/>
2483         <component Cclass="CMSIS" Cgroup="DSP"/>
2484         <component Cclass="Device" Cgroup="Startup"/>
2485         <category>Getting Started</category>
2486       </attributes>
2487     </example>
2488
2489     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2490       <description>DSP_Lib Convolution example</description>
2491       <board name="uVision Simulator" vendor="Keil"/>
2492       <project>
2493         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2494       </project>
2495       <attributes>
2496         <component Cclass="CMSIS" Cgroup="CORE"/>
2497         <component Cclass="CMSIS" Cgroup="DSP"/>
2498         <component Cclass="Device" Cgroup="Startup"/>
2499         <category>Getting Started</category>
2500       </attributes>
2501     </example>
2502
2503     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2504       <description>DSP_Lib Dotproduct example</description>
2505       <board name="uVision Simulator" vendor="Keil"/>
2506       <project>
2507         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2508       </project>
2509       <attributes>
2510         <component Cclass="CMSIS" Cgroup="CORE"/>
2511         <component Cclass="CMSIS" Cgroup="DSP"/>
2512         <component Cclass="Device" Cgroup="Startup"/>
2513         <category>Getting Started</category>
2514       </attributes>
2515     </example>
2516
2517     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2518       <description>DSP_Lib FFT Bin example</description>
2519       <board name="uVision Simulator" vendor="Keil"/>
2520       <project>
2521         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2522       </project>
2523       <attributes>
2524         <component Cclass="CMSIS" Cgroup="CORE"/>
2525         <component Cclass="CMSIS" Cgroup="DSP"/>
2526         <component Cclass="Device" Cgroup="Startup"/>
2527         <category>Getting Started</category>
2528       </attributes>
2529     </example>
2530
2531     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2532       <description>DSP_Lib FIR example</description>
2533       <board name="uVision Simulator" vendor="Keil"/>
2534       <project>
2535         <environment name="uv" load="arm_fir_example.uvprojx"/>
2536       </project>
2537       <attributes>
2538         <component Cclass="CMSIS" Cgroup="CORE"/>
2539         <component Cclass="CMSIS" Cgroup="DSP"/>
2540         <component Cclass="Device" Cgroup="Startup"/>
2541         <category>Getting Started</category>
2542       </attributes>
2543     </example>
2544
2545     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2546       <description>DSP_Lib Graphic Equalizer example</description>
2547       <board name="uVision Simulator" vendor="Keil"/>
2548       <project>
2549         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2550       </project>
2551       <attributes>
2552         <component Cclass="CMSIS" Cgroup="CORE"/>
2553         <component Cclass="CMSIS" Cgroup="DSP"/>
2554         <component Cclass="Device" Cgroup="Startup"/>
2555         <category>Getting Started</category>
2556       </attributes>
2557     </example>
2558
2559     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2560       <description>DSP_Lib Linear Interpolation example</description>
2561       <board name="uVision Simulator" vendor="Keil"/>
2562       <project>
2563         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2564       </project>
2565       <attributes>
2566         <component Cclass="CMSIS" Cgroup="CORE"/>
2567         <component Cclass="CMSIS" Cgroup="DSP"/>
2568         <component Cclass="Device" Cgroup="Startup"/>
2569         <category>Getting Started</category>
2570       </attributes>
2571     </example>
2572
2573     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2574       <description>DSP_Lib Matrix example</description>
2575       <board name="uVision Simulator" vendor="Keil"/>
2576       <project>
2577         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2578       </project>
2579       <attributes>
2580         <component Cclass="CMSIS" Cgroup="CORE"/>
2581         <component Cclass="CMSIS" Cgroup="DSP"/>
2582         <component Cclass="Device" Cgroup="Startup"/>
2583         <category>Getting Started</category>
2584       </attributes>
2585     </example>
2586
2587     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2588       <description>DSP_Lib Signal Convergence example</description>
2589       <board name="uVision Simulator" vendor="Keil"/>
2590       <project>
2591         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2592       </project>
2593       <attributes>
2594         <component Cclass="CMSIS" Cgroup="CORE"/>
2595         <component Cclass="CMSIS" Cgroup="DSP"/>
2596         <component Cclass="Device" Cgroup="Startup"/>
2597         <category>Getting Started</category>
2598       </attributes>
2599     </example>
2600
2601     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2602       <description>DSP_Lib Sinus/Cosinus example</description>
2603       <board name="uVision Simulator" vendor="Keil"/>
2604       <project>
2605         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2606       </project>
2607       <attributes>
2608         <component Cclass="CMSIS" Cgroup="CORE"/>
2609         <component Cclass="CMSIS" Cgroup="DSP"/>
2610         <component Cclass="Device" Cgroup="Startup"/>
2611         <category>Getting Started</category>
2612       </attributes>
2613     </example>
2614
2615     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2616       <description>DSP_Lib Variance example</description>
2617       <board name="uVision Simulator" vendor="Keil"/>
2618       <project>
2619         <environment name="uv" load="arm_variance_example.uvprojx"/>
2620       </project>
2621       <attributes>
2622         <component Cclass="CMSIS" Cgroup="CORE"/>
2623         <component Cclass="CMSIS" Cgroup="DSP"/>
2624         <component Cclass="Device" Cgroup="Startup"/>
2625         <category>Getting Started</category>
2626       </attributes>
2627     </example>
2628
2629     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2630       <description>CMSIS-RTOS2 Blinky example</description>
2631       <board name="uVision Simulator" vendor="Keil"/>
2632       <project>
2633         <environment name="uv" load="Blinky.uvprojx"/>
2634       </project>
2635       <attributes>
2636         <component Cclass="CMSIS" Cgroup="CORE"/>
2637         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2638         <component Cclass="Device" Cgroup="Startup"/>
2639         <category>Getting Started</category>
2640       </attributes>
2641     </example>
2642
2643     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2644       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2645       <board name="uVision Simulator" vendor="Keil"/>
2646       <project>
2647         <environment name="uv" load="Blinky.uvprojx"/>
2648       </project>
2649       <attributes>
2650         <component Cclass="CMSIS" Cgroup="CORE"/>
2651         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2652         <component Cclass="Device" Cgroup="Startup"/>
2653         <category>Getting Started</category>
2654       </attributes>
2655     </example>
2656
2657     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2658       <description>Bare-metal secure/non-secure example without RTOS</description>
2659       <board name="uVision Simulator" vendor="Keil"/>
2660       <project>
2661         <environment name="uv" load="NoRTOS.uvmpw"/>
2662       </project>
2663       <attributes>
2664         <component Cclass="CMSIS" Cgroup="CORE"/>
2665         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2666         <component Cclass="Device" Cgroup="Startup"/>
2667         <category>Getting Started</category>
2668       </attributes>
2669     </example>
2670
2671     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2672       <description>Secure/non-secure RTOS example with thread context management</description>
2673       <board name="uVision Simulator" vendor="Keil"/>
2674       <project>
2675         <environment name="uv" load="RTOS.uvmpw"/>
2676       </project>
2677       <attributes>
2678         <component Cclass="CMSIS" Cgroup="CORE"/>
2679         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2680         <component Cclass="Device" Cgroup="Startup"/>
2681         <category>Getting Started</category>
2682       </attributes>
2683     </example>
2684
2685     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2686       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2687       <board name="uVision Simulator" vendor="Keil"/>
2688       <project>
2689         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2690       </project>
2691       <attributes>
2692         <component Cclass="CMSIS" Cgroup="CORE"/>
2693         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2694         <component Cclass="Device" Cgroup="Startup"/>
2695         <category>Getting Started</category>
2696       </attributes>
2697     </example>
2698
2699   </examples>
2700
2701 </package>