begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.1-dev3">
  12       Updated ARMv8M Mainline FPU settings in partition*.h
  13     </release>
  14     <release version="5.0.1-dev2">
  15       CMSIS-RTOS2:
  16        - API 2.1   (see revision history for details)
  17        - RTX 5.1.0 (see revision history for details)
  18     </release>
  19     <release version="5.0.1-dev1">
  20       All C module and header files: updated removing 'http://' within license header sections flagged by MISRA as comment within comment
  21       PDSC: added new compatible devices to 'uVision Simulator' generic board description
  22       CMSIS-Pack Schema: adding
  23     </release>
  24     <release version="5.0.1-dev0">
  25       CMSIS-Core:
  26        - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  27        - Updated template for secure main function (main_s.c)
  28        - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  29       CMSIS-RTOS2:
  30        - RTX 5.0.1 (see revision history for details)
  31     </release>
  32     <release version="5.0.0" date="2016-11-11">
  33       Changed open source license to Apache 2.0
  34       CMSIS_Core:
  35        - Added support for Cortex-M23 and Cortex-M33.
  36        - Added ARMv8-M device configurations for mainline and baseline.
  37        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  38        - Added cmsis_compiler.h to unify compiler behaviour.
  39        - Updated function SCB_EnableICache (for Cortex-M7).
  40        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  41       CMSIS-RTOS:
  42         - bug fix in RTX 4.82 (see revision history for details)
  43       CMSIS-RTOS2:
  44         - new API including compatibility layer to CMSIS-RTOS
  45         - reference implementation based on RTX5
  46         - supports all Cortex-M variants including TrustZone for ARMv8-M
  47       CMSIS-SVD:
  48        - reworked SVD format documentation
  49        - removed SVD file database documentation as SVD files are distributed in packs
  50        - updated SVDConv for Win32 and Linux
  51       CMSIS-DSP:
  52        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  53        - Added DSP libraries build projects to CMSIS pack.
  54     </release>
  55     <release version="4.5.0" date="2015-10-28">
  56       - CMSIS-Core     4.30.0  (see revision history for details)
  57       - CMSIS-DAP      1.1.0   (unchanged)
  58       - CMSIS-Driver   2.04.0  (see revision history for details)
  59       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  60       - CMSIS-PACK     1.4.1   (see revision history for details)
  61       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  62       - CMSIS-SVD      1.3.1   (see revision history for details)
  63     </release>
  64     <release version="4.4.0" date="2015-09-11">
  65       - CMSIS-Core     4.20   (see revision history for details)
  66       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  67       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  68       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  69       - CMSIS-RTOS
  70         -- API         1.02   (unchanged)
  71         -- RTX         4.79   (see revision history for details)
  72       - CMSIS-SVD      1.3.0  (see revision history for details)
  73       - CMSIS-DAP      1.1.0  (extended with SWO support)
  74     </release>
  75     <release version="4.3.0" date="2015-03-20">
  76       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  77       - CMSIS-DSP      1.4.5  (see revision history for details)
  78       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  79       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  80       - CMSIS-RTOS
  81         -- API         1.02   (unchanged)
  82         -- RTX         4.78   (see revision history for details)
  83       - CMSIS-SVD      1.2    (unchanged)
  84     </release>
  85     <release version="4.2.0" date="2014-09-24">
  86       Adding Cortex-M7 support
  87       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
  88       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
  89       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
  90       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
  91       - CMSIS-RTOS RTX 4.75  (see revision history for details)
  92     </release>
  93     <release version="4.1.1" date="2014-06-30">
  94       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
  95     </release>
  96     <release version="4.1.0" date="2014-06-12">
  97       - CMSIS-Driver   2.02  (incompatible update)
  98       - CMSIS-Pack     1.3   (see revision history for details)
  99       - CMSIS-DSP      1.4.2 (unchanged)
 100       - CMSIS-Core     3.30  (unchanged)
 101       - CMSIS-RTOS RTX 4.74  (unchanged)
 102       - CMSIS-RTOS API 1.02  (unchanged)
 103       - CMSIS-SVD      1.10  (unchanged)
 104       PACK:
 105       - removed G++ specific files from PACK
 106       - added Component Startup variant "C Startup"
 107       - added Pack Checking Utility
 108       - updated conditions to reflect tool-chain dependency
 109       - added Taxonomy for Graphics
 110       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 111     </release>
 112     <release version="4.0.0">
 113       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 114       - CMSIS-Pack     1.1   Preliminary
 115       - CMSIS-DSP      1.4.2 (see revision history for details)
 116       - CMSIS-Core     3.30  (see revision history for details)
 117       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 118       - CMSIS-RTOS API 1.02  (unchanged)
 119       - CMSIS-SVD      1.10  (unchanged)
 120     </release>
 121     <release version="3.20.4">
 122       - CMSIS-RTOS 4.74 (see revision history for details)
 123       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 124     </release>
 125     <release version="3.20.3">
 126       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 127       - CMSIS-RTOS 4.73 (see revision history for details)
 128     </release>
 129     <release version="3.20.2">
 130       - CMSIS-Pack documentation has been added
 131       - CMSIS-Drivers header and documentation have been added to PACK
 132       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 133     </release>
 134     <release version="3.20.1">
 135       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 136       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 137     </release>
 138     <release version="3.20.0">
 139       The software portions that are deployed in the application program are now under a BSD license which allows usage
 140       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 141       The individual components have been update as listed below:
 142       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 143       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 144       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 145       - CMSIS-SVD is unchanged.
 146     </release>
 147   </releases>
 148
 149   <taxonomy>
 150     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 151     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 152     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 153     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 154     <description Cclass="File System">File Drive Support and File System</description>
 155     <description Cclass="Graphics">Graphical User Interface</description>
 156     <description Cclass="Network">Network Stack using Internet Protocols</description>
 157     <description Cclass="USB">Universal Serial Bus Stack</description>
 158     <description Cclass="Compiler">ARM Compiler Software Extensions</description>
 159   </taxonomy>
 160
 161   <devices>
 162     <!-- ******************************  Cortex-M0  ****************************** -->
 163     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 164       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 165       <description>
 166 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 167 - simple, easy-to-use programmers model
 168 - highly efficient ultra-low power operation
 169 - excellent code density
 170 - deterministic, high-performance interrupt handling
 171 - upward compatibility with the rest of the Cortex-M processor family.
 172       </description>
 173       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 174       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 175       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 176       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 177
 178       <device Dname="ARMCM0">
 179         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 180         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 181       </device>
 182     </family>
 183
 184     <!-- ******************************  Cortex-M0P  ****************************** -->
 185     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 186       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 187       <description>
 188 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 189 - simple, easy-to-use programmers model
 190 - highly efficient ultra-low power operation
 191 - excellent code density
 192 - deterministic, high-performance interrupt handling
 193 - upward compatibility with the rest of the Cortex-M processor family.
 194       </description>
 195       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 196       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 197       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 198       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 199
 200       <device Dname="ARMCM0P">
 201         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 202         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 203       </device>
 204     </family>
 205
 206     <!-- ******************************  Cortex-M3  ****************************** -->
 207     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 208       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 209       <description>
 210 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 211 - simple, easy-to-use programmers model
 212 - highly efficient ultra-low power operation
 213 - excellent code density
 214 - deterministic, high-performance interrupt handling
 215 - upward compatibility with the rest of the Cortex-M processor family.
 216       </description>
 217       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 218       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 219       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 220       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 221
 222       <device Dname="ARMCM3">
 223         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 224         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 225       </device>
 226     </family>
 227
 228     <!-- ******************************  Cortex-M4  ****************************** -->
 229     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 230       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 231       <description>
 232 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 233 - simple, easy-to-use programmers model
 234 - highly efficient ultra-low power operation
 235 - excellent code density
 236 - deterministic, high-performance interrupt handling
 237 - upward compatibility with the rest of the Cortex-M processor family.
 238       </description>
 239       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 240       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 241       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 242       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 243
 244       <device Dname="ARMCM4">
 245         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 246         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 247       </device>
 248
 249       <device Dname="ARMCM4_FP">
 250         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 251         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 252       </device>
 253     </family>
 254
 255     <!-- ******************************  Cortex-M7  ****************************** -->
 256     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 257       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 258       <description>
 259 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 260 - simple, easy-to-use programmers model
 261 - highly efficient ultra-low power operation
 262 - excellent code density
 263 - deterministic, high-performance interrupt handling
 264 - upward compatibility with the rest of the Cortex-M processor family.
 265       </description>
 266       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 267       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 268       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 269       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 270
 271       <device Dname="ARMCM7">
 272         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 273         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 274       </device>
 275
 276       <device Dname="ARMCM7_SP">
 277         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 278         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 279       </device>
 280
 281       <device Dname="ARMCM7_DP">
 282         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 283         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 284       </device>
 285     </family>
 286
 287     <!-- ******************************  Cortex-M23  ********************** -->
 288     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 289       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 290       <description>
 291 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 292 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 293 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 294       </description>
 295       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 296       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 297       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 298       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 299       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 300       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 301
 302       <device Dname="ARMCM23">
 303         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 304         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 305       </device>
 306
 307       <device Dname="ARMCM23_TZ">
 308         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 309         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 310       </device>
 311     </family>
 312
 313     <!-- ******************************  Cortex-M33  ****************************** -->
 314     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 315       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 316       <description>
 317 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 318 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 319       </description>
 320       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 321       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 322       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 323       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 324       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 325       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 326
 327       <device Dname="ARMCM33">
 328         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 329         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 330       </device>
 331
 332       <device Dname="ARMCM33_TZ">
 333         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 334         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 335       </device>
 336
 337       <device Dname="ARMCM33_DSP_FP">
 338         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 339         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 340       </device>
 341
 342       <device Dname="ARMCM33_DSP_FP_TZ">
 343         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 344         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 345       </device>
 346     </family>
 347
 348     <!-- ******************************  ARMSC000  ****************************** -->
 349     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 350       <description>
 351 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 352 - simple, easy-to-use programmers model
 353 - highly efficient ultra-low power operation
 354 - excellent code density
 355 - deterministic, high-performance interrupt handling
 356       </description>
 357       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 358       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 359       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 360       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 361
 362       <device Dname="ARMSC000">
 363         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 364         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 365       </device>
 366     </family>
 367
 368     <!-- ******************************  ARMSC300  ****************************** -->
 369     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 370       <description>
 371 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 372 - simple, easy-to-use programmers model
 373 - highly efficient ultra-low power operation
 374 - excellent code density
 375 - deterministic, high-performance interrupt handling
 376       </description>
 377       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 378       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 379       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 380       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 381
 382       <device Dname="ARMSC300">
 383         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 384         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 385       </device>
 386     </family>
 387
 388     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 389     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 390       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 391       <description>
 392 ARMv8-M Baseline based device with TrustZone
 393       </description>
 394       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 395       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 396       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 397       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 398       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 399       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 400
 401       <device Dname="ARMv8MBL">
 402         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 403         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 404       </device>
 405     </family>
 406
 407     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 408     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 409       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 410       <description>
 411 ARMv8-M Mainline based device with TrustZone
 412       </description>
 413       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 414       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 415       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 416       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 417       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 418       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 419
 420       <device Dname="ARMv8MML">
 421         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 422         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 423       </device>
 424
 425       <device Dname="ARMv8MML_DSP">
 426         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 427         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 428       </device>
 429
 430       <device Dname="ARMv8MML_SP">
 431         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 432         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 433       </device>
 434
 435       <device Dname="ARMv8MML_DSP_SP">
 436         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 437         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 438       </device>
 439
 440       <device Dname="ARMv8MML_DP">
 441         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 442         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 443       </device>
 444
 445       <device Dname="ARMv8MML_DSP_DP">
 446         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 447         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 448       </device>
 449     </family>
 450
 451   </devices>
 452
 453
 454   <apis>
 455     <!-- CMSIS-RTOS API -->
 456     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
 457       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 458       <files>
 459         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 460       </files>
 461     </api>
 462     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1" exclusive="1">
 463       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 464       <files>
 465         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 466       </files>
 467     </api>
 468     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
 469       <description>USART Driver API for Cortex-M</description>
 470       <files>
 471         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 472         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 473       </files>
 474     </api>
 475     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
 476       <description>SPI Driver API for Cortex-M</description>
 477       <files>
 478         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 479         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 480       </files>
 481     </api>
 482     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
 483       <description>SAI Driver API for Cortex-M</description>
 484       <files>
 485         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 486         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 487       </files>
 488     </api>
 489     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
 490       <description>I2C Driver API for Cortex-M</description>
 491       <files>
 492         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 493         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 494       </files>
 495     </api>
 496     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
 497       <description>CAN Driver API for Cortex-M</description>
 498       <files>
 499         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 500         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 501       </files>
 502     </api>
 503     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
 504       <description>Flash Driver API for Cortex-M</description>
 505       <files>
 506         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 507         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 508       </files>
 509     </api>
 510     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
 511       <description>MCI Driver API for Cortex-M</description>
 512       <files>
 513         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 514         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 515       </files>
 516     </api>
 517     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
 518       <description>NAND Flash Driver API for Cortex-M</description>
 519       <files>
 520         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 521         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 522       </files>
 523     </api>
 524     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
 525       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 526       <files>
 527         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 528         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 529         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 530       </files>
 531     </api>
 532     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
 533       <description>Ethernet MAC Driver API for Cortex-M</description>
 534       <files>
 535         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 536         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 537       </files>
 538     </api>
 539     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
 540       <description>Ethernet PHY Driver API for Cortex-M</description>
 541       <files>
 542         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 543         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 544       </files>
 545     </api>
 546     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
 547       <description>USB Device Driver API for Cortex-M</description>
 548       <files>
 549         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 550         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 551       </files>
 552     </api>
 553     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
 554       <description>USB Host Driver API for Cortex-M</description>
 555       <files>
 556         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 557         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 558       </files>
 559     </api>
 560   </apis>
 561
 562   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 563   <conditions>
 564     <!-- compiler -->
 565     <condition id="ARMCC">
 566       <require Tcompiler="ARMCC"/>
 567     </condition>
 568     <condition id="GCC">
 569       <require Tcompiler="GCC"/>
 570     </condition>
 571     <condition id="IAR">
 572       <require Tcompiler="IAR"/>
 573     </condition>
 574     <condition id="ARMCC GCC">
 575       <accept Tcompiler="ARMCC"/>
 576       <accept Tcompiler="GCC"/>
 577     </condition>
 578     <condition id="ARMCC GCC IAR">
 579       <accept Tcompiler="ARMCC"/>
 580       <accept Tcompiler="GCC"/>
 581       <accept Tcompiler="IAR"/>
 582     </condition>
 583
 584     <!-- ARM architecture -->
 585     <condition id="ARMv6-M Device">
 586       <description>ARMv6-M architecture based device</description>
 587       <accept Dcore="Cortex-M0"/>
 588       <accept Dcore="Cortex-M0+"/>
 589       <accept Dcore="SC000"/>
 590     </condition>
 591     <condition id="ARMv7-M Device">
 592       <description>ARMv7-M architecture based device</description>
 593       <accept Dcore="Cortex-M3"/>
 594       <accept Dcore="Cortex-M4"/>
 595       <accept Dcore="Cortex-M7"/>
 596       <accept Dcore="SC300"/>
 597     </condition>
 598     <condition id="ARMv8-M Device">
 599       <description>ARMv8-M architecture based device</description>
 600       <accept Dcore="ARMV8MBL"/>
 601       <accept Dcore="ARMV8MML"/>
 602       <accept Dcore="Cortex-M23"/>
 603       <accept Dcore="Cortex-M33"/>
 604     </condition>
 605     <condition id="ARMv8-M TZ Device">
 606       <description>ARMv8-M architecture based device with TrustZone</description>
 607       <require condition="ARMv8-M Device"/>
 608       <require Dtz="TZ"/>
 609     </condition>
 610     <condition id="ARMv6_7-M Device">
 611       <description>ARMv6_7-M architecture based device</description>
 612       <accept condition="ARMv6-M Device"/>
 613       <accept condition="ARMv7-M Device"/>
 614     </condition>
 615     <condition id="ARMv6_7_8-M Device">
 616       <description>ARMv6_7_8-M architecture based device</description>
 617       <accept condition="ARMv6-M Device"/>
 618       <accept condition="ARMv7-M Device"/>
 619       <accept condition="ARMv8-M Device"/>
 620     </condition>
 621
 622     <!-- ARM core -->
 623     <condition id="CM0">
 624       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 625       <accept Dcore="Cortex-M0"/>
 626       <accept Dcore="Cortex-M0+"/>
 627       <accept Dcore="SC000"/>
 628     </condition>
 629     <condition id="CM3">
 630       <description>Cortex-M3 or SC300 processor based device</description>
 631       <accept Dcore="Cortex-M3"/>
 632       <accept Dcore="SC300"/>
 633     </condition>
 634     <condition id="CM4">
 635       <description>Cortex-M4 processor based device</description>
 636       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 637     </condition>
 638     <condition id="CM4_FP">
 639       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 640       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 641     </condition>
 642     <condition id="CM7">
 643       <description>Cortex-M7 processor based device</description>
 644       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 645     </condition>
 646     <condition id="CM7_FP">
 647       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 648       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 649       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 650     </condition>
 651     <condition id="CM7_SP">
 652       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 653       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 654     </condition>
 655     <condition id="CM7_DP">
 656       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 657       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 658     </condition>
 659     <condition id="CM23">
 660       <description>Cortex-M23 processor based device</description>
 661       <require Dcore="Cortex-M23"/>
 662     </condition>
 663     <condition id="CM33">
 664       <description>Cortex-M33 processor based device</description>
 665       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 666     </condition>
 667     <condition id="CM33_DSP">
 668       <description>Cortex-M33 processor based device with DSP extension</description>
 669       <require Dcore="Cortex-M33" Dfpu="NO_FPU" Ddsp="DSP"/>
 670     </condition>
 671     <condition id="CM33_FP">
 672       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 673       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 674     </condition>
 675     <condition id="CM33_SP">
 676       <description>Cortex-M33 processor based device using Floating Point Unit (SP)</description>
 677       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="NO_DSP"/>
 678     </condition>
 679     <condition id="CM33_DSP_SP">
 680       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP)</description>
 681       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="DSP"/>
 682     </condition>
 683     <condition id="ARMv8MBL">
 684       <description>ARMv8-M Baseline processor based device</description>
 685       <require Dcore="ARMV8MBL"/>
 686     </condition>
 687     <condition id="ARMv8MML">
 688       <description>ARMv8-M Mainline processor based device</description>
 689       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 690     </condition>
 691     <condition id="ARMv8MML_DSP">
 692       <description>ARMv8-M Mainline processor based device with DSP extension</description>
 693       <require Dcore="ARMV8MML" Dfpu="NO_FPU" Ddsp="DSP"/>
 694     </condition>
 695     <condition id="ARMv8MML_FP">
 696       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 697       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 698       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 699     </condition>
 700     <condition id="ARMv8MML_SP">
 701       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
 702       <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 703     </condition>
 704     <condition id="ARMv8MML_DSP_SP">
 705       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP)</description>
 706       <require Dcore="ARMV8MML" Dfpu="SP_FPU" Ddsp="DSP"/>
 707     </condition>
 708     <condition id="ARMv8MML_DP">
 709       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
 710       <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 711     </condition>
 712     <condition id="ARMv8MML_DSP_DP">
 713       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP)</description>
 714       <require Dcore="ARMV8MML" Dfpu="DP_FPU" Ddsp="DSP"/>
 715     </condition>
 716
 717     <!-- ARMCC compiler -->
 718     <condition id="CM0_ARMCC">
 719       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 720       <require condition="CM0"/>
 721       <require Tcompiler="ARMCC"/>
 722     </condition>
 723     <condition id="CM0_LE_ARMCC">
 724       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 725       <require condition="CM0_ARMCC"/>
 726       <require Dendian="Little-endian"/>
 727     </condition>
 728     <condition id="CM0_BE_ARMCC">
 729       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 730       <require condition="CM0_ARMCC"/>
 731       <require Dendian="Big-endian"/>
 732     </condition>
 733
 734     <condition id="CM3_ARMCC">
 735       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 736       <require condition="CM3"/>
 737       <require Tcompiler="ARMCC"/>
 738     </condition>
 739     <condition id="CM3_LE_ARMCC">
 740       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 741       <require condition="CM3_ARMCC"/>
 742       <require Dendian="Little-endian"/>
 743     </condition>
 744     <condition id="CM3_BE_ARMCC">
 745       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 746       <require condition="CM3_ARMCC"/>
 747       <require Dendian="Big-endian"/>
 748     </condition>
 749
 750     <condition id="CM4_ARMCC">
 751       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 752       <require condition="CM4"/>
 753       <require Tcompiler="ARMCC"/>
 754     </condition>
 755     <condition id="CM4_LE_ARMCC">
 756       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 757       <require condition="CM4_ARMCC"/>
 758       <require Dendian="Little-endian"/>
 759     </condition>
 760     <condition id="CM4_BE_ARMCC">
 761       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 762       <require condition="CM4_ARMCC"/>
 763       <require Dendian="Big-endian"/>
 764     </condition>
 765
 766     <condition id="CM4_FP_ARMCC">
 767       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 768       <require condition="CM4_FP"/>
 769       <require Tcompiler="ARMCC"/>
 770     </condition>
 771     <condition id="CM4_FP_LE_ARMCC">
 772       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 773       <require condition="CM4_FP_ARMCC"/>
 774       <require Dendian="Little-endian"/>
 775     </condition>
 776     <condition id="CM4_FP_BE_ARMCC">
 777       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 778       <require condition="CM4_FP_ARMCC"/>
 779       <require Dendian="Big-endian"/>
 780     </condition>
 781
 782     <!-- XMC 4000 Series devices from Infineon require a special library -->
 783     <condition id="CM4_LE_ARMCC_STD">
 784       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 785       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 786       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 787       <require Tcompiler="ARMCC"/>
 788     </condition>
 789     <condition id="CM4_LE_ARMCC_IFX">
 790       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 791       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 792       <require Tcompiler="ARMCC"/>
 793     </condition>
 794     <condition id="CM4_FP_LE_ARMCC_STD">
 795       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 796       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 797       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 798       <require Tcompiler="ARMCC"/>
 799     </condition>
 800     <condition id="CM4_FP_LE_ARMCC_IFX">
 801       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 802       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 803       <require Tcompiler="ARMCC"/>
 804     </condition>
 805
 806     <condition id="CM7_ARMCC">
 807       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 808       <require condition="CM7"/>
 809       <require Tcompiler="ARMCC"/>
 810     </condition>
 811     <condition id="CM7_LE_ARMCC">
 812       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 813       <require condition="CM7_ARMCC"/>
 814       <require Dendian="Little-endian"/>
 815     </condition>
 816     <condition id="CM7_BE_ARMCC">
 817       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 818       <require condition="CM7_ARMCC"/>
 819       <require Dendian="Big-endian"/>
 820     </condition>
 821
 822     <condition id="CM7_FP_ARMCC">
 823       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 824       <require condition="CM7_FP"/>
 825       <require Tcompiler="ARMCC"/>
 826     </condition>
 827     <condition id="CM7_FP_LE_ARMCC">
 828       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 829       <require condition="CM7_FP_ARMCC"/>
 830       <require Dendian="Little-endian"/>
 831     </condition>
 832     <condition id="CM7_FP_BE_ARMCC">
 833       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 834       <require condition="CM7_FP_ARMCC"/>
 835       <require Dendian="Big-endian"/>
 836     </condition>
 837
 838     <condition id="CM7_SP_ARMCC">
 839       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 840       <require condition="CM7_SP"/>
 841       <require Tcompiler="ARMCC"/>
 842     </condition>
 843     <condition id="CM7_SP_LE_ARMCC">
 844       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 845       <require condition="CM7_SP_ARMCC"/>
 846       <require Dendian="Little-endian"/>
 847     </condition>
 848     <condition id="CM7_SP_BE_ARMCC">
 849       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 850       <require condition="CM7_SP_ARMCC"/>
 851       <require Dendian="Big-endian"/>
 852     </condition>
 853
 854     <condition id="CM7_DP_ARMCC">
 855       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 856       <require condition="CM7_DP"/>
 857       <require Tcompiler="ARMCC"/>
 858     </condition>
 859     <condition id="CM7_DP_LE_ARMCC">
 860       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 861       <require condition="CM7_DP_ARMCC"/>
 862       <require Dendian="Little-endian"/>
 863     </condition>
 864     <condition id="CM7_DP_BE_ARMCC">
 865       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 866       <require condition="CM7_DP_ARMCC"/>
 867       <require Dendian="Big-endian"/>
 868     </condition>
 869
 870     <condition id="CM23_ARMCC">
 871       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 872       <require condition="CM23"/>
 873       <require Tcompiler="ARMCC"/>
 874     </condition>
 875     <condition id="CM23_LE_ARMCC">
 876       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 877       <require condition="CM23_ARMCC"/>
 878       <require Dendian="Little-endian"/>
 879     </condition>
 880     <condition id="CM23_BE_ARMCC">
 881       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 882       <require condition="CM23_ARMCC"/>
 883       <require Dendian="Big-endian"/>
 884     </condition>
 885
 886     <condition id="CM33_ARMCC">
 887       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 888       <require condition="CM33"/>
 889       <require Tcompiler="ARMCC"/>
 890     </condition>
 891     <condition id="CM33_LE_ARMCC">
 892       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 893       <require condition="CM33_ARMCC"/>
 894       <require Dendian="Little-endian"/>
 895     </condition>
 896     <condition id="CM33_BE_ARMCC">
 897       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 898       <require condition="CM33_ARMCC"/>
 899       <require Dendian="Big-endian"/>
 900     </condition>
 901
 902     <condition id="CM33_DSP_ARMCC">
 903       <description>Cortex-M33 processor based device with DSP extension for the ARM Compiler</description>
 904       <require condition="CM33_DSP"/>
 905       <require Tcompiler="ARMCC"/>
 906     </condition>
 907     <condition id="CM33_DSP_LE_ARMCC">
 908       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the ARM Compiler</description>
 909       <require condition="CM33_DSP_ARMCC"/>
 910       <require Dendian="Little-endian"/>
 911     </condition>
 912     <condition id="CM33_DSP_BE_ARMCC">
 913       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the ARM Compiler</description>
 914       <require condition="CM33_DSP_ARMCC"/>
 915       <require Dendian="Big-endian"/>
 916     </condition>
 917
 918     <condition id="CM33_FP_ARMCC">
 919       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 920       <require condition="CM33_FP"/>
 921       <require Tcompiler="ARMCC"/>
 922     </condition>
 923     <condition id="CM33_FP_LE_ARMCC">
 924       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 925       <require condition="CM33_FP_ARMCC"/>
 926       <require Dendian="Little-endian"/>
 927     </condition>
 928     <condition id="CM33_FP_BE_ARMCC">
 929       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 930       <require condition="CM33_FP_ARMCC"/>
 931       <require Dendian="Big-endian"/>
 932     </condition>
 933
 934     <condition id="CM33_SP_ARMCC">
 935       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 936       <require condition="CM33_SP"/>
 937       <require Tcompiler="ARMCC"/>
 938     </condition>
 939     <condition id="CM33_SP_LE_ARMCC">
 940       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 941       <require condition="CM33_SP_ARMCC"/>
 942       <require Dendian="Little-endian"/>
 943     </condition>
 944     <condition id="CM33_SP_BE_ARMCC">
 945       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 946       <require condition="CM33_SP_ARMCC"/>
 947       <require Dendian="Big-endian"/>
 948     </condition>
 949
 950     <condition id="CM33_DSP_SP_ARMCC">
 951       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
 952       <require condition="CM33_DSP_SP"/>
 953       <require Tcompiler="ARMCC"/>
 954     </condition>
 955     <condition id="CM33_DSP_SP_LE_ARMCC">
 956       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 957       <require condition="CM33_DSP_SP_ARMCC"/>
 958       <require Dendian="Little-endian"/>
 959     </condition>
 960     <condition id="CM33_DSP_SP_BE_ARMCC">
 961       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 962       <require condition="CM33_DSP_SP_ARMCC"/>
 963       <require Dendian="Big-endian"/>
 964     </condition>
 965
 966     <condition id="ARMv8MBL_ARMCC">
 967       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
 968       <require condition="ARMv8MBL"/>
 969       <require Tcompiler="ARMCC"/>
 970     </condition>
 971     <condition id="ARMv8MBL_LE_ARMCC">
 972       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
 973       <require condition="ARMv8MBL_ARMCC"/>
 974       <require Dendian="Little-endian"/>
 975     </condition>
 976     <condition id="ARMv8MBL_BE_ARMCC">
 977       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
 978       <require condition="ARMv8MBL_ARMCC"/>
 979       <require Dendian="Big-endian"/>
 980     </condition>
 981
 982     <condition id="ARMv8MML_ARMCC">
 983       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
 984       <require condition="ARMv8MML"/>
 985       <require Tcompiler="ARMCC"/>
 986     </condition>
 987     <condition id="ARMv8MML_LE_ARMCC">
 988       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
 989       <require condition="ARMv8MML_ARMCC"/>
 990       <require Dendian="Little-endian"/>
 991     </condition>
 992     <condition id="ARMv8MML_BE_ARMCC">
 993       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
 994       <require condition="ARMv8MML_ARMCC"/>
 995       <require Dendian="Big-endian"/>
 996     </condition>
 997
 998     <condition id="ARMv8MML_DSP_ARMCC">
 999       <description>ARMv8-M Mainline processor based device with DSP extension for the ARM Compiler</description>
1000       <require condition="ARMv8MML_DSP"/>
1001       <require Tcompiler="ARMCC"/>
1002     </condition>
1003     <condition id="ARMv8MML_DSP_LE_ARMCC">
1004       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the ARM Compiler</description>
1005       <require condition="ARMv8MML_DSP_ARMCC"/>
1006       <require Dendian="Little-endian"/>
1007     </condition>
1008     <condition id="ARMv8MML_DSP_BE_ARMCC">
1009       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the ARM Compiler</description>
1010       <require condition="ARMv8MML_DSP_ARMCC"/>
1011       <require Dendian="Big-endian"/>
1012     </condition>
1013
1014     <condition id="ARMv8MML_FP_ARMCC">
1015       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1016       <require condition="ARMv8MML_FP"/>
1017       <require Tcompiler="ARMCC"/>
1018     </condition>
1019     <condition id="ARMv8MML_FP_LE_ARMCC">
1020       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1021       <require condition="ARMv8MML_FP_ARMCC"/>
1022       <require Dendian="Little-endian"/>
1023     </condition>
1024     <condition id="ARMv8MML_FP_BE_ARMCC">
1025       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1026       <require condition="ARMv8MML_FP_ARMCC"/>
1027       <require Dendian="Big-endian"/>
1028     </condition>
1029
1030     <condition id="ARMv8MML_SP_ARMCC">
1031       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1032       <require condition="ARMv8MML_SP"/>
1033       <require Tcompiler="ARMCC"/>
1034     </condition>
1035     <condition id="ARMv8MML_SP_LE_ARMCC">
1036       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1037       <require condition="ARMv8MML_SP_ARMCC"/>
1038       <require Dendian="Little-endian"/>
1039     </condition>
1040     <condition id="ARMv8MML_SP_BE_ARMCC">
1041       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1042       <require condition="ARMv8MML_SP_ARMCC"/>
1043       <require Dendian="Big-endian"/>
1044     </condition>
1045
1046     <condition id="ARMv8MML_DSP_SP_ARMCC">
1047       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1048       <require condition="ARMv8MML_DSP_SP"/>
1049       <require Tcompiler="ARMCC"/>
1050     </condition>
1051     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1052       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1053       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1054       <require Dendian="Little-endian"/>
1055     </condition>
1056     <condition id="ARMv8MML_DSP_SP_BE_ARMCC">
1057       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1058       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1059       <require Dendian="Big-endian"/>
1060     </condition>
1061
1062     <condition id="ARMv8MML_DP_ARMCC">
1063       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1064       <require condition="ARMv8MML_DP"/>
1065       <require Tcompiler="ARMCC"/>
1066     </condition>
1067     <condition id="ARMv8MML_DP_LE_ARMCC">
1068       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1069       <require condition="ARMv8MML_DP_ARMCC"/>
1070       <require Dendian="Little-endian"/>
1071     </condition>
1072     <condition id="ARMv8MML_DP_BE_ARMCC">
1073       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1074       <require condition="ARMv8MML_DP_ARMCC"/>
1075       <require Dendian="Big-endian"/>
1076     </condition>
1077
1078     <condition id="ARMv8MML_DSP_DP_ARMCC">
1079       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the ARM Compiler</description>
1080       <require condition="ARMv8MML_DSP_DP"/>
1081       <require Tcompiler="ARMCC"/>
1082     </condition>
1083     <condition id="ARMv8MML_DSP_DP_LE_ARMCC">
1084       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1085       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1086       <require Dendian="Little-endian"/>
1087     </condition>
1088     <condition id="ARMv8MML_DSP_DP_BE_ARMCC">
1089       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1090       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1091       <require Dendian="Big-endian"/>
1092     </condition>
1093
1094     <!-- GCC compiler -->
1095     <condition id="CM0_GCC">
1096       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1097       <require condition="CM0"/>
1098       <require Tcompiler="GCC"/>
1099     </condition>
1100     <condition id="CM0_LE_GCC">
1101       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1102       <require condition="CM0_GCC"/>
1103       <require Dendian="Little-endian"/>
1104     </condition>
1105     <condition id="CM0_BE_GCC">
1106       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1107       <require condition="CM0_GCC"/>
1108       <require Dendian="Big-endian"/>
1109     </condition>
1110
1111     <condition id="CM3_GCC">
1112       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1113       <require condition="CM3"/>
1114       <require Tcompiler="GCC"/>
1115     </condition>
1116     <condition id="CM3_LE_GCC">
1117       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1118       <require condition="CM3_GCC"/>
1119       <require Dendian="Little-endian"/>
1120     </condition>
1121     <condition id="CM3_BE_GCC">
1122       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1123       <require condition="CM3_GCC"/>
1124       <require Dendian="Big-endian"/>
1125     </condition>
1126
1127     <condition id="CM4_GCC">
1128       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1129       <require condition="CM4"/>
1130       <require Tcompiler="GCC"/>
1131     </condition>
1132     <condition id="CM4_LE_GCC">
1133       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1134       <require condition="CM4_GCC"/>
1135       <require Dendian="Little-endian"/>
1136     </condition>
1137     <condition id="CM4_BE_GCC">
1138       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1139       <require condition="CM4_GCC"/>
1140       <require Dendian="Big-endian"/>
1141     </condition>
1142
1143     <condition id="CM4_FP_GCC">
1144       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1145       <require condition="CM4_FP"/>
1146       <require Tcompiler="GCC"/>
1147     </condition>
1148     <condition id="CM4_FP_LE_GCC">
1149       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1150       <require condition="CM4_FP_GCC"/>
1151       <require Dendian="Little-endian"/>
1152     </condition>
1153     <condition id="CM4_FP_BE_GCC">
1154       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1155       <require condition="CM4_FP_GCC"/>
1156       <require Dendian="Big-endian"/>
1157     </condition>
1158
1159     <!-- XMC 4000 Series devices from Infineon require a special library -->
1160     <condition id="CM4_LE_GCC_STD">
1161       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1162       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1163       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1164       <require Tcompiler="GCC"/>
1165     </condition>
1166     <condition id="CM4_LE_GCC_IFX">
1167       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1168       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1169       <require Tcompiler="GCC"/>
1170     </condition>
1171     <condition id="CM4_FP_LE_GCC_STD">
1172       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1173       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1174       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1175       <require Tcompiler="GCC"/>
1176     </condition>
1177     <condition id="CM4_FP_LE_GCC_IFX">
1178       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1179       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1180       <require Tcompiler="GCC"/>
1181     </condition>
1182
1183     <condition id="CM7_GCC">
1184       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1185       <require condition="CM7"/>
1186       <require Tcompiler="GCC"/>
1187     </condition>
1188     <condition id="CM7_LE_GCC">
1189       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1190       <require condition="CM7_GCC"/>
1191       <require Dendian="Little-endian"/>
1192     </condition>
1193     <condition id="CM7_BE_GCC">
1194       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1195       <require condition="CM7_GCC"/>
1196       <require Dendian="Big-endian"/>
1197     </condition>
1198
1199     <condition id="CM7_FP_GCC">
1200       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1201       <require condition="CM7_FP"/>
1202       <require Tcompiler="GCC"/>
1203     </condition>
1204     <condition id="CM7_FP_LE_GCC">
1205       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1206       <require condition="CM7_FP_GCC"/>
1207       <require Dendian="Little-endian"/>
1208     </condition>
1209     <condition id="CM7_FP_BE_GCC">
1210       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1211       <require condition="CM7_FP_GCC"/>
1212       <require Dendian="Big-endian"/>
1213     </condition>
1214
1215     <condition id="CM7_SP_GCC">
1216       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1217       <require condition="CM7_SP"/>
1218       <require Tcompiler="GCC"/>
1219     </condition>
1220     <condition id="CM7_SP_LE_GCC">
1221       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1222       <require condition="CM7_SP_GCC"/>
1223       <require Dendian="Little-endian"/>
1224     </condition>
1225     <condition id="CM7_SP_BE_GCC">
1226       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1227       <require condition="CM7_SP_GCC"/>
1228       <require Dendian="Big-endian"/>
1229     </condition>
1230
1231     <condition id="CM7_DP_GCC">
1232       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1233       <require condition="CM7_DP"/>
1234       <require Tcompiler="GCC"/>
1235     </condition>
1236     <condition id="CM7_DP_LE_GCC">
1237       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1238       <require condition="CM7_DP_GCC"/>
1239       <require Dendian="Little-endian"/>
1240     </condition>
1241     <condition id="CM7_DP_BE_GCC">
1242       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1243       <require condition="CM7_DP_GCC"/>
1244       <require Dendian="Big-endian"/>
1245     </condition>
1246
1247     <condition id="CM23_GCC">
1248       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1249       <require condition="CM23"/>
1250       <require Tcompiler="GCC"/>
1251     </condition>
1252     <condition id="CM23_LE_GCC">
1253       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1254       <require condition="CM23_GCC"/>
1255       <require Dendian="Little-endian"/>
1256     </condition>
1257     <condition id="CM23_BE_GCC">
1258       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1259       <require condition="CM23_GCC"/>
1260       <require Dendian="Big-endian"/>
1261     </condition>
1262
1263     <condition id="CM33_GCC">
1264       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1265       <require condition="CM33"/>
1266       <require Tcompiler="GCC"/>
1267     </condition>
1268     <condition id="CM33_LE_GCC">
1269       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1270       <require condition="CM33_GCC"/>
1271       <require Dendian="Little-endian"/>
1272     </condition>
1273     <condition id="CM33_BE_GCC">
1274       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1275       <require condition="CM33_GCC"/>
1276       <require Dendian="Big-endian"/>
1277     </condition>
1278
1279     <condition id="CM33_DSP_GCC">
1280       <description>Cortex-M33 processor based device with DSP extension for the GCC Compiler</description>
1281       <require condition="CM33_DSP"/>
1282       <require Tcompiler="GCC"/>
1283     </condition>
1284     <condition id="CM33_DSP_LE_GCC">
1285       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1286       <require condition="CM33_DSP_GCC"/>
1287       <require Dendian="Little-endian"/>
1288     </condition>
1289     <condition id="CM33_DSP_BE_GCC">
1290       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1291       <require condition="CM33_DSP_GCC"/>
1292       <require Dendian="Big-endian"/>
1293     </condition>
1294
1295     <condition id="CM33_FP_GCC">
1296       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1297       <require condition="CM33_FP"/>
1298       <require Tcompiler="GCC"/>
1299     </condition>
1300     <condition id="CM33_FP_LE_GCC">
1301       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1302       <require condition="CM33_FP_GCC"/>
1303       <require Dendian="Little-endian"/>
1304     </condition>
1305     <condition id="CM33_FP_BE_GCC">
1306       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1307       <require condition="CM33_FP_GCC"/>
1308       <require Dendian="Big-endian"/>
1309     </condition>
1310
1311     <condition id="CM33_SP_GCC">
1312       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1313       <require condition="CM33_SP"/>
1314       <require Tcompiler="GCC"/>
1315     </condition>
1316     <condition id="CM33_SP_LE_GCC">
1317       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1318       <require condition="CM33_SP_GCC"/>
1319       <require Dendian="Little-endian"/>
1320     </condition>
1321     <condition id="CM33_SP_BE_GCC">
1322       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1323       <require condition="CM33_SP_GCC"/>
1324       <require Dendian="Big-endian"/>
1325     </condition>
1326
1327     <condition id="CM33_DSP_SP_GCC">
1328       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1329       <require condition="CM33_DSP_SP"/>
1330       <require Tcompiler="GCC"/>
1331     </condition>
1332     <condition id="CM33_DSP_SP_LE_GCC">
1333       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1334       <require condition="CM33_DSP_SP_GCC"/>
1335       <require Dendian="Little-endian"/>
1336     </condition>
1337     <condition id="CM33_DSP_SP_BE_GCC">
1338       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1339       <require condition="CM33_DSP_SP_GCC"/>
1340       <require Dendian="Big-endian"/>
1341     </condition>
1342
1343     <condition id="ARMv8MBL_GCC">
1344       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1345       <require condition="ARMv8MBL"/>
1346       <require Tcompiler="GCC"/>
1347     </condition>
1348     <condition id="ARMv8MBL_LE_GCC">
1349       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1350       <require condition="ARMv8MBL_GCC"/>
1351       <require Dendian="Little-endian"/>
1352     </condition>
1353     <condition id="ARMv8MBL_BE_GCC">
1354       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1355       <require condition="ARMv8MBL_GCC"/>
1356       <require Dendian="Big-endian"/>
1357     </condition>
1358
1359     <condition id="ARMv8MML_GCC">
1360       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1361       <require condition="ARMv8MML"/>
1362       <require Tcompiler="GCC"/>
1363     </condition>
1364     <condition id="ARMv8MML_LE_GCC">
1365       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1366       <require condition="ARMv8MML_GCC"/>
1367       <require Dendian="Little-endian"/>
1368     </condition>
1369     <condition id="ARMv8MML_BE_GCC">
1370       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1371       <require condition="ARMv8MML_GCC"/>
1372       <require Dendian="Big-endian"/>
1373     </condition>
1374
1375     <condition id="ARMv8MML_DSP_GCC">
1376       <description>ARMv8-M Mainline processor based device with DSP extension for the GCC Compiler</description>
1377       <require condition="ARMv8MML_DSP"/>
1378       <require Tcompiler="GCC"/>
1379     </condition>
1380     <condition id="ARMv8MML_DSP_LE_GCC">
1381       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1382       <require condition="ARMv8MML_DSP_GCC"/>
1383       <require Dendian="Little-endian"/>
1384     </condition>
1385     <condition id="ARMv8MML_DSP_BE_GCC">
1386       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1387       <require condition="ARMv8MML_DSP_GCC"/>
1388       <require Dendian="Big-endian"/>
1389     </condition>
1390
1391     <condition id="ARMv8MML_FP_GCC">
1392       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1393       <require condition="ARMv8MML_FP"/>
1394       <require Tcompiler="GCC"/>
1395     </condition>
1396     <condition id="ARMv8MML_FP_LE_GCC">
1397       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1398       <require condition="ARMv8MML_FP_GCC"/>
1399       <require Dendian="Little-endian"/>
1400     </condition>
1401     <condition id="ARMv8MML_FP_BE_GCC">
1402       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1403       <require condition="ARMv8MML_FP_GCC"/>
1404       <require Dendian="Big-endian"/>
1405     </condition>
1406
1407     <condition id="ARMv8MML_SP_GCC">
1408       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1409       <require condition="ARMv8MML_SP"/>
1410       <require Tcompiler="GCC"/>
1411     </condition>
1412     <condition id="ARMv8MML_SP_LE_GCC">
1413       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1414       <require condition="ARMv8MML_SP_GCC"/>
1415       <require Dendian="Little-endian"/>
1416     </condition>
1417     <condition id="ARMv8MML_SP_BE_GCC">
1418       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1419       <require condition="ARMv8MML_SP_GCC"/>
1420       <require Dendian="Big-endian"/>
1421     </condition>
1422
1423     <condition id="ARMv8MML_DSP_SP_GCC">
1424       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1425       <require condition="ARMv8MML_DSP_SP"/>
1426       <require Tcompiler="GCC"/>
1427     </condition>
1428     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1429       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1430       <require condition="ARMv8MML_DSP_SP_GCC"/>
1431       <require Dendian="Little-endian"/>
1432     </condition>
1433     <condition id="ARMv8MML_DSP_SP_BE_GCC">
1434       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1435       <require condition="ARMv8MML_DSP_SP_GCC"/>
1436       <require Dendian="Big-endian"/>
1437     </condition>
1438
1439     <condition id="ARMv8MML_DP_GCC">
1440       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1441       <require condition="ARMv8MML_DP"/>
1442       <require Tcompiler="GCC"/>
1443     </condition>
1444     <condition id="ARMv8MML_DP_LE_GCC">
1445       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1446       <require condition="ARMv8MML_DP_GCC"/>
1447       <require Dendian="Little-endian"/>
1448     </condition>
1449     <condition id="ARMv8MML_DP_BE_GCC">
1450       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1451       <require condition="ARMv8MML_DP_GCC"/>
1452       <require Dendian="Big-endian"/>
1453     </condition>
1454
1455     <condition id="ARMv8MML_DSP_DP_GCC">
1456       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the GCC Compiler</description>
1457       <require condition="ARMv8MML_DSP_DP"/>
1458       <require Tcompiler="GCC"/>
1459     </condition>
1460     <condition id="ARMv8MML_DSP_DP_LE_GCC">
1461       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1462       <require condition="ARMv8MML_DSP_DP_GCC"/>
1463       <require Dendian="Little-endian"/>
1464     </condition>
1465     <condition id="ARMv8MML_DSP_DP_BE_GCC">
1466       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1467       <require condition="ARMv8MML_DSP_DP_GCC"/>
1468       <require Dendian="Big-endian"/>
1469     </condition>
1470
1471     <!-- IAR compiler -->
1472     <condition id="CM0_IAR">
1473       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1474       <require condition="CM0"/>
1475       <require Tcompiler="IAR"/>
1476     </condition>
1477     <condition id="CM0_LE_IAR">
1478       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1479       <require condition="CM0_IAR"/>
1480       <require Dendian="Little-endian"/>
1481     </condition>
1482     <condition id="CM0_BE_IAR">
1483       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1484       <require condition="CM0_IAR"/>
1485       <require Dendian="Big-endian"/>
1486     </condition>
1487
1488     <condition id="CM3_IAR">
1489       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1490       <require condition="CM3"/>
1491       <require Tcompiler="IAR"/>
1492     </condition>
1493     <condition id="CM3_LE_IAR">
1494       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1495       <require condition="CM3_IAR"/>
1496       <require Dendian="Little-endian"/>
1497     </condition>
1498     <condition id="CM3_BE_IAR">
1499       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1500       <require condition="CM3_IAR"/>
1501       <require Dendian="Big-endian"/>
1502     </condition>
1503
1504     <condition id="CM4_IAR">
1505       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1506       <require condition="CM4"/>
1507       <require Tcompiler="IAR"/>
1508     </condition>
1509     <condition id="CM4_LE_IAR">
1510       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1511       <require condition="CM4_IAR"/>
1512       <require Dendian="Little-endian"/>
1513     </condition>
1514     <condition id="CM4_BE_IAR">
1515       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1516       <require condition="CM4_IAR"/>
1517       <require Dendian="Big-endian"/>
1518     </condition>
1519
1520     <condition id="CM4_FP_IAR">
1521       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1522       <require condition="CM4_FP"/>
1523       <require Tcompiler="IAR"/>
1524     </condition>
1525     <condition id="CM4_FP_LE_IAR">
1526       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1527       <require condition="CM4_FP_IAR"/>
1528       <require Dendian="Little-endian"/>
1529     </condition>
1530     <condition id="CM4_FP_BE_IAR">
1531       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1532       <require condition="CM4_FP_IAR"/>
1533       <require Dendian="Big-endian"/>
1534     </condition>
1535
1536     <condition id="CM7_IAR">
1537       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1538       <require condition="CM7"/>
1539       <require Tcompiler="IAR"/>
1540     </condition>
1541     <condition id="CM7_LE_IAR">
1542       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1543       <require condition="CM7_IAR"/>
1544       <require Dendian="Little-endian"/>
1545     </condition>
1546     <condition id="CM7_BE_IAR">
1547       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1548       <require condition="CM7_IAR"/>
1549       <require Dendian="Big-endian"/>
1550     </condition>
1551
1552     <condition id="CM7_FP_IAR">
1553       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1554       <require condition="CM7_FP"/>
1555       <require Tcompiler="IAR"/>
1556     </condition>
1557     <condition id="CM7_FP_LE_IAR">
1558       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1559       <require condition="CM7_FP_IAR"/>
1560       <require Dendian="Little-endian"/>
1561     </condition>
1562     <condition id="CM7_FP_BE_IAR">
1563       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1564       <require condition="CM7_FP_IAR"/>
1565       <require Dendian="Big-endian"/>
1566     </condition>
1567
1568     <condition id="CM7_SP_IAR">
1569       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1570       <require condition="CM7_SP"/>
1571       <require Tcompiler="IAR"/>
1572     </condition>
1573     <condition id="CM7_SP_LE_IAR">
1574       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1575       <require condition="CM7_SP_IAR"/>
1576       <require Dendian="Little-endian"/>
1577     </condition>
1578     <condition id="CM7_SP_BE_IAR">
1579       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1580       <require condition="CM7_SP_IAR"/>
1581       <require Dendian="Big-endian"/>
1582     </condition>
1583
1584     <condition id="CM7_DP_IAR">
1585       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1586       <require condition="CM7_DP"/>
1587       <require Tcompiler="IAR"/>
1588     </condition>
1589     <condition id="CM7_DP_LE_IAR">
1590       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1591       <require condition="CM7_DP_IAR"/>
1592       <require Dendian="Little-endian"/>
1593     </condition>
1594     <condition id="CM7_DP_BE_IAR">
1595       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1596       <require condition="CM7_DP_IAR"/>
1597       <require Dendian="Big-endian"/>
1598     </condition>
1599
1600     <!-- conditions selecting single devices and CMSIS Core -->
1601     <!-- used for component startup, GCC version is used for C-Startup -->
1602     <condition id="ARMCM0 CMSIS">
1603       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1604       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1605       <require Cclass="CMSIS" Cgroup="CORE"/>
1606     </condition>
1607     <condition id="ARMCM0 CMSIS GCC">
1608       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1609       <require condition="ARMCM0 CMSIS"/>
1610       <require condition="GCC"/>
1611     </condition>
1612
1613     <condition id="ARMCM0+ CMSIS">
1614       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1615       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1616       <require Cclass="CMSIS" Cgroup="CORE"/>
1617     </condition>
1618     <condition id="ARMCM0+ CMSIS GCC">
1619       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1620       <require condition="ARMCM0+ CMSIS"/>
1621       <require condition="GCC"/>
1622     </condition>
1623
1624     <condition id="ARMCM3 CMSIS">
1625       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1626       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1627       <require Cclass="CMSIS" Cgroup="CORE"/>
1628     </condition>
1629     <condition id="ARMCM3 CMSIS GCC">
1630       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1631       <require condition="ARMCM3 CMSIS"/>
1632       <require condition="GCC"/>
1633     </condition>
1634
1635     <condition id="ARMCM4 CMSIS">
1636       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1637       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1638       <require Cclass="CMSIS" Cgroup="CORE"/>
1639     </condition>
1640     <condition id="ARMCM4 CMSIS GCC">
1641       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1642       <require condition="ARMCM4 CMSIS"/>
1643       <require condition="GCC"/>
1644     </condition>
1645
1646     <condition id="ARMCM7 CMSIS">
1647       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1648       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1649       <require Cclass="CMSIS" Cgroup="CORE"/>
1650     </condition>
1651     <condition id="ARMCM7 CMSIS GCC">
1652       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1653       <require condition="ARMCM7 CMSIS"/>
1654       <require condition="GCC"/>
1655     </condition>
1656
1657     <condition id="ARMCM23 CMSIS">
1658       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1659       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1660       <require Cclass="CMSIS" Cgroup="CORE"/>
1661     </condition>
1662     <condition id="ARMCM23 CMSIS GCC">
1663       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1664       <require condition="ARMCM23 CMSIS"/>
1665       <require condition="GCC"/>
1666     </condition>
1667
1668     <condition id="ARMCM33 CMSIS">
1669       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1670       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1671       <require Cclass="CMSIS" Cgroup="CORE"/>
1672     </condition>
1673     <condition id="ARMCM33 CMSIS GCC">
1674       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1675       <require condition="ARMCM33 CMSIS"/>
1676       <require condition="GCC"/>
1677     </condition>
1678
1679     <condition id="ARMSC000 CMSIS">
1680       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1681       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1682       <require Cclass="CMSIS" Cgroup="CORE"/>
1683     </condition>
1684     <condition id="ARMSC000 CMSIS GCC">
1685       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1686       <require condition="ARMSC000 CMSIS"/>
1687       <require condition="GCC"/>
1688     </condition>
1689
1690     <condition id="ARMSC300 CMSIS">
1691       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1692       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1693       <require Cclass="CMSIS" Cgroup="CORE"/>
1694     </condition>
1695     <condition id="ARMSC300 CMSIS GCC">
1696       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1697       <require condition="ARMSC300 CMSIS"/>
1698       <require condition="GCC"/>
1699     </condition>
1700
1701     <condition id="ARMv8MBL CMSIS">
1702       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1703       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1704       <require Cclass="CMSIS" Cgroup="CORE"/>
1705     </condition>
1706     <condition id="ARMv8MBL CMSIS GCC">
1707       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1708       <require condition="ARMv8MBL CMSIS"/>
1709       <require condition="GCC"/>
1710     </condition>
1711
1712     <condition id="ARMv8MML CMSIS">
1713       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1714       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1715       <require Cclass="CMSIS" Cgroup="CORE"/>
1716     </condition>
1717     <condition id="ARMv8MML CMSIS GCC">
1718       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1719       <require condition="ARMv8MML CMSIS"/>
1720       <require condition="GCC"/>
1721     </condition>
1722
1723     <!-- CMSIS DSP -->
1724     <condition id="CMSIS DSP">
1725       <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
1726       <require condition="ARMv6_7-M Device"/>
1727       <require Cclass="CMSIS" Cgroup="CORE"/>
1728       <require condition="ARMCC GCC"/>
1729     </condition>
1730
1731     <!-- RTOS RTX -->
1732     <condition id="RTOS RTX">
1733       <description>Components required for RTOS RTX</description>
1734       <require condition="ARMv6_7-M Device"/>
1735       <require condition="ARMCC GCC IAR"/>
1736       <require Cclass="Device" Cgroup="Startup"/>
1737       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1738     </condition>
1739     <condition id="RTOS RTX5">
1740       <description>Components required for RTOS RTX5</description>
1741       <require condition="ARMv6_7_8-M Device"/>
1742       <require condition="ARMCC GCC"/>
1743       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1744     </condition>
1745     <condition id="RTOS2 RTX5">
1746       <description>Components required for RTOS2 RTX5</description>
1747       <require condition="ARMv6_7_8-M Device"/>
1748       <require condition="ARMCC GCC"/>
1749       <require Cclass="CMSIS"  Cgroup="CORE"/>
1750       <require Cclass="Device" Cgroup="Startup"/>
1751     </condition>
1752     <condition id="RTOS2 RTX5 NS">
1753       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1754       <require condition="ARMv8-M TZ Device"/>
1755       <require condition="ARMCC GCC"/>
1756       <require Cclass="CMSIS"  Cgroup="CORE"/>
1757       <require Cclass="Device" Cgroup="Startup"/>
1758     </condition>
1759
1760   </conditions>
1761
1762   <components>
1763     <!-- CMSIS-Core component -->
1764     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0"  condition="ARMv6_7_8-M Device" >
1765       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1766       <files>
1767         <!-- CPU independent -->
1768         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1769         <file category="include" name="CMSIS/Include/"/>
1770         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1771         <!-- Code template -->
1772         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1773         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1774       </files>
1775     </component>
1776
1777     <!-- CMSIS-Startup components -->
1778     <!-- Cortex-M0 -->
1779     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1780       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1781       <files>
1782         <!-- include folder / device header file -->
1783         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1784         <!-- startup / system file -->
1785         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1786         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1787         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1788         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1789         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1790       </files>
1791     </component>
1792     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1793       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1794       <files>
1795         <!-- include folder / device header file -->
1796         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1797         <!-- startup / system file -->
1798         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1799         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1800         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1801       </files>
1802     </component>
1803
1804     <!-- Cortex-M0+ -->
1805     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1806       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1807       <files>
1808         <!-- include folder / device header file -->
1809         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1810         <!-- startup / system file -->
1811         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1812         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1813         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1814         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1815         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1816       </files>
1817     </component>
1818     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1819       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1820       <files>
1821         <!-- include folder / device header file -->
1822         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1823         <!-- startup / system file -->
1824         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1825         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1826         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1827       </files>
1828     </component>
1829
1830     <!-- Cortex-M3 -->
1831     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1832       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1833       <files>
1834         <!-- include folder / device header file -->
1835         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1836         <!-- startup / system file -->
1837         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1838         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1839         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1840         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1841         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1842       </files>
1843     </component>
1844     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1845       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1846       <files>
1847         <!-- include folder / device header file -->
1848         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1849         <!-- startup / system file -->
1850         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1851         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1852         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1853       </files>
1854     </component>
1855
1856     <!-- Cortex-M4 -->
1857     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1858       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1859       <files>
1860         <!-- include folder / device header file -->
1861         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1862         <!-- startup / system file -->
1863         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1864         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1865         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1866         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1867         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1868       </files>
1869     </component>
1870     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1871       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1872       <files>
1873         <!-- include folder / device header file -->
1874         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1875         <!-- startup / system file -->
1876         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1877         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1878         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1879       </files>
1880     </component>
1881
1882     <!-- Cortex-M7 -->
1883     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1884       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1885       <files>
1886         <!-- include folder / device header file -->
1887         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1888         <!-- startup / system file -->
1889         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1890         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1891         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1892         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1893         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1894       </files>
1895     </component>
1896     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1897       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1898       <files>
1899         <!-- include folder / device header file -->
1900         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1901         <!-- startup / system file -->
1902         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1903         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1904         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1905       </files>
1906     </component>
1907
1908     <!-- Cortex-M23 -->
1909     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1910       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1911       <files>
1912         <!-- include folder / device header file -->
1913         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1914         <!-- startup / system file -->
1915         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1916         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1917         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1918         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1919         <!-- SAU configuration -->
1920         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1921       </files>
1922     </component>
1923     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1924       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1925       <files>
1926         <!-- include folder / device header file -->
1927         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1928         <!-- startup / system file -->
1929         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1930         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1931         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1932         <!-- SAU configuration -->
1933         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1934       </files>
1935     </component>
1936
1937     <!-- Cortex-M33 -->
1938     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
1939       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1940       <files>
1941         <!-- include folder / device header file -->
1942         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1943         <!-- startup / system file -->
1944         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
1945         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
1946         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1947         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
1948         <!-- SAU configuration -->
1949         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1950       </files>
1951     </component>
1952     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
1953       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1954       <files>
1955         <!-- include folder / device header file -->
1956         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1957         <!-- startup / system file -->
1958         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
1959         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1960         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
1961         <!-- SAU configuration -->
1962         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1963       </files>
1964     </component>
1965
1966     <!-- Cortex-SC000 -->
1967     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
1968       <description>System and Startup for Generic ARM SC000 device</description>
1969       <files>
1970         <!-- include folder / device header file -->
1971         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1972         <!-- startup / system file -->
1973         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1974         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1975         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1976         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1977         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1978       </files>
1979     </component>
1980     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1981       <description>System and Startup for Generic ARM SC000 device</description>
1982       <files>
1983         <!-- include folder / device header file -->
1984         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1985         <!-- startup / system file -->
1986         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1987         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1988         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1989       </files>
1990     </component>
1991
1992     <!-- Cortex-SC300 -->
1993     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
1994       <description>System and Startup for Generic ARM SC300 device</description>
1995       <files>
1996         <!-- include folder / device header file -->
1997         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1998         <!-- startup / system file -->
1999         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2000         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2001         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2002         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2003         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2004       </files>
2005     </component>
2006     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2007       <description>System and Startup for Generic ARM SC300 device</description>
2008       <files>
2009         <!-- include folder / device header file -->
2010         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2011         <!-- startup / system file -->
2012         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2013         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2014         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2015       </files>
2016     </component>
2017
2018     <!-- ARMv8MBL -->
2019     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2020       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2021       <files>
2022         <!-- include folder / device header file -->
2023         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2024         <!-- startup / system file -->
2025         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2026         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2027         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2028         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2029         <!-- SAU configuration -->
2030         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2031       </files>
2032     </component>
2033     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2034       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2035       <files>
2036         <!-- include folder / device header file -->
2037         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2038         <!-- startup / system file -->
2039         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2040         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2041         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2042         <!-- SAU configuration -->
2043         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2044       </files>
2045     </component>
2046
2047     <!-- ARMv8MML -->
2048     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2049       <description>System and Startup for Generic ARM ARMv8MML device</description>
2050       <files>
2051         <!-- include folder / device header file -->
2052         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2053         <!-- startup / system file -->
2054         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2055         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2056         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2057         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2058         <!-- SAU configuration -->
2059         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2060       </files>
2061     </component>
2062     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2063       <description>System and Startup for Generic ARM ARMv8MML device</description>
2064       <files>
2065         <!-- include folder / device header file -->
2066         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2067         <!-- startup / system file -->
2068         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2069         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2070         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2071         <!-- SAU configuration -->
2072         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2073       </files>
2074     </component>
2075
2076
2077     <!-- CMSIS-DSP component -->
2078     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
2079       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2080       <files>
2081         <!-- CPU independent -->
2082         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2083         <file category="header" name="CMSIS/Include/arm_math.h"/>
2084
2085         <!-- CPU and Compiler dependent -->
2086         <!-- ARMCC -->
2087         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2088         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2089         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2090         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2091         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2092         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2093         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2094         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2095         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2096         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2097         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2098         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2099         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2100         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2101 <!--
2102         <file category="library" condition="CM23_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2103         <file category="library" condition="CM33_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2104         <file category="library" condition="CM33_DSP_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2105         <file category="library" condition="CM33_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2106         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2107         <file category="library" condition="ARMv8MBL_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2108         <file category="library" condition="ARMv8MML_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2109         <file category="library" condition="ARMv8MML_DSP_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2110         <file category="library" condition="ARMv8MML_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2111         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2112 -->
2113         <!-- GCC -->
2114         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2115         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2116         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2117         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2118         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2119         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2120         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2121 <!--
2122         <file category="library" condition="CM23_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2123         <file category="library" condition="CM33_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2124         <file category="library" condition="CM33_DSP_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2125         <file category="library" condition="CM33_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2126         <file category="library" condition="CM33_DSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2127         <file category="library" condition="ARMv8MBL_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2128         <file category="library" condition="ARMv8MML_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2129         <file category="library" condition="ARMv8MML_DSP_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2130         <file category="library" condition="ARMv8MML_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2131         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"   name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2132 -->
2133       </files>
2134     </component>
2135
2136     <!-- CMSIS-RTOS Keil RTX component -->
2137     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
2138       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2139       <RTE_Components_h>
2140         <!-- the following content goes into file 'RTE_Components.h' -->
2141         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2142         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2143       </RTE_Components_h>
2144       <files>
2145         <!-- CPU independent -->
2146         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2147         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2148         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2149
2150         <!-- RTX templates -->
2151         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2152         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2153         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2154         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2155         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2156         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2157         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2158         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2159         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2160         <!-- tool-chain specific template file -->
2161         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2162         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2163         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2164
2165         <!-- CPU and Compiler dependent -->
2166         <!-- ARMCC -->
2167         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2168         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2169         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2170         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2171         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2172         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2173         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2174         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2175         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2176         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2177         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2178         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2179         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2180         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2181         <!-- GCC -->
2182         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2183         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2184         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2185         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2186         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2187         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2188         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2189         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2190         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2191         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2192         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2193         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2194         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2195         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2196         <!-- IAR -->
2197         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2198         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2199         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2200         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2201         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2202         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2203         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2204         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2205         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2206         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2207         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2208         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2209       </files>
2210     </component>
2211
2212     <!-- CMSIS-RTOS Keil RTX5 component -->
2213     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.1.0" Capiversion="1.0" condition="RTOS RTX5">
2214       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2215       <RTE_Components_h>
2216         <!-- the following content goes into file 'RTE_Components.h' -->
2217         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2218         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2219       </RTE_Components_h>
2220       <files>
2221         <!-- RTX header file -->
2222         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2223         <!-- RTX compatibility module for API V1 -->
2224         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2225       </files>
2226     </component>
2227
2228     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2229     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5">
2230       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2231       <RTE_Components_h>
2232         <!-- the following content goes into file 'RTE_Components.h' -->
2233         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2234         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2235       </RTE_Components_h>
2236       <files>
2237         <!-- RTX documentation -->
2238         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2239
2240         <!-- RTX header files -->
2241         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2242         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2243
2244         <!-- RTX configuration -->
2245         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2246         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2247
2248         <!-- RTX templates -->
2249         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2250         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2251         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2252         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2253         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2254         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2255         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2256         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2257         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2258
2259         <!-- RTX library configuration -->
2260         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2261
2262         <!-- RTX libraries (CPU and Compiler dependent) -->
2263         <!-- ARMCC -->
2264         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2265         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2266         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2267         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2268         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2269         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2270         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2271         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2272         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2273         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2274         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2275         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2276         <!-- GCC -->
2277         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2278         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2279         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2280         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2281         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2282         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2283         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2284         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2285         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2286         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2287         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2288         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2289       </files>
2290     </component>
2291     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5 NS">
2292       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2293       <RTE_Components_h>
2294         <!-- the following content goes into file 'RTE_Components.h' -->
2295         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2296         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2297         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2298       </RTE_Components_h>
2299       <files>
2300         <!-- RTX documentation -->
2301         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2302
2303         <!-- RTX header files -->
2304         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2305         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2306
2307         <!-- RTX configuration -->
2308         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2309         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2310
2311         <!-- RTX templates -->
2312         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2313         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2314         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2315         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2316         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2317         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2318         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2319         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2320         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2321
2322         <!-- RTX library configuration -->
2323         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2324
2325         <!-- RTX libraries (CPU and Compiler dependent) -->
2326         <!-- ARMCC -->
2327         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2328         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2329         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2330         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2331         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2332         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2333         <!-- GCC -->
2334         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2335         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2336         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2337         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2338         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2339         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2340       </files>
2341     </component>
2342     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5">
2343       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2344       <RTE_Components_h>
2345         <!-- the following content goes into file 'RTE_Components.h' -->
2346         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2347         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2348         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2349       </RTE_Components_h>
2350       <files>
2351         <!-- RTX documentation -->
2352         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2353
2354         <!-- RTX header files -->
2355         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2356         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2357
2358         <!-- RTX configuration -->
2359         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2360         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2361
2362         <!-- RTX templates -->
2363         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2364         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2365         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2366         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2367         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2368         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2369         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2370         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2371         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2372
2373         <!-- RTX sources (core) -->
2374         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2375         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2376         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2377         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2378         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2379         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2380         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2381         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2382         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2383         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2384         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2385         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2386         <!-- RTX sources (library configuration) -->
2387         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2388         <!-- RTX sources (handlers ARMCC) -->
2389         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2390         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2391         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2392         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2393         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2394         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2395         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2396         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2397         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2398         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2399         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2400         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2401         <!-- RTX sources (handlers GCC) -->
2402         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2403         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2404         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2405         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2406         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2407         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2408         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2409         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2410         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2411         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2412         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2413         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2414       </files>
2415     </component>
2416     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5 NS">
2417       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2418       <RTE_Components_h>
2419         <!-- the following content goes into file 'RTE_Components.h' -->
2420         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2421         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2422         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2423         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2424       </RTE_Components_h>
2425       <files>
2426         <!-- RTX documentation -->
2427         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2428
2429         <!-- RTX header files -->
2430         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2431         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2432
2433         <!-- RTX configuration -->
2434         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2435         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2436
2437         <!-- RTX templates -->
2438         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2439         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2440         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2441         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2442         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2443         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2444         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2445         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2446         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2447
2448         <!-- RTX sources (core) -->
2449         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2450         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2451         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2452         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2453         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2454         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2455         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2456         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2457         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2458         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2459         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2460         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2461         <!-- RTX sources (library configuration) -->
2462         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2463         <!-- RTX sources (ARMCC handlers) -->
2464         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2465         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2466         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2467         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2468         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2469         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2470         <!-- RTX sources (GCC handlers) -->
2471         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2472         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2473         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2474         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2475         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2476         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2477       </files>
2478     </component>
2479
2480   </components>
2481
2482   <boards>
2483     <board name="uVision Simulator" vendor="Keil">
2484       <description>uVision Simulator</description>
2485       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2486       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2487       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2488       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2489       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2490       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2491       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2492       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2493       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2494       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2495       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2496       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2497       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2498       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2499       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2500       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2501       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2502    </board>
2503   </boards>
2504
2505   <examples>
2506     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2507       <description>DSP_Lib Class Marks example</description>
2508       <board name="uVision Simulator" vendor="Keil"/>
2509       <project>
2510         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2511       </project>
2512       <attributes>
2513         <component Cclass="CMSIS" Cgroup="CORE"/>
2514         <component Cclass="CMSIS" Cgroup="DSP"/>
2515         <component Cclass="Device" Cgroup="Startup"/>
2516         <category>Getting Started</category>
2517       </attributes>
2518     </example>
2519
2520     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2521       <description>DSP_Lib Convolution example</description>
2522       <board name="uVision Simulator" vendor="Keil"/>
2523       <project>
2524         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2525       </project>
2526       <attributes>
2527         <component Cclass="CMSIS" Cgroup="CORE"/>
2528         <component Cclass="CMSIS" Cgroup="DSP"/>
2529         <component Cclass="Device" Cgroup="Startup"/>
2530         <category>Getting Started</category>
2531       </attributes>
2532     </example>
2533
2534     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2535       <description>DSP_Lib Dotproduct example</description>
2536       <board name="uVision Simulator" vendor="Keil"/>
2537       <project>
2538         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2539       </project>
2540       <attributes>
2541         <component Cclass="CMSIS" Cgroup="CORE"/>
2542         <component Cclass="CMSIS" Cgroup="DSP"/>
2543         <component Cclass="Device" Cgroup="Startup"/>
2544         <category>Getting Started</category>
2545       </attributes>
2546     </example>
2547
2548     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2549       <description>DSP_Lib FFT Bin example</description>
2550       <board name="uVision Simulator" vendor="Keil"/>
2551       <project>
2552         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2553       </project>
2554       <attributes>
2555         <component Cclass="CMSIS" Cgroup="CORE"/>
2556         <component Cclass="CMSIS" Cgroup="DSP"/>
2557         <component Cclass="Device" Cgroup="Startup"/>
2558         <category>Getting Started</category>
2559       </attributes>
2560     </example>
2561
2562     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2563       <description>DSP_Lib FIR example</description>
2564       <board name="uVision Simulator" vendor="Keil"/>
2565       <project>
2566         <environment name="uv" load="arm_fir_example.uvprojx"/>
2567       </project>
2568       <attributes>
2569         <component Cclass="CMSIS" Cgroup="CORE"/>
2570         <component Cclass="CMSIS" Cgroup="DSP"/>
2571         <component Cclass="Device" Cgroup="Startup"/>
2572         <category>Getting Started</category>
2573       </attributes>
2574     </example>
2575
2576     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2577       <description>DSP_Lib Graphic Equalizer example</description>
2578       <board name="uVision Simulator" vendor="Keil"/>
2579       <project>
2580         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2581       </project>
2582       <attributes>
2583         <component Cclass="CMSIS" Cgroup="CORE"/>
2584         <component Cclass="CMSIS" Cgroup="DSP"/>
2585         <component Cclass="Device" Cgroup="Startup"/>
2586         <category>Getting Started</category>
2587       </attributes>
2588     </example>
2589
2590     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2591       <description>DSP_Lib Linear Interpolation example</description>
2592       <board name="uVision Simulator" vendor="Keil"/>
2593       <project>
2594         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2595       </project>
2596       <attributes>
2597         <component Cclass="CMSIS" Cgroup="CORE"/>
2598         <component Cclass="CMSIS" Cgroup="DSP"/>
2599         <component Cclass="Device" Cgroup="Startup"/>
2600         <category>Getting Started</category>
2601       </attributes>
2602     </example>
2603
2604     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2605       <description>DSP_Lib Matrix example</description>
2606       <board name="uVision Simulator" vendor="Keil"/>
2607       <project>
2608         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2609       </project>
2610       <attributes>
2611         <component Cclass="CMSIS" Cgroup="CORE"/>
2612         <component Cclass="CMSIS" Cgroup="DSP"/>
2613         <component Cclass="Device" Cgroup="Startup"/>
2614         <category>Getting Started</category>
2615       </attributes>
2616     </example>
2617
2618     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2619       <description>DSP_Lib Signal Convergence example</description>
2620       <board name="uVision Simulator" vendor="Keil"/>
2621       <project>
2622         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2623       </project>
2624       <attributes>
2625         <component Cclass="CMSIS" Cgroup="CORE"/>
2626         <component Cclass="CMSIS" Cgroup="DSP"/>
2627         <component Cclass="Device" Cgroup="Startup"/>
2628         <category>Getting Started</category>
2629       </attributes>
2630     </example>
2631
2632     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2633       <description>DSP_Lib Sinus/Cosinus example</description>
2634       <board name="uVision Simulator" vendor="Keil"/>
2635       <project>
2636         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2637       </project>
2638       <attributes>
2639         <component Cclass="CMSIS" Cgroup="CORE"/>
2640         <component Cclass="CMSIS" Cgroup="DSP"/>
2641         <component Cclass="Device" Cgroup="Startup"/>
2642         <category>Getting Started</category>
2643       </attributes>
2644     </example>
2645
2646     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2647       <description>DSP_Lib Variance example</description>
2648       <board name="uVision Simulator" vendor="Keil"/>
2649       <project>
2650         <environment name="uv" load="arm_variance_example.uvprojx"/>
2651       </project>
2652       <attributes>
2653         <component Cclass="CMSIS" Cgroup="CORE"/>
2654         <component Cclass="CMSIS" Cgroup="DSP"/>
2655         <component Cclass="Device" Cgroup="Startup"/>
2656         <category>Getting Started</category>
2657       </attributes>
2658     </example>
2659
2660     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2661       <description>CMSIS-RTOS2 Blinky example</description>
2662       <board name="uVision Simulator" vendor="Keil"/>
2663       <project>
2664         <environment name="uv" load="Blinky.uvprojx"/>
2665       </project>
2666       <attributes>
2667         <component Cclass="CMSIS" Cgroup="CORE"/>
2668         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2669         <component Cclass="Device" Cgroup="Startup"/>
2670         <category>Getting Started</category>
2671       </attributes>
2672     </example>
2673
2674     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2675       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2676       <board name="uVision Simulator" vendor="Keil"/>
2677       <project>
2678         <environment name="uv" load="Blinky.uvprojx"/>
2679       </project>
2680       <attributes>
2681         <component Cclass="CMSIS" Cgroup="CORE"/>
2682         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2683         <component Cclass="Device" Cgroup="Startup"/>
2684         <category>Getting Started</category>
2685       </attributes>
2686     </example>
2687
2688     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2689       <description>Bare-metal secure/non-secure example without RTOS</description>
2690       <board name="uVision Simulator" vendor="Keil"/>
2691       <project>
2692         <environment name="uv" load="NoRTOS.uvmpw"/>
2693       </project>
2694       <attributes>
2695         <component Cclass="CMSIS" Cgroup="CORE"/>
2696         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2697         <component Cclass="Device" Cgroup="Startup"/>
2698         <category>Getting Started</category>
2699       </attributes>
2700     </example>
2701
2702     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2703       <description>Secure/non-secure RTOS example with thread context management</description>
2704       <board name="uVision Simulator" vendor="Keil"/>
2705       <project>
2706         <environment name="uv" load="RTOS.uvmpw"/>
2707       </project>
2708       <attributes>
2709         <component Cclass="CMSIS" Cgroup="CORE"/>
2710         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2711         <component Cclass="Device" Cgroup="Startup"/>
2712         <category>Getting Started</category>
2713       </attributes>
2714     </example>
2715
2716     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2717       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2718       <board name="uVision Simulator" vendor="Keil"/>
2719       <project>
2720         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2721       </project>
2722       <attributes>
2723         <component Cclass="CMSIS" Cgroup="CORE"/>
2724         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2725         <component Cclass="Device" Cgroup="Startup"/>
2726         <category>Getting Started</category>
2727       </attributes>
2728     </example>
2729
2730   </examples>
2731
2732 </package>