begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.2-dev2">
  12       CMSIS-RTOS2:
  13       - RTX 5.1.1 (see revision history for details)
  14     </release>
  15     <release version="5.0.2-dev1">
  16       CMSIS CORE_A:
  17       - Added Cortex-A core support, ARMCC specific:
  18         - Core specific register definitions
  19         - Generic Interrupt Controller functions
  20         - Generic Timer functions
  21         - L1 and L2 Cache functions
  22         - MMU functions
  23       - Added ARMCA5, ARMCA7 and ARMCA9 devices
  24       - Added Startup, System and MMU configuration files
  25     </release>
  26     <release version="5.0.2-dev0">
  27       CMSIS-Core: 5.0.2 (see revision history for details)
  28       - Added macros __UNALIGNED_UINT16_READ, __UNALIGNED_UINT16_WRITE
  29       - Added macros __UNALIGNED_UINT32_READ, __UNALIGNED_UINT32_WRITE
  30       - Set macro __UNALIGNED_UINT32 to deprecated
  31     </release>
  32     <release version="5.0.1" date="2017-02-03">
  33       Package Description:
  34       - added taxonomy for Cclass RTOS
  35       CMSIS-RTOS2:
  36       - API 2.1   (see revision history for details)
  37       - RTX 5.1.0 (see revision history for details)
  38       CMSIS-Core: 5.0.1 (see revision history for details)
  39       - Added __PACKED_STRUCT macro
  40       - Added uVisior support
  41       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  42       - Updated template for secure main function (main_s.c)
  43       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  44       CMSIS-DSP: 1.5.1 (see revision history for details)
  45       - added ARMv8M DSP libraries.
  46       CMSIS-PACK:1.4.9 (see revision history for details)
  47       - added Pack Index File specification and schema file
  48     </release>
  49     <release version="5.0.0" date="2016-11-11">
  50       Changed open source license to Apache 2.0
  51       CMSIS_Core:
  52        - Added support for Cortex-M23 and Cortex-M33.
  53        - Added ARMv8-M device configurations for mainline and baseline.
  54        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  55        - Added cmsis_compiler.h to unify compiler behaviour.
  56        - Updated function SCB_EnableICache (for Cortex-M7).
  57        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  58       CMSIS-RTOS:
  59         - bug fix in RTX 4.82 (see revision history for details)
  60       CMSIS-RTOS2:
  61         - new API including compatibility layer to CMSIS-RTOS
  62         - reference implementation based on RTX5
  63         - supports all Cortex-M variants including TrustZone for ARMv8-M
  64       CMSIS-SVD:
  65        - reworked SVD format documentation
  66        - removed SVD file database documentation as SVD files are distributed in packs
  67        - updated SVDConv for Win32 and Linux
  68       CMSIS-DSP:
  69        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  70        - Added DSP libraries build projects to CMSIS pack.
  71     </release>
  72     <release version="4.5.0" date="2015-10-28">
  73       - CMSIS-Core     4.30.0  (see revision history for details)
  74       - CMSIS-DAP      1.1.0   (unchanged)
  75       - CMSIS-Driver   2.04.0  (see revision history for details)
  76       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  77       - CMSIS-PACK     1.4.1   (see revision history for details)
  78       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  79       - CMSIS-SVD      1.3.1   (see revision history for details)
  80     </release>
  81     <release version="4.4.0" date="2015-09-11">
  82       - CMSIS-Core     4.20   (see revision history for details)
  83       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  84       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  85       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  86       - CMSIS-RTOS
  87         -- API         1.02   (unchanged)
  88         -- RTX         4.79   (see revision history for details)
  89       - CMSIS-SVD      1.3.0  (see revision history for details)
  90       - CMSIS-DAP      1.1.0  (extended with SWO support)
  91     </release>
  92     <release version="4.3.0" date="2015-03-20">
  93       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  94       - CMSIS-DSP      1.4.5  (see revision history for details)
  95       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  96       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  97       - CMSIS-RTOS
  98         -- API         1.02   (unchanged)
  99         -- RTX         4.78   (see revision history for details)
 100       - CMSIS-SVD      1.2    (unchanged)
 101     </release>
 102     <release version="4.2.0" date="2014-09-24">
 103       Adding Cortex-M7 support
 104       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 105       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 106       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 107       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 108       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 109     </release>
 110     <release version="4.1.1" date="2014-06-30">
 111       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 112     </release>
 113     <release version="4.1.0" date="2014-06-12">
 114       - CMSIS-Driver   2.02  (incompatible update)
 115       - CMSIS-Pack     1.3   (see revision history for details)
 116       - CMSIS-DSP      1.4.2 (unchanged)
 117       - CMSIS-Core     3.30  (unchanged)
 118       - CMSIS-RTOS RTX 4.74  (unchanged)
 119       - CMSIS-RTOS API 1.02  (unchanged)
 120       - CMSIS-SVD      1.10  (unchanged)
 121       PACK:
 122       - removed G++ specific files from PACK
 123       - added Component Startup variant "C Startup"
 124       - added Pack Checking Utility
 125       - updated conditions to reflect tool-chain dependency
 126       - added Taxonomy for Graphics
 127       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 128     </release>
 129     <release version="4.0.0">
 130       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 131       - CMSIS-Pack     1.1   Preliminary
 132       - CMSIS-DSP      1.4.2 (see revision history for details)
 133       - CMSIS-Core     3.30  (see revision history for details)
 134       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 135       - CMSIS-RTOS API 1.02  (unchanged)
 136       - CMSIS-SVD      1.10  (unchanged)
 137     </release>
 138     <release version="3.20.4">
 139       - CMSIS-RTOS 4.74 (see revision history for details)
 140       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 141     </release>
 142     <release version="3.20.3">
 143       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 144       - CMSIS-RTOS 4.73 (see revision history for details)
 145     </release>
 146     <release version="3.20.2">
 147       - CMSIS-Pack documentation has been added
 148       - CMSIS-Drivers header and documentation have been added to PACK
 149       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 150     </release>
 151     <release version="3.20.1">
 152       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 153       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 154     </release>
 155     <release version="3.20.0">
 156       The software portions that are deployed in the application program are now under a BSD license which allows usage
 157       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 158       The individual components have been update as listed below:
 159       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 160       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 161       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 162       - CMSIS-SVD is unchanged.
 163     </release>
 164   </releases>
 165
 166   <taxonomy>
 167     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 168     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 169     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 170     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 171     <description Cclass="File System">File Drive Support and File System</description>
 172     <description Cclass="Graphics">Graphical User Interface</description>
 173     <description Cclass="Network">Network Stack using Internet Protocols</description>
 174     <description Cclass="USB">Universal Serial Bus Stack</description>
 175     <description Cclass="Compiler">Compiler Software Extensions</description>
 176     <description Cclass="RTOS">Real-time Operating System</description>
 177   </taxonomy>
 178
 179   <devices>
 180     <!-- ******************************  Cortex-M0  ****************************** -->
 181     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 182       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 183       <description>
 184 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 185 - simple, easy-to-use programmers model
 186 - highly efficient ultra-low power operation
 187 - excellent code density
 188 - deterministic, high-performance interrupt handling
 189 - upward compatibility with the rest of the Cortex-M processor family.
 190       </description>
 191       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 192       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 193       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 194       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 195
 196       <device Dname="ARMCM0">
 197         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 198         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 199       </device>
 200     </family>
 201
 202     <!-- ******************************  Cortex-M0P  ****************************** -->
 203     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 204       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 205       <description>
 206 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 207 - simple, easy-to-use programmers model
 208 - highly efficient ultra-low power operation
 209 - excellent code density
 210 - deterministic, high-performance interrupt handling
 211 - upward compatibility with the rest of the Cortex-M processor family.
 212       </description>
 213       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 214       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 215       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 216       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 217
 218       <device Dname="ARMCM0P">
 219         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 220         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 221       </device>
 222     </family>
 223
 224     <!-- ******************************  Cortex-M3  ****************************** -->
 225     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 226       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 227       <description>
 228 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 229 - simple, easy-to-use programmers model
 230 - highly efficient ultra-low power operation
 231 - excellent code density
 232 - deterministic, high-performance interrupt handling
 233 - upward compatibility with the rest of the Cortex-M processor family.
 234       </description>
 235       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 236       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 237       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 238       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 239
 240       <device Dname="ARMCM3">
 241         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 242         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 243       </device>
 244     </family>
 245
 246     <!-- ******************************  Cortex-M4  ****************************** -->
 247     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 248       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 249       <description>
 250 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 251 - simple, easy-to-use programmers model
 252 - highly efficient ultra-low power operation
 253 - excellent code density
 254 - deterministic, high-performance interrupt handling
 255 - upward compatibility with the rest of the Cortex-M processor family.
 256       </description>
 257       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 258       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 259       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 260       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 261
 262       <device Dname="ARMCM4">
 263         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 264         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 265       </device>
 266
 267       <device Dname="ARMCM4_FP">
 268         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 269         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 270       </device>
 271     </family>
 272
 273     <!-- ******************************  Cortex-M7  ****************************** -->
 274     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 275       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 276       <description>
 277 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 278 - simple, easy-to-use programmers model
 279 - highly efficient ultra-low power operation
 280 - excellent code density
 281 - deterministic, high-performance interrupt handling
 282 - upward compatibility with the rest of the Cortex-M processor family.
 283       </description>
 284       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 285       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 286       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 287       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 288
 289       <device Dname="ARMCM7">
 290         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 291         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 292       </device>
 293
 294       <device Dname="ARMCM7_SP">
 295         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 296         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 297       </device>
 298
 299       <device Dname="ARMCM7_DP">
 300         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 301         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 302       </device>
 303     </family>
 304
 305     <!-- ******************************  Cortex-M23  ********************** -->
 306     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 307       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 308       <description>
 309 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 310 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 311 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 312       </description>
 313       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 314       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 315       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 316       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 317       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 318       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 319
 320       <device Dname="ARMCM23">
 321         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 322         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 323       </device>
 324
 325       <device Dname="ARMCM23_TZ">
 326         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 327         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 328       </device>
 329     </family>
 330
 331     <!-- ******************************  Cortex-M33  ****************************** -->
 332     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 333       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 334       <description>
 335 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 336 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 337       </description>
 338       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 339       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 340       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 341       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 342       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 343       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 344
 345       <device Dname="ARMCM33">
 346         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 347         <description>
 348           no DSP Instructions, no Floating Point Unit, no TrustZone
 349         </description>
 350         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 351       </device>
 352
 353       <device Dname="ARMCM33_TZ">
 354         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 355         <description>
 356           no DSP Instructions, no Floating Point Unit, TrustZone
 357         </description>
 358         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 359       </device>
 360
 361       <device Dname="ARMCM33_DSP_FP">
 362         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 363         <description>
 364           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 365         </description>
 366         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 367       </device>
 368
 369       <device Dname="ARMCM33_DSP_FP_TZ">
 370         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 371         <description>
 372           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 373         </description>
 374         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 375       </device>
 376     </family>
 377
 378     <!-- ******************************  ARMSC000  ****************************** -->
 379     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 380       <description>
 381 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 382 - simple, easy-to-use programmers model
 383 - highly efficient ultra-low power operation
 384 - excellent code density
 385 - deterministic, high-performance interrupt handling
 386       </description>
 387       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 388       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 389       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 390       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 391
 392       <device Dname="ARMSC000">
 393         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 394         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 395       </device>
 396     </family>
 397
 398     <!-- ******************************  ARMSC300  ****************************** -->
 399     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 400       <description>
 401 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 402 - simple, easy-to-use programmers model
 403 - highly efficient ultra-low power operation
 404 - excellent code density
 405 - deterministic, high-performance interrupt handling
 406       </description>
 407       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 408       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 409       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 410       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 411
 412       <device Dname="ARMSC300">
 413         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 414         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 415       </device>
 416     </family>
 417
 418     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 419     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 420       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 421       <description>
 422 ARMv8-M Baseline based device with TrustZone
 423       </description>
 424       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 425       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 426       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 427       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 428       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 429       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 430
 431       <device Dname="ARMv8MBL">
 432         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 433         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 434       </device>
 435     </family>
 436
 437     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 438     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 439       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 440       <description>
 441 ARMv8-M Mainline based device with TrustZone
 442       </description>
 443       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 444       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 445       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 446       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 447       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 448       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 449
 450       <device Dname="ARMv8MML">
 451         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 452         <description>
 453           no DSP Instructions, no Floating Point Unit, TrustZone
 454         </description>
 455         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 456       </device>
 457
 458       <device Dname="ARMv8MML_DSP">
 459         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 460         <description>
 461           DSP Instructions, no Floating Point Unit, TrustZone
 462         </description>
 463         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 464       </device>
 465
 466       <device Dname="ARMv8MML_SP">
 467         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 468         <description>
 469           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 470         </description>
 471         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 472       </device>
 473
 474       <device Dname="ARMv8MML_DSP_SP">
 475         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 476         <description>
 477           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 478         </description>
 479         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 480       </device>
 481
 482       <device Dname="ARMv8MML_DP">
 483         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 484         <description>
 485           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 486         </description>
 487         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 488       </device>
 489
 490       <device Dname="ARMv8MML_DSP_DP">
 491         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 492         <description>
 493           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 494         </description>
 495         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 496       </device>
 497     </family>
 498
 499     <!-- ******************************  Cortex-A5  ****************************** -->
 500     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 501       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 502       <description>
 503 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 504 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 505 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 506       </description>
 507
 508       <device Dname="ARMCA5">
 509         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 510         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 511       </device>
 512     </family>
 513
 514     <!-- ******************************  Cortex-A7  ****************************** -->
 515     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 516       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 517       <description>
 518 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 519 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 520 an optional integrated GIC, and an optional L2 cache controller.
 521       </description>
 522
 523       <device Dname="ARMCA7">
 524         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 525         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 526       </device>
 527     </family>
 528
 529     <!-- ******************************  Cortex-A9  ****************************** -->
 530     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 531       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 532       <description>
 533 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 534 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 535 and 8-bit Java bytecodes in Jazelle state.
 536       </description>
 537
 538       <device Dname="ARMCA9">
 539         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 540         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 541       </device>
 542     </family>
 543   </devices>
 544
 545
 546   <apis>
 547     <!-- CMSIS-RTOS API -->
 548     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 549       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 550       <files>
 551         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 552       </files>
 553     </api>
 554     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.0" exclusive="1">
 555       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 556       <files>
 557         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 558         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 559       </files>
 560     </api>
 561     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 562       <description>USART Driver API for Cortex-M</description>
 563       <files>
 564         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 565         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 566       </files>
 567     </api>
 568     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 569       <description>SPI Driver API for Cortex-M</description>
 570       <files>
 571         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 572         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 573       </files>
 574     </api>
 575     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 576       <description>SAI Driver API for Cortex-M</description>
 577       <files>
 578         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 579         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 580       </files>
 581     </api>
 582     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 583       <description>I2C Driver API for Cortex-M</description>
 584       <files>
 585         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 586         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 587       </files>
 588     </api>
 589     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
 590       <description>CAN Driver API for Cortex-M</description>
 591       <files>
 592         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 593         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 594       </files>
 595     </api>
 596     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 597       <description>Flash Driver API for Cortex-M</description>
 598       <files>
 599         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 600         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 601       </files>
 602     </api>
 603     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 604       <description>MCI Driver API for Cortex-M</description>
 605       <files>
 606         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 607         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 608       </files>
 609     </api>
 610     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 611       <description>NAND Flash Driver API for Cortex-M</description>
 612       <files>
 613         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 614         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 615       </files>
 616     </api>
 617     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 618       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 619       <files>
 620         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 621         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 622         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 623       </files>
 624     </api>
 625     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 626       <description>Ethernet MAC Driver API for Cortex-M</description>
 627       <files>
 628         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 629         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 630       </files>
 631     </api>
 632     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 633       <description>Ethernet PHY Driver API for Cortex-M</description>
 634       <files>
 635         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 636         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 637       </files>
 638     </api>
 639     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 640       <description>USB Device Driver API for Cortex-M</description>
 641       <files>
 642         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 643         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 644       </files>
 645     </api>
 646     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 647       <description>USB Host Driver API for Cortex-M</description>
 648       <files>
 649         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 650         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 651       </files>
 652     </api>
 653   </apis>
 654
 655   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 656   <conditions>
 657     <!-- compiler -->
 658     <condition id="ARMCC">
 659       <require Tcompiler="ARMCC"/>
 660     </condition>
 661     <condition id="GCC">
 662       <require Tcompiler="GCC"/>
 663     </condition>
 664     <condition id="IAR">
 665       <require Tcompiler="IAR"/>
 666     </condition>
 667     <condition id="ARMCC GCC">
 668       <accept Tcompiler="ARMCC"/>
 669       <accept Tcompiler="GCC"/>
 670     </condition>
 671     <condition id="ARMCC GCC IAR">
 672       <accept Tcompiler="ARMCC"/>
 673       <accept Tcompiler="GCC"/>
 674       <accept Tcompiler="IAR"/>
 675     </condition>
 676
 677     <!-- ARM architecture -->
 678     <condition id="ARMv6-M Device">
 679       <description>ARMv6-M architecture based device</description>
 680       <accept Dcore="Cortex-M0"/>
 681       <accept Dcore="Cortex-M0+"/>
 682       <accept Dcore="SC000"/>
 683     </condition>
 684     <condition id="ARMv7-M Device">
 685       <description>ARMv7-M architecture based device</description>
 686       <accept Dcore="Cortex-M3"/>
 687       <accept Dcore="Cortex-M4"/>
 688       <accept Dcore="Cortex-M7"/>
 689       <accept Dcore="SC300"/>
 690     </condition>
 691     <condition id="ARMv8-M Device">
 692       <description>ARMv8-M architecture based device</description>
 693       <accept Dcore="ARMV8MBL"/>
 694       <accept Dcore="ARMV8MML"/>
 695       <accept Dcore="Cortex-M23"/>
 696       <accept Dcore="Cortex-M33"/>
 697     </condition>
 698     <condition id="ARMv8-M TZ Device">
 699       <description>ARMv8-M architecture based device with TrustZone</description>
 700       <require condition="ARMv8-M Device"/>
 701       <require Dtz="TZ"/>
 702     </condition>
 703     <condition id="ARMv6_7-M Device">
 704       <description>ARMv6_7-M architecture based device</description>
 705       <accept condition="ARMv6-M Device"/>
 706       <accept condition="ARMv7-M Device"/>
 707     </condition>
 708     <condition id="ARMv6_7_8-M Device">
 709       <description>ARMv6_7_8-M architecture based device</description>
 710       <accept condition="ARMv6-M Device"/>
 711       <accept condition="ARMv7-M Device"/>
 712       <accept condition="ARMv8-M Device"/>
 713     </condition>
 714     <condition id="ARMv7-A Device">
 715       <description>ARMv7-A architecture based device</description>
 716       <accept Dcore="Cortex-A5"/>
 717       <accept Dcore="Cortex-A7"/>
 718       <accept Dcore="Cortex-A9"/>
 719     </condition>
 720
 721     <!-- ARM core -->
 722     <condition id="CM0">
 723       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 724       <accept Dcore="Cortex-M0"/>
 725       <accept Dcore="Cortex-M0+"/>
 726       <accept Dcore="SC000"/>
 727     </condition>
 728     <condition id="CM3">
 729       <description>Cortex-M3 or SC300 processor based device</description>
 730       <accept Dcore="Cortex-M3"/>
 731       <accept Dcore="SC300"/>
 732     </condition>
 733     <condition id="CM4">
 734       <description>Cortex-M4 processor based device</description>
 735       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 736     </condition>
 737     <condition id="CM4_FP">
 738       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 739       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 740     </condition>
 741     <condition id="CM7">
 742       <description>Cortex-M7 processor based device</description>
 743       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 744     </condition>
 745     <condition id="CM7_FP">
 746       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 747       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 748       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 749     </condition>
 750     <condition id="CM7_SP">
 751       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 752       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 753     </condition>
 754     <condition id="CM7_DP">
 755       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 756       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 757     </condition>
 758     <condition id="CM23">
 759       <description>Cortex-M23 processor based device</description>
 760       <require Dcore="Cortex-M23"/>
 761     </condition>
 762     <condition id="CM33">
 763       <description>Cortex-M33 processor based device</description>
 764       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 765     </condition>
 766     <condition id="CM33_FP">
 767       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 768       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 769     </condition>
 770     <condition id="ARMv8MBL">
 771       <description>ARMv8-M Baseline processor based device</description>
 772       <require Dcore="ARMV8MBL"/>
 773     </condition>
 774     <condition id="ARMv8MML">
 775       <description>ARMv8-M Mainline processor based device</description>
 776       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 777     </condition>
 778     <condition id="ARMv8MML_FP">
 779       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 780       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 781       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 782     </condition>
 783
 784     <condition id="CM33_NODSP_NOFPU">
 785       <description>CM33, no DSP, no FPU</description>
 786       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 787     </condition>
 788     <condition id="CM33_DSP_NOFPU">
 789       <description>CM33, DSP, no FPU</description>
 790       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 791     </condition>
 792     <condition id="CM33_NODSP_SP">
 793       <description>CM33, no DSP, SP FPU</description>
 794       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 795     </condition>
 796     <condition id="CM33_DSP_SP">
 797       <description>CM33, DSP, SP FPU</description>
 798       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 799     </condition>
 800
 801     <condition id="ARMv8MML_NODSP_NOFPU">
 802       <description>ARMv8MML, no DSP, no FPU</description>
 803       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 804     </condition>
 805     <condition id="ARMv8MML_DSP_NOFPU">
 806       <description>ARMv8MML, DSP, no FPU</description>
 807       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 808     </condition>
 809     <condition id="ARMv8MML_NODSP_SP">
 810       <description>ARMv8MML, no DSP, SP FPU</description>
 811       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 812     </condition>
 813     <condition id="ARMv8MML_DSP_SP">
 814       <description>ARMv8MML, DSP, SP FPU</description>
 815       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 816     </condition>
 817
 818     <!-- ARMCC compiler -->
 819     <condition id="CM0_ARMCC">
 820       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 821       <require condition="CM0"/>
 822       <require Tcompiler="ARMCC"/>
 823     </condition>
 824     <condition id="CM0_LE_ARMCC">
 825       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 826       <require condition="CM0_ARMCC"/>
 827       <require Dendian="Little-endian"/>
 828     </condition>
 829     <condition id="CM0_BE_ARMCC">
 830       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 831       <require condition="CM0_ARMCC"/>
 832       <require Dendian="Big-endian"/>
 833     </condition>
 834
 835     <condition id="CM3_ARMCC">
 836       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 837       <require condition="CM3"/>
 838       <require Tcompiler="ARMCC"/>
 839     </condition>
 840     <condition id="CM3_LE_ARMCC">
 841       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 842       <require condition="CM3_ARMCC"/>
 843       <require Dendian="Little-endian"/>
 844     </condition>
 845     <condition id="CM3_BE_ARMCC">
 846       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 847       <require condition="CM3_ARMCC"/>
 848       <require Dendian="Big-endian"/>
 849     </condition>
 850
 851     <condition id="CM4_ARMCC">
 852       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 853       <require condition="CM4"/>
 854       <require Tcompiler="ARMCC"/>
 855     </condition>
 856     <condition id="CM4_LE_ARMCC">
 857       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 858       <require condition="CM4_ARMCC"/>
 859       <require Dendian="Little-endian"/>
 860     </condition>
 861     <condition id="CM4_BE_ARMCC">
 862       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 863       <require condition="CM4_ARMCC"/>
 864       <require Dendian="Big-endian"/>
 865     </condition>
 866
 867     <condition id="CM4_FP_ARMCC">
 868       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 869       <require condition="CM4_FP"/>
 870       <require Tcompiler="ARMCC"/>
 871     </condition>
 872     <condition id="CM4_FP_LE_ARMCC">
 873       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 874       <require condition="CM4_FP_ARMCC"/>
 875       <require Dendian="Little-endian"/>
 876     </condition>
 877     <condition id="CM4_FP_BE_ARMCC">
 878       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 879       <require condition="CM4_FP_ARMCC"/>
 880       <require Dendian="Big-endian"/>
 881     </condition>
 882
 883     <!-- XMC 4000 Series devices from Infineon require a special library -->
 884     <condition id="CM4_LE_ARMCC_STD">
 885       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 886       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 887       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 888       <require Tcompiler="ARMCC"/>
 889     </condition>
 890     <condition id="CM4_LE_ARMCC_IFX">
 891       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 892       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 893       <require Tcompiler="ARMCC"/>
 894     </condition>
 895     <condition id="CM4_FP_LE_ARMCC_STD">
 896       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 897       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 898       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 899       <require Tcompiler="ARMCC"/>
 900     </condition>
 901     <condition id="CM4_FP_LE_ARMCC_IFX">
 902       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 903       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 904       <require Tcompiler="ARMCC"/>
 905     </condition>
 906
 907     <condition id="CM7_ARMCC">
 908       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 909       <require condition="CM7"/>
 910       <require Tcompiler="ARMCC"/>
 911     </condition>
 912     <condition id="CM7_LE_ARMCC">
 913       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 914       <require condition="CM7_ARMCC"/>
 915       <require Dendian="Little-endian"/>
 916     </condition>
 917     <condition id="CM7_BE_ARMCC">
 918       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 919       <require condition="CM7_ARMCC"/>
 920       <require Dendian="Big-endian"/>
 921     </condition>
 922
 923     <condition id="CM7_FP_ARMCC">
 924       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 925       <require condition="CM7_FP"/>
 926       <require Tcompiler="ARMCC"/>
 927     </condition>
 928     <condition id="CM7_FP_LE_ARMCC">
 929       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 930       <require condition="CM7_FP_ARMCC"/>
 931       <require Dendian="Little-endian"/>
 932     </condition>
 933     <condition id="CM7_FP_BE_ARMCC">
 934       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 935       <require condition="CM7_FP_ARMCC"/>
 936       <require Dendian="Big-endian"/>
 937     </condition>
 938
 939     <condition id="CM7_SP_ARMCC">
 940       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 941       <require condition="CM7_SP"/>
 942       <require Tcompiler="ARMCC"/>
 943     </condition>
 944     <condition id="CM7_SP_LE_ARMCC">
 945       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 946       <require condition="CM7_SP_ARMCC"/>
 947       <require Dendian="Little-endian"/>
 948     </condition>
 949     <condition id="CM7_SP_BE_ARMCC">
 950       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 951       <require condition="CM7_SP_ARMCC"/>
 952       <require Dendian="Big-endian"/>
 953     </condition>
 954
 955     <condition id="CM7_DP_ARMCC">
 956       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 957       <require condition="CM7_DP"/>
 958       <require Tcompiler="ARMCC"/>
 959     </condition>
 960     <condition id="CM7_DP_LE_ARMCC">
 961       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 962       <require condition="CM7_DP_ARMCC"/>
 963       <require Dendian="Little-endian"/>
 964     </condition>
 965     <condition id="CM7_DP_BE_ARMCC">
 966       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 967       <require condition="CM7_DP_ARMCC"/>
 968       <require Dendian="Big-endian"/>
 969     </condition>
 970
 971     <condition id="CM23_ARMCC">
 972       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 973       <require condition="CM23"/>
 974       <require Tcompiler="ARMCC"/>
 975     </condition>
 976     <condition id="CM23_LE_ARMCC">
 977       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 978       <require condition="CM23_ARMCC"/>
 979       <require Dendian="Little-endian"/>
 980     </condition>
 981     <condition id="CM23_BE_ARMCC">
 982       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 983       <require condition="CM23_ARMCC"/>
 984       <require Dendian="Big-endian"/>
 985     </condition>
 986
 987     <condition id="CM33_ARMCC">
 988       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 989       <require condition="CM33"/>
 990       <require Tcompiler="ARMCC"/>
 991     </condition>
 992     <condition id="CM33_LE_ARMCC">
 993       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 994       <require condition="CM33_ARMCC"/>
 995       <require Dendian="Little-endian"/>
 996     </condition>
 997     <condition id="CM33_BE_ARMCC">
 998       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 999       <require condition="CM33_ARMCC"/>
1000       <require Dendian="Big-endian"/>
1001     </condition>
1002
1003     <condition id="CM33_FP_ARMCC">
1004       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1005       <require condition="CM33_FP"/>
1006       <require Tcompiler="ARMCC"/>
1007     </condition>
1008     <condition id="CM33_FP_LE_ARMCC">
1009       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1010       <require condition="CM33_FP_ARMCC"/>
1011       <require Dendian="Little-endian"/>
1012     </condition>
1013     <condition id="CM33_FP_BE_ARMCC">
1014       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1015       <require condition="CM33_FP_ARMCC"/>
1016       <require Dendian="Big-endian"/>
1017     </condition>
1018
1019     <condition id="CM33_NODSP_NOFPU_ARMCC">
1020       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1021       <require condition="CM33_NODSP_NOFPU"/>
1022       <require Tcompiler="ARMCC"/>
1023     </condition>
1024     <condition id="CM33_DSP_NOFPU_ARMCC">
1025       <description>CM33, DSP, no FPU, ARM Compiler</description>
1026       <require condition="CM33_DSP_NOFPU"/>
1027       <require Tcompiler="ARMCC"/>
1028     </condition>
1029     <condition id="CM33_NODSP_SP_ARMCC">
1030       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1031       <require condition="CM33_NODSP_SP"/>
1032       <require Tcompiler="ARMCC"/>
1033     </condition>
1034     <condition id="CM33_DSP_SP_ARMCC">
1035       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1036       <require condition="CM33_DSP_SP"/>
1037       <require Tcompiler="ARMCC"/>
1038     </condition>
1039     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1040       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1041       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1042       <require Dendian="Little-endian"/>
1043     </condition>
1044     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1045       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1046       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1047       <require Dendian="Little-endian"/>
1048     </condition>
1049     <condition id="CM33_NODSP_SP_LE_ARMCC">
1050       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1051       <require condition="CM33_NODSP_SP_ARMCC"/>
1052       <require Dendian="Little-endian"/>
1053     </condition>
1054     <condition id="CM33_DSP_SP_LE_ARMCC">
1055       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1056       <require condition="CM33_DSP_SP_ARMCC"/>
1057       <require Dendian="Little-endian"/>
1058     </condition>
1059
1060     <condition id="ARMv8MBL_ARMCC">
1061       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1062       <require condition="ARMv8MBL"/>
1063       <require Tcompiler="ARMCC"/>
1064     </condition>
1065     <condition id="ARMv8MBL_LE_ARMCC">
1066       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1067       <require condition="ARMv8MBL_ARMCC"/>
1068       <require Dendian="Little-endian"/>
1069     </condition>
1070     <condition id="ARMv8MBL_BE_ARMCC">
1071       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1072       <require condition="ARMv8MBL_ARMCC"/>
1073       <require Dendian="Big-endian"/>
1074     </condition>
1075
1076     <condition id="ARMv8MML_ARMCC">
1077       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1078       <require condition="ARMv8MML"/>
1079       <require Tcompiler="ARMCC"/>
1080     </condition>
1081     <condition id="ARMv8MML_LE_ARMCC">
1082       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1083       <require condition="ARMv8MML_ARMCC"/>
1084       <require Dendian="Little-endian"/>
1085     </condition>
1086     <condition id="ARMv8MML_BE_ARMCC">
1087       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1088       <require condition="ARMv8MML_ARMCC"/>
1089       <require Dendian="Big-endian"/>
1090     </condition>
1091
1092     <condition id="ARMv8MML_FP_ARMCC">
1093       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1094       <require condition="ARMv8MML_FP"/>
1095       <require Tcompiler="ARMCC"/>
1096     </condition>
1097     <condition id="ARMv8MML_FP_LE_ARMCC">
1098       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1099       <require condition="ARMv8MML_FP_ARMCC"/>
1100       <require Dendian="Little-endian"/>
1101     </condition>
1102     <condition id="ARMv8MML_FP_BE_ARMCC">
1103       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1104       <require condition="ARMv8MML_FP_ARMCC"/>
1105       <require Dendian="Big-endian"/>
1106     </condition>
1107
1108     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1109       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1110       <require condition="ARMv8MML_NODSP_NOFPU"/>
1111       <require Tcompiler="ARMCC"/>
1112     </condition>
1113     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1114       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1115       <require condition="ARMv8MML_DSP_NOFPU"/>
1116       <require Tcompiler="ARMCC"/>
1117     </condition>
1118     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1119       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1120       <require condition="ARMv8MML_NODSP_SP"/>
1121       <require Tcompiler="ARMCC"/>
1122     </condition>
1123     <condition id="ARMv8MML_DSP_SP_ARMCC">
1124       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1125       <require condition="ARMv8MML_DSP_SP"/>
1126       <require Tcompiler="ARMCC"/>
1127     </condition>
1128     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1129       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1130       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1131       <require Dendian="Little-endian"/>
1132     </condition>
1133     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1134       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1135       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1136       <require Dendian="Little-endian"/>
1137     </condition>
1138     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1139       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1140       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1141       <require Dendian="Little-endian"/>
1142     </condition>
1143     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1144       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1145       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1146       <require Dendian="Little-endian"/>
1147     </condition>
1148
1149     <!-- GCC compiler -->
1150     <condition id="CM0_GCC">
1151       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1152       <require condition="CM0"/>
1153       <require Tcompiler="GCC"/>
1154     </condition>
1155     <condition id="CM0_LE_GCC">
1156       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1157       <require condition="CM0_GCC"/>
1158       <require Dendian="Little-endian"/>
1159     </condition>
1160     <condition id="CM0_BE_GCC">
1161       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1162       <require condition="CM0_GCC"/>
1163       <require Dendian="Big-endian"/>
1164     </condition>
1165
1166     <condition id="CM3_GCC">
1167       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1168       <require condition="CM3"/>
1169       <require Tcompiler="GCC"/>
1170     </condition>
1171     <condition id="CM3_LE_GCC">
1172       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1173       <require condition="CM3_GCC"/>
1174       <require Dendian="Little-endian"/>
1175     </condition>
1176     <condition id="CM3_BE_GCC">
1177       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1178       <require condition="CM3_GCC"/>
1179       <require Dendian="Big-endian"/>
1180     </condition>
1181
1182     <condition id="CM4_GCC">
1183       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1184       <require condition="CM4"/>
1185       <require Tcompiler="GCC"/>
1186     </condition>
1187     <condition id="CM4_LE_GCC">
1188       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1189       <require condition="CM4_GCC"/>
1190       <require Dendian="Little-endian"/>
1191     </condition>
1192     <condition id="CM4_BE_GCC">
1193       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1194       <require condition="CM4_GCC"/>
1195       <require Dendian="Big-endian"/>
1196     </condition>
1197
1198     <condition id="CM4_FP_GCC">
1199       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1200       <require condition="CM4_FP"/>
1201       <require Tcompiler="GCC"/>
1202     </condition>
1203     <condition id="CM4_FP_LE_GCC">
1204       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1205       <require condition="CM4_FP_GCC"/>
1206       <require Dendian="Little-endian"/>
1207     </condition>
1208     <condition id="CM4_FP_BE_GCC">
1209       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1210       <require condition="CM4_FP_GCC"/>
1211       <require Dendian="Big-endian"/>
1212     </condition>
1213
1214     <!-- XMC 4000 Series devices from Infineon require a special library -->
1215     <condition id="CM4_LE_GCC_STD">
1216       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1217       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1218       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1219       <require Tcompiler="GCC"/>
1220     </condition>
1221     <condition id="CM4_LE_GCC_IFX">
1222       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1223       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1224       <require Tcompiler="GCC"/>
1225     </condition>
1226     <condition id="CM4_FP_LE_GCC_STD">
1227       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1228       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1229       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1230       <require Tcompiler="GCC"/>
1231     </condition>
1232     <condition id="CM4_FP_LE_GCC_IFX">
1233       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1234       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1235       <require Tcompiler="GCC"/>
1236     </condition>
1237
1238     <condition id="CM7_GCC">
1239       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1240       <require condition="CM7"/>
1241       <require Tcompiler="GCC"/>
1242     </condition>
1243     <condition id="CM7_LE_GCC">
1244       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1245       <require condition="CM7_GCC"/>
1246       <require Dendian="Little-endian"/>
1247     </condition>
1248     <condition id="CM7_BE_GCC">
1249       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1250       <require condition="CM7_GCC"/>
1251       <require Dendian="Big-endian"/>
1252     </condition>
1253
1254     <condition id="CM7_FP_GCC">
1255       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1256       <require condition="CM7_FP"/>
1257       <require Tcompiler="GCC"/>
1258     </condition>
1259     <condition id="CM7_FP_LE_GCC">
1260       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1261       <require condition="CM7_FP_GCC"/>
1262       <require Dendian="Little-endian"/>
1263     </condition>
1264     <condition id="CM7_FP_BE_GCC">
1265       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1266       <require condition="CM7_FP_GCC"/>
1267       <require Dendian="Big-endian"/>
1268     </condition>
1269
1270     <condition id="CM7_SP_GCC">
1271       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1272       <require condition="CM7_SP"/>
1273       <require Tcompiler="GCC"/>
1274     </condition>
1275     <condition id="CM7_SP_LE_GCC">
1276       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1277       <require condition="CM7_SP_GCC"/>
1278       <require Dendian="Little-endian"/>
1279     </condition>
1280     <condition id="CM7_SP_BE_GCC">
1281       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1282       <require condition="CM7_SP_GCC"/>
1283       <require Dendian="Big-endian"/>
1284     </condition>
1285
1286     <condition id="CM7_DP_GCC">
1287       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1288       <require condition="CM7_DP"/>
1289       <require Tcompiler="GCC"/>
1290     </condition>
1291     <condition id="CM7_DP_LE_GCC">
1292       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1293       <require condition="CM7_DP_GCC"/>
1294       <require Dendian="Little-endian"/>
1295     </condition>
1296     <condition id="CM7_DP_BE_GCC">
1297       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1298       <require condition="CM7_DP_GCC"/>
1299       <require Dendian="Big-endian"/>
1300     </condition>
1301
1302     <condition id="CM23_GCC">
1303       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1304       <require condition="CM23"/>
1305       <require Tcompiler="GCC"/>
1306     </condition>
1307     <condition id="CM23_LE_GCC">
1308       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1309       <require condition="CM23_GCC"/>
1310       <require Dendian="Little-endian"/>
1311     </condition>
1312     <condition id="CM23_BE_GCC">
1313       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1314       <require condition="CM23_GCC"/>
1315       <require Dendian="Big-endian"/>
1316     </condition>
1317
1318     <condition id="CM33_GCC">
1319       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1320       <require condition="CM33"/>
1321       <require Tcompiler="GCC"/>
1322     </condition>
1323     <condition id="CM33_LE_GCC">
1324       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1325       <require condition="CM33_GCC"/>
1326       <require Dendian="Little-endian"/>
1327     </condition>
1328     <condition id="CM33_BE_GCC">
1329       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1330       <require condition="CM33_GCC"/>
1331       <require Dendian="Big-endian"/>
1332     </condition>
1333
1334     <condition id="CM33_FP_GCC">
1335       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1336       <require condition="CM33_FP"/>
1337       <require Tcompiler="GCC"/>
1338     </condition>
1339     <condition id="CM33_FP_LE_GCC">
1340       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1341       <require condition="CM33_FP_GCC"/>
1342       <require Dendian="Little-endian"/>
1343     </condition>
1344     <condition id="CM33_FP_BE_GCC">
1345       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1346       <require condition="CM33_FP_GCC"/>
1347       <require Dendian="Big-endian"/>
1348     </condition>
1349
1350     <condition id="CM33_NODSP_NOFPU_GCC">
1351       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1352       <require condition="CM33_NODSP_NOFPU"/>
1353       <require Tcompiler="GCC"/>
1354     </condition>
1355     <condition id="CM33_DSP_NOFPU_GCC">
1356       <description>CM33, DSP, no FPU, GCC Compiler</description>
1357       <require condition="CM33_DSP_NOFPU"/>
1358       <require Tcompiler="GCC"/>
1359     </condition>
1360     <condition id="CM33_NODSP_SP_GCC">
1361       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1362       <require condition="CM33_NODSP_SP"/>
1363       <require Tcompiler="GCC"/>
1364     </condition>
1365     <condition id="CM33_DSP_SP_GCC">
1366       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1367       <require condition="CM33_DSP_SP"/>
1368       <require Tcompiler="GCC"/>
1369     </condition>
1370     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1371       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1372       <require condition="CM33_NODSP_NOFPU_GCC"/>
1373       <require Dendian="Little-endian"/>
1374     </condition>
1375     <condition id="CM33_DSP_NOFPU_LE_GCC">
1376       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1377       <require condition="CM33_DSP_NOFPU_GCC"/>
1378       <require Dendian="Little-endian"/>
1379     </condition>
1380     <condition id="CM33_NODSP_SP_LE_GCC">
1381       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1382       <require condition="CM33_NODSP_SP_GCC"/>
1383       <require Dendian="Little-endian"/>
1384     </condition>
1385     <condition id="CM33_DSP_SP_LE_GCC">
1386       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1387       <require condition="CM33_DSP_SP_GCC"/>
1388       <require Dendian="Little-endian"/>
1389     </condition>
1390
1391     <condition id="ARMv8MBL_GCC">
1392       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1393       <require condition="ARMv8MBL"/>
1394       <require Tcompiler="GCC"/>
1395     </condition>
1396     <condition id="ARMv8MBL_LE_GCC">
1397       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1398       <require condition="ARMv8MBL_GCC"/>
1399       <require Dendian="Little-endian"/>
1400     </condition>
1401     <condition id="ARMv8MBL_BE_GCC">
1402       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1403       <require condition="ARMv8MBL_GCC"/>
1404       <require Dendian="Big-endian"/>
1405     </condition>
1406
1407     <condition id="ARMv8MML_GCC">
1408       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1409       <require condition="ARMv8MML"/>
1410       <require Tcompiler="GCC"/>
1411     </condition>
1412     <condition id="ARMv8MML_LE_GCC">
1413       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1414       <require condition="ARMv8MML_GCC"/>
1415       <require Dendian="Little-endian"/>
1416     </condition>
1417     <condition id="ARMv8MML_BE_GCC">
1418       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1419       <require condition="ARMv8MML_GCC"/>
1420       <require Dendian="Big-endian"/>
1421     </condition>
1422
1423     <condition id="ARMv8MML_FP_GCC">
1424       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1425       <require condition="ARMv8MML_FP"/>
1426       <require Tcompiler="GCC"/>
1427     </condition>
1428     <condition id="ARMv8MML_FP_LE_GCC">
1429       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1430       <require condition="ARMv8MML_FP_GCC"/>
1431       <require Dendian="Little-endian"/>
1432     </condition>
1433     <condition id="ARMv8MML_FP_BE_GCC">
1434       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1435       <require condition="ARMv8MML_FP_GCC"/>
1436       <require Dendian="Big-endian"/>
1437     </condition>
1438
1439     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1440       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1441       <require condition="ARMv8MML_NODSP_NOFPU"/>
1442       <require Tcompiler="GCC"/>
1443     </condition>
1444     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1445       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1446       <require condition="ARMv8MML_DSP_NOFPU"/>
1447       <require Tcompiler="GCC"/>
1448     </condition>
1449     <condition id="ARMv8MML_NODSP_SP_GCC">
1450       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1451       <require condition="ARMv8MML_NODSP_SP"/>
1452       <require Tcompiler="GCC"/>
1453     </condition>
1454     <condition id="ARMv8MML_DSP_SP_GCC">
1455       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1456       <require condition="ARMv8MML_DSP_SP"/>
1457       <require Tcompiler="GCC"/>
1458     </condition>
1459     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1460       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1461       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1462       <require Dendian="Little-endian"/>
1463     </condition>
1464     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1465       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1466       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1467       <require Dendian="Little-endian"/>
1468     </condition>
1469     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1470       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1471       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1472       <require Dendian="Little-endian"/>
1473     </condition>
1474     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1475       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1476       <require condition="ARMv8MML_DSP_SP_GCC"/>
1477       <require Dendian="Little-endian"/>
1478     </condition>
1479
1480     <!-- IAR compiler -->
1481     <condition id="CM0_IAR">
1482       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1483       <require condition="CM0"/>
1484       <require Tcompiler="IAR"/>
1485     </condition>
1486     <condition id="CM0_LE_IAR">
1487       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1488       <require condition="CM0_IAR"/>
1489       <require Dendian="Little-endian"/>
1490     </condition>
1491     <condition id="CM0_BE_IAR">
1492       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1493       <require condition="CM0_IAR"/>
1494       <require Dendian="Big-endian"/>
1495     </condition>
1496
1497     <condition id="CM3_IAR">
1498       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1499       <require condition="CM3"/>
1500       <require Tcompiler="IAR"/>
1501     </condition>
1502     <condition id="CM3_LE_IAR">
1503       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1504       <require condition="CM3_IAR"/>
1505       <require Dendian="Little-endian"/>
1506     </condition>
1507     <condition id="CM3_BE_IAR">
1508       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1509       <require condition="CM3_IAR"/>
1510       <require Dendian="Big-endian"/>
1511     </condition>
1512
1513     <condition id="CM4_IAR">
1514       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1515       <require condition="CM4"/>
1516       <require Tcompiler="IAR"/>
1517     </condition>
1518     <condition id="CM4_LE_IAR">
1519       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1520       <require condition="CM4_IAR"/>
1521       <require Dendian="Little-endian"/>
1522     </condition>
1523     <condition id="CM4_BE_IAR">
1524       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1525       <require condition="CM4_IAR"/>
1526       <require Dendian="Big-endian"/>
1527     </condition>
1528
1529     <condition id="CM4_FP_IAR">
1530       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1531       <require condition="CM4_FP"/>
1532       <require Tcompiler="IAR"/>
1533     </condition>
1534     <condition id="CM4_FP_LE_IAR">
1535       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1536       <require condition="CM4_FP_IAR"/>
1537       <require Dendian="Little-endian"/>
1538     </condition>
1539     <condition id="CM4_FP_BE_IAR">
1540       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1541       <require condition="CM4_FP_IAR"/>
1542       <require Dendian="Big-endian"/>
1543     </condition>
1544
1545     <condition id="CM7_IAR">
1546       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1547       <require condition="CM7"/>
1548       <require Tcompiler="IAR"/>
1549     </condition>
1550     <condition id="CM7_LE_IAR">
1551       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1552       <require condition="CM7_IAR"/>
1553       <require Dendian="Little-endian"/>
1554     </condition>
1555     <condition id="CM7_BE_IAR">
1556       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1557       <require condition="CM7_IAR"/>
1558       <require Dendian="Big-endian"/>
1559     </condition>
1560
1561     <condition id="CM7_FP_IAR">
1562       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1563       <require condition="CM7_FP"/>
1564       <require Tcompiler="IAR"/>
1565     </condition>
1566     <condition id="CM7_FP_LE_IAR">
1567       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1568       <require condition="CM7_FP_IAR"/>
1569       <require Dendian="Little-endian"/>
1570     </condition>
1571     <condition id="CM7_FP_BE_IAR">
1572       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1573       <require condition="CM7_FP_IAR"/>
1574       <require Dendian="Big-endian"/>
1575     </condition>
1576
1577     <condition id="CM7_SP_IAR">
1578       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1579       <require condition="CM7_SP"/>
1580       <require Tcompiler="IAR"/>
1581     </condition>
1582     <condition id="CM7_SP_LE_IAR">
1583       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1584       <require condition="CM7_SP_IAR"/>
1585       <require Dendian="Little-endian"/>
1586     </condition>
1587     <condition id="CM7_SP_BE_IAR">
1588       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1589       <require condition="CM7_SP_IAR"/>
1590       <require Dendian="Big-endian"/>
1591     </condition>
1592
1593     <condition id="CM7_DP_IAR">
1594       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1595       <require condition="CM7_DP"/>
1596       <require Tcompiler="IAR"/>
1597     </condition>
1598     <condition id="CM7_DP_LE_IAR">
1599       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1600       <require condition="CM7_DP_IAR"/>
1601       <require Dendian="Little-endian"/>
1602     </condition>
1603     <condition id="CM7_DP_BE_IAR">
1604       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1605       <require condition="CM7_DP_IAR"/>
1606       <require Dendian="Big-endian"/>
1607     </condition>
1608
1609     <!-- conditions selecting single devices and CMSIS Core -->
1610     <!-- used for component startup, GCC version is used for C-Startup -->
1611     <condition id="ARMCM0 CMSIS">
1612       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1613       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1614       <require Cclass="CMSIS" Cgroup="CORE"/>
1615     </condition>
1616     <condition id="ARMCM0 CMSIS GCC">
1617       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1618       <require condition="ARMCM0 CMSIS"/>
1619       <require condition="GCC"/>
1620     </condition>
1621
1622     <condition id="ARMCM0+ CMSIS">
1623       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1624       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1625       <require Cclass="CMSIS" Cgroup="CORE"/>
1626     </condition>
1627     <condition id="ARMCM0+ CMSIS GCC">
1628       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1629       <require condition="ARMCM0+ CMSIS"/>
1630       <require condition="GCC"/>
1631     </condition>
1632
1633     <condition id="ARMCM3 CMSIS">
1634       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1635       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1636       <require Cclass="CMSIS" Cgroup="CORE"/>
1637     </condition>
1638     <condition id="ARMCM3 CMSIS GCC">
1639       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1640       <require condition="ARMCM3 CMSIS"/>
1641       <require condition="GCC"/>
1642     </condition>
1643
1644     <condition id="ARMCM4 CMSIS">
1645       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1646       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1647       <require Cclass="CMSIS" Cgroup="CORE"/>
1648     </condition>
1649     <condition id="ARMCM4 CMSIS GCC">
1650       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1651       <require condition="ARMCM4 CMSIS"/>
1652       <require condition="GCC"/>
1653     </condition>
1654
1655     <condition id="ARMCM7 CMSIS">
1656       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1657       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1658       <require Cclass="CMSIS" Cgroup="CORE"/>
1659     </condition>
1660     <condition id="ARMCM7 CMSIS GCC">
1661       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1662       <require condition="ARMCM7 CMSIS"/>
1663       <require condition="GCC"/>
1664     </condition>
1665
1666     <condition id="ARMCM23 CMSIS">
1667       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1668       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1669       <require Cclass="CMSIS" Cgroup="CORE"/>
1670     </condition>
1671     <condition id="ARMCM23 CMSIS GCC">
1672       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1673       <require condition="ARMCM23 CMSIS"/>
1674       <require condition="GCC"/>
1675     </condition>
1676
1677     <condition id="ARMCM33 CMSIS">
1678       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1679       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1680       <require Cclass="CMSIS" Cgroup="CORE"/>
1681     </condition>
1682     <condition id="ARMCM33 CMSIS GCC">
1683       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1684       <require condition="ARMCM33 CMSIS"/>
1685       <require condition="GCC"/>
1686     </condition>
1687
1688     <condition id="ARMSC000 CMSIS">
1689       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1690       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1691       <require Cclass="CMSIS" Cgroup="CORE"/>
1692     </condition>
1693     <condition id="ARMSC000 CMSIS GCC">
1694       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1695       <require condition="ARMSC000 CMSIS"/>
1696       <require condition="GCC"/>
1697     </condition>
1698
1699     <condition id="ARMSC300 CMSIS">
1700       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1701       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1702       <require Cclass="CMSIS" Cgroup="CORE"/>
1703     </condition>
1704     <condition id="ARMSC300 CMSIS GCC">
1705       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1706       <require condition="ARMSC300 CMSIS"/>
1707       <require condition="GCC"/>
1708     </condition>
1709
1710     <condition id="ARMv8MBL CMSIS">
1711       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1712       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1713       <require Cclass="CMSIS" Cgroup="CORE"/>
1714     </condition>
1715     <condition id="ARMv8MBL CMSIS GCC">
1716       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1717       <require condition="ARMv8MBL CMSIS"/>
1718       <require condition="GCC"/>
1719     </condition>
1720
1721     <condition id="ARMv8MML CMSIS">
1722       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1723       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1724       <require Cclass="CMSIS" Cgroup="CORE"/>
1725     </condition>
1726     <condition id="ARMv8MML CMSIS GCC">
1727       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1728       <require condition="ARMv8MML CMSIS"/>
1729       <require condition="GCC"/>
1730     </condition>
1731
1732     <condition id="ARMCA5 CMSIS">
1733       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1734       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1735       <require Cclass="CMSIS" Cgroup="CORE"/>
1736     </condition>
1737
1738     <condition id="ARMCA7 CMSIS">
1739       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1740       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1741       <require Cclass="CMSIS" Cgroup="CORE"/>
1742     </condition>
1743
1744     <condition id="ARMCA9 CMSIS">
1745       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1746       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1747       <require Cclass="CMSIS" Cgroup="CORE"/>
1748     </condition>
1749
1750     <!-- CMSIS DSP -->
1751     <condition id="CMSIS DSP">
1752       <description>Components required for DSP</description>
1753       <require condition="ARMv6_7_8-M Device"/>
1754       <require condition="ARMCC GCC"/>
1755       <require Cclass="CMSIS" Cgroup="CORE"/>
1756     </condition>
1757
1758     <!-- RTOS RTX -->
1759     <condition id="RTOS RTX">
1760       <description>Components required for RTOS RTX</description>
1761       <require condition="ARMv6_7-M Device"/>
1762       <require condition="ARMCC GCC IAR"/>
1763       <require Cclass="Device" Cgroup="Startup"/>
1764       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1765     </condition>
1766     <condition id="RTOS RTX5">
1767       <description>Components required for RTOS RTX5</description>
1768       <require condition="ARMv6_7_8-M Device"/>
1769       <require condition="ARMCC GCC IAR"/>
1770       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1771     </condition>
1772     <condition id="RTOS2 RTX5">
1773       <description>Components required for RTOS2 RTX5</description>
1774       <require condition="ARMv6_7_8-M Device"/>
1775       <require condition="ARMCC GCC IAR"/>
1776       <require Cclass="CMSIS"  Cgroup="CORE"/>
1777       <require Cclass="Device" Cgroup="Startup"/>
1778     </condition>
1779     <condition id="RTOS2 RTX5 NS">
1780       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1781       <require condition="ARMv8-M TZ Device"/>
1782       <require condition="ARMCC GCC"/>
1783       <require Cclass="CMSIS"  Cgroup="CORE"/>
1784       <require Cclass="Device" Cgroup="Startup"/>
1785     </condition>
1786
1787   </conditions>
1788
1789   <components>
1790     <!-- CMSIS-Core component -->
1791     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.1"  condition="ARMv6_7_8-M Device" >
1792       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1793       <files>
1794         <!-- CPU independent -->
1795         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1796         <file category="include" name="CMSIS/Include/"/>
1797         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1798         <!-- Code template -->
1799         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1800         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1801       </files>
1802     </component>
1803
1804     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0"  condition="ARMv7-A Device" >
1805       <description>CMSIS-CORE for Cortex-A</description>
1806       <files>
1807         <!-- CPU independent -->
1808         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1809         <file category="include" name="CMSIS/Core_A/Include/"/>
1810       </files>
1811     </component>
1812
1813     <!-- CMSIS-Startup components -->
1814     <!-- Cortex-M0 -->
1815     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1816       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1817       <files>
1818         <!-- include folder / device header file -->
1819         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1820         <!-- startup / system file -->
1821         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1822         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1823         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1824         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1825         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1826       </files>
1827     </component>
1828     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1829       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1830       <files>
1831         <!-- include folder / device header file -->
1832         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1833         <!-- startup / system file -->
1834         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1835         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1836         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1837       </files>
1838     </component>
1839
1840     <!-- Cortex-M0+ -->
1841     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1842       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1843       <files>
1844         <!-- include folder / device header file -->
1845         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1846         <!-- startup / system file -->
1847         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1848         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1849         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1850         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1851         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1852       </files>
1853     </component>
1854     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1855       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1856       <files>
1857         <!-- include folder / device header file -->
1858         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1859         <!-- startup / system file -->
1860         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1861         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1862         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1863       </files>
1864     </component>
1865
1866     <!-- Cortex-M3 -->
1867     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1868       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1869       <files>
1870         <!-- include folder / device header file -->
1871         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1872         <!-- startup / system file -->
1873         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1874         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1875         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1876         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1877         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1878       </files>
1879     </component>
1880     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1881       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1882       <files>
1883         <!-- include folder / device header file -->
1884         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1885         <!-- startup / system file -->
1886         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1887         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1888         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1889       </files>
1890     </component>
1891
1892     <!-- Cortex-M4 -->
1893     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1894       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1895       <files>
1896         <!-- include folder / device header file -->
1897         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1898         <!-- startup / system file -->
1899         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1900         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1901         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1902         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1903         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1904       </files>
1905     </component>
1906     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1907       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1908       <files>
1909         <!-- include folder / device header file -->
1910         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1911         <!-- startup / system file -->
1912         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1913         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1914         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1915       </files>
1916     </component>
1917
1918     <!-- Cortex-M7 -->
1919     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1920       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1921       <files>
1922         <!-- include folder / device header file -->
1923         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1924         <!-- startup / system file -->
1925         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1926         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1927         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1928         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1929         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1930       </files>
1931     </component>
1932     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1933       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1934       <files>
1935         <!-- include folder / device header file -->
1936         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1937         <!-- startup / system file -->
1938         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1939         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1940         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1941       </files>
1942     </component>
1943
1944     <!-- Cortex-M23 -->
1945     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1946       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1947       <files>
1948         <!-- include folder / device header file -->
1949         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1950         <!-- startup / system file -->
1951         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1952         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1953         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1954         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1955         <!-- SAU configuration -->
1956         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1957       </files>
1958     </component>
1959     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1960       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1961       <files>
1962         <!-- include folder / device header file -->
1963         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1964         <!-- startup / system file -->
1965         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1966         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1967         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1968         <!-- SAU configuration -->
1969         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1970       </files>
1971     </component>
1972
1973     <!-- Cortex-M33 -->
1974     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
1975       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1976       <files>
1977         <!-- include folder / device header file -->
1978         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1979         <!-- startup / system file -->
1980         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
1981         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
1982         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1983         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
1984         <!-- SAU configuration -->
1985         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1986       </files>
1987     </component>
1988     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
1989       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1990       <files>
1991         <!-- include folder / device header file -->
1992         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1993         <!-- startup / system file -->
1994         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
1995         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1996         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
1997         <!-- SAU configuration -->
1998         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1999       </files>
2000     </component>
2001
2002     <!-- Cortex-SC000 -->
2003     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2004       <description>System and Startup for Generic ARM SC000 device</description>
2005       <files>
2006         <!-- include folder / device header file -->
2007         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2008         <!-- startup / system file -->
2009         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2010         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2011         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2012         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2013         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2014       </files>
2015     </component>
2016     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2017       <description>System and Startup for Generic ARM SC000 device</description>
2018       <files>
2019         <!-- include folder / device header file -->
2020         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2021         <!-- startup / system file -->
2022         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2023         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2024         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2025       </files>
2026     </component>
2027
2028     <!-- Cortex-SC300 -->
2029     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2030       <description>System and Startup for Generic ARM SC300 device</description>
2031       <files>
2032         <!-- include folder / device header file -->
2033         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2034         <!-- startup / system file -->
2035         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2036         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2037         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2038         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2039         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2040       </files>
2041     </component>
2042     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2043       <description>System and Startup for Generic ARM SC300 device</description>
2044       <files>
2045         <!-- include folder / device header file -->
2046         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2047         <!-- startup / system file -->
2048         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2049         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2050         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2051       </files>
2052     </component>
2053
2054     <!-- ARMv8MBL -->
2055     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2056       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2057       <files>
2058         <!-- include folder / device header file -->
2059         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2060         <!-- startup / system file -->
2061         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2062         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2063         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2064         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2065         <!-- SAU configuration -->
2066         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2067       </files>
2068     </component>
2069     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2070       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2071       <files>
2072         <!-- include folder / device header file -->
2073         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2074         <!-- startup / system file -->
2075         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2076         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2077         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2078         <!-- SAU configuration -->
2079         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2080       </files>
2081     </component>
2082
2083     <!-- ARMv8MML -->
2084     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2085       <description>System and Startup for Generic ARM ARMv8MML device</description>
2086       <files>
2087         <!-- include folder / device header file -->
2088         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2089         <!-- startup / system file -->
2090         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2091         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2092         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2093         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2094         <!-- SAU configuration -->
2095         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2096       </files>
2097     </component>
2098     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2099       <description>System and Startup for Generic ARM ARMv8MML device</description>
2100       <files>
2101         <!-- include folder / device header file -->
2102         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2103         <!-- startup / system file -->
2104         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2105         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2106         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2107         <!-- SAU configuration -->
2108         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2109       </files>
2110     </component>
2111
2112     <!-- Cortex-A5 -->
2113     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2114       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2115       <files>
2116         <!-- include folder / device header file -->
2117         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2118         <!-- startup / system / mmu files -->
2119         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/ARM/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC"/>
2120         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2121         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2122         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2123         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2124         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/ARM/ARMCA5.sct"       version="1.0.0" attr="config"/>
2125       </files>
2126     </component>
2127
2128     <!-- Cortex-A7 -->
2129     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2130       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2131       <files>
2132         <!-- include folder / device header file -->
2133         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2134         <!-- startup / system / mmu files -->
2135         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/ARM/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC"/>
2136         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2137         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2138         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2139         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2140         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/ARM/ARMCA7.sct"       version="1.0.0" attr="config"/>
2141       </files>
2142     </component>
2143
2144     <!-- Cortex-A9 -->
2145     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA9 CMSIS">
2146       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2147       <files>
2148         <!-- include folder / device header file -->
2149         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2150         <!-- startup / system / mmu files -->
2151         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/ARM/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC"/>
2152         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2153         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2154         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2155         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2156         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/ARM/ARMCA9.sct"       version="1.0.0" attr="config"/>
2157       </files>
2158     </component>
2159
2160     <!-- CMSIS-DSP component -->
2161     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
2162       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2163       <files>
2164         <!-- CPU independent -->
2165         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2166         <file category="header" name="CMSIS/Include/arm_math.h"/>
2167
2168         <!-- CPU and Compiler dependent -->
2169         <!-- ARMCC -->
2170         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2171         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2172         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2173         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2174         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2175         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2176         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2177         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2178         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2179         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2180         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2181         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2182         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2183         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2184
2185         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2186         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2187         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2188         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2189         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2190         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2191         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2192         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2193         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2194         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2195         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2196         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2197
2198         <!-- GCC -->
2199         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2200         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2201         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2202         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2203         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2204         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2205         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2206
2207         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2208         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2209         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2210         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2211         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2212         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2213         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2214         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2215         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2216         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2217         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2218         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2219
2220       </files>
2221     </component>
2222
2223     <!-- CMSIS-RTOS Keil RTX component -->
2224     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
2225       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2226       <RTE_Components_h>
2227         <!-- the following content goes into file 'RTE_Components.h' -->
2228         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2229         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2230       </RTE_Components_h>
2231       <files>
2232         <!-- CPU independent -->
2233         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2234         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2235         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2236
2237         <!-- RTX templates -->
2238         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2239         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2240         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2241         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2242         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2243         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2244         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2245         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2246         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2247         <!-- tool-chain specific template file -->
2248         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2249         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2250         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2251
2252         <!-- CPU and Compiler dependent -->
2253         <!-- ARMCC -->
2254         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2255         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2256         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2257         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2258         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2259         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2260         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2261         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2262         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2263         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2264         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2265         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2266         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2267         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2268         <!-- GCC -->
2269         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2270         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2271         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2272         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2273         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2274         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2275         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2276         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2277         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2278         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2279         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2280         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2281         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2282         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2283         <!-- IAR -->
2284         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2285         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2286         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2287         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2288         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2289         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2290         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2291         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2292         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2293         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2294         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2295         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2296       </files>
2297     </component>
2298
2299     <!-- CMSIS-RTOS Keil RTX5 component -->
2300     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.1.1" Capiversion="1.0.0" condition="RTOS RTX5">
2301       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2302       <RTE_Components_h>
2303         <!-- the following content goes into file 'RTE_Components.h' -->
2304         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2305         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2306       </RTE_Components_h>
2307       <files>
2308         <!-- RTX header file -->
2309         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2310         <!-- RTX compatibility module for API V1 -->
2311         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2312       </files>
2313     </component>
2314
2315     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2316     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5">
2317       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2318       <RTE_Components_h>
2319         <!-- the following content goes into file 'RTE_Components.h' -->
2320         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2321         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2322       </RTE_Components_h>
2323       <files>
2324         <!-- RTX documentation -->
2325         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2326
2327         <!-- RTX header files -->
2328         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2329
2330         <!-- RTX configuration -->
2331         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2332         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2333
2334         <!-- RTX templates -->
2335         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2336         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2337         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2338         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2339         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2340         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2341         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2342         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2343         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="2.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2344         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2345
2346         <!-- RTX library configuration -->
2347         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2348
2349         <!-- RTX libraries (CPU and Compiler dependent) -->
2350         <!-- ARMCC -->
2351         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2352         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2353         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2354         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2355         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2356         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2357         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2358         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2359         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2360         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2361         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2362         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2363         <!-- GCC -->
2364         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2365         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2366         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2367         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2368         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2369         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2370         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2371         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2372         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2373         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2374         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2375         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2376         <!-- IAR -->
2377         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2378         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2379         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2380         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2381         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2382         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2383       </files>
2384     </component>
2385     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2386       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2387       <RTE_Components_h>
2388         <!-- the following content goes into file 'RTE_Components.h' -->
2389         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2390         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2391         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2392       </RTE_Components_h>
2393       <files>
2394         <!-- RTX documentation -->
2395         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2396
2397         <!-- RTX header files -->
2398         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2399
2400         <!-- RTX configuration -->
2401         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2402         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2403
2404         <!-- RTX templates -->
2405         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2406         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2407         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2408         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2409         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2413         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2414
2415         <!-- RTX library configuration -->
2416         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2417
2418         <!-- RTX libraries (CPU and Compiler dependent) -->
2419         <!-- ARMCC -->
2420         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2421         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2422         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2423         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2424         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2425         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2426         <!-- GCC -->
2427         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2428         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2429         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2430         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2431         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2432         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2433       </files>
2434     </component>
2435     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5">
2436       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2437       <RTE_Components_h>
2438         <!-- the following content goes into file 'RTE_Components.h' -->
2439         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2440         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2441         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2442       </RTE_Components_h>
2443       <files>
2444         <!-- RTX documentation -->
2445         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2446
2447         <!-- RTX header files -->
2448         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2449
2450         <!-- RTX configuration -->
2451         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2452         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2453
2454         <!-- RTX templates -->
2455         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2456         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2457         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2458         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2459         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2460         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2461         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2462         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2463         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2464
2465         <!-- RTX sources (core) -->
2466         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2467         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2468         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2469         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2470         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2471         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2472         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2473         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2474         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2475         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2476         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2477         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2478         <!-- RTX sources (library configuration) -->
2479         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2480         <!-- RTX sources (handlers ARMCC) -->
2481         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2482         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2483         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2484         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2485         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2486         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2487         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2488         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2489         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2490         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2491         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2492         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2493         <!-- RTX sources (handlers GCC) -->
2494         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2495         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2496         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2497         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2498         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2499         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2500         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2501         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2502         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2503         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2504         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2505         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2506         <!-- RTX sources (handlers IAR) -->
2507         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2508         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2509         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2510         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2511         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2512         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2513       </files>
2514     </component>
2515     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2516       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2517       <RTE_Components_h>
2518         <!-- the following content goes into file 'RTE_Components.h' -->
2519         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2520         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2521         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2522         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2523       </RTE_Components_h>
2524       <files>
2525         <!-- RTX documentation -->
2526         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2527
2528         <!-- RTX header files -->
2529         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2530
2531         <!-- RTX configuration -->
2532         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2533         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2534
2535         <!-- RTX templates -->
2536         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2537         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2538         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2539         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2540         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2541         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2542         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2543         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2544         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2545
2546         <!-- RTX sources (core) -->
2547         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2548         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2549         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2550         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2551         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2552         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2553         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2554         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2555         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2556         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2557         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2558         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2559         <!-- RTX sources (library configuration) -->
2560         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2561         <!-- RTX sources (ARMCC handlers) -->
2562         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2563         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2564         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2565         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2566         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2567         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2568         <!-- RTX sources (GCC handlers) -->
2569         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2570         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2571         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2572         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2573         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2574         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2575       </files>
2576     </component>
2577
2578   </components>
2579
2580   <boards>
2581     <board name="uVision Simulator" vendor="Keil">
2582       <description>uVision Simulator</description>
2583       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2584       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2585       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2586       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2587       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2588       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2589       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2590       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2591       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2592       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2593       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2594       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2595       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2596       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2597       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2598       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2599       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2600       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2601    </board>
2602   </boards>
2603
2604   <examples>
2605     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2606       <description>DSP_Lib Class Marks example</description>
2607       <board name="uVision Simulator" vendor="Keil"/>
2608       <project>
2609         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2610       </project>
2611       <attributes>
2612         <component Cclass="CMSIS" Cgroup="CORE"/>
2613         <component Cclass="CMSIS" Cgroup="DSP"/>
2614         <component Cclass="Device" Cgroup="Startup"/>
2615         <category>Getting Started</category>
2616       </attributes>
2617     </example>
2618
2619     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2620       <description>DSP_Lib Convolution example</description>
2621       <board name="uVision Simulator" vendor="Keil"/>
2622       <project>
2623         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2624       </project>
2625       <attributes>
2626         <component Cclass="CMSIS" Cgroup="CORE"/>
2627         <component Cclass="CMSIS" Cgroup="DSP"/>
2628         <component Cclass="Device" Cgroup="Startup"/>
2629         <category>Getting Started</category>
2630       </attributes>
2631     </example>
2632
2633     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2634       <description>DSP_Lib Dotproduct example</description>
2635       <board name="uVision Simulator" vendor="Keil"/>
2636       <project>
2637         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2638       </project>
2639       <attributes>
2640         <component Cclass="CMSIS" Cgroup="CORE"/>
2641         <component Cclass="CMSIS" Cgroup="DSP"/>
2642         <component Cclass="Device" Cgroup="Startup"/>
2643         <category>Getting Started</category>
2644       </attributes>
2645     </example>
2646
2647     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2648       <description>DSP_Lib FFT Bin example</description>
2649       <board name="uVision Simulator" vendor="Keil"/>
2650       <project>
2651         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2652       </project>
2653       <attributes>
2654         <component Cclass="CMSIS" Cgroup="CORE"/>
2655         <component Cclass="CMSIS" Cgroup="DSP"/>
2656         <component Cclass="Device" Cgroup="Startup"/>
2657         <category>Getting Started</category>
2658       </attributes>
2659     </example>
2660
2661     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2662       <description>DSP_Lib FIR example</description>
2663       <board name="uVision Simulator" vendor="Keil"/>
2664       <project>
2665         <environment name="uv" load="arm_fir_example.uvprojx"/>
2666       </project>
2667       <attributes>
2668         <component Cclass="CMSIS" Cgroup="CORE"/>
2669         <component Cclass="CMSIS" Cgroup="DSP"/>
2670         <component Cclass="Device" Cgroup="Startup"/>
2671         <category>Getting Started</category>
2672       </attributes>
2673     </example>
2674
2675     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2676       <description>DSP_Lib Graphic Equalizer example</description>
2677       <board name="uVision Simulator" vendor="Keil"/>
2678       <project>
2679         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2680       </project>
2681       <attributes>
2682         <component Cclass="CMSIS" Cgroup="CORE"/>
2683         <component Cclass="CMSIS" Cgroup="DSP"/>
2684         <component Cclass="Device" Cgroup="Startup"/>
2685         <category>Getting Started</category>
2686       </attributes>
2687     </example>
2688
2689     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2690       <description>DSP_Lib Linear Interpolation example</description>
2691       <board name="uVision Simulator" vendor="Keil"/>
2692       <project>
2693         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2694       </project>
2695       <attributes>
2696         <component Cclass="CMSIS" Cgroup="CORE"/>
2697         <component Cclass="CMSIS" Cgroup="DSP"/>
2698         <component Cclass="Device" Cgroup="Startup"/>
2699         <category>Getting Started</category>
2700       </attributes>
2701     </example>
2702
2703     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2704       <description>DSP_Lib Matrix example</description>
2705       <board name="uVision Simulator" vendor="Keil"/>
2706       <project>
2707         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2708       </project>
2709       <attributes>
2710         <component Cclass="CMSIS" Cgroup="CORE"/>
2711         <component Cclass="CMSIS" Cgroup="DSP"/>
2712         <component Cclass="Device" Cgroup="Startup"/>
2713         <category>Getting Started</category>
2714       </attributes>
2715     </example>
2716
2717     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2718       <description>DSP_Lib Signal Convergence example</description>
2719       <board name="uVision Simulator" vendor="Keil"/>
2720       <project>
2721         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2722       </project>
2723       <attributes>
2724         <component Cclass="CMSIS" Cgroup="CORE"/>
2725         <component Cclass="CMSIS" Cgroup="DSP"/>
2726         <component Cclass="Device" Cgroup="Startup"/>
2727         <category>Getting Started</category>
2728       </attributes>
2729     </example>
2730
2731     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2732       <description>DSP_Lib Sinus/Cosinus example</description>
2733       <board name="uVision Simulator" vendor="Keil"/>
2734       <project>
2735         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2736       </project>
2737       <attributes>
2738         <component Cclass="CMSIS" Cgroup="CORE"/>
2739         <component Cclass="CMSIS" Cgroup="DSP"/>
2740         <component Cclass="Device" Cgroup="Startup"/>
2741         <category>Getting Started</category>
2742       </attributes>
2743     </example>
2744
2745     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2746       <description>DSP_Lib Variance example</description>
2747       <board name="uVision Simulator" vendor="Keil"/>
2748       <project>
2749         <environment name="uv" load="arm_variance_example.uvprojx"/>
2750       </project>
2751       <attributes>
2752         <component Cclass="CMSIS" Cgroup="CORE"/>
2753         <component Cclass="CMSIS" Cgroup="DSP"/>
2754         <component Cclass="Device" Cgroup="Startup"/>
2755         <category>Getting Started</category>
2756       </attributes>
2757     </example>
2758
2759     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2760       <description>CMSIS-RTOS2 Blinky example</description>
2761       <board name="uVision Simulator" vendor="Keil"/>
2762       <project>
2763         <environment name="uv" load="Blinky.uvprojx"/>
2764       </project>
2765       <attributes>
2766         <component Cclass="CMSIS" Cgroup="CORE"/>
2767         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2768         <component Cclass="Device" Cgroup="Startup"/>
2769         <category>Getting Started</category>
2770       </attributes>
2771     </example>
2772
2773     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2774       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2775       <board name="uVision Simulator" vendor="Keil"/>
2776       <project>
2777         <environment name="uv" load="Blinky.uvprojx"/>
2778       </project>
2779       <attributes>
2780         <component Cclass="CMSIS" Cgroup="CORE"/>
2781         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2782         <component Cclass="Device" Cgroup="Startup"/>
2783         <category>Getting Started</category>
2784       </attributes>
2785     </example>
2786
2787     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2788       <description>Bare-metal secure/non-secure example without RTOS</description>
2789       <board name="uVision Simulator" vendor="Keil"/>
2790       <project>
2791         <environment name="uv" load="NoRTOS.uvmpw"/>
2792       </project>
2793       <attributes>
2794         <component Cclass="CMSIS" Cgroup="CORE"/>
2795         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2796         <component Cclass="Device" Cgroup="Startup"/>
2797         <category>Getting Started</category>
2798       </attributes>
2799     </example>
2800
2801     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2802       <description>Secure/non-secure RTOS example with thread context management</description>
2803       <board name="uVision Simulator" vendor="Keil"/>
2804       <project>
2805         <environment name="uv" load="RTOS.uvmpw"/>
2806       </project>
2807       <attributes>
2808         <component Cclass="CMSIS" Cgroup="CORE"/>
2809         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2810         <component Cclass="Device" Cgroup="Startup"/>
2811         <category>Getting Started</category>
2812       </attributes>
2813     </example>
2814
2815     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2816       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2817       <board name="uVision Simulator" vendor="Keil"/>
2818       <project>
2819         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2820       </project>
2821       <attributes>
2822         <component Cclass="CMSIS" Cgroup="CORE"/>
2823         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2824         <component Cclass="Device" Cgroup="Startup"/>
2825         <category>Getting Started</category>
2826       </attributes>
2827     </example>
2828
2829   </examples>
2830
2831 </package>