begriffs open source - cmsis/blob - v6.1.0-rc0/Core/group__mpu8__functions.html

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 128 <a href="#nested-classes">Data Structures</a> &#124;
 129 <a href="#define-members">Macros</a> &#124;
 130 <a href="#func-members">Functions</a>  </div>
 131   <div class="headertitle"><div class="title">MPU Functions for Armv8-M</div></div>
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 134
 135 <p>Functions that relate to the Memory Protection Unit.
 136 <a href="#details">More...</a></p>
 137 <table class="memberdecls">
 138 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
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 201 <tr class="separator:gac1c0b1a3b22d0c0ea875355039eae4c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
 202 <tr class="memitem:gaa865e157ac3fc278d39c5c688165252b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaa865e157ac3fc278d39c5c688165252b">MPU_ATTR_NORMAL_INNER_WT_RA</a></td></tr>
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 204 <tr class="memitem:ga4550de69e30075efc70213a79b929e92"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga4550de69e30075efc70213a79b929e92">MPU_ATTR_NORMAL_INNER_WT_WA</a></td></tr>
 205 <tr class="separator:ga4550de69e30075efc70213a79b929e92"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 207 <tr class="separator:gae871e61119bdab6409a01fd45aa28811"><td class="memSeparator" colspan="2">&#160;</td></tr>
 208 <tr class="memitem:ga9ae76961b518f86ba1d390913f4ee45e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9ae76961b518f86ba1d390913f4ee45e">MPU_ATTR_NORMAL_INNER_WB_TR_RA</a></td></tr>
 209 <tr class="separator:ga9ae76961b518f86ba1d390913f4ee45e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 210 <tr class="memitem:ga2e30e4ab7f3aee0a16399f6de178e532"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga2e30e4ab7f3aee0a16399f6de178e532">MPU_ATTR_NORMAL_INNER_WB_TR_WA</a></td></tr>
 211 <tr class="separator:ga2e30e4ab7f3aee0a16399f6de178e532"><td class="memSeparator" colspan="2">&#160;</td></tr>
 212 <tr class="memitem:gaf63176f20e4a30bd283463c98c363cf2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaf63176f20e4a30bd283463c98c363cf2">MPU_ATTR_NORMAL_INNER_WB_TR_RA_WA</a></td></tr>
 213 <tr class="separator:gaf63176f20e4a30bd283463c98c363cf2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 214 <tr class="memitem:ga17b7f3281e42f8507336f709520e9785"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga17b7f3281e42f8507336f709520e9785">MPU_ATTR_NORMAL_INNER_WB_RA</a></td></tr>
 215 <tr class="separator:ga17b7f3281e42f8507336f709520e9785"><td class="memSeparator" colspan="2">&#160;</td></tr>
 216 <tr class="memitem:gacb7962caa69fd238b5d8bbfb60a7a959"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gacb7962caa69fd238b5d8bbfb60a7a959">MPU_ATTR_NORMAL_INNER_WB_WA</a></td></tr>
 217 <tr class="separator:gacb7962caa69fd238b5d8bbfb60a7a959"><td class="memSeparator" colspan="2">&#160;</td></tr>
 218 <tr class="memitem:ga61c99cef4678523dd070d863a7385cec"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga61c99cef4678523dd070d863a7385cec">MPU_ATTR_NORMAL_INNER_WB_RA_WA</a></td></tr>
 219 <tr class="separator:ga61c99cef4678523dd070d863a7385cec"><td class="memSeparator" colspan="2">&#160;</td></tr>
 220 <tr class="memitem:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a>(O,  I)</td></tr>
 221 <tr class="memdesc:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory Attribute.  <br /></td></tr>
 222 <tr class="separator:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 223 <tr class="memitem:ga3d0f688198289f72264f73cf72a742e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a></td></tr>
 224 <tr class="memdesc:ga3d0f688198289f72264f73cf72a742e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory non-shareable <br  />
 225   <br /></td></tr>
 226 <tr class="separator:ga3d0f688198289f72264f73cf72a742e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 227 <tr class="memitem:gac4fddbdb9e1350bce6906de33c1fd500"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac4fddbdb9e1350bce6906de33c1fd500">ARM_MPU_SH_OUTER</a></td></tr>
 228 <tr class="memdesc:gac4fddbdb9e1350bce6906de33c1fd500"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory outer shareable <br  />
 229   <br /></td></tr>
 230 <tr class="separator:gac4fddbdb9e1350bce6906de33c1fd500"><td class="memSeparator" colspan="2">&#160;</td></tr>
 231 <tr class="memitem:ga73c70127f24f34781ad463cbe51d8f6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga73c70127f24f34781ad463cbe51d8f6b">ARM_MPU_SH_INNER</a></td></tr>
 232 <tr class="memdesc:ga73c70127f24f34781ad463cbe51d8f6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory inner shareable <br  />
 233   <br /></td></tr>
 234 <tr class="separator:ga73c70127f24f34781ad463cbe51d8f6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 235 <tr class="memitem:ga17ea49d510a4e30ff6026eed9302ae54"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga17ea49d510a4e30ff6026eed9302ae54">ARM_MPU_AP_RW</a></td></tr>
 236 <tr class="memdesc:ga17ea49d510a4e30ff6026eed9302ae54"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, read/write.  <br /></td></tr>
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 238 <tr class="memitem:ga64e249c7c678144b52493a4b6f8f6b3c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a></td></tr>
 239 <tr class="memdesc:ga64e249c7c678144b52493a4b6f8f6b3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, read-only.  <br /></td></tr>
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 241 <tr class="memitem:gae62d5195b6ab6082a3f4a2584c101fab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a></td></tr>
 242 <tr class="memdesc:gae62d5195b6ab6082a3f4a2584c101fab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, any privilege level.  <br /></td></tr>
 243 <tr class="separator:gae62d5195b6ab6082a3f4a2584c101fab"><td class="memSeparator" colspan="2">&#160;</td></tr>
 244 <tr class="memitem:ga52386005c0529821308140cf86e6d1a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga52386005c0529821308140cf86e6d1a5">ARM_MPU_AP_PO</a></td></tr>
 245 <tr class="memdesc:ga52386005c0529821308140cf86e6d1a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, privileged access only.  <br /></td></tr>
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 247 <tr class="memitem:ga8127782b882cbb8419519fc6c98a0b6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a></td></tr>
 248 <tr class="memdesc:ga8127782b882cbb8419519fc6c98a0b6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, Execution only permitted if read permitted.  <br /></td></tr>
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 250 <tr class="memitem:ga613533046759fd317008e9937cda62de"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga613533046759fd317008e9937cda62de">ARM_MPU_EX</a></td></tr>
 251 <tr class="memdesc:ga613533046759fd317008e9937cda62de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, Execution only permitted if read permitted.  <br /></td></tr>
 252 <tr class="separator:ga613533046759fd317008e9937cda62de"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 254 <tr class="memdesc:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory access permissions.  <br /></td></tr>
 255 <tr class="separator:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 256 <tr class="memitem:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gafe39c2f98058bcac7e7e0501e64e7a9d">ARM_MPU_RBAR</a>(BASE,  SH,  RO,  NP,  XN)</td></tr>
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 258 <tr class="separator:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 259 <tr class="memitem:gaeaaa071276ba7956944e6c3dc05d677e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(LIMIT,  IDX)</td></tr>
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 262 <tr class="memitem:ga5bff4d6cfaa678776b3b1eab4af70f95"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5bff4d6cfaa678776b3b1eab4af70f95">ARM_MPU_RLAR_PXN</a>(LIMIT,  PXN,  IDX)</td></tr>
 263 <tr class="memdesc:ga5bff4d6cfaa678776b3b1eab4af70f95"><td class="mdescLeft">&#160;</td><td class="mdescRight">Region Limit Address Register with PXN value.  <br /></td></tr>
 264 <tr class="separator:ga5bff4d6cfaa678776b3b1eab4af70f95"><td class="memSeparator" colspan="2">&#160;</td></tr>
 265 </table><table class="memberdecls">
 266 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 267 Functions</h2></td></tr>
 268 <tr class="memitem:gabd11943b38cdf185dcb8e60e459d5854"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gabd11943b38cdf185dcb8e60e459d5854">ARM_MPU_TYPE</a> ()</td></tr>
 269 <tr class="memdesc:gabd11943b38cdf185dcb8e60e459d5854"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read MPU Type Register.  <br /></td></tr>
 270 <tr class="separator:gabd11943b38cdf185dcb8e60e459d5854"><td class="memSeparator" colspan="2">&#160;</td></tr>
 271 <tr class="memitem:ga5a3f40314553baccdeea551f86d9a997"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997">ARM_MPU_Enable</a> (uint32_t MPU_Control)</td></tr>
 272 <tr class="memdesc:ga5a3f40314553baccdeea551f86d9a997"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the MPU.  <br /></td></tr>
 273 <tr class="separator:ga5a3f40314553baccdeea551f86d9a997"><td class="memSeparator" colspan="2">&#160;</td></tr>
 274 <tr class="memitem:ga61814eba4652a0fdfb76bbe222086327"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga61814eba4652a0fdfb76bbe222086327">ARM_MPU_Disable</a> (void)</td></tr>
 275 <tr class="separator:ga61814eba4652a0fdfb76bbe222086327"><td class="memSeparator" colspan="2">&#160;</td></tr>
 276 <tr class="memitem:ga5866c75d6deb9148a1e9af6337eec50a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5866c75d6deb9148a1e9af6337eec50a">ARM_MPU_Enable_NS</a> (uint32_t MPU_Control)</td></tr>
 277 <tr class="separator:ga5866c75d6deb9148a1e9af6337eec50a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 278 <tr class="memitem:ga389f9b6049d176bc83f9964d3259b712"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga389f9b6049d176bc83f9964d3259b712">ARM_MPU_Disable_NS</a> (void)</td></tr>
 279 <tr class="separator:ga389f9b6049d176bc83f9964d3259b712"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 285 <tr class="separator:ga5100a150a755902af2455a455a329ef9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 286 <tr class="memitem:ga01fa1151c9ec0ba5de76f908c0999316"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga01fa1151c9ec0ba5de76f908c0999316">ARM_MPU_ClrRegionEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr)</td></tr>
 287 <tr class="separator:ga01fa1151c9ec0ba5de76f908c0999316"><td class="memSeparator" colspan="2">&#160;</td></tr>
 288 <tr class="memitem:ga9dcb0afddf4ac351f33f3c7a5169c62c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9dcb0afddf4ac351f33f3c7a5169c62c">ARM_MPU_ClrRegion</a> (uint32_t rnr)</td></tr>
 289 <tr class="separator:ga9dcb0afddf4ac351f33f3c7a5169c62c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 290 <tr class="memitem:gac526bc5bfcf048ce57a44c0c0cdadbe4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac526bc5bfcf048ce57a44c0c0cdadbe4">ARM_MPU_ClrRegion_NS</a> (uint32_t rnr)</td></tr>
 291 <tr class="separator:gac526bc5bfcf048ce57a44c0c0cdadbe4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 292 <tr class="memitem:ga3d50ba8546252bea959e45c8fdf16993"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga3d50ba8546252bea959e45c8fdf16993">ARM_MPU_SetRegionEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
 293 <tr class="separator:ga3d50ba8546252bea959e45c8fdf16993"><td class="memSeparator" colspan="2">&#160;</td></tr>
 294 <tr class="memitem:ga6d7f220015c070c0e469948c1775ee3d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga6d7f220015c070c0e469948c1775ee3d">ARM_MPU_SetRegion</a> (uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
 295 <tr class="separator:ga6d7f220015c070c0e469948c1775ee3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 296 <tr class="memitem:ga7566931ca9bb9f22d213a67ec5f8c745"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga7566931ca9bb9f22d213a67ec5f8c745">ARM_MPU_SetRegion_NS</a> (uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
 297 <tr class="separator:ga7566931ca9bb9f22d213a67ec5f8c745"><td class="memSeparator" colspan="2">&#160;</td></tr>
 298 <tr class="memitem:gac1a949403bf84eecaf407003fb553ae7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac1a949403bf84eecaf407003fb553ae7">ARM_MPU_OrderedMemcpy</a> (volatile uint32_t *dst, const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> src, uint32_t len)</td></tr>
 299 <tr class="separator:gac1a949403bf84eecaf407003fb553ae7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 300 <tr class="memitem:gab6094419f2abd678f1f3b121cd115049"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049">ARM_MPU_LoadEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
 301 <tr class="separator:gab6094419f2abd678f1f3b121cd115049"><td class="memSeparator" colspan="2">&#160;</td></tr>
 302 <tr class="memitem:gaca76614e3091c7324aa9d60e634621bf"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a> (uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
 303 <tr class="separator:gaca76614e3091c7324aa9d60e634621bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 304 <tr class="memitem:ga7f8c6e09be98067d613e4df1832c543d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga7f8c6e09be98067d613e4df1832c543d">ARM_MPU_Load_NS</a> (uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
 305 <tr class="separator:ga7f8c6e09be98067d613e4df1832c543d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 306 </table>
 307 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 308 <p>Functions that relate to the Memory Protection Unit. </p>
 309 <p>The following functions support the optional Memory Protection Unit (MPU) that is available on the Cortex-M23, M33, M35P processor.</p>
 310 <p>The MPU is used to prevent from illegal memory accesses that are typically caused by errors in an application software.</p>
 311 <p><b>Example:</b> </p><div class="fragment"><div class="line"><span class="keywordtype">int</span> main() </div>
 312 <div class="line">{</div>
 313 <div class="line">  <span class="comment">// Set Region 0 using Attr 0</span></div>
 314 <div class="line">  <a class="code hl_function" href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a>(0UL, <a class="code hl_define" href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a>( <span class="comment">/* Normal memory */</span></div>
 315 <div class="line">    <a class="code hl_define" href="group__mpu8__functions.html#ga9425e85dc19e840dd303094f79ed38e3">MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</a>,  <span class="comment">/* Outer Write-Back transient with read and write allocate */</span></div>
 316 <div class="line">    <a class="code hl_define" href="group__mpu8__functions.html#gac1c0b1a3b22d0c0ea875355039eae4c0">MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</a>   <span class="comment">/* Inner Write-Through transient with read and write allocate */</span></div>
 317 <div class="line">  ));</div>
 318 <div class="line">  </div>
 319 <div class="line">  <a class="code hl_function" href="group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d">ARM_MPU_SetRegion</a>(0UL,</div>
 320 <div class="line">    <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x08000000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga17ea49d510a4e30ff6026eed9302ae54">ARM_MPU_AP_RW</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>),  <span class="comment">/* Non-shareable, read/write, non-privileged, execute-never */</span></div>
 321 <div class="line">    <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x080FFFFFUL, MAIR_ATTR(0))                        <span class="comment">/* 1MB memory block using Attr 0 */</span></div>
 322 <div class="line">  );</div>
 323 <div class="line">  </div>
 324 <div class="line">  <a class="code hl_function" href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">ARM_MPU_Enable</a>(0);</div>
 325 <div class="line">  </div>
 326 <div class="line">  <span class="comment">// Execute application code that is access protected by the MPU</span></div>
 327 <div class="line">  </div>
 328 <div class="line">  <a class="code hl_function" href="group__mpu__functions.html#ga7cbc0a4a066ed90e85c8176228235d57">ARM_MPU_Disable</a>();</div>
 329 <div class="line">}</div>
 330 <div class="ttc" id="agroup__mpu8__functions_html_ga17ea49d510a4e30ff6026eed9302ae54"><div class="ttname"><a href="group__mpu8__functions.html#ga17ea49d510a4e30ff6026eed9302ae54">ARM_MPU_AP_RW</a></div><div class="ttdeci">#define ARM_MPU_AP_RW</div><div class="ttdoc">Normal memory, read/write.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:114</div></div>
 331 <div class="ttc" id="agroup__mpu8__functions_html_ga2c465cc9429b8233bcb9cd7cbef0e54c"><div class="ttname"><a href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a></div><div class="ttdeci">#define ARM_MPU_ATTR(O, I)</div><div class="ttdoc">Memory Attribute.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:95</div></div>
 332 <div class="ttc" id="agroup__mpu8__functions_html_ga3d0f688198289f72264f73cf72a742e8"><div class="ttname"><a href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a></div><div class="ttdeci">#define ARM_MPU_SH_NON</div><div class="ttdoc">Normal memory non-shareable</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:101</div></div>
 333 <div class="ttc" id="agroup__mpu8__functions_html_ga8127782b882cbb8419519fc6c98a0b6b"><div class="ttname"><a href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a></div><div class="ttdeci">#define ARM_MPU_XN</div><div class="ttdoc">Normal memory, Execution only permitted if read permitted.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:130</div></div>
 334 <div class="ttc" id="agroup__mpu8__functions_html_ga9425e85dc19e840dd303094f79ed38e3"><div class="ttname"><a href="group__mpu8__functions.html#ga9425e85dc19e840dd303094f79ed38e3">MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</a></div><div class="ttdeci">#define MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:67</div></div>
 335 <div class="ttc" id="agroup__mpu8__functions_html_gab5b3c0a53d19c09a5550f1d9071ae65c"><div class="ttname"><a href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)</div></div>
 336 <div class="ttc" id="agroup__mpu8__functions_html_gac1c0b1a3b22d0c0ea875355039eae4c0"><div class="ttname"><a href="group__mpu8__functions.html#gac1c0b1a3b22d0c0ea875355039eae4c0">MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</a></div><div class="ttdeci">#define MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:80</div></div>
 337 <div class="ttc" id="agroup__mpu8__functions_html_gae62d5195b6ab6082a3f4a2584c101fab"><div class="ttname"><a href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a></div><div class="ttdeci">#define ARM_MPU_AP_NP</div><div class="ttdoc">Normal memory, any privilege level.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:120</div></div>
 338 <div class="ttc" id="agroup__mpu8__functions_html_gaeaaa071276ba7956944e6c3dc05d677e"><div class="ttname"><a href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a></div><div class="ttdeci">#define ARM_MPU_RLAR(LIMIT, IDX)</div><div class="ttdoc">Region Limit Address Register value.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:154</div></div>
 339 <div class="ttc" id="agroup__mpu__functions_html_ga16931f9ad84d7289e8218e169ae6db5d"><div class="ttname"><a href="group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d">ARM_MPU_SetRegion</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)</div></div>
 340 <div class="ttc" id="agroup__mpu__functions_html_ga31406efd492ec9a091a70ffa2d8a42fb"><div class="ttname"><a href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">ARM_MPU_Enable</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_CTRL)</div><div class="ttdoc">Enable the memory protection unit (MPU) and.</div></div>
 341 <div class="ttc" id="agroup__mpu__functions_html_ga3fead12dc24a6d00ad53f55a042486ca"><div class="ttname"><a href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a></div><div class="ttdeci">#define ARM_MPU_RBAR(Region, BaseAddress)</div><div class="ttdoc">MPU Region Base Address Register Value.</div><div class="ttdef"><b>Definition:</b> ref_mpu.txt:41</div></div>
 342 <div class="ttc" id="agroup__mpu__functions_html_ga7cbc0a4a066ed90e85c8176228235d57"><div class="ttname"><a href="group__mpu__functions.html#ga7cbc0a4a066ed90e85c8176228235d57">ARM_MPU_Disable</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_Disable()</div></div>
 343 </div><!-- fragment --> <h2 class="groupheader">Macro Definition Documentation</h2>
 344 <a id="ga81b2aa3fb55cdd5feadff02da10d391b" name="ga81b2aa3fb55cdd5feadff02da10d391b"></a>
 345 <h2 class="memtitle"><span class="permalink"><a href="#ga81b2aa3fb55cdd5feadff02da10d391b">&#9670;&#160;</a></span>ARM_MPU_AP_</h2>
 346
 347 <div class="memitem">
 348 <div class="memproto">
 349       <table class="memname">
 350         <tr>
 351           <td class="memname">#define ARM_MPU_AP_</td>
 352           <td>(</td>
 353           <td class="paramtype">&#160;</td>
 354           <td class="paramname">RO, </td>
 355         </tr>
 356         <tr>
 357           <td class="paramkey"></td>
 358           <td></td>
 359           <td class="paramtype">&#160;</td>
 360           <td class="paramname">NP&#160;</td>
 361         </tr>
 362         <tr>
 363           <td></td>
 364           <td>)</td>
 365           <td></td><td></td>
 366         </tr>
 367       </table>
 368 </div><div class="memdoc">
 369
 370 <p>Memory access permissions. </p>
 371 <dl class="params"><dt>Parameters</dt><dd>
 372   <table class="params">
 373     <tr><td class="paramname">RO</td><td>Read-Only: Set to 1 for read-only memory. </td></tr>
 374     <tr><td class="paramname">NP</td><td>Non-Privileged: Set to 1 for non-privileged memory. </td></tr>
 375   </table>
 376   </dd>
 377 </dl>
 378
 379 </div>
 380 </div>
 381 <a id="gae62d5195b6ab6082a3f4a2584c101fab" name="gae62d5195b6ab6082a3f4a2584c101fab"></a>
 382 <h2 class="memtitle"><span class="permalink"><a href="#gae62d5195b6ab6082a3f4a2584c101fab">&#9670;&#160;</a></span>ARM_MPU_AP_NP</h2>
 383
 384 <div class="memitem">
 385 <div class="memproto">
 386       <table class="memname">
 387         <tr>
 388           <td class="memname">#define ARM_MPU_AP_NP</td>
 389         </tr>
 390       </table>
 391 </div><div class="memdoc">
 392
 393 <p>Normal memory, any privilege level. </p>
 394
 395 </div>
 396 </div>
 397 <a id="ga52386005c0529821308140cf86e6d1a5" name="ga52386005c0529821308140cf86e6d1a5"></a>
 398 <h2 class="memtitle"><span class="permalink"><a href="#ga52386005c0529821308140cf86e6d1a5">&#9670;&#160;</a></span>ARM_MPU_AP_PO</h2>
 399
 400 <div class="memitem">
 401 <div class="memproto">
 402       <table class="memname">
 403         <tr>
 404           <td class="memname">#define ARM_MPU_AP_PO</td>
 405         </tr>
 406       </table>
 407 </div><div class="memdoc">
 408
 409 <p>Normal memory, privileged access only. </p>
 410
 411 </div>
 412 </div>
 413 <a id="ga64e249c7c678144b52493a4b6f8f6b3c" name="ga64e249c7c678144b52493a4b6f8f6b3c"></a>
 414 <h2 class="memtitle"><span class="permalink"><a href="#ga64e249c7c678144b52493a4b6f8f6b3c">&#9670;&#160;</a></span>ARM_MPU_AP_RO</h2>
 415
 416 <div class="memitem">
 417 <div class="memproto">
 418       <table class="memname">
 419         <tr>
 420           <td class="memname">#define ARM_MPU_AP_RO</td>
 421         </tr>
 422       </table>
 423 </div><div class="memdoc">
 424
 425 <p>Normal memory, read-only. </p>
 426
 427 </div>
 428 </div>
 429 <a id="ga17ea49d510a4e30ff6026eed9302ae54" name="ga17ea49d510a4e30ff6026eed9302ae54"></a>
 430 <h2 class="memtitle"><span class="permalink"><a href="#ga17ea49d510a4e30ff6026eed9302ae54">&#9670;&#160;</a></span>ARM_MPU_AP_RW</h2>
 431
 432 <div class="memitem">
 433 <div class="memproto">
 434       <table class="memname">
 435         <tr>
 436           <td class="memname">#define ARM_MPU_AP_RW</td>
 437         </tr>
 438       </table>
 439 </div><div class="memdoc">
 440
 441 <p>Normal memory, read/write. </p>
 442 <p>Access permissions AP = Access permission, RO = Read-only, RW = Read/Write, NP = Any privilege, PO = Privileged code only </p>
 443
 444 </div>
 445 </div>
 446 <a id="ga2c465cc9429b8233bcb9cd7cbef0e54c" name="ga2c465cc9429b8233bcb9cd7cbef0e54c"></a>
 447 <h2 class="memtitle"><span class="permalink"><a href="#ga2c465cc9429b8233bcb9cd7cbef0e54c">&#9670;&#160;</a></span>ARM_MPU_ATTR</h2>
 448
 449 <div class="memitem">
 450 <div class="memproto">
 451       <table class="memname">
 452         <tr>
 453           <td class="memname">#define ARM_MPU_ATTR</td>
 454           <td>(</td>
 455           <td class="paramtype">&#160;</td>
 456           <td class="paramname">O, </td>
 457         </tr>
 458         <tr>
 459           <td class="paramkey"></td>
 460           <td></td>
 461           <td class="paramtype">&#160;</td>
 462           <td class="paramname">I&#160;</td>
 463         </tr>
 464         <tr>
 465           <td></td>
 466           <td>)</td>
 467           <td></td><td></td>
 468         </tr>
 469       </table>
 470 </div><div class="memdoc">
 471
 472 <p>Memory Attribute. </p>
 473 <dl class="params"><dt>Parameters</dt><dd>
 474   <table class="params">
 475     <tr><td class="paramname">O</td><td>Outer memory attributes </td></tr>
 476     <tr><td class="paramname">I</td><td>O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes </td></tr>
 477   </table>
 478   </dd>
 479 </dl>
 480
 481 </div>
 482 </div>
 483 <a id="gab4bfac6284dc050dc6fa6aeb8e954c2c" name="gab4bfac6284dc050dc6fa6aeb8e954c2c"></a>
 484 <h2 class="memtitle"><span class="permalink"><a href="#gab4bfac6284dc050dc6fa6aeb8e954c2c">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE</h2>
 485
 486 <div class="memitem">
 487 <div class="memproto">
 488       <table class="memname">
 489         <tr>
 490           <td class="memname">#define ARM_MPU_ATTR_DEVICE&#160;&#160;&#160;( 0U )</td>
 491         </tr>
 492       </table>
 493 </div><div class="memdoc">
 494
 495 <p>Attribute for device memory (outer only) </p>
 496
 497 </div>
 498 </div>
 499 <a id="ga496bcd6a2bbd038d8935049fec9d0fda" name="ga496bcd6a2bbd038d8935049fec9d0fda"></a>
 500 <h2 class="memtitle"><span class="permalink"><a href="#ga496bcd6a2bbd038d8935049fec9d0fda">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_GRE</h2>
 501
 502 <div class="memitem">
 503 <div class="memproto">
 504       <table class="memname">
 505         <tr>
 506           <td class="memname">#define ARM_MPU_ATTR_DEVICE_GRE</td>
 507         </tr>
 508       </table>
 509 </div><div class="memdoc">
 510
 511 <p>Device memory type Gathering, Re-ordering, Early Write Acknowledgement. </p>
 512
 513 </div>
 514 </div>
 515 <a id="ga6e08ae44fab85e03fea96ae6a5fcdfb0" name="ga6e08ae44fab85e03fea96ae6a5fcdfb0"></a>
 516 <h2 class="memtitle"><span class="permalink"><a href="#ga6e08ae44fab85e03fea96ae6a5fcdfb0">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_nGnRE</h2>
 517
 518 <div class="memitem">
 519 <div class="memproto">
 520       <table class="memname">
 521         <tr>
 522           <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGnRE</td>
 523         </tr>
 524       </table>
 525 </div><div class="memdoc">
 526
 527 <p>Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement. </p>
 528
 529 </div>
 530 </div>
 531 <a id="gabfa9ae279357044cf5b74e77af22a686" name="gabfa9ae279357044cf5b74e77af22a686"></a>
 532 <h2 class="memtitle"><span class="permalink"><a href="#gabfa9ae279357044cf5b74e77af22a686">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_nGnRnE</h2>
 533
 534 <div class="memitem">
 535 <div class="memproto">
 536       <table class="memname">
 537         <tr>
 538           <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGnRnE</td>
 539         </tr>
 540       </table>
 541 </div><div class="memdoc">
 542
 543 <p>Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement. </p>
 544
 545 </div>
 546 </div>
 547 <a id="gadcc9977aabb4dc7177d30cbbac1b53d1" name="gadcc9977aabb4dc7177d30cbbac1b53d1"></a>
 548 <h2 class="memtitle"><span class="permalink"><a href="#gadcc9977aabb4dc7177d30cbbac1b53d1">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_nGRE</h2>
 549
 550 <div class="memitem">
 551 <div class="memproto">
 552       <table class="memname">
 553         <tr>
 554           <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGRE</td>
 555         </tr>
 556       </table>
 557 </div><div class="memdoc">
 558
 559 <p>Device memory type non Gathering, Re-ordering, Early Write Acknowledgement. </p>
 560
 561 </div>
 562 </div>
 563 <a id="gac2f1c567950e3785d75773362b525390" name="gac2f1c567950e3785d75773362b525390"></a>
 564 <h2 class="memtitle"><span class="permalink"><a href="#gac2f1c567950e3785d75773362b525390">&#9670;&#160;</a></span>ARM_MPU_ATTR_MEMORY_</h2>
 565
 566 <div class="memitem">
 567 <div class="memproto">
 568       <table class="memname">
 569         <tr>
 570           <td class="memname">#define ARM_MPU_ATTR_MEMORY_</td>
 571           <td>(</td>
 572           <td class="paramtype">&#160;</td>
 573           <td class="paramname">NT, </td>
 574         </tr>
 575         <tr>
 576           <td class="paramkey"></td>
 577           <td></td>
 578           <td class="paramtype">&#160;</td>
 579           <td class="paramname">WB, </td>
 580         </tr>
 581         <tr>
 582           <td class="paramkey"></td>
 583           <td></td>
 584           <td class="paramtype">&#160;</td>
 585           <td class="paramname">RA, </td>
 586         </tr>
 587         <tr>
 588           <td class="paramkey"></td>
 589           <td></td>
 590           <td class="paramtype">&#160;</td>
 591           <td class="paramname">WA&#160;</td>
 592         </tr>
 593         <tr>
 594           <td></td>
 595           <td>)</td>
 596           <td></td><td></td>
 597         </tr>
 598       </table>
 599 </div><div class="memdoc">
 600
 601 <p>Attribute for Normal memory, Outer and Inner cacheability. </p>
 602 <dl class="params"><dt>Parameters</dt><dd>
 603   <table class="params">
 604     <tr><td class="paramname">NT</td><td>Non-Transient: Set to 1 for Non-transient data. Set to 0 for Transient data. </td></tr>
 605     <tr><td class="paramname">WB</td><td>Write-Back: Set to 1 to use a Write-Back policy. Set to 0 to use a Write-Through policy. </td></tr>
 606     <tr><td class="paramname">RA</td><td>Read Allocation: Set to 1 to enable cache allocation on read miss. Set to 0 to disable cache allocation on read miss. </td></tr>
 607     <tr><td class="paramname">WA</td><td>Write Allocation: Set to 1 to enable cache allocation on write miss. Set to 0 to disable cache allocation on write miss. </td></tr>
 608   </table>
 609   </dd>
 610 </dl>
 611
 612 </div>
 613 </div>
 614 <a id="ga03266f9660485693eb1baec6ba255ab2" name="ga03266f9660485693eb1baec6ba255ab2"></a>
 615 <h2 class="memtitle"><span class="permalink"><a href="#ga03266f9660485693eb1baec6ba255ab2">&#9670;&#160;</a></span>ARM_MPU_ATTR_NON_CACHEABLE</h2>
 616
 617 <div class="memitem">
 618 <div class="memproto">
 619       <table class="memname">
 620         <tr>
 621           <td class="memname">#define ARM_MPU_ATTR_NON_CACHEABLE&#160;&#160;&#160;( 4U )</td>
 622         </tr>
 623       </table>
 624 </div><div class="memdoc">
 625
 626 <p>Attribute for non-cacheable, normal memory. </p>
 627
 628 </div>
 629 </div>
 630 <a id="ga613533046759fd317008e9937cda62de" name="ga613533046759fd317008e9937cda62de"></a>
 631 <h2 class="memtitle"><span class="permalink"><a href="#ga613533046759fd317008e9937cda62de">&#9670;&#160;</a></span>ARM_MPU_EX</h2>
 632
 633 <div class="memitem">
 634 <div class="memproto">
 635       <table class="memname">
 636         <tr>
 637           <td class="memname">#define ARM_MPU_EX</td>
 638         </tr>
 639       </table>
 640 </div><div class="memdoc">
 641
 642 <p>Normal memory, Execution only permitted if read permitted. </p>
 643
 644 </div>
 645 </div>
 646 <a id="gafe39c2f98058bcac7e7e0501e64e7a9d" name="gafe39c2f98058bcac7e7e0501e64e7a9d"></a>
 647 <h2 class="memtitle"><span class="permalink"><a href="#gafe39c2f98058bcac7e7e0501e64e7a9d">&#9670;&#160;</a></span>ARM_MPU_RBAR</h2>
 648
 649 <div class="memitem">
 650 <div class="memproto">
 651       <table class="memname">
 652         <tr>
 653           <td class="memname">#define ARM_MPU_RBAR</td>
 654           <td>(</td>
 655           <td class="paramtype">&#160;</td>
 656           <td class="paramname">BASE, </td>
 657         </tr>
 658         <tr>
 659           <td class="paramkey"></td>
 660           <td></td>
 661           <td class="paramtype">&#160;</td>
 662           <td class="paramname">SH, </td>
 663         </tr>
 664         <tr>
 665           <td class="paramkey"></td>
 666           <td></td>
 667           <td class="paramtype">&#160;</td>
 668           <td class="paramname">RO, </td>
 669         </tr>
 670         <tr>
 671           <td class="paramkey"></td>
 672           <td></td>
 673           <td class="paramtype">&#160;</td>
 674           <td class="paramname">NP, </td>
 675         </tr>
 676         <tr>
 677           <td class="paramkey"></td>
 678           <td></td>
 679           <td class="paramtype">&#160;</td>
 680           <td class="paramname">XN&#160;</td>
 681         </tr>
 682         <tr>
 683           <td></td>
 684           <td>)</td>
 685           <td></td><td></td>
 686         </tr>
 687       </table>
 688 </div><div class="memdoc">
 689
 690 <p>Region Base Address Register value. </p>
 691 <dl class="params"><dt>Parameters</dt><dd>
 692   <table class="params">
 693     <tr><td class="paramname">BASE</td><td>The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned. </td></tr>
 694     <tr><td class="paramname">SH</td><td>Defines the Shareability domain for this memory region. </td></tr>
 695     <tr><td class="paramname">RO</td><td>Read-Only: Set to 1 for a read-only memory region. Set to 0 for a read/write memory region. </td></tr>
 696     <tr><td class="paramname">NP</td><td>Non-Privileged: Set to 1 for a non-privileged memory region. Set to 0 for privileged memory region. </td></tr>
 697     <tr><td class="paramname">XN</td><td>eXecute Never: Set to 1 for a non-executable memory region. Set to 0 for an executable memory region. </td></tr>
 698   </table>
 699   </dd>
 700 </dl>
 701
 702 </div>
 703 </div>
 704 <a id="gaeaaa071276ba7956944e6c3dc05d677e" name="gaeaaa071276ba7956944e6c3dc05d677e"></a>
 705 <h2 class="memtitle"><span class="permalink"><a href="#gaeaaa071276ba7956944e6c3dc05d677e">&#9670;&#160;</a></span>ARM_MPU_RLAR</h2>
 706
 707 <div class="memitem">
 708 <div class="memproto">
 709       <table class="memname">
 710         <tr>
 711           <td class="memname">#define ARM_MPU_RLAR</td>
 712           <td>(</td>
 713           <td class="paramtype">&#160;</td>
 714           <td class="paramname">LIMIT, </td>
 715         </tr>
 716         <tr>
 717           <td class="paramkey"></td>
 718           <td></td>
 719           <td class="paramtype">&#160;</td>
 720           <td class="paramname">IDX&#160;</td>
 721         </tr>
 722         <tr>
 723           <td></td>
 724           <td>)</td>
 725           <td></td><td></td>
 726         </tr>
 727       </table>
 728 </div><div class="memdoc">
 729
 730 <p>Region Limit Address Register value. </p>
 731 <dl class="params"><dt>Parameters</dt><dd>
 732   <table class="params">
 733     <tr><td class="paramname">LIMIT</td><td>The limit address bits [31:5] for this memory region. The value is one extended. </td></tr>
 734     <tr><td class="paramname">IDX</td><td>The attribute index to be associated with this memory region. </td></tr>
 735   </table>
 736   </dd>
 737 </dl>
 738
 739 </div>
 740 </div>
 741 <a id="ga5bff4d6cfaa678776b3b1eab4af70f95" name="ga5bff4d6cfaa678776b3b1eab4af70f95"></a>
 742 <h2 class="memtitle"><span class="permalink"><a href="#ga5bff4d6cfaa678776b3b1eab4af70f95">&#9670;&#160;</a></span>ARM_MPU_RLAR_PXN</h2>
 743
 744 <div class="memitem">
 745 <div class="memproto">
 746       <table class="memname">
 747         <tr>
 748           <td class="memname">#define ARM_MPU_RLAR_PXN</td>
 749           <td>(</td>
 750           <td class="paramtype">&#160;</td>
 751           <td class="paramname">LIMIT, </td>
 752         </tr>
 753         <tr>
 754           <td class="paramkey"></td>
 755           <td></td>
 756           <td class="paramtype">&#160;</td>
 757           <td class="paramname">PXN, </td>
 758         </tr>
 759         <tr>
 760           <td class="paramkey"></td>
 761           <td></td>
 762           <td class="paramtype">&#160;</td>
 763           <td class="paramname">IDX&#160;</td>
 764         </tr>
 765         <tr>
 766           <td></td>
 767           <td>)</td>
 768           <td></td><td></td>
 769         </tr>
 770       </table>
 771 </div><div class="memdoc">
 772
 773 <p>Region Limit Address Register with PXN value. </p>
 774 <dl class="params"><dt>Parameters</dt><dd>
 775   <table class="params">
 776     <tr><td class="paramname">LIMIT</td><td>The limit address bits [31:5] for this memory region. The value is one extended. </td></tr>
 777     <tr><td class="paramname">PXN</td><td>Privileged execute never. Defines whether code can be executed from this privileged region. </td></tr>
 778     <tr><td class="paramname">IDX</td><td>The attribute index to be associated with this memory region. </td></tr>
 779   </table>
 780   </dd>
 781 </dl>
 782
 783 </div>
 784 </div>
 785 <a id="ga73c70127f24f34781ad463cbe51d8f6b" name="ga73c70127f24f34781ad463cbe51d8f6b"></a>
 786 <h2 class="memtitle"><span class="permalink"><a href="#ga73c70127f24f34781ad463cbe51d8f6b">&#9670;&#160;</a></span>ARM_MPU_SH_INNER</h2>
 787
 788 <div class="memitem">
 789 <div class="memproto">
 790       <table class="memname">
 791         <tr>
 792           <td class="memname">#define ARM_MPU_SH_INNER</td>
 793         </tr>
 794       </table>
 795 </div><div class="memdoc">
 796
 797 <p>Normal memory inner shareable <br  />
 798  </p>
 799
 800 </div>
 801 </div>
 802 <a id="ga3d0f688198289f72264f73cf72a742e8" name="ga3d0f688198289f72264f73cf72a742e8"></a>
 803 <h2 class="memtitle"><span class="permalink"><a href="#ga3d0f688198289f72264f73cf72a742e8">&#9670;&#160;</a></span>ARM_MPU_SH_NON</h2>
 804
 805 <div class="memitem">
 806 <div class="memproto">
 807       <table class="memname">
 808         <tr>
 809           <td class="memname">#define ARM_MPU_SH_NON</td>
 810         </tr>
 811       </table>
 812 </div><div class="memdoc">
 813
 814 <p>Normal memory non-shareable <br  />
 815  </p>
 816 <p>Shareability </p>
 817
 818 </div>
 819 </div>
 820 <a id="gac4fddbdb9e1350bce6906de33c1fd500" name="gac4fddbdb9e1350bce6906de33c1fd500"></a>
 821 <h2 class="memtitle"><span class="permalink"><a href="#gac4fddbdb9e1350bce6906de33c1fd500">&#9670;&#160;</a></span>ARM_MPU_SH_OUTER</h2>
 822
 823 <div class="memitem">
 824 <div class="memproto">
 825       <table class="memname">
 826         <tr>
 827           <td class="memname">#define ARM_MPU_SH_OUTER</td>
 828         </tr>
 829       </table>
 830 </div><div class="memdoc">
 831
 832 <p>Normal memory outer shareable <br  />
 833  </p>
 834
 835 </div>
 836 </div>
 837 <a id="ga8127782b882cbb8419519fc6c98a0b6b" name="ga8127782b882cbb8419519fc6c98a0b6b"></a>
 838 <h2 class="memtitle"><span class="permalink"><a href="#ga8127782b882cbb8419519fc6c98a0b6b">&#9670;&#160;</a></span>ARM_MPU_XN</h2>
 839
 840 <div class="memitem">
 841 <div class="memproto">
 842       <table class="memname">
 843         <tr>
 844           <td class="memname">#define ARM_MPU_XN</td>
 845         </tr>
 846       </table>
 847 </div><div class="memdoc">
 848
 849 <p>Normal memory, Execution only permitted if read permitted. </p>
 850
 851 </div>
 852 </div>
 853 <a id="ga386cab980b576bc5f61388b659eea9a8" name="ga386cab980b576bc5f61388b659eea9a8"></a>
 854 <h2 class="memtitle"><span class="permalink"><a href="#ga386cab980b576bc5f61388b659eea9a8">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_NON_CACHEABLE</h2>
 855
 856 <div class="memitem">
 857 <div class="memproto">
 858       <table class="memname">
 859         <tr>
 860           <td class="memname">#define MPU_ATTR_NORMAL_INNER_NON_CACHEABLE</td>
 861         </tr>
 862       </table>
 863 </div><div class="memdoc">
 864
 865 </div>
 866 </div>
 867 <a id="ga17b7f3281e42f8507336f709520e9785" name="ga17b7f3281e42f8507336f709520e9785"></a>
 868 <h2 class="memtitle"><span class="permalink"><a href="#ga17b7f3281e42f8507336f709520e9785">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WB_RA</h2>
 869
 870 <div class="memitem">
 871 <div class="memproto">
 872       <table class="memname">
 873         <tr>
 874           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WB_RA</td>
 875         </tr>
 876       </table>
 877 </div><div class="memdoc">
 878
 879 </div>
 880 </div>
 881 <a id="ga61c99cef4678523dd070d863a7385cec" name="ga61c99cef4678523dd070d863a7385cec"></a>
 882 <h2 class="memtitle"><span class="permalink"><a href="#ga61c99cef4678523dd070d863a7385cec">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WB_RA_WA</h2>
 883
 884 <div class="memitem">
 885 <div class="memproto">
 886       <table class="memname">
 887         <tr>
 888           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WB_RA_WA</td>
 889         </tr>
 890       </table>
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 916           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WB_TR_RA_WA</td>
 917         </tr>
 918       </table>
 919 </div><div class="memdoc">
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 921 </div>
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 930           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WB_TR_WA</td>
 931         </tr>
 932       </table>
 933 </div><div class="memdoc">
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 935 </div>
 936 </div>
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 944           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WB_WA</td>
 945         </tr>
 946       </table>
 947 </div><div class="memdoc">
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 949 </div>
 950 </div>
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 958           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_RA</td>
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 960       </table>
 961 </div><div class="memdoc">
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 963 </div>
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 972           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_RA_WA</td>
 973         </tr>
 974       </table>
 975 </div><div class="memdoc">
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 977 </div>
 978 </div>
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 986           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_TR_RA</td>
 987         </tr>
 988       </table>
 989 </div><div class="memdoc">
 990
 991 </div>
 992 </div>
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 996 <div class="memitem">
 997 <div class="memproto">
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 999         <tr>
1000           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</td>
1001         </tr>
1002       </table>
1003 </div><div class="memdoc">
1004
1005 </div>
1006 </div>
1007 <a id="gac41f314de36519d6ebde13a1e997c65f" name="gac41f314de36519d6ebde13a1e997c65f"></a>
1008 <h2 class="memtitle"><span class="permalink"><a href="#gac41f314de36519d6ebde13a1e997c65f">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WT_TR_WA</h2>
1009
1010 <div class="memitem">
1011 <div class="memproto">
1012       <table class="memname">
1013         <tr>
1014           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_TR_WA</td>
1015         </tr>
1016       </table>
1017 </div><div class="memdoc">
1018
1019 </div>
1020 </div>
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1022 <h2 class="memtitle"><span class="permalink"><a href="#ga4550de69e30075efc70213a79b929e92">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WT_WA</h2>
1023
1024 <div class="memitem">
1025 <div class="memproto">
1026       <table class="memname">
1027         <tr>
1028           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_WA</td>
1029         </tr>
1030       </table>
1031 </div><div class="memdoc">
1032
1033 </div>
1034 </div>
1035 <a id="gab0847e1992e71f74ed5a31316d22b7bd" name="gab0847e1992e71f74ed5a31316d22b7bd"></a>
1036 <h2 class="memtitle"><span class="permalink"><a href="#gab0847e1992e71f74ed5a31316d22b7bd">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_NON_CACHEABLE</h2>
1037
1038 <div class="memitem">
1039 <div class="memproto">
1040       <table class="memname">
1041         <tr>
1042           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_NON_CACHEABLE</td>
1043         </tr>
1044       </table>
1045 </div><div class="memdoc">
1046
1047 <p>Normal memory outer-cacheable and inner-cacheable attributes WT = Write Through, WB = Write Back, TR = Transient, RA = Read-Allocate, WA = Write Allocate. </p>
1048
1049 </div>
1050 </div>
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1058           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_RA</td>
1059         </tr>
1060       </table>
1061 </div><div class="memdoc">
1062
1063 </div>
1064 </div>
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1068 <div class="memitem">
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1072           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_RA_WA</td>
1073         </tr>
1074       </table>
1075 </div><div class="memdoc">
1076
1077 </div>
1078 </div>
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1086           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_TR_RA</td>
1087         </tr>
1088       </table>
1089 </div><div class="memdoc">
1090
1091 </div>
1092 </div>
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1096 <div class="memitem">
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1100           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_TR_RA_WA</td>
1101         </tr>
1102       </table>
1103 </div><div class="memdoc">
1104
1105 </div>
1106 </div>
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1114           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_TR_WA</td>
1115         </tr>
1116       </table>
1117 </div><div class="memdoc">
1118
1119 </div>
1120 </div>
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1124 <div class="memitem">
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1128           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_WA</td>
1129         </tr>
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1131 </div><div class="memdoc">
1132
1133 </div>
1134 </div>
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1142           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_RA</td>
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1147 </div>
1148 </div>
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1156           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_RA_WA</td>
1157         </tr>
1158       </table>
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1162 </div>
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1170           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_TR_RA</td>
1171         </tr>
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1175 </div>
1176 </div>
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1180 <div class="memitem">
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1184           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</td>
1185         </tr>
1186       </table>
1187 </div><div class="memdoc">
1188
1189 </div>
1190 </div>
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1194 <div class="memitem">
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1198           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_TR_WA</td>
1199         </tr>
1200       </table>
1201 </div><div class="memdoc">
1202
1203 </div>
1204 </div>
1205 <a id="ga9d1be17c0bd5895736d4ab352434f61e" name="ga9d1be17c0bd5895736d4ab352434f61e"></a>
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1207
1208 <div class="memitem">
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1212           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_WA</td>
1213         </tr>
1214       </table>
1215 </div><div class="memdoc">
1216
1217 </div>
1218 </div>
1219 <h2 class="groupheader">Function Documentation</h2>
1220 <a id="ga9dcb0afddf4ac351f33f3c7a5169c62c" name="ga9dcb0afddf4ac351f33f3c7a5169c62c"></a>
1221 <h2 class="memtitle"><span class="permalink"><a href="#ga9dcb0afddf4ac351f33f3c7a5169c62c">&#9670;&#160;</a></span>ARM_MPU_ClrRegion()</h2>
1222
1223 <div class="memitem">
1224 <div class="memproto">
1225       <table class="memname">
1226         <tr>
1227           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegion </td>
1228           <td>(</td>
1229           <td class="paramtype">uint32_t&#160;</td>
1230           <td class="paramname"><em>rnr</em></td><td>)</td>
1231           <td></td>
1232         </tr>
1233       </table>
1234 </div><div class="memdoc">
1235 <p>Clear and disable the given MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
1236   <table class="params">
1237     <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
1238   </table>
1239   </dd>
1240 </dl>
1241
1242 </div>
1243 </div>
1244 <a id="gac526bc5bfcf048ce57a44c0c0cdadbe4" name="gac526bc5bfcf048ce57a44c0c0cdadbe4"></a>
1245 <h2 class="memtitle"><span class="permalink"><a href="#gac526bc5bfcf048ce57a44c0c0cdadbe4">&#9670;&#160;</a></span>ARM_MPU_ClrRegion_NS()</h2>
1246
1247 <div class="memitem">
1248 <div class="memproto">
1249       <table class="memname">
1250         <tr>
1251           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegion_NS </td>
1252           <td>(</td>
1253           <td class="paramtype">uint32_t&#160;</td>
1254           <td class="paramname"><em>rnr</em></td><td>)</td>
1255           <td></td>
1256         </tr>
1257       </table>
1258 </div><div class="memdoc">
1259 <p>Clear and disable the given Non-secure MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
1260   <table class="params">
1261     <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
1262   </table>
1263   </dd>
1264 </dl>
1265
1266 </div>
1267 </div>
1268 <a id="ga01fa1151c9ec0ba5de76f908c0999316" name="ga01fa1151c9ec0ba5de76f908c0999316"></a>
1269 <h2 class="memtitle"><span class="permalink"><a href="#ga01fa1151c9ec0ba5de76f908c0999316">&#9670;&#160;</a></span>ARM_MPU_ClrRegionEx()</h2>
1270
1271 <div class="memitem">
1272 <div class="memproto">
1273       <table class="memname">
1274         <tr>
1275           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegionEx </td>
1276           <td>(</td>
1277           <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
1278           <td class="paramname"><em>mpu</em>, </td>
1279         </tr>
1280         <tr>
1281           <td class="paramkey"></td>
1282           <td></td>
1283           <td class="paramtype">uint32_t&#160;</td>
1284           <td class="paramname"><em>rnr</em>&#160;</td>
1285         </tr>
1286         <tr>
1287           <td></td>
1288           <td>)</td>
1289           <td></td><td></td>
1290         </tr>
1291       </table>
1292 </div><div class="memdoc">
1293 <p>Clear and disable the given MPU region of the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1294   <table class="params">
1295     <tr><td class="paramname">mpu</td><td>Pointer to MPU to be used. </td></tr>
1296     <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
1297   </table>
1298   </dd>
1299 </dl>
1300
1301 </div>
1302 </div>
1303 <a id="ga61814eba4652a0fdfb76bbe222086327" name="ga61814eba4652a0fdfb76bbe222086327"></a>
1304 <h2 class="memtitle"><span class="permalink"><a href="#ga61814eba4652a0fdfb76bbe222086327">&#9670;&#160;</a></span>ARM_MPU_Disable()</h2>
1305
1306 <div class="memitem">
1307 <div class="memproto">
1308       <table class="memname">
1309         <tr>
1310           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Disable </td>
1311           <td>(</td>
1312           <td class="paramtype">void&#160;</td>
1313           <td class="paramname"></td><td>)</td>
1314           <td></td>
1315         </tr>
1316       </table>
1317 </div><div class="memdoc">
1318 <p>Disable the MPU. </p>
1319
1320 </div>
1321 </div>
1322 <a id="ga389f9b6049d176bc83f9964d3259b712" name="ga389f9b6049d176bc83f9964d3259b712"></a>
1323 <h2 class="memtitle"><span class="permalink"><a href="#ga389f9b6049d176bc83f9964d3259b712">&#9670;&#160;</a></span>ARM_MPU_Disable_NS()</h2>
1324
1325 <div class="memitem">
1326 <div class="memproto">
1327       <table class="memname">
1328         <tr>
1329           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Disable_NS </td>
1330           <td>(</td>
1331           <td class="paramtype">void&#160;</td>
1332           <td class="paramname"></td><td>)</td>
1333           <td></td>
1334         </tr>
1335       </table>
1336 </div><div class="memdoc">
1337 <p>Disable the Non-secure MPU. </p>
1338
1339 </div>
1340 </div>
1341 <a id="ga5a3f40314553baccdeea551f86d9a997" name="ga5a3f40314553baccdeea551f86d9a997"></a>
1342 <h2 class="memtitle"><span class="permalink"><a href="#ga5a3f40314553baccdeea551f86d9a997">&#9670;&#160;</a></span>ARM_MPU_Enable()</h2>
1343
1344 <div class="memitem">
1345 <div class="memproto">
1346       <table class="memname">
1347         <tr>
1348           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Enable </td>
1349           <td>(</td>
1350           <td class="paramtype">uint32_t&#160;</td>
1351           <td class="paramname"><em>MPU_Control</em></td><td>)</td>
1352           <td></td>
1353         </tr>
1354       </table>
1355 </div><div class="memdoc">
1356
1357 <p>Enable the MPU. </p>
1358 <dl class="params"><dt>Parameters</dt><dd>
1359   <table class="params">
1360     <tr><td class="paramname">MPU_Control</td><td>Default access permissions for unconfigured regions. </td></tr>
1361   </table>
1362   </dd>
1363 </dl>
1364
1365 </div>
1366 </div>
1367 <a id="ga5866c75d6deb9148a1e9af6337eec50a" name="ga5866c75d6deb9148a1e9af6337eec50a"></a>
1368 <h2 class="memtitle"><span class="permalink"><a href="#ga5866c75d6deb9148a1e9af6337eec50a">&#9670;&#160;</a></span>ARM_MPU_Enable_NS()</h2>
1369
1370 <div class="memitem">
1371 <div class="memproto">
1372       <table class="memname">
1373         <tr>
1374           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> ARM_MPU_Enable_NS </td>
1375           <td>(</td>
1376           <td class="paramtype">uint32_t&#160;</td>
1377           <td class="paramname"><em>MPU_Control</em></td><td>)</td>
1378           <td></td>
1379         </tr>
1380       </table>
1381 </div><div class="memdoc">
1382 <p>Enable the Non-secure MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1383   <table class="params">
1384     <tr><td class="paramname">MPU_Control</td><td>Default access permissions for unconfigured regions. </td></tr>
1385   </table>
1386   </dd>
1387 </dl>
1388
1389 </div>
1390 </div>
1391 <a id="gaca76614e3091c7324aa9d60e634621bf" name="gaca76614e3091c7324aa9d60e634621bf"></a>
1392 <h2 class="memtitle"><span class="permalink"><a href="#gaca76614e3091c7324aa9d60e634621bf">&#9670;&#160;</a></span>ARM_MPU_Load()</h2>
1393
1394 <div class="memitem">
1395 <div class="memproto">
1396       <table class="memname">
1397         <tr>
1398           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Load </td>
1399           <td>(</td>
1400           <td class="paramtype">uint32_t&#160;</td>
1401           <td class="paramname"><em>rnr</em>, </td>
1402         </tr>
1403         <tr>
1404           <td class="paramkey"></td>
1405           <td></td>
1406           <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
1407           <td class="paramname"><em>table</em>, </td>
1408         </tr>
1409         <tr>
1410           <td class="paramkey"></td>
1411           <td></td>
1412           <td class="paramtype">uint32_t&#160;</td>
1413           <td class="paramname"><em>cnt</em>&#160;</td>
1414         </tr>
1415         <tr>
1416           <td></td>
1417           <td>)</td>
1418           <td></td><td></td>
1419         </tr>
1420       </table>
1421 </div><div class="memdoc">
1422 <p>Load the given number of MPU regions from a table. </p><dl class="params"><dt>Parameters</dt><dd>
1423   <table class="params">
1424     <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
1425     <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
1426     <tr><td class="paramname">cnt</td><td>Amount of regions to be configured.</td></tr>
1427   </table>
1428   </dd>
1429 </dl>
1430 <p><b>Example:</b> </p><div class="fragment"><div class="line"><span class="keyword">const</span> <a class="code hl_struct" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> mpuTable[1][4] = {</div>
1431 <div class="line">  {</div>
1432 <div class="line">    <span class="comment">//                     BASE          SH              RO             NP             XN                                LIMIT         ATTR </span></div>
1433 <div class="line">    { .<a class="code hl_variable" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a> = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x08000000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x080FFFFFUL, MAIR_ATTR(0)) },</div>
1434 <div class="line">    { .RBAR = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x20000000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x20007FFFUL, MAIR_ATTR(0)) },</div>
1435 <div class="line">    { .RBAR = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x40020000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x40021FFFUL, MAIR_ATTR(1)) },</div>
1436 <div class="line">    { .RBAR = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x40022000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x40022FFFUL, MAIR_ATTR(1)) }</div>
1437 <div class="line">  }</div>
1438 <div class="line">};</div>
1439 <div class="line"> </div>
1440 <div class="line"><span class="keywordtype">void</span> UpdateMpu(uint32_t idx)</div>
1441 <div class="line">{</div>
1442 <div class="line">   <a class="code hl_function" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a>(0, mpuTable[idx], 4);</div>
1443 <div class="line">}</div>
1444 <div class="ttc" id="agroup__mpu8__functions_html_ga64e249c7c678144b52493a4b6f8f6b3c"><div class="ttname"><a href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a></div><div class="ttdeci">#define ARM_MPU_AP_RO</div><div class="ttdoc">Normal memory, read-only.</div><div class="ttdef"><b>Definition:</b> ref_mpu8.txt:117</div></div>
1445 <div class="ttc" id="agroup__mpu__functions_html_gafa27b26d5847fa8e465584e376b6078a"><div class="ttname"><a href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_Load(MPU_Region_t const *table, uint32_t cnt)</div></div>
1446 <div class="ttc" id="astructARM__MPU__Region__t_html"><div class="ttname"><a href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a></div><div class="ttdoc">Setup information of a single MPU Region.</div><div class="ttdef"><b>Definition:</b> ref_mpu.txt:84</div></div>
1447 <div class="ttc" id="astructARM__MPU__Region__t_html_afe7a7721aa08988d915670efa432cdd2"><div class="ttname"><a href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">ARM_MPU_Region_t::RBAR</a></div><div class="ttdeci">uint32_t RBAR</div><div class="ttdoc">The region base address register value (RBAR)</div><div class="ttdef"><b>Definition:</b> ref_mpu.txt:85</div></div>
1448 </div><!-- fragment -->
1449 </div>
1450 </div>
1451 <a id="ga7f8c6e09be98067d613e4df1832c543d" name="ga7f8c6e09be98067d613e4df1832c543d"></a>
1452 <h2 class="memtitle"><span class="permalink"><a href="#ga7f8c6e09be98067d613e4df1832c543d">&#9670;&#160;</a></span>ARM_MPU_Load_NS()</h2>
1453
1454 <div class="memitem">
1455 <div class="memproto">
1456       <table class="memname">
1457         <tr>
1458           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Load_NS </td>
1459           <td>(</td>
1460           <td class="paramtype">uint32_t&#160;</td>
1461           <td class="paramname"><em>rnr</em>, </td>
1462         </tr>
1463         <tr>
1464           <td class="paramkey"></td>
1465           <td></td>
1466           <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
1467           <td class="paramname"><em>table</em>, </td>
1468         </tr>
1469         <tr>
1470           <td class="paramkey"></td>
1471           <td></td>
1472           <td class="paramtype">uint32_t&#160;</td>
1473           <td class="paramname"><em>cnt</em>&#160;</td>
1474         </tr>
1475         <tr>
1476           <td></td>
1477           <td>)</td>
1478           <td></td><td></td>
1479         </tr>
1480       </table>
1481 </div><div class="memdoc">
1482 <p>Load the given number of MPU regions from a table to the Non-secure MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1483   <table class="params">
1484     <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
1485     <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
1486     <tr><td class="paramname">cnt</td><td>Amount of regions to be configured. </td></tr>
1487   </table>
1488   </dd>
1489 </dl>
1490
1491 </div>
1492 </div>
1493 <a id="gab6094419f2abd678f1f3b121cd115049" name="gab6094419f2abd678f1f3b121cd115049"></a>
1494 <h2 class="memtitle"><span class="permalink"><a href="#gab6094419f2abd678f1f3b121cd115049">&#9670;&#160;</a></span>ARM_MPU_LoadEx()</h2>
1495
1496 <div class="memitem">
1497 <div class="memproto">
1498       <table class="memname">
1499         <tr>
1500           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_LoadEx </td>
1501           <td>(</td>
1502           <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
1503           <td class="paramname"><em>mpu</em>, </td>
1504         </tr>
1505         <tr>
1506           <td class="paramkey"></td>
1507           <td></td>
1508           <td class="paramtype">uint32_t&#160;</td>
1509           <td class="paramname"><em>rnr</em>, </td>
1510         </tr>
1511         <tr>
1512           <td class="paramkey"></td>
1513           <td></td>
1514           <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
1515           <td class="paramname"><em>table</em>, </td>
1516         </tr>
1517         <tr>
1518           <td class="paramkey"></td>
1519           <td></td>
1520           <td class="paramtype">uint32_t&#160;</td>
1521           <td class="paramname"><em>cnt</em>&#160;</td>
1522         </tr>
1523         <tr>
1524           <td></td>
1525           <td>)</td>
1526           <td></td><td></td>
1527         </tr>
1528       </table>
1529 </div><div class="memdoc">
1530 <p>Load the given number of MPU regions from a table to the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1531   <table class="params">
1532     <tr><td class="paramname">mpu</td><td>Pointer to the MPU registers to be used. </td></tr>
1533     <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
1534     <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
1535     <tr><td class="paramname">cnt</td><td>Amount of regions to be configured. </td></tr>
1536   </table>
1537   </dd>
1538 </dl>
1539
1540 </div>
1541 </div>
1542 <a id="gac1a949403bf84eecaf407003fb553ae7" name="gac1a949403bf84eecaf407003fb553ae7"></a>
1543 <h2 class="memtitle"><span class="permalink"><a href="#gac1a949403bf84eecaf407003fb553ae7">&#9670;&#160;</a></span>ARM_MPU_OrderedMemcpy()</h2>
1544
1545 <div class="memitem">
1546 <div class="memproto">
1547       <table class="memname">
1548         <tr>
1549           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_OrderedMemcpy </td>
1550           <td>(</td>
1551           <td class="paramtype">volatile uint32_t *&#160;</td>
1552           <td class="paramname"><em>dst</em>, </td>
1553         </tr>
1554         <tr>
1555           <td class="paramkey"></td>
1556           <td></td>
1557           <td class="paramtype">const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a>&#160;</td>
1558           <td class="paramname"><em>src</em>, </td>
1559         </tr>
1560         <tr>
1561           <td class="paramkey"></td>
1562           <td></td>
1563           <td class="paramtype">uint32_t&#160;</td>
1564           <td class="paramname"><em>len</em>&#160;</td>
1565         </tr>
1566         <tr>
1567           <td></td>
1568           <td>)</td>
1569           <td></td><td></td>
1570         </tr>
1571       </table>
1572 </div><div class="memdoc">
1573 <p>Memcpy with strictly ordered memory access, e.g. used by code in <a class="el" href="group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049">ARM_MPU_LoadEx</a>. </p><dl class="params"><dt>Parameters</dt><dd>
1574   <table class="params">
1575     <tr><td class="paramname">dst</td><td>Destination data is copied to. </td></tr>
1576     <tr><td class="paramname">src</td><td>Source data is copied from. </td></tr>
1577     <tr><td class="paramname">len</td><td>Amount of data words to be copied. </td></tr>
1578   </table>
1579   </dd>
1580 </dl>
1581
1582 </div>
1583 </div>
1584 <a id="gab5b3c0a53d19c09a5550f1d9071ae65c" name="gab5b3c0a53d19c09a5550f1d9071ae65c"></a>
1585 <h2 class="memtitle"><span class="permalink"><a href="#gab5b3c0a53d19c09a5550f1d9071ae65c">&#9670;&#160;</a></span>ARM_MPU_SetMemAttr()</h2>
1586
1587 <div class="memitem">
1588 <div class="memproto">
1589       <table class="memname">
1590         <tr>
1591           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttr </td>
1592           <td>(</td>
1593           <td class="paramtype">uint8_t&#160;</td>
1594           <td class="paramname"><em>idx</em>, </td>
1595         </tr>
1596         <tr>
1597           <td class="paramkey"></td>
1598           <td></td>
1599           <td class="paramtype">uint8_t&#160;</td>
1600           <td class="paramname"><em>attr</em>&#160;</td>
1601         </tr>
1602         <tr>
1603           <td></td>
1604           <td>)</td>
1605           <td></td><td></td>
1606         </tr>
1607       </table>
1608 </div><div class="memdoc">
1609 <p>Set the memory attribute encoding. </p><dl class="params"><dt>Parameters</dt><dd>
1610   <table class="params">
1611     <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
1612     <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
1613   </table>
1614   </dd>
1615 </dl>
1616
1617 </div>
1618 </div>
1619 <a id="ga5100a150a755902af2455a455a329ef9" name="ga5100a150a755902af2455a455a329ef9"></a>
1620 <h2 class="memtitle"><span class="permalink"><a href="#ga5100a150a755902af2455a455a329ef9">&#9670;&#160;</a></span>ARM_MPU_SetMemAttr_NS()</h2>
1621
1622 <div class="memitem">
1623 <div class="memproto">
1624       <table class="memname">
1625         <tr>
1626           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttr_NS </td>
1627           <td>(</td>
1628           <td class="paramtype">uint8_t&#160;</td>
1629           <td class="paramname"><em>idx</em>, </td>
1630         </tr>
1631         <tr>
1632           <td class="paramkey"></td>
1633           <td></td>
1634           <td class="paramtype">uint8_t&#160;</td>
1635           <td class="paramname"><em>attr</em>&#160;</td>
1636         </tr>
1637         <tr>
1638           <td></td>
1639           <td>)</td>
1640           <td></td><td></td>
1641         </tr>
1642       </table>
1643 </div><div class="memdoc">
1644 <p>Set the memory attribute encoding to the Non-secure MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1645   <table class="params">
1646     <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
1647     <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
1648   </table>
1649   </dd>
1650 </dl>
1651
1652 </div>
1653 </div>
1654 <a id="ga1799413f08a157d636a1491371c15ce2" name="ga1799413f08a157d636a1491371c15ce2"></a>
1655 <h2 class="memtitle"><span class="permalink"><a href="#ga1799413f08a157d636a1491371c15ce2">&#9670;&#160;</a></span>ARM_MPU_SetMemAttrEx()</h2>
1656
1657 <div class="memitem">
1658 <div class="memproto">
1659       <table class="memname">
1660         <tr>
1661           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttrEx </td>
1662           <td>(</td>
1663           <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
1664           <td class="paramname"><em>mpu</em>, </td>
1665         </tr>
1666         <tr>
1667           <td class="paramkey"></td>
1668           <td></td>
1669           <td class="paramtype">uint8_t&#160;</td>
1670           <td class="paramname"><em>idx</em>, </td>
1671         </tr>
1672         <tr>
1673           <td class="paramkey"></td>
1674           <td></td>
1675           <td class="paramtype">uint8_t&#160;</td>
1676           <td class="paramname"><em>attr</em>&#160;</td>
1677         </tr>
1678         <tr>
1679           <td></td>
1680           <td>)</td>
1681           <td></td><td></td>
1682         </tr>
1683       </table>
1684 </div><div class="memdoc">
1685 <p>Set the memory attribute encoding to the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1686   <table class="params">
1687     <tr><td class="paramname">mpu</td><td>Pointer to the MPU to be configured. </td></tr>
1688     <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
1689     <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
1690   </table>
1691   </dd>
1692 </dl>
1693
1694 </div>
1695 </div>
1696 <a id="ga6d7f220015c070c0e469948c1775ee3d" name="ga6d7f220015c070c0e469948c1775ee3d"></a>
1697 <h2 class="memtitle"><span class="permalink"><a href="#ga6d7f220015c070c0e469948c1775ee3d">&#9670;&#160;</a></span>ARM_MPU_SetRegion()</h2>
1698
1699 <div class="memitem">
1700 <div class="memproto">
1701       <table class="memname">
1702         <tr>
1703           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegion </td>
1704           <td>(</td>
1705           <td class="paramtype">uint32_t&#160;</td>
1706           <td class="paramname"><em>rnr</em>, </td>
1707         </tr>
1708         <tr>
1709           <td class="paramkey"></td>
1710           <td></td>
1711           <td class="paramtype">uint32_t&#160;</td>
1712           <td class="paramname"><em>rbar</em>, </td>
1713         </tr>
1714         <tr>
1715           <td class="paramkey"></td>
1716           <td></td>
1717           <td class="paramtype">uint32_t&#160;</td>
1718           <td class="paramname"><em>rlar</em>&#160;</td>
1719         </tr>
1720         <tr>
1721           <td></td>
1722           <td>)</td>
1723           <td></td><td></td>
1724         </tr>
1725       </table>
1726 </div><div class="memdoc">
1727 <p>Configure the given MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
1728   <table class="params">
1729     <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
1730     <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
1731     <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
1732   </table>
1733   </dd>
1734 </dl>
1735
1736 </div>
1737 </div>
1738 <a id="ga7566931ca9bb9f22d213a67ec5f8c745" name="ga7566931ca9bb9f22d213a67ec5f8c745"></a>
1739 <h2 class="memtitle"><span class="permalink"><a href="#ga7566931ca9bb9f22d213a67ec5f8c745">&#9670;&#160;</a></span>ARM_MPU_SetRegion_NS()</h2>
1740
1741 <div class="memitem">
1742 <div class="memproto">
1743       <table class="memname">
1744         <tr>
1745           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegion_NS </td>
1746           <td>(</td>
1747           <td class="paramtype">uint32_t&#160;</td>
1748           <td class="paramname"><em>rnr</em>, </td>
1749         </tr>
1750         <tr>
1751           <td class="paramkey"></td>
1752           <td></td>
1753           <td class="paramtype">uint32_t&#160;</td>
1754           <td class="paramname"><em>rbar</em>, </td>
1755         </tr>
1756         <tr>
1757           <td class="paramkey"></td>
1758           <td></td>
1759           <td class="paramtype">uint32_t&#160;</td>
1760           <td class="paramname"><em>rlar</em>&#160;</td>
1761         </tr>
1762         <tr>
1763           <td></td>
1764           <td>)</td>
1765           <td></td><td></td>
1766         </tr>
1767       </table>
1768 </div><div class="memdoc">
1769 <p>Configure the given Non-secure MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
1770   <table class="params">
1771     <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
1772     <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
1773     <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
1774   </table>
1775   </dd>
1776 </dl>
1777
1778 </div>
1779 </div>
1780 <a id="ga3d50ba8546252bea959e45c8fdf16993" name="ga3d50ba8546252bea959e45c8fdf16993"></a>
1781 <h2 class="memtitle"><span class="permalink"><a href="#ga3d50ba8546252bea959e45c8fdf16993">&#9670;&#160;</a></span>ARM_MPU_SetRegionEx()</h2>
1782
1783 <div class="memitem">
1784 <div class="memproto">
1785       <table class="memname">
1786         <tr>
1787           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegionEx </td>
1788           <td>(</td>
1789           <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
1790           <td class="paramname"><em>mpu</em>, </td>
1791         </tr>
1792         <tr>
1793           <td class="paramkey"></td>
1794           <td></td>
1795           <td class="paramtype">uint32_t&#160;</td>
1796           <td class="paramname"><em>rnr</em>, </td>
1797         </tr>
1798         <tr>
1799           <td class="paramkey"></td>
1800           <td></td>
1801           <td class="paramtype">uint32_t&#160;</td>
1802           <td class="paramname"><em>rbar</em>, </td>
1803         </tr>
1804         <tr>
1805           <td class="paramkey"></td>
1806           <td></td>
1807           <td class="paramtype">uint32_t&#160;</td>
1808           <td class="paramname"><em>rlar</em>&#160;</td>
1809         </tr>
1810         <tr>
1811           <td></td>
1812           <td>)</td>
1813           <td></td><td></td>
1814         </tr>
1815       </table>
1816 </div><div class="memdoc">
1817 <p>Configure the given MPU region of the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1818   <table class="params">
1819     <tr><td class="paramname">mpu</td><td>Pointer to MPU to be used. </td></tr>
1820     <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
1821     <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
1822     <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
1823   </table>
1824   </dd>
1825 </dl>
1826
1827 </div>
1828 </div>
1829 <a id="gabd11943b38cdf185dcb8e60e459d5854" name="gabd11943b38cdf185dcb8e60e459d5854"></a>
1830 <h2 class="memtitle"><span class="permalink"><a href="#gabd11943b38cdf185dcb8e60e459d5854">&#9670;&#160;</a></span>ARM_MPU_TYPE()</h2>
1831
1832 <div class="memitem">
1833 <div class="memproto">
1834       <table class="memname">
1835         <tr>
1836           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t ARM_MPU_TYPE </td>
1837           <td>(</td>
1838           <td class="paramname"></td><td>)</td>
1839           <td></td>
1840         </tr>
1841       </table>
1842 </div><div class="memdoc">
1843
1844 <p>Read MPU Type Register. </p>
1845 <dl class="section return"><dt>Returns</dt><dd>Number of MPU regions </dd></dl>
1846
1847 </div>
1848 </div>
1849 </div><!-- contents -->
1850 </div><!-- doc-content -->
1851 <!-- start footer part -->
1852 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
1853   <ul>
1854     <li class="footer">
1855       <script type="text/javascript">
1856         <!--
1857         writeFooter.call(this);
1858         //-->
1859       </script>
1860     </li>
1861   </ul>
1862 </div>
1863 </body>
1864 </html>