begriffs open source - cmsis/blob - v6.1.0-rc0/Core_A/group__CMSIS__ACTLR__BITS.html

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  43    <div id="projectname">CMSIS-Core (Cortex-A)
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  52    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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 128 <a href="#define-members">Macros</a>  </div>
 129   <div class="headertitle"><div class="title">ACTLR Bits<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a> &raquo; <a class="el" href="group__CMSIS__ACTLR.html">Auxiliary Control Register (ACTLR)</a></div></div></div>
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 132
 133 <p>Bit position and mask macros.
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 136 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
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 192 <tr class="memitem:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4ca2a9236b157d3f9405cf8c398897a2">ACTLR_DWBST_Pos</a>&#160;&#160;&#160;11U</td></tr>
 193 <tr class="memdesc:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DWBST Position.  <br /></td></tr>
 194 <tr class="separator:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 195 <tr class="memitem:gab948ab9af88a9357e2e383d948e9dc7e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gab948ab9af88a9357e2e383d948e9dc7e">ACTLR_DWBST_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4ca2a9236b157d3f9405cf8c398897a2">ACTLR_DWBST_Pos</a>)</td></tr>
 196 <tr class="memdesc:gab948ab9af88a9357e2e383d948e9dc7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DWBST Mask.  <br /></td></tr>
 197 <tr class="separator:gab948ab9af88a9357e2e383d948e9dc7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 198 <tr class="memitem:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga505f33bbe45bbcaa9fcb738cb30daf4e">ACTLR_L2RADIS_Pos</a>&#160;&#160;&#160;11U</td></tr>
 199 <tr class="memdesc:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L2RADIS Position.  <br /></td></tr>
 200 <tr class="separator:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 201 <tr class="memitem:gad84b20f4f5d1979bb000a14a582cad12"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gad84b20f4f5d1979bb000a14a582cad12">ACTLR_L2RADIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga505f33bbe45bbcaa9fcb738cb30daf4e">ACTLR_L2RADIS_Pos</a>)</td></tr>
 202 <tr class="memdesc:gad84b20f4f5d1979bb000a14a582cad12"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L2RADIS Mask.  <br /></td></tr>
 203 <tr class="separator:gad84b20f4f5d1979bb000a14a582cad12"><td class="memSeparator" colspan="2">&#160;</td></tr>
 204 <tr class="memitem:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga96eb411770c8e2b87f5e62b95e50ee02">ACTLR_DODMBS_Pos</a>&#160;&#160;&#160;10U</td></tr>
 205 <tr class="memdesc:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DODMBS Position.  <br /></td></tr>
 206 <tr class="separator:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="memSeparator" colspan="2">&#160;</td></tr>
 207 <tr class="memitem:ga88a85e6310334edb190a6e9298ae98b7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga88a85e6310334edb190a6e9298ae98b7">ACTLR_DODMBS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga96eb411770c8e2b87f5e62b95e50ee02">ACTLR_DODMBS_Pos</a>)</td></tr>
 208 <tr class="memdesc:ga88a85e6310334edb190a6e9298ae98b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DODMBS Mask.  <br /></td></tr>
 209 <tr class="separator:ga88a85e6310334edb190a6e9298ae98b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 210 <tr class="memitem:ga8300a65b41aa3f5c69c7cc713c847749"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8300a65b41aa3f5c69c7cc713c847749">ACTLR_PARITY_Pos</a>&#160;&#160;&#160;9U</td></tr>
 211 <tr class="memdesc:ga8300a65b41aa3f5c69c7cc713c847749"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: PARITY Position.  <br /></td></tr>
 212 <tr class="separator:ga8300a65b41aa3f5c69c7cc713c847749"><td class="memSeparator" colspan="2">&#160;</td></tr>
 213 <tr class="memitem:gadec8e5d68791dc4749bf3f075a3559fb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gadec8e5d68791dc4749bf3f075a3559fb">ACTLR_PARITY_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8300a65b41aa3f5c69c7cc713c847749">ACTLR_PARITY_Pos</a>)</td></tr>
 214 <tr class="memdesc:gadec8e5d68791dc4749bf3f075a3559fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: PARITY Mask.  <br /></td></tr>
 215 <tr class="separator:gadec8e5d68791dc4749bf3f075a3559fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 216 <tr class="memitem:ga633ee6b129f8668593687ab8537aeb7f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga633ee6b129f8668593687ab8537aeb7f">ACTLR_AOW_Pos</a>&#160;&#160;&#160;8U</td></tr>
 217 <tr class="memdesc:ga633ee6b129f8668593687ab8537aeb7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: AOW Position.  <br /></td></tr>
 218 <tr class="separator:ga633ee6b129f8668593687ab8537aeb7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 219 <tr class="memitem:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga5ca6754c31f90c7e5d1822dddfb4135c">ACTLR_AOW_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga633ee6b129f8668593687ab8537aeb7f">ACTLR_AOW_Pos</a>)</td></tr>
 220 <tr class="memdesc:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: AOW Mask.  <br /></td></tr>
 221 <tr class="separator:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 222 <tr class="memitem:ga17dcfbcdf5db82900354db5440699701"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga17dcfbcdf5db82900354db5440699701">ACTLR_EXCL_Pos</a>&#160;&#160;&#160;7U</td></tr>
 223 <tr class="memdesc:ga17dcfbcdf5db82900354db5440699701"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: EXCL Position.  <br /></td></tr>
 224 <tr class="separator:ga17dcfbcdf5db82900354db5440699701"><td class="memSeparator" colspan="2">&#160;</td></tr>
 225 <tr class="memitem:ga8b704419a7ed130ecbee00de9fd72d55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8b704419a7ed130ecbee00de9fd72d55">ACTLR_EXCL_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga17dcfbcdf5db82900354db5440699701">ACTLR_EXCL_Pos</a>)</td></tr>
 226 <tr class="memdesc:ga8b704419a7ed130ecbee00de9fd72d55"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: EXCL Mask.  <br /></td></tr>
 227 <tr class="separator:ga8b704419a7ed130ecbee00de9fd72d55"><td class="memSeparator" colspan="2">&#160;</td></tr>
 228 <tr class="memitem:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8cb19db067cca1e064189b27b1f1bcbf">ACTLR_SMP_Pos</a>&#160;&#160;&#160;6U</td></tr>
 229 <tr class="memdesc:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: SMP Position.  <br /></td></tr>
 230 <tr class="separator:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 231 <tr class="memitem:gac6dcc315f6c4527434b9b0e4106771d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gac6dcc315f6c4527434b9b0e4106771d8">ACTLR_SMP_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8cb19db067cca1e064189b27b1f1bcbf">ACTLR_SMP_Pos</a>)</td></tr>
 232 <tr class="memdesc:gac6dcc315f6c4527434b9b0e4106771d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: SMP Mask.  <br /></td></tr>
 233 <tr class="separator:gac6dcc315f6c4527434b9b0e4106771d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 234 <tr class="memitem:ga104112fe1d88dde49635e9b0f9530306"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga104112fe1d88dde49635e9b0f9530306">ACTLR_WFLZM_Pos</a>&#160;&#160;&#160;3U</td></tr>
 235 <tr class="memdesc:ga104112fe1d88dde49635e9b0f9530306"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: WFLZM Position.  <br /></td></tr>
 236 <tr class="separator:ga104112fe1d88dde49635e9b0f9530306"><td class="memSeparator" colspan="2">&#160;</td></tr>
 237 <tr class="memitem:gae5a89cb553773b10e86a9c826f11179f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gae5a89cb553773b10e86a9c826f11179f">ACTLR_WFLZM_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga104112fe1d88dde49635e9b0f9530306">ACTLR_WFLZM_Pos</a>)</td></tr>
 238 <tr class="memdesc:gae5a89cb553773b10e86a9c826f11179f"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: WFLZM Mask.  <br /></td></tr>
 239 <tr class="separator:gae5a89cb553773b10e86a9c826f11179f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 240 <tr class="memitem:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga65c3c81261a2aa26022f6bb967c4e56b">ACTLR_L1PE_Pos</a>&#160;&#160;&#160;2U</td></tr>
 241 <tr class="memdesc:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L1PE Position.  <br /></td></tr>
 242 <tr class="separator:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 243 <tr class="memitem:ga969c20495fe3e50e8c2a73454688a674"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga969c20495fe3e50e8c2a73454688a674">ACTLR_L1PE_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga65c3c81261a2aa26022f6bb967c4e56b">ACTLR_L1PE_Pos</a>)</td></tr>
 244 <tr class="memdesc:ga969c20495fe3e50e8c2a73454688a674"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L1PE Mask.  <br /></td></tr>
 245 <tr class="separator:ga969c20495fe3e50e8c2a73454688a674"><td class="memSeparator" colspan="2">&#160;</td></tr>
 246 <tr class="memitem:ga89b1a661668534177bc9679149a692ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga89b1a661668534177bc9679149a692ce">ACTLR_FW_Pos</a>&#160;&#160;&#160;0U</td></tr>
 247 <tr class="memdesc:ga89b1a661668534177bc9679149a692ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: FW Position.  <br /></td></tr>
 248 <tr class="separator:ga89b1a661668534177bc9679149a692ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
 249 <tr class="memitem:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1">ACTLR_FW_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga89b1a661668534177bc9679149a692ce">ACTLR_FW_Pos</a>)</td></tr>
 250 <tr class="memdesc:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: FW Mask.  <br /></td></tr>
 251 <tr class="separator:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 252 </table>
 253 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 254 <p>Bit position and mask macros. </p>
 255 <h2 class="groupheader">Macro Definition Documentation</h2>
 256 <a id="ga5ca6754c31f90c7e5d1822dddfb4135c" name="ga5ca6754c31f90c7e5d1822dddfb4135c"></a>
 257 <h2 class="memtitle"><span class="permalink"><a href="#ga5ca6754c31f90c7e5d1822dddfb4135c">&#9670;&#160;</a></span>ACTLR_AOW_Msk</h2>
 258
 259 <div class="memitem">
 260 <div class="memproto">
 261       <table class="memname">
 262         <tr>
 263           <td class="memname">#define ACTLR_AOW_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga633ee6b129f8668593687ab8537aeb7f">ACTLR_AOW_Pos</a>)</td>
 264         </tr>
 265       </table>
 266 </div><div class="memdoc">
 267
 268 <p>ACTLR: AOW Mask. </p>
 269
 270 </div>
 271 </div>
 272 <a id="ga633ee6b129f8668593687ab8537aeb7f" name="ga633ee6b129f8668593687ab8537aeb7f"></a>
 273 <h2 class="memtitle"><span class="permalink"><a href="#ga633ee6b129f8668593687ab8537aeb7f">&#9670;&#160;</a></span>ACTLR_AOW_Pos</h2>
 274
 275 <div class="memitem">
 276 <div class="memproto">
 277       <table class="memname">
 278         <tr>
 279           <td class="memname">#define ACTLR_AOW_Pos&#160;&#160;&#160;8U</td>
 280         </tr>
 281       </table>
 282 </div><div class="memdoc">
 283
 284 <p>ACTLR: AOW Position. </p>
 285
 286 </div>
 287 </div>
 288 <a id="ga677211818d8a2c7b118115361fbef2e7" name="ga677211818d8a2c7b118115361fbef2e7"></a>
 289 <h2 class="memtitle"><span class="permalink"><a href="#ga677211818d8a2c7b118115361fbef2e7">&#9670;&#160;</a></span>ACTLR_BP_Msk</h2>
 290
 291 <div class="memitem">
 292 <div class="memproto">
 293       <table class="memname">
 294         <tr>
 295           <td class="memname">#define ACTLR_BP_Msk&#160;&#160;&#160;(3UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga120f5d653af52bd711c27c2495ce78f6">ACTLR_BP_Pos</a>)</td>
 296         </tr>
 297       </table>
 298 </div><div class="memdoc">
 299
 300 <p>ACTLR: BP Mask. </p>
 301
 302 </div>
 303 </div>
 304 <a id="ga120f5d653af52bd711c27c2495ce78f6" name="ga120f5d653af52bd711c27c2495ce78f6"></a>
 305 <h2 class="memtitle"><span class="permalink"><a href="#ga120f5d653af52bd711c27c2495ce78f6">&#9670;&#160;</a></span>ACTLR_BP_Pos</h2>
 306
 307 <div class="memitem">
 308 <div class="memproto">
 309       <table class="memname">
 310         <tr>
 311           <td class="memname">#define ACTLR_BP_Pos&#160;&#160;&#160;15U</td>
 312         </tr>
 313       </table>
 314 </div><div class="memdoc">
 315
 316 <p>ACTLR: BP Position. </p>
 317
 318 </div>
 319 </div>
 320 <a id="gad48e0a1c1e59e6721547b45f37baa48b" name="gad48e0a1c1e59e6721547b45f37baa48b"></a>
 321 <h2 class="memtitle"><span class="permalink"><a href="#gad48e0a1c1e59e6721547b45f37baa48b">&#9670;&#160;</a></span>ACTLR_BTDIS_Msk</h2>
 322
 323 <div class="memitem">
 324 <div class="memproto">
 325       <table class="memname">
 326         <tr>
 327           <td class="memname">#define ACTLR_BTDIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8c81a1e1522400322f215c52ca80d47d">ACTLR_BTDIS_Pos</a>)</td>
 328         </tr>
 329       </table>
 330 </div><div class="memdoc">
 331
 332 <p>ACTLR: BTDIS Mask. </p>
 333
 334 </div>
 335 </div>
 336 <a id="ga8c81a1e1522400322f215c52ca80d47d" name="ga8c81a1e1522400322f215c52ca80d47d"></a>
 337 <h2 class="memtitle"><span class="permalink"><a href="#ga8c81a1e1522400322f215c52ca80d47d">&#9670;&#160;</a></span>ACTLR_BTDIS_Pos</h2>
 338
 339 <div class="memitem">
 340 <div class="memproto">
 341       <table class="memname">
 342         <tr>
 343           <td class="memname">#define ACTLR_BTDIS_Pos&#160;&#160;&#160;18U</td>
 344         </tr>
 345       </table>
 346 </div><div class="memdoc">
 347
 348 <p>ACTLR: BTDIS Position. </p>
 349
 350 </div>
 351 </div>
 352 <a id="ga0a3d58754927731758c53bd945ac35fe" name="ga0a3d58754927731758c53bd945ac35fe"></a>
 353 <h2 class="memtitle"><span class="permalink"><a href="#ga0a3d58754927731758c53bd945ac35fe">&#9670;&#160;</a></span>ACTLR_DBDI_Msk</h2>
 354
 355 <div class="memitem">
 356 <div class="memproto">
 357       <table class="memname">
 358         <tr>
 359           <td class="memname">#define ACTLR_DBDI_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga0367a8413c0a37d6c1de7b90f3a56aee">ACTLR_DBDI_Pos</a>)</td>
 360         </tr>
 361       </table>
 362 </div><div class="memdoc">
 363
 364 <p>ACTLR: DBDI Mask. </p>
 365
 366 </div>
 367 </div>
 368 <a id="ga0367a8413c0a37d6c1de7b90f3a56aee" name="ga0367a8413c0a37d6c1de7b90f3a56aee"></a>
 369 <h2 class="memtitle"><span class="permalink"><a href="#ga0367a8413c0a37d6c1de7b90f3a56aee">&#9670;&#160;</a></span>ACTLR_DBDI_Pos</h2>
 370
 371 <div class="memitem">
 372 <div class="memproto">
 373       <table class="memname">
 374         <tr>
 375           <td class="memname">#define ACTLR_DBDI_Pos&#160;&#160;&#160;28U</td>
 376         </tr>
 377       </table>
 378 </div><div class="memdoc">
 379
 380 <p>ACTLR: DBDI Position. </p>
 381
 382 </div>
 383 </div>
 384 <a id="gaeee8e0fc7b28f2a405b234e7d2c7486e" name="gaeee8e0fc7b28f2a405b234e7d2c7486e"></a>
 385 <h2 class="memtitle"><span class="permalink"><a href="#gaeee8e0fc7b28f2a405b234e7d2c7486e">&#9670;&#160;</a></span>ACTLR_DDI_Msk</h2>
 386
 387 <div class="memitem">
 388 <div class="memproto">
 389       <table class="memname">
 390         <tr>
 391           <td class="memname">#define ACTLR_DDI_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga5468e93550ce28af7114cbc1e19474c0">ACTLR_DDI_Pos</a>)</td>
 392         </tr>
 393       </table>
 394 </div><div class="memdoc">
 395
 396 <p>ACTLR: DDI Mask. </p>
 397
 398 </div>
 399 </div>
 400 <a id="ga5468e93550ce28af7114cbc1e19474c0" name="ga5468e93550ce28af7114cbc1e19474c0"></a>
 401 <h2 class="memtitle"><span class="permalink"><a href="#ga5468e93550ce28af7114cbc1e19474c0">&#9670;&#160;</a></span>ACTLR_DDI_Pos</h2>
 402
 403 <div class="memitem">
 404 <div class="memproto">
 405       <table class="memname">
 406         <tr>
 407           <td class="memname">#define ACTLR_DDI_Pos&#160;&#160;&#160;28U</td>
 408         </tr>
 409       </table>
 410 </div><div class="memdoc">
 411
 412 <p>ACTLR: DDI Position. </p>
 413
 414 </div>
 415 </div>
 416 <a id="ga4565f2632e5c4be5e1d3eb90fa6f2ac6" name="ga4565f2632e5c4be5e1d3eb90fa6f2ac6"></a>
 417 <h2 class="memtitle"><span class="permalink"><a href="#ga4565f2632e5c4be5e1d3eb90fa6f2ac6">&#9670;&#160;</a></span>ACTLR_DDVM_Msk</h2>
 418
 419 <div class="memitem">
 420 <div class="memproto">
 421       <table class="memname">
 422         <tr>
 423           <td class="memname">#define ACTLR_DDVM_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#gaa9fe7651aa9bb48eea4f5301c69ee54d">ACTLR_DDVM_Pos</a>)</td>
 424         </tr>
 425       </table>
 426 </div><div class="memdoc">
 427
 428 <p>ACTLR: DDVM Mask. </p>
 429
 430 </div>
 431 </div>
 432 <a id="gaa9fe7651aa9bb48eea4f5301c69ee54d" name="gaa9fe7651aa9bb48eea4f5301c69ee54d"></a>
 433 <h2 class="memtitle"><span class="permalink"><a href="#gaa9fe7651aa9bb48eea4f5301c69ee54d">&#9670;&#160;</a></span>ACTLR_DDVM_Pos</h2>
 434
 435 <div class="memitem">
 436 <div class="memproto">
 437       <table class="memname">
 438         <tr>
 439           <td class="memname">#define ACTLR_DDVM_Pos&#160;&#160;&#160;15U</td>
 440         </tr>
 441       </table>
 442 </div><div class="memdoc">
 443
 444 <p>ACTLR: DDVM Position. </p>
 445
 446 </div>
 447 </div>
 448 <a id="ga88a85e6310334edb190a6e9298ae98b7" name="ga88a85e6310334edb190a6e9298ae98b7"></a>
 449 <h2 class="memtitle"><span class="permalink"><a href="#ga88a85e6310334edb190a6e9298ae98b7">&#9670;&#160;</a></span>ACTLR_DODMBS_Msk</h2>
 450
 451 <div class="memitem">
 452 <div class="memproto">
 453       <table class="memname">
 454         <tr>
 455           <td class="memname">#define ACTLR_DODMBS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga96eb411770c8e2b87f5e62b95e50ee02">ACTLR_DODMBS_Pos</a>)</td>
 456         </tr>
 457       </table>
 458 </div><div class="memdoc">
 459
 460 <p>ACTLR: DODMBS Mask. </p>
 461
 462 </div>
 463 </div>
 464 <a id="ga96eb411770c8e2b87f5e62b95e50ee02" name="ga96eb411770c8e2b87f5e62b95e50ee02"></a>
 465 <h2 class="memtitle"><span class="permalink"><a href="#ga96eb411770c8e2b87f5e62b95e50ee02">&#9670;&#160;</a></span>ACTLR_DODMBS_Pos</h2>
 466
 467 <div class="memitem">
 468 <div class="memproto">
 469       <table class="memname">
 470         <tr>
 471           <td class="memname">#define ACTLR_DODMBS_Pos&#160;&#160;&#160;10U</td>
 472         </tr>
 473       </table>
 474 </div><div class="memdoc">
 475
 476 <p>ACTLR: DODMBS Position. </p>
 477
 478 </div>
 479 </div>
 480 <a id="gab948ab9af88a9357e2e383d948e9dc7e" name="gab948ab9af88a9357e2e383d948e9dc7e"></a>
 481 <h2 class="memtitle"><span class="permalink"><a href="#gab948ab9af88a9357e2e383d948e9dc7e">&#9670;&#160;</a></span>ACTLR_DWBST_Msk</h2>
 482
 483 <div class="memitem">
 484 <div class="memproto">
 485       <table class="memname">
 486         <tr>
 487           <td class="memname">#define ACTLR_DWBST_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4ca2a9236b157d3f9405cf8c398897a2">ACTLR_DWBST_Pos</a>)</td>
 488         </tr>
 489       </table>
 490 </div><div class="memdoc">
 491
 492 <p>ACTLR: DWBST Mask. </p>
 493
 494 </div>
 495 </div>
 496 <a id="ga4ca2a9236b157d3f9405cf8c398897a2" name="ga4ca2a9236b157d3f9405cf8c398897a2"></a>
 497 <h2 class="memtitle"><span class="permalink"><a href="#ga4ca2a9236b157d3f9405cf8c398897a2">&#9670;&#160;</a></span>ACTLR_DWBST_Pos</h2>
 498
 499 <div class="memitem">
 500 <div class="memproto">
 501       <table class="memname">
 502         <tr>
 503           <td class="memname">#define ACTLR_DWBST_Pos&#160;&#160;&#160;11U</td>
 504         </tr>
 505       </table>
 506 </div><div class="memdoc">
 507
 508 <p>ACTLR: DWBST Position. </p>
 509
 510 </div>
 511 </div>
 512 <a id="ga8b704419a7ed130ecbee00de9fd72d55" name="ga8b704419a7ed130ecbee00de9fd72d55"></a>
 513 <h2 class="memtitle"><span class="permalink"><a href="#ga8b704419a7ed130ecbee00de9fd72d55">&#9670;&#160;</a></span>ACTLR_EXCL_Msk</h2>
 514
 515 <div class="memitem">
 516 <div class="memproto">
 517       <table class="memname">
 518         <tr>
 519           <td class="memname">#define ACTLR_EXCL_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga17dcfbcdf5db82900354db5440699701">ACTLR_EXCL_Pos</a>)</td>
 520         </tr>
 521       </table>
 522 </div><div class="memdoc">
 523
 524 <p>ACTLR: EXCL Mask. </p>
 525
 526 </div>
 527 </div>
 528 <a id="ga17dcfbcdf5db82900354db5440699701" name="ga17dcfbcdf5db82900354db5440699701"></a>
 529 <h2 class="memtitle"><span class="permalink"><a href="#ga17dcfbcdf5db82900354db5440699701">&#9670;&#160;</a></span>ACTLR_EXCL_Pos</h2>
 530
 531 <div class="memitem">
 532 <div class="memproto">
 533       <table class="memname">
 534         <tr>
 535           <td class="memname">#define ACTLR_EXCL_Pos&#160;&#160;&#160;7U</td>
 536         </tr>
 537       </table>
 538 </div><div class="memdoc">
 539
 540 <p>ACTLR: EXCL Position. </p>
 541
 542 </div>
 543 </div>
 544 <a id="ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1" name="ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"></a>
 545 <h2 class="memtitle"><span class="permalink"><a href="#ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1">&#9670;&#160;</a></span>ACTLR_FW_Msk</h2>
 546
 547 <div class="memitem">
 548 <div class="memproto">
 549       <table class="memname">
 550         <tr>
 551           <td class="memname">#define ACTLR_FW_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga89b1a661668534177bc9679149a692ce">ACTLR_FW_Pos</a>)</td>
 552         </tr>
 553       </table>
 554 </div><div class="memdoc">
 555
 556 <p>ACTLR: FW Mask. </p>
 557
 558 </div>
 559 </div>
 560 <a id="ga89b1a661668534177bc9679149a692ce" name="ga89b1a661668534177bc9679149a692ce"></a>
 561 <h2 class="memtitle"><span class="permalink"><a href="#ga89b1a661668534177bc9679149a692ce">&#9670;&#160;</a></span>ACTLR_FW_Pos</h2>
 562
 563 <div class="memitem">
 564 <div class="memproto">
 565       <table class="memname">
 566         <tr>
 567           <td class="memname">#define ACTLR_FW_Pos&#160;&#160;&#160;0U</td>
 568         </tr>
 569       </table>
 570 </div><div class="memdoc">
 571
 572 <p>ACTLR: FW Position. </p>
 573
 574 </div>
 575 </div>
 576 <a id="gad701fa3ff69b89ba185b7482e81cb6fd" name="gad701fa3ff69b89ba185b7482e81cb6fd"></a>
 577 <h2 class="memtitle"><span class="permalink"><a href="#gad701fa3ff69b89ba185b7482e81cb6fd">&#9670;&#160;</a></span>ACTLR_L1PCTL_Msk</h2>
 578
 579 <div class="memitem">
 580 <div class="memproto">
 581       <table class="memname">
 582         <tr>
 583           <td class="memname">#define ACTLR_L1PCTL_Msk&#160;&#160;&#160;(3UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga546f1f2bbf7344bad6522205257f17ae">ACTLR_L1PCTL_Pos</a>)</td>
 584         </tr>
 585       </table>
 586 </div><div class="memdoc">
 587
 588 <p>ACTLR: L1PCTL Mask. </p>
 589
 590 </div>
 591 </div>
 592 <a id="ga546f1f2bbf7344bad6522205257f17ae" name="ga546f1f2bbf7344bad6522205257f17ae"></a>
 593 <h2 class="memtitle"><span class="permalink"><a href="#ga546f1f2bbf7344bad6522205257f17ae">&#9670;&#160;</a></span>ACTLR_L1PCTL_Pos</h2>
 594
 595 <div class="memitem">
 596 <div class="memproto">
 597       <table class="memname">
 598         <tr>
 599           <td class="memname">#define ACTLR_L1PCTL_Pos&#160;&#160;&#160;13U</td>
 600         </tr>
 601       </table>
 602 </div><div class="memdoc">
 603
 604 <p>ACTLR: L1PCTL Position. </p>
 605
 606 </div>
 607 </div>
 608 <a id="ga969c20495fe3e50e8c2a73454688a674" name="ga969c20495fe3e50e8c2a73454688a674"></a>
 609 <h2 class="memtitle"><span class="permalink"><a href="#ga969c20495fe3e50e8c2a73454688a674">&#9670;&#160;</a></span>ACTLR_L1PE_Msk</h2>
 610
 611 <div class="memitem">
 612 <div class="memproto">
 613       <table class="memname">
 614         <tr>
 615           <td class="memname">#define ACTLR_L1PE_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga65c3c81261a2aa26022f6bb967c4e56b">ACTLR_L1PE_Pos</a>)</td>
 616         </tr>
 617       </table>
 618 </div><div class="memdoc">
 619
 620 <p>ACTLR: L1PE Mask. </p>
 621
 622 </div>
 623 </div>
 624 <a id="ga65c3c81261a2aa26022f6bb967c4e56b" name="ga65c3c81261a2aa26022f6bb967c4e56b"></a>
 625 <h2 class="memtitle"><span class="permalink"><a href="#ga65c3c81261a2aa26022f6bb967c4e56b">&#9670;&#160;</a></span>ACTLR_L1PE_Pos</h2>
 626
 627 <div class="memitem">
 628 <div class="memproto">
 629       <table class="memname">
 630         <tr>
 631           <td class="memname">#define ACTLR_L1PE_Pos&#160;&#160;&#160;2U</td>
 632         </tr>
 633       </table>
 634 </div><div class="memdoc">
 635
 636 <p>ACTLR: L1PE Position. </p>
 637
 638 </div>
 639 </div>
 640 <a id="ga6aafd83ca6c02f705def8edc8c064c04" name="ga6aafd83ca6c02f705def8edc8c064c04"></a>
 641 <h2 class="memtitle"><span class="permalink"><a href="#ga6aafd83ca6c02f705def8edc8c064c04">&#9670;&#160;</a></span>ACTLR_L1RADIS_Msk</h2>
 642
 643 <div class="memitem">
 644 <div class="memproto">
 645       <table class="memname">
 646         <tr>
 647           <td class="memname">#define ACTLR_L1RADIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#gaf8b306b854ecd78110cf944d414644a1">ACTLR_L1RADIS_Pos</a>)</td>
 648         </tr>
 649       </table>
 650 </div><div class="memdoc">
 651
 652 <p>ACTLR: L1RADIS Mask. </p>
 653
 654 </div>
 655 </div>
 656 <a id="gaf8b306b854ecd78110cf944d414644a1" name="gaf8b306b854ecd78110cf944d414644a1"></a>
 657 <h2 class="memtitle"><span class="permalink"><a href="#gaf8b306b854ecd78110cf944d414644a1">&#9670;&#160;</a></span>ACTLR_L1RADIS_Pos</h2>
 658
 659 <div class="memitem">
 660 <div class="memproto">
 661       <table class="memname">
 662         <tr>
 663           <td class="memname">#define ACTLR_L1RADIS_Pos&#160;&#160;&#160;12U</td>
 664         </tr>
 665       </table>
 666 </div><div class="memdoc">
 667
 668 <p>ACTLR: L1RADIS Position. </p>
 669
 670 </div>
 671 </div>
 672 <a id="gad84b20f4f5d1979bb000a14a582cad12" name="gad84b20f4f5d1979bb000a14a582cad12"></a>
 673 <h2 class="memtitle"><span class="permalink"><a href="#gad84b20f4f5d1979bb000a14a582cad12">&#9670;&#160;</a></span>ACTLR_L2RADIS_Msk</h2>
 674
 675 <div class="memitem">
 676 <div class="memproto">
 677       <table class="memname">
 678         <tr>
 679           <td class="memname">#define ACTLR_L2RADIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga505f33bbe45bbcaa9fcb738cb30daf4e">ACTLR_L2RADIS_Pos</a>)</td>
 680         </tr>
 681       </table>
 682 </div><div class="memdoc">
 683
 684 <p>ACTLR: L2RADIS Mask. </p>
 685
 686 </div>
 687 </div>
 688 <a id="ga505f33bbe45bbcaa9fcb738cb30daf4e" name="ga505f33bbe45bbcaa9fcb738cb30daf4e"></a>
 689 <h2 class="memtitle"><span class="permalink"><a href="#ga505f33bbe45bbcaa9fcb738cb30daf4e">&#9670;&#160;</a></span>ACTLR_L2RADIS_Pos</h2>
 690
 691 <div class="memitem">
 692 <div class="memproto">
 693       <table class="memname">
 694         <tr>
 695           <td class="memname">#define ACTLR_L2RADIS_Pos&#160;&#160;&#160;11U</td>
 696         </tr>
 697       </table>
 698 </div><div class="memdoc">
 699
 700 <p>ACTLR: L2RADIS Position. </p>
 701
 702 </div>
 703 </div>
 704 <a id="gadec8e5d68791dc4749bf3f075a3559fb" name="gadec8e5d68791dc4749bf3f075a3559fb"></a>
 705 <h2 class="memtitle"><span class="permalink"><a href="#gadec8e5d68791dc4749bf3f075a3559fb">&#9670;&#160;</a></span>ACTLR_PARITY_Msk</h2>
 706
 707 <div class="memitem">
 708 <div class="memproto">
 709       <table class="memname">
 710         <tr>
 711           <td class="memname">#define ACTLR_PARITY_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8300a65b41aa3f5c69c7cc713c847749">ACTLR_PARITY_Pos</a>)</td>
 712         </tr>
 713       </table>
 714 </div><div class="memdoc">
 715
 716 <p>ACTLR: PARITY Mask. </p>
 717
 718 </div>
 719 </div>
 720 <a id="ga8300a65b41aa3f5c69c7cc713c847749" name="ga8300a65b41aa3f5c69c7cc713c847749"></a>
 721 <h2 class="memtitle"><span class="permalink"><a href="#ga8300a65b41aa3f5c69c7cc713c847749">&#9670;&#160;</a></span>ACTLR_PARITY_Pos</h2>
 722
 723 <div class="memitem">
 724 <div class="memproto">
 725       <table class="memname">
 726         <tr>
 727           <td class="memname">#define ACTLR_PARITY_Pos&#160;&#160;&#160;9U</td>
 728         </tr>
 729       </table>
 730 </div><div class="memdoc">
 731
 732 <p>ACTLR: PARITY Position. </p>
 733
 734 </div>
 735 </div>
 736 <a id="gac6aea849e5320c0e93321d5d8b0c117c" name="gac6aea849e5320c0e93321d5d8b0c117c"></a>
 737 <h2 class="memtitle"><span class="permalink"><a href="#gac6aea849e5320c0e93321d5d8b0c117c">&#9670;&#160;</a></span>ACTLR_RADIS_Msk</h2>
 738
 739 <div class="memitem">
 740 <div class="memproto">
 741       <table class="memname">
 742         <tr>
 743           <td class="memname">#define ACTLR_RADIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#gaf7a424f7f8c4f46592ce8f47f4bced44">ACTLR_RADIS_Pos</a>)</td>
 744         </tr>
 745       </table>
 746 </div><div class="memdoc">
 747
 748 <p>ACTLR: RADIS Mask. </p>
 749
 750 </div>
 751 </div>
 752 <a id="gaf7a424f7f8c4f46592ce8f47f4bced44" name="gaf7a424f7f8c4f46592ce8f47f4bced44"></a>
 753 <h2 class="memtitle"><span class="permalink"><a href="#gaf7a424f7f8c4f46592ce8f47f4bced44">&#9670;&#160;</a></span>ACTLR_RADIS_Pos</h2>
 754
 755 <div class="memitem">
 756 <div class="memproto">
 757       <table class="memname">
 758         <tr>
 759           <td class="memname">#define ACTLR_RADIS_Pos&#160;&#160;&#160;12U</td>
 760         </tr>
 761       </table>
 762 </div><div class="memdoc">
 763
 764 <p>ACTLR: RADIS Position. </p>
 765
 766 </div>
 767 </div>
 768 <a id="ga8487babc3514e2bb8f3d524e5f80d95f" name="ga8487babc3514e2bb8f3d524e5f80d95f"></a>
 769 <h2 class="memtitle"><span class="permalink"><a href="#ga8487babc3514e2bb8f3d524e5f80d95f">&#9670;&#160;</a></span>ACTLR_RSDIS_Msk</h2>
 770
 771 <div class="memitem">
 772 <div class="memproto">
 773       <table class="memname">
 774         <tr>
 775           <td class="memname">#define ACTLR_RSDIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4412a55ce52db3c5a4f035fcd0e350c6">ACTLR_RSDIS_Pos</a>)</td>
 776         </tr>
 777       </table>
 778 </div><div class="memdoc">
 779
 780 <p>ACTLR: RSDIS Mask. </p>
 781
 782 </div>
 783 </div>
 784 <a id="ga4412a55ce52db3c5a4f035fcd0e350c6" name="ga4412a55ce52db3c5a4f035fcd0e350c6"></a>
 785 <h2 class="memtitle"><span class="permalink"><a href="#ga4412a55ce52db3c5a4f035fcd0e350c6">&#9670;&#160;</a></span>ACTLR_RSDIS_Pos</h2>
 786
 787 <div class="memitem">
 788 <div class="memproto">
 789       <table class="memname">
 790         <tr>
 791           <td class="memname">#define ACTLR_RSDIS_Pos&#160;&#160;&#160;17U</td>
 792         </tr>
 793       </table>
 794 </div><div class="memdoc">
 795
 796 <p>ACTLR: RSDIS Position. </p>
 797
 798 </div>
 799 </div>
 800 <a id="gac6dcc315f6c4527434b9b0e4106771d8" name="gac6dcc315f6c4527434b9b0e4106771d8"></a>
 801 <h2 class="memtitle"><span class="permalink"><a href="#gac6dcc315f6c4527434b9b0e4106771d8">&#9670;&#160;</a></span>ACTLR_SMP_Msk</h2>
 802
 803 <div class="memitem">
 804 <div class="memproto">
 805       <table class="memname">
 806         <tr>
 807           <td class="memname">#define ACTLR_SMP_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8cb19db067cca1e064189b27b1f1bcbf">ACTLR_SMP_Pos</a>)</td>
 808         </tr>
 809       </table>
 810 </div><div class="memdoc">
 811
 812 <p>ACTLR: SMP Mask. </p>
 813
 814 </div>
 815 </div>
 816 <a id="ga8cb19db067cca1e064189b27b1f1bcbf" name="ga8cb19db067cca1e064189b27b1f1bcbf"></a>
 817 <h2 class="memtitle"><span class="permalink"><a href="#ga8cb19db067cca1e064189b27b1f1bcbf">&#9670;&#160;</a></span>ACTLR_SMP_Pos</h2>
 818
 819 <div class="memitem">
 820 <div class="memproto">
 821       <table class="memname">
 822         <tr>
 823           <td class="memname">#define ACTLR_SMP_Pos&#160;&#160;&#160;6U</td>
 824         </tr>
 825       </table>
 826 </div><div class="memdoc">
 827
 828 <p>ACTLR: SMP Position. </p>
 829
 830 </div>
 831 </div>
 832 <a id="gae5a89cb553773b10e86a9c826f11179f" name="gae5a89cb553773b10e86a9c826f11179f"></a>
 833 <h2 class="memtitle"><span class="permalink"><a href="#gae5a89cb553773b10e86a9c826f11179f">&#9670;&#160;</a></span>ACTLR_WFLZM_Msk</h2>
 834
 835 <div class="memitem">
 836 <div class="memproto">
 837       <table class="memname">
 838         <tr>
 839           <td class="memname">#define ACTLR_WFLZM_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga104112fe1d88dde49635e9b0f9530306">ACTLR_WFLZM_Pos</a>)</td>
 840         </tr>
 841       </table>
 842 </div><div class="memdoc">
 843
 844 <p>ACTLR: WFLZM Mask. </p>
 845
 846 </div>
 847 </div>
 848 <a id="ga104112fe1d88dde49635e9b0f9530306" name="ga104112fe1d88dde49635e9b0f9530306"></a>
 849 <h2 class="memtitle"><span class="permalink"><a href="#ga104112fe1d88dde49635e9b0f9530306">&#9670;&#160;</a></span>ACTLR_WFLZM_Pos</h2>
 850
 851 <div class="memitem">
 852 <div class="memproto">
 853       <table class="memname">
 854         <tr>
 855           <td class="memname">#define ACTLR_WFLZM_Pos&#160;&#160;&#160;3U</td>
 856         </tr>
 857       </table>
 858 </div><div class="memdoc">
 859
 860 <p>ACTLR: WFLZM Position. </p>
 861
 862 </div>
 863 </div>
 864 </div><!-- contents -->
 865 </div><!-- doc-content -->
 866 <!-- start footer part -->
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 871         <!--
 872         writeFooter.call(this);
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