begriffs open source - cmsis/blob - v6.1.0-rc0/Core_A/group__CMSIS__CBPM.html

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  43    <div id="projectname">CMSIS-Core (Cortex-A)
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  52    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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 125
 126 <div class="header">
 127   <div class="summary">
 128 <a href="#func-members">Functions</a>  </div>
 129   <div class="headertitle"><div class="title">Cache and branch predictor maintenance operations<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a></div></div></div>
 130 </div><!--header-->
 131 <div class="contents">
 132
 133 <p>This section describes the cache and branch predictor maintenance operations.
 134 <a href="#details">More...</a></p>
 135 <table class="memberdecls">
 136 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 137 Functions</h2></td></tr>
 138 <tr class="memitem:gaa5a1bf5487bd00c61764ee2614bea3d4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CBPM.html#gaa5a1bf5487bd00c61764ee2614bea3d4">__set_BPIALL</a> (uint32_t value)</td></tr>
 139 <tr class="memdesc:gaa5a1bf5487bd00c61764ee2614bea3d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set BPIALL.  <br /></td></tr>
 140 <tr class="separator:gaa5a1bf5487bd00c61764ee2614bea3d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 141 <tr class="memitem:ga5a6dc4a371d0e5c5ea9f9a1dcea999ff"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CBPM.html#ga5a6dc4a371d0e5c5ea9f9a1dcea999ff">__set_DCCIMVAC</a> (uint32_t value)</td></tr>
 142 <tr class="memdesc:ga5a6dc4a371d0e5c5ea9f9a1dcea999ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set DCCIMVAC.  <br /></td></tr>
 143 <tr class="separator:ga5a6dc4a371d0e5c5ea9f9a1dcea999ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
 144 <tr class="memitem:gaa47448c89b3134f5e9fbb7ba0b69c7d9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CBPM.html#gaa47448c89b3134f5e9fbb7ba0b69c7d9">__set_DCCMVAC</a> (uint32_t value)</td></tr>
 145 <tr class="memdesc:gaa47448c89b3134f5e9fbb7ba0b69c7d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set DCCMVAC.  <br /></td></tr>
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 148 <tr class="memdesc:ga643b62f37449627ca2ec3de80c1b8abb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set DCIMVAC.  <br /></td></tr>
 149 <tr class="separator:ga643b62f37449627ca2ec3de80c1b8abb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 150 <tr class="memitem:gaee63f9c620f6d37775f80667bc5f724d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CBPM.html#gaee63f9c620f6d37775f80667bc5f724d">__set_ICIALLU</a> (uint32_t value)</td></tr>
 151 <tr class="memdesc:gaee63f9c620f6d37775f80667bc5f724d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set ICIALLU.  <br /></td></tr>
 152 <tr class="separator:gaee63f9c620f6d37775f80667bc5f724d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 153 </table>
 154 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 155 <p>This section describes the cache and branch predictor maintenance operations. </p>
 156 <p>Cache maintenance operations are defined to act on particular memory locations. In addition, for instruction caches and branch predictors, there are operations that invalidate all entries.</p>
 157 <p>Consider using <a class="el" href="group__L1__cache__functions.html">L1 Cache Functions</a> and <a class="el" href="group__L2__cache__functions.html">L2C-310 Cache Controller Functions</a> for cache maintenance instead of raw register usage. </p>
 158 <h2 class="groupheader">Function Documentation</h2>
 159 <a id="gaa5a1bf5487bd00c61764ee2614bea3d4" name="gaa5a1bf5487bd00c61764ee2614bea3d4"></a>
 160 <h2 class="memtitle"><span class="permalink"><a href="#gaa5a1bf5487bd00c61764ee2614bea3d4">&#9670;&#160;</a></span>__set_BPIALL()</h2>
 161
 162 <div class="memitem">
 163 <div class="memproto">
 164       <table class="memname">
 165         <tr>
 166           <td class="memname">__STATIC_INLINE void __set_BPIALL </td>
 167           <td>(</td>
 168           <td class="paramtype">uint32_t&#160;</td>
 169           <td class="paramname"><em>value</em></td><td>)</td>
 170           <td></td>
 171         </tr>
 172       </table>
 173 </div><div class="memdoc">
 174
 175 <p>Set BPIALL. </p>
 176 <p>Branch Predictor Invalidate All</p>
 177 <p>This function writes the provided value to the Branch Predictor Invalidate All (BPIALL) register. </p>
 178
 179 </div>
 180 </div>
 181 <a id="ga5a6dc4a371d0e5c5ea9f9a1dcea999ff" name="ga5a6dc4a371d0e5c5ea9f9a1dcea999ff"></a>
 182 <h2 class="memtitle"><span class="permalink"><a href="#ga5a6dc4a371d0e5c5ea9f9a1dcea999ff">&#9670;&#160;</a></span>__set_DCCIMVAC()</h2>
 183
 184 <div class="memitem">
 185 <div class="memproto">
 186       <table class="memname">
 187         <tr>
 188           <td class="memname">__STATIC_INLINE void __set_DCCIMVAC </td>
 189           <td>(</td>
 190           <td class="paramtype">uint32_t&#160;</td>
 191           <td class="paramname"><em>value</em></td><td>)</td>
 192           <td></td>
 193         </tr>
 194       </table>
 195 </div><div class="memdoc">
 196
 197 <p>Set DCCIMVAC. </p>
 198 <p>Data cache clean and invalidate</p>
 199 <p>This function cleans and invalidates data or unified cache line by MVA to PoC. </p>
 200
 201 </div>
 202 </div>
 203 <a id="gaa47448c89b3134f5e9fbb7ba0b69c7d9" name="gaa47448c89b3134f5e9fbb7ba0b69c7d9"></a>
 204 <h2 class="memtitle"><span class="permalink"><a href="#gaa47448c89b3134f5e9fbb7ba0b69c7d9">&#9670;&#160;</a></span>__set_DCCMVAC()</h2>
 205
 206 <div class="memitem">
 207 <div class="memproto">
 208       <table class="memname">
 209         <tr>
 210           <td class="memname">__STATIC_INLINE void __set_DCCMVAC </td>
 211           <td>(</td>
 212           <td class="paramtype">uint32_t&#160;</td>
 213           <td class="paramname"><em>value</em></td><td>)</td>
 214           <td></td>
 215         </tr>
 216       </table>
 217 </div><div class="memdoc">
 218
 219 <p>Set DCCMVAC. </p>
 220 <p>Data cache clean</p>
 221 <p>This function cleans data or unified cache line by MVA to PoC. </p>
 222
 223 </div>
 224 </div>
 225 <a id="ga643b62f37449627ca2ec3de80c1b8abb" name="ga643b62f37449627ca2ec3de80c1b8abb"></a>
 226 <h2 class="memtitle"><span class="permalink"><a href="#ga643b62f37449627ca2ec3de80c1b8abb">&#9670;&#160;</a></span>__set_DCIMVAC()</h2>
 227
 228 <div class="memitem">
 229 <div class="memproto">
 230       <table class="memname">
 231         <tr>
 232           <td class="memname">__STATIC_INLINE void __set_DCIMVAC </td>
 233           <td>(</td>
 234           <td class="paramtype">uint32_t&#160;</td>
 235           <td class="paramname"><em>value</em></td><td>)</td>
 236           <td></td>
 237         </tr>
 238       </table>
 239 </div><div class="memdoc">
 240
 241 <p>Set DCIMVAC. </p>
 242 <p>Data cache invalidate</p>
 243 <p>This function invalidates data or unified cache line by MVA to PoC. </p>
 244
 245 </div>
 246 </div>
 247 <a id="gaee63f9c620f6d37775f80667bc5f724d" name="gaee63f9c620f6d37775f80667bc5f724d"></a>
 248 <h2 class="memtitle"><span class="permalink"><a href="#gaee63f9c620f6d37775f80667bc5f724d">&#9670;&#160;</a></span>__set_ICIALLU()</h2>
 249
 250 <div class="memitem">
 251 <div class="memproto">
 252       <table class="memname">
 253         <tr>
 254           <td class="memname">__STATIC_INLINE void __set_ICIALLU </td>
 255           <td>(</td>
 256           <td class="paramtype">uint32_t&#160;</td>
 257           <td class="paramname"><em>value</em></td><td>)</td>
 258           <td></td>
 259         </tr>
 260       </table>
 261 </div><div class="memdoc">
 262
 263 <p>Set ICIALLU. </p>
 264 <p>Instruction Cache Invalidate All</p>
 265 <p>This function invalidates all instruction cache. </p>
 266
 267 </div>
 268 </div>
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