begriffs open source - cmsis/blob - v6.1.0-rc0/Driver/group__spi__bit__order__ctrls.html

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  52    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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 128 <a href="#define-members">Macros</a>  </div>
 129   <div class="headertitle"><div class="title">SPI Bit Order<div class="ingroups"><a class="el" href="group__spi__interface__gr.html">SPI Interface</a> &raquo; <a class="el" href="group__SPI__control.html">SPI Control Codes</a></div></div></div>
 130 </div><!--header-->
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 132
 133 <p>Defines the bit order.
 134 <a href="#details">More...</a></p>
 135 <table class="memberdecls">
 136 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
 137 Macros</h2></td></tr>
 138 <tr class="memitem:ga98228a708cbab6e214c7ac696f77dab6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__bit__order__ctrls.html#ga98228a708cbab6e214c7ac696f77dab6">ARM_SPI_MSB_LSB</a>&#160;&#160;&#160;(0UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#a84a8f90504df32ec77832a0285a47081">ARM_SPI_BIT_ORDER_Pos</a>)</td></tr>
 139 <tr class="memdesc:ga98228a708cbab6e214c7ac696f77dab6"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI Bit order from MSB to LSB (default)  <br /></td></tr>
 140 <tr class="separator:ga98228a708cbab6e214c7ac696f77dab6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 141 <tr class="memitem:ga41c53c3b396a89ce78018467e561aaaf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__bit__order__ctrls.html#ga41c53c3b396a89ce78018467e561aaaf">ARM_SPI_LSB_MSB</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#a84a8f90504df32ec77832a0285a47081">ARM_SPI_BIT_ORDER_Pos</a>)</td></tr>
 142 <tr class="memdesc:ga41c53c3b396a89ce78018467e561aaaf"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI Bit order from LSB to MSB.  <br /></td></tr>
 143 <tr class="separator:ga41c53c3b396a89ce78018467e561aaaf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 144 </table>
 145 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 146 <p>Defines the bit order. </p>
 147 <h2 class="groupheader">Macro Definition Documentation</h2>
 148 <a id="ga98228a708cbab6e214c7ac696f77dab6" name="ga98228a708cbab6e214c7ac696f77dab6"></a>
 149 <h2 class="memtitle"><span class="permalink"><a href="#ga98228a708cbab6e214c7ac696f77dab6">&#9670;&#160;</a></span>ARM_SPI_MSB_LSB</h2>
 150
 151 <div class="memitem">
 152 <div class="memproto">
 153       <table class="memname">
 154         <tr>
 155           <td class="memname">#define ARM_SPI_MSB_LSB&#160;&#160;&#160;(0UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#a84a8f90504df32ec77832a0285a47081">ARM_SPI_BIT_ORDER_Pos</a>)</td>
 156         </tr>
 157       </table>
 158 </div><div class="memdoc">
 159
 160 <p>SPI Bit order from MSB to LSB (default) </p>
 161 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a" title="Control SPI Interface.">ARM_SPI_Control</a> </dd></dl>
 162
 163 </div>
 164 </div>
 165 <a id="ga41c53c3b396a89ce78018467e561aaaf" name="ga41c53c3b396a89ce78018467e561aaaf"></a>
 166 <h2 class="memtitle"><span class="permalink"><a href="#ga41c53c3b396a89ce78018467e561aaaf">&#9670;&#160;</a></span>ARM_SPI_LSB_MSB</h2>
 167
 168 <div class="memitem">
 169 <div class="memproto">
 170       <table class="memname">
 171         <tr>
 172           <td class="memname">#define ARM_SPI_LSB_MSB&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#a84a8f90504df32ec77832a0285a47081">ARM_SPI_BIT_ORDER_Pos</a>)</td>
 173         </tr>
 174       </table>
 175 </div><div class="memdoc">
 176
 177 <p>SPI Bit order from LSB to MSB. </p>
 178 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a" title="Control SPI Interface.">ARM_SPI_Control</a> </dd></dl>
 179
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