begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.1" date="2017-02-03">
  12       Package Description:
  13       - added taxonomy for Cclass RTOS
  14       CMSIS-RTOS2:
  15       - API 2.1   (see revision history for details)
  16       - RTX 5.1.0 (see revision history for details)
  17       CMSIS-Core: 5.0.1 (see revision history for details)
  18       - Added __PACKED_STRUCT macro
  19       - Added uVisior support
  20       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  21       - Updated template for secure main function (main_s.c)
  22       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  23       CMSIS-DSP: 1.5.1 (see revision history for details)
  24       - added ARMv8M DSP libraries.
  25       CMSIS-PACK:1.4.9 (see revision history for details)
  26       - added Pack Index File specification and schema file
  27     </release>
  28     <release version="5.0.0" date="2016-11-11">
  29       Changed open source license to Apache 2.0
  30       CMSIS_Core:
  31        - Added support for Cortex-M23 and Cortex-M33.
  32        - Added ARMv8-M device configurations for mainline and baseline.
  33        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  34        - Added cmsis_compiler.h to unify compiler behaviour.
  35        - Updated function SCB_EnableICache (for Cortex-M7).
  36        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  37       CMSIS-RTOS:
  38         - bug fix in RTX 4.82 (see revision history for details)
  39       CMSIS-RTOS2:
  40         - new API including compatibility layer to CMSIS-RTOS
  41         - reference implementation based on RTX5
  42         - supports all Cortex-M variants including TrustZone for ARMv8-M
  43       CMSIS-SVD:
  44        - reworked SVD format documentation
  45        - removed SVD file database documentation as SVD files are distributed in packs
  46        - updated SVDConv for Win32 and Linux
  47       CMSIS-DSP:
  48        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  49        - Added DSP libraries build projects to CMSIS pack.
  50     </release>
  51     <release version="4.5.0" date="2015-10-28">
  52       - CMSIS-Core     4.30.0  (see revision history for details)
  53       - CMSIS-DAP      1.1.0   (unchanged)
  54       - CMSIS-Driver   2.04.0  (see revision history for details)
  55       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  56       - CMSIS-PACK     1.4.1   (see revision history for details)
  57       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  58       - CMSIS-SVD      1.3.1   (see revision history for details)
  59     </release>
  60     <release version="4.4.0" date="2015-09-11">
  61       - CMSIS-Core     4.20   (see revision history for details)
  62       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  63       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  64       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  65       - CMSIS-RTOS
  66         -- API         1.02   (unchanged)
  67         -- RTX         4.79   (see revision history for details)
  68       - CMSIS-SVD      1.3.0  (see revision history for details)
  69       - CMSIS-DAP      1.1.0  (extended with SWO support)
  70     </release>
  71     <release version="4.3.0" date="2015-03-20">
  72       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  73       - CMSIS-DSP      1.4.5  (see revision history for details)
  74       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  75       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  76       - CMSIS-RTOS
  77         -- API         1.02   (unchanged)
  78         -- RTX         4.78   (see revision history for details)
  79       - CMSIS-SVD      1.2    (unchanged)
  80     </release>
  81     <release version="4.2.0" date="2014-09-24">
  82       Adding Cortex-M7 support
  83       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
  84       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
  85       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
  86       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
  87       - CMSIS-RTOS RTX 4.75  (see revision history for details)
  88     </release>
  89     <release version="4.1.1" date="2014-06-30">
  90       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
  91     </release>
  92     <release version="4.1.0" date="2014-06-12">
  93       - CMSIS-Driver   2.02  (incompatible update)
  94       - CMSIS-Pack     1.3   (see revision history for details)
  95       - CMSIS-DSP      1.4.2 (unchanged)
  96       - CMSIS-Core     3.30  (unchanged)
  97       - CMSIS-RTOS RTX 4.74  (unchanged)
  98       - CMSIS-RTOS API 1.02  (unchanged)
  99       - CMSIS-SVD      1.10  (unchanged)
 100       PACK:
 101       - removed G++ specific files from PACK
 102       - added Component Startup variant "C Startup"
 103       - added Pack Checking Utility
 104       - updated conditions to reflect tool-chain dependency
 105       - added Taxonomy for Graphics
 106       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 107     </release>
 108     <release version="4.0.0">
 109       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 110       - CMSIS-Pack     1.1   Preliminary
 111       - CMSIS-DSP      1.4.2 (see revision history for details)
 112       - CMSIS-Core     3.30  (see revision history for details)
 113       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 114       - CMSIS-RTOS API 1.02  (unchanged)
 115       - CMSIS-SVD      1.10  (unchanged)
 116     </release>
 117     <release version="3.20.4">
 118       - CMSIS-RTOS 4.74 (see revision history for details)
 119       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 120     </release>
 121     <release version="3.20.3">
 122       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 123       - CMSIS-RTOS 4.73 (see revision history for details)
 124     </release>
 125     <release version="3.20.2">
 126       - CMSIS-Pack documentation has been added
 127       - CMSIS-Drivers header and documentation have been added to PACK
 128       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 129     </release>
 130     <release version="3.20.1">
 131       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 132       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 133     </release>
 134     <release version="3.20.0">
 135       The software portions that are deployed in the application program are now under a BSD license which allows usage
 136       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 137       The individual components have been update as listed below:
 138       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 139       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 140       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 141       - CMSIS-SVD is unchanged.
 142     </release>
 143   </releases>
 144
 145   <taxonomy>
 146     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 147     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 148     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 149     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 150     <description Cclass="File System">File Drive Support and File System</description>
 151     <description Cclass="Graphics">Graphical User Interface</description>
 152     <description Cclass="Network">Network Stack using Internet Protocols</description>
 153     <description Cclass="USB">Universal Serial Bus Stack</description>
 154     <description Cclass="Compiler">Compiler Software Extensions</description>
 155     <description Cclass="RTOS">Real-time Operating System</description>
 156   </taxonomy>
 157
 158   <devices>
 159     <!-- ******************************  Cortex-M0  ****************************** -->
 160     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 161       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 162       <description>
 163 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 164 - simple, easy-to-use programmers model
 165 - highly efficient ultra-low power operation
 166 - excellent code density
 167 - deterministic, high-performance interrupt handling
 168 - upward compatibility with the rest of the Cortex-M processor family.
 169       </description>
 170       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 171       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 172       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 173       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 174
 175       <device Dname="ARMCM0">
 176         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 177         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 178       </device>
 179     </family>
 180
 181     <!-- ******************************  Cortex-M0P  ****************************** -->
 182     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 183       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 184       <description>
 185 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 186 - simple, easy-to-use programmers model
 187 - highly efficient ultra-low power operation
 188 - excellent code density
 189 - deterministic, high-performance interrupt handling
 190 - upward compatibility with the rest of the Cortex-M processor family.
 191       </description>
 192       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 193       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 194       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 195       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 196
 197       <device Dname="ARMCM0P">
 198         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 199         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 200       </device>
 201     </family>
 202
 203     <!-- ******************************  Cortex-M3  ****************************** -->
 204     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 205       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 206       <description>
 207 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 208 - simple, easy-to-use programmers model
 209 - highly efficient ultra-low power operation
 210 - excellent code density
 211 - deterministic, high-performance interrupt handling
 212 - upward compatibility with the rest of the Cortex-M processor family.
 213       </description>
 214       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 215       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 216       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 217       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 218
 219       <device Dname="ARMCM3">
 220         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 221         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 222       </device>
 223     </family>
 224
 225     <!-- ******************************  Cortex-M4  ****************************** -->
 226     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 227       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 228       <description>
 229 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 230 - simple, easy-to-use programmers model
 231 - highly efficient ultra-low power operation
 232 - excellent code density
 233 - deterministic, high-performance interrupt handling
 234 - upward compatibility with the rest of the Cortex-M processor family.
 235       </description>
 236       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 237       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 238       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 239       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 240
 241       <device Dname="ARMCM4">
 242         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 243         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 244       </device>
 245
 246       <device Dname="ARMCM4_FP">
 247         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 248         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 249       </device>
 250     </family>
 251
 252     <!-- ******************************  Cortex-M7  ****************************** -->
 253     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 254       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 255       <description>
 256 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 257 - simple, easy-to-use programmers model
 258 - highly efficient ultra-low power operation
 259 - excellent code density
 260 - deterministic, high-performance interrupt handling
 261 - upward compatibility with the rest of the Cortex-M processor family.
 262       </description>
 263       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 264       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 265       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 266       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 267
 268       <device Dname="ARMCM7">
 269         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 270         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 271       </device>
 272
 273       <device Dname="ARMCM7_SP">
 274         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 275         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 276       </device>
 277
 278       <device Dname="ARMCM7_DP">
 279         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 280         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 281       </device>
 282     </family>
 283
 284     <!-- ******************************  Cortex-M23  ********************** -->
 285     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 286       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 287       <description>
 288 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 289 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 290 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 291       </description>
 292       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 293       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 294       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 295       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 296       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 297       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 298
 299       <device Dname="ARMCM23">
 300         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 301         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 302       </device>
 303
 304       <device Dname="ARMCM23_TZ">
 305         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 306         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 307       </device>
 308     </family>
 309
 310     <!-- ******************************  Cortex-M33  ****************************** -->
 311     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 312       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 313       <description>
 314 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 315 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 316       </description>
 317       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 318       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 319       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 320       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 321       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 322       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 323
 324       <device Dname="ARMCM33">
 325         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 326         <description>
 327           no DSP Instructions, no Floating Point Unit, no TrustZone
 328         </description>
 329         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 330       </device>
 331
 332       <device Dname="ARMCM33_TZ">
 333         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 334         <description>
 335           no DSP Instructions, no Floating Point Unit, TrustZone
 336         </description>
 337         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 338       </device>
 339
 340       <device Dname="ARMCM33_DSP_FP">
 341         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 342         <description>
 343           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 344         </description>
 345         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 346       </device>
 347
 348       <device Dname="ARMCM33_DSP_FP_TZ">
 349         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 350         <description>
 351           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 352         </description>
 353         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 354       </device>
 355     </family>
 356
 357     <!-- ******************************  ARMSC000  ****************************** -->
 358     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 359       <description>
 360 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 361 - simple, easy-to-use programmers model
 362 - highly efficient ultra-low power operation
 363 - excellent code density
 364 - deterministic, high-performance interrupt handling
 365       </description>
 366       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 367       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 368       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 369       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 370
 371       <device Dname="ARMSC000">
 372         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 373         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 374       </device>
 375     </family>
 376
 377     <!-- ******************************  ARMSC300  ****************************** -->
 378     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 379       <description>
 380 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 381 - simple, easy-to-use programmers model
 382 - highly efficient ultra-low power operation
 383 - excellent code density
 384 - deterministic, high-performance interrupt handling
 385       </description>
 386       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 387       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 388       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 389       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 390
 391       <device Dname="ARMSC300">
 392         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 393         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 394       </device>
 395     </family>
 396
 397     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 398     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 399       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 400       <description>
 401 ARMv8-M Baseline based device with TrustZone
 402       </description>
 403       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 404       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 405       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 406       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 407       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 408       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 409
 410       <device Dname="ARMv8MBL">
 411         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 412         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 413       </device>
 414     </family>
 415
 416     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 417     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 418       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 419       <description>
 420 ARMv8-M Mainline based device with TrustZone
 421       </description>
 422       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 423       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 424       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 425       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 426       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 427       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 428
 429       <device Dname="ARMv8MML">
 430         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 431         <description>
 432           no DSP Instructions, no Floating Point Unit, TrustZone
 433         </description>
 434         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 435       </device>
 436
 437       <device Dname="ARMv8MML_DSP">
 438         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 439         <description>
 440           DSP Instructions, no Floating Point Unit, TrustZone
 441         </description>
 442         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 443       </device>
 444
 445       <device Dname="ARMv8MML_SP">
 446         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 447         <description>
 448           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 449         </description>
 450         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 451       </device>
 452
 453       <device Dname="ARMv8MML_DSP_SP">
 454         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 455         <description>
 456           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 457         </description>
 458         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 459       </device>
 460
 461       <device Dname="ARMv8MML_DP">
 462         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 463         <description>
 464           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 465         </description>
 466         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 467       </device>
 468
 469       <device Dname="ARMv8MML_DSP_DP">
 470         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 471         <description>
 472           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 473         </description>
 474         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 475       </device>
 476     </family>
 477
 478   </devices>
 479
 480
 481   <apis>
 482     <!-- CMSIS-RTOS API -->
 483     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 484       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 485       <files>
 486         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 487       </files>
 488     </api>
 489     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.0" exclusive="1">
 490       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 491       <files>
 492         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 493         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 494       </files>
 495     </api>
 496     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 497       <description>USART Driver API for Cortex-M</description>
 498       <files>
 499         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 500         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 501       </files>
 502     </api>
 503     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 504       <description>SPI Driver API for Cortex-M</description>
 505       <files>
 506         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 507         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 508       </files>
 509     </api>
 510     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 511       <description>SAI Driver API for Cortex-M</description>
 512       <files>
 513         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 514         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 515       </files>
 516     </api>
 517     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 518       <description>I2C Driver API for Cortex-M</description>
 519       <files>
 520         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 521         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 522       </files>
 523     </api>
 524     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
 525       <description>CAN Driver API for Cortex-M</description>
 526       <files>
 527         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 528         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 529       </files>
 530     </api>
 531     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 532       <description>Flash Driver API for Cortex-M</description>
 533       <files>
 534         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 535         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 536       </files>
 537     </api>
 538     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 539       <description>MCI Driver API for Cortex-M</description>
 540       <files>
 541         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 542         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 543       </files>
 544     </api>
 545     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 546       <description>NAND Flash Driver API for Cortex-M</description>
 547       <files>
 548         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 549         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 550       </files>
 551     </api>
 552     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 553       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 554       <files>
 555         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 556         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 557         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 558       </files>
 559     </api>
 560     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 561       <description>Ethernet MAC Driver API for Cortex-M</description>
 562       <files>
 563         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 564         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 565       </files>
 566     </api>
 567     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 568       <description>Ethernet PHY Driver API for Cortex-M</description>
 569       <files>
 570         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 571         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 572       </files>
 573     </api>
 574     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 575       <description>USB Device Driver API for Cortex-M</description>
 576       <files>
 577         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 578         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 579       </files>
 580     </api>
 581     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 582       <description>USB Host Driver API for Cortex-M</description>
 583       <files>
 584         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 585         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 586       </files>
 587     </api>
 588   </apis>
 589
 590   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 591   <conditions>
 592     <!-- compiler -->
 593     <condition id="ARMCC">
 594       <require Tcompiler="ARMCC"/>
 595     </condition>
 596     <condition id="GCC">
 597       <require Tcompiler="GCC"/>
 598     </condition>
 599     <condition id="IAR">
 600       <require Tcompiler="IAR"/>
 601     </condition>
 602     <condition id="ARMCC GCC">
 603       <accept Tcompiler="ARMCC"/>
 604       <accept Tcompiler="GCC"/>
 605     </condition>
 606     <condition id="ARMCC GCC IAR">
 607       <accept Tcompiler="ARMCC"/>
 608       <accept Tcompiler="GCC"/>
 609       <accept Tcompiler="IAR"/>
 610     </condition>
 611
 612     <!-- ARM architecture -->
 613     <condition id="ARMv6-M Device">
 614       <description>ARMv6-M architecture based device</description>
 615       <accept Dcore="Cortex-M0"/>
 616       <accept Dcore="Cortex-M0+"/>
 617       <accept Dcore="SC000"/>
 618     </condition>
 619     <condition id="ARMv7-M Device">
 620       <description>ARMv7-M architecture based device</description>
 621       <accept Dcore="Cortex-M3"/>
 622       <accept Dcore="Cortex-M4"/>
 623       <accept Dcore="Cortex-M7"/>
 624       <accept Dcore="SC300"/>
 625     </condition>
 626     <condition id="ARMv8-M Device">
 627       <description>ARMv8-M architecture based device</description>
 628       <accept Dcore="ARMV8MBL"/>
 629       <accept Dcore="ARMV8MML"/>
 630       <accept Dcore="Cortex-M23"/>
 631       <accept Dcore="Cortex-M33"/>
 632     </condition>
 633     <condition id="ARMv8-M TZ Device">
 634       <description>ARMv8-M architecture based device with TrustZone</description>
 635       <require condition="ARMv8-M Device"/>
 636       <require Dtz="TZ"/>
 637     </condition>
 638     <condition id="ARMv6_7-M Device">
 639       <description>ARMv6_7-M architecture based device</description>
 640       <accept condition="ARMv6-M Device"/>
 641       <accept condition="ARMv7-M Device"/>
 642     </condition>
 643     <condition id="ARMv6_7_8-M Device">
 644       <description>ARMv6_7_8-M architecture based device</description>
 645       <accept condition="ARMv6-M Device"/>
 646       <accept condition="ARMv7-M Device"/>
 647       <accept condition="ARMv8-M Device"/>
 648     </condition>
 649
 650     <!-- ARM core -->
 651     <condition id="CM0">
 652       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 653       <accept Dcore="Cortex-M0"/>
 654       <accept Dcore="Cortex-M0+"/>
 655       <accept Dcore="SC000"/>
 656     </condition>
 657     <condition id="CM3">
 658       <description>Cortex-M3 or SC300 processor based device</description>
 659       <accept Dcore="Cortex-M3"/>
 660       <accept Dcore="SC300"/>
 661     </condition>
 662     <condition id="CM4">
 663       <description>Cortex-M4 processor based device</description>
 664       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 665     </condition>
 666     <condition id="CM4_FP">
 667       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 668       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 669     </condition>
 670     <condition id="CM7">
 671       <description>Cortex-M7 processor based device</description>
 672       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 673     </condition>
 674     <condition id="CM7_FP">
 675       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 676       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 677       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 678     </condition>
 679     <condition id="CM7_SP">
 680       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 681       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 682     </condition>
 683     <condition id="CM7_DP">
 684       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 685       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 686     </condition>
 687     <condition id="CM23">
 688       <description>Cortex-M23 processor based device</description>
 689       <require Dcore="Cortex-M23"/>
 690     </condition>
 691     <condition id="CM33">
 692       <description>Cortex-M33 processor based device</description>
 693       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 694     </condition>
 695     <condition id="CM33_FP">
 696       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 697       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 698     </condition>
 699     <condition id="ARMv8MBL">
 700       <description>ARMv8-M Baseline processor based device</description>
 701       <require Dcore="ARMV8MBL"/>
 702     </condition>
 703     <condition id="ARMv8MML">
 704       <description>ARMv8-M Mainline processor based device</description>
 705       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 706     </condition>
 707     <condition id="ARMv8MML_FP">
 708       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 709       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 710       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 711     </condition>
 712
 713     <condition id="CM33_NODSP_NOFPU">
 714       <description>CM33, no DSP, no FPU</description>
 715       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 716     </condition>
 717     <condition id="CM33_DSP_NOFPU">
 718       <description>CM33, DSP, no FPU</description>
 719       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 720     </condition>
 721     <condition id="CM33_NODSP_SP">
 722       <description>CM33, no DSP, SP FPU</description>
 723       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 724     </condition>
 725     <condition id="CM33_DSP_SP">
 726       <description>CM33, DSP, SP FPU</description>
 727       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 728     </condition>
 729
 730     <condition id="ARMv8MML_NODSP_NOFPU">
 731       <description>ARMv8MML, no DSP, no FPU</description>
 732       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 733     </condition>
 734     <condition id="ARMv8MML_DSP_NOFPU">
 735       <description>ARMv8MML, DSP, no FPU</description>
 736       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 737     </condition>
 738     <condition id="ARMv8MML_NODSP_SP">
 739       <description>ARMv8MML, no DSP, SP FPU</description>
 740       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 741     </condition>
 742     <condition id="ARMv8MML_DSP_SP">
 743       <description>ARMv8MML, DSP, SP FPU</description>
 744       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 745     </condition>
 746
 747     <!-- ARMCC compiler -->
 748     <condition id="CM0_ARMCC">
 749       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 750       <require condition="CM0"/>
 751       <require Tcompiler="ARMCC"/>
 752     </condition>
 753     <condition id="CM0_LE_ARMCC">
 754       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 755       <require condition="CM0_ARMCC"/>
 756       <require Dendian="Little-endian"/>
 757     </condition>
 758     <condition id="CM0_BE_ARMCC">
 759       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 760       <require condition="CM0_ARMCC"/>
 761       <require Dendian="Big-endian"/>
 762     </condition>
 763
 764     <condition id="CM3_ARMCC">
 765       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 766       <require condition="CM3"/>
 767       <require Tcompiler="ARMCC"/>
 768     </condition>
 769     <condition id="CM3_LE_ARMCC">
 770       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 771       <require condition="CM3_ARMCC"/>
 772       <require Dendian="Little-endian"/>
 773     </condition>
 774     <condition id="CM3_BE_ARMCC">
 775       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 776       <require condition="CM3_ARMCC"/>
 777       <require Dendian="Big-endian"/>
 778     </condition>
 779
 780     <condition id="CM4_ARMCC">
 781       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 782       <require condition="CM4"/>
 783       <require Tcompiler="ARMCC"/>
 784     </condition>
 785     <condition id="CM4_LE_ARMCC">
 786       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 787       <require condition="CM4_ARMCC"/>
 788       <require Dendian="Little-endian"/>
 789     </condition>
 790     <condition id="CM4_BE_ARMCC">
 791       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 792       <require condition="CM4_ARMCC"/>
 793       <require Dendian="Big-endian"/>
 794     </condition>
 795
 796     <condition id="CM4_FP_ARMCC">
 797       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 798       <require condition="CM4_FP"/>
 799       <require Tcompiler="ARMCC"/>
 800     </condition>
 801     <condition id="CM4_FP_LE_ARMCC">
 802       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 803       <require condition="CM4_FP_ARMCC"/>
 804       <require Dendian="Little-endian"/>
 805     </condition>
 806     <condition id="CM4_FP_BE_ARMCC">
 807       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 808       <require condition="CM4_FP_ARMCC"/>
 809       <require Dendian="Big-endian"/>
 810     </condition>
 811
 812     <!-- XMC 4000 Series devices from Infineon require a special library -->
 813     <condition id="CM4_LE_ARMCC_STD">
 814       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 815       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 816       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 817       <require Tcompiler="ARMCC"/>
 818     </condition>
 819     <condition id="CM4_LE_ARMCC_IFX">
 820       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 821       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 822       <require Tcompiler="ARMCC"/>
 823     </condition>
 824     <condition id="CM4_FP_LE_ARMCC_STD">
 825       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 826       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 827       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 828       <require Tcompiler="ARMCC"/>
 829     </condition>
 830     <condition id="CM4_FP_LE_ARMCC_IFX">
 831       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 832       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 833       <require Tcompiler="ARMCC"/>
 834     </condition>
 835
 836     <condition id="CM7_ARMCC">
 837       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 838       <require condition="CM7"/>
 839       <require Tcompiler="ARMCC"/>
 840     </condition>
 841     <condition id="CM7_LE_ARMCC">
 842       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 843       <require condition="CM7_ARMCC"/>
 844       <require Dendian="Little-endian"/>
 845     </condition>
 846     <condition id="CM7_BE_ARMCC">
 847       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 848       <require condition="CM7_ARMCC"/>
 849       <require Dendian="Big-endian"/>
 850     </condition>
 851
 852     <condition id="CM7_FP_ARMCC">
 853       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 854       <require condition="CM7_FP"/>
 855       <require Tcompiler="ARMCC"/>
 856     </condition>
 857     <condition id="CM7_FP_LE_ARMCC">
 858       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 859       <require condition="CM7_FP_ARMCC"/>
 860       <require Dendian="Little-endian"/>
 861     </condition>
 862     <condition id="CM7_FP_BE_ARMCC">
 863       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 864       <require condition="CM7_FP_ARMCC"/>
 865       <require Dendian="Big-endian"/>
 866     </condition>
 867
 868     <condition id="CM7_SP_ARMCC">
 869       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 870       <require condition="CM7_SP"/>
 871       <require Tcompiler="ARMCC"/>
 872     </condition>
 873     <condition id="CM7_SP_LE_ARMCC">
 874       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 875       <require condition="CM7_SP_ARMCC"/>
 876       <require Dendian="Little-endian"/>
 877     </condition>
 878     <condition id="CM7_SP_BE_ARMCC">
 879       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 880       <require condition="CM7_SP_ARMCC"/>
 881       <require Dendian="Big-endian"/>
 882     </condition>
 883
 884     <condition id="CM7_DP_ARMCC">
 885       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 886       <require condition="CM7_DP"/>
 887       <require Tcompiler="ARMCC"/>
 888     </condition>
 889     <condition id="CM7_DP_LE_ARMCC">
 890       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 891       <require condition="CM7_DP_ARMCC"/>
 892       <require Dendian="Little-endian"/>
 893     </condition>
 894     <condition id="CM7_DP_BE_ARMCC">
 895       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 896       <require condition="CM7_DP_ARMCC"/>
 897       <require Dendian="Big-endian"/>
 898     </condition>
 899
 900     <condition id="CM23_ARMCC">
 901       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 902       <require condition="CM23"/>
 903       <require Tcompiler="ARMCC"/>
 904     </condition>
 905     <condition id="CM23_LE_ARMCC">
 906       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 907       <require condition="CM23_ARMCC"/>
 908       <require Dendian="Little-endian"/>
 909     </condition>
 910     <condition id="CM23_BE_ARMCC">
 911       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 912       <require condition="CM23_ARMCC"/>
 913       <require Dendian="Big-endian"/>
 914     </condition>
 915
 916     <condition id="CM33_ARMCC">
 917       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 918       <require condition="CM33"/>
 919       <require Tcompiler="ARMCC"/>
 920     </condition>
 921     <condition id="CM33_LE_ARMCC">
 922       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 923       <require condition="CM33_ARMCC"/>
 924       <require Dendian="Little-endian"/>
 925     </condition>
 926     <condition id="CM33_BE_ARMCC">
 927       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 928       <require condition="CM33_ARMCC"/>
 929       <require Dendian="Big-endian"/>
 930     </condition>
 931
 932     <condition id="CM33_FP_ARMCC">
 933       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 934       <require condition="CM33_FP"/>
 935       <require Tcompiler="ARMCC"/>
 936     </condition>
 937     <condition id="CM33_FP_LE_ARMCC">
 938       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 939       <require condition="CM33_FP_ARMCC"/>
 940       <require Dendian="Little-endian"/>
 941     </condition>
 942     <condition id="CM33_FP_BE_ARMCC">
 943       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 944       <require condition="CM33_FP_ARMCC"/>
 945       <require Dendian="Big-endian"/>
 946     </condition>
 947
 948     <condition id="CM33_NODSP_NOFPU_ARMCC">
 949       <description>CM33, no DSP, no FPU, ARM Compiler</description>
 950       <require condition="CM33_NODSP_NOFPU"/>
 951       <require Tcompiler="ARMCC"/>
 952     </condition>
 953     <condition id="CM33_DSP_NOFPU_ARMCC">
 954       <description>CM33, DSP, no FPU, ARM Compiler</description>
 955       <require condition="CM33_DSP_NOFPU"/>
 956       <require Tcompiler="ARMCC"/>
 957     </condition>
 958     <condition id="CM33_NODSP_SP_ARMCC">
 959       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
 960       <require condition="CM33_NODSP_SP"/>
 961       <require Tcompiler="ARMCC"/>
 962     </condition>
 963     <condition id="CM33_DSP_SP_ARMCC">
 964       <description>CM33, DSP, SP FPU, ARM Compiler</description>
 965       <require condition="CM33_DSP_SP"/>
 966       <require Tcompiler="ARMCC"/>
 967     </condition>
 968     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
 969       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
 970       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
 971       <require Dendian="Little-endian"/>
 972     </condition>
 973     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
 974       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
 975       <require condition="CM33_DSP_NOFPU_ARMCC"/>
 976       <require Dendian="Little-endian"/>
 977     </condition>
 978     <condition id="CM33_NODSP_SP_LE_ARMCC">
 979       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
 980       <require condition="CM33_NODSP_SP_ARMCC"/>
 981       <require Dendian="Little-endian"/>
 982     </condition>
 983     <condition id="CM33_DSP_SP_LE_ARMCC">
 984       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
 985       <require condition="CM33_DSP_SP_ARMCC"/>
 986       <require Dendian="Little-endian"/>
 987     </condition>
 988
 989     <condition id="ARMv8MBL_ARMCC">
 990       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
 991       <require condition="ARMv8MBL"/>
 992       <require Tcompiler="ARMCC"/>
 993     </condition>
 994     <condition id="ARMv8MBL_LE_ARMCC">
 995       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
 996       <require condition="ARMv8MBL_ARMCC"/>
 997       <require Dendian="Little-endian"/>
 998     </condition>
 999     <condition id="ARMv8MBL_BE_ARMCC">
1000       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1001       <require condition="ARMv8MBL_ARMCC"/>
1002       <require Dendian="Big-endian"/>
1003     </condition>
1004
1005     <condition id="ARMv8MML_ARMCC">
1006       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1007       <require condition="ARMv8MML"/>
1008       <require Tcompiler="ARMCC"/>
1009     </condition>
1010     <condition id="ARMv8MML_LE_ARMCC">
1011       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1012       <require condition="ARMv8MML_ARMCC"/>
1013       <require Dendian="Little-endian"/>
1014     </condition>
1015     <condition id="ARMv8MML_BE_ARMCC">
1016       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1017       <require condition="ARMv8MML_ARMCC"/>
1018       <require Dendian="Big-endian"/>
1019     </condition>
1020
1021     <condition id="ARMv8MML_FP_ARMCC">
1022       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1023       <require condition="ARMv8MML_FP"/>
1024       <require Tcompiler="ARMCC"/>
1025     </condition>
1026     <condition id="ARMv8MML_FP_LE_ARMCC">
1027       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1028       <require condition="ARMv8MML_FP_ARMCC"/>
1029       <require Dendian="Little-endian"/>
1030     </condition>
1031     <condition id="ARMv8MML_FP_BE_ARMCC">
1032       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1033       <require condition="ARMv8MML_FP_ARMCC"/>
1034       <require Dendian="Big-endian"/>
1035     </condition>
1036
1037     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1038       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1039       <require condition="ARMv8MML_NODSP_NOFPU"/>
1040       <require Tcompiler="ARMCC"/>
1041     </condition>
1042     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1043       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1044       <require condition="ARMv8MML_DSP_NOFPU"/>
1045       <require Tcompiler="ARMCC"/>
1046     </condition>
1047     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1048       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1049       <require condition="ARMv8MML_NODSP_SP"/>
1050       <require Tcompiler="ARMCC"/>
1051     </condition>
1052     <condition id="ARMv8MML_DSP_SP_ARMCC">
1053       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1054       <require condition="ARMv8MML_DSP_SP"/>
1055       <require Tcompiler="ARMCC"/>
1056     </condition>
1057     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1058       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1059       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1060       <require Dendian="Little-endian"/>
1061     </condition>
1062     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1063       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1064       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1065       <require Dendian="Little-endian"/>
1066     </condition>
1067     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1068       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1069       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1070       <require Dendian="Little-endian"/>
1071     </condition>
1072     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1073       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1074       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1075       <require Dendian="Little-endian"/>
1076     </condition>
1077
1078     <!-- GCC compiler -->
1079     <condition id="CM0_GCC">
1080       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1081       <require condition="CM0"/>
1082       <require Tcompiler="GCC"/>
1083     </condition>
1084     <condition id="CM0_LE_GCC">
1085       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1086       <require condition="CM0_GCC"/>
1087       <require Dendian="Little-endian"/>
1088     </condition>
1089     <condition id="CM0_BE_GCC">
1090       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1091       <require condition="CM0_GCC"/>
1092       <require Dendian="Big-endian"/>
1093     </condition>
1094
1095     <condition id="CM3_GCC">
1096       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1097       <require condition="CM3"/>
1098       <require Tcompiler="GCC"/>
1099     </condition>
1100     <condition id="CM3_LE_GCC">
1101       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1102       <require condition="CM3_GCC"/>
1103       <require Dendian="Little-endian"/>
1104     </condition>
1105     <condition id="CM3_BE_GCC">
1106       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1107       <require condition="CM3_GCC"/>
1108       <require Dendian="Big-endian"/>
1109     </condition>
1110
1111     <condition id="CM4_GCC">
1112       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1113       <require condition="CM4"/>
1114       <require Tcompiler="GCC"/>
1115     </condition>
1116     <condition id="CM4_LE_GCC">
1117       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1118       <require condition="CM4_GCC"/>
1119       <require Dendian="Little-endian"/>
1120     </condition>
1121     <condition id="CM4_BE_GCC">
1122       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1123       <require condition="CM4_GCC"/>
1124       <require Dendian="Big-endian"/>
1125     </condition>
1126
1127     <condition id="CM4_FP_GCC">
1128       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1129       <require condition="CM4_FP"/>
1130       <require Tcompiler="GCC"/>
1131     </condition>
1132     <condition id="CM4_FP_LE_GCC">
1133       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1134       <require condition="CM4_FP_GCC"/>
1135       <require Dendian="Little-endian"/>
1136     </condition>
1137     <condition id="CM4_FP_BE_GCC">
1138       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1139       <require condition="CM4_FP_GCC"/>
1140       <require Dendian="Big-endian"/>
1141     </condition>
1142
1143     <!-- XMC 4000 Series devices from Infineon require a special library -->
1144     <condition id="CM4_LE_GCC_STD">
1145       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1146       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1147       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1148       <require Tcompiler="GCC"/>
1149     </condition>
1150     <condition id="CM4_LE_GCC_IFX">
1151       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1152       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1153       <require Tcompiler="GCC"/>
1154     </condition>
1155     <condition id="CM4_FP_LE_GCC_STD">
1156       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1157       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1158       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1159       <require Tcompiler="GCC"/>
1160     </condition>
1161     <condition id="CM4_FP_LE_GCC_IFX">
1162       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1163       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1164       <require Tcompiler="GCC"/>
1165     </condition>
1166
1167     <condition id="CM7_GCC">
1168       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1169       <require condition="CM7"/>
1170       <require Tcompiler="GCC"/>
1171     </condition>
1172     <condition id="CM7_LE_GCC">
1173       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1174       <require condition="CM7_GCC"/>
1175       <require Dendian="Little-endian"/>
1176     </condition>
1177     <condition id="CM7_BE_GCC">
1178       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1179       <require condition="CM7_GCC"/>
1180       <require Dendian="Big-endian"/>
1181     </condition>
1182
1183     <condition id="CM7_FP_GCC">
1184       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1185       <require condition="CM7_FP"/>
1186       <require Tcompiler="GCC"/>
1187     </condition>
1188     <condition id="CM7_FP_LE_GCC">
1189       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1190       <require condition="CM7_FP_GCC"/>
1191       <require Dendian="Little-endian"/>
1192     </condition>
1193     <condition id="CM7_FP_BE_GCC">
1194       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1195       <require condition="CM7_FP_GCC"/>
1196       <require Dendian="Big-endian"/>
1197     </condition>
1198
1199     <condition id="CM7_SP_GCC">
1200       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1201       <require condition="CM7_SP"/>
1202       <require Tcompiler="GCC"/>
1203     </condition>
1204     <condition id="CM7_SP_LE_GCC">
1205       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1206       <require condition="CM7_SP_GCC"/>
1207       <require Dendian="Little-endian"/>
1208     </condition>
1209     <condition id="CM7_SP_BE_GCC">
1210       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1211       <require condition="CM7_SP_GCC"/>
1212       <require Dendian="Big-endian"/>
1213     </condition>
1214
1215     <condition id="CM7_DP_GCC">
1216       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1217       <require condition="CM7_DP"/>
1218       <require Tcompiler="GCC"/>
1219     </condition>
1220     <condition id="CM7_DP_LE_GCC">
1221       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1222       <require condition="CM7_DP_GCC"/>
1223       <require Dendian="Little-endian"/>
1224     </condition>
1225     <condition id="CM7_DP_BE_GCC">
1226       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1227       <require condition="CM7_DP_GCC"/>
1228       <require Dendian="Big-endian"/>
1229     </condition>
1230
1231     <condition id="CM23_GCC">
1232       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1233       <require condition="CM23"/>
1234       <require Tcompiler="GCC"/>
1235     </condition>
1236     <condition id="CM23_LE_GCC">
1237       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1238       <require condition="CM23_GCC"/>
1239       <require Dendian="Little-endian"/>
1240     </condition>
1241     <condition id="CM23_BE_GCC">
1242       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1243       <require condition="CM23_GCC"/>
1244       <require Dendian="Big-endian"/>
1245     </condition>
1246
1247     <condition id="CM33_GCC">
1248       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1249       <require condition="CM33"/>
1250       <require Tcompiler="GCC"/>
1251     </condition>
1252     <condition id="CM33_LE_GCC">
1253       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1254       <require condition="CM33_GCC"/>
1255       <require Dendian="Little-endian"/>
1256     </condition>
1257     <condition id="CM33_BE_GCC">
1258       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1259       <require condition="CM33_GCC"/>
1260       <require Dendian="Big-endian"/>
1261     </condition>
1262
1263     <condition id="CM33_FP_GCC">
1264       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1265       <require condition="CM33_FP"/>
1266       <require Tcompiler="GCC"/>
1267     </condition>
1268     <condition id="CM33_FP_LE_GCC">
1269       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1270       <require condition="CM33_FP_GCC"/>
1271       <require Dendian="Little-endian"/>
1272     </condition>
1273     <condition id="CM33_FP_BE_GCC">
1274       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1275       <require condition="CM33_FP_GCC"/>
1276       <require Dendian="Big-endian"/>
1277     </condition>
1278
1279     <condition id="CM33_NODSP_NOFPU_GCC">
1280       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1281       <require condition="CM33_NODSP_NOFPU"/>
1282       <require Tcompiler="GCC"/>
1283     </condition>
1284     <condition id="CM33_DSP_NOFPU_GCC">
1285       <description>CM33, DSP, no FPU, GCC Compiler</description>
1286       <require condition="CM33_DSP_NOFPU"/>
1287       <require Tcompiler="GCC"/>
1288     </condition>
1289     <condition id="CM33_NODSP_SP_GCC">
1290       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1291       <require condition="CM33_NODSP_SP"/>
1292       <require Tcompiler="GCC"/>
1293     </condition>
1294     <condition id="CM33_DSP_SP_GCC">
1295       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1296       <require condition="CM33_DSP_SP"/>
1297       <require Tcompiler="GCC"/>
1298     </condition>
1299     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1300       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1301       <require condition="CM33_NODSP_NOFPU_GCC"/>
1302       <require Dendian="Little-endian"/>
1303     </condition>
1304     <condition id="CM33_DSP_NOFPU_LE_GCC">
1305       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1306       <require condition="CM33_DSP_NOFPU_GCC"/>
1307       <require Dendian="Little-endian"/>
1308     </condition>
1309     <condition id="CM33_NODSP_SP_LE_GCC">
1310       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1311       <require condition="CM33_NODSP_SP_GCC"/>
1312       <require Dendian="Little-endian"/>
1313     </condition>
1314     <condition id="CM33_DSP_SP_LE_GCC">
1315       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1316       <require condition="CM33_DSP_SP_GCC"/>
1317       <require Dendian="Little-endian"/>
1318     </condition>
1319
1320     <condition id="ARMv8MBL_GCC">
1321       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1322       <require condition="ARMv8MBL"/>
1323       <require Tcompiler="GCC"/>
1324     </condition>
1325     <condition id="ARMv8MBL_LE_GCC">
1326       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1327       <require condition="ARMv8MBL_GCC"/>
1328       <require Dendian="Little-endian"/>
1329     </condition>
1330     <condition id="ARMv8MBL_BE_GCC">
1331       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1332       <require condition="ARMv8MBL_GCC"/>
1333       <require Dendian="Big-endian"/>
1334     </condition>
1335
1336     <condition id="ARMv8MML_GCC">
1337       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1338       <require condition="ARMv8MML"/>
1339       <require Tcompiler="GCC"/>
1340     </condition>
1341     <condition id="ARMv8MML_LE_GCC">
1342       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1343       <require condition="ARMv8MML_GCC"/>
1344       <require Dendian="Little-endian"/>
1345     </condition>
1346     <condition id="ARMv8MML_BE_GCC">
1347       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1348       <require condition="ARMv8MML_GCC"/>
1349       <require Dendian="Big-endian"/>
1350     </condition>
1351
1352     <condition id="ARMv8MML_FP_GCC">
1353       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1354       <require condition="ARMv8MML_FP"/>
1355       <require Tcompiler="GCC"/>
1356     </condition>
1357     <condition id="ARMv8MML_FP_LE_GCC">
1358       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1359       <require condition="ARMv8MML_FP_GCC"/>
1360       <require Dendian="Little-endian"/>
1361     </condition>
1362     <condition id="ARMv8MML_FP_BE_GCC">
1363       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1364       <require condition="ARMv8MML_FP_GCC"/>
1365       <require Dendian="Big-endian"/>
1366     </condition>
1367
1368     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1369       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1370       <require condition="ARMv8MML_NODSP_NOFPU"/>
1371       <require Tcompiler="GCC"/>
1372     </condition>
1373     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1374       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1375       <require condition="ARMv8MML_DSP_NOFPU"/>
1376       <require Tcompiler="GCC"/>
1377     </condition>
1378     <condition id="ARMv8MML_NODSP_SP_GCC">
1379       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1380       <require condition="ARMv8MML_NODSP_SP"/>
1381       <require Tcompiler="GCC"/>
1382     </condition>
1383     <condition id="ARMv8MML_DSP_SP_GCC">
1384       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1385       <require condition="ARMv8MML_DSP_SP"/>
1386       <require Tcompiler="GCC"/>
1387     </condition>
1388     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1389       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1390       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1391       <require Dendian="Little-endian"/>
1392     </condition>
1393     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1394       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1395       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1396       <require Dendian="Little-endian"/>
1397     </condition>
1398     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1399       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1400       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1401       <require Dendian="Little-endian"/>
1402     </condition>
1403     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1404       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1405       <require condition="ARMv8MML_DSP_SP_GCC"/>
1406       <require Dendian="Little-endian"/>
1407     </condition>
1408
1409     <!-- IAR compiler -->
1410     <condition id="CM0_IAR">
1411       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1412       <require condition="CM0"/>
1413       <require Tcompiler="IAR"/>
1414     </condition>
1415     <condition id="CM0_LE_IAR">
1416       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1417       <require condition="CM0_IAR"/>
1418       <require Dendian="Little-endian"/>
1419     </condition>
1420     <condition id="CM0_BE_IAR">
1421       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1422       <require condition="CM0_IAR"/>
1423       <require Dendian="Big-endian"/>
1424     </condition>
1425
1426     <condition id="CM3_IAR">
1427       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1428       <require condition="CM3"/>
1429       <require Tcompiler="IAR"/>
1430     </condition>
1431     <condition id="CM3_LE_IAR">
1432       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1433       <require condition="CM3_IAR"/>
1434       <require Dendian="Little-endian"/>
1435     </condition>
1436     <condition id="CM3_BE_IAR">
1437       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1438       <require condition="CM3_IAR"/>
1439       <require Dendian="Big-endian"/>
1440     </condition>
1441
1442     <condition id="CM4_IAR">
1443       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1444       <require condition="CM4"/>
1445       <require Tcompiler="IAR"/>
1446     </condition>
1447     <condition id="CM4_LE_IAR">
1448       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1449       <require condition="CM4_IAR"/>
1450       <require Dendian="Little-endian"/>
1451     </condition>
1452     <condition id="CM4_BE_IAR">
1453       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1454       <require condition="CM4_IAR"/>
1455       <require Dendian="Big-endian"/>
1456     </condition>
1457
1458     <condition id="CM4_FP_IAR">
1459       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1460       <require condition="CM4_FP"/>
1461       <require Tcompiler="IAR"/>
1462     </condition>
1463     <condition id="CM4_FP_LE_IAR">
1464       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1465       <require condition="CM4_FP_IAR"/>
1466       <require Dendian="Little-endian"/>
1467     </condition>
1468     <condition id="CM4_FP_BE_IAR">
1469       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1470       <require condition="CM4_FP_IAR"/>
1471       <require Dendian="Big-endian"/>
1472     </condition>
1473
1474     <condition id="CM7_IAR">
1475       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1476       <require condition="CM7"/>
1477       <require Tcompiler="IAR"/>
1478     </condition>
1479     <condition id="CM7_LE_IAR">
1480       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1481       <require condition="CM7_IAR"/>
1482       <require Dendian="Little-endian"/>
1483     </condition>
1484     <condition id="CM7_BE_IAR">
1485       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1486       <require condition="CM7_IAR"/>
1487       <require Dendian="Big-endian"/>
1488     </condition>
1489
1490     <condition id="CM7_FP_IAR">
1491       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1492       <require condition="CM7_FP"/>
1493       <require Tcompiler="IAR"/>
1494     </condition>
1495     <condition id="CM7_FP_LE_IAR">
1496       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1497       <require condition="CM7_FP_IAR"/>
1498       <require Dendian="Little-endian"/>
1499     </condition>
1500     <condition id="CM7_FP_BE_IAR">
1501       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1502       <require condition="CM7_FP_IAR"/>
1503       <require Dendian="Big-endian"/>
1504     </condition>
1505
1506     <condition id="CM7_SP_IAR">
1507       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1508       <require condition="CM7_SP"/>
1509       <require Tcompiler="IAR"/>
1510     </condition>
1511     <condition id="CM7_SP_LE_IAR">
1512       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1513       <require condition="CM7_SP_IAR"/>
1514       <require Dendian="Little-endian"/>
1515     </condition>
1516     <condition id="CM7_SP_BE_IAR">
1517       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1518       <require condition="CM7_SP_IAR"/>
1519       <require Dendian="Big-endian"/>
1520     </condition>
1521
1522     <condition id="CM7_DP_IAR">
1523       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1524       <require condition="CM7_DP"/>
1525       <require Tcompiler="IAR"/>
1526     </condition>
1527     <condition id="CM7_DP_LE_IAR">
1528       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1529       <require condition="CM7_DP_IAR"/>
1530       <require Dendian="Little-endian"/>
1531     </condition>
1532     <condition id="CM7_DP_BE_IAR">
1533       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1534       <require condition="CM7_DP_IAR"/>
1535       <require Dendian="Big-endian"/>
1536     </condition>
1537
1538     <!-- conditions selecting single devices and CMSIS Core -->
1539     <!-- used for component startup, GCC version is used for C-Startup -->
1540     <condition id="ARMCM0 CMSIS">
1541       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1542       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1543       <require Cclass="CMSIS" Cgroup="CORE"/>
1544     </condition>
1545     <condition id="ARMCM0 CMSIS GCC">
1546       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1547       <require condition="ARMCM0 CMSIS"/>
1548       <require condition="GCC"/>
1549     </condition>
1550
1551     <condition id="ARMCM0+ CMSIS">
1552       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1553       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1554       <require Cclass="CMSIS" Cgroup="CORE"/>
1555     </condition>
1556     <condition id="ARMCM0+ CMSIS GCC">
1557       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1558       <require condition="ARMCM0+ CMSIS"/>
1559       <require condition="GCC"/>
1560     </condition>
1561
1562     <condition id="ARMCM3 CMSIS">
1563       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1564       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1565       <require Cclass="CMSIS" Cgroup="CORE"/>
1566     </condition>
1567     <condition id="ARMCM3 CMSIS GCC">
1568       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1569       <require condition="ARMCM3 CMSIS"/>
1570       <require condition="GCC"/>
1571     </condition>
1572
1573     <condition id="ARMCM4 CMSIS">
1574       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1575       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1576       <require Cclass="CMSIS" Cgroup="CORE"/>
1577     </condition>
1578     <condition id="ARMCM4 CMSIS GCC">
1579       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1580       <require condition="ARMCM4 CMSIS"/>
1581       <require condition="GCC"/>
1582     </condition>
1583
1584     <condition id="ARMCM7 CMSIS">
1585       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1586       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1587       <require Cclass="CMSIS" Cgroup="CORE"/>
1588     </condition>
1589     <condition id="ARMCM7 CMSIS GCC">
1590       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1591       <require condition="ARMCM7 CMSIS"/>
1592       <require condition="GCC"/>
1593     </condition>
1594
1595     <condition id="ARMCM23 CMSIS">
1596       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1597       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1598       <require Cclass="CMSIS" Cgroup="CORE"/>
1599     </condition>
1600     <condition id="ARMCM23 CMSIS GCC">
1601       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1602       <require condition="ARMCM23 CMSIS"/>
1603       <require condition="GCC"/>
1604     </condition>
1605
1606     <condition id="ARMCM33 CMSIS">
1607       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1608       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1609       <require Cclass="CMSIS" Cgroup="CORE"/>
1610     </condition>
1611     <condition id="ARMCM33 CMSIS GCC">
1612       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1613       <require condition="ARMCM33 CMSIS"/>
1614       <require condition="GCC"/>
1615     </condition>
1616
1617     <condition id="ARMSC000 CMSIS">
1618       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1619       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1620       <require Cclass="CMSIS" Cgroup="CORE"/>
1621     </condition>
1622     <condition id="ARMSC000 CMSIS GCC">
1623       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1624       <require condition="ARMSC000 CMSIS"/>
1625       <require condition="GCC"/>
1626     </condition>
1627
1628     <condition id="ARMSC300 CMSIS">
1629       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1630       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1631       <require Cclass="CMSIS" Cgroup="CORE"/>
1632     </condition>
1633     <condition id="ARMSC300 CMSIS GCC">
1634       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1635       <require condition="ARMSC300 CMSIS"/>
1636       <require condition="GCC"/>
1637     </condition>
1638
1639     <condition id="ARMv8MBL CMSIS">
1640       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1641       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1642       <require Cclass="CMSIS" Cgroup="CORE"/>
1643     </condition>
1644     <condition id="ARMv8MBL CMSIS GCC">
1645       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1646       <require condition="ARMv8MBL CMSIS"/>
1647       <require condition="GCC"/>
1648     </condition>
1649
1650     <condition id="ARMv8MML CMSIS">
1651       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1652       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1653       <require Cclass="CMSIS" Cgroup="CORE"/>
1654     </condition>
1655     <condition id="ARMv8MML CMSIS GCC">
1656       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1657       <require condition="ARMv8MML CMSIS"/>
1658       <require condition="GCC"/>
1659     </condition>
1660
1661     <!-- CMSIS DSP -->
1662     <condition id="CMSIS DSP">
1663       <description>Components required for DSP</description>
1664       <require condition="ARMv6_7_8-M Device"/>
1665       <require condition="ARMCC GCC"/>
1666       <require Cclass="CMSIS" Cgroup="CORE"/>
1667     </condition>
1668
1669     <!-- RTOS RTX -->
1670     <condition id="RTOS RTX">
1671       <description>Components required for RTOS RTX</description>
1672       <require condition="ARMv6_7-M Device"/>
1673       <require condition="ARMCC GCC IAR"/>
1674       <require Cclass="Device" Cgroup="Startup"/>
1675       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1676     </condition>
1677     <condition id="RTOS RTX5">
1678       <description>Components required for RTOS RTX5</description>
1679       <require condition="ARMv6_7_8-M Device"/>
1680       <require condition="ARMCC GCC IAR"/>
1681       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1682     </condition>
1683     <condition id="RTOS2 RTX5">
1684       <description>Components required for RTOS2 RTX5</description>
1685       <require condition="ARMv6_7_8-M Device"/>
1686       <require condition="ARMCC GCC IAR"/>
1687       <require Cclass="CMSIS"  Cgroup="CORE"/>
1688       <require Cclass="Device" Cgroup="Startup"/>
1689     </condition>
1690     <condition id="RTOS2 RTX5 NS">
1691       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1692       <require condition="ARMv8-M TZ Device"/>
1693       <require condition="ARMCC GCC"/>
1694       <require Cclass="CMSIS"  Cgroup="CORE"/>
1695       <require Cclass="Device" Cgroup="Startup"/>
1696     </condition>
1697
1698   </conditions>
1699
1700   <components>
1701     <!-- CMSIS-Core component -->
1702     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.1"  condition="ARMv6_7_8-M Device" >
1703       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1704       <files>
1705         <!-- CPU independent -->
1706         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1707         <file category="include" name="CMSIS/Include/"/>
1708         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1709         <!-- Code template -->
1710         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1711         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1712       </files>
1713     </component>
1714
1715     <!-- CMSIS-Startup components -->
1716     <!-- Cortex-M0 -->
1717     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1718       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1719       <files>
1720         <!-- include folder / device header file -->
1721         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1722         <!-- startup / system file -->
1723         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1724         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1725         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1726         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1727         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1728       </files>
1729     </component>
1730     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1731       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1732       <files>
1733         <!-- include folder / device header file -->
1734         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1735         <!-- startup / system file -->
1736         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1737         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1738         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1739       </files>
1740     </component>
1741
1742     <!-- Cortex-M0+ -->
1743     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1744       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1745       <files>
1746         <!-- include folder / device header file -->
1747         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1748         <!-- startup / system file -->
1749         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1750         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1751         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1752         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1753         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1754       </files>
1755     </component>
1756     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1757       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1758       <files>
1759         <!-- include folder / device header file -->
1760         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1761         <!-- startup / system file -->
1762         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1763         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1764         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1765       </files>
1766     </component>
1767
1768     <!-- Cortex-M3 -->
1769     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1770       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1771       <files>
1772         <!-- include folder / device header file -->
1773         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1774         <!-- startup / system file -->
1775         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1776         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1777         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1778         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1779         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1780       </files>
1781     </component>
1782     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1783       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1784       <files>
1785         <!-- include folder / device header file -->
1786         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1787         <!-- startup / system file -->
1788         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1789         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1790         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1791       </files>
1792     </component>
1793
1794     <!-- Cortex-M4 -->
1795     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1796       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1797       <files>
1798         <!-- include folder / device header file -->
1799         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1800         <!-- startup / system file -->
1801         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1802         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1803         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1804         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1805         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1806       </files>
1807     </component>
1808     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1809       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1810       <files>
1811         <!-- include folder / device header file -->
1812         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1813         <!-- startup / system file -->
1814         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1815         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1816         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1817       </files>
1818     </component>
1819
1820     <!-- Cortex-M7 -->
1821     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1822       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1823       <files>
1824         <!-- include folder / device header file -->
1825         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1826         <!-- startup / system file -->
1827         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1828         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1829         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1830         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1831         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1832       </files>
1833     </component>
1834     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1835       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1836       <files>
1837         <!-- include folder / device header file -->
1838         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1839         <!-- startup / system file -->
1840         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1841         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1842         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1843       </files>
1844     </component>
1845
1846     <!-- Cortex-M23 -->
1847     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1848       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1849       <files>
1850         <!-- include folder / device header file -->
1851         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1852         <!-- startup / system file -->
1853         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1854         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1855         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1856         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1857         <!-- SAU configuration -->
1858         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1859       </files>
1860     </component>
1861     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1862       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1863       <files>
1864         <!-- include folder / device header file -->
1865         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1866         <!-- startup / system file -->
1867         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1868         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1869         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1870         <!-- SAU configuration -->
1871         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1872       </files>
1873     </component>
1874
1875     <!-- Cortex-M33 -->
1876     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
1877       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1878       <files>
1879         <!-- include folder / device header file -->
1880         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1881         <!-- startup / system file -->
1882         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
1883         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
1884         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1885         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
1886         <!-- SAU configuration -->
1887         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1888       </files>
1889     </component>
1890     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
1891       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1892       <files>
1893         <!-- include folder / device header file -->
1894         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1895         <!-- startup / system file -->
1896         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
1897         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1898         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
1899         <!-- SAU configuration -->
1900         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1901       </files>
1902     </component>
1903
1904     <!-- Cortex-SC000 -->
1905     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
1906       <description>System and Startup for Generic ARM SC000 device</description>
1907       <files>
1908         <!-- include folder / device header file -->
1909         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1910         <!-- startup / system file -->
1911         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1912         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1913         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1914         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1915         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1916       </files>
1917     </component>
1918     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1919       <description>System and Startup for Generic ARM SC000 device</description>
1920       <files>
1921         <!-- include folder / device header file -->
1922         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1923         <!-- startup / system file -->
1924         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1925         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1926         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1927       </files>
1928     </component>
1929
1930     <!-- Cortex-SC300 -->
1931     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
1932       <description>System and Startup for Generic ARM SC300 device</description>
1933       <files>
1934         <!-- include folder / device header file -->
1935         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1936         <!-- startup / system file -->
1937         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1938         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1939         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1940         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1941         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1942       </files>
1943     </component>
1944     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1945       <description>System and Startup for Generic ARM SC300 device</description>
1946       <files>
1947         <!-- include folder / device header file -->
1948         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1949         <!-- startup / system file -->
1950         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1951         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1952         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1953       </files>
1954     </component>
1955
1956     <!-- ARMv8MBL -->
1957     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1958       <description>System and Startup for Generic ARM ARMv8MBL device</description>
1959       <files>
1960         <!-- include folder / device header file -->
1961         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
1962         <!-- startup / system file -->
1963         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1964         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1965         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1966         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1967         <!-- SAU configuration -->
1968         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1969       </files>
1970     </component>
1971     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1972       <description>System and Startup for Generic ARM ARMv8MBL device</description>
1973       <files>
1974         <!-- include folder / device header file -->
1975         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
1976         <!-- startup / system file -->
1977         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1978         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1979         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
1980         <!-- SAU configuration -->
1981         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1982       </files>
1983     </component>
1984
1985     <!-- ARMv8MML -->
1986     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
1987       <description>System and Startup for Generic ARM ARMv8MML device</description>
1988       <files>
1989         <!-- include folder / device header file -->
1990         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
1991         <!-- startup / system file -->
1992         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
1993         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
1994         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
1995         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
1996         <!-- SAU configuration -->
1997         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1998       </files>
1999     </component>
2000     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2001       <description>System and Startup for Generic ARM ARMv8MML device</description>
2002       <files>
2003         <!-- include folder / device header file -->
2004         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2005         <!-- startup / system file -->
2006         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2007         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2008         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2009         <!-- SAU configuration -->
2010         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2011       </files>
2012     </component>
2013
2014
2015     <!-- CMSIS-DSP component -->
2016     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
2017       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2018       <files>
2019         <!-- CPU independent -->
2020         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2021         <file category="header" name="CMSIS/Include/arm_math.h"/>
2022
2023         <!-- CPU and Compiler dependent -->
2024         <!-- ARMCC -->
2025         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2026         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2027         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2028         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2029         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2030         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2031         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2032         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2033         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2034         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2035         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2036         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2037         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2038         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2039
2040         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2041         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2042         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2043         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2044         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2045         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2046         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2047         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2048         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2049         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2050         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2051         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2052
2053         <!-- GCC -->
2054         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2055         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2056         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2057         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2058         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2059         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2060         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2061
2062         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2063         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2064         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2065         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2066         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2067         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2068         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2069         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2070         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2071         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2072         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2073         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2074
2075       </files>
2076     </component>
2077
2078     <!-- CMSIS-RTOS Keil RTX component -->
2079     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
2080       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2081       <RTE_Components_h>
2082         <!-- the following content goes into file 'RTE_Components.h' -->
2083         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2084         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2085       </RTE_Components_h>
2086       <files>
2087         <!-- CPU independent -->
2088         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2089         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2090         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2091
2092         <!-- RTX templates -->
2093         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2094         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2095         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2096         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2097         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2098         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2099         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2100         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2101         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2102         <!-- tool-chain specific template file -->
2103         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2104         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2105         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2106
2107         <!-- CPU and Compiler dependent -->
2108         <!-- ARMCC -->
2109         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2110         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2111         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2112         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2113         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2114         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2115         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2116         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2117         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2118         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2119         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2120         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2121         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2122         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2123         <!-- GCC -->
2124         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2125         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2126         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2127         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2128         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2129         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2130         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2131         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2132         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2133         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2134         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2135         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2136         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2137         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2138         <!-- IAR -->
2139         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2140         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2141         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2142         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2143         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2144         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2145         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2146         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2147         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2148         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2149         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2150         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2151       </files>
2152     </component>
2153
2154     <!-- CMSIS-RTOS Keil RTX5 component -->
2155     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.1.0" Capiversion="1.0.0" condition="RTOS RTX5">
2156       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2157       <RTE_Components_h>
2158         <!-- the following content goes into file 'RTE_Components.h' -->
2159         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2160         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2161       </RTE_Components_h>
2162       <files>
2163         <!-- RTX header file -->
2164         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2165         <!-- RTX compatibility module for API V1 -->
2166         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2167       </files>
2168     </component>
2169
2170     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2171     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5">
2172       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2173       <RTE_Components_h>
2174         <!-- the following content goes into file 'RTE_Components.h' -->
2175         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2176         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2177       </RTE_Components_h>
2178       <files>
2179         <!-- RTX documentation -->
2180         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2181
2182         <!-- RTX header files -->
2183         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2184
2185         <!-- RTX configuration -->
2186         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2187         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2188
2189         <!-- RTX templates -->
2190         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2191         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2192         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2193         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2194         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2195         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2196         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2197         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2198         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2199
2200         <!-- RTX library configuration -->
2201         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2202
2203         <!-- RTX libraries (CPU and Compiler dependent) -->
2204         <!-- ARMCC -->
2205         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2206         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2207         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2208         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2209         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2210         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2211         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2212         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2213         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2214         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2215         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2216         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2217         <!-- GCC -->
2218         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2219         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2220         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2221         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2222         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2223         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2224         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2225         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2226         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2227         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2228         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2229         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2230         <!-- IAR -->
2231         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2232         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2233         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2234         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2235         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2236         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2237       </files>
2238     </component>
2239     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2240       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2241       <RTE_Components_h>
2242         <!-- the following content goes into file 'RTE_Components.h' -->
2243         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2244         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2245         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2246       </RTE_Components_h>
2247       <files>
2248         <!-- RTX documentation -->
2249         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2250
2251         <!-- RTX header files -->
2252         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2253
2254         <!-- RTX configuration -->
2255         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2256         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2257
2258         <!-- RTX templates -->
2259         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2260         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2261         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2262         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2263         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2264         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2265         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2266         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2267         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2268
2269         <!-- RTX library configuration -->
2270         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2271
2272         <!-- RTX libraries (CPU and Compiler dependent) -->
2273         <!-- ARMCC -->
2274         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2275         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2276         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2277         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2278         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2279         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2280         <!-- GCC -->
2281         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2282         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2283         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2284         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2285         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2286         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2287       </files>
2288     </component>
2289     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5">
2290       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2291       <RTE_Components_h>
2292         <!-- the following content goes into file 'RTE_Components.h' -->
2293         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2294         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2295         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2296       </RTE_Components_h>
2297       <files>
2298         <!-- RTX documentation -->
2299         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2300
2301         <!-- RTX header files -->
2302         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2303
2304         <!-- RTX configuration -->
2305         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2306         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2307
2308         <!-- RTX templates -->
2309         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2310         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2311         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2312         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2313         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2314         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2315         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2316         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2317         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2318
2319         <!-- RTX sources (core) -->
2320         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2321         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2322         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2323         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2324         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2325         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2326         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2327         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2328         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2329         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2330         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2331         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2332         <!-- RTX sources (library configuration) -->
2333         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2334         <!-- RTX sources (handlers ARMCC) -->
2335         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2336         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2337         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2338         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2339         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2340         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2341         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2342         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2343         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2344         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2345         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2346         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2347         <!-- RTX sources (handlers GCC) -->
2348         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2349         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2350         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2351         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2352         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2353         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2354         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2355         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2356         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2357         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2358         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2359         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2360         <!-- RTX sources (handlers IAR) -->
2361         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2362         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2363         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2364         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2365         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2366         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2367       </files>
2368     </component>
2369     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2370       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2371       <RTE_Components_h>
2372         <!-- the following content goes into file 'RTE_Components.h' -->
2373         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2374         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2375         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2376         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2377       </RTE_Components_h>
2378       <files>
2379         <!-- RTX documentation -->
2380         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2381
2382         <!-- RTX header files -->
2383         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2384
2385         <!-- RTX configuration -->
2386         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2387         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2388
2389         <!-- RTX templates -->
2390         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2391         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2392         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2393         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2394         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2395         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2396         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2397         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2398         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2399
2400         <!-- RTX sources (core) -->
2401         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2402         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2403         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2404         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2405         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2406         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2407         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2408         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2409         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2410         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2411         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2412         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2413         <!-- RTX sources (library configuration) -->
2414         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2415         <!-- RTX sources (ARMCC handlers) -->
2416         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2417         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2418         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2419         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2420         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2421         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2422         <!-- RTX sources (GCC handlers) -->
2423         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2424         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2425         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2426         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2427         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2428         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2429       </files>
2430     </component>
2431
2432   </components>
2433
2434   <boards>
2435     <board name="uVision Simulator" vendor="Keil">
2436       <description>uVision Simulator</description>
2437       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2438       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2439       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2440       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2441       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2442       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2443       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2444       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2445       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2446       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2447       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2448       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2449       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2450       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2451       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2452       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2453       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2454    </board>
2455   </boards>
2456
2457   <examples>
2458     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2459       <description>DSP_Lib Class Marks example</description>
2460       <board name="uVision Simulator" vendor="Keil"/>
2461       <project>
2462         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2463       </project>
2464       <attributes>
2465         <component Cclass="CMSIS" Cgroup="CORE"/>
2466         <component Cclass="CMSIS" Cgroup="DSP"/>
2467         <component Cclass="Device" Cgroup="Startup"/>
2468         <category>Getting Started</category>
2469       </attributes>
2470     </example>
2471
2472     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2473       <description>DSP_Lib Convolution example</description>
2474       <board name="uVision Simulator" vendor="Keil"/>
2475       <project>
2476         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2477       </project>
2478       <attributes>
2479         <component Cclass="CMSIS" Cgroup="CORE"/>
2480         <component Cclass="CMSIS" Cgroup="DSP"/>
2481         <component Cclass="Device" Cgroup="Startup"/>
2482         <category>Getting Started</category>
2483       </attributes>
2484     </example>
2485
2486     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2487       <description>DSP_Lib Dotproduct example</description>
2488       <board name="uVision Simulator" vendor="Keil"/>
2489       <project>
2490         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2491       </project>
2492       <attributes>
2493         <component Cclass="CMSIS" Cgroup="CORE"/>
2494         <component Cclass="CMSIS" Cgroup="DSP"/>
2495         <component Cclass="Device" Cgroup="Startup"/>
2496         <category>Getting Started</category>
2497       </attributes>
2498     </example>
2499
2500     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2501       <description>DSP_Lib FFT Bin example</description>
2502       <board name="uVision Simulator" vendor="Keil"/>
2503       <project>
2504         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2505       </project>
2506       <attributes>
2507         <component Cclass="CMSIS" Cgroup="CORE"/>
2508         <component Cclass="CMSIS" Cgroup="DSP"/>
2509         <component Cclass="Device" Cgroup="Startup"/>
2510         <category>Getting Started</category>
2511       </attributes>
2512     </example>
2513
2514     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2515       <description>DSP_Lib FIR example</description>
2516       <board name="uVision Simulator" vendor="Keil"/>
2517       <project>
2518         <environment name="uv" load="arm_fir_example.uvprojx"/>
2519       </project>
2520       <attributes>
2521         <component Cclass="CMSIS" Cgroup="CORE"/>
2522         <component Cclass="CMSIS" Cgroup="DSP"/>
2523         <component Cclass="Device" Cgroup="Startup"/>
2524         <category>Getting Started</category>
2525       </attributes>
2526     </example>
2527
2528     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2529       <description>DSP_Lib Graphic Equalizer example</description>
2530       <board name="uVision Simulator" vendor="Keil"/>
2531       <project>
2532         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2533       </project>
2534       <attributes>
2535         <component Cclass="CMSIS" Cgroup="CORE"/>
2536         <component Cclass="CMSIS" Cgroup="DSP"/>
2537         <component Cclass="Device" Cgroup="Startup"/>
2538         <category>Getting Started</category>
2539       </attributes>
2540     </example>
2541
2542     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2543       <description>DSP_Lib Linear Interpolation example</description>
2544       <board name="uVision Simulator" vendor="Keil"/>
2545       <project>
2546         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2547       </project>
2548       <attributes>
2549         <component Cclass="CMSIS" Cgroup="CORE"/>
2550         <component Cclass="CMSIS" Cgroup="DSP"/>
2551         <component Cclass="Device" Cgroup="Startup"/>
2552         <category>Getting Started</category>
2553       </attributes>
2554     </example>
2555
2556     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2557       <description>DSP_Lib Matrix example</description>
2558       <board name="uVision Simulator" vendor="Keil"/>
2559       <project>
2560         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2561       </project>
2562       <attributes>
2563         <component Cclass="CMSIS" Cgroup="CORE"/>
2564         <component Cclass="CMSIS" Cgroup="DSP"/>
2565         <component Cclass="Device" Cgroup="Startup"/>
2566         <category>Getting Started</category>
2567       </attributes>
2568     </example>
2569
2570     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2571       <description>DSP_Lib Signal Convergence example</description>
2572       <board name="uVision Simulator" vendor="Keil"/>
2573       <project>
2574         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2575       </project>
2576       <attributes>
2577         <component Cclass="CMSIS" Cgroup="CORE"/>
2578         <component Cclass="CMSIS" Cgroup="DSP"/>
2579         <component Cclass="Device" Cgroup="Startup"/>
2580         <category>Getting Started</category>
2581       </attributes>
2582     </example>
2583
2584     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2585       <description>DSP_Lib Sinus/Cosinus example</description>
2586       <board name="uVision Simulator" vendor="Keil"/>
2587       <project>
2588         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2589       </project>
2590       <attributes>
2591         <component Cclass="CMSIS" Cgroup="CORE"/>
2592         <component Cclass="CMSIS" Cgroup="DSP"/>
2593         <component Cclass="Device" Cgroup="Startup"/>
2594         <category>Getting Started</category>
2595       </attributes>
2596     </example>
2597
2598     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2599       <description>DSP_Lib Variance example</description>
2600       <board name="uVision Simulator" vendor="Keil"/>
2601       <project>
2602         <environment name="uv" load="arm_variance_example.uvprojx"/>
2603       </project>
2604       <attributes>
2605         <component Cclass="CMSIS" Cgroup="CORE"/>
2606         <component Cclass="CMSIS" Cgroup="DSP"/>
2607         <component Cclass="Device" Cgroup="Startup"/>
2608         <category>Getting Started</category>
2609       </attributes>
2610     </example>
2611
2612     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2613       <description>CMSIS-RTOS2 Blinky example</description>
2614       <board name="uVision Simulator" vendor="Keil"/>
2615       <project>
2616         <environment name="uv" load="Blinky.uvprojx"/>
2617       </project>
2618       <attributes>
2619         <component Cclass="CMSIS" Cgroup="CORE"/>
2620         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2621         <component Cclass="Device" Cgroup="Startup"/>
2622         <category>Getting Started</category>
2623       </attributes>
2624     </example>
2625
2626     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2627       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2628       <board name="uVision Simulator" vendor="Keil"/>
2629       <project>
2630         <environment name="uv" load="Blinky.uvprojx"/>
2631       </project>
2632       <attributes>
2633         <component Cclass="CMSIS" Cgroup="CORE"/>
2634         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2635         <component Cclass="Device" Cgroup="Startup"/>
2636         <category>Getting Started</category>
2637       </attributes>
2638     </example>
2639
2640     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2641       <description>Bare-metal secure/non-secure example without RTOS</description>
2642       <board name="uVision Simulator" vendor="Keil"/>
2643       <project>
2644         <environment name="uv" load="NoRTOS.uvmpw"/>
2645       </project>
2646       <attributes>
2647         <component Cclass="CMSIS" Cgroup="CORE"/>
2648         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2649         <component Cclass="Device" Cgroup="Startup"/>
2650         <category>Getting Started</category>
2651       </attributes>
2652     </example>
2653
2654     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2655       <description>Secure/non-secure RTOS example with thread context management</description>
2656       <board name="uVision Simulator" vendor="Keil"/>
2657       <project>
2658         <environment name="uv" load="RTOS.uvmpw"/>
2659       </project>
2660       <attributes>
2661         <component Cclass="CMSIS" Cgroup="CORE"/>
2662         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2663         <component Cclass="Device" Cgroup="Startup"/>
2664         <category>Getting Started</category>
2665       </attributes>
2666     </example>
2667
2668     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2669       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2670       <board name="uVision Simulator" vendor="Keil"/>
2671       <project>
2672         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2673       </project>
2674       <attributes>
2675         <component Cclass="CMSIS" Cgroup="CORE"/>
2676         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2677         <component Cclass="Device" Cgroup="Startup"/>
2678         <category>Getting Started</category>
2679       </attributes>
2680     </example>
2681
2682   </examples>
2683
2684 </package>