begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.3.1-dev7">
  12       Generic Arm Device:
  13        - Reworked ARM device support files.
  14        - Updated RTOS2 examples.
  15        - Updated DSP examples.
  16        - Updated CoreValidation examples.
  17     </release>
  18     <release version="5.3.1-dev6">
  19       Utilities:
  20       - updated SVDConv and PackChk for Win32 and Linux
  21     </release>
  22     <release version="5.3.1-dev5">
  23       Aligned pack structure with repository.
  24       The following folders are deprecated:
  25       - CMSIS/Include/
  26       - CMSIS/DSP_Lib/
  27     </release>
  28     <release version="5.3.1-dev4">
  29       CMSIS-RTOS2:
  30         - API 2.1.3 (see revision history for details)
  31     </release>
  32     <release version="5.3.1-dev3">
  33       RTX5 (Cortex-A): updated exception handling
  34     </release>
  35     <release version="5.3.1-dev2">
  36       CMSIS-RTOS2:
  37         - RTX 5.4.0 (see revision history for details)
  38     </release>
  39     <release version="5.3.1-dev1">
  40       CMSIS-Core(M): 5.1.2 (see revision history for details)
  41       CMSIS-Core(A): 1.1.2 (see revision history for details)
  42       CMSIS-RTOS2:
  43         - RTX 5.3.1 (see revision history for details)
  44       CMSIS-Driver:
  45         - Flash Driver API V2.2.0
  46     </release>
  47     <release version="5.3.1-dev0">
  48       Patch release scheduled for after EW18.
  49     </release>
  50     <release version="5.3.0" date="2018-02-22">
  51       Updated Arm company brand.
  52       CMSIS-Core(M): 5.1.1 (see revision history for details)
  53       CMSIS-Core(A): 1.1.1 (see revision history for details)
  54       CMSIS-DAP: 2.0.0 (see revision history for details)
  55       CMSIS-NN: 1.0.0
  56         - Initial contribution of the bare metal Neural Network Library.
  57       CMSIS-RTOS2:
  58         - RTX 5.3.0 (see revision history for details)
  59         - OS Tick API 1.0.1
  60     </release>
  61     <release version="5.2.0" date="2017-11-16">
  62       CMSIS-Core(M): 5.1.0 (see revision history for details)
  63         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  64         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  65       CMSIS-Core(A): 1.1.0 (see revision history for details)
  66         - Added compiler_iccarm.h.
  67         - Added additional access functions for physical timer.
  68       CMSIS-DAP: 1.2.0 (see revision history for details)
  69       CMSIS-DSP: 1.5.2 (see revision history for details)
  70       CMSIS-Driver: 2.6.0 (see revision history for details)
  71         - CAN Driver API V1.2.0
  72         - NAND Driver API V2.3.0
  73       CMSIS-RTOS:
  74         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  75       CMSIS-RTOS2:
  76         - API 2.1.2 (see revision history for details)
  77         - RTX 5.2.3 (see revision history for details)
  78       Devices:
  79         - Added GCC startup and linker script for Cortex-A9.
  80         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  81         - Added IAR startup code for Cortex-A9
  82     </release>
  83     <release version="5.1.1" date="2017-09-19">
  84       CMSIS-RTOS2:
  85       - RTX 5.2.1 (see revision history for details)
  86     </release>
  87     <release version="5.1.0" date="2017-08-04">
  88       CMSIS-Core(M): 5.0.2 (see revision history for details)
  89       - Changed Version Control macros to be core agnostic.
  90       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  91       CMSIS-Core(A): 1.0.0 (see revision history for details)
  92       - Initial release
  93       - IRQ Controller API 1.0.0
  94       CMSIS-Driver: 2.05 (see revision history for details)
  95       - All typedefs related to status have been made volatile.
  96       CMSIS-RTOS2:
  97       - API 2.1.1 (see revision history for details)
  98       - RTX 5.2.0 (see revision history for details)
  99       - OS Tick API 1.0.0
 100       CMSIS-DSP: 1.5.2 (see revision history for details)
 101       - Fixed GNU Compiler specific diagnostics.
 102       CMSIS-PACK: 1.5.0 (see revision history for details)
 103       - added System Description File (*.SDF) Format
 104       CMSIS-Zone: 0.0.1 (Preview)
 105       - Initial specification draft
 106     </release>
 107     <release version="5.0.1" date="2017-02-03">
 108       Package Description:
 109       - added taxonomy for Cclass RTOS
 110       CMSIS-RTOS2:
 111       - API 2.1   (see revision history for details)
 112       - RTX 5.1.0 (see revision history for details)
 113       CMSIS-Core: 5.0.1 (see revision history for details)
 114       - Added __PACKED_STRUCT macro
 115       - Added uVisior support
 116       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 117       - Updated template for secure main function (main_s.c)
 118       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 119       CMSIS-DSP: 1.5.1 (see revision history for details)
 120       - added ARMv8M DSP libraries.
 121       CMSIS-PACK:1.4.9 (see revision history for details)
 122       - added Pack Index File specification and schema file
 123     </release>
 124     <release version="5.0.0" date="2016-11-11">
 125       Changed open source license to Apache 2.0
 126       CMSIS_Core:
 127        - Added support for Cortex-M23 and Cortex-M33.
 128        - Added ARMv8-M device configurations for mainline and baseline.
 129        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 130        - Added cmsis_compiler.h to unify compiler behaviour.
 131        - Updated function SCB_EnableICache (for Cortex-M7).
 132        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 133       CMSIS-RTOS:
 134         - bug fix in RTX 4.82 (see revision history for details)
 135       CMSIS-RTOS2:
 136         - new API including compatibility layer to CMSIS-RTOS
 137         - reference implementation based on RTX5
 138         - supports all Cortex-M variants including TrustZone for ARMv8-M
 139       CMSIS-SVD:
 140        - reworked SVD format documentation
 141        - removed SVD file database documentation as SVD files are distributed in packs
 142        - updated SVDConv for Win32 and Linux
 143       CMSIS-DSP:
 144        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 145        - Added DSP libraries build projects to CMSIS pack.
 146     </release>
 147     <release version="4.5.0" date="2015-10-28">
 148       - CMSIS-Core     4.30.0  (see revision history for details)
 149       - CMSIS-DAP      1.1.0   (unchanged)
 150       - CMSIS-Driver   2.04.0  (see revision history for details)
 151       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 152       - CMSIS-PACK     1.4.1   (see revision history for details)
 153       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 154       - CMSIS-SVD      1.3.1   (see revision history for details)
 155     </release>
 156     <release version="4.4.0" date="2015-09-11">
 157       - CMSIS-Core     4.20   (see revision history for details)
 158       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 159       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 160       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 161       - CMSIS-RTOS
 162         -- API         1.02   (unchanged)
 163         -- RTX         4.79   (see revision history for details)
 164       - CMSIS-SVD      1.3.0  (see revision history for details)
 165       - CMSIS-DAP      1.1.0  (extended with SWO support)
 166     </release>
 167     <release version="4.3.0" date="2015-03-20">
 168       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 169       - CMSIS-DSP      1.4.5  (see revision history for details)
 170       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 171       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 172       - CMSIS-RTOS
 173         -- API         1.02   (unchanged)
 174         -- RTX         4.78   (see revision history for details)
 175       - CMSIS-SVD      1.2    (unchanged)
 176     </release>
 177     <release version="4.2.0" date="2014-09-24">
 178       Adding Cortex-M7 support
 179       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 180       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 181       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 182       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 183       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 184     </release>
 185     <release version="4.1.1" date="2014-06-30">
 186       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 187     </release>
 188     <release version="4.1.0" date="2014-06-12">
 189       - CMSIS-Driver   2.02  (incompatible update)
 190       - CMSIS-Pack     1.3   (see revision history for details)
 191       - CMSIS-DSP      1.4.2 (unchanged)
 192       - CMSIS-Core     3.30  (unchanged)
 193       - CMSIS-RTOS RTX 4.74  (unchanged)
 194       - CMSIS-RTOS API 1.02  (unchanged)
 195       - CMSIS-SVD      1.10  (unchanged)
 196       PACK:
 197       - removed G++ specific files from PACK
 198       - added Component Startup variant "C Startup"
 199       - added Pack Checking Utility
 200       - updated conditions to reflect tool-chain dependency
 201       - added Taxonomy for Graphics
 202       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 203     </release>
 204     <release version="4.0.0">
 205       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 206       - CMSIS-Pack     1.1   Preliminary
 207       - CMSIS-DSP      1.4.2 (see revision history for details)
 208       - CMSIS-Core     3.30  (see revision history for details)
 209       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 210       - CMSIS-RTOS API 1.02  (unchanged)
 211       - CMSIS-SVD      1.10  (unchanged)
 212     </release>
 213     <release version="3.20.4">
 214       - CMSIS-RTOS 4.74 (see revision history for details)
 215       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 216     </release>
 217     <release version="3.20.3">
 218       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 219       - CMSIS-RTOS 4.73 (see revision history for details)
 220     </release>
 221     <release version="3.20.2">
 222       - CMSIS-Pack documentation has been added
 223       - CMSIS-Drivers header and documentation have been added to PACK
 224       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 225     </release>
 226     <release version="3.20.1">
 227       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 228       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 229     </release>
 230     <release version="3.20.0">
 231       The software portions that are deployed in the application program are now under a BSD license which allows usage
 232       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 233       The individual components have been update as listed below:
 234       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 235       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 236       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 237       - CMSIS-SVD is unchanged.
 238     </release>
 239   </releases>
 240
 241   <taxonomy>
 242     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 243     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 244     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 245     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 246     <description Cclass="File System">File Drive Support and File System</description>
 247     <description Cclass="Graphics">Graphical User Interface</description>
 248     <description Cclass="Network">Network Stack using Internet Protocols</description>
 249     <description Cclass="USB">Universal Serial Bus Stack</description>
 250     <description Cclass="Compiler">Compiler Software Extensions</description>
 251     <description Cclass="RTOS">Real-time Operating System</description>
 252   </taxonomy>
 253
 254   <devices>
 255     <!-- ******************************  Cortex-M0  ****************************** -->
 256     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 257       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 258       <description>
 259 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 260 - simple, easy-to-use programmers model
 261 - highly efficient ultra-low power operation
 262 - excellent code density
 263 - deterministic, high-performance interrupt handling
 264 - upward compatibility with the rest of the Cortex-M processor family.
 265       </description>
 266       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 267       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 268       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 269       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 270
 271       <device Dname="ARMCM0">
 272         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 273         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 274       </device>
 275     </family>
 276
 277     <!-- ******************************  Cortex-M0P  ****************************** -->
 278     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 279       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 280       <description>
 281 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 282 - simple, easy-to-use programmers model
 283 - highly efficient ultra-low power operation
 284 - excellent code density
 285 - deterministic, high-performance interrupt handling
 286 - upward compatibility with the rest of the Cortex-M processor family.
 287       </description>
 288       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 289       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 290       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 291       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 292
 293       <device Dname="ARMCM0P">
 294         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 295         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 296       </device>
 297
 298       <device Dname="ARMCM0P_MPU">
 299         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 300         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 301       </device>
 302     </family>
 303
 304     <!-- ******************************  Cortex-M3  ****************************** -->
 305     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 306       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 307       <description>
 308 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 309 - simple, easy-to-use programmers model
 310 - highly efficient ultra-low power operation
 311 - excellent code density
 312 - deterministic, high-performance interrupt handling
 313 - upward compatibility with the rest of the Cortex-M processor family.
 314       </description>
 315       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 316       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 317       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 318       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 319
 320       <device Dname="ARMCM3">
 321         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 322         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 323       </device>
 324     </family>
 325
 326     <!-- ******************************  Cortex-M4  ****************************** -->
 327     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 328       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 329       <description>
 330 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 331 - simple, easy-to-use programmers model
 332 - highly efficient ultra-low power operation
 333 - excellent code density
 334 - deterministic, high-performance interrupt handling
 335 - upward compatibility with the rest of the Cortex-M processor family.
 336       </description>
 337       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 338       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 339       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 340       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 341
 342       <device Dname="ARMCM4">
 343         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 344         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 345       </device>
 346
 347       <device Dname="ARMCM4_FP">
 348         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 349         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 350       </device>
 351     </family>
 352
 353     <!-- ******************************  Cortex-M7  ****************************** -->
 354     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 355       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 356       <description>
 357 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 358 - simple, easy-to-use programmers model
 359 - highly efficient ultra-low power operation
 360 - excellent code density
 361 - deterministic, high-performance interrupt handling
 362 - upward compatibility with the rest of the Cortex-M processor family.
 363       </description>
 364       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 365       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 366       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 367       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 368
 369       <device Dname="ARMCM7">
 370         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 371         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 372       </device>
 373
 374       <device Dname="ARMCM7_SP">
 375         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 376         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 377       </device>
 378
 379       <device Dname="ARMCM7_DP">
 380         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 381         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 382       </device>
 383     </family>
 384
 385     <!-- ******************************  Cortex-M23  ********************** -->
 386     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 387       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 388       <description>
 389 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 390 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 391 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 392       </description>
 393       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 394       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 395       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 396       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 397       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 398       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 399
 400       <device Dname="ARMCM23">
 401         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 402         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 403       </device>
 404
 405       <device Dname="ARMCM23_TZ">
 406         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 407         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 408       </device>
 409     </family>
 410
 411     <!-- ******************************  Cortex-M33  ****************************** -->
 412     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 413       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 414       <description>
 415 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 416 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 417       </description>
 418       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 419       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 420       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 421       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 422       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 423       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 424
 425       <device Dname="ARMCM33">
 426         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 427         <description>
 428           no DSP Instructions, no Floating Point Unit, no TrustZone
 429         </description>
 430         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 431       </device>
 432
 433       <device Dname="ARMCM33_TZ">
 434         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 435         <description>
 436           no DSP Instructions, no Floating Point Unit, TrustZone
 437         </description>
 438         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 439       </device>
 440
 441       <device Dname="ARMCM33_DSP_FP">
 442         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 443         <description>
 444           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 445         </description>
 446         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 447       </device>
 448
 449       <device Dname="ARMCM33_DSP_FP_TZ">
 450         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 451         <description>
 452           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 453         </description>
 454         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 455       </device>
 456     </family>
 457
 458     <!-- ******************************  ARMSC000  ****************************** -->
 459     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 460       <description>
 461 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 462 - simple, easy-to-use programmers model
 463 - highly efficient ultra-low power operation
 464 - excellent code density
 465 - deterministic, high-performance interrupt handling
 466       </description>
 467       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 468       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 469       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 470       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 471
 472       <device Dname="ARMSC000">
 473         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 474         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 475       </device>
 476     </family>
 477
 478     <!-- ******************************  ARMSC300  ****************************** -->
 479     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 480       <description>
 481 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 482 - simple, easy-to-use programmers model
 483 - highly efficient ultra-low power operation
 484 - excellent code density
 485 - deterministic, high-performance interrupt handling
 486       </description>
 487       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 488       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 489       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 490       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 491
 492       <device Dname="ARMSC300">
 493         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 494         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 495       </device>
 496     </family>
 497
 498     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 499     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 500       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 501       <description>
 502 Armv8-M Baseline based device with TrustZone
 503       </description>
 504       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 505       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 506       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 507       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 508       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 509       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 510
 511       <device Dname="ARMv8MBL">
 512         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 513         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 514       </device>
 515     </family>
 516
 517     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 518     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 519       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 520       <description>
 521 Armv8-M Mainline based device with TrustZone
 522       </description>
 523       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 524       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 525       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 526       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 527       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 528       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 529
 530       <device Dname="ARMv8MML">
 531         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 532         <description>
 533           no DSP Instructions, no Floating Point Unit, TrustZone
 534         </description>
 535         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 536       </device>
 537
 538       <device Dname="ARMv8MML_DSP">
 539         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 540         <description>
 541           DSP Instructions, no Floating Point Unit, TrustZone
 542         </description>
 543         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 544       </device>
 545
 546       <device Dname="ARMv8MML_SP">
 547         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 548         <description>
 549           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 550         </description>
 551         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 552       </device>
 553
 554       <device Dname="ARMv8MML_DSP_SP">
 555         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 556         <description>
 557           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 558         </description>
 559         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 560       </device>
 561
 562       <device Dname="ARMv8MML_DP">
 563         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 564         <description>
 565           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 566         </description>
 567         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 568       </device>
 569
 570       <device Dname="ARMv8MML_DSP_DP">
 571         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 572         <description>
 573           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 574         </description>
 575         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 576       </device>
 577     </family>
 578
 579     <!-- ******************************  Cortex-A5  ****************************** -->
 580     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 581       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 582       <description>
 583 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 584 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 585 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 586       </description>
 587
 588       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 589       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 590
 591       <device Dname="ARMCA5">
 592         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 593         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 594       </device>
 595     </family>
 596
 597     <!-- ******************************  Cortex-A7  ****************************** -->
 598     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 599       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 600       <description>
 601 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 602 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 603 an optional integrated GIC, and an optional L2 cache controller.
 604       </description>
 605
 606       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 607       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 608
 609       <device Dname="ARMCA7">
 610         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 611         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 612       </device>
 613     </family>
 614
 615     <!-- ******************************  Cortex-A9  ****************************** -->
 616     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 617       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 618       <description>
 619 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 620 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 621 and 8-bit Java bytecodes in Jazelle state.
 622       </description>
 623
 624       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 625       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 626
 627       <device Dname="ARMCA9">
 628         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 629         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 630       </device>
 631     </family>
 632   </devices>
 633
 634
 635   <apis>
 636     <!-- CMSIS Device API -->
 637     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 638       <description>Device interrupt controller interface</description>
 639       <files>
 640         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 641       </files>
 642     </api>
 643     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 644       <description>RTOS Kernel system tick timer interface</description>
 645       <files>
 646         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 647       </files>
 648     </api>
 649     <!-- CMSIS-RTOS API -->
 650     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 651       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 652       <files>
 653         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 654       </files>
 655     </api>
 656     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 657       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 658       <files>
 659         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 660         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 661       </files>
 662     </api>
 663     <!-- CMSIS Driver API -->
 664     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 665       <description>USART Driver API for Cortex-M</description>
 666       <files>
 667         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 668         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 669       </files>
 670     </api>
 671     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 672       <description>SPI Driver API for Cortex-M</description>
 673       <files>
 674         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 675         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 676       </files>
 677     </api>
 678     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 679       <description>SAI Driver API for Cortex-M</description>
 680       <files>
 681         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 682         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 683       </files>
 684     </api>
 685     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 686       <description>I2C Driver API for Cortex-M</description>
 687       <files>
 688         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 689         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 690       </files>
 691     </api>
 692     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 693       <description>CAN Driver API for Cortex-M</description>
 694       <files>
 695         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 696         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 697       </files>
 698     </api>
 699     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 700       <description>Flash Driver API for Cortex-M</description>
 701       <files>
 702         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 703         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 704       </files>
 705     </api>
 706     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 707       <description>MCI Driver API for Cortex-M</description>
 708       <files>
 709         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 710         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 711       </files>
 712     </api>
 713     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 714       <description>NAND Flash Driver API for Cortex-M</description>
 715       <files>
 716         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 717         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 718       </files>
 719     </api>
 720     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 721       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 722       <files>
 723         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 724         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 725         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 726       </files>
 727     </api>
 728     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 729       <description>Ethernet MAC Driver API for Cortex-M</description>
 730       <files>
 731         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 732         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 733       </files>
 734     </api>
 735     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 736       <description>Ethernet PHY Driver API for Cortex-M</description>
 737       <files>
 738         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 739         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 740       </files>
 741     </api>
 742     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 743       <description>USB Device Driver API for Cortex-M</description>
 744       <files>
 745         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 746         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 747       </files>
 748     </api>
 749     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 750       <description>USB Host Driver API for Cortex-M</description>
 751       <files>
 752         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 753         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 754       </files>
 755     </api>
 756   </apis>
 757
 758   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 759   <conditions>
 760     <!-- compiler -->
 761     <condition id="ARMCC6">
 762       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 763       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 764     </condition>
 765     <condition id="ARMCC5">
 766       <require Tcompiler="ARMCC" Toptions="AC5"/>
 767     </condition>
 768     <condition id="ARMCC">
 769       <require Tcompiler="ARMCC"/>
 770     </condition>
 771     <condition id="GCC">
 772       <require Tcompiler="GCC"/>
 773     </condition>
 774     <condition id="IAR">
 775       <require Tcompiler="IAR"/>
 776     </condition>
 777     <condition id="ARMCC GCC">
 778       <accept Tcompiler="ARMCC"/>
 779       <accept Tcompiler="GCC"/>
 780     </condition>
 781     <condition id="ARMCC GCC IAR">
 782       <accept Tcompiler="ARMCC"/>
 783       <accept Tcompiler="GCC"/>
 784       <accept Tcompiler="IAR"/>
 785     </condition>
 786
 787     <!-- Arm architecture -->
 788     <condition id="ARMv6-M Device">
 789       <description>Armv6-M architecture based device</description>
 790       <accept Dcore="Cortex-M0"/>
 791       <accept Dcore="Cortex-M0+"/>
 792       <accept Dcore="SC000"/>
 793     </condition>
 794     <condition id="ARMv7-M Device">
 795       <description>Armv7-M architecture based device</description>
 796       <accept Dcore="Cortex-M3"/>
 797       <accept Dcore="Cortex-M4"/>
 798       <accept Dcore="Cortex-M7"/>
 799       <accept Dcore="SC300"/>
 800     </condition>
 801     <condition id="ARMv8-M Device">
 802       <description>Armv8-M architecture based device</description>
 803       <accept Dcore="ARMV8MBL"/>
 804       <accept Dcore="ARMV8MML"/>
 805       <accept Dcore="Cortex-M23"/>
 806       <accept Dcore="Cortex-M33"/>
 807     </condition>
 808     <condition id="ARMv8-M TZ Device">
 809       <description>Armv8-M architecture based device with TrustZone</description>
 810       <require condition="ARMv8-M Device"/>
 811       <require Dtz="TZ"/>
 812     </condition>
 813     <condition id="ARMv6_7-M Device">
 814       <description>Armv6_7-M architecture based device</description>
 815       <accept condition="ARMv6-M Device"/>
 816       <accept condition="ARMv7-M Device"/>
 817     </condition>
 818     <condition id="ARMv6_7_8-M Device">
 819       <description>Armv6_7_8-M architecture based device</description>
 820       <accept condition="ARMv6-M Device"/>
 821       <accept condition="ARMv7-M Device"/>
 822       <accept condition="ARMv8-M Device"/>
 823     </condition>
 824     <condition id="ARMv7-A Device">
 825       <description>Armv7-A architecture based device</description>
 826       <accept Dcore="Cortex-A5"/>
 827       <accept Dcore="Cortex-A7"/>
 828       <accept Dcore="Cortex-A9"/>
 829     </condition>
 830
 831     <!-- ARM core -->
 832     <condition id="CM0">
 833       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 834       <accept Dcore="Cortex-M0"/>
 835       <accept Dcore="Cortex-M0+"/>
 836       <accept Dcore="SC000"/>
 837     </condition>
 838     <condition id="CM3">
 839       <description>Cortex-M3 or SC300 processor based device</description>
 840       <accept Dcore="Cortex-M3"/>
 841       <accept Dcore="SC300"/>
 842     </condition>
 843     <condition id="CM4">
 844       <description>Cortex-M4 processor based device</description>
 845       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 846     </condition>
 847     <condition id="CM4_FP">
 848       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 849       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 850       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 851       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 852     </condition>
 853     <condition id="CM7">
 854       <description>Cortex-M7 processor based device</description>
 855       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 856     </condition>
 857     <condition id="CM7_FP">
 858       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 859       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 860       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 861     </condition>
 862     <condition id="CM7_SP">
 863       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 864       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 865     </condition>
 866     <condition id="CM7_DP">
 867       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 868       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 869     </condition>
 870     <condition id="CM23">
 871       <description>Cortex-M23 processor based device</description>
 872       <require Dcore="Cortex-M23"/>
 873     </condition>
 874     <condition id="CM33">
 875       <description>Cortex-M33 processor based device</description>
 876       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 877     </condition>
 878     <condition id="CM33_FP">
 879       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 880       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 881     </condition>
 882     <condition id="ARMv8MBL">
 883       <description>Armv8-M Baseline processor based device</description>
 884       <require Dcore="ARMV8MBL"/>
 885     </condition>
 886     <condition id="ARMv8MML">
 887       <description>Armv8-M Mainline processor based device</description>
 888       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 889     </condition>
 890     <condition id="ARMv8MML_FP">
 891       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
 892       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 893       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 894     </condition>
 895
 896     <condition id="CM33_NODSP_NOFPU">
 897       <description>CM33, no DSP, no FPU</description>
 898       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 899     </condition>
 900     <condition id="CM33_DSP_NOFPU">
 901       <description>CM33, DSP, no FPU</description>
 902       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 903     </condition>
 904     <condition id="CM33_NODSP_SP">
 905       <description>CM33, no DSP, SP FPU</description>
 906       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 907     </condition>
 908     <condition id="CM33_DSP_SP">
 909       <description>CM33, DSP, SP FPU</description>
 910       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 911     </condition>
 912
 913     <condition id="ARMv8MML_NODSP_NOFPU">
 914       <description>Armv8-M Mainline, no DSP, no FPU</description>
 915       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 916     </condition>
 917     <condition id="ARMv8MML_DSP_NOFPU">
 918       <description>Armv8-M Mainline, DSP, no FPU</description>
 919       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 920     </condition>
 921     <condition id="ARMv8MML_NODSP_SP">
 922       <description>Armv8-M Mainline, no DSP, SP FPU</description>
 923       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 924     </condition>
 925     <condition id="ARMv8MML_DSP_SP">
 926       <description>Armv8-M Mainline, DSP, SP FPU</description>
 927       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 928     </condition>
 929
 930     <condition id="CA5_CA9">
 931       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 932       <accept Dcore="Cortex-A5"/>
 933       <accept Dcore="Cortex-A9"/>
 934     </condition>
 935
 936     <condition id="CA7">
 937       <description>Cortex-A7 processor based device</description>
 938       <accept Dcore="Cortex-A7"/>
 939     </condition>
 940
 941     <!-- ARMCC compiler -->
 942     <condition id="CA_ARMCC5">
 943       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
 944       <require condition="ARMv7-A Device"/>
 945       <require condition="ARMCC5"/>
 946     </condition>
 947     <condition id="CA_ARMCC6">
 948       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
 949       <require condition="ARMv7-A Device"/>
 950       <require condition="ARMCC6"/>
 951     </condition>
 952
 953     <condition id="CM0_ARMCC">
 954       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
 955       <require condition="CM0"/>
 956       <require Tcompiler="ARMCC"/>
 957     </condition>
 958     <condition id="CM0_LE_ARMCC">
 959       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
 960       <require condition="CM0_ARMCC"/>
 961       <require Dendian="Little-endian"/>
 962     </condition>
 963     <condition id="CM0_BE_ARMCC">
 964       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
 965       <require condition="CM0_ARMCC"/>
 966       <require Dendian="Big-endian"/>
 967     </condition>
 968
 969     <condition id="CM3_ARMCC">
 970       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
 971       <require condition="CM3"/>
 972       <require Tcompiler="ARMCC"/>
 973     </condition>
 974     <condition id="CM3_LE_ARMCC">
 975       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
 976       <require condition="CM3_ARMCC"/>
 977       <require Dendian="Little-endian"/>
 978     </condition>
 979     <condition id="CM3_BE_ARMCC">
 980       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
 981       <require condition="CM3_ARMCC"/>
 982       <require Dendian="Big-endian"/>
 983     </condition>
 984
 985     <condition id="CM4_ARMCC">
 986       <description>Cortex-M4 processor based device for the Arm Compiler</description>
 987       <require condition="CM4"/>
 988       <require Tcompiler="ARMCC"/>
 989     </condition>
 990     <condition id="CM4_LE_ARMCC">
 991       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
 992       <require condition="CM4_ARMCC"/>
 993       <require Dendian="Little-endian"/>
 994     </condition>
 995     <condition id="CM4_BE_ARMCC">
 996       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
 997       <require condition="CM4_ARMCC"/>
 998       <require Dendian="Big-endian"/>
 999     </condition>
1000
1001     <condition id="CM4_FP_ARMCC">
1002       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1003       <require condition="CM4_FP"/>
1004       <require Tcompiler="ARMCC"/>
1005     </condition>
1006     <condition id="CM4_FP_LE_ARMCC">
1007       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1008       <require condition="CM4_FP_ARMCC"/>
1009       <require Dendian="Little-endian"/>
1010     </condition>
1011     <condition id="CM4_FP_BE_ARMCC">
1012       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1013       <require condition="CM4_FP_ARMCC"/>
1014       <require Dendian="Big-endian"/>
1015     </condition>
1016
1017     <condition id="CM7_ARMCC">
1018       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1019       <require condition="CM7"/>
1020       <require Tcompiler="ARMCC"/>
1021     </condition>
1022     <condition id="CM7_LE_ARMCC">
1023       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1024       <require condition="CM7_ARMCC"/>
1025       <require Dendian="Little-endian"/>
1026     </condition>
1027     <condition id="CM7_BE_ARMCC">
1028       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1029       <require condition="CM7_ARMCC"/>
1030       <require Dendian="Big-endian"/>
1031     </condition>
1032
1033     <condition id="CM7_FP_ARMCC">
1034       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1035       <require condition="CM7_FP"/>
1036       <require Tcompiler="ARMCC"/>
1037     </condition>
1038     <condition id="CM7_FP_LE_ARMCC">
1039       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1040       <require condition="CM7_FP_ARMCC"/>
1041       <require Dendian="Little-endian"/>
1042     </condition>
1043     <condition id="CM7_FP_BE_ARMCC">
1044       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1045       <require condition="CM7_FP_ARMCC"/>
1046       <require Dendian="Big-endian"/>
1047     </condition>
1048
1049     <condition id="CM7_SP_ARMCC">
1050       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1051       <require condition="CM7_SP"/>
1052       <require Tcompiler="ARMCC"/>
1053     </condition>
1054     <condition id="CM7_SP_LE_ARMCC">
1055       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1056       <require condition="CM7_SP_ARMCC"/>
1057       <require Dendian="Little-endian"/>
1058     </condition>
1059     <condition id="CM7_SP_BE_ARMCC">
1060       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1061       <require condition="CM7_SP_ARMCC"/>
1062       <require Dendian="Big-endian"/>
1063     </condition>
1064
1065     <condition id="CM7_DP_ARMCC">
1066       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1067       <require condition="CM7_DP"/>
1068       <require Tcompiler="ARMCC"/>
1069     </condition>
1070     <condition id="CM7_DP_LE_ARMCC">
1071       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1072       <require condition="CM7_DP_ARMCC"/>
1073       <require Dendian="Little-endian"/>
1074     </condition>
1075     <condition id="CM7_DP_BE_ARMCC">
1076       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1077       <require condition="CM7_DP_ARMCC"/>
1078       <require Dendian="Big-endian"/>
1079     </condition>
1080
1081     <condition id="CM23_ARMCC">
1082       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1083       <require condition="CM23"/>
1084       <require Tcompiler="ARMCC"/>
1085     </condition>
1086     <condition id="CM23_LE_ARMCC">
1087       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1088       <require condition="CM23_ARMCC"/>
1089       <require Dendian="Little-endian"/>
1090     </condition>
1091     <condition id="CM23_BE_ARMCC">
1092       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1093       <require condition="CM23_ARMCC"/>
1094       <require Dendian="Big-endian"/>
1095     </condition>
1096
1097     <condition id="CM33_ARMCC">
1098       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1099       <require condition="CM33"/>
1100       <require Tcompiler="ARMCC"/>
1101     </condition>
1102     <condition id="CM33_LE_ARMCC">
1103       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1104       <require condition="CM33_ARMCC"/>
1105       <require Dendian="Little-endian"/>
1106     </condition>
1107     <condition id="CM33_BE_ARMCC">
1108       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1109       <require condition="CM33_ARMCC"/>
1110       <require Dendian="Big-endian"/>
1111     </condition>
1112
1113     <condition id="CM33_FP_ARMCC">
1114       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1115       <require condition="CM33_FP"/>
1116       <require Tcompiler="ARMCC"/>
1117     </condition>
1118     <condition id="CM33_FP_LE_ARMCC">
1119       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1120       <require condition="CM33_FP_ARMCC"/>
1121       <require Dendian="Little-endian"/>
1122     </condition>
1123     <condition id="CM33_FP_BE_ARMCC">
1124       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1125       <require condition="CM33_FP_ARMCC"/>
1126       <require Dendian="Big-endian"/>
1127     </condition>
1128
1129     <condition id="CM33_NODSP_NOFPU_ARMCC">
1130       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1131       <require condition="CM33_NODSP_NOFPU"/>
1132       <require Tcompiler="ARMCC"/>
1133     </condition>
1134     <condition id="CM33_DSP_NOFPU_ARMCC">
1135       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1136       <require condition="CM33_DSP_NOFPU"/>
1137       <require Tcompiler="ARMCC"/>
1138     </condition>
1139     <condition id="CM33_NODSP_SP_ARMCC">
1140       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1141       <require condition="CM33_NODSP_SP"/>
1142       <require Tcompiler="ARMCC"/>
1143     </condition>
1144     <condition id="CM33_DSP_SP_ARMCC">
1145       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1146       <require condition="CM33_DSP_SP"/>
1147       <require Tcompiler="ARMCC"/>
1148     </condition>
1149     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1150       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1151       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1152       <require Dendian="Little-endian"/>
1153     </condition>
1154     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1155       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1156       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1157       <require Dendian="Little-endian"/>
1158     </condition>
1159     <condition id="CM33_NODSP_SP_LE_ARMCC">
1160       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1161       <require condition="CM33_NODSP_SP_ARMCC"/>
1162       <require Dendian="Little-endian"/>
1163     </condition>
1164     <condition id="CM33_DSP_SP_LE_ARMCC">
1165       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1166       <require condition="CM33_DSP_SP_ARMCC"/>
1167       <require Dendian="Little-endian"/>
1168     </condition>
1169
1170     <condition id="ARMv8MBL_ARMCC">
1171       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1172       <require condition="ARMv8MBL"/>
1173       <require Tcompiler="ARMCC"/>
1174     </condition>
1175     <condition id="ARMv8MBL_LE_ARMCC">
1176       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1177       <require condition="ARMv8MBL_ARMCC"/>
1178       <require Dendian="Little-endian"/>
1179     </condition>
1180     <condition id="ARMv8MBL_BE_ARMCC">
1181       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1182       <require condition="ARMv8MBL_ARMCC"/>
1183       <require Dendian="Big-endian"/>
1184     </condition>
1185
1186     <condition id="ARMv8MML_ARMCC">
1187       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1188       <require condition="ARMv8MML"/>
1189       <require Tcompiler="ARMCC"/>
1190     </condition>
1191     <condition id="ARMv8MML_LE_ARMCC">
1192       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1193       <require condition="ARMv8MML_ARMCC"/>
1194       <require Dendian="Little-endian"/>
1195     </condition>
1196     <condition id="ARMv8MML_BE_ARMCC">
1197       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1198       <require condition="ARMv8MML_ARMCC"/>
1199       <require Dendian="Big-endian"/>
1200     </condition>
1201
1202     <condition id="ARMv8MML_FP_ARMCC">
1203       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1204       <require condition="ARMv8MML_FP"/>
1205       <require Tcompiler="ARMCC"/>
1206     </condition>
1207     <condition id="ARMv8MML_FP_LE_ARMCC">
1208       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1209       <require condition="ARMv8MML_FP_ARMCC"/>
1210       <require Dendian="Little-endian"/>
1211     </condition>
1212     <condition id="ARMv8MML_FP_BE_ARMCC">
1213       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1214       <require condition="ARMv8MML_FP_ARMCC"/>
1215       <require Dendian="Big-endian"/>
1216     </condition>
1217
1218     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1219       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1220       <require condition="ARMv8MML_NODSP_NOFPU"/>
1221       <require Tcompiler="ARMCC"/>
1222     </condition>
1223     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1224       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1225       <require condition="ARMv8MML_DSP_NOFPU"/>
1226       <require Tcompiler="ARMCC"/>
1227     </condition>
1228     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1229       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1230       <require condition="ARMv8MML_NODSP_SP"/>
1231       <require Tcompiler="ARMCC"/>
1232     </condition>
1233     <condition id="ARMv8MML_DSP_SP_ARMCC">
1234       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1235       <require condition="ARMv8MML_DSP_SP"/>
1236       <require Tcompiler="ARMCC"/>
1237     </condition>
1238     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1239       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1240       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1241       <require Dendian="Little-endian"/>
1242     </condition>
1243     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1244       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1245       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1246       <require Dendian="Little-endian"/>
1247     </condition>
1248     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1249       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1250       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1251       <require Dendian="Little-endian"/>
1252     </condition>
1253     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1254       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1255       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1256       <require Dendian="Little-endian"/>
1257     </condition>
1258
1259     <!-- GCC compiler -->
1260     <condition id="CA_GCC">
1261       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1262       <require condition="ARMv7-A Device"/>
1263       <require Tcompiler="GCC"/>
1264     </condition>
1265
1266     <condition id="CM0_GCC">
1267       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1268       <require condition="CM0"/>
1269       <require Tcompiler="GCC"/>
1270     </condition>
1271     <condition id="CM0_LE_GCC">
1272       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1273       <require condition="CM0_GCC"/>
1274       <require Dendian="Little-endian"/>
1275     </condition>
1276     <condition id="CM0_BE_GCC">
1277       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1278       <require condition="CM0_GCC"/>
1279       <require Dendian="Big-endian"/>
1280     </condition>
1281
1282     <condition id="CM3_GCC">
1283       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1284       <require condition="CM3"/>
1285       <require Tcompiler="GCC"/>
1286     </condition>
1287     <condition id="CM3_LE_GCC">
1288       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1289       <require condition="CM3_GCC"/>
1290       <require Dendian="Little-endian"/>
1291     </condition>
1292     <condition id="CM3_BE_GCC">
1293       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1294       <require condition="CM3_GCC"/>
1295       <require Dendian="Big-endian"/>
1296     </condition>
1297
1298     <condition id="CM4_GCC">
1299       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1300       <require condition="CM4"/>
1301       <require Tcompiler="GCC"/>
1302     </condition>
1303     <condition id="CM4_LE_GCC">
1304       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1305       <require condition="CM4_GCC"/>
1306       <require Dendian="Little-endian"/>
1307     </condition>
1308     <condition id="CM4_BE_GCC">
1309       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1310       <require condition="CM4_GCC"/>
1311       <require Dendian="Big-endian"/>
1312     </condition>
1313
1314     <condition id="CM4_FP_GCC">
1315       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1316       <require condition="CM4_FP"/>
1317       <require Tcompiler="GCC"/>
1318     </condition>
1319     <condition id="CM4_FP_LE_GCC">
1320       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1321       <require condition="CM4_FP_GCC"/>
1322       <require Dendian="Little-endian"/>
1323     </condition>
1324     <condition id="CM4_FP_BE_GCC">
1325       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1326       <require condition="CM4_FP_GCC"/>
1327       <require Dendian="Big-endian"/>
1328     </condition>
1329
1330     <condition id="CM7_GCC">
1331       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1332       <require condition="CM7"/>
1333       <require Tcompiler="GCC"/>
1334     </condition>
1335     <condition id="CM7_LE_GCC">
1336       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1337       <require condition="CM7_GCC"/>
1338       <require Dendian="Little-endian"/>
1339     </condition>
1340     <condition id="CM7_BE_GCC">
1341       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1342       <require condition="CM7_GCC"/>
1343       <require Dendian="Big-endian"/>
1344     </condition>
1345
1346     <condition id="CM7_FP_GCC">
1347       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1348       <require condition="CM7_FP"/>
1349       <require Tcompiler="GCC"/>
1350     </condition>
1351     <condition id="CM7_FP_LE_GCC">
1352       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1353       <require condition="CM7_FP_GCC"/>
1354       <require Dendian="Little-endian"/>
1355     </condition>
1356     <condition id="CM7_FP_BE_GCC">
1357       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1358       <require condition="CM7_FP_GCC"/>
1359       <require Dendian="Big-endian"/>
1360     </condition>
1361
1362     <condition id="CM7_SP_GCC">
1363       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1364       <require condition="CM7_SP"/>
1365       <require Tcompiler="GCC"/>
1366     </condition>
1367     <condition id="CM7_SP_LE_GCC">
1368       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1369       <require condition="CM7_SP_GCC"/>
1370       <require Dendian="Little-endian"/>
1371     </condition>
1372     <condition id="CM7_SP_BE_GCC">
1373       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1374       <require condition="CM7_SP_GCC"/>
1375       <require Dendian="Big-endian"/>
1376     </condition>
1377
1378     <condition id="CM7_DP_GCC">
1379       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1380       <require condition="CM7_DP"/>
1381       <require Tcompiler="GCC"/>
1382     </condition>
1383     <condition id="CM7_DP_LE_GCC">
1384       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1385       <require condition="CM7_DP_GCC"/>
1386       <require Dendian="Little-endian"/>
1387     </condition>
1388     <condition id="CM7_DP_BE_GCC">
1389       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1390       <require condition="CM7_DP_GCC"/>
1391       <require Dendian="Big-endian"/>
1392     </condition>
1393
1394     <condition id="CM23_GCC">
1395       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1396       <require condition="CM23"/>
1397       <require Tcompiler="GCC"/>
1398     </condition>
1399     <condition id="CM23_LE_GCC">
1400       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1401       <require condition="CM23_GCC"/>
1402       <require Dendian="Little-endian"/>
1403     </condition>
1404     <condition id="CM23_BE_GCC">
1405       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1406       <require condition="CM23_GCC"/>
1407       <require Dendian="Big-endian"/>
1408     </condition>
1409
1410     <condition id="CM33_GCC">
1411       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1412       <require condition="CM33"/>
1413       <require Tcompiler="GCC"/>
1414     </condition>
1415     <condition id="CM33_LE_GCC">
1416       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1417       <require condition="CM33_GCC"/>
1418       <require Dendian="Little-endian"/>
1419     </condition>
1420     <condition id="CM33_BE_GCC">
1421       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1422       <require condition="CM33_GCC"/>
1423       <require Dendian="Big-endian"/>
1424     </condition>
1425
1426     <condition id="CM33_FP_GCC">
1427       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1428       <require condition="CM33_FP"/>
1429       <require Tcompiler="GCC"/>
1430     </condition>
1431     <condition id="CM33_FP_LE_GCC">
1432       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1433       <require condition="CM33_FP_GCC"/>
1434       <require Dendian="Little-endian"/>
1435     </condition>
1436     <condition id="CM33_FP_BE_GCC">
1437       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1438       <require condition="CM33_FP_GCC"/>
1439       <require Dendian="Big-endian"/>
1440     </condition>
1441
1442     <condition id="CM33_NODSP_NOFPU_GCC">
1443       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1444       <require condition="CM33_NODSP_NOFPU"/>
1445       <require Tcompiler="GCC"/>
1446     </condition>
1447     <condition id="CM33_DSP_NOFPU_GCC">
1448       <description>CM33, DSP, no FPU, GCC Compiler</description>
1449       <require condition="CM33_DSP_NOFPU"/>
1450       <require Tcompiler="GCC"/>
1451     </condition>
1452     <condition id="CM33_NODSP_SP_GCC">
1453       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1454       <require condition="CM33_NODSP_SP"/>
1455       <require Tcompiler="GCC"/>
1456     </condition>
1457     <condition id="CM33_DSP_SP_GCC">
1458       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1459       <require condition="CM33_DSP_SP"/>
1460       <require Tcompiler="GCC"/>
1461     </condition>
1462     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1463       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1464       <require condition="CM33_NODSP_NOFPU_GCC"/>
1465       <require Dendian="Little-endian"/>
1466     </condition>
1467     <condition id="CM33_DSP_NOFPU_LE_GCC">
1468       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1469       <require condition="CM33_DSP_NOFPU_GCC"/>
1470       <require Dendian="Little-endian"/>
1471     </condition>
1472     <condition id="CM33_NODSP_SP_LE_GCC">
1473       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1474       <require condition="CM33_NODSP_SP_GCC"/>
1475       <require Dendian="Little-endian"/>
1476     </condition>
1477     <condition id="CM33_DSP_SP_LE_GCC">
1478       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1479       <require condition="CM33_DSP_SP_GCC"/>
1480       <require Dendian="Little-endian"/>
1481     </condition>
1482
1483     <condition id="ARMv8MBL_GCC">
1484       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1485       <require condition="ARMv8MBL"/>
1486       <require Tcompiler="GCC"/>
1487     </condition>
1488     <condition id="ARMv8MBL_LE_GCC">
1489       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1490       <require condition="ARMv8MBL_GCC"/>
1491       <require Dendian="Little-endian"/>
1492     </condition>
1493     <condition id="ARMv8MBL_BE_GCC">
1494       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1495       <require condition="ARMv8MBL_GCC"/>
1496       <require Dendian="Big-endian"/>
1497     </condition>
1498
1499     <condition id="ARMv8MML_GCC">
1500       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1501       <require condition="ARMv8MML"/>
1502       <require Tcompiler="GCC"/>
1503     </condition>
1504     <condition id="ARMv8MML_LE_GCC">
1505       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1506       <require condition="ARMv8MML_GCC"/>
1507       <require Dendian="Little-endian"/>
1508     </condition>
1509     <condition id="ARMv8MML_BE_GCC">
1510       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1511       <require condition="ARMv8MML_GCC"/>
1512       <require Dendian="Big-endian"/>
1513     </condition>
1514
1515     <condition id="ARMv8MML_FP_GCC">
1516       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1517       <require condition="ARMv8MML_FP"/>
1518       <require Tcompiler="GCC"/>
1519     </condition>
1520     <condition id="ARMv8MML_FP_LE_GCC">
1521       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1522       <require condition="ARMv8MML_FP_GCC"/>
1523       <require Dendian="Little-endian"/>
1524     </condition>
1525     <condition id="ARMv8MML_FP_BE_GCC">
1526       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1527       <require condition="ARMv8MML_FP_GCC"/>
1528       <require Dendian="Big-endian"/>
1529     </condition>
1530
1531     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1532       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1533       <require condition="ARMv8MML_NODSP_NOFPU"/>
1534       <require Tcompiler="GCC"/>
1535     </condition>
1536     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1537       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1538       <require condition="ARMv8MML_DSP_NOFPU"/>
1539       <require Tcompiler="GCC"/>
1540     </condition>
1541     <condition id="ARMv8MML_NODSP_SP_GCC">
1542       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1543       <require condition="ARMv8MML_NODSP_SP"/>
1544       <require Tcompiler="GCC"/>
1545     </condition>
1546     <condition id="ARMv8MML_DSP_SP_GCC">
1547       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1548       <require condition="ARMv8MML_DSP_SP"/>
1549       <require Tcompiler="GCC"/>
1550     </condition>
1551     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1552       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1553       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1554       <require Dendian="Little-endian"/>
1555     </condition>
1556     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1557       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1558       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1559       <require Dendian="Little-endian"/>
1560     </condition>
1561     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1562       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1563       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1564       <require Dendian="Little-endian"/>
1565     </condition>
1566     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1567       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1568       <require condition="ARMv8MML_DSP_SP_GCC"/>
1569       <require Dendian="Little-endian"/>
1570     </condition>
1571
1572     <!-- IAR compiler -->
1573     <condition id="CA_IAR">
1574       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1575       <require condition="ARMv7-A Device"/>
1576       <require Tcompiler="IAR"/>
1577     </condition>
1578
1579     <condition id="CM0_IAR">
1580       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1581       <require condition="CM0"/>
1582       <require Tcompiler="IAR"/>
1583     </condition>
1584     <condition id="CM0_LE_IAR">
1585       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1586       <require condition="CM0_IAR"/>
1587       <require Dendian="Little-endian"/>
1588     </condition>
1589     <condition id="CM0_BE_IAR">
1590       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1591       <require condition="CM0_IAR"/>
1592       <require Dendian="Big-endian"/>
1593     </condition>
1594
1595     <condition id="CM3_IAR">
1596       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1597       <require condition="CM3"/>
1598       <require Tcompiler="IAR"/>
1599     </condition>
1600     <condition id="CM3_LE_IAR">
1601       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1602       <require condition="CM3_IAR"/>
1603       <require Dendian="Little-endian"/>
1604     </condition>
1605     <condition id="CM3_BE_IAR">
1606       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1607       <require condition="CM3_IAR"/>
1608       <require Dendian="Big-endian"/>
1609     </condition>
1610
1611     <condition id="CM4_IAR">
1612       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1613       <require condition="CM4"/>
1614       <require Tcompiler="IAR"/>
1615     </condition>
1616     <condition id="CM4_LE_IAR">
1617       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1618       <require condition="CM4_IAR"/>
1619       <require Dendian="Little-endian"/>
1620     </condition>
1621     <condition id="CM4_BE_IAR">
1622       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1623       <require condition="CM4_IAR"/>
1624       <require Dendian="Big-endian"/>
1625     </condition>
1626
1627     <condition id="CM4_FP_IAR">
1628       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1629       <require condition="CM4_FP"/>
1630       <require Tcompiler="IAR"/>
1631     </condition>
1632     <condition id="CM4_FP_LE_IAR">
1633       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1634       <require condition="CM4_FP_IAR"/>
1635       <require Dendian="Little-endian"/>
1636     </condition>
1637     <condition id="CM4_FP_BE_IAR">
1638       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1639       <require condition="CM4_FP_IAR"/>
1640       <require Dendian="Big-endian"/>
1641     </condition>
1642
1643     <condition id="CM7_IAR">
1644       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1645       <require condition="CM7"/>
1646       <require Tcompiler="IAR"/>
1647     </condition>
1648     <condition id="CM7_LE_IAR">
1649       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1650       <require condition="CM7_IAR"/>
1651       <require Dendian="Little-endian"/>
1652     </condition>
1653     <condition id="CM7_BE_IAR">
1654       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1655       <require condition="CM7_IAR"/>
1656       <require Dendian="Big-endian"/>
1657     </condition>
1658
1659     <condition id="CM7_FP_IAR">
1660       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1661       <require condition="CM7_FP"/>
1662       <require Tcompiler="IAR"/>
1663     </condition>
1664     <condition id="CM7_FP_LE_IAR">
1665       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1666       <require condition="CM7_FP_IAR"/>
1667       <require Dendian="Little-endian"/>
1668     </condition>
1669     <condition id="CM7_FP_BE_IAR">
1670       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1671       <require condition="CM7_FP_IAR"/>
1672       <require Dendian="Big-endian"/>
1673     </condition>
1674
1675     <condition id="CM7_SP_IAR">
1676       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1677       <require condition="CM7_SP"/>
1678       <require Tcompiler="IAR"/>
1679     </condition>
1680     <condition id="CM7_SP_LE_IAR">
1681       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1682       <require condition="CM7_SP_IAR"/>
1683       <require Dendian="Little-endian"/>
1684     </condition>
1685     <condition id="CM7_SP_BE_IAR">
1686       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1687       <require condition="CM7_SP_IAR"/>
1688       <require Dendian="Big-endian"/>
1689     </condition>
1690
1691     <condition id="CM7_DP_IAR">
1692       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1693       <require condition="CM7_DP"/>
1694       <require Tcompiler="IAR"/>
1695     </condition>
1696     <condition id="CM7_DP_LE_IAR">
1697       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1698       <require condition="CM7_DP_IAR"/>
1699       <require Dendian="Little-endian"/>
1700     </condition>
1701     <condition id="CM7_DP_BE_IAR">
1702       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1703       <require condition="CM7_DP_IAR"/>
1704       <require Dendian="Big-endian"/>
1705     </condition>
1706
1707     <condition id="CM23_IAR">
1708       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1709       <require condition="CM23"/>
1710       <require Tcompiler="IAR"/>
1711     </condition>
1712     <condition id="CM23_LE_IAR">
1713       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1714       <require condition="CM23_IAR"/>
1715       <require Dendian="Little-endian"/>
1716     </condition>
1717     <condition id="CM23_BE_IAR">
1718       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1719       <require condition="CM23_IAR"/>
1720       <require Dendian="Big-endian"/>
1721     </condition>
1722
1723     <condition id="CM33_IAR">
1724       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1725       <require condition="CM33"/>
1726       <require Tcompiler="IAR"/>
1727     </condition>
1728     <condition id="CM33_LE_IAR">
1729       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1730       <require condition="CM33_IAR"/>
1731       <require Dendian="Little-endian"/>
1732     </condition>
1733     <condition id="CM33_BE_IAR">
1734       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1735       <require condition="CM33_IAR"/>
1736       <require Dendian="Big-endian"/>
1737     </condition>
1738
1739     <condition id="CM33_FP_IAR">
1740       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1741       <require condition="CM33_FP"/>
1742       <require Tcompiler="IAR"/>
1743     </condition>
1744     <condition id="CM33_FP_LE_IAR">
1745       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1746       <require condition="CM33_FP_IAR"/>
1747       <require Dendian="Little-endian"/>
1748     </condition>
1749     <condition id="CM33_FP_BE_IAR">
1750       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1751       <require condition="CM33_FP_IAR"/>
1752       <require Dendian="Big-endian"/>
1753     </condition>
1754
1755     <condition id="CM33_NODSP_NOFPU_IAR">
1756       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1757       <require condition="CM33_NODSP_NOFPU"/>
1758       <require Tcompiler="IAR"/>
1759     </condition>
1760     <condition id="CM33_DSP_NOFPU_IAR">
1761       <description>CM33, DSP, no FPU, IAR Compiler</description>
1762       <require condition="CM33_DSP_NOFPU"/>
1763       <require Tcompiler="IAR"/>
1764     </condition>
1765     <condition id="CM33_NODSP_SP_IAR">
1766       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1767       <require condition="CM33_NODSP_SP"/>
1768       <require Tcompiler="IAR"/>
1769     </condition>
1770     <condition id="CM33_DSP_SP_IAR">
1771       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1772       <require condition="CM33_DSP_SP"/>
1773       <require Tcompiler="IAR"/>
1774     </condition>
1775     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1776       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1777       <require condition="CM33_NODSP_NOFPU_IAR"/>
1778       <require Dendian="Little-endian"/>
1779     </condition>
1780     <condition id="CM33_DSP_NOFPU_LE_IAR">
1781       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1782       <require condition="CM33_DSP_NOFPU_IAR"/>
1783       <require Dendian="Little-endian"/>
1784     </condition>
1785     <condition id="CM33_NODSP_SP_LE_IAR">
1786       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1787       <require condition="CM33_NODSP_SP_IAR"/>
1788       <require Dendian="Little-endian"/>
1789     </condition>
1790     <condition id="CM33_DSP_SP_LE_IAR">
1791       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1792       <require condition="CM33_DSP_SP_IAR"/>
1793       <require Dendian="Little-endian"/>
1794     </condition>
1795
1796     <condition id="ARMv8MBL_IAR">
1797       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1798       <require condition="ARMv8MBL"/>
1799       <require Tcompiler="IAR"/>
1800     </condition>
1801     <condition id="ARMv8MBL_LE_IAR">
1802       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1803       <require condition="ARMv8MBL_IAR"/>
1804       <require Dendian="Little-endian"/>
1805     </condition>
1806     <condition id="ARMv8MBL_BE_IAR">
1807       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1808       <require condition="ARMv8MBL_IAR"/>
1809       <require Dendian="Big-endian"/>
1810     </condition>
1811
1812     <condition id="ARMv8MML_IAR">
1813       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1814       <require condition="ARMv8MML"/>
1815       <require Tcompiler="IAR"/>
1816     </condition>
1817     <condition id="ARMv8MML_LE_IAR">
1818       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1819       <require condition="ARMv8MML_IAR"/>
1820       <require Dendian="Little-endian"/>
1821     </condition>
1822     <condition id="ARMv8MML_BE_IAR">
1823       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1824       <require condition="ARMv8MML_IAR"/>
1825       <require Dendian="Big-endian"/>
1826     </condition>
1827
1828     <condition id="ARMv8MML_FP_IAR">
1829       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1830       <require condition="ARMv8MML_FP"/>
1831       <require Tcompiler="IAR"/>
1832     </condition>
1833     <condition id="ARMv8MML_FP_LE_IAR">
1834       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1835       <require condition="ARMv8MML_FP_IAR"/>
1836       <require Dendian="Little-endian"/>
1837     </condition>
1838     <condition id="ARMv8MML_FP_BE_IAR">
1839       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1840       <require condition="ARMv8MML_FP_IAR"/>
1841       <require Dendian="Big-endian"/>
1842     </condition>
1843
1844     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1845       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
1846       <require condition="ARMv8MML_NODSP_NOFPU"/>
1847       <require Tcompiler="IAR"/>
1848     </condition>
1849     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1850       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
1851       <require condition="ARMv8MML_DSP_NOFPU"/>
1852       <require Tcompiler="IAR"/>
1853     </condition>
1854     <condition id="ARMv8MML_NODSP_SP_IAR">
1855       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
1856       <require condition="ARMv8MML_NODSP_SP"/>
1857       <require Tcompiler="IAR"/>
1858     </condition>
1859     <condition id="ARMv8MML_DSP_SP_IAR">
1860       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
1861       <require condition="ARMv8MML_DSP_SP"/>
1862       <require Tcompiler="IAR"/>
1863     </condition>
1864     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1865       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
1866       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1867       <require Dendian="Little-endian"/>
1868     </condition>
1869     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1870       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
1871       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1872       <require Dendian="Little-endian"/>
1873     </condition>
1874     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1875       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
1876       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1877       <require Dendian="Little-endian"/>
1878     </condition>
1879     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1880       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
1881       <require condition="ARMv8MML_DSP_SP_IAR"/>
1882       <require Dendian="Little-endian"/>
1883     </condition>
1884
1885     <!-- conditions selecting single devices and CMSIS Core -->
1886     <!-- used for component startup, GCC version is used for C-Startup -->
1887     <condition id="ARMCM0 CMSIS">
1888       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1889       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1890       <require Cclass="CMSIS" Cgroup="CORE"/>
1891     </condition>
1892     <condition id="ARMCM0 CMSIS GCC">
1893       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1894       <require condition="ARMCM0 CMSIS"/>
1895       <require condition="GCC"/>
1896     </condition>
1897
1898     <condition id="ARMCM0+ CMSIS">
1899       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1900       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1901       <require Cclass="CMSIS" Cgroup="CORE"/>
1902     </condition>
1903     <condition id="ARMCM0+ CMSIS GCC">
1904       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1905       <require condition="ARMCM0+ CMSIS"/>
1906       <require condition="GCC"/>
1907     </condition>
1908
1909     <condition id="ARMCM3 CMSIS">
1910       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1911       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1912       <require Cclass="CMSIS" Cgroup="CORE"/>
1913     </condition>
1914     <condition id="ARMCM3 CMSIS GCC">
1915       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1916       <require condition="ARMCM3 CMSIS"/>
1917       <require condition="GCC"/>
1918     </condition>
1919
1920     <condition id="ARMCM4 CMSIS">
1921       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1922       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1923       <require Cclass="CMSIS" Cgroup="CORE"/>
1924     </condition>
1925     <condition id="ARMCM4 CMSIS GCC">
1926       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1927       <require condition="ARMCM4 CMSIS"/>
1928       <require condition="GCC"/>
1929     </condition>
1930
1931     <condition id="ARMCM7 CMSIS">
1932       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1933       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1934       <require Cclass="CMSIS" Cgroup="CORE"/>
1935     </condition>
1936     <condition id="ARMCM7 CMSIS GCC">
1937       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1938       <require condition="ARMCM7 CMSIS"/>
1939       <require condition="GCC"/>
1940     </condition>
1941
1942     <condition id="ARMCM23 CMSIS">
1943       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1944       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1945       <require Cclass="CMSIS" Cgroup="CORE"/>
1946     </condition>
1947     <condition id="ARMCM23 CMSIS GCC">
1948       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1949       <require condition="ARMCM23 CMSIS"/>
1950       <require condition="GCC"/>
1951     </condition>
1952
1953     <condition id="ARMCM33 CMSIS">
1954       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1955       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1956       <require Cclass="CMSIS" Cgroup="CORE"/>
1957     </condition>
1958     <condition id="ARMCM33 CMSIS GCC">
1959       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1960       <require condition="ARMCM33 CMSIS"/>
1961       <require condition="GCC"/>
1962     </condition>
1963
1964     <condition id="ARMSC000 CMSIS">
1965       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1966       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1967       <require Cclass="CMSIS" Cgroup="CORE"/>
1968     </condition>
1969     <condition id="ARMSC000 CMSIS GCC">
1970       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
1971       <require condition="ARMSC000 CMSIS"/>
1972       <require condition="GCC"/>
1973     </condition>
1974
1975     <condition id="ARMSC300 CMSIS">
1976       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1977       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1978       <require Cclass="CMSIS" Cgroup="CORE"/>
1979     </condition>
1980     <condition id="ARMSC300 CMSIS GCC">
1981       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
1982       <require condition="ARMSC300 CMSIS"/>
1983       <require condition="GCC"/>
1984     </condition>
1985
1986     <condition id="ARMv8MBL CMSIS">
1987       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1988       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1989       <require Cclass="CMSIS" Cgroup="CORE"/>
1990     </condition>
1991     <condition id="ARMv8MBL CMSIS GCC">
1992       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
1993       <require condition="ARMv8MBL CMSIS"/>
1994       <require condition="GCC"/>
1995     </condition>
1996
1997     <condition id="ARMv8MML CMSIS">
1998       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1999       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2000       <require Cclass="CMSIS" Cgroup="CORE"/>
2001     </condition>
2002     <condition id="ARMv8MML CMSIS GCC">
2003       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2004       <require condition="ARMv8MML CMSIS"/>
2005       <require condition="GCC"/>
2006     </condition>
2007
2008     <condition id="ARMCA5 CMSIS">
2009       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2010       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2011       <require Cclass="CMSIS" Cgroup="CORE"/>
2012     </condition>
2013
2014     <condition id="ARMCA7 CMSIS">
2015       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2016       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2017       <require Cclass="CMSIS" Cgroup="CORE"/>
2018     </condition>
2019
2020     <condition id="ARMCA9 CMSIS">
2021       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2022       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2023       <require Cclass="CMSIS" Cgroup="CORE"/>
2024     </condition>
2025
2026     <!-- CMSIS DSP -->
2027     <condition id="CMSIS DSP">
2028       <description>Components required for DSP</description>
2029       <require condition="ARMv6_7_8-M Device"/>
2030       <require condition="ARMCC GCC IAR"/>
2031       <require Cclass="CMSIS" Cgroup="CORE"/>
2032     </condition>
2033
2034     <!-- CMSIS NN -->
2035     <condition id="CMSIS NN">
2036       <description>Components required for NN</description>
2037       <require condition="CMSIS DSP"/>
2038     </condition>
2039
2040     <!-- RTOS RTX -->
2041     <condition id="RTOS RTX">
2042       <description>Components required for RTOS RTX</description>
2043       <require condition="ARMv6_7-M Device"/>
2044       <require condition="ARMCC GCC IAR"/>
2045       <require Cclass="Device" Cgroup="Startup"/>
2046       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2047     </condition>
2048     <condition id="RTOS RTX IFX">
2049       <description>Components required for RTOS RTX IFX</description>
2050       <require condition="ARMv6_7-M Device"/>
2051       <require condition="ARMCC GCC IAR"/>
2052       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2053       <require Cclass="Device" Cgroup="Startup"/>
2054       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2055     </condition>
2056     <condition id="RTOS RTX5">
2057       <description>Components required for RTOS RTX5</description>
2058       <require condition="ARMv6_7_8-M Device"/>
2059       <require condition="ARMCC GCC IAR"/>
2060       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2061     </condition>
2062     <condition id="RTOS2 RTX5">
2063       <description>Components required for RTOS2 RTX5</description>
2064       <require condition="ARMv6_7_8-M Device"/>
2065       <require condition="ARMCC GCC IAR"/>
2066       <require Cclass="CMSIS"  Cgroup="CORE"/>
2067       <require Cclass="Device" Cgroup="Startup"/>
2068     </condition>
2069     <condition id="RTOS2 RTX5 v7-A">
2070       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2071       <require condition="ARMv7-A Device"/>
2072       <require condition="ARMCC GCC IAR"/>
2073       <require Cclass="CMSIS"  Cgroup="CORE"/>
2074       <require Cclass="Device" Cgroup="Startup"/>
2075       <require Cclass="Device" Cgroup="OS Tick"/>
2076       <require Cclass="Device" Cgroup="IRQ Controller"/>
2077     </condition>
2078     <condition id="RTOS2 RTX5 Lib">
2079       <description>Components required for RTOS2 RTX5 Library</description>
2080       <require condition="ARMv6_7_8-M Device"/>
2081       <require condition="ARMCC GCC IAR"/>
2082       <require Cclass="CMSIS"  Cgroup="CORE"/>
2083       <require Cclass="Device" Cgroup="Startup"/>
2084     </condition>
2085     <condition id="RTOS2 RTX5 NS">
2086       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2087       <require condition="ARMv8-M TZ Device"/>
2088       <require condition="ARMCC GCC IAR"/>
2089       <require Cclass="CMSIS"  Cgroup="CORE"/>
2090       <require Cclass="Device" Cgroup="Startup"/>
2091     </condition>
2092
2093     <!-- OS Tick -->
2094     <condition id="OS Tick PTIM">
2095       <description>Components required for OS Tick Private Timer</description>
2096       <require condition="CA5_CA9"/>
2097       <require Cclass="Device" Cgroup="IRQ Controller"/>
2098     </condition>
2099
2100     <condition id="OS Tick GTIM">
2101       <description>Components required for OS Tick Generic Physical Timer</description>
2102       <require condition="CA7"/>
2103       <require Cclass="Device" Cgroup="IRQ Controller"/>
2104     </condition>
2105
2106   </conditions>
2107
2108   <components>
2109     <!-- CMSIS-Core component -->
2110     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.1"  condition="ARMv6_7_8-M Device" >
2111       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2112       <files>
2113         <!-- CPU independent -->
2114         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2115         <file category="include" name="CMSIS/Core/Include/"/>
2116         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2117         <!-- Code template -->
2118         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2119         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2120       </files>
2121     </component>
2122
2123     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.1"  condition="ARMv7-A Device" >
2124       <description>CMSIS-CORE for Cortex-A</description>
2125       <files>
2126         <!-- CPU independent -->
2127         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2128         <file category="include" name="CMSIS/Core_A/Include/"/>
2129       </files>
2130     </component>
2131
2132     <!-- CMSIS-Startup components -->
2133     <!-- Cortex-M0 -->
2134     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2135       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2136       <files>
2137         <!-- include folder / device header file -->
2138         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2139         <!-- startup / system file -->
2140         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2141         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2142         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2143         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2144         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2145       </files>
2146     </component>
2147     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2148       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2149       <files>
2150         <!-- include folder / device header file -->
2151         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2152         <!-- startup / system file -->
2153         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2154         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2155         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2156       </files>
2157     </component>
2158
2159     <!-- Cortex-M0+ -->
2160     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2161       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2162       <files>
2163         <!-- include folder / device header file -->
2164         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2165         <!-- startup / system file -->
2166         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2167         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2168         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2169         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2170         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2171       </files>
2172     </component>
2173     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2174       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2175       <files>
2176         <!-- include folder / device header file -->
2177         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2178         <!-- startup / system file -->
2179         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2180         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2181         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2182       </files>
2183     </component>
2184
2185     <!-- Cortex-M3 -->
2186     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2187       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2188       <files>
2189         <!-- include folder / device header file -->
2190         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2191         <!-- startup / system file -->
2192         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2193         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2194         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2195         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2196         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2197       </files>
2198     </component>
2199     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2200       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2201       <files>
2202         <!-- include folder / device header file -->
2203         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2204         <!-- startup / system file -->
2205         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2206         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2207         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2208       </files>
2209     </component>
2210
2211     <!-- Cortex-M4 -->
2212     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2213       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2214       <files>
2215         <!-- include folder / device header file -->
2216         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2217         <!-- startup / system file -->
2218         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2219         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2220         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2221         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2222         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2223       </files>
2224     </component>
2225     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2226       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2227       <files>
2228         <!-- include folder / device header file -->
2229         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2230         <!-- startup / system file -->
2231         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2232         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2233         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2234       </files>
2235     </component>
2236
2237     <!-- Cortex-M7 -->
2238     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2239       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2240       <files>
2241         <!-- include folder / device header file -->
2242         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2243         <!-- startup / system file -->
2244         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2245         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2246         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2247         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2248         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2249       </files>
2250     </component>
2251     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2252       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2253       <files>
2254         <!-- include folder / device header file -->
2255         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2256         <!-- startup / system file -->
2257         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2258         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2259         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2260       </files>
2261     </component>
2262
2263     <!-- Cortex-M23 -->
2264     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2265       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2266       <files>
2267         <!-- include folder / device header file -->
2268         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2269         <!-- startup / system file -->
2270         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2271         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2272         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2273         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2274         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2275         <!-- SAU configuration -->
2276         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2277       </files>
2278     </component>
2279     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2280       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2281       <files>
2282         <!-- include folder / device header file -->
2283         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2284         <!-- startup / system file -->
2285         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2286         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2287         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2288         <!-- SAU configuration -->
2289         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2290       </files>
2291     </component>
2292
2293     <!-- Cortex-M33 -->
2294     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2295       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2296       <files>
2297         <!-- include folder / device header file -->
2298         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2299         <!-- startup / system file -->
2300         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2301         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2302         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2303         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2304         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2305         <!-- SAU configuration -->
2306         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2307       </files>
2308     </component>
2309     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2310       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2311       <files>
2312         <!-- include folder / device header file -->
2313         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2314         <!-- startup / system file -->
2315         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2316         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2317         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2318         <!-- SAU configuration -->
2319         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2320       </files>
2321     </component>
2322
2323     <!-- Cortex-SC000 -->
2324     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2325       <description>System and Startup for Generic Arm SC000 device</description>
2326       <files>
2327         <!-- include folder / device header file -->
2328         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2329         <!-- startup / system file -->
2330         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2331         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2332         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2333         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2334         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2335       </files>
2336     </component>
2337     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2338       <description>System and Startup for Generic Arm SC000 device</description>
2339       <files>
2340         <!-- include folder / device header file -->
2341         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2342         <!-- startup / system file -->
2343         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2344         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2345         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2346       </files>
2347     </component>
2348
2349     <!-- Cortex-SC300 -->
2350     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2351       <description>System and Startup for Generic Arm SC300 device</description>
2352       <files>
2353         <!-- include folder / device header file -->
2354         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2355         <!-- startup / system file -->
2356         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2357         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2358         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2359         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2360         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2361       </files>
2362     </component>
2363     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2364       <description>System and Startup for Generic Arm SC300 device</description>
2365       <files>
2366         <!-- include folder / device header file -->
2367         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2368         <!-- startup / system file -->
2369         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2370         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2371         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2372       </files>
2373     </component>
2374
2375     <!-- ARMv8MBL -->
2376     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2377       <description>System and Startup for Generic Armv8-M Baseline device</description>
2378       <files>
2379         <!-- include folder / device header file -->
2380         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2381         <!-- startup / system file -->
2382         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2383         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2384         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2385         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2386         <!-- SAU configuration -->
2387         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2388       </files>
2389     </component>
2390     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2391       <description>System and Startup for Generic Armv8-M Baseline device</description>
2392       <files>
2393         <!-- include folder / device header file -->
2394         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2395         <!-- startup / system file -->
2396         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2397         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2398         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2399         <!-- SAU configuration -->
2400         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2401       </files>
2402     </component>
2403
2404     <!-- ARMv8MML -->
2405     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2406       <description>System and Startup for Generic Armv8-M Mainline device</description>
2407       <files>
2408         <!-- include folder / device header file -->
2409         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2410         <!-- startup / system file -->
2411         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2412         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2413         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2414         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2415         <!-- SAU configuration -->
2416         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2417       </files>
2418     </component>
2419     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2420       <description>System and Startup for Generic Armv8-M Mainline device</description>
2421       <files>
2422         <!-- include folder / device header file -->
2423         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2424         <!-- startup / system file -->
2425         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2426         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2427         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2428         <!-- SAU configuration -->
2429         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2430       </files>
2431     </component>
2432
2433     <!-- Cortex-A5 -->
2434     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2435       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2436       <files>
2437         <!-- include folder / device header file -->
2438         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2439         <!-- startup / system / mmu files -->
2440         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2441         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2442         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2443         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2444         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2445         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2446         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2447         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2448         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2449         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2450         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2451         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2452
2453       </files>
2454     </component>
2455
2456     <!-- Cortex-A7 -->
2457     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2458       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2459       <files>
2460         <!-- include folder / device header file -->
2461         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2462         <!-- startup / system / mmu files -->
2463         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2464         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2465         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2466         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2467         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2468         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2469         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2470         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2471         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2472         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2473         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2474         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2475       </files>
2476     </component>
2477
2478     <!-- Cortex-A9 -->
2479     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2480       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2481       <files>
2482         <!-- include folder / device header file -->
2483         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2484         <!-- startup / system / mmu files -->
2485         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2486         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2487         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2488         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2489         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2490         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2491         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2492         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2493         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2494         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2495         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2496         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2497       </files>
2498     </component>
2499
2500     <!-- IRQ Controller -->
2501     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2502       <description>IRQ Controller implementation using GIC</description>
2503       <files>
2504         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2505       </files>
2506     </component>
2507
2508     <!-- OS Tick -->
2509     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2510       <description>OS Tick implementation using Private Timer</description>
2511       <files>
2512         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2513       </files>
2514     </component>
2515
2516     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2517       <description>OS Tick implementation using Generic Physical Timer</description>
2518       <files>
2519         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2520       </files>
2521     </component>
2522
2523     <!-- CMSIS-DSP component -->
2524     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2525       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2526       <files>
2527         <!-- CPU independent -->
2528         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2529         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2530
2531         <!-- CPU and Compiler dependent -->
2532         <!-- ARMCC -->
2533         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2534         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2535         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2536         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2537         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2538         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2539         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2540         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2541         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2542         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2543         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2544         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2545         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2546         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2547
2548         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2549         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2550         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2551         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2552         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2553         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2554         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2555         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2556         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2557         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2558         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2559         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2560
2561         <!-- GCC -->
2562         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2563         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2564         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2565         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2566         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2567         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2568         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2569
2570         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2571         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2572         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2573         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2574         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2575         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2576         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2577         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2578         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2579         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2580         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2581         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2582
2583         <!-- IAR -->
2584         <file category="library" condition="CM0_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2585         <file category="library" condition="CM0_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2586         <file category="library" condition="CM3_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2587         <file category="library" condition="CM3_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2588         <file category="library" condition="CM4_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2589         <file category="library" condition="CM4_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2590         <file category="library" condition="CM4_FP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2591         <file category="library" condition="CM4_FP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2592         <file category="library" condition="CM7_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2593         <file category="library" condition="CM7_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2594         <file category="library" condition="CM7_DP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2595         <file category="library" condition="CM7_DP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2596         <file category="library" condition="CM7_SP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
2597         <file category="library" condition="CM7_SP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
2598
2599         <file category="library" condition="CM23_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2600         <file category="library" condition="CM33_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2601         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2602         <file category="library" condition="CM33_FP_LE_IAR"           name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2603         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"    name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2604         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2605         <!--file category="library" condition="CM33_DSP_DP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2606         <file category="library" condition="ARMv8MBL_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2607         <file category="library" condition="ARMv8MML_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2608         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2609         <file category="library" condition="ARMv8MML_FP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2610         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2611         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2612         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2613
2614       </files>
2615     </component>
2616
2617     <!-- CMSIS-NN component -->
2618     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.0.0" condition="CMSIS NN">
2619       <description>CMSIS-NN Neural Network Library</description>
2620       <files>
2621         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2622         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2623
2624         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2625         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2626         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2627         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2628
2629         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2630         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2631         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2632         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2633         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2634         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2635         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2636         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2637         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2638         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2639         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2640         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2641
2642         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2643         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2644         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2645         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2646         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2647         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2648
2649         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2650         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2651         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2652         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2653         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2654
2655         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2656
2657         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2658         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2659       </files>
2660     </component>
2661
2662     <!-- CMSIS-RTOS Keil RTX component -->
2663     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2664       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2665       <RTE_Components_h>
2666         <!-- the following content goes into file 'RTE_Components.h' -->
2667         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2668         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2669       </RTE_Components_h>
2670       <files>
2671         <!-- CPU independent -->
2672         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2673         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2674         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2675
2676         <!-- RTX templates -->
2677         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2678         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2679         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2680         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2681         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2682         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2683         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2684         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2685         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2686         <!-- tool-chain specific template file -->
2687         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2688         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2689         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2690
2691         <!-- CPU and Compiler dependent -->
2692         <!-- ARMCC -->
2693         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2694         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2695         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2696         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2697         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2698         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2699         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2700         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2701         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2702         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2703         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2704         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2705         <!-- GCC -->
2706         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2707         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2708         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2709         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2710         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2711         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2712         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2713         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2714         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2715         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2716         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2717         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2718         <!-- IAR -->
2719         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2720         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2721         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2722         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2723         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2724         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2725         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2726         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2727         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2728         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2729         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2730         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2731       </files>
2732     </component>
2733     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2734     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2735       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2736       <RTE_Components_h>
2737         <!-- the following content goes into file 'RTE_Components.h' -->
2738         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2739         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2740       </RTE_Components_h>
2741       <files>
2742         <!-- CPU independent -->
2743         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2744         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2745         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2746
2747         <!-- RTX templates -->
2748         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2749         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2750         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2751         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2752         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2753         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2754         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2755         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2756         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2757         <!-- tool-chain specific template file -->
2758         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2759         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2760         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2761
2762         <!-- CPU and Compiler dependent -->
2763         <!-- ARMCC -->
2764         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2765         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2766         <!-- GCC -->
2767         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2768         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2769         <!-- IAR -->
2770       </files>
2771     </component>
2772
2773     <!-- CMSIS-RTOS Keil RTX5 component -->
2774     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.4.0" Capiversion="1.0.0" condition="RTOS RTX5">
2775       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2776       <RTE_Components_h>
2777         <!-- the following content goes into file 'RTE_Components.h' -->
2778         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2779         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2780       </RTE_Components_h>
2781       <files>
2782         <!-- RTX header file -->
2783         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2784         <!-- RTX compatibility module for API V1 -->
2785         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2786       </files>
2787     </component>
2788
2789     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2790     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
2791       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
2792       <RTE_Components_h>
2793         <!-- the following content goes into file 'RTE_Components.h' -->
2794         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2795         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2796       </RTE_Components_h>
2797       <files>
2798         <!-- RTX documentation -->
2799         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2800
2801         <!-- RTX header files -->
2802         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2803
2804         <!-- RTX configuration -->
2805         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2806         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2807
2808         <!-- RTX templates -->
2809         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2810         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2811         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2812         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2813         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2814         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2815         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2816         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2817         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2818         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2819
2820         <!-- RTX library configuration -->
2821         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2822
2823         <!-- RTX libraries (CPU and Compiler dependent) -->
2824         <!-- ARMCC -->
2825         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2826         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2827         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2828         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2829         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2830         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2831         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2832         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2833         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2834         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2835         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2836         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2837         <!-- GCC -->
2838         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2839         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2840         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2841         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2842         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2843         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2844         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2845         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2846         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2847         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2848         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2849         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2850         <!-- IAR -->
2851         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2852         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2853         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2854         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2855         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2856         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2857       </files>
2858     </component>
2859     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2860       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
2861       <RTE_Components_h>
2862         <!-- the following content goes into file 'RTE_Components.h' -->
2863         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2864         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2865         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2866       </RTE_Components_h>
2867       <files>
2868         <!-- RTX documentation -->
2869         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2870
2871         <!-- RTX header files -->
2872         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2873
2874         <!-- RTX configuration -->
2875         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2876         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2877
2878         <!-- RTX templates -->
2879         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2880         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2881         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2882         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2883         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2884         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2885         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2886         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2887         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2888         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2889
2890         <!-- RTX library configuration -->
2891         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2892
2893         <!-- RTX libraries (CPU and Compiler dependent) -->
2894         <!-- ARMCC -->
2895         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2896         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2897         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2898         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2899         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2900         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2901         <!-- GCC -->
2902         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2903         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2904         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2905         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2906         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2907         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2908       </files>
2909     </component>
2910     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
2911       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
2912       <RTE_Components_h>
2913         <!-- the following content goes into file 'RTE_Components.h' -->
2914         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2915         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2916         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2917       </RTE_Components_h>
2918       <files>
2919         <!-- RTX documentation -->
2920         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2921
2922         <!-- RTX header files -->
2923         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2924
2925         <!-- RTX configuration -->
2926         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2927         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2928
2929         <!-- RTX templates -->
2930         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2931         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2932         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2933         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2934         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2935         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2936         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2937         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2938         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2939         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2940
2941         <!-- RTX sources (core) -->
2942         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2943         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2944         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2945         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2946         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2947         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2948         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2949         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2950         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2951         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2952         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2953         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2954         <!-- RTX sources (library configuration) -->
2955         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2956         <!-- RTX sources (handlers ARMCC) -->
2957         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2958         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2959         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2960         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2961         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2962         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2963         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2964         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2965         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2966         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2967         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2968         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2969         <!-- RTX sources (handlers GCC) -->
2970         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2971         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2972         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2973         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2974         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2975         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2976         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2977         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2978         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2979         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2980         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2981         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2982         <!-- RTX sources (handlers IAR) -->
2983         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2984         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2985         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2986         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2987         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2988         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2989         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
2990         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
2991         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
2992         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
2993         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
2994         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
2995         <!-- OS Tick (SysTick) -->
2996         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2997       </files>
2998     </component>
2999     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3000       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3001       <RTE_Components_h>
3002         <!-- the following content goes into file 'RTE_Components.h' -->
3003         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3004         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3005         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3006       </RTE_Components_h>
3007       <files>
3008         <!-- RTX documentation -->
3009         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3010
3011         <!-- RTX header files -->
3012         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3013
3014         <!-- RTX configuration -->
3015         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3016         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3017
3018         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3019
3020         <!-- RTX templates -->
3021         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3022         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3023         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3024         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3025         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3026         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3027         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3028         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3029         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3030         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3031
3032         <!-- RTX sources (core) -->
3033         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3034         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3035         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3036         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3037         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3038         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3039         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3040         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3041         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3042         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3043         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3044         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3045         <!-- RTX sources (library configuration) -->
3046         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3047         <!-- RTX sources (handlers ARMCC) -->
3048         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3049         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3050         <!-- RTX sources (handlers GCC) -->
3051         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3052         <!-- RTX sources (handlers IAR) -->
3053         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3054       </files>
3055     </component>
3056     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3057       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3058       <RTE_Components_h>
3059         <!-- the following content goes into file 'RTE_Components.h' -->
3060         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3061         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3062         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3063         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3064       </RTE_Components_h>
3065       <files>
3066         <!-- RTX documentation -->
3067         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3068
3069         <!-- RTX header files -->
3070         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3071
3072         <!-- RTX configuration -->
3073         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3074         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3075
3076         <!-- RTX templates -->
3077         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3078         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3079         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3080         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3081         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3082         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3083         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3084         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3085         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3086         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3087
3088         <!-- RTX sources (core) -->
3089         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3090         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3091         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3092         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3093         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3094         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3095         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3096         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3097         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3098         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3099         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3100         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3101         <!-- RTX sources (library configuration) -->
3102         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3103         <!-- RTX sources (ARMCC handlers) -->
3104         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3105         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3106         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3107         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3108         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3109         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3110         <!-- RTX sources (GCC handlers) -->
3111         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3112         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3113         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3114         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3115         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3116         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3117         <!-- RTX sources (IAR handlers) -->
3118         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3119         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3120         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3121         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3122         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3123         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3124         <!-- OS Tick (SysTick) -->
3125         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3126       </files>
3127     </component>
3128
3129   </components>
3130
3131   <boards>
3132     <board name="uVision Simulator" vendor="Keil">
3133       <description>uVision Simulator</description>
3134       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3135       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3136       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3137       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3138       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3139       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3140       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3141       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3142       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3143       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3144       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3145       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3146       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3147       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3148       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3149       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3150       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3151       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3152       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3153     </board>
3154
3155     <board name="Fixed Virtual Platform" vendor="ARM">
3156       <description>Fixed Virtual Platform</description>
3157       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3158       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3159       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3160     </board>
3161   </boards>
3162
3163   <examples>
3164     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3165       <description>DSP_Lib Class Marks example</description>
3166       <board name="uVision Simulator" vendor="Keil"/>
3167       <project>
3168         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3169       </project>
3170       <attributes>
3171         <component Cclass="CMSIS" Cgroup="CORE"/>
3172         <component Cclass="CMSIS" Cgroup="DSP"/>
3173         <component Cclass="Device" Cgroup="Startup"/>
3174         <category>Getting Started</category>
3175       </attributes>
3176     </example>
3177
3178     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3179       <description>DSP_Lib Convolution example</description>
3180       <board name="uVision Simulator" vendor="Keil"/>
3181       <project>
3182         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3183       </project>
3184       <attributes>
3185         <component Cclass="CMSIS" Cgroup="CORE"/>
3186         <component Cclass="CMSIS" Cgroup="DSP"/>
3187         <component Cclass="Device" Cgroup="Startup"/>
3188         <category>Getting Started</category>
3189       </attributes>
3190     </example>
3191
3192     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3193       <description>DSP_Lib Dotproduct example</description>
3194       <board name="uVision Simulator" vendor="Keil"/>
3195       <project>
3196         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3197       </project>
3198       <attributes>
3199         <component Cclass="CMSIS" Cgroup="CORE"/>
3200         <component Cclass="CMSIS" Cgroup="DSP"/>
3201         <component Cclass="Device" Cgroup="Startup"/>
3202         <category>Getting Started</category>
3203       </attributes>
3204     </example>
3205
3206     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3207       <description>DSP_Lib FFT Bin example</description>
3208       <board name="uVision Simulator" vendor="Keil"/>
3209       <project>
3210         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3211       </project>
3212       <attributes>
3213         <component Cclass="CMSIS" Cgroup="CORE"/>
3214         <component Cclass="CMSIS" Cgroup="DSP"/>
3215         <component Cclass="Device" Cgroup="Startup"/>
3216         <category>Getting Started</category>
3217       </attributes>
3218     </example>
3219
3220     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3221       <description>DSP_Lib FIR example</description>
3222       <board name="uVision Simulator" vendor="Keil"/>
3223       <project>
3224         <environment name="uv" load="arm_fir_example.uvprojx"/>
3225       </project>
3226       <attributes>
3227         <component Cclass="CMSIS" Cgroup="CORE"/>
3228         <component Cclass="CMSIS" Cgroup="DSP"/>
3229         <component Cclass="Device" Cgroup="Startup"/>
3230         <category>Getting Started</category>
3231       </attributes>
3232     </example>
3233
3234     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3235       <description>DSP_Lib Graphic Equalizer example</description>
3236       <board name="uVision Simulator" vendor="Keil"/>
3237       <project>
3238         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3239       </project>
3240       <attributes>
3241         <component Cclass="CMSIS" Cgroup="CORE"/>
3242         <component Cclass="CMSIS" Cgroup="DSP"/>
3243         <component Cclass="Device" Cgroup="Startup"/>
3244         <category>Getting Started</category>
3245       </attributes>
3246     </example>
3247
3248     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3249       <description>DSP_Lib Linear Interpolation example</description>
3250       <board name="uVision Simulator" vendor="Keil"/>
3251       <project>
3252         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3253       </project>
3254       <attributes>
3255         <component Cclass="CMSIS" Cgroup="CORE"/>
3256         <component Cclass="CMSIS" Cgroup="DSP"/>
3257         <component Cclass="Device" Cgroup="Startup"/>
3258         <category>Getting Started</category>
3259       </attributes>
3260     </example>
3261
3262     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3263       <description>DSP_Lib Matrix example</description>
3264       <board name="uVision Simulator" vendor="Keil"/>
3265       <project>
3266         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3267       </project>
3268       <attributes>
3269         <component Cclass="CMSIS" Cgroup="CORE"/>
3270         <component Cclass="CMSIS" Cgroup="DSP"/>
3271         <component Cclass="Device" Cgroup="Startup"/>
3272         <category>Getting Started</category>
3273       </attributes>
3274     </example>
3275
3276     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3277       <description>DSP_Lib Signal Convergence example</description>
3278       <board name="uVision Simulator" vendor="Keil"/>
3279       <project>
3280         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3281       </project>
3282       <attributes>
3283         <component Cclass="CMSIS" Cgroup="CORE"/>
3284         <component Cclass="CMSIS" Cgroup="DSP"/>
3285         <component Cclass="Device" Cgroup="Startup"/>
3286         <category>Getting Started</category>
3287       </attributes>
3288     </example>
3289
3290     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3291       <description>DSP_Lib Sinus/Cosinus example</description>
3292       <board name="uVision Simulator" vendor="Keil"/>
3293       <project>
3294         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3295       </project>
3296       <attributes>
3297         <component Cclass="CMSIS" Cgroup="CORE"/>
3298         <component Cclass="CMSIS" Cgroup="DSP"/>
3299         <component Cclass="Device" Cgroup="Startup"/>
3300         <category>Getting Started</category>
3301       </attributes>
3302     </example>
3303
3304     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3305       <description>DSP_Lib Variance example</description>
3306       <board name="uVision Simulator" vendor="Keil"/>
3307       <project>
3308         <environment name="uv" load="arm_variance_example.uvprojx"/>
3309       </project>
3310       <attributes>
3311         <component Cclass="CMSIS" Cgroup="CORE"/>
3312         <component Cclass="CMSIS" Cgroup="DSP"/>
3313         <component Cclass="Device" Cgroup="Startup"/>
3314         <category>Getting Started</category>
3315       </attributes>
3316     </example>
3317
3318     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3319       <description>Neural Network CIFAR10 example</description>
3320       <board name="uVision Simulator" vendor="Keil"/>
3321       <project>
3322         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3323       </project>
3324       <attributes>
3325         <component Cclass="CMSIS" Cgroup="CORE"/>
3326         <component Cclass="CMSIS" Cgroup="DSP"/>
3327         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3328         <component Cclass="Device" Cgroup="Startup"/>
3329         <category>Getting Started</category>
3330       </attributes>
3331     </example>
3332
3333     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3334       <description>Neural Network GRU example</description>
3335       <board name="uVision Simulator" vendor="Keil"/>
3336       <project>
3337         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3338       </project>
3339       <attributes>
3340         <component Cclass="CMSIS" Cgroup="CORE"/>
3341         <component Cclass="CMSIS" Cgroup="DSP"/>
3342         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3343         <component Cclass="Device" Cgroup="Startup"/>
3344         <category>Getting Started</category>
3345       </attributes>
3346     </example>
3347
3348     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3349       <description>CMSIS-RTOS2 Blinky example</description>
3350       <board name="uVision Simulator" vendor="Keil"/>
3351       <project>
3352         <environment name="uv" load="Blinky.uvprojx"/>
3353       </project>
3354       <attributes>
3355         <component Cclass="CMSIS" Cgroup="CORE"/>
3356         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3357         <component Cclass="Device" Cgroup="Startup"/>
3358         <category>Getting Started</category>
3359       </attributes>
3360     </example>
3361
3362     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3363       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3364       <board name="uVision Simulator" vendor="Keil"/>
3365       <project>
3366         <environment name="uv" load="Blinky.uvprojx"/>
3367       </project>
3368       <attributes>
3369         <component Cclass="CMSIS" Cgroup="CORE"/>
3370         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3371         <component Cclass="Device" Cgroup="Startup"/>
3372         <category>Getting Started</category>
3373       </attributes>
3374     </example>
3375
3376     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3377       <description>CMSIS-RTOS2 Message Queue Example</description>
3378       <board name="uVision Simulator" vendor="Keil"/>
3379       <project>
3380         <environment name="uv" load="MsqQueue.uvprojx"/>
3381       </project>
3382       <attributes>
3383         <component Cclass="CMSIS" Cgroup="CORE"/>
3384         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3385         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3386         <component Cclass="Device" Cgroup="Startup"/>
3387         <category>Getting Started</category>
3388       </attributes>
3389     </example>
3390
3391     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3392       <description>CMSIS-RTOS2 Memory Pool Example</description>
3393       <board name="Fixed Virtual Platform" vendor="ARM"/>
3394       <project>
3395         <environment name="uv" load="MemPool.uvprojx"/>
3396       </project>
3397       <attributes>
3398         <component Cclass="CMSIS" Cgroup="CORE"/>
3399         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3400         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3401         <component Cclass="Device" Cgroup="Startup"/>
3402         <category>Getting Started</category>
3403       </attributes>
3404     </example>
3405
3406     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3407       <description>Bare-metal secure/non-secure example without RTOS</description>
3408       <board name="uVision Simulator" vendor="Keil"/>
3409       <project>
3410         <environment name="uv" load="NoRTOS.uvmpw"/>
3411       </project>
3412       <attributes>
3413         <component Cclass="CMSIS" Cgroup="CORE"/>
3414         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3415         <component Cclass="Device" Cgroup="Startup"/>
3416         <category>Getting Started</category>
3417       </attributes>
3418     </example>
3419
3420     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3421       <description>Secure/non-secure RTOS example with thread context management</description>
3422       <board name="uVision Simulator" vendor="Keil"/>
3423       <project>
3424         <environment name="uv" load="RTOS.uvmpw"/>
3425       </project>
3426       <attributes>
3427         <component Cclass="CMSIS" Cgroup="CORE"/>
3428         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3429         <component Cclass="Device" Cgroup="Startup"/>
3430         <category>Getting Started</category>
3431       </attributes>
3432     </example>
3433
3434     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3435       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3436       <board name="uVision Simulator" vendor="Keil"/>
3437       <project>
3438         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3439       </project>
3440       <attributes>
3441         <component Cclass="CMSIS" Cgroup="CORE"/>
3442         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3443         <component Cclass="Device" Cgroup="Startup"/>
3444         <category>Getting Started</category>
3445       </attributes>
3446     </example>
3447
3448   </examples>
3449
3450 </package>