begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.1-dev5">
  12       DSP:
  13        - updated to version V1.5.0.
  14     </release>
  15     <release version="5.0.1-dev4">
  16       DSP:
  17        - preparation for ARMv8M DSP libraries.
  18     </release>
  19     <release version="5.0.1-dev3">
  20       Updated ARMv8M Mainline FPU settings in partition*.h
  21     </release>
  22     <release version="5.0.1-dev2">
  23       CMSIS-RTOS2:
  24        - API 2.1   (see revision history for details)
  25        - RTX 5.1.0 (see revision history for details)
  26     </release>
  27     <release version="5.0.1-dev1">
  28       All C module and header files: updated removing 'http://' within license header sections flagged by MISRA as comment within comment
  29       PDSC: added new compatible devices to 'uVision Simulator' generic board description
  30       CMSIS-Pack Schema: adding
  31     </release>
  32     <release version="5.0.1-dev0">
  33       CMSIS-Core:
  34        - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  35        - Updated template for secure main function (main_s.c)
  36        - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  37       CMSIS-RTOS2:
  38        - RTX 5.0.1 (see revision history for details)
  39     </release>
  40     <release version="5.0.0" date="2016-11-11">
  41       Changed open source license to Apache 2.0
  42       CMSIS_Core:
  43        - Added support for Cortex-M23 and Cortex-M33.
  44        - Added ARMv8-M device configurations for mainline and baseline.
  45        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  46        - Added cmsis_compiler.h to unify compiler behaviour.
  47        - Updated function SCB_EnableICache (for Cortex-M7).
  48        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  49       CMSIS-RTOS:
  50         - bug fix in RTX 4.82 (see revision history for details)
  51       CMSIS-RTOS2:
  52         - new API including compatibility layer to CMSIS-RTOS
  53         - reference implementation based on RTX5
  54         - supports all Cortex-M variants including TrustZone for ARMv8-M
  55       CMSIS-SVD:
  56        - reworked SVD format documentation
  57        - removed SVD file database documentation as SVD files are distributed in packs
  58        - updated SVDConv for Win32 and Linux
  59       CMSIS-DSP:
  60        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  61        - Added DSP libraries build projects to CMSIS pack.
  62     </release>
  63     <release version="4.5.0" date="2015-10-28">
  64       - CMSIS-Core     4.30.0  (see revision history for details)
  65       - CMSIS-DAP      1.1.0   (unchanged)
  66       - CMSIS-Driver   2.04.0  (see revision history for details)
  67       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  68       - CMSIS-PACK     1.4.1   (see revision history for details)
  69       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  70       - CMSIS-SVD      1.3.1   (see revision history for details)
  71     </release>
  72     <release version="4.4.0" date="2015-09-11">
  73       - CMSIS-Core     4.20   (see revision history for details)
  74       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  75       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  76       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  77       - CMSIS-RTOS
  78         -- API         1.02   (unchanged)
  79         -- RTX         4.79   (see revision history for details)
  80       - CMSIS-SVD      1.3.0  (see revision history for details)
  81       - CMSIS-DAP      1.1.0  (extended with SWO support)
  82     </release>
  83     <release version="4.3.0" date="2015-03-20">
  84       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  85       - CMSIS-DSP      1.4.5  (see revision history for details)
  86       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  87       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  88       - CMSIS-RTOS
  89         -- API         1.02   (unchanged)
  90         -- RTX         4.78   (see revision history for details)
  91       - CMSIS-SVD      1.2    (unchanged)
  92     </release>
  93     <release version="4.2.0" date="2014-09-24">
  94       Adding Cortex-M7 support
  95       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
  96       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
  97       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
  98       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
  99       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 100     </release>
 101     <release version="4.1.1" date="2014-06-30">
 102       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 103     </release>
 104     <release version="4.1.0" date="2014-06-12">
 105       - CMSIS-Driver   2.02  (incompatible update)
 106       - CMSIS-Pack     1.3   (see revision history for details)
 107       - CMSIS-DSP      1.4.2 (unchanged)
 108       - CMSIS-Core     3.30  (unchanged)
 109       - CMSIS-RTOS RTX 4.74  (unchanged)
 110       - CMSIS-RTOS API 1.02  (unchanged)
 111       - CMSIS-SVD      1.10  (unchanged)
 112       PACK:
 113       - removed G++ specific files from PACK
 114       - added Component Startup variant "C Startup"
 115       - added Pack Checking Utility
 116       - updated conditions to reflect tool-chain dependency
 117       - added Taxonomy for Graphics
 118       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 119     </release>
 120     <release version="4.0.0">
 121       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 122       - CMSIS-Pack     1.1   Preliminary
 123       - CMSIS-DSP      1.4.2 (see revision history for details)
 124       - CMSIS-Core     3.30  (see revision history for details)
 125       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 126       - CMSIS-RTOS API 1.02  (unchanged)
 127       - CMSIS-SVD      1.10  (unchanged)
 128     </release>
 129     <release version="3.20.4">
 130       - CMSIS-RTOS 4.74 (see revision history for details)
 131       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 132     </release>
 133     <release version="3.20.3">
 134       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 135       - CMSIS-RTOS 4.73 (see revision history for details)
 136     </release>
 137     <release version="3.20.2">
 138       - CMSIS-Pack documentation has been added
 139       - CMSIS-Drivers header and documentation have been added to PACK
 140       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 141     </release>
 142     <release version="3.20.1">
 143       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 144       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 145     </release>
 146     <release version="3.20.0">
 147       The software portions that are deployed in the application program are now under a BSD license which allows usage
 148       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 149       The individual components have been update as listed below:
 150       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 151       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 152       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 153       - CMSIS-SVD is unchanged.
 154     </release>
 155   </releases>
 156
 157   <taxonomy>
 158     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 159     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 160     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 161     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 162     <description Cclass="File System">File Drive Support and File System</description>
 163     <description Cclass="Graphics">Graphical User Interface</description>
 164     <description Cclass="Network">Network Stack using Internet Protocols</description>
 165     <description Cclass="USB">Universal Serial Bus Stack</description>
 166     <description Cclass="Compiler">ARM Compiler Software Extensions</description>
 167   </taxonomy>
 168
 169   <devices>
 170     <!-- ******************************  Cortex-M0  ****************************** -->
 171     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 172       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 173       <description>
 174 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 175 - simple, easy-to-use programmers model
 176 - highly efficient ultra-low power operation
 177 - excellent code density
 178 - deterministic, high-performance interrupt handling
 179 - upward compatibility with the rest of the Cortex-M processor family.
 180       </description>
 181       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 182       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 183       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 184       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 185
 186       <device Dname="ARMCM0">
 187         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 188         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 189       </device>
 190     </family>
 191
 192     <!-- ******************************  Cortex-M0P  ****************************** -->
 193     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 194       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 195       <description>
 196 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 197 - simple, easy-to-use programmers model
 198 - highly efficient ultra-low power operation
 199 - excellent code density
 200 - deterministic, high-performance interrupt handling
 201 - upward compatibility with the rest of the Cortex-M processor family.
 202       </description>
 203       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 204       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 205       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 206       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 207
 208       <device Dname="ARMCM0P">
 209         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 210         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 211       </device>
 212     </family>
 213
 214     <!-- ******************************  Cortex-M3  ****************************** -->
 215     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 216       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 217       <description>
 218 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 219 - simple, easy-to-use programmers model
 220 - highly efficient ultra-low power operation
 221 - excellent code density
 222 - deterministic, high-performance interrupt handling
 223 - upward compatibility with the rest of the Cortex-M processor family.
 224       </description>
 225       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 226       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 227       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 228       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 229
 230       <device Dname="ARMCM3">
 231         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 232         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 233       </device>
 234     </family>
 235
 236     <!-- ******************************  Cortex-M4  ****************************** -->
 237     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 238       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 239       <description>
 240 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 241 - simple, easy-to-use programmers model
 242 - highly efficient ultra-low power operation
 243 - excellent code density
 244 - deterministic, high-performance interrupt handling
 245 - upward compatibility with the rest of the Cortex-M processor family.
 246       </description>
 247       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 248       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 249       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 250       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 251
 252       <device Dname="ARMCM4">
 253         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 254         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 255       </device>
 256
 257       <device Dname="ARMCM4_FP">
 258         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 259         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 260       </device>
 261     </family>
 262
 263     <!-- ******************************  Cortex-M7  ****************************** -->
 264     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 265       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 266       <description>
 267 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 268 - simple, easy-to-use programmers model
 269 - highly efficient ultra-low power operation
 270 - excellent code density
 271 - deterministic, high-performance interrupt handling
 272 - upward compatibility with the rest of the Cortex-M processor family.
 273       </description>
 274       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 275       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 276       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 277       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 278
 279       <device Dname="ARMCM7">
 280         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 281         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 282       </device>
 283
 284       <device Dname="ARMCM7_SP">
 285         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 286         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 287       </device>
 288
 289       <device Dname="ARMCM7_DP">
 290         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 291         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 292       </device>
 293     </family>
 294
 295     <!-- ******************************  Cortex-M23  ********************** -->
 296     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 297       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 298       <description>
 299 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 300 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 301 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 302       </description>
 303       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 304       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 305       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 306       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 307       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 308       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 309
 310       <device Dname="ARMCM23">
 311         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 312         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 313       </device>
 314
 315       <device Dname="ARMCM23_TZ">
 316         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 317         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 318       </device>
 319     </family>
 320
 321     <!-- ******************************  Cortex-M33  ****************************** -->
 322     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 323       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 324       <description>
 325 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 326 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 327       </description>
 328       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 329       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 330       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 331       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 332       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 333       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 334
 335       <device Dname="ARMCM33">
 336         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 337         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 338       </device>
 339
 340       <device Dname="ARMCM33_TZ">
 341         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 342         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 343       </device>
 344
 345       <device Dname="ARMCM33_DSP_FP">
 346         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 347         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 348       </device>
 349
 350       <device Dname="ARMCM33_DSP_FP_TZ">
 351         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 352         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 353       </device>
 354     </family>
 355
 356     <!-- ******************************  ARMSC000  ****************************** -->
 357     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 358       <description>
 359 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 360 - simple, easy-to-use programmers model
 361 - highly efficient ultra-low power operation
 362 - excellent code density
 363 - deterministic, high-performance interrupt handling
 364       </description>
 365       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 366       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 367       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 368       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 369
 370       <device Dname="ARMSC000">
 371         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 372         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 373       </device>
 374     </family>
 375
 376     <!-- ******************************  ARMSC300  ****************************** -->
 377     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 378       <description>
 379 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 380 - simple, easy-to-use programmers model
 381 - highly efficient ultra-low power operation
 382 - excellent code density
 383 - deterministic, high-performance interrupt handling
 384       </description>
 385       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 386       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 387       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 388       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 389
 390       <device Dname="ARMSC300">
 391         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 392         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 393       </device>
 394     </family>
 395
 396     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 397     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 398       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 399       <description>
 400 ARMv8-M Baseline based device with TrustZone
 401       </description>
 402       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 403       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 404       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 405       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 406       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 407       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 408
 409       <device Dname="ARMv8MBL">
 410         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 411         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 412       </device>
 413     </family>
 414
 415     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 416     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 417       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 418       <description>
 419 ARMv8-M Mainline based device with TrustZone
 420       </description>
 421       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 422       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 423       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 424       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 425       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 426       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 427
 428       <device Dname="ARMv8MML">
 429         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 430         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 431       </device>
 432
 433       <device Dname="ARMv8MML_DSP">
 434         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 435         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 436       </device>
 437
 438       <device Dname="ARMv8MML_SP">
 439         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 440         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 441       </device>
 442
 443       <device Dname="ARMv8MML_DSP_SP">
 444         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 445         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 446       </device>
 447
 448       <device Dname="ARMv8MML_DP">
 449         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 450         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 451       </device>
 452
 453       <device Dname="ARMv8MML_DSP_DP">
 454         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 455         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 456       </device>
 457     </family>
 458
 459   </devices>
 460
 461
 462   <apis>
 463     <!-- CMSIS-RTOS API -->
 464     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
 465       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 466       <files>
 467         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 468       </files>
 469     </api>
 470     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1" exclusive="1">
 471       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 472       <files>
 473         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 474       </files>
 475     </api>
 476     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
 477       <description>USART Driver API for Cortex-M</description>
 478       <files>
 479         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 480         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 481       </files>
 482     </api>
 483     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
 484       <description>SPI Driver API for Cortex-M</description>
 485       <files>
 486         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 487         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 488       </files>
 489     </api>
 490     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
 491       <description>SAI Driver API for Cortex-M</description>
 492       <files>
 493         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 494         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 495       </files>
 496     </api>
 497     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
 498       <description>I2C Driver API for Cortex-M</description>
 499       <files>
 500         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 501         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 502       </files>
 503     </api>
 504     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
 505       <description>CAN Driver API for Cortex-M</description>
 506       <files>
 507         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 508         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 509       </files>
 510     </api>
 511     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
 512       <description>Flash Driver API for Cortex-M</description>
 513       <files>
 514         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 515         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 516       </files>
 517     </api>
 518     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
 519       <description>MCI Driver API for Cortex-M</description>
 520       <files>
 521         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 522         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 523       </files>
 524     </api>
 525     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
 526       <description>NAND Flash Driver API for Cortex-M</description>
 527       <files>
 528         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 529         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 530       </files>
 531     </api>
 532     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
 533       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 534       <files>
 535         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 536         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 537         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 538       </files>
 539     </api>
 540     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
 541       <description>Ethernet MAC Driver API for Cortex-M</description>
 542       <files>
 543         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 544         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 545       </files>
 546     </api>
 547     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
 548       <description>Ethernet PHY Driver API for Cortex-M</description>
 549       <files>
 550         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 551         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 552       </files>
 553     </api>
 554     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
 555       <description>USB Device Driver API for Cortex-M</description>
 556       <files>
 557         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 558         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 559       </files>
 560     </api>
 561     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
 562       <description>USB Host Driver API for Cortex-M</description>
 563       <files>
 564         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 565         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 566       </files>
 567     </api>
 568   </apis>
 569
 570   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 571   <conditions>
 572     <!-- compiler -->
 573     <condition id="ARMCC">
 574       <require Tcompiler="ARMCC"/>
 575     </condition>
 576     <condition id="GCC">
 577       <require Tcompiler="GCC"/>
 578     </condition>
 579     <condition id="IAR">
 580       <require Tcompiler="IAR"/>
 581     </condition>
 582     <condition id="ARMCC GCC">
 583       <accept Tcompiler="ARMCC"/>
 584       <accept Tcompiler="GCC"/>
 585     </condition>
 586     <condition id="ARMCC GCC IAR">
 587       <accept Tcompiler="ARMCC"/>
 588       <accept Tcompiler="GCC"/>
 589       <accept Tcompiler="IAR"/>
 590     </condition>
 591
 592     <!-- ARM architecture -->
 593     <condition id="ARMv6-M Device">
 594       <description>ARMv6-M architecture based device</description>
 595       <accept Dcore="Cortex-M0"/>
 596       <accept Dcore="Cortex-M0+"/>
 597       <accept Dcore="SC000"/>
 598     </condition>
 599     <condition id="ARMv7-M Device">
 600       <description>ARMv7-M architecture based device</description>
 601       <accept Dcore="Cortex-M3"/>
 602       <accept Dcore="Cortex-M4"/>
 603       <accept Dcore="Cortex-M7"/>
 604       <accept Dcore="SC300"/>
 605     </condition>
 606     <condition id="ARMv8-M Device">
 607       <description>ARMv8-M architecture based device</description>
 608       <accept Dcore="ARMV8MBL"/>
 609       <accept Dcore="ARMV8MML"/>
 610       <accept Dcore="Cortex-M23"/>
 611       <accept Dcore="Cortex-M33"/>
 612     </condition>
 613     <condition id="ARMv8-M TZ Device">
 614       <description>ARMv8-M architecture based device with TrustZone</description>
 615       <require condition="ARMv8-M Device"/>
 616       <require Dtz="TZ"/>
 617     </condition>
 618     <condition id="ARMv6_7-M Device">
 619       <description>ARMv6_7-M architecture based device</description>
 620       <accept condition="ARMv6-M Device"/>
 621       <accept condition="ARMv7-M Device"/>
 622     </condition>
 623     <condition id="ARMv6_7_8-M Device">
 624       <description>ARMv6_7_8-M architecture based device</description>
 625       <accept condition="ARMv6-M Device"/>
 626       <accept condition="ARMv7-M Device"/>
 627       <accept condition="ARMv8-M Device"/>
 628     </condition>
 629
 630     <!-- ARM core -->
 631     <condition id="CM0">
 632       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 633       <accept Dcore="Cortex-M0"/>
 634       <accept Dcore="Cortex-M0+"/>
 635       <accept Dcore="SC000"/>
 636     </condition>
 637     <condition id="CM3">
 638       <description>Cortex-M3 or SC300 processor based device</description>
 639       <accept Dcore="Cortex-M3"/>
 640       <accept Dcore="SC300"/>
 641     </condition>
 642     <condition id="CM4">
 643       <description>Cortex-M4 processor based device</description>
 644       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 645     </condition>
 646     <condition id="CM4_FP">
 647       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 648       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 649     </condition>
 650     <condition id="CM7">
 651       <description>Cortex-M7 processor based device</description>
 652       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 653     </condition>
 654     <condition id="CM7_FP">
 655       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 656       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 657       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 658     </condition>
 659     <condition id="CM7_SP">
 660       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 661       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 662     </condition>
 663     <condition id="CM7_DP">
 664       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 665       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 666     </condition>
 667     <condition id="CM23">
 668       <description>Cortex-M23 processor based device</description>
 669       <require Dcore="Cortex-M23"/>
 670     </condition>
 671     <condition id="CM33">
 672       <description>Cortex-M33 processor based device</description>
 673       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 674     </condition>
 675     <condition id="CM33_DSP">
 676       <description>Cortex-M33 processor based device with DSP extension</description>
 677       <require Dcore="Cortex-M33" Dfpu="NO_FPU" Ddsp="DSP"/>
 678     </condition>
 679     <condition id="CM33_FP">
 680       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 681       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 682     </condition>
 683     <condition id="CM33_SP">
 684       <description>Cortex-M33 processor based device using Floating Point Unit (SP)</description>
 685       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="NO_DSP"/>
 686     </condition>
 687     <condition id="CM33_DSP_SP">
 688       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP)</description>
 689       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="DSP"/>
 690     </condition>
 691     <condition id="ARMv8MBL">
 692       <description>ARMv8-M Baseline processor based device</description>
 693       <require Dcore="ARMV8MBL"/>
 694     </condition>
 695     <condition id="ARMv8MML">
 696       <description>ARMv8-M Mainline processor based device</description>
 697       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 698     </condition>
 699     <condition id="ARMv8MML_DSP">
 700       <description>ARMv8-M Mainline processor based device with DSP extension</description>
 701       <require Dcore="ARMV8MML" Dfpu="NO_FPU" Ddsp="DSP"/>
 702     </condition>
 703     <condition id="ARMv8MML_FP">
 704       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 705       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 706       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 707     </condition>
 708     <condition id="ARMv8MML_SP">
 709       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
 710       <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 711     </condition>
 712     <condition id="ARMv8MML_DSP_SP">
 713       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP)</description>
 714       <require Dcore="ARMV8MML" Dfpu="SP_FPU" Ddsp="DSP"/>
 715     </condition>
 716     <condition id="ARMv8MML_DP">
 717       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
 718       <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 719     </condition>
 720     <condition id="ARMv8MML_DSP_DP">
 721       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP)</description>
 722       <require Dcore="ARMV8MML" Dfpu="DP_FPU" Ddsp="DSP"/>
 723     </condition>
 724
 725     <!-- ARMCC compiler -->
 726     <condition id="CM0_ARMCC">
 727       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 728       <require condition="CM0"/>
 729       <require Tcompiler="ARMCC"/>
 730     </condition>
 731     <condition id="CM0_LE_ARMCC">
 732       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 733       <require condition="CM0_ARMCC"/>
 734       <require Dendian="Little-endian"/>
 735     </condition>
 736     <condition id="CM0_BE_ARMCC">
 737       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 738       <require condition="CM0_ARMCC"/>
 739       <require Dendian="Big-endian"/>
 740     </condition>
 741
 742     <condition id="CM3_ARMCC">
 743       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 744       <require condition="CM3"/>
 745       <require Tcompiler="ARMCC"/>
 746     </condition>
 747     <condition id="CM3_LE_ARMCC">
 748       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 749       <require condition="CM3_ARMCC"/>
 750       <require Dendian="Little-endian"/>
 751     </condition>
 752     <condition id="CM3_BE_ARMCC">
 753       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 754       <require condition="CM3_ARMCC"/>
 755       <require Dendian="Big-endian"/>
 756     </condition>
 757
 758     <condition id="CM4_ARMCC">
 759       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 760       <require condition="CM4"/>
 761       <require Tcompiler="ARMCC"/>
 762     </condition>
 763     <condition id="CM4_LE_ARMCC">
 764       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 765       <require condition="CM4_ARMCC"/>
 766       <require Dendian="Little-endian"/>
 767     </condition>
 768     <condition id="CM4_BE_ARMCC">
 769       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 770       <require condition="CM4_ARMCC"/>
 771       <require Dendian="Big-endian"/>
 772     </condition>
 773
 774     <condition id="CM4_FP_ARMCC">
 775       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 776       <require condition="CM4_FP"/>
 777       <require Tcompiler="ARMCC"/>
 778     </condition>
 779     <condition id="CM4_FP_LE_ARMCC">
 780       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 781       <require condition="CM4_FP_ARMCC"/>
 782       <require Dendian="Little-endian"/>
 783     </condition>
 784     <condition id="CM4_FP_BE_ARMCC">
 785       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 786       <require condition="CM4_FP_ARMCC"/>
 787       <require Dendian="Big-endian"/>
 788     </condition>
 789
 790     <!-- XMC 4000 Series devices from Infineon require a special library -->
 791     <condition id="CM4_LE_ARMCC_STD">
 792       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 793       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 794       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 795       <require Tcompiler="ARMCC"/>
 796     </condition>
 797     <condition id="CM4_LE_ARMCC_IFX">
 798       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 799       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 800       <require Tcompiler="ARMCC"/>
 801     </condition>
 802     <condition id="CM4_FP_LE_ARMCC_STD">
 803       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 804       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 805       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 806       <require Tcompiler="ARMCC"/>
 807     </condition>
 808     <condition id="CM4_FP_LE_ARMCC_IFX">
 809       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 810       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 811       <require Tcompiler="ARMCC"/>
 812     </condition>
 813
 814     <condition id="CM7_ARMCC">
 815       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 816       <require condition="CM7"/>
 817       <require Tcompiler="ARMCC"/>
 818     </condition>
 819     <condition id="CM7_LE_ARMCC">
 820       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 821       <require condition="CM7_ARMCC"/>
 822       <require Dendian="Little-endian"/>
 823     </condition>
 824     <condition id="CM7_BE_ARMCC">
 825       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 826       <require condition="CM7_ARMCC"/>
 827       <require Dendian="Big-endian"/>
 828     </condition>
 829
 830     <condition id="CM7_FP_ARMCC">
 831       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 832       <require condition="CM7_FP"/>
 833       <require Tcompiler="ARMCC"/>
 834     </condition>
 835     <condition id="CM7_FP_LE_ARMCC">
 836       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 837       <require condition="CM7_FP_ARMCC"/>
 838       <require Dendian="Little-endian"/>
 839     </condition>
 840     <condition id="CM7_FP_BE_ARMCC">
 841       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 842       <require condition="CM7_FP_ARMCC"/>
 843       <require Dendian="Big-endian"/>
 844     </condition>
 845
 846     <condition id="CM7_SP_ARMCC">
 847       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 848       <require condition="CM7_SP"/>
 849       <require Tcompiler="ARMCC"/>
 850     </condition>
 851     <condition id="CM7_SP_LE_ARMCC">
 852       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 853       <require condition="CM7_SP_ARMCC"/>
 854       <require Dendian="Little-endian"/>
 855     </condition>
 856     <condition id="CM7_SP_BE_ARMCC">
 857       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 858       <require condition="CM7_SP_ARMCC"/>
 859       <require Dendian="Big-endian"/>
 860     </condition>
 861
 862     <condition id="CM7_DP_ARMCC">
 863       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 864       <require condition="CM7_DP"/>
 865       <require Tcompiler="ARMCC"/>
 866     </condition>
 867     <condition id="CM7_DP_LE_ARMCC">
 868       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 869       <require condition="CM7_DP_ARMCC"/>
 870       <require Dendian="Little-endian"/>
 871     </condition>
 872     <condition id="CM7_DP_BE_ARMCC">
 873       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 874       <require condition="CM7_DP_ARMCC"/>
 875       <require Dendian="Big-endian"/>
 876     </condition>
 877
 878     <condition id="CM23_ARMCC">
 879       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 880       <require condition="CM23"/>
 881       <require Tcompiler="ARMCC"/>
 882     </condition>
 883     <condition id="CM23_LE_ARMCC">
 884       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 885       <require condition="CM23_ARMCC"/>
 886       <require Dendian="Little-endian"/>
 887     </condition>
 888     <condition id="CM23_BE_ARMCC">
 889       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 890       <require condition="CM23_ARMCC"/>
 891       <require Dendian="Big-endian"/>
 892     </condition>
 893
 894     <condition id="CM33_ARMCC">
 895       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 896       <require condition="CM33"/>
 897       <require Tcompiler="ARMCC"/>
 898     </condition>
 899     <condition id="CM33_LE_ARMCC">
 900       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 901       <require condition="CM33_ARMCC"/>
 902       <require Dendian="Little-endian"/>
 903     </condition>
 904     <condition id="CM33_BE_ARMCC">
 905       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 906       <require condition="CM33_ARMCC"/>
 907       <require Dendian="Big-endian"/>
 908     </condition>
 909
 910     <condition id="CM33_DSP_ARMCC">
 911       <description>Cortex-M33 processor based device with DSP extension for the ARM Compiler</description>
 912       <require condition="CM33_DSP"/>
 913       <require Tcompiler="ARMCC"/>
 914     </condition>
 915     <condition id="CM33_DSP_LE_ARMCC">
 916       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the ARM Compiler</description>
 917       <require condition="CM33_DSP_ARMCC"/>
 918       <require Dendian="Little-endian"/>
 919     </condition>
 920     <condition id="CM33_DSP_BE_ARMCC">
 921       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the ARM Compiler</description>
 922       <require condition="CM33_DSP_ARMCC"/>
 923       <require Dendian="Big-endian"/>
 924     </condition>
 925
 926     <condition id="CM33_FP_ARMCC">
 927       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 928       <require condition="CM33_FP"/>
 929       <require Tcompiler="ARMCC"/>
 930     </condition>
 931     <condition id="CM33_FP_LE_ARMCC">
 932       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 933       <require condition="CM33_FP_ARMCC"/>
 934       <require Dendian="Little-endian"/>
 935     </condition>
 936     <condition id="CM33_FP_BE_ARMCC">
 937       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 938       <require condition="CM33_FP_ARMCC"/>
 939       <require Dendian="Big-endian"/>
 940     </condition>
 941
 942     <condition id="CM33_SP_ARMCC">
 943       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 944       <require condition="CM33_SP"/>
 945       <require Tcompiler="ARMCC"/>
 946     </condition>
 947     <condition id="CM33_SP_LE_ARMCC">
 948       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 949       <require condition="CM33_SP_ARMCC"/>
 950       <require Dendian="Little-endian"/>
 951     </condition>
 952     <condition id="CM33_SP_BE_ARMCC">
 953       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 954       <require condition="CM33_SP_ARMCC"/>
 955       <require Dendian="Big-endian"/>
 956     </condition>
 957
 958     <condition id="CM33_DSP_SP_ARMCC">
 959       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
 960       <require condition="CM33_DSP_SP"/>
 961       <require Tcompiler="ARMCC"/>
 962     </condition>
 963     <condition id="CM33_DSP_SP_LE_ARMCC">
 964       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 965       <require condition="CM33_DSP_SP_ARMCC"/>
 966       <require Dendian="Little-endian"/>
 967     </condition>
 968     <condition id="CM33_DSP_SP_BE_ARMCC">
 969       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 970       <require condition="CM33_DSP_SP_ARMCC"/>
 971       <require Dendian="Big-endian"/>
 972     </condition>
 973
 974     <condition id="ARMv8MBL_ARMCC">
 975       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
 976       <require condition="ARMv8MBL"/>
 977       <require Tcompiler="ARMCC"/>
 978     </condition>
 979     <condition id="ARMv8MBL_LE_ARMCC">
 980       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
 981       <require condition="ARMv8MBL_ARMCC"/>
 982       <require Dendian="Little-endian"/>
 983     </condition>
 984     <condition id="ARMv8MBL_BE_ARMCC">
 985       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
 986       <require condition="ARMv8MBL_ARMCC"/>
 987       <require Dendian="Big-endian"/>
 988     </condition>
 989
 990     <condition id="ARMv8MML_ARMCC">
 991       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
 992       <require condition="ARMv8MML"/>
 993       <require Tcompiler="ARMCC"/>
 994     </condition>
 995     <condition id="ARMv8MML_LE_ARMCC">
 996       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
 997       <require condition="ARMv8MML_ARMCC"/>
 998       <require Dendian="Little-endian"/>
 999     </condition>
1000     <condition id="ARMv8MML_BE_ARMCC">
1001       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1002       <require condition="ARMv8MML_ARMCC"/>
1003       <require Dendian="Big-endian"/>
1004     </condition>
1005
1006     <condition id="ARMv8MML_DSP_ARMCC">
1007       <description>ARMv8-M Mainline processor based device with DSP extension for the ARM Compiler</description>
1008       <require condition="ARMv8MML_DSP"/>
1009       <require Tcompiler="ARMCC"/>
1010     </condition>
1011     <condition id="ARMv8MML_DSP_LE_ARMCC">
1012       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the ARM Compiler</description>
1013       <require condition="ARMv8MML_DSP_ARMCC"/>
1014       <require Dendian="Little-endian"/>
1015     </condition>
1016     <condition id="ARMv8MML_DSP_BE_ARMCC">
1017       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the ARM Compiler</description>
1018       <require condition="ARMv8MML_DSP_ARMCC"/>
1019       <require Dendian="Big-endian"/>
1020     </condition>
1021
1022     <condition id="ARMv8MML_FP_ARMCC">
1023       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1024       <require condition="ARMv8MML_FP"/>
1025       <require Tcompiler="ARMCC"/>
1026     </condition>
1027     <condition id="ARMv8MML_FP_LE_ARMCC">
1028       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1029       <require condition="ARMv8MML_FP_ARMCC"/>
1030       <require Dendian="Little-endian"/>
1031     </condition>
1032     <condition id="ARMv8MML_FP_BE_ARMCC">
1033       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1034       <require condition="ARMv8MML_FP_ARMCC"/>
1035       <require Dendian="Big-endian"/>
1036     </condition>
1037
1038     <condition id="ARMv8MML_SP_ARMCC">
1039       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1040       <require condition="ARMv8MML_SP"/>
1041       <require Tcompiler="ARMCC"/>
1042     </condition>
1043     <condition id="ARMv8MML_SP_LE_ARMCC">
1044       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1045       <require condition="ARMv8MML_SP_ARMCC"/>
1046       <require Dendian="Little-endian"/>
1047     </condition>
1048     <condition id="ARMv8MML_SP_BE_ARMCC">
1049       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1050       <require condition="ARMv8MML_SP_ARMCC"/>
1051       <require Dendian="Big-endian"/>
1052     </condition>
1053
1054     <condition id="ARMv8MML_DSP_SP_ARMCC">
1055       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1056       <require condition="ARMv8MML_DSP_SP"/>
1057       <require Tcompiler="ARMCC"/>
1058     </condition>
1059     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1060       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1061       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1062       <require Dendian="Little-endian"/>
1063     </condition>
1064     <condition id="ARMv8MML_DSP_SP_BE_ARMCC">
1065       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1066       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1067       <require Dendian="Big-endian"/>
1068     </condition>
1069
1070     <condition id="ARMv8MML_DP_ARMCC">
1071       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1072       <require condition="ARMv8MML_DP"/>
1073       <require Tcompiler="ARMCC"/>
1074     </condition>
1075     <condition id="ARMv8MML_DP_LE_ARMCC">
1076       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1077       <require condition="ARMv8MML_DP_ARMCC"/>
1078       <require Dendian="Little-endian"/>
1079     </condition>
1080     <condition id="ARMv8MML_DP_BE_ARMCC">
1081       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1082       <require condition="ARMv8MML_DP_ARMCC"/>
1083       <require Dendian="Big-endian"/>
1084     </condition>
1085
1086     <condition id="ARMv8MML_DSP_DP_ARMCC">
1087       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the ARM Compiler</description>
1088       <require condition="ARMv8MML_DSP_DP"/>
1089       <require Tcompiler="ARMCC"/>
1090     </condition>
1091     <condition id="ARMv8MML_DSP_DP_LE_ARMCC">
1092       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1093       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1094       <require Dendian="Little-endian"/>
1095     </condition>
1096     <condition id="ARMv8MML_DSP_DP_BE_ARMCC">
1097       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1098       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1099       <require Dendian="Big-endian"/>
1100     </condition>
1101
1102     <!-- GCC compiler -->
1103     <condition id="CM0_GCC">
1104       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1105       <require condition="CM0"/>
1106       <require Tcompiler="GCC"/>
1107     </condition>
1108     <condition id="CM0_LE_GCC">
1109       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1110       <require condition="CM0_GCC"/>
1111       <require Dendian="Little-endian"/>
1112     </condition>
1113     <condition id="CM0_BE_GCC">
1114       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1115       <require condition="CM0_GCC"/>
1116       <require Dendian="Big-endian"/>
1117     </condition>
1118
1119     <condition id="CM3_GCC">
1120       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1121       <require condition="CM3"/>
1122       <require Tcompiler="GCC"/>
1123     </condition>
1124     <condition id="CM3_LE_GCC">
1125       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1126       <require condition="CM3_GCC"/>
1127       <require Dendian="Little-endian"/>
1128     </condition>
1129     <condition id="CM3_BE_GCC">
1130       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1131       <require condition="CM3_GCC"/>
1132       <require Dendian="Big-endian"/>
1133     </condition>
1134
1135     <condition id="CM4_GCC">
1136       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1137       <require condition="CM4"/>
1138       <require Tcompiler="GCC"/>
1139     </condition>
1140     <condition id="CM4_LE_GCC">
1141       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1142       <require condition="CM4_GCC"/>
1143       <require Dendian="Little-endian"/>
1144     </condition>
1145     <condition id="CM4_BE_GCC">
1146       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1147       <require condition="CM4_GCC"/>
1148       <require Dendian="Big-endian"/>
1149     </condition>
1150
1151     <condition id="CM4_FP_GCC">
1152       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1153       <require condition="CM4_FP"/>
1154       <require Tcompiler="GCC"/>
1155     </condition>
1156     <condition id="CM4_FP_LE_GCC">
1157       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1158       <require condition="CM4_FP_GCC"/>
1159       <require Dendian="Little-endian"/>
1160     </condition>
1161     <condition id="CM4_FP_BE_GCC">
1162       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1163       <require condition="CM4_FP_GCC"/>
1164       <require Dendian="Big-endian"/>
1165     </condition>
1166
1167     <!-- XMC 4000 Series devices from Infineon require a special library -->
1168     <condition id="CM4_LE_GCC_STD">
1169       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1170       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1171       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1172       <require Tcompiler="GCC"/>
1173     </condition>
1174     <condition id="CM4_LE_GCC_IFX">
1175       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1176       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1177       <require Tcompiler="GCC"/>
1178     </condition>
1179     <condition id="CM4_FP_LE_GCC_STD">
1180       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1181       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1182       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1183       <require Tcompiler="GCC"/>
1184     </condition>
1185     <condition id="CM4_FP_LE_GCC_IFX">
1186       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1187       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1188       <require Tcompiler="GCC"/>
1189     </condition>
1190
1191     <condition id="CM7_GCC">
1192       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1193       <require condition="CM7"/>
1194       <require Tcompiler="GCC"/>
1195     </condition>
1196     <condition id="CM7_LE_GCC">
1197       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1198       <require condition="CM7_GCC"/>
1199       <require Dendian="Little-endian"/>
1200     </condition>
1201     <condition id="CM7_BE_GCC">
1202       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1203       <require condition="CM7_GCC"/>
1204       <require Dendian="Big-endian"/>
1205     </condition>
1206
1207     <condition id="CM7_FP_GCC">
1208       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1209       <require condition="CM7_FP"/>
1210       <require Tcompiler="GCC"/>
1211     </condition>
1212     <condition id="CM7_FP_LE_GCC">
1213       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1214       <require condition="CM7_FP_GCC"/>
1215       <require Dendian="Little-endian"/>
1216     </condition>
1217     <condition id="CM7_FP_BE_GCC">
1218       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1219       <require condition="CM7_FP_GCC"/>
1220       <require Dendian="Big-endian"/>
1221     </condition>
1222
1223     <condition id="CM7_SP_GCC">
1224       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1225       <require condition="CM7_SP"/>
1226       <require Tcompiler="GCC"/>
1227     </condition>
1228     <condition id="CM7_SP_LE_GCC">
1229       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1230       <require condition="CM7_SP_GCC"/>
1231       <require Dendian="Little-endian"/>
1232     </condition>
1233     <condition id="CM7_SP_BE_GCC">
1234       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1235       <require condition="CM7_SP_GCC"/>
1236       <require Dendian="Big-endian"/>
1237     </condition>
1238
1239     <condition id="CM7_DP_GCC">
1240       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1241       <require condition="CM7_DP"/>
1242       <require Tcompiler="GCC"/>
1243     </condition>
1244     <condition id="CM7_DP_LE_GCC">
1245       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1246       <require condition="CM7_DP_GCC"/>
1247       <require Dendian="Little-endian"/>
1248     </condition>
1249     <condition id="CM7_DP_BE_GCC">
1250       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1251       <require condition="CM7_DP_GCC"/>
1252       <require Dendian="Big-endian"/>
1253     </condition>
1254
1255     <condition id="CM23_GCC">
1256       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1257       <require condition="CM23"/>
1258       <require Tcompiler="GCC"/>
1259     </condition>
1260     <condition id="CM23_LE_GCC">
1261       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1262       <require condition="CM23_GCC"/>
1263       <require Dendian="Little-endian"/>
1264     </condition>
1265     <condition id="CM23_BE_GCC">
1266       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1267       <require condition="CM23_GCC"/>
1268       <require Dendian="Big-endian"/>
1269     </condition>
1270
1271     <condition id="CM33_GCC">
1272       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1273       <require condition="CM33"/>
1274       <require Tcompiler="GCC"/>
1275     </condition>
1276     <condition id="CM33_LE_GCC">
1277       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1278       <require condition="CM33_GCC"/>
1279       <require Dendian="Little-endian"/>
1280     </condition>
1281     <condition id="CM33_BE_GCC">
1282       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1283       <require condition="CM33_GCC"/>
1284       <require Dendian="Big-endian"/>
1285     </condition>
1286
1287     <condition id="CM33_DSP_GCC">
1288       <description>Cortex-M33 processor based device with DSP extension for the GCC Compiler</description>
1289       <require condition="CM33_DSP"/>
1290       <require Tcompiler="GCC"/>
1291     </condition>
1292     <condition id="CM33_DSP_LE_GCC">
1293       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1294       <require condition="CM33_DSP_GCC"/>
1295       <require Dendian="Little-endian"/>
1296     </condition>
1297     <condition id="CM33_DSP_BE_GCC">
1298       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1299       <require condition="CM33_DSP_GCC"/>
1300       <require Dendian="Big-endian"/>
1301     </condition>
1302
1303     <condition id="CM33_FP_GCC">
1304       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1305       <require condition="CM33_FP"/>
1306       <require Tcompiler="GCC"/>
1307     </condition>
1308     <condition id="CM33_FP_LE_GCC">
1309       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1310       <require condition="CM33_FP_GCC"/>
1311       <require Dendian="Little-endian"/>
1312     </condition>
1313     <condition id="CM33_FP_BE_GCC">
1314       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1315       <require condition="CM33_FP_GCC"/>
1316       <require Dendian="Big-endian"/>
1317     </condition>
1318
1319     <condition id="CM33_SP_GCC">
1320       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1321       <require condition="CM33_SP"/>
1322       <require Tcompiler="GCC"/>
1323     </condition>
1324     <condition id="CM33_SP_LE_GCC">
1325       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1326       <require condition="CM33_SP_GCC"/>
1327       <require Dendian="Little-endian"/>
1328     </condition>
1329     <condition id="CM33_SP_BE_GCC">
1330       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1331       <require condition="CM33_SP_GCC"/>
1332       <require Dendian="Big-endian"/>
1333     </condition>
1334
1335     <condition id="CM33_DSP_SP_GCC">
1336       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1337       <require condition="CM33_DSP_SP"/>
1338       <require Tcompiler="GCC"/>
1339     </condition>
1340     <condition id="CM33_DSP_SP_LE_GCC">
1341       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1342       <require condition="CM33_DSP_SP_GCC"/>
1343       <require Dendian="Little-endian"/>
1344     </condition>
1345     <condition id="CM33_DSP_SP_BE_GCC">
1346       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1347       <require condition="CM33_DSP_SP_GCC"/>
1348       <require Dendian="Big-endian"/>
1349     </condition>
1350
1351     <condition id="ARMv8MBL_GCC">
1352       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1353       <require condition="ARMv8MBL"/>
1354       <require Tcompiler="GCC"/>
1355     </condition>
1356     <condition id="ARMv8MBL_LE_GCC">
1357       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1358       <require condition="ARMv8MBL_GCC"/>
1359       <require Dendian="Little-endian"/>
1360     </condition>
1361     <condition id="ARMv8MBL_BE_GCC">
1362       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1363       <require condition="ARMv8MBL_GCC"/>
1364       <require Dendian="Big-endian"/>
1365     </condition>
1366
1367     <condition id="ARMv8MML_GCC">
1368       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1369       <require condition="ARMv8MML"/>
1370       <require Tcompiler="GCC"/>
1371     </condition>
1372     <condition id="ARMv8MML_LE_GCC">
1373       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1374       <require condition="ARMv8MML_GCC"/>
1375       <require Dendian="Little-endian"/>
1376     </condition>
1377     <condition id="ARMv8MML_BE_GCC">
1378       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1379       <require condition="ARMv8MML_GCC"/>
1380       <require Dendian="Big-endian"/>
1381     </condition>
1382
1383     <condition id="ARMv8MML_DSP_GCC">
1384       <description>ARMv8-M Mainline processor based device with DSP extension for the GCC Compiler</description>
1385       <require condition="ARMv8MML_DSP"/>
1386       <require Tcompiler="GCC"/>
1387     </condition>
1388     <condition id="ARMv8MML_DSP_LE_GCC">
1389       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1390       <require condition="ARMv8MML_DSP_GCC"/>
1391       <require Dendian="Little-endian"/>
1392     </condition>
1393     <condition id="ARMv8MML_DSP_BE_GCC">
1394       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1395       <require condition="ARMv8MML_DSP_GCC"/>
1396       <require Dendian="Big-endian"/>
1397     </condition>
1398
1399     <condition id="ARMv8MML_FP_GCC">
1400       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1401       <require condition="ARMv8MML_FP"/>
1402       <require Tcompiler="GCC"/>
1403     </condition>
1404     <condition id="ARMv8MML_FP_LE_GCC">
1405       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1406       <require condition="ARMv8MML_FP_GCC"/>
1407       <require Dendian="Little-endian"/>
1408     </condition>
1409     <condition id="ARMv8MML_FP_BE_GCC">
1410       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1411       <require condition="ARMv8MML_FP_GCC"/>
1412       <require Dendian="Big-endian"/>
1413     </condition>
1414
1415     <condition id="ARMv8MML_SP_GCC">
1416       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1417       <require condition="ARMv8MML_SP"/>
1418       <require Tcompiler="GCC"/>
1419     </condition>
1420     <condition id="ARMv8MML_SP_LE_GCC">
1421       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1422       <require condition="ARMv8MML_SP_GCC"/>
1423       <require Dendian="Little-endian"/>
1424     </condition>
1425     <condition id="ARMv8MML_SP_BE_GCC">
1426       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1427       <require condition="ARMv8MML_SP_GCC"/>
1428       <require Dendian="Big-endian"/>
1429     </condition>
1430
1431     <condition id="ARMv8MML_DSP_SP_GCC">
1432       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1433       <require condition="ARMv8MML_DSP_SP"/>
1434       <require Tcompiler="GCC"/>
1435     </condition>
1436     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1437       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1438       <require condition="ARMv8MML_DSP_SP_GCC"/>
1439       <require Dendian="Little-endian"/>
1440     </condition>
1441     <condition id="ARMv8MML_DSP_SP_BE_GCC">
1442       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1443       <require condition="ARMv8MML_DSP_SP_GCC"/>
1444       <require Dendian="Big-endian"/>
1445     </condition>
1446
1447     <condition id="ARMv8MML_DP_GCC">
1448       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1449       <require condition="ARMv8MML_DP"/>
1450       <require Tcompiler="GCC"/>
1451     </condition>
1452     <condition id="ARMv8MML_DP_LE_GCC">
1453       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1454       <require condition="ARMv8MML_DP_GCC"/>
1455       <require Dendian="Little-endian"/>
1456     </condition>
1457     <condition id="ARMv8MML_DP_BE_GCC">
1458       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1459       <require condition="ARMv8MML_DP_GCC"/>
1460       <require Dendian="Big-endian"/>
1461     </condition>
1462
1463     <condition id="ARMv8MML_DSP_DP_GCC">
1464       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the GCC Compiler</description>
1465       <require condition="ARMv8MML_DSP_DP"/>
1466       <require Tcompiler="GCC"/>
1467     </condition>
1468     <condition id="ARMv8MML_DSP_DP_LE_GCC">
1469       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1470       <require condition="ARMv8MML_DSP_DP_GCC"/>
1471       <require Dendian="Little-endian"/>
1472     </condition>
1473     <condition id="ARMv8MML_DSP_DP_BE_GCC">
1474       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1475       <require condition="ARMv8MML_DSP_DP_GCC"/>
1476       <require Dendian="Big-endian"/>
1477     </condition>
1478
1479     <!-- IAR compiler -->
1480     <condition id="CM0_IAR">
1481       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1482       <require condition="CM0"/>
1483       <require Tcompiler="IAR"/>
1484     </condition>
1485     <condition id="CM0_LE_IAR">
1486       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1487       <require condition="CM0_IAR"/>
1488       <require Dendian="Little-endian"/>
1489     </condition>
1490     <condition id="CM0_BE_IAR">
1491       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1492       <require condition="CM0_IAR"/>
1493       <require Dendian="Big-endian"/>
1494     </condition>
1495
1496     <condition id="CM3_IAR">
1497       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1498       <require condition="CM3"/>
1499       <require Tcompiler="IAR"/>
1500     </condition>
1501     <condition id="CM3_LE_IAR">
1502       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1503       <require condition="CM3_IAR"/>
1504       <require Dendian="Little-endian"/>
1505     </condition>
1506     <condition id="CM3_BE_IAR">
1507       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1508       <require condition="CM3_IAR"/>
1509       <require Dendian="Big-endian"/>
1510     </condition>
1511
1512     <condition id="CM4_IAR">
1513       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1514       <require condition="CM4"/>
1515       <require Tcompiler="IAR"/>
1516     </condition>
1517     <condition id="CM4_LE_IAR">
1518       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1519       <require condition="CM4_IAR"/>
1520       <require Dendian="Little-endian"/>
1521     </condition>
1522     <condition id="CM4_BE_IAR">
1523       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1524       <require condition="CM4_IAR"/>
1525       <require Dendian="Big-endian"/>
1526     </condition>
1527
1528     <condition id="CM4_FP_IAR">
1529       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1530       <require condition="CM4_FP"/>
1531       <require Tcompiler="IAR"/>
1532     </condition>
1533     <condition id="CM4_FP_LE_IAR">
1534       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1535       <require condition="CM4_FP_IAR"/>
1536       <require Dendian="Little-endian"/>
1537     </condition>
1538     <condition id="CM4_FP_BE_IAR">
1539       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1540       <require condition="CM4_FP_IAR"/>
1541       <require Dendian="Big-endian"/>
1542     </condition>
1543
1544     <condition id="CM7_IAR">
1545       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1546       <require condition="CM7"/>
1547       <require Tcompiler="IAR"/>
1548     </condition>
1549     <condition id="CM7_LE_IAR">
1550       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1551       <require condition="CM7_IAR"/>
1552       <require Dendian="Little-endian"/>
1553     </condition>
1554     <condition id="CM7_BE_IAR">
1555       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1556       <require condition="CM7_IAR"/>
1557       <require Dendian="Big-endian"/>
1558     </condition>
1559
1560     <condition id="CM7_FP_IAR">
1561       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1562       <require condition="CM7_FP"/>
1563       <require Tcompiler="IAR"/>
1564     </condition>
1565     <condition id="CM7_FP_LE_IAR">
1566       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1567       <require condition="CM7_FP_IAR"/>
1568       <require Dendian="Little-endian"/>
1569     </condition>
1570     <condition id="CM7_FP_BE_IAR">
1571       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1572       <require condition="CM7_FP_IAR"/>
1573       <require Dendian="Big-endian"/>
1574     </condition>
1575
1576     <condition id="CM7_SP_IAR">
1577       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1578       <require condition="CM7_SP"/>
1579       <require Tcompiler="IAR"/>
1580     </condition>
1581     <condition id="CM7_SP_LE_IAR">
1582       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1583       <require condition="CM7_SP_IAR"/>
1584       <require Dendian="Little-endian"/>
1585     </condition>
1586     <condition id="CM7_SP_BE_IAR">
1587       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1588       <require condition="CM7_SP_IAR"/>
1589       <require Dendian="Big-endian"/>
1590     </condition>
1591
1592     <condition id="CM7_DP_IAR">
1593       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1594       <require condition="CM7_DP"/>
1595       <require Tcompiler="IAR"/>
1596     </condition>
1597     <condition id="CM7_DP_LE_IAR">
1598       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1599       <require condition="CM7_DP_IAR"/>
1600       <require Dendian="Little-endian"/>
1601     </condition>
1602     <condition id="CM7_DP_BE_IAR">
1603       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1604       <require condition="CM7_DP_IAR"/>
1605       <require Dendian="Big-endian"/>
1606     </condition>
1607
1608     <!-- conditions selecting single devices and CMSIS Core -->
1609     <!-- used for component startup, GCC version is used for C-Startup -->
1610     <condition id="ARMCM0 CMSIS">
1611       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1612       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1613       <require Cclass="CMSIS" Cgroup="CORE"/>
1614     </condition>
1615     <condition id="ARMCM0 CMSIS GCC">
1616       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1617       <require condition="ARMCM0 CMSIS"/>
1618       <require condition="GCC"/>
1619     </condition>
1620
1621     <condition id="ARMCM0+ CMSIS">
1622       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1623       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1624       <require Cclass="CMSIS" Cgroup="CORE"/>
1625     </condition>
1626     <condition id="ARMCM0+ CMSIS GCC">
1627       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1628       <require condition="ARMCM0+ CMSIS"/>
1629       <require condition="GCC"/>
1630     </condition>
1631
1632     <condition id="ARMCM3 CMSIS">
1633       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1634       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1635       <require Cclass="CMSIS" Cgroup="CORE"/>
1636     </condition>
1637     <condition id="ARMCM3 CMSIS GCC">
1638       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1639       <require condition="ARMCM3 CMSIS"/>
1640       <require condition="GCC"/>
1641     </condition>
1642
1643     <condition id="ARMCM4 CMSIS">
1644       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1645       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1646       <require Cclass="CMSIS" Cgroup="CORE"/>
1647     </condition>
1648     <condition id="ARMCM4 CMSIS GCC">
1649       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1650       <require condition="ARMCM4 CMSIS"/>
1651       <require condition="GCC"/>
1652     </condition>
1653
1654     <condition id="ARMCM7 CMSIS">
1655       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1656       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1657       <require Cclass="CMSIS" Cgroup="CORE"/>
1658     </condition>
1659     <condition id="ARMCM7 CMSIS GCC">
1660       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1661       <require condition="ARMCM7 CMSIS"/>
1662       <require condition="GCC"/>
1663     </condition>
1664
1665     <condition id="ARMCM23 CMSIS">
1666       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1667       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1668       <require Cclass="CMSIS" Cgroup="CORE"/>
1669     </condition>
1670     <condition id="ARMCM23 CMSIS GCC">
1671       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1672       <require condition="ARMCM23 CMSIS"/>
1673       <require condition="GCC"/>
1674     </condition>
1675
1676     <condition id="ARMCM33 CMSIS">
1677       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1678       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1679       <require Cclass="CMSIS" Cgroup="CORE"/>
1680     </condition>
1681     <condition id="ARMCM33 CMSIS GCC">
1682       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1683       <require condition="ARMCM33 CMSIS"/>
1684       <require condition="GCC"/>
1685     </condition>
1686
1687     <condition id="ARMSC000 CMSIS">
1688       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1689       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1690       <require Cclass="CMSIS" Cgroup="CORE"/>
1691     </condition>
1692     <condition id="ARMSC000 CMSIS GCC">
1693       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1694       <require condition="ARMSC000 CMSIS"/>
1695       <require condition="GCC"/>
1696     </condition>
1697
1698     <condition id="ARMSC300 CMSIS">
1699       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1700       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1701       <require Cclass="CMSIS" Cgroup="CORE"/>
1702     </condition>
1703     <condition id="ARMSC300 CMSIS GCC">
1704       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1705       <require condition="ARMSC300 CMSIS"/>
1706       <require condition="GCC"/>
1707     </condition>
1708
1709     <condition id="ARMv8MBL CMSIS">
1710       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1711       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1712       <require Cclass="CMSIS" Cgroup="CORE"/>
1713     </condition>
1714     <condition id="ARMv8MBL CMSIS GCC">
1715       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1716       <require condition="ARMv8MBL CMSIS"/>
1717       <require condition="GCC"/>
1718     </condition>
1719
1720     <condition id="ARMv8MML CMSIS">
1721       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1722       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1723       <require Cclass="CMSIS" Cgroup="CORE"/>
1724     </condition>
1725     <condition id="ARMv8MML CMSIS GCC">
1726       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1727       <require condition="ARMv8MML CMSIS"/>
1728       <require condition="GCC"/>
1729     </condition>
1730
1731     <!-- CMSIS DSP -->
1732     <condition id="CMSIS DSP">
1733       <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
1734       <require condition="ARMv6_7-M Device"/>
1735       <require Cclass="CMSIS" Cgroup="CORE"/>
1736       <require condition="ARMCC GCC"/>
1737     </condition>
1738
1739     <!-- RTOS RTX -->
1740     <condition id="RTOS RTX">
1741       <description>Components required for RTOS RTX</description>
1742       <require condition="ARMv6_7-M Device"/>
1743       <require condition="ARMCC GCC IAR"/>
1744       <require Cclass="Device" Cgroup="Startup"/>
1745       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1746     </condition>
1747     <condition id="RTOS RTX5">
1748       <description>Components required for RTOS RTX5</description>
1749       <require condition="ARMv6_7_8-M Device"/>
1750       <require condition="ARMCC GCC IAR"/>
1751       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1752     </condition>
1753     <condition id="RTOS2 RTX5">
1754       <description>Components required for RTOS2 RTX5</description>
1755       <require condition="ARMv6_7_8-M Device"/>
1756       <require condition="ARMCC GCC IAR"/>
1757       <require Cclass="CMSIS"  Cgroup="CORE"/>
1758       <require Cclass="Device" Cgroup="Startup"/>
1759     </condition>
1760     <condition id="RTOS2 RTX5 NS">
1761       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1762       <require condition="ARMv8-M TZ Device"/>
1763       <require condition="ARMCC GCC"/>
1764       <require Cclass="CMSIS"  Cgroup="CORE"/>
1765       <require Cclass="Device" Cgroup="Startup"/>
1766     </condition>
1767
1768   </conditions>
1769
1770   <components>
1771     <!-- CMSIS-Core component -->
1772     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0"  condition="ARMv6_7_8-M Device" >
1773       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1774       <files>
1775         <!-- CPU independent -->
1776         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1777         <file category="include" name="CMSIS/Include/"/>
1778         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1779         <!-- Code template -->
1780         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1781         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1782       </files>
1783     </component>
1784
1785     <!-- CMSIS-Startup components -->
1786     <!-- Cortex-M0 -->
1787     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1788       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1789       <files>
1790         <!-- include folder / device header file -->
1791         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1792         <!-- startup / system file -->
1793         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1794         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1795         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1796         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1797         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1798       </files>
1799     </component>
1800     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1801       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1802       <files>
1803         <!-- include folder / device header file -->
1804         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1805         <!-- startup / system file -->
1806         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1807         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1808         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1809       </files>
1810     </component>
1811
1812     <!-- Cortex-M0+ -->
1813     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1814       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1815       <files>
1816         <!-- include folder / device header file -->
1817         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1818         <!-- startup / system file -->
1819         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1820         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1821         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1822         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1823         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1824       </files>
1825     </component>
1826     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1827       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1828       <files>
1829         <!-- include folder / device header file -->
1830         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1831         <!-- startup / system file -->
1832         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1833         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1834         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1835       </files>
1836     </component>
1837
1838     <!-- Cortex-M3 -->
1839     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1840       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1841       <files>
1842         <!-- include folder / device header file -->
1843         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1844         <!-- startup / system file -->
1845         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1846         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1847         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1848         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1849         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1850       </files>
1851     </component>
1852     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1853       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1854       <files>
1855         <!-- include folder / device header file -->
1856         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1857         <!-- startup / system file -->
1858         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1859         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1860         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1861       </files>
1862     </component>
1863
1864     <!-- Cortex-M4 -->
1865     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1866       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1867       <files>
1868         <!-- include folder / device header file -->
1869         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1870         <!-- startup / system file -->
1871         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1872         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1873         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1874         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1875         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1876       </files>
1877     </component>
1878     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1879       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1880       <files>
1881         <!-- include folder / device header file -->
1882         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1883         <!-- startup / system file -->
1884         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1885         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1886         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1887       </files>
1888     </component>
1889
1890     <!-- Cortex-M7 -->
1891     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1892       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1893       <files>
1894         <!-- include folder / device header file -->
1895         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1896         <!-- startup / system file -->
1897         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1898         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1899         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1900         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1901         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1902       </files>
1903     </component>
1904     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1905       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1906       <files>
1907         <!-- include folder / device header file -->
1908         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1909         <!-- startup / system file -->
1910         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1911         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1912         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1913       </files>
1914     </component>
1915
1916     <!-- Cortex-M23 -->
1917     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1918       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1919       <files>
1920         <!-- include folder / device header file -->
1921         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1922         <!-- startup / system file -->
1923         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1924         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1925         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1926         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1927         <!-- SAU configuration -->
1928         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1929       </files>
1930     </component>
1931     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1932       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1933       <files>
1934         <!-- include folder / device header file -->
1935         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1936         <!-- startup / system file -->
1937         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1938         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1939         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1940         <!-- SAU configuration -->
1941         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1942       </files>
1943     </component>
1944
1945     <!-- Cortex-M33 -->
1946     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
1947       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1948       <files>
1949         <!-- include folder / device header file -->
1950         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1951         <!-- startup / system file -->
1952         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
1953         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
1954         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1955         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
1956         <!-- SAU configuration -->
1957         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1958       </files>
1959     </component>
1960     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
1961       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1962       <files>
1963         <!-- include folder / device header file -->
1964         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1965         <!-- startup / system file -->
1966         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
1967         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1968         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
1969         <!-- SAU configuration -->
1970         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1971       </files>
1972     </component>
1973
1974     <!-- Cortex-SC000 -->
1975     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
1976       <description>System and Startup for Generic ARM SC000 device</description>
1977       <files>
1978         <!-- include folder / device header file -->
1979         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1980         <!-- startup / system file -->
1981         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1982         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1983         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1984         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1985         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1986       </files>
1987     </component>
1988     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1989       <description>System and Startup for Generic ARM SC000 device</description>
1990       <files>
1991         <!-- include folder / device header file -->
1992         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1993         <!-- startup / system file -->
1994         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1995         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1996         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1997       </files>
1998     </component>
1999
2000     <!-- Cortex-SC300 -->
2001     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2002       <description>System and Startup for Generic ARM SC300 device</description>
2003       <files>
2004         <!-- include folder / device header file -->
2005         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2006         <!-- startup / system file -->
2007         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2008         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2009         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2010         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2011         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2012       </files>
2013     </component>
2014     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2015       <description>System and Startup for Generic ARM SC300 device</description>
2016       <files>
2017         <!-- include folder / device header file -->
2018         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2019         <!-- startup / system file -->
2020         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2021         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2022         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2023       </files>
2024     </component>
2025
2026     <!-- ARMv8MBL -->
2027     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2028       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2029       <files>
2030         <!-- include folder / device header file -->
2031         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2032         <!-- startup / system file -->
2033         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2034         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2035         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2036         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2037         <!-- SAU configuration -->
2038         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2039       </files>
2040     </component>
2041     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2042       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2043       <files>
2044         <!-- include folder / device header file -->
2045         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2046         <!-- startup / system file -->
2047         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2048         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2049         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2050         <!-- SAU configuration -->
2051         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2052       </files>
2053     </component>
2054
2055     <!-- ARMv8MML -->
2056     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2057       <description>System and Startup for Generic ARM ARMv8MML device</description>
2058       <files>
2059         <!-- include folder / device header file -->
2060         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2061         <!-- startup / system file -->
2062         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2063         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2064         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2065         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2066         <!-- SAU configuration -->
2067         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2068       </files>
2069     </component>
2070     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2071       <description>System and Startup for Generic ARM ARMv8MML device</description>
2072       <files>
2073         <!-- include folder / device header file -->
2074         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2075         <!-- startup / system file -->
2076         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2077         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2078         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2079         <!-- SAU configuration -->
2080         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2081       </files>
2082     </component>
2083
2084
2085     <!-- CMSIS-DSP component -->
2086     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.0" condition="CMSIS DSP">
2087       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2088       <files>
2089         <!-- CPU independent -->
2090         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2091         <file category="header" name="CMSIS/Include/arm_math.h"/>
2092
2093         <!-- CPU and Compiler dependent -->
2094         <!-- ARMCC -->
2095         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2096         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2097         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2098         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2099         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2100         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2101         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2102         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2103         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2104         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2105         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2106         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2107         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2108         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2109 <!--
2110         <file category="library" condition="CM23_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2111         <file category="library" condition="CM33_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2112         <file category="library" condition="CM33_DSP_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2113         <file category="library" condition="CM33_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2114         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2115         <file category="library" condition="ARMv8MBL_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2116         <file category="library" condition="ARMv8MML_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2117         <file category="library" condition="ARMv8MML_DSP_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2118         <file category="library" condition="ARMv8MML_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2119         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2120 -->
2121         <!-- GCC -->
2122         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2123         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2124         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2125         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2126         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2127         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2128         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2129 <!--
2130         <file category="library" condition="CM23_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2131         <file category="library" condition="CM33_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2132         <file category="library" condition="CM33_DSP_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2133         <file category="library" condition="CM33_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2134         <file category="library" condition="CM33_DSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2135         <file category="library" condition="ARMv8MBL_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2136         <file category="library" condition="ARMv8MML_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2137         <file category="library" condition="ARMv8MML_DSP_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2138         <file category="library" condition="ARMv8MML_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2139         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"   name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2140 -->
2141       </files>
2142     </component>
2143
2144     <!-- CMSIS-RTOS Keil RTX component -->
2145     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
2146       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2147       <RTE_Components_h>
2148         <!-- the following content goes into file 'RTE_Components.h' -->
2149         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2150         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2151       </RTE_Components_h>
2152       <files>
2153         <!-- CPU independent -->
2154         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2155         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2156         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2157
2158         <!-- RTX templates -->
2159         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2160         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2161         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2162         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2163         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2164         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2165         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2166         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2167         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2168         <!-- tool-chain specific template file -->
2169         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2170         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2171         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2172
2173         <!-- CPU and Compiler dependent -->
2174         <!-- ARMCC -->
2175         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2176         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2177         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2178         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2179         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2180         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2181         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2182         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2183         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2184         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2185         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2186         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2187         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2188         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2189         <!-- GCC -->
2190         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2191         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2192         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2193         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2194         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2195         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2196         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2197         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2198         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2199         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2200         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2201         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2202         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2203         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2204         <!-- IAR -->
2205         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2206         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2207         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2208         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2209         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2210         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2211         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2212         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2213         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2214         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2215         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2216         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2217       </files>
2218     </component>
2219
2220     <!-- CMSIS-RTOS Keil RTX5 component -->
2221     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.1.0" Capiversion="1.0" condition="RTOS RTX5">
2222       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2223       <RTE_Components_h>
2224         <!-- the following content goes into file 'RTE_Components.h' -->
2225         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2226         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2227       </RTE_Components_h>
2228       <files>
2229         <!-- RTX header file -->
2230         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2231         <!-- RTX compatibility module for API V1 -->
2232         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2233       </files>
2234     </component>
2235
2236     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2237     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5">
2238       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2239       <RTE_Components_h>
2240         <!-- the following content goes into file 'RTE_Components.h' -->
2241         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2242         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2243       </RTE_Components_h>
2244       <files>
2245         <!-- RTX documentation -->
2246         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2247
2248         <!-- RTX header files -->
2249         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2250         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2251
2252         <!-- RTX configuration -->
2253         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2254         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2255
2256         <!-- RTX templates -->
2257         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2258         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2259         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2260         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2261         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2262         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2263         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2264         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2265         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2266
2267         <!-- RTX library configuration -->
2268         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2269
2270         <!-- RTX libraries (CPU and Compiler dependent) -->
2271         <!-- ARMCC -->
2272         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2273         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2274         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2275         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2276         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2277         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2278         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2279         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2280         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2281         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2282         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2283         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2284         <!-- GCC -->
2285         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2286         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2287         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2288         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2289         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2290         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2291         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2292         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2293         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2294         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2295         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2296         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2297         <!-- IAR -->
2298         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2299         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2300         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2301         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2302         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2303         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2304       </files>
2305     </component>
2306     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5 NS">
2307       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2308       <RTE_Components_h>
2309         <!-- the following content goes into file 'RTE_Components.h' -->
2310         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2311         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2312         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2313       </RTE_Components_h>
2314       <files>
2315         <!-- RTX documentation -->
2316         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2317
2318         <!-- RTX header files -->
2319         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2320         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2321
2322         <!-- RTX configuration -->
2323         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2324         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2325
2326         <!-- RTX templates -->
2327         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2328         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2329         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2330         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2331         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2332         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2333         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2334         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2335         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2336
2337         <!-- RTX library configuration -->
2338         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2339
2340         <!-- RTX libraries (CPU and Compiler dependent) -->
2341         <!-- ARMCC -->
2342         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2343         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2344         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2345         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2346         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2347         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2348         <!-- GCC -->
2349         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2350         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2351         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2352         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2353         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2354         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2355       </files>
2356     </component>
2357     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5">
2358       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2359       <RTE_Components_h>
2360         <!-- the following content goes into file 'RTE_Components.h' -->
2361         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2362         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2363         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2364       </RTE_Components_h>
2365       <files>
2366         <!-- RTX documentation -->
2367         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2368
2369         <!-- RTX header files -->
2370         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2371         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2372
2373         <!-- RTX configuration -->
2374         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2375         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2376
2377         <!-- RTX templates -->
2378         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2379         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2380         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2381         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2382         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2383         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2384         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2385         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2386         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2387
2388         <!-- RTX sources (core) -->
2389         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2390         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2391         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2392         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2393         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2394         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2395         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2396         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2397         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2398         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2399         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2400         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2401         <!-- RTX sources (library configuration) -->
2402         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2403         <!-- RTX sources (handlers ARMCC) -->
2404         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2405         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2406         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2407         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2408         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2409         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2410         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2411         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2412         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2413         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2414         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2415         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2416         <!-- RTX sources (handlers GCC) -->
2417         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2418         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2419         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2420         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2421         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2422         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2423         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2424         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2425         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2426         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2427         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2428         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2429         <!-- RTX sources (handlers IAR) -->
2430         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2431         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2432         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2433         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2434         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2435         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2436       </files>
2437     </component>
2438     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5 NS">
2439       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2440       <RTE_Components_h>
2441         <!-- the following content goes into file 'RTE_Components.h' -->
2442         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2443         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2444         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2445         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2446       </RTE_Components_h>
2447       <files>
2448         <!-- RTX documentation -->
2449         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2450
2451         <!-- RTX header files -->
2452         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2453         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2454
2455         <!-- RTX configuration -->
2456         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2457         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2458
2459         <!-- RTX templates -->
2460         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2461         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2462         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2463         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2464         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2465         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2466         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2467         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2468         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2469
2470         <!-- RTX sources (core) -->
2471         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2472         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2473         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2474         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2475         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2476         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2477         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2478         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2479         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2480         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2481         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2482         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2483         <!-- RTX sources (library configuration) -->
2484         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2485         <!-- RTX sources (ARMCC handlers) -->
2486         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2487         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2488         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2489         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2490         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2491         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2492         <!-- RTX sources (GCC handlers) -->
2493         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2494         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2495         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2496         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2497         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2498         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2499       </files>
2500     </component>
2501
2502   </components>
2503
2504   <boards>
2505     <board name="uVision Simulator" vendor="Keil">
2506       <description>uVision Simulator</description>
2507       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2508       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2509       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2510       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2511       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2512       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2513       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2514       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2515       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2516       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2517       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2518       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2519       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2520       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2521       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2522       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2523       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2524    </board>
2525   </boards>
2526
2527   <examples>
2528     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2529       <description>DSP_Lib Class Marks example</description>
2530       <board name="uVision Simulator" vendor="Keil"/>
2531       <project>
2532         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2533       </project>
2534       <attributes>
2535         <component Cclass="CMSIS" Cgroup="CORE"/>
2536         <component Cclass="CMSIS" Cgroup="DSP"/>
2537         <component Cclass="Device" Cgroup="Startup"/>
2538         <category>Getting Started</category>
2539       </attributes>
2540     </example>
2541
2542     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2543       <description>DSP_Lib Convolution example</description>
2544       <board name="uVision Simulator" vendor="Keil"/>
2545       <project>
2546         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2547       </project>
2548       <attributes>
2549         <component Cclass="CMSIS" Cgroup="CORE"/>
2550         <component Cclass="CMSIS" Cgroup="DSP"/>
2551         <component Cclass="Device" Cgroup="Startup"/>
2552         <category>Getting Started</category>
2553       </attributes>
2554     </example>
2555
2556     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2557       <description>DSP_Lib Dotproduct example</description>
2558       <board name="uVision Simulator" vendor="Keil"/>
2559       <project>
2560         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2561       </project>
2562       <attributes>
2563         <component Cclass="CMSIS" Cgroup="CORE"/>
2564         <component Cclass="CMSIS" Cgroup="DSP"/>
2565         <component Cclass="Device" Cgroup="Startup"/>
2566         <category>Getting Started</category>
2567       </attributes>
2568     </example>
2569
2570     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2571       <description>DSP_Lib FFT Bin example</description>
2572       <board name="uVision Simulator" vendor="Keil"/>
2573       <project>
2574         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2575       </project>
2576       <attributes>
2577         <component Cclass="CMSIS" Cgroup="CORE"/>
2578         <component Cclass="CMSIS" Cgroup="DSP"/>
2579         <component Cclass="Device" Cgroup="Startup"/>
2580         <category>Getting Started</category>
2581       </attributes>
2582     </example>
2583
2584     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2585       <description>DSP_Lib FIR example</description>
2586       <board name="uVision Simulator" vendor="Keil"/>
2587       <project>
2588         <environment name="uv" load="arm_fir_example.uvprojx"/>
2589       </project>
2590       <attributes>
2591         <component Cclass="CMSIS" Cgroup="CORE"/>
2592         <component Cclass="CMSIS" Cgroup="DSP"/>
2593         <component Cclass="Device" Cgroup="Startup"/>
2594         <category>Getting Started</category>
2595       </attributes>
2596     </example>
2597
2598     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2599       <description>DSP_Lib Graphic Equalizer example</description>
2600       <board name="uVision Simulator" vendor="Keil"/>
2601       <project>
2602         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2603       </project>
2604       <attributes>
2605         <component Cclass="CMSIS" Cgroup="CORE"/>
2606         <component Cclass="CMSIS" Cgroup="DSP"/>
2607         <component Cclass="Device" Cgroup="Startup"/>
2608         <category>Getting Started</category>
2609       </attributes>
2610     </example>
2611
2612     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2613       <description>DSP_Lib Linear Interpolation example</description>
2614       <board name="uVision Simulator" vendor="Keil"/>
2615       <project>
2616         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2617       </project>
2618       <attributes>
2619         <component Cclass="CMSIS" Cgroup="CORE"/>
2620         <component Cclass="CMSIS" Cgroup="DSP"/>
2621         <component Cclass="Device" Cgroup="Startup"/>
2622         <category>Getting Started</category>
2623       </attributes>
2624     </example>
2625
2626     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2627       <description>DSP_Lib Matrix example</description>
2628       <board name="uVision Simulator" vendor="Keil"/>
2629       <project>
2630         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2631       </project>
2632       <attributes>
2633         <component Cclass="CMSIS" Cgroup="CORE"/>
2634         <component Cclass="CMSIS" Cgroup="DSP"/>
2635         <component Cclass="Device" Cgroup="Startup"/>
2636         <category>Getting Started</category>
2637       </attributes>
2638     </example>
2639
2640     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2641       <description>DSP_Lib Signal Convergence example</description>
2642       <board name="uVision Simulator" vendor="Keil"/>
2643       <project>
2644         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2645       </project>
2646       <attributes>
2647         <component Cclass="CMSIS" Cgroup="CORE"/>
2648         <component Cclass="CMSIS" Cgroup="DSP"/>
2649         <component Cclass="Device" Cgroup="Startup"/>
2650         <category>Getting Started</category>
2651       </attributes>
2652     </example>
2653
2654     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2655       <description>DSP_Lib Sinus/Cosinus example</description>
2656       <board name="uVision Simulator" vendor="Keil"/>
2657       <project>
2658         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2659       </project>
2660       <attributes>
2661         <component Cclass="CMSIS" Cgroup="CORE"/>
2662         <component Cclass="CMSIS" Cgroup="DSP"/>
2663         <component Cclass="Device" Cgroup="Startup"/>
2664         <category>Getting Started</category>
2665       </attributes>
2666     </example>
2667
2668     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2669       <description>DSP_Lib Variance example</description>
2670       <board name="uVision Simulator" vendor="Keil"/>
2671       <project>
2672         <environment name="uv" load="arm_variance_example.uvprojx"/>
2673       </project>
2674       <attributes>
2675         <component Cclass="CMSIS" Cgroup="CORE"/>
2676         <component Cclass="CMSIS" Cgroup="DSP"/>
2677         <component Cclass="Device" Cgroup="Startup"/>
2678         <category>Getting Started</category>
2679       </attributes>
2680     </example>
2681
2682     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2683       <description>CMSIS-RTOS2 Blinky example</description>
2684       <board name="uVision Simulator" vendor="Keil"/>
2685       <project>
2686         <environment name="uv" load="Blinky.uvprojx"/>
2687       </project>
2688       <attributes>
2689         <component Cclass="CMSIS" Cgroup="CORE"/>
2690         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2691         <component Cclass="Device" Cgroup="Startup"/>
2692         <category>Getting Started</category>
2693       </attributes>
2694     </example>
2695
2696     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2697       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2698       <board name="uVision Simulator" vendor="Keil"/>
2699       <project>
2700         <environment name="uv" load="Blinky.uvprojx"/>
2701       </project>
2702       <attributes>
2703         <component Cclass="CMSIS" Cgroup="CORE"/>
2704         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2705         <component Cclass="Device" Cgroup="Startup"/>
2706         <category>Getting Started</category>
2707       </attributes>
2708     </example>
2709
2710     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2711       <description>Bare-metal secure/non-secure example without RTOS</description>
2712       <board name="uVision Simulator" vendor="Keil"/>
2713       <project>
2714         <environment name="uv" load="NoRTOS.uvmpw"/>
2715       </project>
2716       <attributes>
2717         <component Cclass="CMSIS" Cgroup="CORE"/>
2718         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2719         <component Cclass="Device" Cgroup="Startup"/>
2720         <category>Getting Started</category>
2721       </attributes>
2722     </example>
2723
2724     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2725       <description>Secure/non-secure RTOS example with thread context management</description>
2726       <board name="uVision Simulator" vendor="Keil"/>
2727       <project>
2728         <environment name="uv" load="RTOS.uvmpw"/>
2729       </project>
2730       <attributes>
2731         <component Cclass="CMSIS" Cgroup="CORE"/>
2732         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2733         <component Cclass="Device" Cgroup="Startup"/>
2734         <category>Getting Started</category>
2735       </attributes>
2736     </example>
2737
2738     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2739       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2740       <board name="uVision Simulator" vendor="Keil"/>
2741       <project>
2742         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2743       </project>
2744       <attributes>
2745         <component Cclass="CMSIS" Cgroup="CORE"/>
2746         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2747         <component Cclass="Device" Cgroup="Startup"/>
2748         <category>Getting Started</category>
2749       </attributes>
2750     </example>
2751
2752   </examples>
2753
2754 </package>