begriffs open source - cmsis/blob - main/Core_A/html/group__irq__mode__defs.html

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 131 <a href="#define-members">Macros</a>  </div>
 132   <div class="headertitle"><div class="title">IRQ Mode Bit-Masks<div class="ingroups"><a class="el" href="group__irq__ctrl__gr.html">Interrupts and Exceptions</a></div></div></div>
 133 </div><!--header-->
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 135
 136 <p>Configure interrupt line mode.
 137 <a href="#details">More...</a></p>
 138 <table class="memberdecls">
 139 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
 140 Macros</h2></td></tr>
 141 <tr class="memitem:gabc31ba71612436a6ccc49342f35fec58"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gabc31ba71612436a6ccc49342f35fec58">IRQ_MODE_TRIG_LEVEL</a>&#160;&#160;&#160;(0x00UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 142 <tr class="memdesc:gabc31ba71612436a6ccc49342f35fec58"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: level triggered interrupt.  <br /></td></tr>
 143 <tr class="separator:gabc31ba71612436a6ccc49342f35fec58"><td class="memSeparator" colspan="2">&#160;</td></tr>
 144 <tr class="memitem:ga326df9e34f6447583895a6f809ee160a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga326df9e34f6447583895a6f809ee160a">IRQ_MODE_TRIG_LEVEL_LOW</a>&#160;&#160;&#160;(0x01UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 145 <tr class="memdesc:ga326df9e34f6447583895a6f809ee160a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: low level triggered interrupt.  <br /></td></tr>
 146 <tr class="separator:ga326df9e34f6447583895a6f809ee160a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 147 <tr class="memitem:gafeb539b2a564ca35abc57f87d71e7206"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gafeb539b2a564ca35abc57f87d71e7206">IRQ_MODE_TRIG_LEVEL_HIGH</a>&#160;&#160;&#160;(0x02UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 148 <tr class="memdesc:gafeb539b2a564ca35abc57f87d71e7206"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: high level triggered interrupt.  <br /></td></tr>
 149 <tr class="separator:gafeb539b2a564ca35abc57f87d71e7206"><td class="memSeparator" colspan="2">&#160;</td></tr>
 150 <tr class="memitem:gaa9a8e0968a4ccd57eb7544a16d05f24d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaa9a8e0968a4ccd57eb7544a16d05f24d">IRQ_MODE_TRIG_EDGE</a>&#160;&#160;&#160;(0x04UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 151 <tr class="memdesc:gaa9a8e0968a4ccd57eb7544a16d05f24d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: edge triggered interrupt.  <br /></td></tr>
 152 <tr class="separator:gaa9a8e0968a4ccd57eb7544a16d05f24d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 153 <tr class="memitem:ga2dbbbb7100be0fee6e048cd3deb50e28"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga2dbbbb7100be0fee6e048cd3deb50e28">IRQ_MODE_TRIG_EDGE_RISING</a>&#160;&#160;&#160;(0x05UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 154 <tr class="memdesc:ga2dbbbb7100be0fee6e048cd3deb50e28"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: rising edge triggered interrupt.  <br /></td></tr>
 155 <tr class="separator:ga2dbbbb7100be0fee6e048cd3deb50e28"><td class="memSeparator" colspan="2">&#160;</td></tr>
 156 <tr class="memitem:ga99e0f3f6945991d50e766b19e71e0222"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga99e0f3f6945991d50e766b19e71e0222">IRQ_MODE_TRIG_EDGE_FALLING</a>&#160;&#160;&#160;(0x06UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 157 <tr class="memdesc:ga99e0f3f6945991d50e766b19e71e0222"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: falling edge triggered interrupt.  <br /></td></tr>
 158 <tr class="separator:ga99e0f3f6945991d50e766b19e71e0222"><td class="memSeparator" colspan="2">&#160;</td></tr>
 159 <tr class="memitem:ga8b0142ff767a9b1b1287e638eacf707b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga8b0142ff767a9b1b1287e638eacf707b">IRQ_MODE_TRIG_EDGE_BOTH</a>&#160;&#160;&#160;(0x07UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td></tr>
 160 <tr class="memdesc:ga8b0142ff767a9b1b1287e638eacf707b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trigger: rising and falling edge triggered interrupt.  <br /></td></tr>
 161 <tr class="separator:ga8b0142ff767a9b1b1287e638eacf707b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 162 <tr class="memitem:gab0d022bbd15beb1a6578b5535d95f9cf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gab0d022bbd15beb1a6578b5535d95f9cf">IRQ_MODE_TYPE_IRQ</a>&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td></tr>
 163 <tr class="memdesc:gab0d022bbd15beb1a6578b5535d95f9cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Type: interrupt source triggers CPU IRQ line.  <br /></td></tr>
 164 <tr class="separator:gab0d022bbd15beb1a6578b5535d95f9cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 165 <tr class="memitem:gaec01a80010bc42b1482388ce3ae4d2a3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaec01a80010bc42b1482388ce3ae4d2a3">IRQ_MODE_TYPE_FIQ</a>&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td></tr>
 166 <tr class="memdesc:gaec01a80010bc42b1482388ce3ae4d2a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Type: interrupt source triggers CPU FIQ line.  <br /></td></tr>
 167 <tr class="separator:gaec01a80010bc42b1482388ce3ae4d2a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 168 <tr class="memitem:ga7498851a6a7f3e2c5e087041617f5be7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga7498851a6a7f3e2c5e087041617f5be7">IRQ_MODE_DOMAIN_NONSECURE</a>&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td></tr>
 169 <tr class="memdesc:ga7498851a6a7f3e2c5e087041617f5be7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Domain: interrupt is targeting non-secure domain.  <br /></td></tr>
 170 <tr class="separator:ga7498851a6a7f3e2c5e087041617f5be7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 171 <tr class="memitem:ga15cdeb10ef2b8081c5cd7a87e22e65e6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga15cdeb10ef2b8081c5cd7a87e22e65e6">IRQ_MODE_DOMAIN_SECURE</a>&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td></tr>
 172 <tr class="memdesc:ga15cdeb10ef2b8081c5cd7a87e22e65e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Domain: interrupt is targeting secure domain.  <br /></td></tr>
 173 <tr class="separator:ga15cdeb10ef2b8081c5cd7a87e22e65e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 174 <tr class="memitem:gad3d0505689768247c67495b7359e147f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gad3d0505689768247c67495b7359e147f">IRQ_MODE_CPU_ALL</a>&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 175 <tr class="memdesc:gad3d0505689768247c67495b7359e147f"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets all CPUs.  <br /></td></tr>
 176 <tr class="separator:gad3d0505689768247c67495b7359e147f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 177 <tr class="memitem:gacb276aa0488a9bf1aa56e1072d2a15a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gacb276aa0488a9bf1aa56e1072d2a15a5">IRQ_MODE_CPU_0</a>&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 178 <tr class="memdesc:gacb276aa0488a9bf1aa56e1072d2a15a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 0.  <br /></td></tr>
 179 <tr class="separator:gacb276aa0488a9bf1aa56e1072d2a15a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 180 <tr class="memitem:gab09616a5ccd05d75d81ab80a37387a9a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gab09616a5ccd05d75d81ab80a37387a9a">IRQ_MODE_CPU_1</a>&#160;&#160;&#160;(0x02UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 181 <tr class="memdesc:gab09616a5ccd05d75d81ab80a37387a9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 1.  <br /></td></tr>
 182 <tr class="separator:gab09616a5ccd05d75d81ab80a37387a9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 183 <tr class="memitem:ga3c8c5ec0226d772c3200d9efa2d3bf1a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga3c8c5ec0226d772c3200d9efa2d3bf1a">IRQ_MODE_CPU_2</a>&#160;&#160;&#160;(0x04UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 184 <tr class="memdesc:ga3c8c5ec0226d772c3200d9efa2d3bf1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 2.  <br /></td></tr>
 185 <tr class="separator:ga3c8c5ec0226d772c3200d9efa2d3bf1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 186 <tr class="memitem:ga7fe46ac2f03063dc5ed2ca793c9cca85"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga7fe46ac2f03063dc5ed2ca793c9cca85">IRQ_MODE_CPU_3</a>&#160;&#160;&#160;(0x08UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 187 <tr class="memdesc:ga7fe46ac2f03063dc5ed2ca793c9cca85"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 3.  <br /></td></tr>
 188 <tr class="separator:ga7fe46ac2f03063dc5ed2ca793c9cca85"><td class="memSeparator" colspan="2">&#160;</td></tr>
 189 <tr class="memitem:ga4d428c7ab66cb22eb375a109735e9a3a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga4d428c7ab66cb22eb375a109735e9a3a">IRQ_MODE_CPU_4</a>&#160;&#160;&#160;(0x10UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 190 <tr class="memdesc:ga4d428c7ab66cb22eb375a109735e9a3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 4.  <br /></td></tr>
 191 <tr class="separator:ga4d428c7ab66cb22eb375a109735e9a3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 192 <tr class="memitem:ga94faa9eab45bbc6fa6b2a3c9d92bbb37"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#ga94faa9eab45bbc6fa6b2a3c9d92bbb37">IRQ_MODE_CPU_5</a>&#160;&#160;&#160;(0x20UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 193 <tr class="memdesc:ga94faa9eab45bbc6fa6b2a3c9d92bbb37"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 5.  <br /></td></tr>
 194 <tr class="separator:ga94faa9eab45bbc6fa6b2a3c9d92bbb37"><td class="memSeparator" colspan="2">&#160;</td></tr>
 195 <tr class="memitem:gadb512fc8a31bc771c3ce0d006b821bb9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gadb512fc8a31bc771c3ce0d006b821bb9">IRQ_MODE_CPU_6</a>&#160;&#160;&#160;(0x40UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 196 <tr class="memdesc:gadb512fc8a31bc771c3ce0d006b821bb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 6.  <br /></td></tr>
 197 <tr class="separator:gadb512fc8a31bc771c3ce0d006b821bb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 198 <tr class="memitem:gaa66525a1ee05c56f367540b2135e81ed"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaa66525a1ee05c56f367540b2135e81ed">IRQ_MODE_CPU_7</a>&#160;&#160;&#160;(0x80UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td></tr>
 199 <tr class="memdesc:gaa66525a1ee05c56f367540b2135e81ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPU: interrupt targets CPU 7.  <br /></td></tr>
 200 <tr class="separator:gaa66525a1ee05c56f367540b2135e81ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
 201 <tr class="memitem:gaacb93ae158e548c54698a7230647804a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html#gaacb93ae158e548c54698a7230647804a">IRQ_MODE_ERROR</a>&#160;&#160;&#160;(0x80000000UL)</td></tr>
 202 <tr class="memdesc:gaacb93ae158e548c54698a7230647804a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit indicating mode value error.  <br /></td></tr>
 203 <tr class="separator:gaacb93ae158e548c54698a7230647804a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 204 </table>
 205 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 206 <p>Configure interrupt line mode. </p>
 207 <p>The following codes are used as values for the parameter <em>mode</em> of the function <a class="el" href="group__irq__ctrl__gr.html#gab35da69354d2e515931580a1308a3a85">IRQ_SetMode</a> to configure interrupt line mode. They are also returned by the function <a class="el" href="group__irq__ctrl__gr.html#gadba142ee49ae8f52f76b603c926ad711">IRQ_GetMode</a> when retrieving interrupt line mode.</p>
 208 <p>The values of <b>IRQ_MODE_TRIG_x</b> definitions specify The values of <b>IRQ_MODE_TYPE_x</b> definitions specify The values of <b>IRQ_MODE_DOMAIN_x</b> definitions specify The values of <b>IRQ_MODE_CPU_x</b> definitions specify</p>
 209 <p>Interrupt mode bit-masks </p>
 210 <h2 class="groupheader">Macro Definition Documentation</h2>
 211 <a id="gacb276aa0488a9bf1aa56e1072d2a15a5" name="gacb276aa0488a9bf1aa56e1072d2a15a5"></a>
 212 <h2 class="memtitle"><span class="permalink"><a href="#gacb276aa0488a9bf1aa56e1072d2a15a5">&#9670;&#160;</a></span>IRQ_MODE_CPU_0</h2>
 213
 214 <div class="memitem">
 215 <div class="memproto">
 216       <table class="memname">
 217         <tr>
 218           <td class="memname">#define IRQ_MODE_CPU_0&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
 219         </tr>
 220       </table>
 221 </div><div class="memdoc">
 222
 223 <p>CPU: interrupt targets CPU 0. </p>
 224
 225 </div>
 226 </div>
 227 <a id="gab09616a5ccd05d75d81ab80a37387a9a" name="gab09616a5ccd05d75d81ab80a37387a9a"></a>
 228 <h2 class="memtitle"><span class="permalink"><a href="#gab09616a5ccd05d75d81ab80a37387a9a">&#9670;&#160;</a></span>IRQ_MODE_CPU_1</h2>
 229
 230 <div class="memitem">
 231 <div class="memproto">
 232       <table class="memname">
 233         <tr>
 234           <td class="memname">#define IRQ_MODE_CPU_1&#160;&#160;&#160;(0x02UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
 235         </tr>
 236       </table>
 237 </div><div class="memdoc">
 238
 239 <p>CPU: interrupt targets CPU 1. </p>
 240
 241 </div>
 242 </div>
 243 <a id="ga3c8c5ec0226d772c3200d9efa2d3bf1a" name="ga3c8c5ec0226d772c3200d9efa2d3bf1a"></a>
 244 <h2 class="memtitle"><span class="permalink"><a href="#ga3c8c5ec0226d772c3200d9efa2d3bf1a">&#9670;&#160;</a></span>IRQ_MODE_CPU_2</h2>
 245
 246 <div class="memitem">
 247 <div class="memproto">
 248       <table class="memname">
 249         <tr>
 250           <td class="memname">#define IRQ_MODE_CPU_2&#160;&#160;&#160;(0x04UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
 251         </tr>
 252       </table>
 253 </div><div class="memdoc">
 254
 255 <p>CPU: interrupt targets CPU 2. </p>
 256
 257 </div>
 258 </div>
 259 <a id="ga7fe46ac2f03063dc5ed2ca793c9cca85" name="ga7fe46ac2f03063dc5ed2ca793c9cca85"></a>
 260 <h2 class="memtitle"><span class="permalink"><a href="#ga7fe46ac2f03063dc5ed2ca793c9cca85">&#9670;&#160;</a></span>IRQ_MODE_CPU_3</h2>
 261
 262 <div class="memitem">
 263 <div class="memproto">
 264       <table class="memname">
 265         <tr>
 266           <td class="memname">#define IRQ_MODE_CPU_3&#160;&#160;&#160;(0x08UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
 267         </tr>
 268       </table>
 269 </div><div class="memdoc">
 270
 271 <p>CPU: interrupt targets CPU 3. </p>
 272
 273 </div>
 274 </div>
 275 <a id="ga4d428c7ab66cb22eb375a109735e9a3a" name="ga4d428c7ab66cb22eb375a109735e9a3a"></a>
 276 <h2 class="memtitle"><span class="permalink"><a href="#ga4d428c7ab66cb22eb375a109735e9a3a">&#9670;&#160;</a></span>IRQ_MODE_CPU_4</h2>
 277
 278 <div class="memitem">
 279 <div class="memproto">
 280       <table class="memname">
 281         <tr>
 282           <td class="memname">#define IRQ_MODE_CPU_4&#160;&#160;&#160;(0x10UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
 283         </tr>
 284       </table>
 285 </div><div class="memdoc">
 286
 287 <p>CPU: interrupt targets CPU 4. </p>
 288
 289 </div>
 290 </div>
 291 <a id="ga94faa9eab45bbc6fa6b2a3c9d92bbb37" name="ga94faa9eab45bbc6fa6b2a3c9d92bbb37"></a>
 292 <h2 class="memtitle"><span class="permalink"><a href="#ga94faa9eab45bbc6fa6b2a3c9d92bbb37">&#9670;&#160;</a></span>IRQ_MODE_CPU_5</h2>
 293
 294 <div class="memitem">
 295 <div class="memproto">
 296       <table class="memname">
 297         <tr>
 298           <td class="memname">#define IRQ_MODE_CPU_5&#160;&#160;&#160;(0x20UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
 299         </tr>
 300       </table>
 301 </div><div class="memdoc">
 302
 303 <p>CPU: interrupt targets CPU 5. </p>
 304
 305 </div>
 306 </div>
 307 <a id="gadb512fc8a31bc771c3ce0d006b821bb9" name="gadb512fc8a31bc771c3ce0d006b821bb9"></a>
 308 <h2 class="memtitle"><span class="permalink"><a href="#gadb512fc8a31bc771c3ce0d006b821bb9">&#9670;&#160;</a></span>IRQ_MODE_CPU_6</h2>
 309
 310 <div class="memitem">
 311 <div class="memproto">
 312       <table class="memname">
 313         <tr>
 314           <td class="memname">#define IRQ_MODE_CPU_6&#160;&#160;&#160;(0x40UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
 315         </tr>
 316       </table>
 317 </div><div class="memdoc">
 318
 319 <p>CPU: interrupt targets CPU 6. </p>
 320
 321 </div>
 322 </div>
 323 <a id="gaa66525a1ee05c56f367540b2135e81ed" name="gaa66525a1ee05c56f367540b2135e81ed"></a>
 324 <h2 class="memtitle"><span class="permalink"><a href="#gaa66525a1ee05c56f367540b2135e81ed">&#9670;&#160;</a></span>IRQ_MODE_CPU_7</h2>
 325
 326 <div class="memitem">
 327 <div class="memproto">
 328       <table class="memname">
 329         <tr>
 330           <td class="memname">#define IRQ_MODE_CPU_7&#160;&#160;&#160;(0x80UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
 331         </tr>
 332       </table>
 333 </div><div class="memdoc">
 334
 335 <p>CPU: interrupt targets CPU 7. </p>
 336
 337 </div>
 338 </div>
 339 <a id="gad3d0505689768247c67495b7359e147f" name="gad3d0505689768247c67495b7359e147f"></a>
 340 <h2 class="memtitle"><span class="permalink"><a href="#gad3d0505689768247c67495b7359e147f">&#9670;&#160;</a></span>IRQ_MODE_CPU_ALL</h2>
 341
 342 <div class="memitem">
 343 <div class="memproto">
 344       <table class="memname">
 345         <tr>
 346           <td class="memname">#define IRQ_MODE_CPU_ALL&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#ab7527409c193021e65aaf4d519caea46">IRQ_MODE_CPU_Pos</a>)</td>
 347         </tr>
 348       </table>
 349 </div><div class="memdoc">
 350
 351 <p>CPU: interrupt targets all CPUs. </p>
 352
 353 </div>
 354 </div>
 355 <a id="ga7498851a6a7f3e2c5e087041617f5be7" name="ga7498851a6a7f3e2c5e087041617f5be7"></a>
 356 <h2 class="memtitle"><span class="permalink"><a href="#ga7498851a6a7f3e2c5e087041617f5be7">&#9670;&#160;</a></span>IRQ_MODE_DOMAIN_NONSECURE</h2>
 357
 358 <div class="memitem">
 359 <div class="memproto">
 360       <table class="memname">
 361         <tr>
 362           <td class="memname">#define IRQ_MODE_DOMAIN_NONSECURE&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td>
 363         </tr>
 364       </table>
 365 </div><div class="memdoc">
 366
 367 <p>Domain: interrupt is targeting non-secure domain. </p>
 368
 369 </div>
 370 </div>
 371 <a id="ga15cdeb10ef2b8081c5cd7a87e22e65e6" name="ga15cdeb10ef2b8081c5cd7a87e22e65e6"></a>
 372 <h2 class="memtitle"><span class="permalink"><a href="#ga15cdeb10ef2b8081c5cd7a87e22e65e6">&#9670;&#160;</a></span>IRQ_MODE_DOMAIN_SECURE</h2>
 373
 374 <div class="memitem">
 375 <div class="memproto">
 376       <table class="memname">
 377         <tr>
 378           <td class="memname">#define IRQ_MODE_DOMAIN_SECURE&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#af14ca343d349887ab691d51aab1662ce">IRQ_MODE_DOMAIN_Pos</a>)</td>
 379         </tr>
 380       </table>
 381 </div><div class="memdoc">
 382
 383 <p>Domain: interrupt is targeting secure domain. </p>
 384
 385 </div>
 386 </div>
 387 <a id="gaacb93ae158e548c54698a7230647804a" name="gaacb93ae158e548c54698a7230647804a"></a>
 388 <h2 class="memtitle"><span class="permalink"><a href="#gaacb93ae158e548c54698a7230647804a">&#9670;&#160;</a></span>IRQ_MODE_ERROR</h2>
 389
 390 <div class="memitem">
 391 <div class="memproto">
 392       <table class="memname">
 393         <tr>
 394           <td class="memname">#define IRQ_MODE_ERROR&#160;&#160;&#160;(0x80000000UL)</td>
 395         </tr>
 396       </table>
 397 </div><div class="memdoc">
 398
 399 <p>Bit indicating mode value error. </p>
 400
 401 </div>
 402 </div>
 403 <a id="gaa9a8e0968a4ccd57eb7544a16d05f24d" name="gaa9a8e0968a4ccd57eb7544a16d05f24d"></a>
 404 <h2 class="memtitle"><span class="permalink"><a href="#gaa9a8e0968a4ccd57eb7544a16d05f24d">&#9670;&#160;</a></span>IRQ_MODE_TRIG_EDGE</h2>
 405
 406 <div class="memitem">
 407 <div class="memproto">
 408       <table class="memname">
 409         <tr>
 410           <td class="memname">#define IRQ_MODE_TRIG_EDGE&#160;&#160;&#160;(0x04UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
 411         </tr>
 412       </table>
 413 </div><div class="memdoc">
 414
 415 <p>Trigger: edge triggered interrupt. </p>
 416
 417 </div>
 418 </div>
 419 <a id="ga8b0142ff767a9b1b1287e638eacf707b" name="ga8b0142ff767a9b1b1287e638eacf707b"></a>
 420 <h2 class="memtitle"><span class="permalink"><a href="#ga8b0142ff767a9b1b1287e638eacf707b">&#9670;&#160;</a></span>IRQ_MODE_TRIG_EDGE_BOTH</h2>
 421
 422 <div class="memitem">
 423 <div class="memproto">
 424       <table class="memname">
 425         <tr>
 426           <td class="memname">#define IRQ_MODE_TRIG_EDGE_BOTH&#160;&#160;&#160;(0x07UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
 427         </tr>
 428       </table>
 429 </div><div class="memdoc">
 430
 431 <p>Trigger: rising and falling edge triggered interrupt. </p>
 432
 433 </div>
 434 </div>
 435 <a id="ga99e0f3f6945991d50e766b19e71e0222" name="ga99e0f3f6945991d50e766b19e71e0222"></a>
 436 <h2 class="memtitle"><span class="permalink"><a href="#ga99e0f3f6945991d50e766b19e71e0222">&#9670;&#160;</a></span>IRQ_MODE_TRIG_EDGE_FALLING</h2>
 437
 438 <div class="memitem">
 439 <div class="memproto">
 440       <table class="memname">
 441         <tr>
 442           <td class="memname">#define IRQ_MODE_TRIG_EDGE_FALLING&#160;&#160;&#160;(0x06UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
 443         </tr>
 444       </table>
 445 </div><div class="memdoc">
 446
 447 <p>Trigger: falling edge triggered interrupt. </p>
 448
 449 </div>
 450 </div>
 451 <a id="ga2dbbbb7100be0fee6e048cd3deb50e28" name="ga2dbbbb7100be0fee6e048cd3deb50e28"></a>
 452 <h2 class="memtitle"><span class="permalink"><a href="#ga2dbbbb7100be0fee6e048cd3deb50e28">&#9670;&#160;</a></span>IRQ_MODE_TRIG_EDGE_RISING</h2>
 453
 454 <div class="memitem">
 455 <div class="memproto">
 456       <table class="memname">
 457         <tr>
 458           <td class="memname">#define IRQ_MODE_TRIG_EDGE_RISING&#160;&#160;&#160;(0x05UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
 459         </tr>
 460       </table>
 461 </div><div class="memdoc">
 462
 463 <p>Trigger: rising edge triggered interrupt. </p>
 464
 465 </div>
 466 </div>
 467 <a id="gabc31ba71612436a6ccc49342f35fec58" name="gabc31ba71612436a6ccc49342f35fec58"></a>
 468 <h2 class="memtitle"><span class="permalink"><a href="#gabc31ba71612436a6ccc49342f35fec58">&#9670;&#160;</a></span>IRQ_MODE_TRIG_LEVEL</h2>
 469
 470 <div class="memitem">
 471 <div class="memproto">
 472       <table class="memname">
 473         <tr>
 474           <td class="memname">#define IRQ_MODE_TRIG_LEVEL&#160;&#160;&#160;(0x00UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
 475         </tr>
 476       </table>
 477 </div><div class="memdoc">
 478
 479 <p>Trigger: level triggered interrupt. </p>
 480
 481 </div>
 482 </div>
 483 <a id="gafeb539b2a564ca35abc57f87d71e7206" name="gafeb539b2a564ca35abc57f87d71e7206"></a>
 484 <h2 class="memtitle"><span class="permalink"><a href="#gafeb539b2a564ca35abc57f87d71e7206">&#9670;&#160;</a></span>IRQ_MODE_TRIG_LEVEL_HIGH</h2>
 485
 486 <div class="memitem">
 487 <div class="memproto">
 488       <table class="memname">
 489         <tr>
 490           <td class="memname">#define IRQ_MODE_TRIG_LEVEL_HIGH&#160;&#160;&#160;(0x02UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
 491         </tr>
 492       </table>
 493 </div><div class="memdoc">
 494
 495 <p>Trigger: high level triggered interrupt. </p>
 496
 497 </div>
 498 </div>
 499 <a id="ga326df9e34f6447583895a6f809ee160a" name="ga326df9e34f6447583895a6f809ee160a"></a>
 500 <h2 class="memtitle"><span class="permalink"><a href="#ga326df9e34f6447583895a6f809ee160a">&#9670;&#160;</a></span>IRQ_MODE_TRIG_LEVEL_LOW</h2>
 501
 502 <div class="memitem">
 503 <div class="memproto">
 504       <table class="memname">
 505         <tr>
 506           <td class="memname">#define IRQ_MODE_TRIG_LEVEL_LOW&#160;&#160;&#160;(0x01UL /*&lt;&lt; <a class="el" href="irq__ctrl_8h.html#ace17913944cf0218141e51beaada4053">IRQ_MODE_TRIG_Pos</a>*/)</td>
 507         </tr>
 508       </table>
 509 </div><div class="memdoc">
 510
 511 <p>Trigger: low level triggered interrupt. </p>
 512
 513 </div>
 514 </div>
 515 <a id="gaec01a80010bc42b1482388ce3ae4d2a3" name="gaec01a80010bc42b1482388ce3ae4d2a3"></a>
 516 <h2 class="memtitle"><span class="permalink"><a href="#gaec01a80010bc42b1482388ce3ae4d2a3">&#9670;&#160;</a></span>IRQ_MODE_TYPE_FIQ</h2>
 517
 518 <div class="memitem">
 519 <div class="memproto">
 520       <table class="memname">
 521         <tr>
 522           <td class="memname">#define IRQ_MODE_TYPE_FIQ&#160;&#160;&#160;(0x01UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td>
 523         </tr>
 524       </table>
 525 </div><div class="memdoc">
 526
 527 <p>Type: interrupt source triggers CPU FIQ line. </p>
 528
 529 </div>
 530 </div>
 531 <a id="gab0d022bbd15beb1a6578b5535d95f9cf" name="gab0d022bbd15beb1a6578b5535d95f9cf"></a>
 532 <h2 class="memtitle"><span class="permalink"><a href="#gab0d022bbd15beb1a6578b5535d95f9cf">&#9670;&#160;</a></span>IRQ_MODE_TYPE_IRQ</h2>
 533
 534 <div class="memitem">
 535 <div class="memproto">
 536       <table class="memname">
 537         <tr>
 538           <td class="memname">#define IRQ_MODE_TYPE_IRQ&#160;&#160;&#160;(0x00UL &lt;&lt; <a class="el" href="irq__ctrl_8h.html#a7560513ef6a445642b5ed76eabf2a1b2">IRQ_MODE_TYPE_Pos</a>)</td>
 539         </tr>
 540       </table>
 541 </div><div class="memdoc">
 542
 543 <p>Type: interrupt source triggers CPU IRQ line. </p>
 544
 545 </div>
 546 </div>
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