begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev0">
  12       Active development...
  13       CMSIS-Core(M): 5.4.0 (see revision history for details)
  14        - Enhanced MVE support for Armv8.1-MML
  15     </release>
  16     <release version="5.6.0" date="2019-07-10">
  17       CMSIS-Core(M): 5.3.0 (see revision history for details)
  18        - Added provisions for compiler-independent C startup code.
  19       CMSIS-Core(A): 1.1.4 (see revision history for details)
  20        - Fixed __FPU_Enable.
  21       CMSIS-DSP: 1.7.0 (see revision history for details)
  22         - New Neon versions of f32 functions
  23         - Python wrapper
  24         - Preliminary cmake build
  25         - Compilation flags for FFTs
  26         - Changes to arm_math.h
  27       CMSIS-NN: 1.2.0 (see revision history for details)
  28         - New function for depthwise convolution with asymmetric quantization.
  29         - New support functions for requantization.
  30       CMSIS-RTOS:
  31         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  32       CMSIS-RTOS2:
  33         - RTX 5.5.1 (see revision history for details)
  34       CMSIS-Driver: 2.7.1
  35         - WiFi Interface API 1.0.0
  36       Devices:
  37        - Generalized C startup code for all Cortex-M familiy devices.
  38        - Updated Cortex-A default memory regions and MMU configurations
  39        - Moved Cortex-A memory and system config files to avoid include path issues
  40     </release>
  41     <release version="5.5.1" date="2019-03-20">
  42       The following folders are deprecated
  43         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  44
  45       CMSIS-Core(M): 5.2.1 (see revision history for details)
  46         - Fixed compilation issue in cmsis_armclang_ltm.h
  47     </release>
  48     <release version="5.5.0" date="2019-03-18">
  49       The following folders have been removed:
  50         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  51         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  52       The following folders are deprecated
  53         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  54
  55       CMSIS-Core(M): 5.2.0 (see revision history for details)
  56         - Reworked Stack/Heap configuration for ARM startup files.
  57         - Added Cortex-M35P device support.
  58         - Added generic Armv8.1-M Mainline device support.
  59       CMSIS-Core(A): 1.1.3 (see revision history for details)
  60       CMSIS-DSP: 1.6.0 (see revision history for details)
  61         - reworked DSP library source files
  62         - reworked DSP library documentation
  63         - Changed DSP folder structure
  64         - moved DSP libraries to folder ./DSP/Lib
  65         - ARM DSP Libraries are built with ARMCLANG
  66         - Added DSP Libraries Source variant
  67       CMSIS-RTOS2:
  68         - RTX 5.5.0 (see revision history for details)
  69       CMSIS-Driver: 2.7.0
  70         - Added WiFi Interface API 1.0.0-beta
  71         - Added components for project specific driver implementations
  72       CMSIS-Pack: 1.6.0 (see revision history for details)
  73       Devices:
  74         - Added Cortex-M35P and ARMv81MML device templates.
  75         - Fixed C-Startup Code for GCC (aligned with other compilers)
  76       Utilities:
  77         - SVDConv 3.3.25
  78         - PackChk 1.3.82
  79     </release>
  80     <release version="5.4.0" date="2018-08-01">
  81       Aligned pack structure with repository.
  82       The following folders are deprecated:
  83         - CMSIS/Include/
  84         - CMSIS/DSP_Lib/
  85
  86       CMSIS-Core(M): 5.1.2 (see revision history for details)
  87         - Added Cortex-M1 support (beta).
  88       CMSIS-Core(A): 1.1.2 (see revision history for details)
  89       CMSIS-NN: 1.1.0
  90         - Added new math functions.
  91       CMSIS-RTOS2:
  92         - API 2.1.3 (see revision history for details)
  93         - RTX 5.4.0 (see revision history for details)
  94           * Updated exception handling on Cortex-A
  95       CMSIS-Driver:
  96         - Flash Driver API V2.2.0
  97       Utilities:
  98         - SVDConv 3.3.21
  99         - PackChk 1.3.71
 100     </release>
 101     <release version="5.3.0" date="2018-02-22">
 102       Updated Arm company brand.
 103       CMSIS-Core(M): 5.1.1 (see revision history for details)
 104       CMSIS-Core(A): 1.1.1 (see revision history for details)
 105       CMSIS-DAP: 2.0.0 (see revision history for details)
 106       CMSIS-NN: 1.0.0
 107         - Initial contribution of the bare metal Neural Network Library.
 108       CMSIS-RTOS2:
 109         - RTX 5.3.0 (see revision history for details)
 110         - OS Tick API 1.0.1
 111     </release>
 112     <release version="5.2.0" date="2017-11-16">
 113       CMSIS-Core(M): 5.1.0 (see revision history for details)
 114         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 115         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 116       CMSIS-Core(A): 1.1.0 (see revision history for details)
 117         - Added compiler_iccarm.h.
 118         - Added additional access functions for physical timer.
 119       CMSIS-DAP: 1.2.0 (see revision history for details)
 120       CMSIS-DSP: 1.5.2 (see revision history for details)
 121       CMSIS-Driver: 2.6.0 (see revision history for details)
 122         - CAN Driver API V1.2.0
 123         - NAND Driver API V2.3.0
 124       CMSIS-RTOS:
 125         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 126       CMSIS-RTOS2:
 127         - API 2.1.2 (see revision history for details)
 128         - RTX 5.2.3 (see revision history for details)
 129       Devices:
 130         - Added GCC startup and linker script for Cortex-A9.
 131         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 132         - Added IAR startup code for Cortex-A9
 133     </release>
 134     <release version="5.1.1" date="2017-09-19">
 135       CMSIS-RTOS2:
 136       - RTX 5.2.1 (see revision history for details)
 137     </release>
 138     <release version="5.1.0" date="2017-08-04">
 139       CMSIS-Core(M): 5.0.2 (see revision history for details)
 140       - Changed Version Control macros to be core agnostic.
 141       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 142       CMSIS-Core(A): 1.0.0 (see revision history for details)
 143       - Initial release
 144       - IRQ Controller API 1.0.0
 145       CMSIS-Driver: 2.05 (see revision history for details)
 146       - All typedefs related to status have been made volatile.
 147       CMSIS-RTOS2:
 148       - API 2.1.1 (see revision history for details)
 149       - RTX 5.2.0 (see revision history for details)
 150       - OS Tick API 1.0.0
 151       CMSIS-DSP: 1.5.2 (see revision history for details)
 152       - Fixed GNU Compiler specific diagnostics.
 153       CMSIS-Pack: 1.5.0 (see revision history for details)
 154       - added System Description File (*.SDF) Format
 155       CMSIS-Zone: 0.0.1 (Preview)
 156       - Initial specification draft
 157     </release>
 158     <release version="5.0.1" date="2017-02-03">
 159       Package Description:
 160       - added taxonomy for Cclass RTOS
 161       CMSIS-RTOS2:
 162       - API 2.1   (see revision history for details)
 163       - RTX 5.1.0 (see revision history for details)
 164       CMSIS-Core: 5.0.1 (see revision history for details)
 165       - Added __PACKED_STRUCT macro
 166       - Added uVisior support
 167       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 168       - Updated template for secure main function (main_s.c)
 169       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 170       CMSIS-DSP: 1.5.1 (see revision history for details)
 171       - added ARMv8M DSP libraries.
 172       CMSIS-Pack:1.4.9 (see revision history for details)
 173       - added Pack Index File specification and schema file
 174     </release>
 175     <release version="5.0.0" date="2016-11-11">
 176       Changed open source license to Apache 2.0
 177       CMSIS_Core:
 178        - Added support for Cortex-M23 and Cortex-M33.
 179        - Added ARMv8-M device configurations for mainline and baseline.
 180        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 181        - Added cmsis_compiler.h to unify compiler behaviour.
 182        - Updated function SCB_EnableICache (for Cortex-M7).
 183        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 184       CMSIS-RTOS:
 185         - bug fix in RTX 4.82 (see revision history for details)
 186       CMSIS-RTOS2:
 187         - new API including compatibility layer to CMSIS-RTOS
 188         - reference implementation based on RTX5
 189         - supports all Cortex-M variants including TrustZone for ARMv8-M
 190       CMSIS-SVD:
 191        - reworked SVD format documentation
 192        - removed SVD file database documentation as SVD files are distributed in packs
 193        - updated SVDConv for Win32 and Linux
 194       CMSIS-DSP:
 195        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 196        - Added DSP libraries build projects to CMSIS pack.
 197     </release>
 198     <release version="4.5.0" date="2015-10-28">
 199       - CMSIS-Core     4.30.0  (see revision history for details)
 200       - CMSIS-DAP      1.1.0   (unchanged)
 201       - CMSIS-Driver   2.04.0  (see revision history for details)
 202       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 203       - CMSIS-Pack     1.4.1   (see revision history for details)
 204       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 205       - CMSIS-SVD      1.3.1   (see revision history for details)
 206     </release>
 207     <release version="4.4.0" date="2015-09-11">
 208       - CMSIS-Core     4.20   (see revision history for details)
 209       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 210       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 211       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 212       - CMSIS-RTOS
 213         -- API         1.02   (unchanged)
 214         -- RTX         4.79   (see revision history for details)
 215       - CMSIS-SVD      1.3.0  (see revision history for details)
 216       - CMSIS-DAP      1.1.0  (extended with SWO support)
 217     </release>
 218     <release version="4.3.0" date="2015-03-20">
 219       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 220       - CMSIS-DSP      1.4.5  (see revision history for details)
 221       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 222       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 223       - CMSIS-RTOS
 224         -- API         1.02   (unchanged)
 225         -- RTX         4.78   (see revision history for details)
 226       - CMSIS-SVD      1.2    (unchanged)
 227     </release>
 228     <release version="4.2.0" date="2014-09-24">
 229       Adding Cortex-M7 support
 230       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 231       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 232       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 233       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 234       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 235     </release>
 236     <release version="4.1.1" date="2014-06-30">
 237       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 238     </release>
 239     <release version="4.1.0" date="2014-06-12">
 240       - CMSIS-Driver   2.02  (incompatible update)
 241       - CMSIS-Pack     1.3   (see revision history for details)
 242       - CMSIS-DSP      1.4.2 (unchanged)
 243       - CMSIS-Core     3.30  (unchanged)
 244       - CMSIS-RTOS RTX 4.74  (unchanged)
 245       - CMSIS-RTOS API 1.02  (unchanged)
 246       - CMSIS-SVD      1.10  (unchanged)
 247       PACK:
 248       - removed G++ specific files from PACK
 249       - added Component Startup variant "C Startup"
 250       - added Pack Checking Utility
 251       - updated conditions to reflect tool-chain dependency
 252       - added Taxonomy for Graphics
 253       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 254     </release>
 255     <!-- release version="4.0.0">
 256       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 257       - CMSIS-Pack     1.1   Preliminary
 258       - CMSIS-DSP      1.4.2 (see revision history for details)
 259       - CMSIS-Core     3.30  (see revision history for details)
 260       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 261       - CMSIS-RTOS API 1.02  (unchanged)
 262       - CMSIS-SVD      1.10  (unchanged)
 263     </release -->
 264     <release version="3.20.4" date="2014-02-20">
 265       - CMSIS-RTOS 4.74 (see revision history for details)
 266       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 267     </release>
 268     <!-- release version="3.20.3">
 269       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 270       - CMSIS-RTOS 4.73 (see revision history for details)
 271     </release -->
 272     <!-- release version="3.20.2">
 273       - CMSIS-Pack documentation has been added
 274       - CMSIS-Drivers header and documentation have been added to PACK
 275       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 276     </release -->
 277     <!-- release version="3.20.1">
 278       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 279       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 280     </release -->
 281     <!-- release version="3.20.0">
 282       The software portions that are deployed in the application program are now under a BSD license which allows usage
 283       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 284       The individual components have been update as listed below:
 285       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 286       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 287       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 288       - CMSIS-SVD is unchanged.
 289     </release -->
 290   </releases>
 291
 292   <taxonomy>
 293     <description Cclass="Audio">Software components for audio processing</description>
 294     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 295     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 296     <description Cclass="Compiler">Compiler Software Extensions</description>
 297     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 298     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 299     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 300     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 301     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 302     <description Cclass="File System">File Drive Support and File System</description>
 303     <description Cclass="IoT Client">IoT cloud client connector</description>
 304     <description Cclass="IoT Utility">IoT specific software utility</description>
 305     <description Cclass="Graphics">Graphical User Interface</description>
 306     <description Cclass="Network">Network Stack using Internet Protocols</description>
 307     <description Cclass="RTOS">Real-time Operating System</description>
 308     <description Cclass="Security">Encryption for secure communication or storage</description>
 309     <description Cclass="USB">Universal Serial Bus Stack</description>
 310     <description Cclass="Utility">Generic software utility components</description>
 311   </taxonomy>
 312
 313   <devices>
 314     <!-- ******************************  Cortex-M0  ****************************** -->
 315     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 316       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 317       <description>
 318 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 319 - simple, easy-to-use programmers model
 320 - highly efficient ultra-low power operation
 321 - excellent code density
 322 - deterministic, high-performance interrupt handling
 323 - upward compatibility with the rest of the Cortex-M processor family.
 324       </description>
 325       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 326       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 327       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 328       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 329
 330       <device Dname="ARMCM0">
 331         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 332         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 333       </device>
 334     </family>
 335
 336     <!-- ******************************  Cortex-M0P  ****************************** -->
 337     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 338       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 339       <description>
 340 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 341 - simple, easy-to-use programmers model
 342 - highly efficient ultra-low power operation
 343 - excellent code density
 344 - deterministic, high-performance interrupt handling
 345 - upward compatibility with the rest of the Cortex-M processor family.
 346       </description>
 347       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 348       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 349       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 350       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 351
 352       <device Dname="ARMCM0P">
 353         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 354         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 355       </device>
 356
 357       <device Dname="ARMCM0P_MPU">
 358         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 359         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 360       </device>
 361     </family>
 362
 363     <!-- ******************************  Cortex-M1  ****************************** -->
 364     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 365       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 366       <description>
 367 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 368 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 369       </description>
 370       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 371       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 372       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 373       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 374
 375       <device Dname="ARMCM1">
 376         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 377         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 378       </device>
 379     </family>
 380
 381     <!-- ******************************  Cortex-M3  ****************************** -->
 382     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 383       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 384       <description>
 385 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 386 - simple, easy-to-use programmers model
 387 - highly efficient ultra-low power operation
 388 - excellent code density
 389 - deterministic, high-performance interrupt handling
 390 - upward compatibility with the rest of the Cortex-M processor family.
 391       </description>
 392       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 393       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 394       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 395       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 396
 397       <device Dname="ARMCM3">
 398         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 399         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 400       </device>
 401     </family>
 402
 403     <!-- ******************************  Cortex-M4  ****************************** -->
 404     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 405       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 406       <description>
 407 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 408 - simple, easy-to-use programmers model
 409 - highly efficient ultra-low power operation
 410 - excellent code density
 411 - deterministic, high-performance interrupt handling
 412 - upward compatibility with the rest of the Cortex-M processor family.
 413       </description>
 414       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 415       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 416       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 417       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 418
 419       <device Dname="ARMCM4">
 420         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 421         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 422       </device>
 423
 424       <device Dname="ARMCM4_FP">
 425         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 426         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 427       </device>
 428     </family>
 429
 430     <!-- ******************************  Cortex-M7  ****************************** -->
 431     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 432       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 433       <description>
 434 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 435 - simple, easy-to-use programmers model
 436 - highly efficient ultra-low power operation
 437 - excellent code density
 438 - deterministic, high-performance interrupt handling
 439 - upward compatibility with the rest of the Cortex-M processor family.
 440       </description>
 441       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 442       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 443       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 444       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 445
 446       <device Dname="ARMCM7">
 447         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 448         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 449       </device>
 450
 451       <device Dname="ARMCM7_SP">
 452         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 453         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 454       </device>
 455
 456       <device Dname="ARMCM7_DP">
 457         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 458         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 459       </device>
 460     </family>
 461
 462     <!-- ******************************  Cortex-M23  ********************** -->
 463     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 464       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 465       <description>
 466 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 467 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 468 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 469       </description>
 470       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 471       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 472       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 473       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 474       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 475       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 476
 477       <device Dname="ARMCM23">
 478         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 479         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 480       </device>
 481
 482       <device Dname="ARMCM23_TZ">
 483         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 484         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 485       </device>
 486     </family>
 487
 488     <!-- ******************************  Cortex-M33  ****************************** -->
 489     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 490       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 491       <description>
 492 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 493 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 494       </description>
 495       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 496       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 497       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 498       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 499       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 500       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 501
 502       <device Dname="ARMCM33">
 503         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 504         <description>
 505           no DSP Instructions, no Floating Point Unit, no TrustZone
 506         </description>
 507         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 508       </device>
 509
 510       <device Dname="ARMCM33_TZ">
 511         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 512         <description>
 513           no DSP Instructions, no Floating Point Unit, TrustZone
 514         </description>
 515         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 516       </device>
 517
 518       <device Dname="ARMCM33_DSP_FP">
 519         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 520         <description>
 521           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 522         </description>
 523         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 524       </device>
 525
 526       <device Dname="ARMCM33_DSP_FP_TZ">
 527         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 528         <description>
 529           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 530         </description>
 531         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 532       </device>
 533     </family>
 534
 535     <!-- ******************************  Cortex-M35P  ****************************** -->
 536     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 537       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 538       <description>
 539 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 540 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 541       </description>
 542
 543       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 544       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 545       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 546       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 547       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 548       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 549
 550       <device Dname="ARMCM35P">
 551         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 552         <description>
 553           no DSP Instructions, no Floating Point Unit, no TrustZone
 554         </description>
 555         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 556       </device>
 557
 558       <device Dname="ARMCM35P_TZ">
 559         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 560         <description>
 561           no DSP Instructions, no Floating Point Unit, TrustZone
 562         </description>
 563         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 564       </device>
 565
 566       <device Dname="ARMCM35P_DSP_FP">
 567         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 568         <description>
 569           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 570         </description>
 571         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 572       </device>
 573
 574       <device Dname="ARMCM35P_DSP_FP_TZ">
 575         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 576         <description>
 577           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 578         </description>
 579         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 580       </device>
 581     </family>
 582
 583     <!-- ******************************  ARMSC000  ****************************** -->
 584     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 585       <description>
 586 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 587 - simple, easy-to-use programmers model
 588 - highly efficient ultra-low power operation
 589 - excellent code density
 590 - deterministic, high-performance interrupt handling
 591       </description>
 592       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 593       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 594       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 595       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 596
 597       <device Dname="ARMSC000">
 598         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 599         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 600       </device>
 601     </family>
 602
 603     <!-- ******************************  ARMSC300  ****************************** -->
 604     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 605       <description>
 606 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 607 - simple, easy-to-use programmers model
 608 - highly efficient ultra-low power operation
 609 - excellent code density
 610 - deterministic, high-performance interrupt handling
 611       </description>
 612       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 613       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 614       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 615       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 616
 617       <device Dname="ARMSC300">
 618         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 619         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 620       </device>
 621     </family>
 622
 623     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 624     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 625       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 626       <description>
 627 Armv8-M Baseline based device with TrustZone
 628       </description>
 629       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 630       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 631       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 632       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 633       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 634       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 635
 636       <device Dname="ARMv8MBL">
 637         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 638         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 639       </device>
 640     </family>
 641
 642     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 643     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 644       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 645       <description>
 646 Armv8-M Mainline based device with TrustZone
 647       </description>
 648       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 649       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 650       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 651       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 652       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 653       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 654
 655       <device Dname="ARMv8MML">
 656         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 657         <description>
 658           no DSP Instructions, no Floating Point Unit, TrustZone
 659         </description>
 660         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 661       </device>
 662
 663       <device Dname="ARMv8MML_DSP">
 664         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 665         <description>
 666           DSP Instructions, no Floating Point Unit, TrustZone
 667         </description>
 668         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 669       </device>
 670
 671       <device Dname="ARMv8MML_SP">
 672         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 673         <description>
 674           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 675         </description>
 676         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 677       </device>
 678
 679       <device Dname="ARMv8MML_DSP_SP">
 680         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 681         <description>
 682           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 683         </description>
 684         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 685       </device>
 686
 687       <device Dname="ARMv8MML_DP">
 688         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 689         <description>
 690           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 691         </description>
 692         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 693       </device>
 694
 695       <device Dname="ARMv8MML_DSP_DP">
 696         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 697         <description>
 698           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 699         </description>
 700         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 701       </device>
 702     </family>
 703
 704     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 705     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 706       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 707       <description>
 708 Armv8.1-M Mainline based device with TrustZone and MVE
 709       </description>
 710       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 711       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 712       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 713       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 714       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 715       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 716
 717
 718       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 719         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 720         <description>
 721           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 722         </description>
 723         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 724       </device>
 725     </family>
 726
 727     <!-- ******************************  Cortex-A5  ****************************** -->
 728     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 729       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 730       <description>
 731 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 732 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 733 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 734       </description>
 735
 736       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 737       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 738       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 739       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 740
 741       <device Dname="ARMCA5">
 742         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 743         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 744       </device>
 745     </family>
 746
 747     <!-- ******************************  Cortex-A7  ****************************** -->
 748     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 749       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 750       <description>
 751 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 752 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 753 an optional integrated GIC, and an optional L2 cache controller.
 754       </description>
 755
 756       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 757       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 758       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 759       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 760
 761       <device Dname="ARMCA7">
 762         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 763         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 764       </device>
 765     </family>
 766
 767     <!-- ******************************  Cortex-A9  ****************************** -->
 768     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 769       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 770       <description>
 771 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 772 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 773 and 8-bit Java bytecodes in Jazelle state.
 774       </description>
 775
 776       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 777       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 778       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 779       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 780
 781       <device Dname="ARMCA9">
 782         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 783         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 784       </device>
 785     </family>
 786   </devices>
 787
 788
 789   <apis>
 790     <!-- CMSIS Device API -->
 791     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 792       <description>Device interrupt controller interface</description>
 793       <files>
 794         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 795       </files>
 796     </api>
 797     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 798       <description>RTOS Kernel system tick timer interface</description>
 799       <files>
 800         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 801       </files>
 802     </api>
 803     <!-- CMSIS-RTOS API -->
 804     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 805       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 806       <files>
 807         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 808       </files>
 809     </api>
 810     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 811       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 812       <files>
 813         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 814         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 815       </files>
 816     </api>
 817     <!-- CMSIS Driver API -->
 818     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 819       <description>USART Driver API for Cortex-M</description>
 820       <files>
 821         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 822         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 823       </files>
 824     </api>
 825     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 826       <description>SPI Driver API for Cortex-M</description>
 827       <files>
 828         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 829         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 830       </files>
 831     </api>
 832     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 833       <description>SAI Driver API for Cortex-M</description>
 834       <files>
 835         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 836         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 837       </files>
 838     </api>
 839     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 840       <description>I2C Driver API for Cortex-M</description>
 841       <files>
 842         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 843         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 844       </files>
 845     </api>
 846     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 847       <description>CAN Driver API for Cortex-M</description>
 848       <files>
 849         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 850         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 851       </files>
 852     </api>
 853     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 854       <description>Flash Driver API for Cortex-M</description>
 855       <files>
 856         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 857         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 858       </files>
 859     </api>
 860     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 861       <description>MCI Driver API for Cortex-M</description>
 862       <files>
 863         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 864         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 865       </files>
 866     </api>
 867     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 868       <description>NAND Flash Driver API for Cortex-M</description>
 869       <files>
 870         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 871         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 872       </files>
 873     </api>
 874     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 875       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 876       <files>
 877         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 878         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 879         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 880       </files>
 881     </api>
 882     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 883       <description>Ethernet MAC Driver API for Cortex-M</description>
 884       <files>
 885         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 886         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 887       </files>
 888     </api>
 889     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 890       <description>Ethernet PHY Driver API for Cortex-M</description>
 891       <files>
 892         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 893         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 894       </files>
 895     </api>
 896     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 897       <description>USB Device Driver API for Cortex-M</description>
 898       <files>
 899         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 900         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 901       </files>
 902     </api>
 903     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 904       <description>USB Host Driver API for Cortex-M</description>
 905       <files>
 906         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 907         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 908       </files>
 909     </api>
 910     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0" exclusive="0">
 911       <description>WiFi driver</description>
 912       <files>
 913         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 914         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 915       </files>
 916     </api>
 917   </apis>
 918
 919   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 920   <conditions>
 921     <!-- compiler -->
 922     <condition id="ARMCC6">
 923       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 924       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 925     </condition>
 926     <condition id="ARMCC5">
 927       <require Tcompiler="ARMCC" Toptions="AC5"/>
 928     </condition>
 929     <condition id="ARMCC">
 930       <require Tcompiler="ARMCC"/>
 931     </condition>
 932     <condition id="GCC">
 933       <require Tcompiler="GCC"/>
 934     </condition>
 935     <condition id="IAR">
 936       <require Tcompiler="IAR"/>
 937     </condition>
 938     <condition id="ARMCC GCC">
 939       <accept Tcompiler="ARMCC"/>
 940       <accept Tcompiler="GCC"/>
 941     </condition>
 942     <condition id="ARMCC GCC IAR">
 943       <accept Tcompiler="ARMCC"/>
 944       <accept Tcompiler="GCC"/>
 945       <accept Tcompiler="IAR"/>
 946     </condition>
 947
 948     <!-- Arm architecture -->
 949     <condition id="ARMv6-M Device">
 950       <description>Armv6-M architecture based device</description>
 951       <accept Dcore="Cortex-M0"/>
 952       <accept Dcore="Cortex-M1"/>
 953       <accept Dcore="Cortex-M0+"/>
 954       <accept Dcore="SC000"/>
 955     </condition>
 956     <condition id="ARMv7-M Device">
 957       <description>Armv7-M architecture based device</description>
 958       <accept Dcore="Cortex-M3"/>
 959       <accept Dcore="Cortex-M4"/>
 960       <accept Dcore="Cortex-M7"/>
 961       <accept Dcore="SC300"/>
 962     </condition>
 963     <condition id="ARMv8-M Device">
 964       <description>Armv8-M architecture based device</description>
 965       <accept Dcore="ARMV8MBL"/>
 966       <accept Dcore="ARMV8MML"/>
 967       <accept Dcore="ARMV81MML"/>
 968       <accept Dcore="Cortex-M23"/>
 969       <accept Dcore="Cortex-M33"/>
 970       <accept Dcore="Cortex-M35P"/>
 971     </condition>
 972     <condition id="ARMv8-M TZ Device">
 973       <description>Armv8-M architecture based device with TrustZone</description>
 974       <require condition="ARMv8-M Device"/>
 975       <require Dtz="TZ"/>
 976     </condition>
 977     <condition id="ARMv6_7-M Device">
 978       <description>Armv6_7-M architecture based device</description>
 979       <accept condition="ARMv6-M Device"/>
 980       <accept condition="ARMv7-M Device"/>
 981     </condition>
 982     <condition id="ARMv6_7_8-M Device">
 983       <description>Armv6_7_8-M architecture based device</description>
 984       <accept condition="ARMv6-M Device"/>
 985       <accept condition="ARMv7-M Device"/>
 986       <accept condition="ARMv8-M Device"/>
 987     </condition>
 988     <condition id="ARMv7-A Device">
 989       <description>Armv7-A architecture based device</description>
 990       <accept Dcore="Cortex-A5"/>
 991       <accept Dcore="Cortex-A7"/>
 992       <accept Dcore="Cortex-A9"/>
 993     </condition>
 994
 995     <!-- ARM core -->
 996     <condition id="CM0">
 997       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 998       <accept Dcore="Cortex-M0"/>
 999       <accept Dcore="Cortex-M0+"/>
1000       <accept Dcore="SC000"/>
1001     </condition>
1002     <condition id="CM1">
1003       <description>Cortex-M1</description>
1004       <require Dcore="Cortex-M1"/>
1005     </condition>
1006     <condition id="CM3">
1007       <description>Cortex-M3 or SC300 processor based device</description>
1008       <accept Dcore="Cortex-M3"/>
1009       <accept Dcore="SC300"/>
1010     </condition>
1011     <condition id="CM4">
1012       <description>Cortex-M4 processor based device</description>
1013       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1014     </condition>
1015     <condition id="CM4_FP">
1016       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1017       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1018       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1019       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1020     </condition>
1021     <condition id="CM7">
1022       <description>Cortex-M7 processor based device</description>
1023       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1024     </condition>
1025     <condition id="CM7_FP">
1026       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1027       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1028       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1029     </condition>
1030     <condition id="CM7_SP">
1031       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1032       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1033     </condition>
1034     <condition id="CM7_DP">
1035       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1036       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1037     </condition>
1038     <condition id="CM23">
1039       <description>Cortex-M23 processor based device</description>
1040       <require Dcore="Cortex-M23"/>
1041     </condition>
1042     <condition id="CM33">
1043       <description>Cortex-M33 processor based device</description>
1044       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1045     </condition>
1046     <condition id="CM33_FP">
1047       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1048       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1049     </condition>
1050     <condition id="CM35P">
1051       <description>Cortex-M35P processor based device</description>
1052       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1053     </condition>
1054     <condition id="CM35P_FP">
1055       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1056       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1057     </condition>
1058     <condition id="ARMv8MBL">
1059       <description>Armv8-M Baseline processor based device</description>
1060       <require Dcore="ARMV8MBL"/>
1061     </condition>
1062     <condition id="ARMv8MML">
1063       <description>Armv8-M Mainline processor based device</description>
1064       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1065     </condition>
1066     <condition id="ARMv8MML_FP">
1067       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1068       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1069       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1070     </condition>
1071
1072     <condition id="CM33_NODSP_NOFPU">
1073       <description>CM33, no DSP, no FPU</description>
1074       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1075     </condition>
1076     <condition id="CM33_DSP_NOFPU">
1077       <description>CM33, DSP, no FPU</description>
1078       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1079     </condition>
1080     <condition id="CM33_NODSP_SP">
1081       <description>CM33, no DSP, SP FPU</description>
1082       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1083     </condition>
1084     <condition id="CM33_DSP_SP">
1085       <description>CM33, DSP, SP FPU</description>
1086       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1087     </condition>
1088
1089     <condition id="CM35P_NODSP_NOFPU">
1090       <description>CM35P, no DSP, no FPU</description>
1091       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1092     </condition>
1093     <condition id="CM35P_DSP_NOFPU">
1094       <description>CM35P, DSP, no FPU</description>
1095       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1096     </condition>
1097     <condition id="CM35P_NODSP_SP">
1098       <description>CM35P, no DSP, SP FPU</description>
1099       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1100     </condition>
1101     <condition id="CM35P_DSP_SP">
1102       <description>CM35P, DSP, SP FPU</description>
1103       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1104     </condition>
1105
1106     <condition id="ARMv8MML_NODSP_NOFPU">
1107       <description>Armv8-M Mainline, no DSP, no FPU</description>
1108       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1109     </condition>
1110     <condition id="ARMv8MML_DSP_NOFPU">
1111       <description>Armv8-M Mainline, DSP, no FPU</description>
1112       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1113     </condition>
1114     <condition id="ARMv8MML_NODSP_SP">
1115       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1116       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1117     </condition>
1118     <condition id="ARMv8MML_DSP_SP">
1119       <description>Armv8-M Mainline, DSP, SP FPU</description>
1120       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1121     </condition>
1122
1123     <condition id="CA5_CA9">
1124       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1125       <accept Dcore="Cortex-A5"/>
1126       <accept Dcore="Cortex-A9"/>
1127     </condition>
1128
1129     <condition id="CA7">
1130       <description>Cortex-A7 processor based device</description>
1131       <accept Dcore="Cortex-A7"/>
1132     </condition>
1133
1134     <!-- ARMCC compiler -->
1135     <condition id="CA_ARMCC5">
1136       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1137       <require condition="ARMv7-A Device"/>
1138       <require condition="ARMCC5"/>
1139     </condition>
1140     <condition id="CA_ARMCC6">
1141       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1142       <require condition="ARMv7-A Device"/>
1143       <require condition="ARMCC6"/>
1144     </condition>
1145
1146     <condition id="CM0_ARMCC">
1147       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1148       <require condition="CM0"/>
1149       <require Tcompiler="ARMCC"/>
1150     </condition>
1151     <condition id="CM0_LE_ARMCC">
1152       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1153       <require condition="CM0_ARMCC"/>
1154       <require Dendian="Little-endian"/>
1155     </condition>
1156     <condition id="CM0_BE_ARMCC">
1157       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1158       <require condition="CM0_ARMCC"/>
1159       <require Dendian="Big-endian"/>
1160     </condition>
1161
1162     <condition id="CM1_ARMCC">
1163       <description>Cortex-M1 based device for the Arm Compiler</description>
1164       <require condition="CM1"/>
1165       <require Tcompiler="ARMCC"/>
1166     </condition>
1167     <condition id="CM1_LE_ARMCC">
1168       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1169       <require condition="CM1_ARMCC"/>
1170       <require Dendian="Little-endian"/>
1171     </condition>
1172     <condition id="CM1_BE_ARMCC">
1173       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1174       <require condition="CM1_ARMCC"/>
1175       <require Dendian="Big-endian"/>
1176     </condition>
1177
1178     <condition id="CM3_ARMCC">
1179       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1180       <require condition="CM3"/>
1181       <require Tcompiler="ARMCC"/>
1182     </condition>
1183     <condition id="CM3_LE_ARMCC">
1184       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1185       <require condition="CM3_ARMCC"/>
1186       <require Dendian="Little-endian"/>
1187     </condition>
1188     <condition id="CM3_BE_ARMCC">
1189       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1190       <require condition="CM3_ARMCC"/>
1191       <require Dendian="Big-endian"/>
1192     </condition>
1193
1194     <condition id="CM4_ARMCC">
1195       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1196       <require condition="CM4"/>
1197       <require Tcompiler="ARMCC"/>
1198     </condition>
1199     <condition id="CM4_LE_ARMCC">
1200       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1201       <require condition="CM4_ARMCC"/>
1202       <require Dendian="Little-endian"/>
1203     </condition>
1204     <condition id="CM4_BE_ARMCC">
1205       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1206       <require condition="CM4_ARMCC"/>
1207       <require Dendian="Big-endian"/>
1208     </condition>
1209
1210     <condition id="CM4_FP_ARMCC">
1211       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1212       <require condition="CM4_FP"/>
1213       <require Tcompiler="ARMCC"/>
1214     </condition>
1215     <condition id="CM4_FP_LE_ARMCC">
1216       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1217       <require condition="CM4_FP_ARMCC"/>
1218       <require Dendian="Little-endian"/>
1219     </condition>
1220     <condition id="CM4_FP_BE_ARMCC">
1221       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1222       <require condition="CM4_FP_ARMCC"/>
1223       <require Dendian="Big-endian"/>
1224     </condition>
1225
1226     <condition id="CM7_ARMCC">
1227       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1228       <require condition="CM7"/>
1229       <require Tcompiler="ARMCC"/>
1230     </condition>
1231     <condition id="CM7_LE_ARMCC">
1232       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1233       <require condition="CM7_ARMCC"/>
1234       <require Dendian="Little-endian"/>
1235     </condition>
1236     <condition id="CM7_BE_ARMCC">
1237       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1238       <require condition="CM7_ARMCC"/>
1239       <require Dendian="Big-endian"/>
1240     </condition>
1241
1242     <condition id="CM7_FP_ARMCC">
1243       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1244       <require condition="CM7_FP"/>
1245       <require Tcompiler="ARMCC"/>
1246     </condition>
1247     <condition id="CM7_FP_LE_ARMCC">
1248       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1249       <require condition="CM7_FP_ARMCC"/>
1250       <require Dendian="Little-endian"/>
1251     </condition>
1252     <condition id="CM7_FP_BE_ARMCC">
1253       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1254       <require condition="CM7_FP_ARMCC"/>
1255       <require Dendian="Big-endian"/>
1256     </condition>
1257
1258     <condition id="CM7_SP_ARMCC">
1259       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1260       <require condition="CM7_SP"/>
1261       <require Tcompiler="ARMCC"/>
1262     </condition>
1263     <condition id="CM7_SP_LE_ARMCC">
1264       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1265       <require condition="CM7_SP_ARMCC"/>
1266       <require Dendian="Little-endian"/>
1267     </condition>
1268     <condition id="CM7_SP_BE_ARMCC">
1269       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1270       <require condition="CM7_SP_ARMCC"/>
1271       <require Dendian="Big-endian"/>
1272     </condition>
1273
1274     <condition id="CM7_DP_ARMCC">
1275       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1276       <require condition="CM7_DP"/>
1277       <require Tcompiler="ARMCC"/>
1278     </condition>
1279     <condition id="CM7_DP_LE_ARMCC">
1280       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1281       <require condition="CM7_DP_ARMCC"/>
1282       <require Dendian="Little-endian"/>
1283     </condition>
1284     <condition id="CM7_DP_BE_ARMCC">
1285       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1286       <require condition="CM7_DP_ARMCC"/>
1287       <require Dendian="Big-endian"/>
1288     </condition>
1289
1290     <condition id="CM23_ARMCC">
1291       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1292       <require condition="CM23"/>
1293       <require Tcompiler="ARMCC"/>
1294     </condition>
1295     <condition id="CM23_LE_ARMCC">
1296       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1297       <require condition="CM23_ARMCC"/>
1298       <require Dendian="Little-endian"/>
1299     </condition>
1300
1301     <condition id="CM33_ARMCC">
1302       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1303       <require condition="CM33"/>
1304       <require Tcompiler="ARMCC"/>
1305     </condition>
1306     <condition id="CM33_LE_ARMCC">
1307       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1308       <require condition="CM33_ARMCC"/>
1309       <require Dendian="Little-endian"/>
1310     </condition>
1311
1312     <condition id="CM33_FP_ARMCC">
1313       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1314       <require condition="CM33_FP"/>
1315       <require Tcompiler="ARMCC"/>
1316     </condition>
1317     <condition id="CM33_FP_LE_ARMCC">
1318       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1319       <require condition="CM33_FP_ARMCC"/>
1320       <require Dendian="Little-endian"/>
1321     </condition>
1322
1323     <condition id="CM33_NODSP_NOFPU_ARMCC">
1324       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1325       <require condition="CM33_NODSP_NOFPU"/>
1326       <require Tcompiler="ARMCC"/>
1327     </condition>
1328     <condition id="CM33_DSP_NOFPU_ARMCC">
1329       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1330       <require condition="CM33_DSP_NOFPU"/>
1331       <require Tcompiler="ARMCC"/>
1332     </condition>
1333     <condition id="CM33_NODSP_SP_ARMCC">
1334       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1335       <require condition="CM33_NODSP_SP"/>
1336       <require Tcompiler="ARMCC"/>
1337     </condition>
1338     <condition id="CM33_DSP_SP_ARMCC">
1339       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1340       <require condition="CM33_DSP_SP"/>
1341       <require Tcompiler="ARMCC"/>
1342     </condition>
1343     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1344       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1345       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1346       <require Dendian="Little-endian"/>
1347     </condition>
1348     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1349       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1350       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1351       <require Dendian="Little-endian"/>
1352     </condition>
1353     <condition id="CM33_NODSP_SP_LE_ARMCC">
1354       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1355       <require condition="CM33_NODSP_SP_ARMCC"/>
1356       <require Dendian="Little-endian"/>
1357     </condition>
1358     <condition id="CM33_DSP_SP_LE_ARMCC">
1359       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1360       <require condition="CM33_DSP_SP_ARMCC"/>
1361       <require Dendian="Little-endian"/>
1362     </condition>
1363
1364     <condition id="CM35P_ARMCC">
1365       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1366       <require condition="CM35P"/>
1367       <require Tcompiler="ARMCC"/>
1368     </condition>
1369     <condition id="CM35P_LE_ARMCC">
1370       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1371       <require condition="CM35P_ARMCC"/>
1372       <require Dendian="Little-endian"/>
1373     </condition>
1374
1375     <condition id="CM35P_FP_ARMCC">
1376       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1377       <require condition="CM35P_FP"/>
1378       <require Tcompiler="ARMCC"/>
1379     </condition>
1380     <condition id="CM35P_FP_LE_ARMCC">
1381       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1382       <require condition="CM35P_FP_ARMCC"/>
1383       <require Dendian="Little-endian"/>
1384     </condition>
1385
1386     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1387       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1388       <require condition="CM35P_NODSP_NOFPU"/>
1389       <require Tcompiler="ARMCC"/>
1390     </condition>
1391     <condition id="CM35P_DSP_NOFPU_ARMCC">
1392       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1393       <require condition="CM35P_DSP_NOFPU"/>
1394       <require Tcompiler="ARMCC"/>
1395     </condition>
1396     <condition id="CM35P_NODSP_SP_ARMCC">
1397       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1398       <require condition="CM35P_NODSP_SP"/>
1399       <require Tcompiler="ARMCC"/>
1400     </condition>
1401     <condition id="CM35P_DSP_SP_ARMCC">
1402       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1403       <require condition="CM35P_DSP_SP"/>
1404       <require Tcompiler="ARMCC"/>
1405     </condition>
1406     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1407       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1408       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1409       <require Dendian="Little-endian"/>
1410     </condition>
1411     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1412       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1413       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1414       <require Dendian="Little-endian"/>
1415     </condition>
1416     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1417       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1418       <require condition="CM35P_NODSP_SP_ARMCC"/>
1419       <require Dendian="Little-endian"/>
1420     </condition>
1421     <condition id="CM35P_DSP_SP_LE_ARMCC">
1422       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1423       <require condition="CM35P_DSP_SP_ARMCC"/>
1424       <require Dendian="Little-endian"/>
1425     </condition>
1426
1427     <condition id="ARMv8MBL_ARMCC">
1428       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1429       <require condition="ARMv8MBL"/>
1430       <require Tcompiler="ARMCC"/>
1431     </condition>
1432     <condition id="ARMv8MBL_LE_ARMCC">
1433       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1434       <require condition="ARMv8MBL_ARMCC"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437
1438     <condition id="ARMv8MML_ARMCC">
1439       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1440       <require condition="ARMv8MML"/>
1441       <require Tcompiler="ARMCC"/>
1442     </condition>
1443     <condition id="ARMv8MML_LE_ARMCC">
1444       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1445       <require condition="ARMv8MML_ARMCC"/>
1446       <require Dendian="Little-endian"/>
1447     </condition>
1448
1449     <condition id="ARMv8MML_FP_ARMCC">
1450       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1451       <require condition="ARMv8MML_FP"/>
1452       <require Tcompiler="ARMCC"/>
1453     </condition>
1454     <condition id="ARMv8MML_FP_LE_ARMCC">
1455       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1456       <require condition="ARMv8MML_FP_ARMCC"/>
1457       <require Dendian="Little-endian"/>
1458     </condition>
1459
1460     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1461       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1462       <require condition="ARMv8MML_NODSP_NOFPU"/>
1463       <require Tcompiler="ARMCC"/>
1464     </condition>
1465     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1466       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1467       <require condition="ARMv8MML_DSP_NOFPU"/>
1468       <require Tcompiler="ARMCC"/>
1469     </condition>
1470     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1471       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1472       <require condition="ARMv8MML_NODSP_SP"/>
1473       <require Tcompiler="ARMCC"/>
1474     </condition>
1475     <condition id="ARMv8MML_DSP_SP_ARMCC">
1476       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1477       <require condition="ARMv8MML_DSP_SP"/>
1478       <require Tcompiler="ARMCC"/>
1479     </condition>
1480     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1481       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1482       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1483       <require Dendian="Little-endian"/>
1484     </condition>
1485     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1486       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1487       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1488       <require Dendian="Little-endian"/>
1489     </condition>
1490     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1491       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1492       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1493       <require Dendian="Little-endian"/>
1494     </condition>
1495     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1496       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1497       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1498       <require Dendian="Little-endian"/>
1499     </condition>
1500
1501     <!-- GCC compiler -->
1502     <condition id="CA_GCC">
1503       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1504       <require condition="ARMv7-A Device"/>
1505       <require Tcompiler="GCC"/>
1506     </condition>
1507
1508     <condition id="CM0_GCC">
1509       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1510       <require condition="CM0"/>
1511       <require Tcompiler="GCC"/>
1512     </condition>
1513     <condition id="CM0_LE_GCC">
1514       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1515       <require condition="CM0_GCC"/>
1516       <require Dendian="Little-endian"/>
1517     </condition>
1518     <condition id="CM0_BE_GCC">
1519       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1520       <require condition="CM0_GCC"/>
1521       <require Dendian="Big-endian"/>
1522     </condition>
1523
1524     <condition id="CM1_GCC">
1525       <description>Cortex-M1 based device for the GCC Compiler</description>
1526       <require condition="CM1"/>
1527       <require Tcompiler="GCC"/>
1528     </condition>
1529     <condition id="CM1_LE_GCC">
1530       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1531       <require condition="CM1_GCC"/>
1532       <require Dendian="Little-endian"/>
1533     </condition>
1534     <condition id="CM1_BE_GCC">
1535       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1536       <require condition="CM1_GCC"/>
1537       <require Dendian="Big-endian"/>
1538     </condition>
1539
1540     <condition id="CM3_GCC">
1541       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1542       <require condition="CM3"/>
1543       <require Tcompiler="GCC"/>
1544     </condition>
1545     <condition id="CM3_LE_GCC">
1546       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1547       <require condition="CM3_GCC"/>
1548       <require Dendian="Little-endian"/>
1549     </condition>
1550     <condition id="CM3_BE_GCC">
1551       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1552       <require condition="CM3_GCC"/>
1553       <require Dendian="Big-endian"/>
1554     </condition>
1555
1556     <condition id="CM4_GCC">
1557       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1558       <require condition="CM4"/>
1559       <require Tcompiler="GCC"/>
1560     </condition>
1561     <condition id="CM4_LE_GCC">
1562       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1563       <require condition="CM4_GCC"/>
1564       <require Dendian="Little-endian"/>
1565     </condition>
1566     <condition id="CM4_BE_GCC">
1567       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1568       <require condition="CM4_GCC"/>
1569       <require Dendian="Big-endian"/>
1570     </condition>
1571
1572     <condition id="CM4_FP_GCC">
1573       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1574       <require condition="CM4_FP"/>
1575       <require Tcompiler="GCC"/>
1576     </condition>
1577     <condition id="CM4_FP_LE_GCC">
1578       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1579       <require condition="CM4_FP_GCC"/>
1580       <require Dendian="Little-endian"/>
1581     </condition>
1582     <condition id="CM4_FP_BE_GCC">
1583       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1584       <require condition="CM4_FP_GCC"/>
1585       <require Dendian="Big-endian"/>
1586     </condition>
1587
1588     <condition id="CM7_GCC">
1589       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1590       <require condition="CM7"/>
1591       <require Tcompiler="GCC"/>
1592     </condition>
1593     <condition id="CM7_LE_GCC">
1594       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1595       <require condition="CM7_GCC"/>
1596       <require Dendian="Little-endian"/>
1597     </condition>
1598     <condition id="CM7_BE_GCC">
1599       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1600       <require condition="CM7_GCC"/>
1601       <require Dendian="Big-endian"/>
1602     </condition>
1603
1604     <condition id="CM7_FP_GCC">
1605       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1606       <require condition="CM7_FP"/>
1607       <require Tcompiler="GCC"/>
1608     </condition>
1609     <condition id="CM7_FP_LE_GCC">
1610       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1611       <require condition="CM7_FP_GCC"/>
1612       <require Dendian="Little-endian"/>
1613     </condition>
1614     <condition id="CM7_FP_BE_GCC">
1615       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1616       <require condition="CM7_FP_GCC"/>
1617       <require Dendian="Big-endian"/>
1618     </condition>
1619
1620     <condition id="CM7_SP_GCC">
1621       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1622       <require condition="CM7_SP"/>
1623       <require Tcompiler="GCC"/>
1624     </condition>
1625     <condition id="CM7_SP_LE_GCC">
1626       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1627       <require condition="CM7_SP_GCC"/>
1628       <require Dendian="Little-endian"/>
1629     </condition>
1630
1631     <condition id="CM7_DP_GCC">
1632       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1633       <require condition="CM7_DP"/>
1634       <require Tcompiler="GCC"/>
1635     </condition>
1636     <condition id="CM7_DP_LE_GCC">
1637       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1638       <require condition="CM7_DP_GCC"/>
1639       <require Dendian="Little-endian"/>
1640     </condition>
1641
1642     <condition id="CM23_GCC">
1643       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1644       <require condition="CM23"/>
1645       <require Tcompiler="GCC"/>
1646     </condition>
1647     <condition id="CM23_LE_GCC">
1648       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1649       <require condition="CM23_GCC"/>
1650       <require Dendian="Little-endian"/>
1651     </condition>
1652
1653     <condition id="CM33_GCC">
1654       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1655       <require condition="CM33"/>
1656       <require Tcompiler="GCC"/>
1657     </condition>
1658     <condition id="CM33_LE_GCC">
1659       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1660       <require condition="CM33_GCC"/>
1661       <require Dendian="Little-endian"/>
1662     </condition>
1663
1664     <condition id="CM33_FP_GCC">
1665       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1666       <require condition="CM33_FP"/>
1667       <require Tcompiler="GCC"/>
1668     </condition>
1669     <condition id="CM33_FP_LE_GCC">
1670       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1671       <require condition="CM33_FP_GCC"/>
1672       <require Dendian="Little-endian"/>
1673     </condition>
1674
1675     <condition id="CM33_NODSP_NOFPU_GCC">
1676       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1677       <require condition="CM33_NODSP_NOFPU"/>
1678       <require Tcompiler="GCC"/>
1679     </condition>
1680     <condition id="CM33_DSP_NOFPU_GCC">
1681       <description>CM33, DSP, no FPU, GCC Compiler</description>
1682       <require condition="CM33_DSP_NOFPU"/>
1683       <require Tcompiler="GCC"/>
1684     </condition>
1685     <condition id="CM33_NODSP_SP_GCC">
1686       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1687       <require condition="CM33_NODSP_SP"/>
1688       <require Tcompiler="GCC"/>
1689     </condition>
1690     <condition id="CM33_DSP_SP_GCC">
1691       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1692       <require condition="CM33_DSP_SP"/>
1693       <require Tcompiler="GCC"/>
1694     </condition>
1695     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1696       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1697       <require condition="CM33_NODSP_NOFPU_GCC"/>
1698       <require Dendian="Little-endian"/>
1699     </condition>
1700     <condition id="CM33_DSP_NOFPU_LE_GCC">
1701       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1702       <require condition="CM33_DSP_NOFPU_GCC"/>
1703       <require Dendian="Little-endian"/>
1704     </condition>
1705     <condition id="CM33_NODSP_SP_LE_GCC">
1706       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1707       <require condition="CM33_NODSP_SP_GCC"/>
1708       <require Dendian="Little-endian"/>
1709     </condition>
1710     <condition id="CM33_DSP_SP_LE_GCC">
1711       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1712       <require condition="CM33_DSP_SP_GCC"/>
1713       <require Dendian="Little-endian"/>
1714     </condition>
1715
1716     <condition id="CM35P_GCC">
1717       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1718       <require condition="CM35P"/>
1719       <require Tcompiler="GCC"/>
1720     </condition>
1721     <condition id="CM35P_LE_GCC">
1722       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1723       <require condition="CM35P_GCC"/>
1724       <require Dendian="Little-endian"/>
1725     </condition>
1726
1727     <condition id="CM35P_FP_GCC">
1728       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1729       <require condition="CM35P_FP"/>
1730       <require Tcompiler="GCC"/>
1731     </condition>
1732     <condition id="CM35P_FP_LE_GCC">
1733       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1734       <require condition="CM35P_FP_GCC"/>
1735       <require Dendian="Little-endian"/>
1736     </condition>
1737
1738     <condition id="CM35P_NODSP_NOFPU_GCC">
1739       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1740       <require condition="CM35P_NODSP_NOFPU"/>
1741       <require Tcompiler="GCC"/>
1742     </condition>
1743     <condition id="CM35P_DSP_NOFPU_GCC">
1744       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1745       <require condition="CM35P_DSP_NOFPU"/>
1746       <require Tcompiler="GCC"/>
1747     </condition>
1748     <condition id="CM35P_NODSP_SP_GCC">
1749       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1750       <require condition="CM35P_NODSP_SP"/>
1751       <require Tcompiler="GCC"/>
1752     </condition>
1753     <condition id="CM35P_DSP_SP_GCC">
1754       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1755       <require condition="CM35P_DSP_SP"/>
1756       <require Tcompiler="GCC"/>
1757     </condition>
1758     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1759       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1760       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1761       <require Dendian="Little-endian"/>
1762     </condition>
1763     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1764       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1765       <require condition="CM35P_DSP_NOFPU_GCC"/>
1766       <require Dendian="Little-endian"/>
1767     </condition>
1768     <condition id="CM35P_NODSP_SP_LE_GCC">
1769       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1770       <require condition="CM35P_NODSP_SP_GCC"/>
1771       <require Dendian="Little-endian"/>
1772     </condition>
1773     <condition id="CM35P_DSP_SP_LE_GCC">
1774       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1775       <require condition="CM35P_DSP_SP_GCC"/>
1776       <require Dendian="Little-endian"/>
1777     </condition>
1778
1779     <condition id="ARMv8MBL_GCC">
1780       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1781       <require condition="ARMv8MBL"/>
1782       <require Tcompiler="GCC"/>
1783     </condition>
1784     <condition id="ARMv8MBL_LE_GCC">
1785       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1786       <require condition="ARMv8MBL_GCC"/>
1787       <require Dendian="Little-endian"/>
1788     </condition>
1789
1790     <condition id="ARMv8MML_GCC">
1791       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1792       <require condition="ARMv8MML"/>
1793       <require Tcompiler="GCC"/>
1794     </condition>
1795     <condition id="ARMv8MML_LE_GCC">
1796       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1797       <require condition="ARMv8MML_GCC"/>
1798       <require Dendian="Little-endian"/>
1799     </condition>
1800
1801     <condition id="ARMv8MML_FP_GCC">
1802       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1803       <require condition="ARMv8MML_FP"/>
1804       <require Tcompiler="GCC"/>
1805     </condition>
1806     <condition id="ARMv8MML_FP_LE_GCC">
1807       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1808       <require condition="ARMv8MML_FP_GCC"/>
1809       <require Dendian="Little-endian"/>
1810     </condition>
1811
1812     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1813       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1814       <require condition="ARMv8MML_NODSP_NOFPU"/>
1815       <require Tcompiler="GCC"/>
1816     </condition>
1817     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1818       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1819       <require condition="ARMv8MML_DSP_NOFPU"/>
1820       <require Tcompiler="GCC"/>
1821     </condition>
1822     <condition id="ARMv8MML_NODSP_SP_GCC">
1823       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1824       <require condition="ARMv8MML_NODSP_SP"/>
1825       <require Tcompiler="GCC"/>
1826     </condition>
1827     <condition id="ARMv8MML_DSP_SP_GCC">
1828       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1829       <require condition="ARMv8MML_DSP_SP"/>
1830       <require Tcompiler="GCC"/>
1831     </condition>
1832     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1833       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1834       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1835       <require Dendian="Little-endian"/>
1836     </condition>
1837     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1838       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1839       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1840       <require Dendian="Little-endian"/>
1841     </condition>
1842     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1843       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1844       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1845       <require Dendian="Little-endian"/>
1846     </condition>
1847     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1848       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1849       <require condition="ARMv8MML_DSP_SP_GCC"/>
1850       <require Dendian="Little-endian"/>
1851     </condition>
1852
1853     <!-- IAR compiler -->
1854     <condition id="CA_IAR">
1855       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1856       <require condition="ARMv7-A Device"/>
1857       <require Tcompiler="IAR"/>
1858     </condition>
1859
1860     <condition id="CM0_IAR">
1861       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1862       <require condition="CM0"/>
1863       <require Tcompiler="IAR"/>
1864     </condition>
1865     <condition id="CM0_LE_IAR">
1866       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1867       <require condition="CM0_IAR"/>
1868       <require Dendian="Little-endian"/>
1869     </condition>
1870     <condition id="CM0_BE_IAR">
1871       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1872       <require condition="CM0_IAR"/>
1873       <require Dendian="Big-endian"/>
1874     </condition>
1875
1876     <condition id="CM1_IAR">
1877       <description>Cortex-M1 based device for the IAR Compiler</description>
1878       <require condition="CM1"/>
1879       <require Tcompiler="IAR"/>
1880     </condition>
1881     <condition id="CM1_LE_IAR">
1882       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1883       <require condition="CM1_IAR"/>
1884       <require Dendian="Little-endian"/>
1885     </condition>
1886     <condition id="CM1_BE_IAR">
1887       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1888       <require condition="CM1_IAR"/>
1889       <require Dendian="Big-endian"/>
1890     </condition>
1891
1892     <condition id="CM3_IAR">
1893       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1894       <require condition="CM3"/>
1895       <require Tcompiler="IAR"/>
1896     </condition>
1897     <condition id="CM3_LE_IAR">
1898       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1899       <require condition="CM3_IAR"/>
1900       <require Dendian="Little-endian"/>
1901     </condition>
1902     <condition id="CM3_BE_IAR">
1903       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1904       <require condition="CM3_IAR"/>
1905       <require Dendian="Big-endian"/>
1906     </condition>
1907
1908     <condition id="CM4_IAR">
1909       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1910       <require condition="CM4"/>
1911       <require Tcompiler="IAR"/>
1912     </condition>
1913     <condition id="CM4_LE_IAR">
1914       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1915       <require condition="CM4_IAR"/>
1916       <require Dendian="Little-endian"/>
1917     </condition>
1918     <condition id="CM4_BE_IAR">
1919       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1920       <require condition="CM4_IAR"/>
1921       <require Dendian="Big-endian"/>
1922     </condition>
1923
1924     <condition id="CM4_FP_IAR">
1925       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1926       <require condition="CM4_FP"/>
1927       <require Tcompiler="IAR"/>
1928     </condition>
1929     <condition id="CM4_FP_LE_IAR">
1930       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1931       <require condition="CM4_FP_IAR"/>
1932       <require Dendian="Little-endian"/>
1933     </condition>
1934     <condition id="CM4_FP_BE_IAR">
1935       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1936       <require condition="CM4_FP_IAR"/>
1937       <require Dendian="Big-endian"/>
1938     </condition>
1939
1940     <condition id="CM7_IAR">
1941       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1942       <require condition="CM7"/>
1943       <require Tcompiler="IAR"/>
1944     </condition>
1945     <condition id="CM7_LE_IAR">
1946       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1947       <require condition="CM7_IAR"/>
1948       <require Dendian="Little-endian"/>
1949     </condition>
1950     <condition id="CM7_BE_IAR">
1951       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1952       <require condition="CM7_IAR"/>
1953       <require Dendian="Big-endian"/>
1954     </condition>
1955
1956     <condition id="CM7_FP_IAR">
1957       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1958       <require condition="CM7_FP"/>
1959       <require Tcompiler="IAR"/>
1960     </condition>
1961     <condition id="CM7_FP_LE_IAR">
1962       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1963       <require condition="CM7_FP_IAR"/>
1964       <require Dendian="Little-endian"/>
1965     </condition>
1966     <condition id="CM7_FP_BE_IAR">
1967       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1968       <require condition="CM7_FP_IAR"/>
1969       <require Dendian="Big-endian"/>
1970     </condition>
1971
1972     <condition id="CM7_SP_IAR">
1973       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1974       <require condition="CM7_SP"/>
1975       <require Tcompiler="IAR"/>
1976     </condition>
1977     <condition id="CM7_SP_LE_IAR">
1978       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1979       <require condition="CM7_SP_IAR"/>
1980       <require Dendian="Little-endian"/>
1981     </condition>
1982     <condition id="CM7_SP_BE_IAR">
1983       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1984       <require condition="CM7_SP_IAR"/>
1985       <require Dendian="Big-endian"/>
1986     </condition>
1987
1988     <condition id="CM7_DP_IAR">
1989       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1990       <require condition="CM7_DP"/>
1991       <require Tcompiler="IAR"/>
1992     </condition>
1993     <condition id="CM7_DP_LE_IAR">
1994       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1995       <require condition="CM7_DP_IAR"/>
1996       <require Dendian="Little-endian"/>
1997     </condition>
1998     <condition id="CM7_DP_BE_IAR">
1999       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2000       <require condition="CM7_DP_IAR"/>
2001       <require Dendian="Big-endian"/>
2002     </condition>
2003
2004     <condition id="CM23_IAR">
2005       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2006       <require condition="CM23"/>
2007       <require Tcompiler="IAR"/>
2008     </condition>
2009     <condition id="CM23_LE_IAR">
2010       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2011       <require condition="CM23_IAR"/>
2012       <require Dendian="Little-endian"/>
2013     </condition>
2014
2015     <condition id="CM33_IAR">
2016       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2017       <require condition="CM33"/>
2018       <require Tcompiler="IAR"/>
2019     </condition>
2020     <condition id="CM33_LE_IAR">
2021       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2022       <require condition="CM33_IAR"/>
2023       <require Dendian="Little-endian"/>
2024     </condition>
2025
2026     <condition id="CM33_FP_IAR">
2027       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2028       <require condition="CM33_FP"/>
2029       <require Tcompiler="IAR"/>
2030     </condition>
2031     <condition id="CM33_FP_LE_IAR">
2032       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2033       <require condition="CM33_FP_IAR"/>
2034       <require Dendian="Little-endian"/>
2035     </condition>
2036
2037     <condition id="CM33_NODSP_NOFPU_IAR">
2038       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2039       <require condition="CM33_NODSP_NOFPU"/>
2040       <require Tcompiler="IAR"/>
2041     </condition>
2042     <condition id="CM33_DSP_NOFPU_IAR">
2043       <description>CM33, DSP, no FPU, IAR Compiler</description>
2044       <require condition="CM33_DSP_NOFPU"/>
2045       <require Tcompiler="IAR"/>
2046     </condition>
2047     <condition id="CM33_NODSP_SP_IAR">
2048       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2049       <require condition="CM33_NODSP_SP"/>
2050       <require Tcompiler="IAR"/>
2051     </condition>
2052     <condition id="CM33_DSP_SP_IAR">
2053       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2054       <require condition="CM33_DSP_SP"/>
2055       <require Tcompiler="IAR"/>
2056     </condition>
2057     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2058       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2059       <require condition="CM33_NODSP_NOFPU_IAR"/>
2060       <require Dendian="Little-endian"/>
2061     </condition>
2062     <condition id="CM33_DSP_NOFPU_LE_IAR">
2063       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2064       <require condition="CM33_DSP_NOFPU_IAR"/>
2065       <require Dendian="Little-endian"/>
2066     </condition>
2067     <condition id="CM33_NODSP_SP_LE_IAR">
2068       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2069       <require condition="CM33_NODSP_SP_IAR"/>
2070       <require Dendian="Little-endian"/>
2071     </condition>
2072     <condition id="CM33_DSP_SP_LE_IAR">
2073       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2074       <require condition="CM33_DSP_SP_IAR"/>
2075       <require Dendian="Little-endian"/>
2076     </condition>
2077
2078     <condition id="CM35P_IAR">
2079       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2080       <require condition="CM35P"/>
2081       <require Tcompiler="IAR"/>
2082     </condition>
2083     <condition id="CM35P_LE_IAR">
2084       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2085       <require condition="CM35P_IAR"/>
2086       <require Dendian="Little-endian"/>
2087     </condition>
2088
2089     <condition id="CM35P_FP_IAR">
2090       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2091       <require condition="CM35P_FP"/>
2092       <require Tcompiler="IAR"/>
2093     </condition>
2094     <condition id="CM35P_FP_LE_IAR">
2095       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2096       <require condition="CM35P_FP_IAR"/>
2097       <require Dendian="Little-endian"/>
2098     </condition>
2099
2100     <condition id="CM35P_NODSP_NOFPU_IAR">
2101       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2102       <require condition="CM35P_NODSP_NOFPU"/>
2103       <require Tcompiler="IAR"/>
2104     </condition>
2105     <condition id="CM35P_DSP_NOFPU_IAR">
2106       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2107       <require condition="CM35P_DSP_NOFPU"/>
2108       <require Tcompiler="IAR"/>
2109     </condition>
2110     <condition id="CM35P_NODSP_SP_IAR">
2111       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2112       <require condition="CM35P_NODSP_SP"/>
2113       <require Tcompiler="IAR"/>
2114     </condition>
2115     <condition id="CM35P_DSP_SP_IAR">
2116       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2117       <require condition="CM35P_DSP_SP"/>
2118       <require Tcompiler="IAR"/>
2119     </condition>
2120     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2121       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2122       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2123       <require Dendian="Little-endian"/>
2124     </condition>
2125     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2126       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2127       <require condition="CM35P_DSP_NOFPU_IAR"/>
2128       <require Dendian="Little-endian"/>
2129     </condition>
2130     <condition id="CM35P_NODSP_SP_LE_IAR">
2131       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2132       <require condition="CM35P_NODSP_SP_IAR"/>
2133       <require Dendian="Little-endian"/>
2134     </condition>
2135     <condition id="CM35P_DSP_SP_LE_IAR">
2136       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2137       <require condition="CM35P_DSP_SP_IAR"/>
2138       <require Dendian="Little-endian"/>
2139     </condition>
2140
2141     <condition id="ARMv8MBL_IAR">
2142       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2143       <require condition="ARMv8MBL"/>
2144       <require Tcompiler="IAR"/>
2145     </condition>
2146     <condition id="ARMv8MBL_LE_IAR">
2147       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2148       <require condition="ARMv8MBL_IAR"/>
2149       <require Dendian="Little-endian"/>
2150     </condition>
2151
2152     <condition id="ARMv8MML_IAR">
2153       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2154       <require condition="ARMv8MML"/>
2155       <require Tcompiler="IAR"/>
2156     </condition>
2157     <condition id="ARMv8MML_LE_IAR">
2158       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2159       <require condition="ARMv8MML_IAR"/>
2160       <require Dendian="Little-endian"/>
2161     </condition>
2162
2163     <condition id="ARMv8MML_FP_IAR">
2164       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2165       <require condition="ARMv8MML_FP"/>
2166       <require Tcompiler="IAR"/>
2167     </condition>
2168     <condition id="ARMv8MML_FP_LE_IAR">
2169       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2170       <require condition="ARMv8MML_FP_IAR"/>
2171       <require Dendian="Little-endian"/>
2172     </condition>
2173
2174     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2175       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2176       <require condition="ARMv8MML_NODSP_NOFPU"/>
2177       <require Tcompiler="IAR"/>
2178     </condition>
2179     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2180       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2181       <require condition="ARMv8MML_DSP_NOFPU"/>
2182       <require Tcompiler="IAR"/>
2183     </condition>
2184     <condition id="ARMv8MML_NODSP_SP_IAR">
2185       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2186       <require condition="ARMv8MML_NODSP_SP"/>
2187       <require Tcompiler="IAR"/>
2188     </condition>
2189     <condition id="ARMv8MML_DSP_SP_IAR">
2190       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2191       <require condition="ARMv8MML_DSP_SP"/>
2192       <require Tcompiler="IAR"/>
2193     </condition>
2194     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2195       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2196       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2197       <require Dendian="Little-endian"/>
2198     </condition>
2199     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2200       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2201       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2202       <require Dendian="Little-endian"/>
2203     </condition>
2204     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2205       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2206       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2207       <require Dendian="Little-endian"/>
2208     </condition>
2209     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2210       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2211       <require condition="ARMv8MML_DSP_SP_IAR"/>
2212       <require Dendian="Little-endian"/>
2213     </condition>
2214
2215     <!-- conditions selecting single devices and CMSIS Core -->
2216     <condition id="ARMCM0 CMSIS">
2217       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2218       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2219       <require Cclass="CMSIS" Cgroup="CORE"/>
2220     </condition>
2221
2222     <condition id="ARMCM0+ CMSIS">
2223       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2224       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2225       <require Cclass="CMSIS" Cgroup="CORE"/>
2226     </condition>
2227
2228     <condition id="ARMCM1 CMSIS">
2229       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2230       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2231       <require Cclass="CMSIS" Cgroup="CORE"/>
2232     </condition>
2233
2234     <condition id="ARMCM3 CMSIS">
2235       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2236       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2237       <require Cclass="CMSIS" Cgroup="CORE"/>
2238     </condition>
2239
2240     <condition id="ARMCM4 CMSIS">
2241       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2242       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2243       <require Cclass="CMSIS" Cgroup="CORE"/>
2244     </condition>
2245
2246     <condition id="ARMCM7 CMSIS">
2247       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2248       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2249       <require Cclass="CMSIS" Cgroup="CORE"/>
2250     </condition>
2251
2252     <condition id="ARMCM23 CMSIS">
2253       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2254       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2255       <require Cclass="CMSIS" Cgroup="CORE"/>
2256     </condition>
2257
2258     <condition id="ARMCM33 CMSIS">
2259       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2260       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2261       <require Cclass="CMSIS" Cgroup="CORE"/>
2262     </condition>
2263
2264     <condition id="ARMCM35P CMSIS">
2265       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2266       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2267       <require Cclass="CMSIS" Cgroup="CORE"/>
2268     </condition>
2269
2270     <condition id="ARMSC000 CMSIS">
2271       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2272       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2273       <require Cclass="CMSIS" Cgroup="CORE"/>
2274     </condition>
2275
2276     <condition id="ARMSC300 CMSIS">
2277       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2278       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2279       <require Cclass="CMSIS" Cgroup="CORE"/>
2280     </condition>
2281
2282     <condition id="ARMv8MBL CMSIS">
2283       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2284       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2285       <require Cclass="CMSIS" Cgroup="CORE"/>
2286     </condition>
2287
2288     <condition id="ARMv8MML CMSIS">
2289       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2290       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2291       <require Cclass="CMSIS" Cgroup="CORE"/>
2292     </condition>
2293
2294     <condition id="ARMv81MML CMSIS">
2295       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2296       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2297       <require Cclass="CMSIS" Cgroup="CORE"/>
2298     </condition>
2299
2300     <condition id="ARMCA5 CMSIS">
2301       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2302       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2303       <require Cclass="CMSIS" Cgroup="CORE"/>
2304     </condition>
2305
2306     <condition id="ARMCA7 CMSIS">
2307       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2308       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2309       <require Cclass="CMSIS" Cgroup="CORE"/>
2310     </condition>
2311
2312     <condition id="ARMCA9 CMSIS">
2313       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2314       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2315       <require Cclass="CMSIS" Cgroup="CORE"/>
2316     </condition>
2317
2318     <!-- CMSIS DSP -->
2319     <condition id="CMSIS DSP">
2320       <description>Components required for DSP</description>
2321       <require condition="ARMv6_7_8-M Device"/>
2322       <require condition="ARMCC GCC IAR"/>
2323       <require Cclass="CMSIS" Cgroup="CORE"/>
2324     </condition>
2325
2326     <!-- CMSIS NN -->
2327     <condition id="CMSIS NN">
2328       <description>Components required for NN</description>
2329       <require condition="CMSIS DSP"/>
2330     </condition>
2331
2332     <!-- RTOS RTX -->
2333     <condition id="RTOS RTX">
2334       <description>Components required for RTOS RTX</description>
2335       <require condition="ARMv6_7-M Device"/>
2336       <require condition="ARMCC GCC IAR"/>
2337       <require Cclass="Device" Cgroup="Startup"/>
2338       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2339     </condition>
2340     <condition id="RTOS RTX IFX">
2341       <description>Components required for RTOS RTX IFX</description>
2342       <require condition="ARMv6_7-M Device"/>
2343       <require condition="ARMCC GCC IAR"/>
2344       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2345       <require Cclass="Device" Cgroup="Startup"/>
2346       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2347     </condition>
2348     <condition id="RTOS RTX5">
2349       <description>Components required for RTOS RTX5</description>
2350       <require condition="ARMv6_7_8-M Device"/>
2351       <require condition="ARMCC GCC IAR"/>
2352       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2353     </condition>
2354     <condition id="RTOS2 RTX5">
2355       <description>Components required for RTOS2 RTX5</description>
2356       <require condition="ARMv6_7_8-M Device"/>
2357       <require condition="ARMCC GCC IAR"/>
2358       <require Cclass="CMSIS"  Cgroup="CORE"/>
2359       <require Cclass="Device" Cgroup="Startup"/>
2360     </condition>
2361     <condition id="RTOS2 RTX5 v7-A">
2362       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2363       <require condition="ARMv7-A Device"/>
2364       <require condition="ARMCC GCC IAR"/>
2365       <require Cclass="CMSIS"  Cgroup="CORE"/>
2366       <require Cclass="Device" Cgroup="Startup"/>
2367       <require Cclass="Device" Cgroup="OS Tick"/>
2368       <require Cclass="Device" Cgroup="IRQ Controller"/>
2369     </condition>
2370     <condition id="RTOS2 RTX5 Lib">
2371       <description>Components required for RTOS2 RTX5 Library</description>
2372       <require condition="ARMv6_7_8-M Device"/>
2373       <require condition="ARMCC GCC IAR"/>
2374       <require Cclass="CMSIS"  Cgroup="CORE"/>
2375       <require Cclass="Device" Cgroup="Startup"/>
2376     </condition>
2377     <condition id="RTOS2 RTX5 NS">
2378       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2379       <require condition="ARMv8-M TZ Device"/>
2380       <require condition="ARMCC GCC IAR"/>
2381       <require Cclass="CMSIS"  Cgroup="CORE"/>
2382       <require Cclass="Device" Cgroup="Startup"/>
2383     </condition>
2384
2385     <!-- OS Tick -->
2386     <condition id="OS Tick PTIM">
2387       <description>Components required for OS Tick Private Timer</description>
2388       <require condition="CA5_CA9"/>
2389       <require Cclass="Device" Cgroup="IRQ Controller"/>
2390     </condition>
2391
2392     <condition id="OS Tick GTIM">
2393       <description>Components required for OS Tick Generic Physical Timer</description>
2394       <require condition="CA7"/>
2395       <require Cclass="Device" Cgroup="IRQ Controller"/>
2396     </condition>
2397
2398   </conditions>
2399
2400   <components>
2401     <!-- CMSIS-Core component -->
2402     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2403       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2404       <files>
2405         <!-- CPU independent -->
2406         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2407         <file category="include" name="CMSIS/Core/Include/"/>
2408         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2409         <!-- Code template -->
2410         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2411         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2412       </files>
2413     </component>
2414
2415     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2416       <description>CMSIS-CORE for Cortex-A</description>
2417       <files>
2418         <!-- CPU independent -->
2419         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2420         <file category="include" name="CMSIS/Core_A/Include/"/>
2421       </files>
2422     </component>
2423
2424     <!-- CMSIS-Startup components -->
2425     <!-- Cortex-M0 -->
2426     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM0 CMSIS">
2427       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2428       <files>
2429         <!-- include folder / device header file -->
2430         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2431         <!-- startup / system file -->
2432         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.1" attr="config"/>
2433         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2434         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2435         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2436         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2437       </files>
2438     </component>
2439     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM0 CMSIS">
2440       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2441       <files>
2442         <!-- include folder / device header file -->
2443         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2444         <!-- startup / system file -->
2445         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2446         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2447         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2448         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2449         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2450       </files>
2451     </component>
2452
2453     <!-- Cortex-M0+ -->
2454     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM0+ CMSIS">
2455       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2456       <files>
2457         <!-- include folder / device header file -->
2458         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2459         <!-- startup / system file -->
2460         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.1" attr="config"/>
2461         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2462         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2463         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2464         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2465       </files>
2466     </component>
2467     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM0+ CMSIS">
2468       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2469       <files>
2470         <!-- include folder / device header file -->
2471         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2472         <!-- startup / system file -->
2473         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2474         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2475         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2476         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2477         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2478       </files>
2479     </component>
2480
2481     <!-- Cortex-M1 -->
2482     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM1 CMSIS">
2483       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2484       <files>
2485         <!-- include folder / device header file -->
2486         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2487         <!-- startup / system file -->
2488         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.1" attr="config"/>
2489         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2490         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2491         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2492         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2493       </files>
2494     </component>
2495     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM1 CMSIS">
2496       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2497       <files>
2498         <!-- include folder / device header file -->
2499         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2500         <!-- startup / system file -->
2501         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2502         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2503         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2504         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2505         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2506       </files>
2507     </component>
2508
2509     <!-- Cortex-M3 -->
2510     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM3 CMSIS">
2511       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2512       <files>
2513         <!-- include folder / device header file -->
2514         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2515         <!-- startup / system file -->
2516         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.1" attr="config"/>
2517         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2518         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2519         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2520         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2521       </files>
2522     </component>
2523     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM3 CMSIS">
2524       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2525       <files>
2526         <!-- include folder / device header file -->
2527         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2528         <!-- startup / system file -->
2529         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2530         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2531         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2532         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2533         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2534       </files>
2535     </component>
2536
2537     <!-- Cortex-M4 -->
2538     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM4 CMSIS">
2539       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2540       <files>
2541         <!-- include folder / device header file -->
2542         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2543         <!-- startup / system file -->
2544         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.1" attr="config"/>
2545         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2546         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2547         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2548        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2549       </files>
2550     </component>
2551     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM4 CMSIS">
2552       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2553       <files>
2554         <!-- include folder / device header file -->
2555         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2556         <!-- startup / system file -->
2557         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2558         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2559         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2560         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2561         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2562       </files>
2563     </component>
2564
2565     <!-- Cortex-M7 -->
2566     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM7 CMSIS">
2567       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2568       <files>
2569         <!-- include folder / device header file -->
2570         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2571         <!-- startup / system file -->
2572         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.1" attr="config"/>
2573         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2574         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2575         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2576         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2577       </files>
2578     </component>
2579     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM7 CMSIS">
2580       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2581       <files>
2582         <!-- include folder / device header file -->
2583         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2584         <!-- startup / system file -->
2585         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2586         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2587         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2588         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2589         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2590       </files>
2591     </component>
2592
2593     <!-- Cortex-M23 -->
2594     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM23 CMSIS">
2595       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2596       <files>
2597         <!-- include folder / device header file -->
2598         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2599         <!-- startup / system file -->
2600         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.1" attr="config"/>
2601         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2602         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2603         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.0" attr="config"/>
2604         <!-- SAU configuration -->
2605         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2606       </files>
2607     </component>
2608     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.1" condition="ARMCM23 CMSIS">
2609       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2610       <files>
2611         <!-- include folder / device header file -->
2612         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2613         <!-- startup / system file -->
2614         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2615         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2616         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2617         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2618         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2619         <!-- SAU configuration -->
2620         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2621       </files>
2622     </component>
2623
2624     <!-- Cortex-M33 -->
2625     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM33 CMSIS">
2626       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2627       <files>
2628         <!-- include folder / device header file -->
2629         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2630         <!-- startup / system file -->
2631         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.1" attr="config"/>
2632         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2633         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2634         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2635         <!-- SAU configuration -->
2636         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2637       </files>
2638     </component>
2639     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM33 CMSIS">
2640       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2641       <files>
2642         <!-- include folder / device header file -->
2643         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2644         <!-- startup / system file -->
2645         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2646         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2647         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2648         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2649         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2650         <!-- SAU configuration -->
2651         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2652       </files>
2653     </component>
2654
2655     <!-- Cortex-M35P -->
2656     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM35P CMSIS">
2657       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2658       <files>
2659         <!-- include folder / device header file -->
2660         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2661         <!-- startup / system file -->
2662         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.1" attr="config"/>
2663         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2664         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2665         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2666         <!-- SAU configuration -->
2667         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2668       </files>
2669     </component>
2670     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.1" condition="ARMCM35P CMSIS">
2671       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2672       <files>
2673         <!-- include folder / device header file -->
2674         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2675         <!-- startup / system file -->
2676         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2677         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2678         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2679         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2680         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2681         <!-- SAU configuration -->
2682         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2683       </files>
2684     </component>
2685
2686     <!-- Cortex-SC000 -->
2687     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMSC000 CMSIS">
2688       <description>System and Startup for Generic Arm SC000 device</description>
2689       <files>
2690         <!-- include folder / device header file -->
2691         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2692         <!-- startup / system file -->
2693         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.1" attr="config"/>
2694         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2695         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2696         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2697         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2698       </files>
2699     </component>
2700     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMSC000 CMSIS">
2701       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2702       <files>
2703         <!-- include folder / device header file -->
2704         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2705         <!-- startup / system file -->
2706         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2707         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2708         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2709         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2710         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2711       </files>
2712     </component>
2713
2714     <!-- Cortex-SC300 -->
2715     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMSC300 CMSIS">
2716       <description>System and Startup for Generic Arm SC300 device</description>
2717       <files>
2718         <!-- include folder / device header file -->
2719         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2720         <!-- startup / system file -->
2721         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.1" attr="config"/>
2722         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2723         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2724         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2725         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2726       </files>
2727     </component>
2728     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMSC300 CMSIS">
2729       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2730       <files>
2731         <!-- include folder / device header file -->
2732         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2733         <!-- startup / system file -->
2734         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2735         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2736         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2737         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2738         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2739       </files>
2740     </component>
2741
2742     <!-- ARMv8MBL -->
2743     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMv8MBL CMSIS">
2744       <description>System and Startup for Generic Armv8-M Baseline device</description>
2745       <files>
2746         <!-- include folder / device header file -->
2747         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2748         <!-- startup / system file -->
2749         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.1" attr="config"/>
2750         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2751         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2752         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.0" attr="config"/>
2753         <!-- SAU configuration -->
2754         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2755       </files>
2756     </component>
2757     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.1" condition="ARMv8MBL CMSIS">
2758       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2759       <files>
2760         <!-- include folder / device header file -->
2761         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2762         <!-- startup / system file -->
2763         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2764         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2765         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2766         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2767         <!-- SAU configuration -->
2768         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2769       </files>
2770     </component>
2771
2772     <!-- ARMv8MML -->
2773     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMv8MML CMSIS">
2774       <description>System and Startup for Generic Armv8-M Mainline device</description>
2775       <files>
2776         <!-- include folder / device header file -->
2777         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2778         <!-- startup / system file -->
2779         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.1" attr="config"/>
2780         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2781         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2782         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2783         <!-- SAU configuration -->
2784         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2785       </files>
2786     </component>
2787     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMv8MML CMSIS">
2788       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2789       <files>
2790         <!-- include folder / device header file -->
2791         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2792         <!-- startup / system file -->
2793         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2794         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2795         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2796         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2797         <!-- SAU configuration -->
2798         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2799       </files>
2800     </component>
2801
2802     <!-- ARMv81MML -->
2803     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv81MML CMSIS">
2804       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2805       <files>
2806         <!-- include folder / device header file -->
2807         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2808         <!-- startup / system file -->
2809         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.1" attr="config"/>
2810         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2811         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
2812         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.1.0" attr="config"/>
2813         <!-- SAU configuration -->
2814         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2815       </files>
2816     </component>
2817
2818     <!-- Cortex-A5 -->
2819     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2820       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2821       <files>
2822         <!-- include folder / device header file -->
2823         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2824         <!-- startup / system / mmu files -->
2825         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2826         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2827         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2828         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2829         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2830         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2831         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2832         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2833         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2834         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2835         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2836         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2837
2838       </files>
2839     </component>
2840
2841     <!-- Cortex-A7 -->
2842     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2843       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2844       <files>
2845         <!-- include folder / device header file -->
2846         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2847         <!-- startup / system / mmu files -->
2848         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2849         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2850         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2851         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2852         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2853         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2854         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2855         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2856         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2857         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2858         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2859         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2860       </files>
2861     </component>
2862
2863     <!-- Cortex-A9 -->
2864     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2865       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2866       <files>
2867         <!-- include folder / device header file -->
2868         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2869         <!-- startup / system / mmu files -->
2870         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2871         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2872         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2873         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2874         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2875         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2876         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2877         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2878         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2879         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2880         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2881         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2882       </files>
2883     </component>
2884
2885     <!-- IRQ Controller -->
2886     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2887       <description>IRQ Controller implementation using GIC</description>
2888       <files>
2889         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2890       </files>
2891     </component>
2892
2893     <!-- OS Tick -->
2894     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2895       <description>OS Tick implementation using Private Timer</description>
2896       <files>
2897         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2898       </files>
2899     </component>
2900
2901     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2902       <description>OS Tick implementation using Generic Physical Timer</description>
2903       <files>
2904         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2905       </files>
2906     </component>
2907
2908     <!-- CMSIS-DSP component -->
2909     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.7.0" isDefaultVariant="true" condition="CMSIS DSP">
2910       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2911       <files>
2912         <!-- CPU independent -->
2913         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2914         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2915
2916         <!-- CPU and Compiler dependent -->
2917         <!-- ARMCC -->
2918         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2919         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2920         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2921         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2922         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2923         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2924         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2925         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2926         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2927         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2928         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2929         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2930         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2931         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2932         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2933         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2934
2935         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2936         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2937         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2938         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2939         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2940         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2941         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2942         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2943         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2944         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2945         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2946         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2947         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2948         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2949         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2950         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2951
2952         <!-- GCC -->
2953         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2954         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2955         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2956         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2957         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2958         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2959         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2960         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2961
2962         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2963         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2964         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2965         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2966         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2967         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2968         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2969         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2970         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2971         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2972         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2973         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2974         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2975         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2976         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2977         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2978
2979         <!-- IAR -->
2980         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2981         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2982         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2983         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2984         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2985         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2986         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2987         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2988         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2989         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2990         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2991         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2992         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2993         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2994         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
2995         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
2996
2997         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2998         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2999         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3000         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3001         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3002         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3003         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3004         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3005         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3006         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3007         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3008         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3009         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3010         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3011         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3012         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3013
3014       </files>
3015     </component>
3016     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.7.0" condition="CMSIS DSP">
3017       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3018       <files>
3019         <!-- CPU independent -->
3020         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3021         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3022
3023         <!-- DSP sources (core) -->
3024         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3025         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3026         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3027         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3028         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3029         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3030         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3031         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3032         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3033         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3034
3035       </files>
3036     </component>
3037
3038     <!-- CMSIS-NN component -->
3039     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.2.0" condition="CMSIS NN">
3040       <description>CMSIS-NN Neural Network Library</description>
3041       <files>
3042         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3043         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3044
3045         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3046         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3047         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3048         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3049
3050         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3051         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3052         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3053         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3054         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3055         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3056         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3057         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3058         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3059         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3060         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3061         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3062         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3063
3064         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3065         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3066         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3067         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3068         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3069         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3070
3071         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3072         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3073         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3074         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3075         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3076
3077         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3078
3079         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3080         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3081       </files>
3082     </component>
3083
3084     <!-- CMSIS-RTOS Keil RTX component -->
3085     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3086       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3087       <RTE_Components_h>
3088         <!-- the following content goes into file 'RTE_Components.h' -->
3089         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3090         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3091       </RTE_Components_h>
3092       <files>
3093         <!-- CPU independent -->
3094         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3095         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3096         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3097
3098         <!-- RTX templates -->
3099         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3100         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3101         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3102         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3103         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3104         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3105         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3106         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3107         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3108         <!-- tool-chain specific template file -->
3109         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3110         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3111         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3112
3113         <!-- CPU and Compiler dependent -->
3114         <!-- ARMCC -->
3115         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3116         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3117         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3118         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3119         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3120         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3121         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3122         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3123         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3124         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3125         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3126         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3127         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3128         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3129         <!-- GCC -->
3130         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3131         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3132         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3133         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3134         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3135         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3136         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3137         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3138         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3139         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3140         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3141         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3142         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3143         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3144         <!-- IAR -->
3145         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3146         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3147         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3148         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3149         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3150         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3151         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3152         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3153         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3154         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3155         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3156         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3157         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3158         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3159       </files>
3160     </component>
3161     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3162     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3163       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3164       <RTE_Components_h>
3165         <!-- the following content goes into file 'RTE_Components.h' -->
3166         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3167         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3168       </RTE_Components_h>
3169       <files>
3170         <!-- CPU independent -->
3171         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3172         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3173         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3174
3175         <!-- RTX templates -->
3176         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3177         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3178         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3179         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3180         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3181         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3182         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3183         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3184         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3185         <!-- tool-chain specific template file -->
3186         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3187         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3188         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3189
3190         <!-- CPU and Compiler dependent -->
3191         <!-- ARMCC -->
3192         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3193         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3194         <!-- GCC -->
3195         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3196         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3197         <!-- IAR -->
3198       </files>
3199     </component>
3200
3201     <!-- CMSIS-RTOS Keil RTX5 component -->
3202     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.1" Capiversion="1.0.0" condition="RTOS RTX5">
3203       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3204       <RTE_Components_h>
3205         <!-- the following content goes into file 'RTE_Components.h' -->
3206         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3207         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3208       </RTE_Components_h>
3209       <files>
3210         <!-- RTX header file -->
3211         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3212         <!-- RTX compatibility module for API V1 -->
3213         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3214       </files>
3215     </component>
3216
3217     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3218     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3219       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3220       <RTE_Components_h>
3221         <!-- the following content goes into file 'RTE_Components.h' -->
3222         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3223         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3224       </RTE_Components_h>
3225       <files>
3226         <!-- RTX documentation -->
3227         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3228
3229         <!-- RTX header files -->
3230         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3231
3232         <!-- RTX configuration -->
3233         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3234         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3235
3236         <!-- RTX templates -->
3237         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3238         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3239         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3240         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3241         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3242         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3243         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3244         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3245         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3246         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3247
3248         <!-- RTX library configuration -->
3249         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3250
3251         <!-- RTX libraries (CPU and Compiler dependent) -->
3252         <!-- ARMCC -->
3253         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3254         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3255         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3256         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3257         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3258         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3259         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3260         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3261         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3262         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3263         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3264         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3265         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3266         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3267         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3268         <!-- GCC -->
3269         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3270         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3271         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3272         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3273         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3274         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3275         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3276         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3277         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3278         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3279         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3280         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3281         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3282         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3283         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3284         <!-- IAR -->
3285         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3286         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3287         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3288         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3289         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3290         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3291         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3292         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3293         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3294         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3295         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3296         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3297         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3298         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3299         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3300       </files>
3301     </component>
3302     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3303       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3304       <RTE_Components_h>
3305         <!-- the following content goes into file 'RTE_Components.h' -->
3306         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3307         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3308         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3309       </RTE_Components_h>
3310       <files>
3311         <!-- RTX documentation -->
3312         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3313
3314         <!-- RTX header files -->
3315         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3316
3317         <!-- RTX configuration -->
3318         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3319         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3320
3321         <!-- RTX templates -->
3322         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3323         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3324         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3325         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3326         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3327         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3328         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3329         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3330         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3331         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3332
3333         <!-- RTX library configuration -->
3334         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3335
3336         <!-- RTX libraries (CPU and Compiler dependent) -->
3337         <!-- ARMCC -->
3338         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3339         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3340         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3341         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3342         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3343         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3344         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3345         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3346         <!-- GCC -->
3347         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3348         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3349         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3350         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3351         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3352         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3353         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3354         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3355         <!-- IAR -->
3356         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3357         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3358         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3359         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3360         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3361         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3362         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3363         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3364       </files>
3365     </component>
3366     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5">
3367       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3368       <RTE_Components_h>
3369         <!-- the following content goes into file 'RTE_Components.h' -->
3370         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3371         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3372         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3373       </RTE_Components_h>
3374       <files>
3375         <!-- RTX documentation -->
3376         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3377
3378         <!-- RTX header files -->
3379         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3380
3381         <!-- RTX configuration -->
3382         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3383         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3384
3385         <!-- RTX templates -->
3386         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3387         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3388         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3389         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3390         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3391         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3392         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3393         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3394         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3395         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3396
3397         <!-- RTX sources (core) -->
3398         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3399         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3400         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3401         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3402         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3403         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3404         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3405         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3406         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3407         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3409         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3410         <!-- RTX sources (library configuration) -->
3411         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3412         <!-- RTX sources (handlers ARMCC) -->
3413         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3414         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3415         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3416         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3418         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3420         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3421         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3422         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3423         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3424         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3425         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3426         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3427         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3428         <!-- RTX sources (handlers GCC) -->
3429         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3430         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3431         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3432         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3433         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3434         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3435         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3436         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3437         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3438         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3439         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3440         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3441         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3442         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3443         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3444         <!-- RTX sources (handlers IAR) -->
3445         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3446         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3447         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3448         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3449         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3450         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3451         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3452         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3453         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3454         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3455         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3456         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3457         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3458         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3459         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3460         <!-- OS Tick (SysTick) -->
3461         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3462       </files>
3463     </component>
3464     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3465       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3466       <RTE_Components_h>
3467         <!-- the following content goes into file 'RTE_Components.h' -->
3468         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3469         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3470         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3471       </RTE_Components_h>
3472       <files>
3473         <!-- RTX documentation -->
3474         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3475
3476         <!-- RTX header files -->
3477         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3478
3479         <!-- RTX configuration -->
3480         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3481         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3482
3483         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3484
3485         <!-- RTX templates -->
3486         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3487         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3488         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3489         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3490         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3491         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3492         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3493         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3494         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3495         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3496
3497         <!-- RTX sources (core) -->
3498         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3499         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3500         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3501         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3502         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3503         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3504         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3505         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3506         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3507         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3508         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3509         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3510         <!-- RTX sources (library configuration) -->
3511         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3512         <!-- RTX sources (handlers ARMCC) -->
3513         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3514         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3515         <!-- RTX sources (handlers GCC) -->
3516         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3517         <!-- RTX sources (handlers IAR) -->
3518         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3519       </files>
3520     </component>
3521     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3522       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3523       <RTE_Components_h>
3524         <!-- the following content goes into file 'RTE_Components.h' -->
3525         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3526         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3527         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3528         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3529       </RTE_Components_h>
3530       <files>
3531         <!-- RTX documentation -->
3532         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3533
3534         <!-- RTX header files -->
3535         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3536
3537         <!-- RTX configuration -->
3538         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3539         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3540
3541         <!-- RTX templates -->
3542         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3543         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3544         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3545         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3546         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3547         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3548         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3549         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3550         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3551         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3552
3553         <!-- RTX sources (core) -->
3554         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3555         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3556         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3557         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3558         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3559         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3560         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3561         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3562         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3563         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3564         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3565         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3566         <!-- RTX sources (library configuration) -->
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3568         <!-- RTX sources (ARMCC handlers) -->
3569         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3571         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3577         <!-- RTX sources (GCC handlers) -->
3578         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3586         <!-- RTX sources (IAR handlers) -->
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3595         <!-- OS Tick (SysTick) -->
3596         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3597       </files>
3598     </component>
3599
3600     <!-- CMSIS-Driver Custom components -->
3601     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3602       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3603       <files>
3604         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3605         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3606       </files>
3607     </component>
3608     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3609       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3610       <files>
3611         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3612         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3613       </files>
3614     </component>
3615     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3616       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3617       <files>
3618         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3619         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3620       </files>
3621     </component>
3622     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3623       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3624       <files>
3625         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3626         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3627       </files>
3628     </component>
3629     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3630       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3631       <files>
3632         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3633         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3634       </files>
3635     </component>
3636     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3637       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3638       <files>
3639         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3640         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3641       </files>
3642     </component>
3643     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3644       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3645       <files>
3646         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3647         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3648       </files>
3649     </component>
3650     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3651       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3652       <files>
3653         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3654         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3655       </files>
3656     </component>
3657     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3658       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3659       <files>
3660         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3661         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3662         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3663         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3664       </files>
3665     </component>
3666     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3667       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3668       <files>
3669         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3670         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3671       </files>
3672     </component>
3673     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3674       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3675       <files>
3676         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3677         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3678       </files>
3679     </component>
3680     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3681       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3682       <files>
3683         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3684         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3685       </files>
3686     </component>
3687     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3688       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3689       <files>
3690         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3691         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3692       </files>
3693     </component>
3694     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.0.0">
3695       <description>Access to #include Driver_WiFi.h file</description>
3696       <files>
3697         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3698         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3699       </files>
3700     </component>
3701   </components>
3702
3703   <boards>
3704     <board name="uVision Simulator" vendor="Keil">
3705       <description>uVision Simulator</description>
3706       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3707       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3708       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3709       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3710       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3711       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3712       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3713       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3714       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3715       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3716       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3717       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3718       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3719       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3720       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3721       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3722       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3723       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3724       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3725       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3726       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3727       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3728       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3729       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3730     </board>
3731
3732     <board name="EWARM Simulator" vendor="IAR">
3733       <description>EWARM Simulator</description>
3734       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3735       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3736       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3737       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3738       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3739       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3740       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3741       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3742       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3743       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3744       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3745       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3746       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3747       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3748       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3749       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3750       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3751       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3752       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3753       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3754       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3755       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3756       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3757       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3758     </board>
3759   </boards>
3760
3761   <examples>
3762     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3763       <description>DSP_Lib Class Marks example</description>
3764       <board name="uVision Simulator" vendor="Keil"/>
3765       <project>
3766         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3767       </project>
3768       <attributes>
3769         <component Cclass="CMSIS" Cgroup="CORE"/>
3770         <component Cclass="CMSIS" Cgroup="DSP"/>
3771         <component Cclass="Device" Cgroup="Startup"/>
3772         <category>Getting Started</category>
3773       </attributes>
3774     </example>
3775
3776     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3777       <description>DSP_Lib Convolution example</description>
3778       <board name="uVision Simulator" vendor="Keil"/>
3779       <project>
3780         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3781       </project>
3782       <attributes>
3783         <component Cclass="CMSIS" Cgroup="CORE"/>
3784         <component Cclass="CMSIS" Cgroup="DSP"/>
3785         <component Cclass="Device" Cgroup="Startup"/>
3786         <category>Getting Started</category>
3787       </attributes>
3788     </example>
3789
3790     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3791       <description>DSP_Lib Dotproduct example</description>
3792       <board name="uVision Simulator" vendor="Keil"/>
3793       <project>
3794         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3795       </project>
3796       <attributes>
3797         <component Cclass="CMSIS" Cgroup="CORE"/>
3798         <component Cclass="CMSIS" Cgroup="DSP"/>
3799         <component Cclass="Device" Cgroup="Startup"/>
3800         <category>Getting Started</category>
3801       </attributes>
3802     </example>
3803
3804     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3805       <description>DSP_Lib FFT Bin example</description>
3806       <board name="uVision Simulator" vendor="Keil"/>
3807       <project>
3808         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3809       </project>
3810       <attributes>
3811         <component Cclass="CMSIS" Cgroup="CORE"/>
3812         <component Cclass="CMSIS" Cgroup="DSP"/>
3813         <component Cclass="Device" Cgroup="Startup"/>
3814         <category>Getting Started</category>
3815       </attributes>
3816     </example>
3817
3818     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3819       <description>DSP_Lib FIR example</description>
3820       <board name="uVision Simulator" vendor="Keil"/>
3821       <project>
3822         <environment name="uv" load="arm_fir_example.uvprojx"/>
3823       </project>
3824       <attributes>
3825         <component Cclass="CMSIS" Cgroup="CORE"/>
3826         <component Cclass="CMSIS" Cgroup="DSP"/>
3827         <component Cclass="Device" Cgroup="Startup"/>
3828         <category>Getting Started</category>
3829       </attributes>
3830     </example>
3831
3832     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3833       <description>DSP_Lib Graphic Equalizer example</description>
3834       <board name="uVision Simulator" vendor="Keil"/>
3835       <project>
3836         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3837       </project>
3838       <attributes>
3839         <component Cclass="CMSIS" Cgroup="CORE"/>
3840         <component Cclass="CMSIS" Cgroup="DSP"/>
3841         <component Cclass="Device" Cgroup="Startup"/>
3842         <category>Getting Started</category>
3843       </attributes>
3844     </example>
3845
3846     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3847       <description>DSP_Lib Linear Interpolation example</description>
3848       <board name="uVision Simulator" vendor="Keil"/>
3849       <project>
3850         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3851       </project>
3852       <attributes>
3853         <component Cclass="CMSIS" Cgroup="CORE"/>
3854         <component Cclass="CMSIS" Cgroup="DSP"/>
3855         <component Cclass="Device" Cgroup="Startup"/>
3856         <category>Getting Started</category>
3857       </attributes>
3858     </example>
3859
3860     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3861       <description>DSP_Lib Matrix example</description>
3862       <board name="uVision Simulator" vendor="Keil"/>
3863       <project>
3864         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3865       </project>
3866       <attributes>
3867         <component Cclass="CMSIS" Cgroup="CORE"/>
3868         <component Cclass="CMSIS" Cgroup="DSP"/>
3869         <component Cclass="Device" Cgroup="Startup"/>
3870         <category>Getting Started</category>
3871       </attributes>
3872     </example>
3873
3874     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3875       <description>DSP_Lib Signal Convergence example</description>
3876       <board name="uVision Simulator" vendor="Keil"/>
3877       <project>
3878         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3879       </project>
3880       <attributes>
3881         <component Cclass="CMSIS" Cgroup="CORE"/>
3882         <component Cclass="CMSIS" Cgroup="DSP"/>
3883         <component Cclass="Device" Cgroup="Startup"/>
3884         <category>Getting Started</category>
3885       </attributes>
3886     </example>
3887
3888     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3889       <description>DSP_Lib Sinus/Cosinus example</description>
3890       <board name="uVision Simulator" vendor="Keil"/>
3891       <project>
3892         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3893       </project>
3894       <attributes>
3895         <component Cclass="CMSIS" Cgroup="CORE"/>
3896         <component Cclass="CMSIS" Cgroup="DSP"/>
3897         <component Cclass="Device" Cgroup="Startup"/>
3898         <category>Getting Started</category>
3899       </attributes>
3900     </example>
3901
3902     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3903       <description>DSP_Lib Variance example</description>
3904       <board name="uVision Simulator" vendor="Keil"/>
3905       <project>
3906         <environment name="uv" load="arm_variance_example.uvprojx"/>
3907       </project>
3908       <attributes>
3909         <component Cclass="CMSIS" Cgroup="CORE"/>
3910         <component Cclass="CMSIS" Cgroup="DSP"/>
3911         <component Cclass="Device" Cgroup="Startup"/>
3912         <category>Getting Started</category>
3913       </attributes>
3914     </example>
3915
3916     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3917       <description>Neural Network CIFAR10 example</description>
3918       <board name="uVision Simulator" vendor="Keil"/>
3919       <project>
3920         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3921       </project>
3922       <attributes>
3923         <component Cclass="CMSIS" Cgroup="CORE"/>
3924         <component Cclass="CMSIS" Cgroup="DSP"/>
3925         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3926         <component Cclass="Device" Cgroup="Startup"/>
3927         <category>Getting Started</category>
3928       </attributes>
3929     </example>
3930
3931     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
3932       <description>Neural Network CIFAR10 example</description>
3933       <board name="EWARM Simulator" vendor="IAR"/>
3934       <project>
3935         <environment name="iar" load="NN-example-cifar10.ewp"/>
3936       </project>
3937       <attributes>
3938         <component Cclass="CMSIS" Cgroup="CORE"/>
3939         <component Cclass="CMSIS" Cgroup="DSP"/>
3940         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3941         <component Cclass="Device" Cgroup="Startup"/>
3942         <category>Getting Started</category>
3943       </attributes>
3944     </example>
3945
3946     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3947       <description>Neural Network GRU example</description>
3948       <board name="uVision Simulator" vendor="Keil"/>
3949       <project>
3950         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3951       </project>
3952       <attributes>
3953         <component Cclass="CMSIS" Cgroup="CORE"/>
3954         <component Cclass="CMSIS" Cgroup="DSP"/>
3955         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3956         <component Cclass="Device" Cgroup="Startup"/>
3957         <category>Getting Started</category>
3958       </attributes>
3959     </example>
3960
3961     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
3962       <description>Neural Network GRU example</description>
3963       <board name="EWARM Simulator" vendor="IAR"/>
3964       <project>
3965         <environment name="iar" load="NN-example-gru.ewp"/>
3966       </project>
3967       <attributes>
3968         <component Cclass="CMSIS" Cgroup="CORE"/>
3969         <component Cclass="CMSIS" Cgroup="DSP"/>
3970         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3971         <component Cclass="Device" Cgroup="Startup"/>
3972         <category>Getting Started</category>
3973       </attributes>
3974     </example>
3975
3976     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3977       <description>CMSIS-RTOS2 Blinky example</description>
3978       <board name="uVision Simulator" vendor="Keil"/>
3979       <project>
3980         <environment name="uv" load="Blinky.uvprojx"/>
3981       </project>
3982       <attributes>
3983         <component Cclass="CMSIS" Cgroup="CORE"/>
3984         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3985         <component Cclass="Device" Cgroup="Startup"/>
3986         <category>Getting Started</category>
3987       </attributes>
3988     </example>
3989
3990     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3991       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3992       <board name="uVision Simulator" vendor="Keil"/>
3993       <project>
3994         <environment name="uv" load="Blinky.uvprojx"/>
3995       </project>
3996       <attributes>
3997         <component Cclass="CMSIS" Cgroup="CORE"/>
3998         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3999         <component Cclass="Device" Cgroup="Startup"/>
4000         <category>Getting Started</category>
4001       </attributes>
4002     </example>
4003
4004     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4005       <description>CMSIS-RTOS2 Message Queue Example</description>
4006       <board name="uVision Simulator" vendor="Keil"/>
4007       <project>
4008         <environment name="uv" load="MsqQueue.uvprojx"/>
4009       </project>
4010       <attributes>
4011         <component Cclass="CMSIS" Cgroup="CORE"/>
4012         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4013         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4014         <component Cclass="Device" Cgroup="Startup"/>
4015         <category>Getting Started</category>
4016       </attributes>
4017     </example>
4018
4019     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4020       <description>CMSIS-RTOS2 Memory Pool Example</description>
4021       <board name="uVision Simulator" vendor="Keil"/>
4022       <project>
4023         <environment name="uv" load="MemPool.uvprojx"/>
4024       </project>
4025       <attributes>
4026         <component Cclass="CMSIS" Cgroup="CORE"/>
4027         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4028         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4029         <component Cclass="Device" Cgroup="Startup"/>
4030         <category>Getting Started</category>
4031       </attributes>
4032     </example>
4033
4034     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4035       <description>Bare-metal secure/non-secure example without RTOS</description>
4036       <board name="uVision Simulator" vendor="Keil"/>
4037       <project>
4038         <environment name="uv" load="NoRTOS.uvmpw"/>
4039       </project>
4040       <attributes>
4041         <component Cclass="CMSIS" Cgroup="CORE"/>
4042         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4043         <component Cclass="Device" Cgroup="Startup"/>
4044         <category>Getting Started</category>
4045       </attributes>
4046     </example>
4047
4048     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4049       <description>Secure/non-secure RTOS example with thread context management</description>
4050       <board name="uVision Simulator" vendor="Keil"/>
4051       <project>
4052         <environment name="uv" load="RTOS.uvmpw"/>
4053       </project>
4054       <attributes>
4055         <component Cclass="CMSIS" Cgroup="CORE"/>
4056         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4057         <component Cclass="Device" Cgroup="Startup"/>
4058         <category>Getting Started</category>
4059       </attributes>
4060     </example>
4061
4062     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4063       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4064       <board name="uVision Simulator" vendor="Keil"/>
4065       <project>
4066         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4067       </project>
4068       <attributes>
4069         <component Cclass="CMSIS" Cgroup="CORE"/>
4070         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4071         <component Cclass="Device" Cgroup="Startup"/>
4072         <category>Getting Started</category>
4073       </attributes>
4074     </example>
4075
4076   </examples>
4077
4078 </package>