begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.1-dev1">
  12       Active development ...
  13       CMSIS-Core(M):
  14        - Added ARMv8-M Stack Sealing (to linker, startup) for toolcahin ARM, GCC
  15        - Changed C-Startup to default Startup.
  16     </release>
  17     <release version="5.7.1-dev0">
  18       Active development ...
  19       CMSIS-Core(M):
  20        - Updated GCC LinkerDescription, GCC Assembler startup
  21       CMSIS-DSP:
  22        - Purged pre-built libs from Git
  23       CMSIS-RTOS:
  24        - RTX4: Purged pre-built libs from Git
  25       CMSIS-RTOS2:
  26        - RTX5: Purged pre-built libs from Git
  27     </release>
  28     <release version="5.7.0" date="2020-04-09">
  29       CMSIS-Build: 0.9.0 (beta)
  30         - Draft for CMSIS Project description (CPRJ)
  31       CMSIS-Core(M): 5.4.0 (see revision history for details)
  32         - Cortex-M55 cpu support
  33         - Enhanced MVE support for Armv8.1-MML
  34         - Fixed device config define checks.
  35         - L1 Cache functions for Armv7-M and later
  36       CMSIS-Core(A): 1.2.0 (see revision history for details)
  37         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  38         - Added missing DSP intrinsics
  39         - Reworked assembly intrinsics: volatile, barriers and clobber
  40       CMSIS-DSP: 1.8.0 (see revision history for details)
  41         - Added new functions and function groups
  42         - Added MVE support
  43       CMSIS-NN: 1.3.0 (see revision history for details)
  44         - Added MVE support
  45         - Further optimizations for kernels using DSP extension
  46       CMSIS-RTOS2:
  47         - RTX 5.5.2 (see revision history for details)
  48       CMSIS-Driver: 2.8.0
  49         - Added VIO API 0.1.0 (Preview)
  50         - removed volatile from status related typedefs in APIs
  51         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  52       CMSIS-Pack: 1.6.3 (see revision history for details)
  53         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  54       Devices:
  55         - ARMCM55 device
  56         - ARMv81MML startup code recognizing __MVE_USED macro
  57         - Refactored vector table references for all Cortex-M devices
  58         - Reworked ARMCM* C-StartUp files.
  59         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  60       Utilities:
  61         Attention: Linux binaries moved to Linux64 folder!
  62         - SVDConv 3.3.35
  63         - PackChk 1.3.89
  64     </release>
  65     <release version="5.6.0" date="2019-07-10">
  66       CMSIS-Core(M): 5.3.0 (see revision history for details)
  67         - Added provisions for compiler-independent C startup code.
  68       CMSIS-Core(A): 1.1.4 (see revision history for details)
  69         - Fixed __FPU_Enable.
  70       CMSIS-DSP: 1.7.0 (see revision history for details)
  71         - New Neon versions of f32 functions
  72         - Python wrapper
  73         - Preliminary cmake build
  74         - Compilation flags for FFTs
  75         - Changes to arm_math.h
  76       CMSIS-NN: 1.2.0 (see revision history for details)
  77         - New function for depthwise convolution with asymmetric quantization.
  78         - New support functions for requantization.
  79       CMSIS-RTOS:
  80         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  81       CMSIS-RTOS2:
  82         - RTX 5.5.1 (see revision history for details)
  83       CMSIS-Driver: 2.7.1
  84         - WiFi Interface API 1.0.0
  85       Devices:
  86         - Generalized C startup code for all Cortex-M family devices.
  87         - Updated Cortex-A default memory regions and MMU configurations
  88         - Moved Cortex-A memory and system config files to avoid include path issues
  89     </release>
  90     <release version="5.5.1" date="2019-03-20">
  91       The following folders are deprecated
  92         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  93
  94       CMSIS-Core(M): 5.2.1 (see revision history for details)
  95         - Fixed compilation issue in cmsis_armclang_ltm.h
  96     </release>
  97     <release version="5.5.0" date="2019-03-18">
  98       The following folders have been removed:
  99         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 100         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 101       The following folders are deprecated
 102         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 103
 104       CMSIS-Core(M): 5.2.0 (see revision history for details)
 105         - Reworked Stack/Heap configuration for ARM startup files.
 106         - Added Cortex-M35P device support.
 107         - Added generic Armv8.1-M Mainline device support.
 108       CMSIS-Core(A): 1.1.3 (see revision history for details)
 109       CMSIS-DSP: 1.6.0 (see revision history for details)
 110         - reworked DSP library source files
 111         - reworked DSP library documentation
 112         - Changed DSP folder structure
 113         - moved DSP libraries to folder ./DSP/Lib
 114         - ARM DSP Libraries are built with ARMCLANG
 115         - Added DSP Libraries Source variant
 116       CMSIS-RTOS2:
 117         - RTX 5.5.0 (see revision history for details)
 118       CMSIS-Driver: 2.7.0
 119         - Added WiFi Interface API 1.0.0-beta
 120         - Added components for project specific driver implementations
 121       CMSIS-Pack: 1.6.0 (see revision history for details)
 122       Devices:
 123         - Added Cortex-M35P and ARMv81MML device templates.
 124         - Fixed C-Startup Code for GCC (aligned with other compilers)
 125       Utilities:
 126         - SVDConv 3.3.25
 127         - PackChk 1.3.82
 128     </release>
 129     <release version="5.4.0" date="2018-08-01">
 130       Aligned pack structure with repository.
 131       The following folders are deprecated:
 132         - CMSIS/Include/
 133         - CMSIS/DSP_Lib/
 134
 135       CMSIS-Core(M): 5.1.2 (see revision history for details)
 136         - Added Cortex-M1 support (beta).
 137       CMSIS-Core(A): 1.1.2 (see revision history for details)
 138       CMSIS-NN: 1.1.0
 139         - Added new math functions.
 140       CMSIS-RTOS2:
 141         - API 2.1.3 (see revision history for details)
 142         - RTX 5.4.0 (see revision history for details)
 143           * Updated exception handling on Cortex-A
 144       CMSIS-Driver:
 145         - Flash Driver API V2.2.0
 146       Utilities:
 147         - SVDConv 3.3.21
 148         - PackChk 1.3.71
 149     </release>
 150     <release version="5.3.0" date="2018-02-22">
 151       Updated Arm company brand.
 152       CMSIS-Core(M): 5.1.1 (see revision history for details)
 153       CMSIS-Core(A): 1.1.1 (see revision history for details)
 154       CMSIS-DAP: 2.0.0 (see revision history for details)
 155       CMSIS-NN: 1.0.0
 156         - Initial contribution of the bare metal Neural Network Library.
 157       CMSIS-RTOS2:
 158         - RTX 5.3.0 (see revision history for details)
 159         - OS Tick API 1.0.1
 160     </release>
 161     <release version="5.2.0" date="2017-11-16">
 162       CMSIS-Core(M): 5.1.0 (see revision history for details)
 163         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 164         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 165       CMSIS-Core(A): 1.1.0 (see revision history for details)
 166         - Added compiler_iccarm.h.
 167         - Added additional access functions for physical timer.
 168       CMSIS-DAP: 1.2.0 (see revision history for details)
 169       CMSIS-DSP: 1.5.2 (see revision history for details)
 170       CMSIS-Driver: 2.6.0 (see revision history for details)
 171         - CAN Driver API V1.2.0
 172         - NAND Driver API V2.3.0
 173       CMSIS-RTOS:
 174         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 175       CMSIS-RTOS2:
 176         - API 2.1.2 (see revision history for details)
 177         - RTX 5.2.3 (see revision history for details)
 178       Devices:
 179         - Added GCC startup and linker script for Cortex-A9.
 180         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 181         - Added IAR startup code for Cortex-A9
 182     </release>
 183     <release version="5.1.1" date="2017-09-19">
 184       CMSIS-RTOS2:
 185       - RTX 5.2.1 (see revision history for details)
 186     </release>
 187     <release version="5.1.0" date="2017-08-04">
 188       CMSIS-Core(M): 5.0.2 (see revision history for details)
 189       - Changed Version Control macros to be core agnostic.
 190       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 191       CMSIS-Core(A): 1.0.0 (see revision history for details)
 192       - Initial release
 193       - IRQ Controller API 1.0.0
 194       CMSIS-Driver: 2.05 (see revision history for details)
 195       - All typedefs related to status have been made volatile.
 196       CMSIS-RTOS2:
 197       - API 2.1.1 (see revision history for details)
 198       - RTX 5.2.0 (see revision history for details)
 199       - OS Tick API 1.0.0
 200       CMSIS-DSP: 1.5.2 (see revision history for details)
 201       - Fixed GNU Compiler specific diagnostics.
 202       CMSIS-Pack: 1.5.0 (see revision history for details)
 203       - added System Description File (*.SDF) Format
 204       CMSIS-Zone: 0.0.1 (Preview)
 205       - Initial specification draft
 206     </release>
 207     <release version="5.0.1" date="2017-02-03">
 208       Package Description:
 209       - added taxonomy for Cclass RTOS
 210       CMSIS-RTOS2:
 211       - API 2.1   (see revision history for details)
 212       - RTX 5.1.0 (see revision history for details)
 213       CMSIS-Core: 5.0.1 (see revision history for details)
 214       - Added __PACKED_STRUCT macro
 215       - Added uVisior support
 216       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 217       - Updated template for secure main function (main_s.c)
 218       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 219       CMSIS-DSP: 1.5.1 (see revision history for details)
 220       - added ARMv8M DSP libraries.
 221       CMSIS-Pack:1.4.9 (see revision history for details)
 222       - added Pack Index File specification and schema file
 223     </release>
 224     <release version="5.0.0" date="2016-11-11">
 225       Changed open source license to Apache 2.0
 226       CMSIS_Core:
 227        - Added support for Cortex-M23 and Cortex-M33.
 228        - Added ARMv8-M device configurations for mainline and baseline.
 229        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 230        - Added cmsis_compiler.h to unify compiler behaviour.
 231        - Updated function SCB_EnableICache (for Cortex-M7).
 232        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 233       CMSIS-RTOS:
 234         - bug fix in RTX 4.82 (see revision history for details)
 235       CMSIS-RTOS2:
 236         - new API including compatibility layer to CMSIS-RTOS
 237         - reference implementation based on RTX5
 238         - supports all Cortex-M variants including TrustZone for ARMv8-M
 239       CMSIS-SVD:
 240        - reworked SVD format documentation
 241        - removed SVD file database documentation as SVD files are distributed in packs
 242        - updated SVDConv for Win32 and Linux
 243       CMSIS-DSP:
 244        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 245        - Added DSP libraries build projects to CMSIS pack.
 246     </release>
 247     <release version="4.5.0" date="2015-10-28">
 248       - CMSIS-Core     4.30.0  (see revision history for details)
 249       - CMSIS-DAP      1.1.0   (unchanged)
 250       - CMSIS-Driver   2.04.0  (see revision history for details)
 251       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 252       - CMSIS-Pack     1.4.1   (see revision history for details)
 253       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 254       - CMSIS-SVD      1.3.1   (see revision history for details)
 255     </release>
 256     <release version="4.4.0" date="2015-09-11">
 257       - CMSIS-Core     4.20   (see revision history for details)
 258       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 259       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 260       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 261       - CMSIS-RTOS
 262         -- API         1.02   (unchanged)
 263         -- RTX         4.79   (see revision history for details)
 264       - CMSIS-SVD      1.3.0  (see revision history for details)
 265       - CMSIS-DAP      1.1.0  (extended with SWO support)
 266     </release>
 267     <release version="4.3.0" date="2015-03-20">
 268       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 269       - CMSIS-DSP      1.4.5  (see revision history for details)
 270       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 271       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 272       - CMSIS-RTOS
 273         -- API         1.02   (unchanged)
 274         -- RTX         4.78   (see revision history for details)
 275       - CMSIS-SVD      1.2    (unchanged)
 276     </release>
 277     <release version="4.2.0" date="2014-09-24">
 278       Adding Cortex-M7 support
 279       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 280       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 281       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 282       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 283       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 284     </release>
 285     <release version="4.1.1" date="2014-06-30">
 286       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 287     </release>
 288     <release version="4.1.0" date="2014-06-12">
 289       - CMSIS-Driver   2.02  (incompatible update)
 290       - CMSIS-Pack     1.3   (see revision history for details)
 291       - CMSIS-DSP      1.4.2 (unchanged)
 292       - CMSIS-Core     3.30  (unchanged)
 293       - CMSIS-RTOS RTX 4.74  (unchanged)
 294       - CMSIS-RTOS API 1.02  (unchanged)
 295       - CMSIS-SVD      1.10  (unchanged)
 296       PACK:
 297       - removed G++ specific files from PACK
 298       - added Component Startup variant "C Startup"
 299       - added Pack Checking Utility
 300       - updated conditions to reflect tool-chain dependency
 301       - added Taxonomy for Graphics
 302       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 303     </release>
 304     <!-- release version="4.0.0">
 305       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 306       - CMSIS-Pack     1.1   Preliminary
 307       - CMSIS-DSP      1.4.2 (see revision history for details)
 308       - CMSIS-Core     3.30  (see revision history for details)
 309       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 310       - CMSIS-RTOS API 1.02  (unchanged)
 311       - CMSIS-SVD      1.10  (unchanged)
 312     </release -->
 313     <release version="3.20.4" date="2014-02-20">
 314       - CMSIS-RTOS 4.74 (see revision history for details)
 315       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 316     </release>
 317     <!-- release version="3.20.3">
 318       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 319       - CMSIS-RTOS 4.73 (see revision history for details)
 320     </release -->
 321     <!-- release version="3.20.2">
 322       - CMSIS-Pack documentation has been added
 323       - CMSIS-Drivers header and documentation have been added to PACK
 324       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 325     </release -->
 326     <!-- release version="3.20.1">
 327       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 328       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 329     </release -->
 330     <!-- release version="3.20.0">
 331       The software portions that are deployed in the application program are now under a BSD license which allows usage
 332       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 333       The individual components have been update as listed below:
 334       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 335       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 336       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 337       - CMSIS-SVD is unchanged.
 338     </release -->
 339   </releases>
 340
 341   <taxonomy>
 342     <description Cclass="Audio">Software components for audio processing</description>
 343     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 344     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 345     <description Cclass="Compiler">Compiler Software Extensions</description>
 346     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 347     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 348     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 349     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 350     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 351     <description Cclass="File System">File Drive Support and File System</description>
 352     <description Cclass="IoT Client">IoT cloud client connector</description>
 353     <description Cclass="IoT Service">IoT specific services</description>
 354     <description Cclass="IoT Utility">IoT specific software utility</description>
 355     <description Cclass="Graphics">Graphical User Interface</description>
 356     <description Cclass="Network">Network Stack using Internet Protocols</description>
 357     <description Cclass="RTOS">Real-time Operating System</description>
 358     <description Cclass="Security">Encryption for secure communication or storage</description>
 359     <description Cclass="USB">Universal Serial Bus Stack</description>
 360     <description Cclass="Utility">Generic software utility components</description>
 361   </taxonomy>
 362
 363   <devices>
 364     <!-- ******************************  Cortex-M0  ****************************** -->
 365     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 366       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 367       <description>
 368 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 369 - simple, easy-to-use programmers model
 370 - highly efficient ultra-low power operation
 371 - excellent code density
 372 - deterministic, high-performance interrupt handling
 373 - upward compatibility with the rest of the Cortex-M processor family.
 374       </description>
 375       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 376       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 377       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 378       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 379
 380       <device Dname="ARMCM0">
 381         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 382         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 383       </device>
 384     </family>
 385
 386     <!-- ******************************  Cortex-M0P  ****************************** -->
 387     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 388       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 389       <description>
 390 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 391 - simple, easy-to-use programmers model
 392 - highly efficient ultra-low power operation
 393 - excellent code density
 394 - deterministic, high-performance interrupt handling
 395 - upward compatibility with the rest of the Cortex-M processor family.
 396       </description>
 397       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 398       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 399       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 400       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 401
 402       <device Dname="ARMCM0P">
 403         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 404         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 405       </device>
 406
 407       <device Dname="ARMCM0P_MPU">
 408         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 409         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 410       </device>
 411     </family>
 412
 413     <!-- ******************************  Cortex-M1  ****************************** -->
 414     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 415       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 416       <description>
 417 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 418 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 419       </description>
 420       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 421       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 422       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 423       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 424
 425       <device Dname="ARMCM1">
 426         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 427         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 428       </device>
 429     </family>
 430
 431     <!-- ******************************  Cortex-M3  ****************************** -->
 432     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 433       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 434       <description>
 435 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 436 - simple, easy-to-use programmers model
 437 - highly efficient ultra-low power operation
 438 - excellent code density
 439 - deterministic, high-performance interrupt handling
 440 - upward compatibility with the rest of the Cortex-M processor family.
 441       </description>
 442       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 443       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 444       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 445       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 446
 447       <device Dname="ARMCM3">
 448         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 449         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 450       </device>
 451     </family>
 452
 453     <!-- ******************************  Cortex-M4  ****************************** -->
 454     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 455       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 456       <description>
 457 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 458 - simple, easy-to-use programmers model
 459 - highly efficient ultra-low power operation
 460 - excellent code density
 461 - deterministic, high-performance interrupt handling
 462 - upward compatibility with the rest of the Cortex-M processor family.
 463       </description>
 464       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 465       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 466       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 467       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 468
 469       <device Dname="ARMCM4">
 470         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 471         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 472       </device>
 473
 474       <device Dname="ARMCM4_FP">
 475         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 476         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 477       </device>
 478     </family>
 479
 480     <!-- ******************************  Cortex-M7  ****************************** -->
 481     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 482       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 483       <description>
 484 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 485 - simple, easy-to-use programmers model
 486 - highly efficient ultra-low power operation
 487 - excellent code density
 488 - deterministic, high-performance interrupt handling
 489 - upward compatibility with the rest of the Cortex-M processor family.
 490       </description>
 491       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 492       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 493       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 494       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 495
 496       <device Dname="ARMCM7">
 497         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 498         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 499       </device>
 500
 501       <device Dname="ARMCM7_SP">
 502         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 503         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 504       </device>
 505
 506       <device Dname="ARMCM7_DP">
 507         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 508         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 509       </device>
 510     </family>
 511
 512     <!-- ******************************  Cortex-M23  ********************** -->
 513     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 514       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 515       <description>
 516 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 517 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 518 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 519       </description>
 520       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 521       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 522       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 523       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 524       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 525       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 526
 527       <device Dname="ARMCM23">
 528         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 529         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 530       </device>
 531
 532       <device Dname="ARMCM23_TZ">
 533         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 534         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 535       </device>
 536     </family>
 537
 538     <!-- ******************************  Cortex-M33  ****************************** -->
 539     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 540       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 541       <description>
 542 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 543 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 544       </description>
 545       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 546       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 547       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 548       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 549       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 550       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 551
 552       <device Dname="ARMCM33">
 553         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 554         <description>
 555           no DSP Instructions, no Floating Point Unit, no TrustZone
 556         </description>
 557         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 558       </device>
 559
 560       <device Dname="ARMCM33_TZ">
 561         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 562         <description>
 563           no DSP Instructions, no Floating Point Unit, TrustZone
 564         </description>
 565         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 566       </device>
 567
 568       <device Dname="ARMCM33_DSP_FP">
 569         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 570         <description>
 571           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 572         </description>
 573         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 574       </device>
 575
 576       <device Dname="ARMCM33_DSP_FP_TZ">
 577         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 578         <description>
 579           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 580         </description>
 581         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 582       </device>
 583     </family>
 584
 585     <!-- ******************************  Cortex-M35P  ****************************** -->
 586     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 587       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 588       <description>
 589 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 590 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 591       </description>
 592
 593       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 594       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 595       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 596       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 597       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 598       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 599
 600       <device Dname="ARMCM35P">
 601         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 602         <description>
 603           no DSP Instructions, no Floating Point Unit, no TrustZone
 604         </description>
 605         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 606       </device>
 607
 608       <device Dname="ARMCM35P_TZ">
 609         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 610         <description>
 611           no DSP Instructions, no Floating Point Unit, TrustZone
 612         </description>
 613         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 614       </device>
 615
 616       <device Dname="ARMCM35P_DSP_FP">
 617         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 618         <description>
 619           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 620         </description>
 621         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 622       </device>
 623
 624       <device Dname="ARMCM35P_DSP_FP_TZ">
 625         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 626         <description>
 627           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 628         </description>
 629         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 630       </device>
 631     </family>
 632
 633     <!-- ******************************  Cortex-M55  ****************************** -->
 634     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 635       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 636       <description>
 637 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 638 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 639 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 640       </description>
 641
 642       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 643       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 644       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 645       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 646       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 647       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 648
 649       <device Dname="ARMCM55">
 650         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 651         <description>
 652           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 653         </description>
 654         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 655       </device>
 656     </family>
 657
 658     <!-- ******************************  ARMSC000  ****************************** -->
 659     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 660       <description>
 661 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 662 - simple, easy-to-use programmers model
 663 - highly efficient ultra-low power operation
 664 - excellent code density
 665 - deterministic, high-performance interrupt handling
 666       </description>
 667       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 668       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 669       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 670       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 671
 672       <device Dname="ARMSC000">
 673         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 674         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 675       </device>
 676     </family>
 677
 678     <!-- ******************************  ARMSC300  ****************************** -->
 679     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 680       <description>
 681 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 682 - simple, easy-to-use programmers model
 683 - highly efficient ultra-low power operation
 684 - excellent code density
 685 - deterministic, high-performance interrupt handling
 686       </description>
 687       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 688       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 689       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 690       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 691
 692       <device Dname="ARMSC300">
 693         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 694         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 695       </device>
 696     </family>
 697
 698     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 699     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 700       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 701       <description>
 702 Armv8-M Baseline based device with TrustZone
 703       </description>
 704       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 705       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 706       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 707       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 708       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 709       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 710
 711       <device Dname="ARMv8MBL">
 712         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 713         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 714       </device>
 715     </family>
 716
 717     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 718     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 719       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 720       <description>
 721 Armv8-M Mainline based device with TrustZone
 722       </description>
 723       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 724       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 725       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 726       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 727       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 728       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 729
 730       <device Dname="ARMv8MML">
 731         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 732         <description>
 733           no DSP Instructions, no Floating Point Unit, TrustZone
 734         </description>
 735         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 736       </device>
 737
 738       <device Dname="ARMv8MML_DSP">
 739         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 740         <description>
 741           DSP Instructions, no Floating Point Unit, TrustZone
 742         </description>
 743         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 744       </device>
 745
 746       <device Dname="ARMv8MML_SP">
 747         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 748         <description>
 749           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 750         </description>
 751         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 752       </device>
 753
 754       <device Dname="ARMv8MML_DSP_SP">
 755         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 756         <description>
 757           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 758         </description>
 759         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 760       </device>
 761
 762       <device Dname="ARMv8MML_DP">
 763         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 764         <description>
 765           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 766         </description>
 767         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 768       </device>
 769
 770       <device Dname="ARMv8MML_DSP_DP">
 771         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 772         <description>
 773           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 774         </description>
 775         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 776       </device>
 777     </family>
 778
 779     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 780     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 781       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 782       <description>
 783 Armv8.1-M Mainline based device with TrustZone and MVE
 784       </description>
 785       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 786       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 787       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 788       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 789       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 790       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 791
 792
 793       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 794         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 795         <description>
 796           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 797         </description>
 798         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 799       </device>
 800     </family>
 801
 802     <!-- ******************************  Cortex-A5  ****************************** -->
 803     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 804       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 805       <description>
 806 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 807 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 808 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 809       </description>
 810
 811       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 812       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 813       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 814       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 815
 816       <device Dname="ARMCA5">
 817         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 818         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 819       </device>
 820     </family>
 821
 822     <!-- ******************************  Cortex-A7  ****************************** -->
 823     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 824       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 825       <description>
 826 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 827 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 828 an optional integrated GIC, and an optional L2 cache controller.
 829       </description>
 830
 831       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 832       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 833       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 834       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 835
 836       <device Dname="ARMCA7">
 837         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 838         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 839       </device>
 840     </family>
 841
 842     <!-- ******************************  Cortex-A9  ****************************** -->
 843     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 844       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 845       <description>
 846 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 847 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 848 and 8-bit Java bytecodes in Jazelle state.
 849       </description>
 850
 851       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 852       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 853       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 854       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 855
 856       <device Dname="ARMCA9">
 857         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 858         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 859       </device>
 860     </family>
 861   </devices>
 862
 863
 864   <apis>
 865     <!-- CMSIS Device API -->
 866     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 867       <description>Device interrupt controller interface</description>
 868       <files>
 869         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 870       </files>
 871     </api>
 872     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 873       <description>RTOS Kernel system tick timer interface</description>
 874       <files>
 875         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 876       </files>
 877     </api>
 878     <!-- CMSIS-RTOS API -->
 879     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 880       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 881       <files>
 882         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 883       </files>
 884     </api>
 885     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 886       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 887       <files>
 888         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 889         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 890       </files>
 891     </api>
 892     <!-- CMSIS Driver API -->
 893     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 894       <description>USART Driver API for Cortex-M</description>
 895       <files>
 896         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 897         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 898       </files>
 899     </api>
 900     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 901       <description>SPI Driver API for Cortex-M</description>
 902       <files>
 903         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 904         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 905       </files>
 906     </api>
 907     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 908       <description>SAI Driver API for Cortex-M</description>
 909       <files>
 910         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 911         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 912       </files>
 913     </api>
 914     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 915       <description>I2C Driver API for Cortex-M</description>
 916       <files>
 917         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 918         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 919       </files>
 920     </api>
 921     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 922       <description>CAN Driver API for Cortex-M</description>
 923       <files>
 924         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 925         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 926       </files>
 927     </api>
 928     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 929       <description>Flash Driver API for Cortex-M</description>
 930       <files>
 931         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 932         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 933       </files>
 934     </api>
 935     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 936       <description>MCI Driver API for Cortex-M</description>
 937       <files>
 938         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 939         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 940       </files>
 941     </api>
 942     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 943       <description>NAND Flash Driver API for Cortex-M</description>
 944       <files>
 945         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 946         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 947       </files>
 948     </api>
 949     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 950       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 951       <files>
 952         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 953         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 954         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 955       </files>
 956     </api>
 957     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 958       <description>Ethernet MAC Driver API for Cortex-M</description>
 959       <files>
 960         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 961         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 962       </files>
 963     </api>
 964     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 965       <description>Ethernet PHY Driver API for Cortex-M</description>
 966       <files>
 967         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 968         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 969       </files>
 970     </api>
 971     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 972       <description>USB Device Driver API for Cortex-M</description>
 973       <files>
 974         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 975         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 976       </files>
 977     </api>
 978     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 979       <description>USB Host Driver API for Cortex-M</description>
 980       <files>
 981         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 982         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 983       </files>
 984     </api>
 985     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 986       <description>WiFi driver</description>
 987       <files>
 988         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 989         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 990       </files>
 991     </api>
 992     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
 993       <description>Virtual I/O</description>
 994       <files>
 995         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
 996         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
 997         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
 998       </files>
 999     </api>
1000   </apis>
1001
1002   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1003   <conditions>
1004     <!-- compiler -->
1005     <condition id="ARMCC6">
1006       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1007       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1008     </condition>
1009     <condition id="ARMCC5">
1010       <require Tcompiler="ARMCC" Toptions="AC5"/>
1011     </condition>
1012     <condition id="ARMCC">
1013       <require Tcompiler="ARMCC"/>
1014     </condition>
1015     <condition id="GCC">
1016       <require Tcompiler="GCC"/>
1017     </condition>
1018     <condition id="IAR">
1019       <require Tcompiler="IAR"/>
1020     </condition>
1021     <condition id="ARMCC GCC">
1022       <accept Tcompiler="ARMCC"/>
1023       <accept Tcompiler="GCC"/>
1024     </condition>
1025     <condition id="ARMCC GCC IAR">
1026       <accept Tcompiler="ARMCC"/>
1027       <accept Tcompiler="GCC"/>
1028       <accept Tcompiler="IAR"/>
1029     </condition>
1030
1031     <!-- Arm architecture -->
1032     <condition id="ARMv6-M Device">
1033       <description>Armv6-M architecture based device</description>
1034       <accept Dcore="Cortex-M0"/>
1035       <accept Dcore="Cortex-M1"/>
1036       <accept Dcore="Cortex-M0+"/>
1037       <accept Dcore="SC000"/>
1038     </condition>
1039     <condition id="ARMv7-M Device">
1040       <description>Armv7-M architecture based device</description>
1041       <accept Dcore="Cortex-M3"/>
1042       <accept Dcore="Cortex-M4"/>
1043       <accept Dcore="Cortex-M7"/>
1044       <accept Dcore="SC300"/>
1045     </condition>
1046     <condition id="ARMv8-M Device">
1047       <description>Armv8-M architecture based device</description>
1048       <accept Dcore="ARMV8MBL"/>
1049       <accept Dcore="ARMV8MML"/>
1050       <accept Dcore="ARMV81MML"/>
1051       <accept Dcore="Cortex-M23"/>
1052       <accept Dcore="Cortex-M33"/>
1053       <accept Dcore="Cortex-M35P"/>
1054       <accept Dcore="Cortex-M55"/>
1055     </condition>
1056     <condition id="ARMv6_7-M Device">
1057       <description>Armv6_7-M architecture based device</description>
1058       <accept condition="ARMv6-M Device"/>
1059       <accept condition="ARMv7-M Device"/>
1060     </condition>
1061     <condition id="ARMv6_7_8-M Device">
1062       <description>Armv6_7_8-M architecture based device</description>
1063       <accept condition="ARMv6-M Device"/>
1064       <accept condition="ARMv7-M Device"/>
1065       <accept condition="ARMv8-M Device"/>
1066     </condition>
1067     <condition id="ARMv7-A Device">
1068       <description>Armv7-A architecture based device</description>
1069       <accept Dcore="Cortex-A5"/>
1070       <accept Dcore="Cortex-A7"/>
1071       <accept Dcore="Cortex-A9"/>
1072     </condition>
1073
1074     <condition id="TrustZone">
1075       <description>TrustZone</description>
1076       <require Dtz="TZ"/>
1077     </condition>
1078     <condition id="TZ Secure">
1079       <description>TrustZone (Secure)</description>
1080       <require Dtz="TZ"/>
1081       <require Dsecure="Secure"/>
1082     </condition>
1083     <condition id="TZ Non-secure">
1084       <description>TrustZone (Non-secure)</description>
1085       <require Dtz="TZ"/>
1086       <accept Dsecure="Non-secure"/>
1087       <accept Dsecure="TZ-disabled"/>
1088     </condition>
1089     <condition id="TZ Unavailable">
1090       <description>TrustZone not available</description>
1091       <deny Dtz="TZ"/>
1092     </condition>
1093
1094     <!-- ARM core -->
1095     <condition id="CM0">
1096       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1097       <accept Dcore="Cortex-M0"/>
1098       <accept Dcore="Cortex-M0+"/>
1099       <accept Dcore="SC000"/>
1100     </condition>
1101     <condition id="CM1">
1102       <description>Cortex-M1</description>
1103       <require Dcore="Cortex-M1"/>
1104     </condition>
1105     <condition id="CM3">
1106       <description>Cortex-M3 or SC300 processor based device</description>
1107       <accept Dcore="Cortex-M3"/>
1108       <accept Dcore="SC300"/>
1109     </condition>
1110     <condition id="CM4">
1111       <description>Cortex-M4 processor based device</description>
1112       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1113     </condition>
1114     <condition id="CM4_FP">
1115       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1116       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1117       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1118       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1119     </condition>
1120     <condition id="CM7">
1121       <description>Cortex-M7 processor based device</description>
1122       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1123     </condition>
1124     <condition id="CM7_FP">
1125       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1126       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1127       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1128     </condition>
1129     <condition id="CM7_SP">
1130       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1131       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1132     </condition>
1133     <condition id="CM7_DP">
1134       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1135       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1136     </condition>
1137     <condition id="CM23">
1138       <description>Cortex-M23 processor based device</description>
1139       <require Dcore="Cortex-M23"/>
1140     </condition>
1141     <condition id="CM33">
1142       <description>Cortex-M33 processor based device</description>
1143       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1144     </condition>
1145     <condition id="CM33_FP">
1146       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1147       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1148     </condition>
1149     <condition id="CM35P">
1150       <description>Cortex-M35P processor based device</description>
1151       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1152     </condition>
1153     <condition id="CM35P_FP">
1154       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1155       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1156     </condition>
1157     <condition id="ARMv8MBL">
1158       <description>Armv8-M Baseline processor based device</description>
1159       <require Dcore="ARMV8MBL"/>
1160     </condition>
1161     <condition id="ARMv8MML">
1162       <description>Armv8-M Mainline processor based device</description>
1163       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1164     </condition>
1165     <condition id="ARMv8MML_FP">
1166       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1167       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1168       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1169     </condition>
1170
1171     <condition id="CM33_NODSP_NOFPU">
1172       <description>CM33, no DSP, no FPU</description>
1173       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1174     </condition>
1175     <condition id="CM33_DSP_NOFPU">
1176       <description>CM33, DSP, no FPU</description>
1177       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1178     </condition>
1179     <condition id="CM33_NODSP_SP">
1180       <description>CM33, no DSP, SP FPU</description>
1181       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1182     </condition>
1183     <condition id="CM33_DSP_SP">
1184       <description>CM33, DSP, SP FPU</description>
1185       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1186     </condition>
1187
1188     <condition id="CM35P_NODSP_NOFPU">
1189       <description>CM35P, no DSP, no FPU</description>
1190       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1191     </condition>
1192     <condition id="CM35P_DSP_NOFPU">
1193       <description>CM35P, DSP, no FPU</description>
1194       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1195     </condition>
1196     <condition id="CM35P_NODSP_SP">
1197       <description>CM35P, no DSP, SP FPU</description>
1198       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1199     </condition>
1200     <condition id="CM35P_DSP_SP">
1201       <description>CM35P, DSP, SP FPU</description>
1202       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1203     </condition>
1204
1205     <condition id="CM55_NOFPU_NOMVE">
1206       <description>Cortex-M55, no FPU, no MVE</description>
1207       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1208     </condition>
1209     <condition id="CM55_NOFPU_MVE">
1210       <description>Cortex-M55, no FPU, MVE</description>
1211       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1212       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1213     </condition>
1214     <condition id="CM55_FPU">
1215       <description>Cortex-M55, FPU</description>
1216       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1217       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1218     </condition>
1219
1220     <condition id="ARMv8MML_NODSP_NOFPU">
1221       <description>Armv8-M Mainline, no DSP, no FPU</description>
1222       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1223     </condition>
1224     <condition id="ARMv8MML_DSP_NOFPU">
1225       <description>Armv8-M Mainline, DSP, no FPU</description>
1226       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1227     </condition>
1228     <condition id="ARMv8MML_NODSP_SP">
1229       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1230       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1231     </condition>
1232     <condition id="ARMv8MML_DSP_SP">
1233       <description>Armv8-M Mainline, DSP, SP FPU</description>
1234       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1235     </condition>
1236
1237     <condition id="CA5_CA9">
1238       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1239       <accept Dcore="Cortex-A5"/>
1240       <accept Dcore="Cortex-A9"/>
1241     </condition>
1242
1243     <condition id="CA7">
1244       <description>Cortex-A7 processor based device</description>
1245       <accept Dcore="Cortex-A7"/>
1246     </condition>
1247
1248     <!-- ARMCC compiler -->
1249     <condition id="CA_ARMCC5">
1250       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1251       <require condition="ARMv7-A Device"/>
1252       <require condition="ARMCC5"/>
1253     </condition>
1254     <condition id="CA_ARMCC6">
1255       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1256       <require condition="ARMv7-A Device"/>
1257       <require condition="ARMCC6"/>
1258     </condition>
1259
1260     <condition id="CM0_ARMCC">
1261       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1262       <require condition="CM0"/>
1263       <require Tcompiler="ARMCC"/>
1264     </condition>
1265     <condition id="CM0_LE_ARMCC">
1266       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1267       <require condition="CM0_ARMCC"/>
1268       <require Dendian="Little-endian"/>
1269     </condition>
1270     <condition id="CM0_BE_ARMCC">
1271       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1272       <require condition="CM0_ARMCC"/>
1273       <require Dendian="Big-endian"/>
1274     </condition>
1275
1276     <condition id="CM1_ARMCC">
1277       <description>Cortex-M1 based device for the Arm Compiler</description>
1278       <require condition="CM1"/>
1279       <require Tcompiler="ARMCC"/>
1280     </condition>
1281     <condition id="CM1_LE_ARMCC">
1282       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1283       <require condition="CM1_ARMCC"/>
1284       <require Dendian="Little-endian"/>
1285     </condition>
1286     <condition id="CM1_BE_ARMCC">
1287       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1288       <require condition="CM1_ARMCC"/>
1289       <require Dendian="Big-endian"/>
1290     </condition>
1291
1292     <condition id="CM3_ARMCC">
1293       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1294       <require condition="CM3"/>
1295       <require Tcompiler="ARMCC"/>
1296     </condition>
1297     <condition id="CM3_LE_ARMCC">
1298       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1299       <require condition="CM3_ARMCC"/>
1300       <require Dendian="Little-endian"/>
1301     </condition>
1302     <condition id="CM3_BE_ARMCC">
1303       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1304       <require condition="CM3_ARMCC"/>
1305       <require Dendian="Big-endian"/>
1306     </condition>
1307
1308     <condition id="CM4_ARMCC">
1309       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1310       <require condition="CM4"/>
1311       <require Tcompiler="ARMCC"/>
1312     </condition>
1313     <condition id="CM4_LE_ARMCC">
1314       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1315       <require condition="CM4_ARMCC"/>
1316       <require Dendian="Little-endian"/>
1317     </condition>
1318     <condition id="CM4_BE_ARMCC">
1319       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1320       <require condition="CM4_ARMCC"/>
1321       <require Dendian="Big-endian"/>
1322     </condition>
1323
1324     <condition id="CM4_FP_ARMCC">
1325       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1326       <require condition="CM4_FP"/>
1327       <require Tcompiler="ARMCC"/>
1328     </condition>
1329     <condition id="CM4_FP_LE_ARMCC">
1330       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1331       <require condition="CM4_FP_ARMCC"/>
1332       <require Dendian="Little-endian"/>
1333     </condition>
1334     <condition id="CM4_FP_BE_ARMCC">
1335       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1336       <require condition="CM4_FP_ARMCC"/>
1337       <require Dendian="Big-endian"/>
1338     </condition>
1339
1340     <condition id="CM7_ARMCC">
1341       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1342       <require condition="CM7"/>
1343       <require Tcompiler="ARMCC"/>
1344     </condition>
1345     <condition id="CM7_LE_ARMCC">
1346       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1347       <require condition="CM7_ARMCC"/>
1348       <require Dendian="Little-endian"/>
1349     </condition>
1350     <condition id="CM7_BE_ARMCC">
1351       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1352       <require condition="CM7_ARMCC"/>
1353       <require Dendian="Big-endian"/>
1354     </condition>
1355
1356     <condition id="CM7_FP_ARMCC">
1357       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1358       <require condition="CM7_FP"/>
1359       <require Tcompiler="ARMCC"/>
1360     </condition>
1361     <condition id="CM7_FP_LE_ARMCC">
1362       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1363       <require condition="CM7_FP_ARMCC"/>
1364       <require Dendian="Little-endian"/>
1365     </condition>
1366     <condition id="CM7_FP_BE_ARMCC">
1367       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1368       <require condition="CM7_FP_ARMCC"/>
1369       <require Dendian="Big-endian"/>
1370     </condition>
1371
1372     <condition id="CM7_SP_ARMCC">
1373       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1374       <require condition="CM7_SP"/>
1375       <require Tcompiler="ARMCC"/>
1376     </condition>
1377     <condition id="CM7_SP_LE_ARMCC">
1378       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1379       <require condition="CM7_SP_ARMCC"/>
1380       <require Dendian="Little-endian"/>
1381     </condition>
1382     <condition id="CM7_SP_BE_ARMCC">
1383       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1384       <require condition="CM7_SP_ARMCC"/>
1385       <require Dendian="Big-endian"/>
1386     </condition>
1387
1388     <condition id="CM7_DP_ARMCC">
1389       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1390       <require condition="CM7_DP"/>
1391       <require Tcompiler="ARMCC"/>
1392     </condition>
1393     <condition id="CM7_DP_LE_ARMCC">
1394       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1395       <require condition="CM7_DP_ARMCC"/>
1396       <require Dendian="Little-endian"/>
1397     </condition>
1398     <condition id="CM7_DP_BE_ARMCC">
1399       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1400       <require condition="CM7_DP_ARMCC"/>
1401       <require Dendian="Big-endian"/>
1402     </condition>
1403
1404     <condition id="CM23_ARMCC">
1405       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1406       <require condition="CM23"/>
1407       <require Tcompiler="ARMCC"/>
1408     </condition>
1409     <condition id="CM23_LE_ARMCC">
1410       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1411       <require condition="CM23_ARMCC"/>
1412       <require Dendian="Little-endian"/>
1413     </condition>
1414
1415     <condition id="CM33_ARMCC">
1416       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1417       <require condition="CM33"/>
1418       <require Tcompiler="ARMCC"/>
1419     </condition>
1420     <condition id="CM33_LE_ARMCC">
1421       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1422       <require condition="CM33_ARMCC"/>
1423       <require Dendian="Little-endian"/>
1424     </condition>
1425
1426     <condition id="CM33_FP_ARMCC">
1427       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1428       <require condition="CM33_FP"/>
1429       <require Tcompiler="ARMCC"/>
1430     </condition>
1431     <condition id="CM33_FP_LE_ARMCC">
1432       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1433       <require condition="CM33_FP_ARMCC"/>
1434       <require Dendian="Little-endian"/>
1435     </condition>
1436
1437     <condition id="CM33_NODSP_NOFPU_ARMCC">
1438       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1439       <require condition="CM33_NODSP_NOFPU"/>
1440       <require Tcompiler="ARMCC"/>
1441     </condition>
1442     <condition id="CM33_DSP_NOFPU_ARMCC">
1443       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1444       <require condition="CM33_DSP_NOFPU"/>
1445       <require Tcompiler="ARMCC"/>
1446     </condition>
1447     <condition id="CM33_NODSP_SP_ARMCC">
1448       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1449       <require condition="CM33_NODSP_SP"/>
1450       <require Tcompiler="ARMCC"/>
1451     </condition>
1452     <condition id="CM33_DSP_SP_ARMCC">
1453       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1454       <require condition="CM33_DSP_SP"/>
1455       <require Tcompiler="ARMCC"/>
1456     </condition>
1457     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1458       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1459       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1460       <require Dendian="Little-endian"/>
1461     </condition>
1462     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1463       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1464       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1465       <require Dendian="Little-endian"/>
1466     </condition>
1467     <condition id="CM33_NODSP_SP_LE_ARMCC">
1468       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1469       <require condition="CM33_NODSP_SP_ARMCC"/>
1470       <require Dendian="Little-endian"/>
1471     </condition>
1472     <condition id="CM33_DSP_SP_LE_ARMCC">
1473       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1474       <require condition="CM33_DSP_SP_ARMCC"/>
1475       <require Dendian="Little-endian"/>
1476     </condition>
1477
1478     <condition id="CM35P_ARMCC">
1479       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1480       <require condition="CM35P"/>
1481       <require Tcompiler="ARMCC"/>
1482     </condition>
1483     <condition id="CM35P_LE_ARMCC">
1484       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1485       <require condition="CM35P_ARMCC"/>
1486       <require Dendian="Little-endian"/>
1487     </condition>
1488
1489     <condition id="CM35P_FP_ARMCC">
1490       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1491       <require condition="CM35P_FP"/>
1492       <require Tcompiler="ARMCC"/>
1493     </condition>
1494     <condition id="CM35P_FP_LE_ARMCC">
1495       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1496       <require condition="CM35P_FP_ARMCC"/>
1497       <require Dendian="Little-endian"/>
1498     </condition>
1499
1500     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1501       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1502       <require condition="CM35P_NODSP_NOFPU"/>
1503       <require Tcompiler="ARMCC"/>
1504     </condition>
1505     <condition id="CM35P_DSP_NOFPU_ARMCC">
1506       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1507       <require condition="CM35P_DSP_NOFPU"/>
1508       <require Tcompiler="ARMCC"/>
1509     </condition>
1510     <condition id="CM35P_NODSP_SP_ARMCC">
1511       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1512       <require condition="CM35P_NODSP_SP"/>
1513       <require Tcompiler="ARMCC"/>
1514     </condition>
1515     <condition id="CM35P_DSP_SP_ARMCC">
1516       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1517       <require condition="CM35P_DSP_SP"/>
1518       <require Tcompiler="ARMCC"/>
1519     </condition>
1520     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1521       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1522       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1523       <require Dendian="Little-endian"/>
1524     </condition>
1525     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1526       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1527       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1528       <require Dendian="Little-endian"/>
1529     </condition>
1530     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1531       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1532       <require condition="CM35P_NODSP_SP_ARMCC"/>
1533       <require Dendian="Little-endian"/>
1534     </condition>
1535     <condition id="CM35P_DSP_SP_LE_ARMCC">
1536       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1537       <require condition="CM35P_DSP_SP_ARMCC"/>
1538       <require Dendian="Little-endian"/>
1539     </condition>
1540
1541     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1542       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1543       <require condition="CM55_NOFPU_NOMVE"/>
1544       <require Tcompiler="ARMCC"/>
1545     </condition>
1546     <condition id="CM55_NOFPU_MVE_ARMCC">
1547       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1548       <require condition="CM55_NOFPU_MVE"/>
1549       <require Tcompiler="ARMCC"/>
1550     </condition>
1551     <condition id="CM55_FPU_ARMCC">
1552       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1553       <require condition="CM55_FPU"/>
1554       <require Tcompiler="ARMCC"/>
1555     </condition>
1556     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1557       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1558       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1559       <require Dendian="Little-endian"/>
1560     </condition>
1561     <condition id="CM55_FPU_LE_ARMCC">
1562       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1563       <require condition="CM55_FPU_ARMCC"/>
1564       <require Dendian="Little-endian"/>
1565     </condition>
1566
1567     <condition id="ARMv8MBL_ARMCC">
1568       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1569       <require condition="ARMv8MBL"/>
1570       <require Tcompiler="ARMCC"/>
1571     </condition>
1572     <condition id="ARMv8MBL_LE_ARMCC">
1573       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1574       <require condition="ARMv8MBL_ARMCC"/>
1575       <require Dendian="Little-endian"/>
1576     </condition>
1577
1578     <condition id="ARMv8MML_ARMCC">
1579       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1580       <require condition="ARMv8MML"/>
1581       <require Tcompiler="ARMCC"/>
1582     </condition>
1583     <condition id="ARMv8MML_LE_ARMCC">
1584       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1585       <require condition="ARMv8MML_ARMCC"/>
1586       <require Dendian="Little-endian"/>
1587     </condition>
1588
1589     <condition id="ARMv8MML_FP_ARMCC">
1590       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1591       <require condition="ARMv8MML_FP"/>
1592       <require Tcompiler="ARMCC"/>
1593     </condition>
1594     <condition id="ARMv8MML_FP_LE_ARMCC">
1595       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1596       <require condition="ARMv8MML_FP_ARMCC"/>
1597       <require Dendian="Little-endian"/>
1598     </condition>
1599
1600     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1601       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1602       <require condition="ARMv8MML_NODSP_NOFPU"/>
1603       <require Tcompiler="ARMCC"/>
1604     </condition>
1605     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1606       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1607       <require condition="ARMv8MML_DSP_NOFPU"/>
1608       <require Tcompiler="ARMCC"/>
1609     </condition>
1610     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1611       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1612       <require condition="ARMv8MML_NODSP_SP"/>
1613       <require Tcompiler="ARMCC"/>
1614     </condition>
1615     <condition id="ARMv8MML_DSP_SP_ARMCC">
1616       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1617       <require condition="ARMv8MML_DSP_SP"/>
1618       <require Tcompiler="ARMCC"/>
1619     </condition>
1620     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1621       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1622       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1623       <require Dendian="Little-endian"/>
1624     </condition>
1625     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1626       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1627       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1628       <require Dendian="Little-endian"/>
1629     </condition>
1630     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1631       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1632       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1633       <require Dendian="Little-endian"/>
1634     </condition>
1635     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1636       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1637       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1638       <require Dendian="Little-endian"/>
1639     </condition>
1640
1641     <condition id="TZ Secure ARMCC6">
1642       <description>TrustZone (Secure), Arm Compiler</description>
1643       <require condition="TZ Secure"/>
1644       <require condition="ARMCC6"/>
1645     </condition>
1646     <condition id="TZ Non-secure ARMCC6">
1647       <description>TrustZone (Non-secure), Arm Compiler</description>
1648       <require condition="TZ Non-secure"/>
1649       <require condition="ARMCC6"/>
1650     </condition>
1651     <condition id="TZ Unavailable ARMCC6">
1652       <description>TrustZone not available, Arm Compiler</description>
1653       <require condition="TZ Unavailable"/>
1654       <require condition="ARMCC6"/>
1655     </condition>
1656
1657     <!-- GCC compiler -->
1658     <condition id="CA_GCC">
1659       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1660       <require condition="ARMv7-A Device"/>
1661       <require Tcompiler="GCC"/>
1662     </condition>
1663
1664     <condition id="CM0_GCC">
1665       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1666       <require condition="CM0"/>
1667       <require Tcompiler="GCC"/>
1668     </condition>
1669     <condition id="CM0_LE_GCC">
1670       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1671       <require condition="CM0_GCC"/>
1672       <require Dendian="Little-endian"/>
1673     </condition>
1674     <condition id="CM0_BE_GCC">
1675       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1676       <require condition="CM0_GCC"/>
1677       <require Dendian="Big-endian"/>
1678     </condition>
1679
1680     <condition id="CM1_GCC">
1681       <description>Cortex-M1 based device for the GCC Compiler</description>
1682       <require condition="CM1"/>
1683       <require Tcompiler="GCC"/>
1684     </condition>
1685     <condition id="CM1_LE_GCC">
1686       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1687       <require condition="CM1_GCC"/>
1688       <require Dendian="Little-endian"/>
1689     </condition>
1690     <condition id="CM1_BE_GCC">
1691       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1692       <require condition="CM1_GCC"/>
1693       <require Dendian="Big-endian"/>
1694     </condition>
1695
1696     <condition id="CM3_GCC">
1697       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1698       <require condition="CM3"/>
1699       <require Tcompiler="GCC"/>
1700     </condition>
1701     <condition id="CM3_LE_GCC">
1702       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1703       <require condition="CM3_GCC"/>
1704       <require Dendian="Little-endian"/>
1705     </condition>
1706     <condition id="CM3_BE_GCC">
1707       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1708       <require condition="CM3_GCC"/>
1709       <require Dendian="Big-endian"/>
1710     </condition>
1711
1712     <condition id="CM4_GCC">
1713       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1714       <require condition="CM4"/>
1715       <require Tcompiler="GCC"/>
1716     </condition>
1717     <condition id="CM4_LE_GCC">
1718       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1719       <require condition="CM4_GCC"/>
1720       <require Dendian="Little-endian"/>
1721     </condition>
1722     <condition id="CM4_BE_GCC">
1723       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1724       <require condition="CM4_GCC"/>
1725       <require Dendian="Big-endian"/>
1726     </condition>
1727
1728     <condition id="CM4_FP_GCC">
1729       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1730       <require condition="CM4_FP"/>
1731       <require Tcompiler="GCC"/>
1732     </condition>
1733     <condition id="CM4_FP_LE_GCC">
1734       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1735       <require condition="CM4_FP_GCC"/>
1736       <require Dendian="Little-endian"/>
1737     </condition>
1738     <condition id="CM4_FP_BE_GCC">
1739       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1740       <require condition="CM4_FP_GCC"/>
1741       <require Dendian="Big-endian"/>
1742     </condition>
1743
1744     <condition id="CM7_GCC">
1745       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1746       <require condition="CM7"/>
1747       <require Tcompiler="GCC"/>
1748     </condition>
1749     <condition id="CM7_LE_GCC">
1750       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1751       <require condition="CM7_GCC"/>
1752       <require Dendian="Little-endian"/>
1753     </condition>
1754     <condition id="CM7_BE_GCC">
1755       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1756       <require condition="CM7_GCC"/>
1757       <require Dendian="Big-endian"/>
1758     </condition>
1759
1760     <condition id="CM7_FP_GCC">
1761       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1762       <require condition="CM7_FP"/>
1763       <require Tcompiler="GCC"/>
1764     </condition>
1765     <condition id="CM7_FP_LE_GCC">
1766       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1767       <require condition="CM7_FP_GCC"/>
1768       <require Dendian="Little-endian"/>
1769     </condition>
1770     <condition id="CM7_FP_BE_GCC">
1771       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1772       <require condition="CM7_FP_GCC"/>
1773       <require Dendian="Big-endian"/>
1774     </condition>
1775
1776     <condition id="CM7_SP_GCC">
1777       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1778       <require condition="CM7_SP"/>
1779       <require Tcompiler="GCC"/>
1780     </condition>
1781     <condition id="CM7_SP_LE_GCC">
1782       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1783       <require condition="CM7_SP_GCC"/>
1784       <require Dendian="Little-endian"/>
1785     </condition>
1786
1787     <condition id="CM7_DP_GCC">
1788       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1789       <require condition="CM7_DP"/>
1790       <require Tcompiler="GCC"/>
1791     </condition>
1792     <condition id="CM7_DP_LE_GCC">
1793       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1794       <require condition="CM7_DP_GCC"/>
1795       <require Dendian="Little-endian"/>
1796     </condition>
1797
1798     <condition id="CM23_GCC">
1799       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1800       <require condition="CM23"/>
1801       <require Tcompiler="GCC"/>
1802     </condition>
1803     <condition id="CM23_LE_GCC">
1804       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1805       <require condition="CM23_GCC"/>
1806       <require Dendian="Little-endian"/>
1807     </condition>
1808
1809     <condition id="CM33_GCC">
1810       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1811       <require condition="CM33"/>
1812       <require Tcompiler="GCC"/>
1813     </condition>
1814     <condition id="CM33_LE_GCC">
1815       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1816       <require condition="CM33_GCC"/>
1817       <require Dendian="Little-endian"/>
1818     </condition>
1819
1820     <condition id="CM33_FP_GCC">
1821       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1822       <require condition="CM33_FP"/>
1823       <require Tcompiler="GCC"/>
1824     </condition>
1825     <condition id="CM33_FP_LE_GCC">
1826       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1827       <require condition="CM33_FP_GCC"/>
1828       <require Dendian="Little-endian"/>
1829     </condition>
1830
1831     <condition id="CM33_NODSP_NOFPU_GCC">
1832       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1833       <require condition="CM33_NODSP_NOFPU"/>
1834       <require Tcompiler="GCC"/>
1835     </condition>
1836     <condition id="CM33_DSP_NOFPU_GCC">
1837       <description>CM33, DSP, no FPU, GCC Compiler</description>
1838       <require condition="CM33_DSP_NOFPU"/>
1839       <require Tcompiler="GCC"/>
1840     </condition>
1841     <condition id="CM33_NODSP_SP_GCC">
1842       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1843       <require condition="CM33_NODSP_SP"/>
1844       <require Tcompiler="GCC"/>
1845     </condition>
1846     <condition id="CM33_DSP_SP_GCC">
1847       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1848       <require condition="CM33_DSP_SP"/>
1849       <require Tcompiler="GCC"/>
1850     </condition>
1851     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1852       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1853       <require condition="CM33_NODSP_NOFPU_GCC"/>
1854       <require Dendian="Little-endian"/>
1855     </condition>
1856     <condition id="CM33_DSP_NOFPU_LE_GCC">
1857       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1858       <require condition="CM33_DSP_NOFPU_GCC"/>
1859       <require Dendian="Little-endian"/>
1860     </condition>
1861     <condition id="CM33_NODSP_SP_LE_GCC">
1862       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1863       <require condition="CM33_NODSP_SP_GCC"/>
1864       <require Dendian="Little-endian"/>
1865     </condition>
1866     <condition id="CM33_DSP_SP_LE_GCC">
1867       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1868       <require condition="CM33_DSP_SP_GCC"/>
1869       <require Dendian="Little-endian"/>
1870     </condition>
1871
1872     <condition id="CM35P_GCC">
1873       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1874       <require condition="CM35P"/>
1875       <require Tcompiler="GCC"/>
1876     </condition>
1877     <condition id="CM35P_LE_GCC">
1878       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1879       <require condition="CM35P_GCC"/>
1880       <require Dendian="Little-endian"/>
1881     </condition>
1882
1883     <condition id="CM35P_FP_GCC">
1884       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1885       <require condition="CM35P_FP"/>
1886       <require Tcompiler="GCC"/>
1887     </condition>
1888     <condition id="CM35P_FP_LE_GCC">
1889       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1890       <require condition="CM35P_FP_GCC"/>
1891       <require Dendian="Little-endian"/>
1892     </condition>
1893
1894     <condition id="CM35P_NODSP_NOFPU_GCC">
1895       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1896       <require condition="CM35P_NODSP_NOFPU"/>
1897       <require Tcompiler="GCC"/>
1898     </condition>
1899     <condition id="CM35P_DSP_NOFPU_GCC">
1900       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1901       <require condition="CM35P_DSP_NOFPU"/>
1902       <require Tcompiler="GCC"/>
1903     </condition>
1904     <condition id="CM35P_NODSP_SP_GCC">
1905       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1906       <require condition="CM35P_NODSP_SP"/>
1907       <require Tcompiler="GCC"/>
1908     </condition>
1909     <condition id="CM35P_DSP_SP_GCC">
1910       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1911       <require condition="CM35P_DSP_SP"/>
1912       <require Tcompiler="GCC"/>
1913     </condition>
1914     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1915       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1916       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1917       <require Dendian="Little-endian"/>
1918     </condition>
1919     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1920       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1921       <require condition="CM35P_DSP_NOFPU_GCC"/>
1922       <require Dendian="Little-endian"/>
1923     </condition>
1924     <condition id="CM35P_NODSP_SP_LE_GCC">
1925       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1926       <require condition="CM35P_NODSP_SP_GCC"/>
1927       <require Dendian="Little-endian"/>
1928     </condition>
1929     <condition id="CM35P_DSP_SP_LE_GCC">
1930       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1931       <require condition="CM35P_DSP_SP_GCC"/>
1932       <require Dendian="Little-endian"/>
1933     </condition>
1934
1935     <condition id="CM55_NOFPU_NOMVE_GCC">
1936       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1937       <require condition="CM55_NOFPU_NOMVE"/>
1938       <require Tcompiler="GCC"/>
1939     </condition>
1940     <condition id="CM55_NOFPU_MVE_GCC">
1941       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1942       <require condition="CM55_NOFPU_MVE"/>
1943       <require Tcompiler="GCC"/>
1944     </condition>
1945     <condition id="CM55_FPU_GCC">
1946       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1947       <require condition="CM55_FPU"/>
1948       <require Tcompiler="GCC"/>
1949     </condition>
1950     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1951       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1952       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1953       <require Dendian="Little-endian"/>
1954     </condition>
1955     <condition id="CM55_FPU_LE_GCC">
1956       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1957       <require condition="CM55_FPU_GCC"/>
1958       <require Dendian="Little-endian"/>
1959     </condition>
1960
1961     <condition id="ARMv8MBL_GCC">
1962       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1963       <require condition="ARMv8MBL"/>
1964       <require Tcompiler="GCC"/>
1965     </condition>
1966     <condition id="ARMv8MBL_LE_GCC">
1967       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1968       <require condition="ARMv8MBL_GCC"/>
1969       <require Dendian="Little-endian"/>
1970     </condition>
1971
1972     <condition id="ARMv8MML_GCC">
1973       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1974       <require condition="ARMv8MML"/>
1975       <require Tcompiler="GCC"/>
1976     </condition>
1977     <condition id="ARMv8MML_LE_GCC">
1978       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1979       <require condition="ARMv8MML_GCC"/>
1980       <require Dendian="Little-endian"/>
1981     </condition>
1982
1983     <condition id="ARMv8MML_FP_GCC">
1984       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1985       <require condition="ARMv8MML_FP"/>
1986       <require Tcompiler="GCC"/>
1987     </condition>
1988     <condition id="ARMv8MML_FP_LE_GCC">
1989       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1990       <require condition="ARMv8MML_FP_GCC"/>
1991       <require Dendian="Little-endian"/>
1992     </condition>
1993
1994     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1995       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1996       <require condition="ARMv8MML_NODSP_NOFPU"/>
1997       <require Tcompiler="GCC"/>
1998     </condition>
1999     <condition id="ARMv8MML_DSP_NOFPU_GCC">
2000       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
2001       <require condition="ARMv8MML_DSP_NOFPU"/>
2002       <require Tcompiler="GCC"/>
2003     </condition>
2004     <condition id="ARMv8MML_NODSP_SP_GCC">
2005       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
2006       <require condition="ARMv8MML_NODSP_SP"/>
2007       <require Tcompiler="GCC"/>
2008     </condition>
2009     <condition id="ARMv8MML_DSP_SP_GCC">
2010       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
2011       <require condition="ARMv8MML_DSP_SP"/>
2012       <require Tcompiler="GCC"/>
2013     </condition>
2014     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
2015       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
2016       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
2017       <require Dendian="Little-endian"/>
2018     </condition>
2019     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
2020       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
2021       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
2022       <require Dendian="Little-endian"/>
2023     </condition>
2024     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
2025       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
2026       <require condition="ARMv8MML_NODSP_SP_GCC"/>
2027       <require Dendian="Little-endian"/>
2028     </condition>
2029     <condition id="ARMv8MML_DSP_SP_LE_GCC">
2030       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
2031       <require condition="ARMv8MML_DSP_SP_GCC"/>
2032       <require Dendian="Little-endian"/>
2033     </condition>
2034
2035     <!-- IAR compiler -->
2036     <condition id="CA_IAR">
2037       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
2038       <require condition="ARMv7-A Device"/>
2039       <require Tcompiler="IAR"/>
2040     </condition>
2041
2042     <condition id="CM0_IAR">
2043       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
2044       <require condition="CM0"/>
2045       <require Tcompiler="IAR"/>
2046     </condition>
2047     <condition id="CM0_LE_IAR">
2048       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
2049       <require condition="CM0_IAR"/>
2050       <require Dendian="Little-endian"/>
2051     </condition>
2052     <condition id="CM0_BE_IAR">
2053       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
2054       <require condition="CM0_IAR"/>
2055       <require Dendian="Big-endian"/>
2056     </condition>
2057
2058     <condition id="CM1_IAR">
2059       <description>Cortex-M1 based device for the IAR Compiler</description>
2060       <require condition="CM1"/>
2061       <require Tcompiler="IAR"/>
2062     </condition>
2063     <condition id="CM1_LE_IAR">
2064       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
2065       <require condition="CM1_IAR"/>
2066       <require Dendian="Little-endian"/>
2067     </condition>
2068     <condition id="CM1_BE_IAR">
2069       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
2070       <require condition="CM1_IAR"/>
2071       <require Dendian="Big-endian"/>
2072     </condition>
2073
2074     <condition id="CM3_IAR">
2075       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
2076       <require condition="CM3"/>
2077       <require Tcompiler="IAR"/>
2078     </condition>
2079     <condition id="CM3_LE_IAR">
2080       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
2081       <require condition="CM3_IAR"/>
2082       <require Dendian="Little-endian"/>
2083     </condition>
2084     <condition id="CM3_BE_IAR">
2085       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
2086       <require condition="CM3_IAR"/>
2087       <require Dendian="Big-endian"/>
2088     </condition>
2089
2090     <condition id="CM4_IAR">
2091       <description>Cortex-M4 processor based device for the IAR Compiler</description>
2092       <require condition="CM4"/>
2093       <require Tcompiler="IAR"/>
2094     </condition>
2095     <condition id="CM4_LE_IAR">
2096       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
2097       <require condition="CM4_IAR"/>
2098       <require Dendian="Little-endian"/>
2099     </condition>
2100     <condition id="CM4_BE_IAR">
2101       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2102       <require condition="CM4_IAR"/>
2103       <require Dendian="Big-endian"/>
2104     </condition>
2105
2106     <condition id="CM4_FP_IAR">
2107       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2108       <require condition="CM4_FP"/>
2109       <require Tcompiler="IAR"/>
2110     </condition>
2111     <condition id="CM4_FP_LE_IAR">
2112       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2113       <require condition="CM4_FP_IAR"/>
2114       <require Dendian="Little-endian"/>
2115     </condition>
2116     <condition id="CM4_FP_BE_IAR">
2117       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2118       <require condition="CM4_FP_IAR"/>
2119       <require Dendian="Big-endian"/>
2120     </condition>
2121
2122     <condition id="CM7_IAR">
2123       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2124       <require condition="CM7"/>
2125       <require Tcompiler="IAR"/>
2126     </condition>
2127     <condition id="CM7_LE_IAR">
2128       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2129       <require condition="CM7_IAR"/>
2130       <require Dendian="Little-endian"/>
2131     </condition>
2132     <condition id="CM7_BE_IAR">
2133       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2134       <require condition="CM7_IAR"/>
2135       <require Dendian="Big-endian"/>
2136     </condition>
2137
2138     <condition id="CM7_FP_IAR">
2139       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2140       <require condition="CM7_FP"/>
2141       <require Tcompiler="IAR"/>
2142     </condition>
2143     <condition id="CM7_FP_LE_IAR">
2144       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2145       <require condition="CM7_FP_IAR"/>
2146       <require Dendian="Little-endian"/>
2147     </condition>
2148     <condition id="CM7_FP_BE_IAR">
2149       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2150       <require condition="CM7_FP_IAR"/>
2151       <require Dendian="Big-endian"/>
2152     </condition>
2153
2154     <condition id="CM7_SP_IAR">
2155       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2156       <require condition="CM7_SP"/>
2157       <require Tcompiler="IAR"/>
2158     </condition>
2159     <condition id="CM7_SP_LE_IAR">
2160       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2161       <require condition="CM7_SP_IAR"/>
2162       <require Dendian="Little-endian"/>
2163     </condition>
2164     <condition id="CM7_SP_BE_IAR">
2165       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2166       <require condition="CM7_SP_IAR"/>
2167       <require Dendian="Big-endian"/>
2168     </condition>
2169
2170     <condition id="CM7_DP_IAR">
2171       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2172       <require condition="CM7_DP"/>
2173       <require Tcompiler="IAR"/>
2174     </condition>
2175     <condition id="CM7_DP_LE_IAR">
2176       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2177       <require condition="CM7_DP_IAR"/>
2178       <require Dendian="Little-endian"/>
2179     </condition>
2180     <condition id="CM7_DP_BE_IAR">
2181       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2182       <require condition="CM7_DP_IAR"/>
2183       <require Dendian="Big-endian"/>
2184     </condition>
2185
2186     <condition id="CM23_IAR">
2187       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2188       <require condition="CM23"/>
2189       <require Tcompiler="IAR"/>
2190     </condition>
2191     <condition id="CM23_LE_IAR">
2192       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2193       <require condition="CM23_IAR"/>
2194       <require Dendian="Little-endian"/>
2195     </condition>
2196
2197     <condition id="CM33_IAR">
2198       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2199       <require condition="CM33"/>
2200       <require Tcompiler="IAR"/>
2201     </condition>
2202     <condition id="CM33_LE_IAR">
2203       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2204       <require condition="CM33_IAR"/>
2205       <require Dendian="Little-endian"/>
2206     </condition>
2207
2208     <condition id="CM33_FP_IAR">
2209       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2210       <require condition="CM33_FP"/>
2211       <require Tcompiler="IAR"/>
2212     </condition>
2213     <condition id="CM33_FP_LE_IAR">
2214       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2215       <require condition="CM33_FP_IAR"/>
2216       <require Dendian="Little-endian"/>
2217     </condition>
2218
2219     <condition id="CM33_NODSP_NOFPU_IAR">
2220       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2221       <require condition="CM33_NODSP_NOFPU"/>
2222       <require Tcompiler="IAR"/>
2223     </condition>
2224     <condition id="CM33_DSP_NOFPU_IAR">
2225       <description>CM33, DSP, no FPU, IAR Compiler</description>
2226       <require condition="CM33_DSP_NOFPU"/>
2227       <require Tcompiler="IAR"/>
2228     </condition>
2229     <condition id="CM33_NODSP_SP_IAR">
2230       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2231       <require condition="CM33_NODSP_SP"/>
2232       <require Tcompiler="IAR"/>
2233     </condition>
2234     <condition id="CM33_DSP_SP_IAR">
2235       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2236       <require condition="CM33_DSP_SP"/>
2237       <require Tcompiler="IAR"/>
2238     </condition>
2239     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2240       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2241       <require condition="CM33_NODSP_NOFPU_IAR"/>
2242       <require Dendian="Little-endian"/>
2243     </condition>
2244     <condition id="CM33_DSP_NOFPU_LE_IAR">
2245       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2246       <require condition="CM33_DSP_NOFPU_IAR"/>
2247       <require Dendian="Little-endian"/>
2248     </condition>
2249     <condition id="CM33_NODSP_SP_LE_IAR">
2250       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2251       <require condition="CM33_NODSP_SP_IAR"/>
2252       <require Dendian="Little-endian"/>
2253     </condition>
2254     <condition id="CM33_DSP_SP_LE_IAR">
2255       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2256       <require condition="CM33_DSP_SP_IAR"/>
2257       <require Dendian="Little-endian"/>
2258     </condition>
2259
2260     <condition id="CM35P_IAR">
2261       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2262       <require condition="CM35P"/>
2263       <require Tcompiler="IAR"/>
2264     </condition>
2265     <condition id="CM35P_LE_IAR">
2266       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2267       <require condition="CM35P_IAR"/>
2268       <require Dendian="Little-endian"/>
2269     </condition>
2270
2271     <condition id="CM35P_FP_IAR">
2272       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2273       <require condition="CM35P_FP"/>
2274       <require Tcompiler="IAR"/>
2275     </condition>
2276     <condition id="CM35P_FP_LE_IAR">
2277       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2278       <require condition="CM35P_FP_IAR"/>
2279       <require Dendian="Little-endian"/>
2280     </condition>
2281
2282     <condition id="CM35P_NODSP_NOFPU_IAR">
2283       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2284       <require condition="CM35P_NODSP_NOFPU"/>
2285       <require Tcompiler="IAR"/>
2286     </condition>
2287     <condition id="CM35P_DSP_NOFPU_IAR">
2288       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2289       <require condition="CM35P_DSP_NOFPU"/>
2290       <require Tcompiler="IAR"/>
2291     </condition>
2292     <condition id="CM35P_NODSP_SP_IAR">
2293       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2294       <require condition="CM35P_NODSP_SP"/>
2295       <require Tcompiler="IAR"/>
2296     </condition>
2297     <condition id="CM35P_DSP_SP_IAR">
2298       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2299       <require condition="CM35P_DSP_SP"/>
2300       <require Tcompiler="IAR"/>
2301     </condition>
2302     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2303       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2304       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2305       <require Dendian="Little-endian"/>
2306     </condition>
2307     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2308       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2309       <require condition="CM35P_DSP_NOFPU_IAR"/>
2310       <require Dendian="Little-endian"/>
2311     </condition>
2312     <condition id="CM35P_NODSP_SP_LE_IAR">
2313       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2314       <require condition="CM35P_NODSP_SP_IAR"/>
2315       <require Dendian="Little-endian"/>
2316     </condition>
2317     <condition id="CM35P_DSP_SP_LE_IAR">
2318       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2319       <require condition="CM35P_DSP_SP_IAR"/>
2320       <require Dendian="Little-endian"/>
2321     </condition>
2322
2323     <condition id="CM55_NOFPU_NOMVE_IAR">
2324       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
2325       <require condition="CM55_NOFPU_NOMVE"/>
2326       <require Tcompiler="IAR"/>
2327     </condition>
2328     <condition id="CM55_NOFPU_MVE_IAR">
2329       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
2330       <require condition="CM55_NOFPU_MVE"/>
2331       <require Tcompiler="IAR"/>
2332     </condition>
2333     <condition id="CM55_FPU_IAR">
2334       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
2335       <require condition="CM55_FPU"/>
2336       <require Tcompiler="IAR"/>
2337     </condition>
2338     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
2339       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
2340       <require condition="CM55_NOFPU_NOMVE_IAR"/>
2341       <require Dendian="Little-endian"/>
2342     </condition>
2343     <condition id="CM55_FPU_LE_IAR">
2344       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
2345       <require condition="CM55_FPU_IAR"/>
2346       <require Dendian="Little-endian"/>
2347     </condition>
2348
2349     <condition id="ARMv8MBL_IAR">
2350       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2351       <require condition="ARMv8MBL"/>
2352       <require Tcompiler="IAR"/>
2353     </condition>
2354     <condition id="ARMv8MBL_LE_IAR">
2355       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2356       <require condition="ARMv8MBL_IAR"/>
2357       <require Dendian="Little-endian"/>
2358     </condition>
2359
2360     <condition id="ARMv8MML_IAR">
2361       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2362       <require condition="ARMv8MML"/>
2363       <require Tcompiler="IAR"/>
2364     </condition>
2365     <condition id="ARMv8MML_LE_IAR">
2366       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2367       <require condition="ARMv8MML_IAR"/>
2368       <require Dendian="Little-endian"/>
2369     </condition>
2370
2371     <condition id="ARMv8MML_FP_IAR">
2372       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2373       <require condition="ARMv8MML_FP"/>
2374       <require Tcompiler="IAR"/>
2375     </condition>
2376     <condition id="ARMv8MML_FP_LE_IAR">
2377       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2378       <require condition="ARMv8MML_FP_IAR"/>
2379       <require Dendian="Little-endian"/>
2380     </condition>
2381
2382     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2383       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2384       <require condition="ARMv8MML_NODSP_NOFPU"/>
2385       <require Tcompiler="IAR"/>
2386     </condition>
2387     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2388       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2389       <require condition="ARMv8MML_DSP_NOFPU"/>
2390       <require Tcompiler="IAR"/>
2391     </condition>
2392     <condition id="ARMv8MML_NODSP_SP_IAR">
2393       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2394       <require condition="ARMv8MML_NODSP_SP"/>
2395       <require Tcompiler="IAR"/>
2396     </condition>
2397     <condition id="ARMv8MML_DSP_SP_IAR">
2398       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2399       <require condition="ARMv8MML_DSP_SP"/>
2400       <require Tcompiler="IAR"/>
2401     </condition>
2402     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2403       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2404       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2405       <require Dendian="Little-endian"/>
2406     </condition>
2407     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2408       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2409       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2410       <require Dendian="Little-endian"/>
2411     </condition>
2412     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2413       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2414       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2415       <require Dendian="Little-endian"/>
2416     </condition>
2417     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2418       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2419       <require condition="ARMv8MML_DSP_SP_IAR"/>
2420       <require Dendian="Little-endian"/>
2421     </condition>
2422
2423     <!-- conditions selecting single devices and CMSIS Core -->
2424     <condition id="ARMCM0 CMSIS">
2425       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2426       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2427       <require Cclass="CMSIS" Cgroup="CORE"/>
2428     </condition>
2429
2430     <condition id="ARMCM0+ CMSIS">
2431       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2432       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2433       <require Cclass="CMSIS" Cgroup="CORE"/>
2434     </condition>
2435
2436     <condition id="ARMCM1 CMSIS">
2437       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2438       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2439       <require Cclass="CMSIS" Cgroup="CORE"/>
2440     </condition>
2441
2442     <condition id="ARMCM3 CMSIS">
2443       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2444       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2445       <require Cclass="CMSIS" Cgroup="CORE"/>
2446     </condition>
2447
2448     <condition id="ARMCM4 CMSIS">
2449       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2450       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2451       <require Cclass="CMSIS" Cgroup="CORE"/>
2452     </condition>
2453
2454     <condition id="ARMCM7 CMSIS">
2455       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2456       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2457       <require Cclass="CMSIS" Cgroup="CORE"/>
2458     </condition>
2459
2460     <condition id="ARMCM23 CMSIS">
2461       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2462       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2463       <require Cclass="CMSIS" Cgroup="CORE"/>
2464     </condition>
2465
2466     <condition id="ARMCM33 CMSIS">
2467       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2468       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2469       <require Cclass="CMSIS" Cgroup="CORE"/>
2470     </condition>
2471
2472     <condition id="ARMCM35P CMSIS">
2473       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2474       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2475       <require Cclass="CMSIS" Cgroup="CORE"/>
2476     </condition>
2477
2478     <condition id="ARMCM55 CMSIS">
2479       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2480       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2481       <require Cclass="CMSIS" Cgroup="CORE"/>
2482     </condition>
2483
2484     <condition id="ARMSC000 CMSIS">
2485       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2486       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2487       <require Cclass="CMSIS" Cgroup="CORE"/>
2488     </condition>
2489
2490     <condition id="ARMSC300 CMSIS">
2491       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2492       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2493       <require Cclass="CMSIS" Cgroup="CORE"/>
2494     </condition>
2495
2496     <condition id="ARMv8MBL CMSIS">
2497       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2498       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2499       <require Cclass="CMSIS" Cgroup="CORE"/>
2500     </condition>
2501
2502     <condition id="ARMv8MML CMSIS">
2503       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2504       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2505       <require Cclass="CMSIS" Cgroup="CORE"/>
2506     </condition>
2507
2508     <condition id="ARMv81MML CMSIS">
2509       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2510       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2511       <require Cclass="CMSIS" Cgroup="CORE"/>
2512     </condition>
2513
2514     <condition id="ARMCA5 CMSIS">
2515       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2516       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2517       <require Cclass="CMSIS" Cgroup="CORE"/>
2518     </condition>
2519
2520     <condition id="ARMCA7 CMSIS">
2521       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2522       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2523       <require Cclass="CMSIS" Cgroup="CORE"/>
2524     </condition>
2525
2526     <condition id="ARMCA9 CMSIS">
2527       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2528       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2529       <require Cclass="CMSIS" Cgroup="CORE"/>
2530     </condition>
2531
2532     <!-- CMSIS DSP -->
2533     <condition id="CMSIS DSP">
2534       <description>Components required for DSP</description>
2535       <require condition="ARMv6_7_8-M Device"/>
2536       <require condition="ARMCC GCC IAR"/>
2537       <require Cclass="CMSIS" Cgroup="CORE"/>
2538     </condition>
2539
2540     <!-- CMSIS NN -->
2541     <condition id="CMSIS NN">
2542       <description>Components required for NN</description>
2543       <require Cclass="CMSIS" Cgroup="DSP"/>
2544     </condition>
2545
2546     <!-- RTOS RTX -->
2547     <condition id="RTOS RTX">
2548       <description>Components required for RTOS RTX</description>
2549       <require condition="ARMv6_7-M Device"/>
2550       <require condition="ARMCC GCC IAR"/>
2551       <require Cclass="Device" Cgroup="Startup"/>
2552       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2553     </condition>
2554     <condition id="RTOS RTX IFX">
2555       <description>Components required for RTOS RTX IFX</description>
2556       <require condition="ARMv6_7-M Device"/>
2557       <require condition="ARMCC GCC IAR"/>
2558       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2559       <require Cclass="Device" Cgroup="Startup"/>
2560       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2561     </condition>
2562     <condition id="RTOS RTX5">
2563       <description>Components required for RTOS RTX5</description>
2564       <require condition="ARMv6_7_8-M Device"/>
2565       <require condition="ARMCC GCC IAR"/>
2566       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2567     </condition>
2568     <condition id="RTOS2 RTX5">
2569       <description>Components required for RTOS2 RTX5</description>
2570       <require condition="ARMv6_7_8-M Device"/>
2571       <require condition="ARMCC GCC IAR"/>
2572       <require Cclass="CMSIS"  Cgroup="CORE"/>
2573       <require Cclass="Device" Cgroup="Startup"/>
2574     </condition>
2575     <condition id="RTOS2 RTX5 v7-A">
2576       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2577       <require condition="ARMv7-A Device"/>
2578       <require condition="ARMCC GCC IAR"/>
2579       <require Cclass="CMSIS"  Cgroup="CORE"/>
2580       <require Cclass="Device" Cgroup="Startup"/>
2581       <require Cclass="Device" Cgroup="OS Tick"/>
2582       <require Cclass="Device" Cgroup="IRQ Controller"/>
2583     </condition>
2584     <condition id="RTOS2 RTX5 NS">
2585       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2586       <require condition="ARMv8-M Device"/>
2587       <require condition="TZ Non-secure"/>
2588       <require condition="ARMCC GCC IAR"/>
2589       <require Cclass="CMSIS"  Cgroup="CORE"/>
2590       <require Cclass="Device" Cgroup="Startup"/>
2591     </condition>
2592
2593     <!-- OS Tick -->
2594     <condition id="OS Tick PTIM">
2595       <description>Components required for OS Tick Private Timer</description>
2596       <require condition="CA5_CA9"/>
2597       <require Cclass="Device" Cgroup="IRQ Controller"/>
2598     </condition>
2599
2600     <condition id="OS Tick GTIM">
2601       <description>Components required for OS Tick Generic Physical Timer</description>
2602       <require condition="CA7"/>
2603       <require Cclass="Device" Cgroup="IRQ Controller"/>
2604     </condition>
2605
2606   </conditions>
2607
2608   <components>
2609     <!-- CMSIS-Core component -->
2610     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2611       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2612       <files>
2613         <!-- CPU independent -->
2614         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2615         <file category="include" name="CMSIS/Core/Include/"/>
2616         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2617         <!-- Code template -->
2618         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2619         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2620       </files>
2621     </component>
2622
2623     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.0"  condition="ARMv7-A Device" >
2624       <description>CMSIS-CORE for Cortex-A</description>
2625       <files>
2626         <!-- CPU independent -->
2627         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2628         <file category="include" name="CMSIS/Core_A/Include/"/>
2629       </files>
2630     </component>
2631
2632     <!-- CMSIS-Startup components -->
2633     <!-- Cortex-M0 -->
2634     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
2635       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2636       <files>
2637         <!-- include folder / device header file -->
2638         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2639         <!-- startup / system file -->
2640         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2641         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2642         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2643         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2644         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2645       </files>
2646     </component>
2647     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2648       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2649       <files>
2650         <!-- include folder / device header file -->
2651         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2652         <!-- startup / system file -->
2653         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2654         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.1.0" attr="config" condition="GCC"/>
2655         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2656         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2657         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2658       </files>
2659     </component>
2660
2661     <!-- Cortex-M0+ -->
2662     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
2663       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2664       <files>
2665         <!-- include folder / device header file -->
2666         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2667         <!-- startup / system file -->
2668         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2669         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2670         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2671         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2672         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2673       </files>
2674     </component>
2675     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2676       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2677       <files>
2678         <!-- include folder / device header file -->
2679         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2680         <!-- startup / system file -->
2681         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2682         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.1.0" attr="config" condition="GCC"/>
2683         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2684         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2685         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2686       </files>
2687     </component>
2688
2689     <!-- Cortex-M1 -->
2690     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
2691       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2692       <files>
2693         <!-- include folder / device header file -->
2694         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2695         <!-- startup / system file -->
2696         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2697         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2698         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2699         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2700         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2701       </files>
2702     </component>
2703     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2704       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2705       <files>
2706         <!-- include folder / device header file -->
2707         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2708         <!-- startup / system file -->
2709         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2710         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.1.0" attr="config" condition="GCC"/>
2711         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2712         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2713         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2714       </files>
2715     </component>
2716
2717     <!-- Cortex-M3 -->
2718     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
2719       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2720       <files>
2721         <!-- include folder / device header file -->
2722         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2723         <!-- startup / system file -->
2724         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2725         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2726         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2727         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2728         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2729       </files>
2730     </component>
2731     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2732       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2733       <files>
2734         <!-- include folder / device header file -->
2735         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2736         <!-- startup / system file -->
2737         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2738         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.1.0" attr="config" condition="GCC"/>
2739         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2740         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2741         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2742       </files>
2743     </component>
2744
2745     <!-- Cortex-M4 -->
2746     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
2747       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2748       <files>
2749         <!-- include folder / device header file -->
2750         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2751         <!-- startup / system file -->
2752         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2753         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2754         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2755         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2756        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2757       </files>
2758     </component>
2759     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2760       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2761       <files>
2762         <!-- include folder / device header file -->
2763         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2764         <!-- startup / system file -->
2765         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2766         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.1.0" attr="config" condition="GCC"/>
2767         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2768         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2769         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2770       </files>
2771     </component>
2772
2773     <!-- Cortex-M7 -->
2774     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
2775       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2776       <files>
2777         <!-- include folder / device header file -->
2778         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2779         <!-- startup / system file -->
2780         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2781         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2782         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2783         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2784         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2785       </files>
2786     </component>
2787     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2788       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2789       <files>
2790         <!-- include folder / device header file -->
2791         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2792         <!-- startup / system file -->
2793         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2794         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.1.0" attr="config" condition="GCC"/>
2795         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2796         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2797         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2798       </files>
2799     </component>
2800
2801     <!-- Cortex-M23 -->
2802     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
2803       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2804       <files>
2805         <!-- include folder / device header file -->
2806         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2807         <!-- startup / system file -->
2808         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
2809         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2810         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2811         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2812         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2813         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2814         <!-- SAU configuration -->
2815         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2816       </files>
2817     </component>
2818     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
2819       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2820       <files>
2821         <!-- include folder / device header file -->
2822         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2823         <!-- startup / system file -->
2824         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2825         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2826         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2827         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2828         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
2829         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2830         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2831         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2832         <!-- SAU configuration -->
2833         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2834       </files>
2835     </component>
2836
2837     <!-- Cortex-M33 -->
2838     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
2839       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2840       <files>
2841         <!-- include folder / device header file -->
2842         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2843         <!-- startup / system file -->
2844         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
2845         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2846         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2847         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2848         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2849         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2850         <!-- SAU configuration -->
2851         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2852       </files>
2853     </component>
2854     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
2855       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2856       <files>
2857         <!-- include folder / device header file -->
2858         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2859         <!-- startup / system file -->
2860         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2861         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2862         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2863         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2864         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.2.0" attr="config" condition="GCC"/>
2865         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2866         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2867         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2868         <!-- SAU configuration -->
2869         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2870       </files>
2871     </component>
2872
2873     <!-- Cortex-M35P -->
2874     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
2875       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2876       <files>
2877         <!-- include folder / device header file -->
2878         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2879         <!-- startup / system file -->
2880         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
2881         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2882         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2883         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2884         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2885         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2886         <!-- SAU configuration -->
2887         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2888       </files>
2889     </component>
2890     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
2891       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2892       <files>
2893         <!-- include folder / device header file -->
2894         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2895         <!-- startup / system file -->
2896         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2897         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2898         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2899         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2900         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.2.0" attr="config" condition="GCC"/>
2901         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2902         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2903         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2904         <!-- SAU configuration -->
2905         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2906       </files>
2907     </component>
2908
2909     <!-- Cortex-M55 -->
2910     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
2911       <description>System and Startup for Generic Cortex-M55 device</description>
2912       <files>
2913         <!-- include folder / device header file -->
2914         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2915         <!-- startup / system file -->
2916         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
2917         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2918         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2919         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2920         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2921         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.0" attr="config"/>
2922         <!-- SAU configuration -->
2923         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2924       </files>
2925     </component>
2926
2927     <!-- Cortex-SC000 -->
2928     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2929       <description>System and Startup for Generic Arm SC000 device</description>
2930       <files>
2931         <!-- include folder / device header file -->
2932         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2933         <!-- startup / system file -->
2934         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2935         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2936         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2937         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2938         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2939       </files>
2940     </component>
2941     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2942       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2943       <files>
2944         <!-- include folder / device header file -->
2945         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2946         <!-- startup / system file -->
2947         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2948         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.1.0" attr="config" condition="GCC"/>
2949         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2950         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2951         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2952       </files>
2953     </component>
2954
2955     <!-- Cortex-SC300 -->
2956     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2957       <description>System and Startup for Generic Arm SC300 device</description>
2958       <files>
2959         <!-- include folder / device header file -->
2960         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2961         <!-- startup / system file -->
2962         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2963         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2964         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2965         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2966         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2967       </files>
2968     </component>
2969     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2970       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2971       <files>
2972         <!-- include folder / device header file -->
2973         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2974         <!-- startup / system file -->
2975         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2976         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.1.0" attr="config" condition="GCC"/>
2977         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2978         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2979         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2980       </files>
2981     </component>
2982
2983     <!-- ARMv8MBL -->
2984     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2985       <description>System and Startup for Generic Armv8-M Baseline device</description>
2986       <files>
2987         <!-- include folder / device header file -->
2988         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2989         <!-- startup / system file -->
2990         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2991         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2992         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2993         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2994         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2995         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2996         <!-- SAU configuration -->
2997         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2998       </files>
2999     </component>
3000     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
3001       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
3002       <files>
3003         <!-- include folder / device header file -->
3004         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
3005         <!-- startup / system file -->
3006         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
3007         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
3008         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
3009         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
3010         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
3011         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
3012         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
3013         <!-- SAU configuration -->
3014         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
3015       </files>
3016     </component>
3017
3018     <!-- ARMv8MML -->
3019     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
3020       <description>System and Startup for Generic Armv8-M Mainline device</description>
3021       <files>
3022         <!-- include folder / device header file -->
3023         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
3024         <!-- startup / system file -->
3025         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
3026         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
3027         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
3028         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
3029         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
3030         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
3031         <!-- SAU configuration -->
3032         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
3033       </files>
3034     </component>
3035     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
3036       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
3037       <files>
3038         <!-- include folder / device header file -->
3039         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
3040         <!-- startup / system file -->
3041         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
3042         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
3043         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
3044         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
3045         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.2.0" attr="config" condition="GCC"/>
3046         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
3047         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
3048         <!-- SAU configuration -->
3049         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
3050       </files>
3051     </component>
3052
3053     <!-- ARMv81MML -->
3054     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
3055       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
3056       <files>
3057         <!-- include folder / device header file -->
3058         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
3059         <!-- startup / system file -->
3060         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
3061         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
3062         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
3063         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
3064         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
3065         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
3066         <!-- SAU configuration -->
3067         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
3068       </files>
3069     </component>
3070
3071     <!-- Cortex-A5 -->
3072     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
3073       <description>System and Startup for Generic Arm Cortex-A5 device</description>
3074       <files>
3075         <!-- include folder / device header file -->
3076         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
3077         <!-- startup / system / mmu files -->
3078         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3079         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3080         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3081         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3082         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
3083         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3084         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3085         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3086         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3087         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
3088         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
3089         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
3090
3091       </files>
3092     </component>
3093
3094     <!-- Cortex-A7 -->
3095     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3096       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3097       <files>
3098         <!-- include folder / device header file -->
3099         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3100         <!-- startup / system / mmu files -->
3101         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3102         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3103         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3104         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3105         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3106         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3107         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3108         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3109         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3110         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
3111         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
3112         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
3113       </files>
3114     </component>
3115
3116     <!-- Cortex-A9 -->
3117     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3118       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3119       <files>
3120         <!-- include folder / device header file -->
3121         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3122         <!-- startup / system / mmu files -->
3123         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3124         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3125         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3126         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3127         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3128         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3129         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3130         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3131         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3132         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
3133         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3134         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
3135       </files>
3136     </component>
3137
3138     <!-- IRQ Controller -->
3139     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3140       <description>IRQ Controller implementation using GIC</description>
3141       <files>
3142         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3143       </files>
3144     </component>
3145
3146     <!-- OS Tick -->
3147     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3148       <description>OS Tick implementation using Private Timer</description>
3149       <files>
3150         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3151       </files>
3152     </component>
3153
3154     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3155       <description>OS Tick implementation using Generic Physical Timer</description>
3156       <files>
3157         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3158       </files>
3159     </component>
3160
3161     <!-- CMSIS-DSP component -->
3162     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.8.0" condition="CMSIS DSP">
3163       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3164       <files>
3165         <!-- CPU independent -->
3166         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3167         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3168
3169         <!-- CPU and Compiler dependent -->
3170         <!-- ARMCC -->
3171         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3172         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3173         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3174         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3175         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3176         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3177         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3178         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3179         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3180         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3181         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3182         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3183         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3184         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3185         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3186         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3187
3188         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3189         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3190         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3191         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3192         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3193         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3194         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3195         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3196         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3197         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3198         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3199         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3200         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3201         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3202         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3203         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3204
3205         <!-- GCC -->
3206         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3207         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3208         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3209         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3210         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3211         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3212         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3213         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3214
3215         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3216         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3217         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3218         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3219         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3220         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3221         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3222         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3223         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3224         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3225         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3226         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3227         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3228         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3229         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3230         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3231
3232         <!-- IAR -->
3233         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3234         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3235         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3236         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3237         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3238         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3239         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3240         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3241         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3242         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3243         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3244         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3245         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3246         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3247         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3248         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3249
3250         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3251         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3252         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3253         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3254         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3255         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3256         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3257         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3258         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3259         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3260         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3261         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3262         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3263         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3264         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3265         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3266
3267       </files>
3268     </component>
3269     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.9.0-dev" isDefaultVariant="true" condition="CMSIS DSP">
3270       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3271       <files>
3272         <!-- CPU independent -->
3273         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
3274         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
3275         <file category="header"   name="CMSIS/DSP/Include/arm_math_f16.h"/>
3276         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables.h"/>
3277         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables_f16.h"/>
3278         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs.h"/>
3279         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs_f16.h"/>
3280
3281         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
3282         <file category="include"  name="CMSIS/DSP/Include/"/>
3283
3284         <!-- DSP sources (core) -->
3285         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3286
3287         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
3288         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3289         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3290         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3291         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
3292         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3293         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3294         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3295         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3296         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3297         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
3298         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3299
3300         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c"/>
3301
3302         <!-- DSP sources F16 versions -->
3303         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c"/>
3304         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c"/>
3305         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c"/>
3306         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTablesF16.c"/>
3307         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c"/>
3308         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c"/>
3309         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c"/>
3310         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c"/>
3311         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c"/>
3312         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c"/>
3313         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c"/>
3314         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c"/>
3315         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c"/>
3316
3317         <!-- Compute Library for Cortex-A -->
3318         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
3319         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
3320       </files>
3321     </component>
3322
3323     <!-- CMSIS-NN component -->
3324     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.3.0" condition="CMSIS NN">
3325       <description>CMSIS-NN Neural Network Library</description>
3326       <files>
3327         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3328         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3329         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
3330         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
3331
3332         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3333         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3334         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3335         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
3336         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
3337         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3338         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
3339         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3340         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3341         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3342         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
3343         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
3344         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
3345         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
3346         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
3347         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
3348         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3349         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3350         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
3351         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3352         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3353         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
3354         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3355         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3356         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
3357         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
3358         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
3359         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
3360         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8_opt.c"/>
3361         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
3362         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
3363         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3364         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
3365         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
3366         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
3367         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3368         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3369         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3370         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3371         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
3372         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3373         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3374         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
3375         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
3376         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
3377         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
3378         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
3379         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
3380         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3381         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3382         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
3383         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3384         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
3385         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
3386         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3387         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3388         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3389         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3390         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3391         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3392         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3393         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
3394         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
3395         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3396         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
3397       </files>
3398     </component>
3399
3400     <!-- CMSIS-RTOS Keil RTX component -->
3401     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3402       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3403       <RTE_Components_h>
3404         <!-- the following content goes into file 'RTE_Components.h' -->
3405         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3406         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3407       </RTE_Components_h>
3408       <files>
3409         <!-- CPU independent -->
3410         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3411         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3412         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3413
3414         <!-- RTX templates -->
3415         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3416         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3417         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3418         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3419         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3420         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3421         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3422         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3423         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3424         <!-- tool-chain specific template file -->
3425         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3426         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3427         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3428
3429         <!-- CPU and Compiler dependent -->
3430         <!-- ARMCC -->
3431         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3432         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3433         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3434         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3435         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3436         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3437         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3438         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3439         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3440         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3441         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3442         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3443         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3444         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3445         <!-- GCC -->
3446         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3447         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3448         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3449         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3450         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3451         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3452         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3453         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3454         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3455         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3456         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3457         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3458         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3459         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3460         <!-- IAR -->
3461         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3462         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3463         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3464         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3465         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3466         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3467         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3468         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3469         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3470         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3471         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3472         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3473         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3474         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3475       </files>
3476     </component>
3477     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3478     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3479       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3480       <RTE_Components_h>
3481         <!-- the following content goes into file 'RTE_Components.h' -->
3482         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3483         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3484       </RTE_Components_h>
3485       <files>
3486         <!-- CPU independent -->
3487         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3488         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3489         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3490
3491         <!-- RTX templates -->
3492         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3493         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3494         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3495         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3496         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3497         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3498         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3499         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3500         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3501         <!-- tool-chain specific template file -->
3502         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3503         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3504         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3505
3506         <!-- CPU and Compiler dependent -->
3507         <!-- ARMCC -->
3508         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3509         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3510         <!-- GCC -->
3511         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3512         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3513         <!-- IAR -->
3514       </files>
3515     </component>
3516
3517     <!-- CMSIS-RTOS Keil RTX5 component -->
3518     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3519       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3520       <RTE_Components_h>
3521         <!-- the following content goes into file 'RTE_Components.h' -->
3522         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3523         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3524       </RTE_Components_h>
3525       <files>
3526         <!-- RTX header file -->
3527         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3528         <!-- RTX compatibility module for API V1 -->
3529         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3530       </files>
3531     </component>
3532
3533     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3534     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3535       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3536       <RTE_Components_h>
3537         <!-- the following content goes into file 'RTE_Components.h' -->
3538         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3539         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3540       </RTE_Components_h>
3541       <files>
3542         <!-- RTX documentation -->
3543         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3544
3545         <!-- RTX header files -->
3546         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3547
3548         <!-- RTX configuration -->
3549         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3550         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3551
3552         <!-- RTX templates -->
3553         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3554         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3555         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3556         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3557         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3558         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3559         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3560         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3561         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3562         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3563
3564         <!-- RTX library configuration -->
3565         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3566
3567         <!-- RTX libraries (CPU and Compiler dependent) -->
3568         <!-- ARMCC -->
3569         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3570         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3571         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3572         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3573         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3574         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3575         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3576         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3577         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3578         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3579         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3580         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3581         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3582         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3583         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3584         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3585         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3586         <!-- GCC -->
3587         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3588         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3589         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3590         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3591         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3592         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3593         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3594         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3595         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3596         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3597         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3598         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3599         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3600         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3601         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3602         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3603         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3604         <!-- IAR -->
3605         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3606         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3607         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3608         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3609         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3610         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3611         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3612         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3613         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3614         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3615         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3616         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3617         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3618         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3619         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3620         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3621         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3622       </files>
3623     </component>
3624     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3625       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3626       <RTE_Components_h>
3627         <!-- the following content goes into file 'RTE_Components.h' -->
3628         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3629         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3630         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3631       </RTE_Components_h>
3632       <files>
3633         <!-- RTX documentation -->
3634         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3635
3636         <!-- RTX header files -->
3637         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3638
3639         <!-- RTX configuration -->
3640         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3641         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3642
3643         <!-- RTX templates -->
3644         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3645         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3646         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3647         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3648         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3649         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3650         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3651         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3652         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3653         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3654
3655         <!-- RTX library configuration -->
3656         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3657
3658         <!-- RTX libraries (CPU and Compiler dependent) -->
3659         <!-- ARMCC -->
3660         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3661         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3662         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3663         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3664         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3665         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3666         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3667         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3668         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3669         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3670         <!-- GCC -->
3671         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3672         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3673         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3674         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3675         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3676         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3677         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3678         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3679         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3680         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3681         <!-- IAR -->
3682         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3683         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3684         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3685         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3686         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3687         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3688         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3689         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3690         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3691         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3692       </files>
3693     </component>
3694     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3695       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3696       <RTE_Components_h>
3697         <!-- the following content goes into file 'RTE_Components.h' -->
3698         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3699         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3700         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3701       </RTE_Components_h>
3702       <files>
3703         <!-- RTX documentation -->
3704         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3705
3706         <!-- RTX header files -->
3707         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3708
3709         <!-- RTX configuration -->
3710         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3711         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3712
3713         <!-- RTX templates -->
3714         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3715         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3716         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3717         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3718         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3719         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3720         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3721         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3722         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3723         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3724
3725         <!-- RTX sources (core) -->
3726         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3727         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3728         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3729         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3730         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3731         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3732         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3733         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3734         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3735         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3736         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3737         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3738         <!-- RTX sources (library configuration) -->
3739         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3740         <!-- RTX sources (handlers ARMCC) -->
3741         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM0_ARMCC"/>
3742         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM1_ARMCC"/>
3743         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM3_ARMCC"/>
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM4_ARMCC"/>
3745         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM4_FP_ARMCC"/>
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM7_ARMCC"/>
3747         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM7_FP_ARMCC"/>
3748         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_ARMCC"/>
3752         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_FP_ARMCC"/>
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3754         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3755         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
3757         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
3759         <!-- RTX sources (handlers GCC) -->
3760         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM0_GCC"/>
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM1_GCC"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM3_GCC"/>
3763         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM4_GCC"/>
3764         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM4_FP_GCC"/>
3765         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM7_GCC"/>
3766         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM7_FP_GCC"/>
3767         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3768         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3769         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3770         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3771         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3772         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3773         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3774         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3775         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3776         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3777         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3778         <!-- RTX sources (handlers IAR) -->
3779         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM0_IAR"/>
3780         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM1_IAR"/>
3781         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM3_IAR"/>
3782         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM4_IAR"/>
3783         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM4_FP_IAR"/>
3784         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM7_IAR"/>
3785         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM7_FP_IAR"/>
3786         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3787         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3788         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3789         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3790         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3791         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3792         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3793         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3794         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3795         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3796         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3797         <!-- OS Tick (SysTick) -->
3798         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3799       </files>
3800     </component>
3801     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3802       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3803       <RTE_Components_h>
3804         <!-- the following content goes into file 'RTE_Components.h' -->
3805         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3806         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3807         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3808       </RTE_Components_h>
3809       <files>
3810         <!-- RTX documentation -->
3811         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3812
3813         <!-- RTX header files -->
3814         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3815
3816         <!-- RTX configuration -->
3817         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3818         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3819
3820         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3821
3822         <!-- RTX templates -->
3823         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3824         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3825         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3826         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3827         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3828         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3829         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3830         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3831         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3832         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3833
3834         <!-- RTX sources (core) -->
3835         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3836         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3837         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3838         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3839         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3840         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3841         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3842         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3843         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3844         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3845         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3846         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3847         <!-- RTX sources (library configuration) -->
3848         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3849         <!-- RTX sources (handlers ARMCC) -->
3850         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3851         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3852         <!-- RTX sources (handlers GCC) -->
3853         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3854         <!-- RTX sources (handlers IAR) -->
3855         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3856       </files>
3857     </component>
3858     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3859       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3860       <RTE_Components_h>
3861         <!-- the following content goes into file 'RTE_Components.h' -->
3862         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3863         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3864         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3865         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3866       </RTE_Components_h>
3867       <files>
3868         <!-- RTX documentation -->
3869         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3870
3871         <!-- RTX header files -->
3872         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3873
3874         <!-- RTX configuration -->
3875         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3876         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3877
3878         <!-- RTX templates -->
3879         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3880         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3881         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3882         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3883         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3884         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3885         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3886         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3887         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3888         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3889
3890         <!-- RTX sources (core) -->
3891         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3892         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3893         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3894         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3895         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3896         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3897         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3898         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3899         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3900         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3901         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3902         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3903         <!-- RTX sources (library configuration) -->
3904         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3905         <!-- RTX sources (ARMCC handlers) -->
3906         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
3907         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
3908         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
3909         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_ARMCC"/>
3910         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_FP_ARMCC"/>
3911         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_ARMCC"/>
3912         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_ARMCC"/>
3913         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_ARMCC"/>
3914         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
3915         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
3916         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
3917         <!-- RTX sources (GCC handlers) -->
3918         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3919         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3920         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_FP_GCC"/>
3921         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3922         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_FP_GCC"/>
3923         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_GCC"/>
3924         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_GCC"/>
3925         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_GCC"/>
3926         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3927         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3928         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_FP_GCC"/>
3929         <!-- RTX sources (IAR handlers) -->
3930         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="CM23_IAR"/>
3931         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_IAR"/>
3932         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_FP_IAR"/>
3933         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_IAR"/>
3934         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_FP_IAR"/>
3935         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3936         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_MVE_IAR"/>
3937         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_FPU_IAR"/>
3938         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="ARMv8MBL_IAR"/>
3939         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_IAR"/>
3940         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_FP_IAR"/>
3941         <!-- OS Tick (SysTick) -->
3942         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3943       </files>
3944     </component>
3945
3946     <!-- CMSIS-Driver Custom components -->
3947     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3948       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3949       <files>
3950         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3951         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3952       </files>
3953     </component>
3954     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3955       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3956       <files>
3957         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3958         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3959       </files>
3960     </component>
3961     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3962       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3963       <files>
3964         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3965         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3966       </files>
3967     </component>
3968     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3969       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3970       <files>
3971         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3972         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3973       </files>
3974     </component>
3975     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3976       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3977       <files>
3978         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3979         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3980       </files>
3981     </component>
3982     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3983       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3984       <files>
3985         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3986         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3987       </files>
3988     </component>
3989     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3990       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3991       <files>
3992         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3993         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3994       </files>
3995     </component>
3996     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3997       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3998       <files>
3999         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
4000         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
4001       </files>
4002     </component>
4003     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
4004       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
4005       <files>
4006         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
4007         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
4008         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
4009         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
4010       </files>
4011     </component>
4012     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
4013       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
4014       <files>
4015         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
4016         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
4017       </files>
4018     </component>
4019     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
4020       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
4021       <files>
4022         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
4023         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
4024       </files>
4025     </component>
4026     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
4027       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
4028       <files>
4029         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
4030         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
4031       </files>
4032     </component>
4033     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
4034       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
4035       <files>
4036         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
4037         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
4038       </files>
4039     </component>
4040     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
4041       <description>Access to #include Driver_WiFi.h file</description>
4042       <files>
4043         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
4044         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
4045       </files>
4046     </component>
4047
4048     <!-- VIO components -->
4049     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
4050       <description>Virtual I/O custom implementation template</description>
4051       <files>
4052         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
4053       </files>
4054     </component>
4055     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
4056       <description>Virtual I/O implementation using memory only</description>
4057       <files>
4058         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
4059       </files>
4060     </component>
4061
4062   </components>
4063
4064   <boards>
4065     <board name="uVision Simulator" vendor="Keil">
4066       <description>uVision Simulator</description>
4067       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
4068       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
4069       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
4070       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
4071       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
4072       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
4073       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4074       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4075       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4076       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4077       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4078       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4079       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4080       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4081       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4082       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4083       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4084       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4085       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4086       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4087       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4088       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4089       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4090       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4091       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4092       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4093     </board>
4094
4095     <board name="EWARM Simulator" vendor="IAR">
4096       <description>EWARM Simulator</description>
4097       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
4098       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
4099       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
4100       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
4101       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
4102       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
4103       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4104       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4105       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4106       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4107       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4108       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4109       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4110       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4111       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4112       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4113       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4114       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4115       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4116       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4117       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4118       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4119       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4120       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4121       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4122       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4123     </board>
4124   </boards>
4125
4126   <examples>
4127     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
4128       <description>DSP_Lib Bayes example</description>
4129       <board name="uVision Simulator" vendor="Keil"/>
4130       <project>
4131         <environment name="uv" load="arm_bayes_example.uvprojx"/>
4132       </project>
4133       <attributes>
4134         <component Cclass="CMSIS" Cgroup="CORE"/>
4135         <component Cclass="CMSIS" Cgroup="DSP"/>
4136         <component Cclass="Device" Cgroup="Startup"/>
4137         <category>Getting Started</category>
4138       </attributes>
4139     </example>
4140
4141     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
4142       <description>DSP_Lib Class Marks example</description>
4143       <board name="uVision Simulator" vendor="Keil"/>
4144       <project>
4145         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
4146       </project>
4147       <attributes>
4148         <component Cclass="CMSIS" Cgroup="CORE"/>
4149         <component Cclass="CMSIS" Cgroup="DSP"/>
4150         <component Cclass="Device" Cgroup="Startup"/>
4151         <category>Getting Started</category>
4152       </attributes>
4153     </example>
4154
4155     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
4156       <description>DSP_Lib Convolution example</description>
4157       <board name="uVision Simulator" vendor="Keil"/>
4158       <project>
4159         <environment name="uv" load="arm_convolution_example.uvprojx"/>
4160       </project>
4161       <attributes>
4162         <component Cclass="CMSIS" Cgroup="CORE"/>
4163         <component Cclass="CMSIS" Cgroup="DSP"/>
4164         <component Cclass="Device" Cgroup="Startup"/>
4165         <category>Getting Started</category>
4166       </attributes>
4167     </example>
4168
4169     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
4170       <description>DSP_Lib Dotproduct example</description>
4171       <board name="uVision Simulator" vendor="Keil"/>
4172       <project>
4173         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
4174       </project>
4175       <attributes>
4176         <component Cclass="CMSIS" Cgroup="CORE"/>
4177         <component Cclass="CMSIS" Cgroup="DSP"/>
4178         <component Cclass="Device" Cgroup="Startup"/>
4179         <category>Getting Started</category>
4180       </attributes>
4181     </example>
4182
4183     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
4184       <description>DSP_Lib FFT Bin example</description>
4185       <board name="uVision Simulator" vendor="Keil"/>
4186       <project>
4187         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
4188       </project>
4189       <attributes>
4190         <component Cclass="CMSIS" Cgroup="CORE"/>
4191         <component Cclass="CMSIS" Cgroup="DSP"/>
4192         <component Cclass="Device" Cgroup="Startup"/>
4193         <category>Getting Started</category>
4194       </attributes>
4195     </example>
4196
4197     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4198       <description>DSP_Lib FIR example</description>
4199       <board name="uVision Simulator" vendor="Keil"/>
4200       <project>
4201         <environment name="uv" load="arm_fir_example.uvprojx"/>
4202       </project>
4203       <attributes>
4204         <component Cclass="CMSIS" Cgroup="CORE"/>
4205         <component Cclass="CMSIS" Cgroup="DSP"/>
4206         <component Cclass="Device" Cgroup="Startup"/>
4207         <category>Getting Started</category>
4208       </attributes>
4209     </example>
4210
4211     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4212       <description>DSP_Lib Graphic Equalizer example</description>
4213       <board name="uVision Simulator" vendor="Keil"/>
4214       <project>
4215         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4216       </project>
4217       <attributes>
4218         <component Cclass="CMSIS" Cgroup="CORE"/>
4219         <component Cclass="CMSIS" Cgroup="DSP"/>
4220         <component Cclass="Device" Cgroup="Startup"/>
4221         <category>Getting Started</category>
4222       </attributes>
4223     </example>
4224
4225     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4226       <description>DSP_Lib Linear Interpolation example</description>
4227       <board name="uVision Simulator" vendor="Keil"/>
4228       <project>
4229         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4230       </project>
4231       <attributes>
4232         <component Cclass="CMSIS" Cgroup="CORE"/>
4233         <component Cclass="CMSIS" Cgroup="DSP"/>
4234         <component Cclass="Device" Cgroup="Startup"/>
4235         <category>Getting Started</category>
4236       </attributes>
4237     </example>
4238
4239     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4240       <description>DSP_Lib Matrix example</description>
4241       <board name="uVision Simulator" vendor="Keil"/>
4242       <project>
4243         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4244       </project>
4245       <attributes>
4246         <component Cclass="CMSIS" Cgroup="CORE"/>
4247         <component Cclass="CMSIS" Cgroup="DSP"/>
4248         <component Cclass="Device" Cgroup="Startup"/>
4249         <category>Getting Started</category>
4250       </attributes>
4251     </example>
4252
4253     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4254       <description>DSP_Lib Signal Convergence example</description>
4255       <board name="uVision Simulator" vendor="Keil"/>
4256       <project>
4257         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4258       </project>
4259       <attributes>
4260         <component Cclass="CMSIS" Cgroup="CORE"/>
4261         <component Cclass="CMSIS" Cgroup="DSP"/>
4262         <component Cclass="Device" Cgroup="Startup"/>
4263         <category>Getting Started</category>
4264       </attributes>
4265     </example>
4266
4267     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4268       <description>DSP_Lib Sinus/Cosinus example</description>
4269       <board name="uVision Simulator" vendor="Keil"/>
4270       <project>
4271         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4272       </project>
4273       <attributes>
4274         <component Cclass="CMSIS" Cgroup="CORE"/>
4275         <component Cclass="CMSIS" Cgroup="DSP"/>
4276         <component Cclass="Device" Cgroup="Startup"/>
4277         <category>Getting Started</category>
4278       </attributes>
4279     </example>
4280
4281     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
4282       <description>DSP_Lib SVM example</description>
4283       <board name="uVision Simulator" vendor="Keil"/>
4284       <project>
4285         <environment name="uv" load="arm_svm_example.uvprojx"/>
4286       </project>
4287       <attributes>
4288         <component Cclass="CMSIS" Cgroup="CORE"/>
4289         <component Cclass="CMSIS" Cgroup="DSP"/>
4290         <component Cclass="Device" Cgroup="Startup"/>
4291         <category>Getting Started</category>
4292       </attributes>
4293     </example>
4294
4295     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4296       <description>DSP_Lib Variance example</description>
4297       <board name="uVision Simulator" vendor="Keil"/>
4298       <project>
4299         <environment name="uv" load="arm_variance_example.uvprojx"/>
4300       </project>
4301       <attributes>
4302         <component Cclass="CMSIS" Cgroup="CORE"/>
4303         <component Cclass="CMSIS" Cgroup="DSP"/>
4304         <component Cclass="Device" Cgroup="Startup"/>
4305         <category>Getting Started</category>
4306       </attributes>
4307     </example>
4308
4309     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4310       <description>Neural Network CIFAR10 example</description>
4311       <board name="uVision Simulator" vendor="Keil"/>
4312       <project>
4313         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4314       </project>
4315       <attributes>
4316         <component Cclass="CMSIS" Cgroup="CORE"/>
4317         <component Cclass="CMSIS" Cgroup="DSP"/>
4318         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4319         <component Cclass="Device" Cgroup="Startup"/>
4320         <category>Getting Started</category>
4321       </attributes>
4322     </example>
4323
4324     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4325       <description>Neural Network CIFAR10 example</description>
4326       <board name="EWARM Simulator" vendor="IAR"/>
4327       <project>
4328         <environment name="iar" load="NN-example-cifar10.ewp"/>
4329       </project>
4330       <attributes>
4331         <component Cclass="CMSIS" Cgroup="CORE"/>
4332         <component Cclass="CMSIS" Cgroup="DSP"/>
4333         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4334         <component Cclass="Device" Cgroup="Startup"/>
4335         <category>Getting Started</category>
4336       </attributes>
4337     </example>
4338
4339     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4340       <description>Neural Network GRU example</description>
4341       <board name="uVision Simulator" vendor="Keil"/>
4342       <project>
4343         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4344       </project>
4345       <attributes>
4346         <component Cclass="CMSIS" Cgroup="CORE"/>
4347         <component Cclass="CMSIS" Cgroup="DSP"/>
4348         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4349         <component Cclass="Device" Cgroup="Startup"/>
4350         <category>Getting Started</category>
4351       </attributes>
4352     </example>
4353
4354     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4355       <description>Neural Network GRU example</description>
4356       <board name="EWARM Simulator" vendor="IAR"/>
4357       <project>
4358         <environment name="iar" load="NN-example-gru.ewp"/>
4359       </project>
4360       <attributes>
4361         <component Cclass="CMSIS" Cgroup="CORE"/>
4362         <component Cclass="CMSIS" Cgroup="DSP"/>
4363         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4364         <component Cclass="Device" Cgroup="Startup"/>
4365         <category>Getting Started</category>
4366       </attributes>
4367     </example>
4368
4369     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4370       <description>CMSIS-RTOS2 Blinky example</description>
4371       <board name="uVision Simulator" vendor="Keil"/>
4372       <project>
4373         <environment name="uv" load="Blinky.uvprojx"/>
4374       </project>
4375       <attributes>
4376         <component Cclass="CMSIS" Cgroup="CORE"/>
4377         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4378         <component Cclass="Device" Cgroup="Startup"/>
4379         <category>Getting Started</category>
4380       </attributes>
4381     </example>
4382
4383     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4384       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4385       <board name="uVision Simulator" vendor="Keil"/>
4386       <project>
4387         <environment name="uv" load="Blinky.uvprojx"/>
4388       </project>
4389       <attributes>
4390         <component Cclass="CMSIS" Cgroup="CORE"/>
4391         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4392         <component Cclass="Device" Cgroup="Startup"/>
4393         <category>Getting Started</category>
4394       </attributes>
4395     </example>
4396
4397     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4398       <description>CMSIS-RTOS2 Message Queue Example</description>
4399       <board name="uVision Simulator" vendor="Keil"/>
4400       <project>
4401         <environment name="uv" load="MsqQueue.uvprojx"/>
4402       </project>
4403       <attributes>
4404         <component Cclass="CMSIS" Cgroup="CORE"/>
4405         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4406         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4407         <component Cclass="Device" Cgroup="Startup"/>
4408         <category>Getting Started</category>
4409       </attributes>
4410     </example>
4411
4412     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4413       <description>CMSIS-RTOS2 Memory Pool Example</description>
4414       <board name="uVision Simulator" vendor="Keil"/>
4415       <project>
4416         <environment name="uv" load="MemPool.uvprojx"/>
4417       </project>
4418       <attributes>
4419         <component Cclass="CMSIS" Cgroup="CORE"/>
4420         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4421         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4422         <component Cclass="Device" Cgroup="Startup"/>
4423         <category>Getting Started</category>
4424       </attributes>
4425     </example>
4426
4427     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4428       <description>Bare-metal secure/non-secure example without RTOS</description>
4429       <board name="uVision Simulator" vendor="Keil"/>
4430       <project>
4431         <environment name="uv" load="NoRTOS.uvmpw"/>
4432       </project>
4433       <attributes>
4434         <component Cclass="CMSIS" Cgroup="CORE"/>
4435         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4436         <component Cclass="Device" Cgroup="Startup"/>
4437         <category>Getting Started</category>
4438       </attributes>
4439     </example>
4440
4441     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4442       <description>Secure/non-secure RTOS example with thread context management</description>
4443       <board name="uVision Simulator" vendor="Keil"/>
4444       <project>
4445         <environment name="uv" load="RTOS.uvmpw"/>
4446       </project>
4447       <attributes>
4448         <component Cclass="CMSIS" Cgroup="CORE"/>
4449         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4450         <component Cclass="Device" Cgroup="Startup"/>
4451         <category>Getting Started</category>
4452       </attributes>
4453     </example>
4454
4455     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4456       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4457       <board name="uVision Simulator" vendor="Keil"/>
4458       <project>
4459         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4460       </project>
4461       <attributes>
4462         <component Cclass="CMSIS" Cgroup="CORE"/>
4463         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4464         <component Cclass="Device" Cgroup="Startup"/>
4465         <category>Getting Started</category>
4466       </attributes>
4467     </example>
4468
4469     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
4470       <description>CMSIS-RTOS2 Blinky example</description>
4471       <board name="EWARM Simulator" vendor="IAR"/>
4472       <project>
4473         <environment name="iar" load="Blinky/Blinky.ewp"/>
4474       </project>
4475       <attributes>
4476         <component Cclass="CMSIS" Cgroup="CORE"/>
4477         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4478         <component Cclass="Device" Cgroup="Startup"/>
4479         <category>Getting Started</category>
4480       </attributes>
4481     </example>
4482
4483     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
4484       <description>CMSIS-RTOS2 Message Queue Example</description>
4485       <board name="EWARM Simulator" vendor="IAR"/>
4486       <project>
4487         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
4488       </project>
4489       <attributes>
4490         <component Cclass="CMSIS" Cgroup="CORE"/>
4491         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4492         <component Cclass="Device" Cgroup="Startup"/>
4493         <category>Getting Started</category>
4494       </attributes>
4495     </example>
4496
4497   </examples>
4498
4499 </package>